Semiconductor device and method for manufacturing semiconductor device

Abstract

This semiconductor device is provided with: a substrate; a stacked chip comprising a plurality of semiconductor chips stacked on a main surface of the substrate; fixed layers disposed between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip; and a filet extending from the fixed layer so as to protrude from between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip. The filet is connected to the main surface of the substrate and an end surface of the laminated chip.

Description

Semiconductor device and method for manufacturing the same

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.

[0002] Conventionally, methods for manufacturing a semiconductor device in which multiple semiconductor chips are stacked on the main surface of a substrate using technology such as TSV (Through-Silicon Via) have been known (see, for example, Patent Documents 1 and 2). In such methods, multiple semiconductor chips are stacked on the main surface of the substrate by disposing an underfill material such as a film adhesive between the main surface of the substrate and the multiple semiconductor chips and between the multiple semiconductor chips.

[0003] International Publication No. 2023 / 074474 U.S. Patent Application Publication No. 2021 / 210397

[0004] However, because the film adhesive flows during connection, the flowing adhesive overflows from between the main surface of the substrate and the semiconductor chips and between the semiconductor chips, forming multiple fillets. The fillets are adhesive (or its cured product) that overflows from between the main surface of the substrate and the semiconductor chips and between the semiconductor chips, respectively, and protrude from between the substrate and the semiconductor chips and between the semiconductor chips, respectively. For this reason, each fillet is susceptible to external stress, and if each fillet is subjected to external stress, there is a possibility that each semiconductor chip will be damaged.

[0005] In addition, Patent Document 1 describes a film-like adhesive for semiconductors that has an underfill material and includes a first adhesive region that is photocurable and thermosetting and a second adhesive region that is not photocurable but thermosetting, with the goal of reducing the amount of fillet formation. However, the technology described in Patent Document 1 requires the use of a specific underfill material, which makes it less versatile. For this reason, it is desirable to find other methods to prevent damage to semiconductor chips.

[0006] An object of the present disclosure is to provide a semiconductor device and a method for manufacturing a semiconductor device that can suppress damage to semiconductor chips.

[0007] The semiconductor device according to the present disclosure comprises a substrate, a stacked chip consisting of a plurality of semiconductor chips stacked on a main surface of the substrate, a fixing layer arranged between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip, and a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip, the fillet being connected to the main surface of the substrate and an end face of the stacked chip.

[0008] In this semiconductor device, fillets extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chip and between the semiconductor chips in the stacked chip are connected to the main surface of the substrate and the end faces of the stacked chip, so that the fillets, the substrate, and the semiconductor chips are fixed to each other. Therefore, even if external stress is applied to the fillets, displacement of the semiconductor chips relative to the substrate is suppressed, thereby suppressing damage to the semiconductor chips.

[0009] In the semiconductor device described above, the fillet may have a chip connection portion extending in the stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion toward the substrate, i.e., along the main surface of the substrate. Some semiconductor devices include a sealing portion that seals the main surface of the substrate and the stacked chips. Such sealing is achieved by pouring molten resin around the main surface of the substrate and the stacked chips. If the fillet has large irregularities, the flow of the molten resin may be obstructed, potentially resulting in the formation of large voids. However, in this semiconductor device, the fillet has a chip connection portion extending in the stacking direction and a substrate connection portion extending from the chip connection portion toward the substrate. Therefore, when forming the sealing portion, the fillet is prevented from obstructing the flow of the molten resin, thereby preventing the formation of large voids. Furthermore, even if multiple semiconductor chips are misaligned or have different sizes, the chip connection portion of the fillet can fill in the steps on the end faces of the multiple semiconductor chips. This also prevents the flow of the molten resin from being obstructed due to misalignment or size differences between the multiple semiconductor chips. Furthermore, by extending the chip connection portion of the fillet in the stacking direction of the stacked chips, the size of the fillet in the direction perpendicular to the stacking direction of the stacked chips can be reduced, thereby enabling space saving and high-density packaging.

[0010] In the semiconductor device described above, the surface of the chip connection portion opposite to the stacked chip may be formed in a flat shape, which can further suppress the generation of large voids when forming the sealing portion.

[0011] In the semiconductor device described above, the surface of the substrate connecting portion opposite to the main surface of the substrate may be formed in a flat shape. In this semiconductor device, since the surface of the substrate connecting portion opposite to the main surface of the substrate is formed in a flat shape, it is possible to further suppress the generation of large voids when forming the sealing portion.

[0012] In the semiconductor device described above, the maximum thickness of the chip connection portion in the substrate direction may be 5 μm or more and 300 μm or less. In this semiconductor device, the maximum thickness of the chip connection portion in the substrate direction is 5 μm or more and 300 μm or less, thereby reducing the step between the end face of the stacked chip and the chip connection portion. This further reduces the occurrence of large voids when forming the sealing portion. Furthermore, the size of the fillet in the direction perpendicular to the end face of the stacked chip can be reduced. This allows for space savings and high-density packaging.

[0013] In the semiconductor device, the maximum thickness of the substrate connection portion in the stacking direction may be 5 μm or more and 100 μm or less. In this semiconductor device, the maximum thickness of the substrate connection portion in the stacking direction is 5 μm or more and 100 μm or less, so that the step between the main surface of the substrate and the substrate connection portion can be reduced. This further prevents large voids from occurring when forming the sealing portion.

[0014] The semiconductor device may further include a second stacked chip consisting of a plurality of semiconductor chips stacked on a main surface of a substrate, a second fixing layer disposed between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip, and a second fillet extending from the second fixing layer so as to extend from the second stacked chip to the main surface of the substrate and between the plurality of semiconductor chips in the second stacked chip, the second fillet being connected to the fillet. In this semiconductor device, the fillet extending from the fixing layer and the second fillet extending from the second fixing layer are connected to each other, thereby increasing the rigidity of the fillet and the second fillet, and further suppressing displacement of the plurality of semiconductor chips in the stacked chip relative to the substrate and displacement of the plurality of semiconductor chips in the second stacked chip relative to the substrate. This further suppresses damage to the semiconductor chips.

[0015] In the semiconductor device described above, the second fillet may have a second chip connection portion extending in the stacking direction of the second stacked chips and a second substrate connection portion extending from the second chip connection portion in a substrate direction, which is a direction along the main surface of the substrate, and the second substrate connection portion of the second fillet may be connected to the substrate connection portion of the fillet. In this semiconductor device, the substrate connection portion of the fillet and the second substrate connection portion of the second fillet are connected to each other, so that the step between the main surface of the substrate and the fillet and the second fillet can be reduced or eliminated. This further reduces the occurrence of large voids when forming the sealing portion.

[0016] The semiconductor device may further include a sealing portion that seals the main surface of the substrate and the stacked chips. Since the semiconductor device includes the sealing portion that seals the main surface of the substrate and the stacked chips, the main surface of the substrate and the stacked chips can be protected.

[0017] The method for manufacturing a semiconductor device according to the present disclosure includes a stacking step in which a film-like underfill material is placed between a main surface of a substrate and a plurality of semiconductor chips and between the plurality of semiconductor chips, and the plurality of semiconductor chips are stacked on the main surface of the substrate, and in the stacking step, the underfill material is caused to overflow between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips, and fillets of the underfill material overflowing between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips are connected to the main surface of the substrate and the end faces of the stacked chip consisting of the plurality of semiconductor chips.

[0018] In this semiconductor device manufacturing method, fillets of underfill material that protrude between the substrate and the semiconductor chips and between the semiconductor chips are connected to the main surface of the substrate and the end faces of the stacked chips, so that the fillets, the substrate, and the semiconductor chips are fixed to one another. Therefore, even if external stress is applied to the fillets, displacement of the semiconductor chips relative to the substrate is suppressed, and damage to the semiconductor chips can be suppressed.

[0019] The method for manufacturing a semiconductor device described above may further include a cutting step of cutting a portion of the fillet. In this method for manufacturing a semiconductor device, since a portion of the fillet is cut, the fillet can be formed into any shape.

[0020] In the above-described semiconductor device manufacturing method, the cutting step may cut a portion of the fillet so that the fillet is formed at the chip connection portion extending in the stacking direction of the stacked chips and the substrate connection portion extending from the chip connection portion toward the substrate, i.e., the direction along the main surface of the substrate. In the manufacturing of a semiconductor device, the main surface of the substrate and the stacked chips are sometimes encapsulated with resin. This encapsulation is performed by pouring molten resin around the main surface of the substrate and the stacked chips. If the fillet has large irregularities, the flow of the molten resin may be obstructed, potentially resulting in the generation of large voids. However, in this semiconductor device manufacturing method, a portion of the fillet is cut so that the fillet is formed at the chip connection portion extending in the stacking direction and the substrate connection portion extending from the chip connection portion toward the substrate. Therefore, when encapsulating the main surface of the substrate and the stacked chips with resin, the obstruction of the flow of the molten resin by the fillet is suppressed, thereby preventing the generation of large voids. Furthermore, even when multiple semiconductor chips are misaligned or have different sizes, the chip connection portion can fill the steps on the end faces of the multiple semiconductor chips. This also reduces the disruption of the flow of molten resin due to misalignment or size differences between multiple semiconductor chips. Furthermore, by extending the chip connection portion of the fillet in the stacking direction, the dimensions of the fillet in the direction perpendicular to the stacking direction of the stacked chips can be reduced. This allows for space savings and high-density packaging.

[0021] In the method for manufacturing a semiconductor device described above, in the cutting step, a portion of the fillet may be cut so that the surface of the chip connection portion opposite the stacked chip is formed flat. In this method for manufacturing a semiconductor device, since a portion of the fillet is cut so that the surface of the chip connection portion opposite the stacked chip is formed flat, it is possible to further suppress the generation of large voids when sealing the main surface of the substrate and the stacked chip with resin.

[0022] In the method for manufacturing a semiconductor device described above, in the cutting step, a portion of the fillet may be cut so that the surface of the substrate connection portion opposite the substrate is formed flat. In this method for manufacturing a semiconductor device, since a portion of the fillet is cut so that the surface of the substrate connection portion opposite the substrate is formed flat, it is possible to further suppress the generation of large voids when sealing the main surface of the substrate and the stacked chip with resin.

[0023] The method for manufacturing a semiconductor device described above may further include a sealing step of sealing the main surface of the substrate and the stacked chips with resin, which can protect the main surface of the substrate and the stacked chips.

[0024] According to the present disclosure, damage to semiconductor chips can be suppressed.

[0025] FIG. 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment; FIG. 2 is a schematic cross-sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment; FIG. 3 is a schematic cross-sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment; FIG. 4 is a schematic cross-sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment; FIG. 5 is a schematic cross-sectional view for explaining a method for manufacturing a semiconductor device according to an embodiment; FIG. 6 is a schematic cross-sectional view showing a semiconductor device of a modified example;

[0026] Hereinafter, the present embodiment will be described in detail with reference to the drawings. In the following description, the same or corresponding parts will be denoted by the same reference numerals, and duplicated explanations will be omitted. Furthermore, the dimensional ratios in the drawings are not limited to those shown in the drawings.

[0027] In this specification, the term "layer" encompasses not only a structure with a shape formed over the entire surface when observed in a plan view, but also a structure with a shape formed on a portion of the surface. Furthermore, in this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes, as long as the intended effect of the process is achieved. Furthermore, a numerical range indicated using "to" indicates a range that includes the numerical values ​​before and after "to" as the minimum and maximum values, respectively.

[0028] (Semiconductor Device) Fig. 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment. As shown in Fig. 1, the semiconductor device 1 according to this embodiment is configured by stacking a first stacked chip 3A and a second stacked chip 3B on a main surface 2a of a substrate 2. The semiconductor device 1 is, for example, a semiconductor device (semiconductor package) such as a processor or memory. The processor may be, for example, a processor unit such as a GPU (Graphics Processing Unit) or a CPU (Central Processing Unit). The memory may be, for example, a memory unit such as an HBM (High Bandwidth Memory).

[0029] The substrate 2 may be, for example, a silicon substrate such as an interposer, an organic substrate, or a metal substrate such as a lead frame. A plurality of electrodes 2b are formed on a main surface 2a of the substrate 2. The main surface 2a is the surface on one side of the substrate 2, and is the surface on which the plurality of electrodes 2b are formed. The electrodes 2b may be through-silicon vias (TSVs) that penetrate from the main surface 2a to a back surface 2c opposite the main surface 2a.

[0030] The first chip stack 3A is composed of multiple semiconductor chips 30A stacked on the main surface 2a of the substrate 2. The multiple semiconductor chips 30A may be the same as each other or different from each other. In this embodiment, the first chip stack 3A is composed of three identical semiconductor chips: a first semiconductor chip 31A, a second semiconductor chip 32A, and a third semiconductor chip 33A. In other words, in this embodiment, the multiple semiconductor chips 30A are composed of a first semiconductor chip 31A, a second semiconductor chip 32A, and a third semiconductor chip 33A. In the first chip stack 3A, the first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A are stacked in this order on the main surface 2a of the substrate 2.

[0031] Each of the first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A (hereinafter simply referred to as the "semiconductor chip 30A") has a first main surface 30Aa and a second main surface 30Ab. The first main surface 30Aa is the surface on one side of the semiconductor chip 30A, and the second main surface 30Ab is the surface of the semiconductor chip 30A opposite to the first main surface 30Aa. The first main surface 30Aa is the surface of the semiconductor chip 30A facing the substrate 2, and the second main surface 30Ab is the surface of the semiconductor chip 30A opposite to the substrate 2. A plurality of electrodes 30Ac are formed on the first main surface 30Aa of the semiconductor chip 30A, and a plurality of electrodes 30Ad are formed on the second main surface 30Ab of the semiconductor chip 30A. The electrodes 30Ad may be TSVs that penetrate toward the electrodes 30Ac on the opposite side of the electrodes 30Ad. Bumps 4A are disposed between the plurality of electrodes 2b formed on the main surface 2a of the substrate 2 and the plurality of electrodes 30Ac formed on the first main surface 30Aa of the first semiconductor chip 31A, providing electrical continuity between the substrate 2 and the first semiconductor chip 31A. Bumps 4A are also disposed between the plurality of electrodes 30Ad formed on the second main surface 30Bb of the first semiconductor chip 31A and the plurality of electrodes 30Ac formed on the first main surface 30Ba of the second semiconductor chip 32A, providing electrical continuity between the first semiconductor chip 31A and the second semiconductor chip 32A. Bumps 4A are also disposed between the plurality of electrodes 30Ad formed on the second main surface 30Bb of the second semiconductor chip 32A and the plurality of electrodes 30Ac formed on the first main surface 30Ba of the third semiconductor chip 33A, providing electrical continuity between the second semiconductor chip 32A and the third semiconductor chip 33A.

[0032] First fixing layers 5A are disposed between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A. That is, first fixing layers 5A are disposed between the main surface 2a of the substrate 2 and the first main surface 30Aa of the first semiconductor chip 31A, between the second main surface 30Ab of the first semiconductor chip 31A and the first main surface 30Aa of the second semiconductor chip 32A, and between the second main surface 30Ab of the second semiconductor chip 32A and the first main surface 30Aa of the third semiconductor chip 33A. The first fixing layers 5A connect (fix) the substrate 2 and the plurality of semiconductor chips 30A. The first fixing layers 5A are cured underfill material disposed between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A during the manufacture of the semiconductor device 1. The material of the underfill material and the first fixing layers 5A is not particularly limited, but may be, for example, a thermosetting resin such as epoxy resin. In addition, the first fixing layer 5A is arranged to cover the bumps 4A between the main surface 2a of the substrate 2 and the multiple semiconductor chips 30A and between the multiple semiconductor chips 30A in order to ensure conductivity between the substrate 2 and the multiple semiconductor chips 30A.

[0033] First fillets 6A extending from the first fixing layer 5A protrude between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A. In other words, the first fillets 6A extend from the first fixing layer 5A so as to protrude between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A. The first fillets 6A are hardened underfill material that protruded between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A during the manufacture of the semiconductor device 1.

[0034] The first fillet 6A is connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A. The end surface 3Aa of the first stacked chip 3A is an end surface of the multiple semiconductor chips 30A (the first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A). The connection of the first fillet 6A to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A means that the first fillet 6A is fixed to the main surface 2a of the substrate 2 and also to the end surface 3Aa of the first stacked chip 3A. The first fillet 6A is formed by underfill material that protrudes between the main surface 2a of the substrate 2 and the multiple semiconductor chips 30A and between the multiple semiconductor chips 30A during the manufacture of the semiconductor device 1, and hardens in contact with the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A.

[0035] The first fillet 6A has a first chip connection portion 61A extending in the stacking direction D1 of the first chip stack 3A and a first substrate connection portion 62A extending from the first chip connection portion 61A in a substrate direction D2, which is a direction along the main surface 2a of the substrate 2. In this embodiment, the first fillet 6A is configured (formed) by the first chip connection portion 61A and the first substrate connection portion 62A. The stacking direction D1 of the first chip stack 3A is also a direction perpendicular to the main surface 2a of the substrate 2 or a direction perpendicular to the substrate direction D2. Therefore, the first fillet 6A is formed with an L-shaped cross section by the first chip connection portion 61A and the first substrate connection portion 62A.

[0036] A surface 61Aa of the first chip connection portion 61A opposite to the first stacked chip 3A is formed flat. Also, a surface 62Aa of the first substrate connection portion 62A opposite to the main surface 2a of the substrate 2 is formed flat. The surface 61Aa of the first chip connection portion 61A is a surface extending in the stacking direction D1 of the first stacked chip 3A. The surface 62Aa of the first substrate connection portion 62A is a surface extending in the substrate direction D2.

[0037] The maximum thickness of the first chip connection portion 61A in the substrate direction D2 is, for example, 5 μm to 300 μm, 10 μm to 250 μm, or 20 μm to 200 μm. The maximum thickness of the first substrate connection portion 62A in the stacking direction D1 of the first stacked chip 3A is, for example, 5 μm to 100 μm, 8 μm to 90 μm, or 10 μm to 80 μm.

[0038] The second chip stack 3B is composed of multiple semiconductor chips 30B stacked on the main surface 2a of the substrate 2. The multiple semiconductor chips 30B may be the same as each other or different from each other. In this embodiment, the second chip stack 3B is composed of three identical semiconductor chips: a first semiconductor chip 31B, a second semiconductor chip 32B, and a third semiconductor chip 33B. That is, in this embodiment, the multiple semiconductor chips 30B are composed of a first semiconductor chip 31B, a second semiconductor chip 32B, and a third semiconductor chip 33B. In the second chip stack 3B, the first semiconductor chip 31B, the second semiconductor chip 32B, and the third semiconductor chip 33B are stacked in this order on the main surface 2a of the substrate 2.

[0039] Each of the first semiconductor chip 31B, the second semiconductor chip 32B, and the third semiconductor chip 33B (hereinafter simply referred to as the "semiconductor chip 30B") has a first main surface 30Ba and a second main surface 30Bb. The first main surface 30Ba is the surface on one side of the semiconductor chip 30B, and the second main surface 30Bb is the surface of the semiconductor chip 30B opposite the first main surface 30Ba. The first main surface 30Ba is the surface of the semiconductor chip 30B facing the substrate 2, and the second main surface 30Bb is the surface of the semiconductor chip 30B opposite the substrate 2. A plurality of electrodes 30Bc are formed on the first main surface 30Ba of the semiconductor chip 30B, and a plurality of electrodes 30Bd are formed on the second main surface 30Bb of the semiconductor chip 30B. The electrodes 30Bd may be TSVs that penetrate toward the electrodes 30Bc on the opposite side of the electrodes 30Bd. Bumps 4B are arranged between the plurality of electrodes 2b formed on the main surface 2a of the substrate 2 and the plurality of electrodes 30Bc formed on the first main surface 30Ba of the first semiconductor chip 31B, providing electrical continuity between the substrate 2 and the first semiconductor chip 31B. Bumps 4B are also arranged between the plurality of electrodes 30Bd formed on the second main surface 30Bb of the first semiconductor chip 31B and the plurality of electrodes 30Bc formed on the first main surface 30Ba of the second semiconductor chip 32B, providing electrical continuity between the first semiconductor chip 31B and the second semiconductor chip 32B. Bumps 4B are also arranged between the plurality of electrodes 30Bd formed on the second main surface 30Bb of the second semiconductor chip 32B and the plurality of electrodes 30Bc formed on the first main surface 30Ba of the third semiconductor chip 33B, providing electrical continuity between the second semiconductor chip 32B and the third semiconductor chip 33B.

[0040] Second fixing layers 5B are disposed between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30B and between the plurality of semiconductor chips 30B. Similar to the first fixing layers 5A, the second fixing layers 5B connect (fix) the substrate 2 and the plurality of semiconductor chips 30B to each other.

[0041] Second fillets 6B extending from the second fixing layer 5B protrude between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30B and between the plurality of semiconductor chips 30B. In other words, similar to the first fillets 6A, the second fillets 6B extend from the second fixing layer 5B so as to protrude between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30B and between the plurality of semiconductor chips 30B.

[0042] Similar to the first fillet 6A, the second fillet 6B is connected to the main surface 2a of the substrate 2 and the end surface 3Ba of the second chip stack 3B. Similar to the first fillet 6A, the second fillet 6B has a second chip connection portion 61B extending in the stacking direction D1 of the second chip stack 3B and a second substrate connection portion 62B extending from the second chip connection portion 61B in the substrate direction D2. In this embodiment, similar to the first fillet 6A, the second fillet 6B is configured (formed) by the second chip connection portion 61B and the second substrate connection portion 62B.

[0043] A surface 61Ba of the second chip connection portion 61B opposite to the second stacked chip 3B is formed flat, and a surface 62Ba of the second substrate connection portion 62B opposite to the main surface 2a of the substrate 2 is also formed flat.

[0044] The maximum thickness of the second chip connection portion 61B in the substrate direction D2 can be the same as the maximum thickness of the first chip connection portion 61A in the substrate direction D2. Also, the maximum thickness of the second substrate connection portion 62B in the stacking direction D1 of the second stacked chip 3B can be the same as the maximum thickness of the first substrate connection portion 62A in the stacking direction D1 of the first stacked chip 3A.

[0045] The first stacked chip 3A and the second stacked chip 3B are spaced apart from each other, and the second substrate connecting portion 62B of the second fillet 6B and the first substrate connecting portion 62A of the first fillet 6A are connected to each other between the first stacked chip 3A and the second stacked chip 3B.

[0046] The main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B are sealed by the sealing portion 7. In other words, the sealing portion 7 seals the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B. The sealing portion 7 may seal portions other than the main surface 2a of the substrate 2, or may seal the entire substrate 2. The material of the sealing portion 7 is not particularly limited, but is, for example, a thermosetting resin such as epoxy resin.

[0047] (Method for Manufacturing a Semiconductor Device) Next, a method for manufacturing a semiconductor device according to this embodiment will be described with reference to Figures 2 to 6. The method for manufacturing a semiconductor device according to this embodiment is a method for manufacturing the above-described semiconductor device 1. Figures 2 to 6 are schematic cross-sectional views for explaining the method for manufacturing a semiconductor device according to this embodiment.

[0048] <Stacking Process> In the semiconductor device manufacturing method according to this embodiment, a first stacking process is first performed. In the first stacking process, a substrate 2, a first semiconductor chip 31A, a second semiconductor chip 32A, a third semiconductor chip 33A, a first semiconductor chip 31B, a second semiconductor chip 32B, a third semiconductor chip 33B, a film-like underfill material 51A, and a film-like underfill material 51B are prepared. The first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A have bumps 4A attached to a plurality of electrodes 30Ac formed on the first main surface 30Aa. The first semiconductor chip 31B, the second semiconductor chip 32B, and the third semiconductor chip 33B have bumps 4B attached to a plurality of electrodes 30Bc formed on the first main surface 30Aa. The materials for the underfill material 51A and the underfill material 51A may be the same as those for the first fixing layer 5A and the second fixing layer 5B described above.

[0049] Next, as shown in Figures 2 and 3, an underfill material 51A is placed between the main surface 2a of the substrate 2 and the first semiconductor chip 31A, and the first semiconductor chip 31A is stacked on the main surface 2a of the substrate 2. Then, by heating and pressurizing the substrate 2 and the first semiconductor chip 31A, the first semiconductor chip 31A is connected (fixed) to the main surface 2a of the substrate 2, and the substrate 2 and the first semiconductor chip 31A are electrically connected by the bumps 4A. Similarly, an underfill material 51B is placed between the main surface 2a of the substrate 2 and the first semiconductor chip 31B, and the first semiconductor chip 31B is stacked on the main surface 2a of the substrate 2. Then, by heating and pressurizing the substrate 2 and the first semiconductor chip 31B, the first semiconductor chip 31B is connected (fixed) to the main surface 2a of the substrate 2, and the substrate 2 and the first semiconductor chip 31B are electrically connected by the bumps 4B.

[0050] At this time, the underfill material 51A disposed between the main surface 2a of the substrate 2 and the first semiconductor chip 31A flows when heated and pressurized, and protrudes from between the substrate 2 and the first semiconductor chip 31A. The underfill material 51B disposed between the main surface 2a of the substrate 2 and the first semiconductor chip 31B flows when heated and pressurized, and protrudes from between the substrate 2 and the first semiconductor chip 31B. The substrate 2 and the first semiconductor chip 31A are then heated and pressurized so that a fillet 51Aa of the underfill material 51A protruding from between the substrate 2 and the first semiconductor chip 31A contacts the main surface 2a of the substrate 2 and the end face 3Aa of the first semiconductor chip 31A. The substrate 2 and the first semiconductor chip 31B are also heated and pressurized so that a fillet 51Ba of the underfill material 51B protruding from between the substrate 2 and the first semiconductor chip 31B contacts the main surface 2a of the substrate 2 and the end face 3Ba of the first semiconductor chip 31B. At this time, the substrate 2, the first semiconductor chip 31A, and the first semiconductor chip 31B may be heated and pressurized so that the fillets 51Aa and 51Ba come into contact with each other.

[0051] Next, as shown in FIG. 4 , an underfill material 51A is placed between the second main surface 30Ab of the first semiconductor chip 31A and the first main surface 30Aa of the second semiconductor chip 32A, and the second semiconductor chip 32A is stacked on the second main surface 30Ab of the first semiconductor chip 31A. Then, the first semiconductor chip 31A and the second semiconductor chip 32A are heated and pressurized to connect (fix) the second semiconductor chip 32A to the first semiconductor chip 31A, electrically connecting the first semiconductor chip 31A and the second semiconductor chip 32A via the bumps 4A, and causing the underfill material 51A to protrude from between the first semiconductor chip 31A and the second semiconductor chip 32A. Similarly, an underfill material 51B is placed between the second main surface 30Bb of the first semiconductor chip 31B and the first main surface 30Ba of the second semiconductor chip 32B, and the second semiconductor chip 32B is stacked on the second main surface 30Bb of the first semiconductor chip 31B. Then, by heating and pressurizing the first semiconductor chip 31B and the second semiconductor chip 32B, the second semiconductor chip 32B is connected (fixed) onto the first semiconductor chip 31B, the first semiconductor chip 31B and the second semiconductor chip 32B are electrically connected by the bumps 4B, and the underfill material 51B is allowed to protrude from between the first semiconductor chip 31B and the second semiconductor chip 32B.

[0052] Furthermore, the first semiconductor chip 31A and the second semiconductor chip 32A are heated and pressurized so that a fillet 51Aa of the underfill material 51A protruding from between the first semiconductor chip 31A and the second semiconductor chip 32A contacts the end face 3Aa of the first semiconductor chip 31A and the end face 3Aa of the second semiconductor chip 32A. The first semiconductor chip 31B and the second semiconductor chip 32B are also heated and pressurized so that a fillet 51Ba of the underfill material 51B protruding from between the first semiconductor chip 31B and the second semiconductor chip 32B contacts the end face 3Ba of the first semiconductor chip 31B and the end face 3Ba of the second semiconductor chip 32B. At this time, the first semiconductor chip 31A, the second semiconductor chip 32A, the first semiconductor chip 31B, and the second semiconductor chip 32B may also be heated and pressurized so that the fillet 51Aa and the fillet 51Ba contact each other.

[0053] 5, an underfill material 51A is placed between the second main surface 30Ab of the second semiconductor chip 32A and the first main surface 30Aa of the third semiconductor chip 33A, and the third semiconductor chip 33A is stacked on the second main surface 30Ab of the second semiconductor chip 32A. The second and third semiconductor chips 32A and 33A are then heated and pressurized to connect (fix) the third semiconductor chip 33A to the second semiconductor chip 32A, electrically connecting the second and third semiconductor chips 32A and 33A via the bumps 4A, and causing the underfill material 51A to protrude from between the second and third semiconductor chips 32A and 33A. Similarly, an underfill material 51B is placed between the second main surface 30Bb of the second semiconductor chip 32B and the first main surface 30Ba of the third semiconductor chip 33B, and the third semiconductor chip 33B is stacked on the second main surface 30Bb of the second semiconductor chip 32B. Then, by heating and pressurizing the second semiconductor chip 32B and the third semiconductor chip 33B, the third semiconductor chip 33B is connected (fixed) onto the second semiconductor chip 32B, the second semiconductor chip 32B and the third semiconductor chip 33B are electrically connected by the bumps 4B, and the underfill material 51B is caused to protrude from between the second semiconductor chip 32B and the third semiconductor chip 33B.

[0054] Furthermore, the second semiconductor chip 32A and the third semiconductor chip 33A are heated and pressurized so that the fillet 51Aa of the underfill material 51A protruding from between the second semiconductor chip 32A and the third semiconductor chip 33A contacts the end face 3Aa of the second semiconductor chip 32A and the end face 3Aa of the third semiconductor chip 33A. The second semiconductor chip 32B and the third semiconductor chip 33B are also heated and pressurized so that the fillet 51Ba of the underfill material 51B protruding from between the second semiconductor chip 32B and the third semiconductor chip 33B contacts the end face 3Ba of the second semiconductor chip 32B and the end face 3Ba of the third semiconductor chip 33B. The second semiconductor chip 32A, the third semiconductor chip 33A, the second semiconductor chip 32B, and the third semiconductor chip 33B may also be heated and pressurized so that the fillet 51Aa and the fillet 51Ba contact each other.

[0055] As a result, fillets 51Aa of the underfill material 51A that protrude between the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A are connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A consisting of the plurality of semiconductor chips 30A. Also, fillets 51Ba of the underfill material 51B that protrude between the substrate 2 and the plurality of semiconductor chips 30B and between the plurality of semiconductor chips 30B are connected to the main surface 2a of the substrate 2 and the end surface 3Ba of the second stacked chip 3B consisting of the plurality of semiconductor chips 30B. Also, the fillets 51Aa and 51Ba are in contact with each other.

[0056] In the stacking process, the stacking of the first stacked chip 3A and the stacking of the second stacked chip 3B may be performed at the same time or at different times, or some of them may be performed at the same time and other parts may be performed at different times.

[0057] <Cutting Step> After the lamination step is completed and the fillets 51Aa and 51Ba are hardened, the cutting step is performed. As shown in Fig. 6, in the cutting step, a part of the fillets 51Aa and a part of the fillets 51Ba are cut. For example, a cutting blade such as an electroplated blade can be used for cutting.

[0058] In the cutting process, a portion of the fillet 51Aa is cut to form a first fillet 6A, which is a hardened portion of the fillet 51Aa, into a first chip connection portion 61A extending in the stacking direction D1 of the first stacked chip 3A and a first substrate connection portion 62A extending from the first chip connection portion 61A in the substrate direction D2. Also, a portion of the fillet 51Ba is cut to form a second fillet 6B, which is a hardened portion of the fillet 51Ba, into a second chip connection portion 61B extending in the stacking direction D1 of the second stacked chip 3B and a second substrate connection portion 62B extending from the second chip connection portion 61B in the substrate direction D2. For example, the cutting positions in the stacking direction D1 and the substrate direction D2 are adjusted from the side opposite the substrate 2 with respect to the first stacked chip 3A and the second stacked chip 3B, and a cutting blade is inserted into the hardened portion of the fillet 51Aa and the hardened portion of the fillet 51Ba. This allows the first fillet 6A to be formed in the first chip connection portion 61A and the first substrate connection portion 62A, and the second fillet 6B to be formed in the second chip connection portion 61B and the second substrate connection portion 62B.

[0059] At this time, a portion of the first fillet 6A, which is the hardened product of the fillet 51Aa, is cut so that a surface 61Aa of the first chip connecting portion 61A opposite to the first stacked chip 3A is formed flat, and a surface 62Aa of the first substrate connecting portion 62A opposite to the substrate 2 is formed flat. Also, a surface 61Ba of the second stacked chip 3B of the second chip connecting portion 61B is formed flat, and a portion of the second fillet 6B, which is the hardened product of the fillet 51Ba, is cut so that a surface 62Ba of the second substrate connecting portion 62B opposite to the substrate 2 is formed flat.

[0060] <Encapsulating Process> After the cutting process is completed, the encapsulating process is performed. In the encapsulating process, the main surface 2a of the substrate 2, the first stacked chips 3A, and the second stacked chips 3B are sealed with resin. The encapsulating process can be performed, for example, by placing a stack in which the first stacked chips 3A and the second stacked chips 3B are stacked on the main surface 2a of the substrate 2 in a mold and pouring molten resin around the main surface 2a of the substrate 2, the first stacked chips 3A, and the second stacked chips 3B. This results in the semiconductor device 1 shown in FIG. 1 . Note that in the encapsulating process, portions of the substrate 2 other than the main surface 2a may be sealed with resin, or the entire substrate 2 may be sealed with resin.

[0061] As described above, in the semiconductor device 1 according to this embodiment, the first fillet 6A extending from the first fixing layer 5A so as to protrude between the main surface 2a of the substrate 2 and the first stacked chip 3A and between the plurality of semiconductor chips 30A in the first stacked chip 3A is connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A, thereby fixing the first fillet 6A, the substrate 2, and the plurality of semiconductor chips 30A to one another. Therefore, even if external stress is applied to the first fillet 6A, the displacement of the plurality of semiconductor chips 30A relative to the substrate 2 is suppressed, thereby suppressing damage to the semiconductor chip 30A. Furthermore, because at least a portion of the end surface 3Aa of the first stacked chip 3A is covered by the first fillet 6A, the end surface 3Aa of the first stacked chip 3A can be protected by the first fillet 6A.

[0062] The encapsulation portion 7 is formed by pouring molten resin around the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B. If the first fillet has large irregularities, the flow of the molten resin may be obstructed, potentially resulting in large voids. However, in the semiconductor device 1, the first fillet 6A is composed of a first chip connection portion 61A extending in the stacking direction D1 of the first stacked chip 3A and a second substrate connection portion 62B extending from the first chip connection portion 61A in the substrate direction D2. Therefore, when forming the encapsulation portion 7, the first fillet 6A is prevented from obstructing the flow of the molten resin, thereby preventing the formation of large voids. Furthermore, even if the semiconductor chips 30A are misaligned or have different sizes, the first chip connection portion 61A of the first fillet 6A can fill in the steps on the end faces 3Aa of the semiconductor chips 30A. This also prevents the flow of the molten resin from being obstructed due to misalignment or size differences between the semiconductor chips 30A. Furthermore, the first chip connection portion 61A of the first fillet 6A extends in the stacking direction D1 of the first chip stack 3A, thereby reducing the dimension of the first fillet 6A in a direction perpendicular to the stacking direction D1 of the first chip stack 3A, thereby enabling space saving and high-density packaging.

[0063] Furthermore, in this semiconductor device 1, the surface 61Aa of the first chip connection portion 61A opposite the first stacked chip 3A is formed flat, which further prevents large voids from occurring when forming the sealing portion 7.

[0064] Furthermore, in this semiconductor device 1, the surface 62Aa of the first substrate connection portion 62A opposite to the main surface 2a of the substrate 2 is formed flat, which further prevents large voids from occurring when forming the sealing portion 7.

[0065] Furthermore, in this semiconductor device 1, the maximum thickness of the first chip connection portion 61A in the substrate direction D2 is 5 μm to 300 μm, 10 μm to 250 μm, or 20 μm to 200 μm, thereby reducing the step between the end face 3Aa of the first stacked chip 3A and the first chip connection portion 61A. This further reduces the occurrence of large voids when forming the sealing portion 7. Furthermore, the dimension of the first fillet 6A in the direction perpendicular to the end face 3Aa of the first stacked chip 3A can be reduced. This allows for space savings and high-density packaging.

[0066] Furthermore, in this semiconductor device 1, the maximum thickness of first substrate connection portion 62A in stacking direction D1 is 5 μm to 100 μm, 8 μm to 90 μm, or 10 μm to 80 μm, thereby reducing the step between main surface 2 a of substrate 2 and first substrate connection portion 62A. This further reduces the occurrence of large voids when forming sealing portion 7.

[0067] Furthermore, in this semiconductor device 1, the first fillet 6A extending from the first fixing layer 5A and the second fillet 6B extending from the second fixing layer 5B are connected to each other, which increases the rigidity of the first fillet 6A and the second fillet 6B, thereby further suppressing displacement of the multiple semiconductor chips 30A of the first stacked chip 3A relative to the substrate 2 and displacement of the multiple semiconductor chips 30B of the second stacked chip 3B relative to the substrate 2. This further suppresses damage to the semiconductor chips 30A and 30B.

[0068] Furthermore, in this semiconductor device 1, the first substrate connecting portion 62A of the first fillet 6A and the second substrate connecting portion 62B of the second fillet 6B are connected to each other, so that the steps between the main surface 2a of the substrate 2 and the first and second fillets 6A and 6B can be reduced or eliminated, thereby further suppressing the generation of large voids when forming the sealing portion 7.

[0069] In addition, this semiconductor device 1 is provided with a sealing portion 7 that seals the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B, thereby protecting the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B.

[0070] In the semiconductor device manufacturing method according to this embodiment, fillets 51Aa of the underfill material 51A that protrude between the substrate 2 and the semiconductor chips 30A and between the semiconductor chips 30A are connected to the main surface 2a of the substrate 2 and the end faces 3Aa of the first stacked chips 3A. This fixes the first fillets 6A, which are the hardened fillets 51Aa, the substrate 2, and the semiconductor chips 30A together. Therefore, even if external stress is applied to the first fillets 6A, the displacement of the semiconductor chips 30A relative to the substrate 2 is suppressed, thereby preventing damage to the semiconductor chips 30A. Furthermore, because at least a portion of the end faces 3Aa of the first stacked chips 3A is covered by the first fillets 6A, the end faces 3Aa of the first stacked chips 3A can be protected by the first fillets 6A.

[0071] Furthermore, in this method for manufacturing a semiconductor device, a portion of the first fillet 6A, which is the hardened product of the fillet 51Aa, is cut, so that the first fillet 6A can be formed into any shape.

[0072] Furthermore, in this semiconductor device manufacturing method, a portion of the first fillet 6A is cut so that the first fillet 6A is formed into a first chip connection portion 61A extending in the stacking direction D1 of the first stacked chip 3A and a first substrate connection portion 62A extending from the first chip connection portion 61A in the substrate direction D2. Therefore, when the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B are encapsulated with resin, the first fillet 6A is prevented from interfering with the flow of molten resin, thereby preventing the formation of large voids. Furthermore, even if the semiconductor chips 30A are misaligned or have different sizes, the first chip connection portion 61A can fill in the steps on the end faces 3Aa of the semiconductor chips 30A. This also prevents the flow of molten resin from being interrupted due to misalignment or size differences between the semiconductor chips 30A. Furthermore, the first chip connection portion 61A of the first fillet 6A extends in the stacking direction D1 of the first chip stack 3A, thereby reducing the dimension of the first fillet 6A in a direction perpendicular to the stacking direction D1 of the first chip stack 3A, thereby enabling space saving and high-density packaging.

[0073] Furthermore, in this semiconductor device manufacturing method, a portion of the first fillet 6A is cut so that the surface 61Aa of the first chip connection portion 61A opposite the first stacked chip 3A is formed flat, thereby further suppressing the occurrence of large voids when sealing the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B with resin.

[0074] Furthermore, in this semiconductor device manufacturing method, a portion of the first fillet 6A is cut so that the surface 62Aa of the first substrate connection portion 62A opposite the substrate 2 is formed flat, thereby further suppressing the occurrence of large voids when sealing the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B with resin.

[0075] In addition, in this semiconductor device manufacturing method, the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B are sealed with resin, thereby protecting the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B.

[0076] The present disclosure is not limited to the above-described embodiments, and modifications can be made as appropriate without departing from the spirit of the present disclosure.

[0077] For example, in the above embodiment, the semiconductor device has been described as having a sealing portion, but it may not have a sealing portion, as in the semiconductor device 1A of the modified example shown in Fig. 7. In this case, for example, the sealing step of the above embodiment can be omitted in the method of manufacturing the semiconductor device.

[0078] In the above embodiment, the fillet of the semiconductor device has been described as having a chip connection portion extending in the stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion toward the substrate, but the fillet may have any shape as long as it is connected to the main surface of the substrate and the end surface of the stacked chip. In this case, for example, the cutting step can be omitted in the manufacturing method of the semiconductor device of the above embodiment.

[0079] In the above embodiment, the semiconductor device is described as having the substrate connection portion of the first fillet and the substrate connection portion of the second fillet connected to each other, but the first fillet and the second fillet may be separated from each other and not connected to each other. Such a semiconductor device can be manufactured, for example, by heating and pressurizing the second semiconductor chip 32A, the third semiconductor chip 33A, the second semiconductor chip 32B, and the third semiconductor chip 33B in the stacking step of the above embodiment so that the fillets 51Aa and 51Ba do not contact each other.

[0080] In addition, in the above embodiment, the semiconductor device is described as having two stacked chips, a first stacked chip and a second stacked chip, stacked on the main surface of the substrate, but the number of stacked chips stacked on the main surface of the substrate is not particularly limited and may be one, or three or more.

[0081] The gist of the present disclosure is as follows: [1] to

[15] . [1] A semiconductor device comprising: a substrate; a stacked chip consisting of a plurality of semiconductor chips stacked on a main surface of the substrate; a fixing layer disposed between the main surface of the substrate and the stacked chips and between the plurality of semiconductor chips in the stacked chip; and a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chips and between the plurality of semiconductor chips in the stacked chip, the fillet being connected to the main surface of the substrate and an end face of the stacked chip. [2] The semiconductor device according to [1], wherein the fillet has a chip connection portion extending in a stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion in a substrate direction that is a direction along the main surface of the substrate. [3] The semiconductor device according to [2], wherein a surface of the chip connection portion opposite to the stacked chip is formed flat. [4] The semiconductor device according to [2] or [3], wherein a surface of the substrate connection portion opposite to the main surface of the substrate is formed flat. [5] The semiconductor device according to any one of [2] to [4], wherein a maximum thickness of the chip connection portion in the substrate direction is 5 μm or more and 300 μm or less. [6] The semiconductor device according to any one of [2] to [5], wherein a maximum thickness of the substrate connection portion in the stacking direction is 5 μm or more and 100 μm or less. [7] The semiconductor device according to any one of [1] to [6], comprising: a second stacked chip consisting of a plurality of semiconductor chips stacked on the main surface of the substrate; a second fixing layer arranged between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip; and a second fillet extending from the second fixing layer so as to protrude between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip, the second fillet being connected to the fillet. [8] The semiconductor device described in [7], wherein the second fillet has a second chip connection portion extending in the stacking direction of the second stacked chip and a second substrate connection portion extending from the second chip connection portion in a substrate direction that is a direction along the main surface of the substrate, and the second substrate connection portion of the second fillet is connected to the substrate connection portion of the fillet.[9] The semiconductor device according to any one of [1] to [8], further comprising a sealing portion that seals the main surface of the substrate and the stacked chips.

[10] A method for manufacturing a semiconductor device, comprising a lamination step of placing a film-like underfill material between the main surface of the substrate and a plurality of semiconductor chips and between the plurality of semiconductor chips, and stacking the plurality of semiconductor chips on the main surface of the substrate, wherein in the lamination step, the underfill material is caused to protrude from between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips, and fillets of the underfill material protruding from between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips are connected to the main surface of the substrate and an end face of the stacked chip made up of the plurality of semiconductor chips.

[11] The method for manufacturing a semiconductor device according to

[10] , further comprising a cutting step of cutting a portion of the fillet.

[12] The method for manufacturing a semiconductor device according to

[11] , wherein, in the cutting step, a portion of the fillet is cut so that the fillet is formed in a chip connection portion extending in the stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion in a substrate direction, which is a direction along the main surface of the substrate.

[13] The method for manufacturing a semiconductor device according to

[12] , wherein, in the cutting step, a portion of the fillet is cut so that a surface of the chip connection portion opposite to the stacked chips is formed flat.

[14] The method for manufacturing a semiconductor device according to

[12] or

[13] , wherein, in the cutting step, a portion of the fillet is cut so that a surface of the substrate connection portion opposite to the substrate is formed flat.

[15] The method for manufacturing a semiconductor device according to any of

[10] to

[14] , further comprising an encapsulation step of encapsulating the main surface of the substrate and the stacked chips with resin.

[0082] 1...semiconductor device, 2...substrate, 2a...main surface, 2b...electrode, 2c...rear surface, 3A...first stacked chip, 3Aa...end surface, 3B...second stacked chip, 3Ba...end surface, 4A...bump, 4B...bump, 5A...first fixing layer, 5B...second fixing layer, 6A...first fillet, 6B...second fillet, 7...sealing portion, 30A...semiconductor chip, 30Aa...first main surface, 30Ab...second main surface, 30Ac...electrode, 30Ad...electrode, 30B...semiconductor chip, 30Ba...first main surface, 30Bb...second main surface, 30Bc...electrode, 30Bd...electrode, 3 1A...first semiconductor chip, 31B...first semiconductor chip, 32A...second semiconductor chip, 32B...second semiconductor chip, 33A...third semiconductor chip, 33B...third semiconductor chip, 51A...underfill material, 51Aa...fillet, 51B...underfill material, 51Ba...fillet, 61A...first chip connection portion, 61Aa...surface, 61B...second chip connection portion, 61Ba...surface, 62A...first substrate connection portion, 62Aa...surface, 62B...second substrate connection portion, 62Ba...surface, D1...stacking direction, D2...substrate direction.

Claims

1. A semiconductor device comprising: a substrate; a stacked chip consisting of a plurality of semiconductor chips stacked on a main surface of the substrate; a fixing layer disposed between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip; and a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip, the fillet being connected to the main surface of the substrate and an end face of the stacked chip.

2. The semiconductor device according to claim 1, wherein the fillet has a chip connection portion extending in the stacking direction of the stacked chips, and a substrate connection portion extending from the chip connection portion in a substrate direction that is a direction along the main surface of the substrate.

3. The semiconductor device according to claim 2, wherein a surface of said chip connection portion opposite to said stacked chip is formed in a flat shape.

4. The semiconductor device according to claim 2 or 3, wherein a surface of said substrate connecting portion opposite said main surface of said substrate is formed in a flat shape.

5. The semiconductor device according to any one of claims 2 to 4, wherein the maximum thickness of said chip connection portion in the substrate direction is 5 μm or more and 300 μm or less.

6. The semiconductor device according to claim 2, wherein the maximum thickness of said substrate connection portion in said stacking direction is not less than 5 μm and not more than 100 μm.

7. A semiconductor device as described in any one of claims 1 to 6, comprising: a second stacked chip consisting of a plurality of semiconductor chips stacked on the main surface of the substrate; a second fixing layer arranged between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip; and a second fillet extending from the second fixing layer so as to protrude between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip, the second fillet being connected to the fillet.

8. The semiconductor device described in claim 7, wherein the second fillet has a second chip connection portion extending in the stacking direction of the second stacked chip and a second substrate connection portion extending from the second chip connection portion in a substrate direction that is a direction along the main surface of the substrate, and the second substrate connection portion of the second fillet is connected to the substrate connection portion of the fillet.

9. The semiconductor device according to claim 1, further comprising a sealing portion that seals the main surface of the substrate and the stacked chip.

10. A method for manufacturing a semiconductor device, comprising a lamination process of placing a film-like underfill material between a main surface of a substrate and a plurality of semiconductor chips and between the plurality of semiconductor chips, and laminating the plurality of semiconductor chips on the main surface of the substrate, wherein in the lamination process, the underfill material is caused to protrude from between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips, and fillets of the underfill material protruding from between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips are connected to the main surface of the substrate and an end face of a laminated chip consisting of the plurality of semiconductor chips.

11. The method for manufacturing a semiconductor device according to claim 10, further comprising a cutting step of cutting a part of the fillet.

12. The method for manufacturing a semiconductor device described in claim 11, wherein in the cutting step, a portion of the fillet is cut so that the fillet is formed into a chip connection portion extending in the stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion in a substrate direction that is a direction along the main surface of the substrate.

13. The method for manufacturing a semiconductor device according to claim 12, wherein in the cutting step, a part of the fillet is cut so that a surface of the chip connection portion opposite the stacked chip is formed flat.

14. The method for manufacturing a semiconductor device according to claim 12 or 13, wherein in the cutting step, a part of the fillet is cut so that a surface of the substrate connecting portion opposite the substrate is formed flat.

15. The method for manufacturing a semiconductor device according to claim 10, further comprising a sealing step of sealing the main surface of the substrate and the stacked chips with resin.

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