Plasma processing device

The plasma processing device addresses wafer damage from ion bombardment by using a shaping circuit and potential setting circuits for the planar electrode and mounting table to reduce radial potential differences, enhancing the reliability of plasma processing.

WO2025070099A1PCT designated stage expired Publication Date: 2025-04-03TOKYO ELECTRON LTD
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Patent Information

Application Number
PCT/JP2024/032705
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-25
Filing Date
2024-09-12
Publication Date
2025-04-03

AI Technical Summary

Technical Problem

In plasma processing devices, suppressing ion bombardment on wafers can lead to wafer damage due to radial potential differences caused by current flow around insulating films.

Method used

The plasma processing device includes a shaping circuit that cuts the positive voltage component of the high-frequency voltage, a planar electrode with a potential setting circuit, and a mounting table with a potential setting circuit, which together reduce radial potential differences on the wafer surface.

Benefits of technology

This configuration effectively reduces wafer damage by eliminating radial potential differences, thereby minimizing charge-up damage during plasma processing.

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Abstract

Disclosed is this plasma processing device, wherein a shower head is configured so as to be electrically connected to a first high-frequency power source and so that voltage is applied from the first high-frequency power source, and the shower head has an upper electrode function. A shaping circuit is configured to supply, to the shower head, a shaped high-frequency voltage generated by cutting a positive voltage component of the high-frequency voltage supplied from the first high-frequency power source. A mounting table is configured so as to be provided below the shower head and so that a wafer is mounted thereon, and the mounting table has a function of a lower electrode. A planar electrode is a conductor that is provided in a processing space between the shower head and the mounting table, that extends along the surface of the mounting table, and that is configured by combining a plurality of conduction wires in a planar shape. A first potential setting circuit is configured to set a potential of the planar electrode. A second potential setting circuit is configured to set a potential of the mounting table.
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Description

Plasma processing equipment

[0001] An exemplary embodiment of the present disclosure relates to a plasma processing apparatus.

[0002] In the manufacture of electronic devices such as semiconductor devices, for example, plasma processing apparatuses are used. In the plasma processing apparatus, wafers are processed by irradiating the wafers with ions in plasma. Patent Document 1 discloses a technique for suppressing ion bombardment of wafers.

[0003] Japanese Patent Application Laid-Open No. 2022-018062

[0004] The present disclosure provides a technique for reducing wafer damage that can occur when the bombardment of the wafer by positive ions is suppressed.

[0005] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a processing vessel, a first high-frequency power supply, a showerhead, a shaping circuit, a mounting table, a planar electrode, a first potential setting circuit, and a second potential setting circuit. The showerhead is electrically connected to the first high-frequency power supply and configured to receive a voltage from the first high-frequency power supply, and functions as an upper electrode. The shaping circuit is configured to supply a shaped high-frequency voltage to the showerhead by cutting a positive voltage component of the high-frequency voltage supplied from the first high-frequency power supply. The mounting table is provided below the showerhead, configured to support a wafer thereon, and functions as a lower electrode. The planar electrode is provided in a processing space between the showerhead and the mounting table, extends along the surface of the mounting table, and is configured by combining multiple conductors in a planar manner. The first potential setting circuit is configured to set the potential of the planar electrode. The second potential setting circuit is configured to set the potential of the mounting table.

[0006] According to one exemplary embodiment, damage to the wafer that may occur when the bombardment of the wafer by positive ions is suppressed may be reduced.

[0007] FIG. 1 is a diagram showing a plasma processing apparatus according to an exemplary embodiment. FIG. 2 is a diagram showing the configuration of a potential setting circuit according to an example of setting the potential of the mounting table shown in FIG. 1. FIG. 3 is a diagram showing the configuration of a potential setting circuit according to another example of setting the potential of the mounting table shown in FIG. 1. FIG. 4 is a diagram showing the configuration of a potential setting circuit according to another example of setting the potential of the mounting table shown in FIG. 1. FIG. 5 is a diagram showing the configuration of a potential setting circuit according to an example of setting the potential of a planar electrode shown in FIG. 1. FIG. 6 is a diagram showing the configuration of a potential setting circuit according to another example of setting the potential of the planar electrode shown in FIG. 1. FIG. 7 is an enlarged view illustrating a portion of the configuration of the planar electrode shown in FIG. 1.

[0008] Various exemplary embodiments are described below.

[0009] In plasma processing, one possible approach to suppressing wafer bombardment by positive ions is to cut the positive voltage component of the high-frequency voltage used to generate the plasma. In this case, a DC pulse current may flow through the plasma from the conductive wafer stage toward the upper electrode. However, if a wafer with an insulating film is placed on the stage, the wafer does not conduct DC current, so the current flows radially from the wafer's outer periphery toward its center, avoiding the wafer, and then flows through the plasma toward the upper electrode. This creates a potential difference radially around the wafer in the plasma, which is then transferred to the wafer surface, creating a potential difference radially around the wafer on the wafer surface. This radial potential difference can cause damage (charge-up damage) to the wafer surface. A plasma processing apparatus according to one exemplary embodiment provides a technology that can reduce wafer damage that can occur when suppressing wafer bombardment by positive ions.

[0010] That is, in one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a processing vessel, a first high-frequency power supply, a showerhead, a shaping circuit, a mounting table, a planar electrode, a first potential setting circuit, and a second potential setting circuit. The showerhead is electrically connected to the first high-frequency power supply, configured to receive a voltage from the first high-frequency power supply, and functions as an upper electrode. The shaping circuit is configured to cut a positive voltage component of the high-frequency voltage supplied from the first high-frequency power supply and generate a shaped high-frequency voltage, which is then supplied to the showerhead. The mounting table is provided below the showerhead, configured to support a wafer thereon, and functions as a lower electrode. The planar electrode is provided in a processing space between the showerhead and the mounting table, extends along the surface of the mounting table, and is configured by combining multiple conductors in a planar manner. The first potential setting circuit is configured to set the potential of the planar electrode. The second potential setting circuit is configured to set the potential of the mounting table.

[0011] The shaping circuit of the above-described plasma processing apparatus applies a high-frequency voltage with the positive voltage component removed, i.e., a shaped high-frequency voltage, to the showerhead, which is the upper electrode, thereby suppressing the impact of positive ions on the wafer. In this plasma processing apparatus, a planar electrode to which a potential is applied is provided in the processing space between the showerhead and the mounting table. The planar electrode is a conductor formed by combining multiple conductors in a planar configuration, and has multiple openings connecting the upper and lower sides. Therefore, even if an insulating film is formed on the wafer, current does not flow along the diameter of the wafer, but can flow from the planar electrode located above the wafer to the showerhead located above the wafer. This prevents a radial potential difference from occurring on the wafer surface, thereby reducing wafer damage that could occur when suppressing the impact of positive ions on the wafer.

[0012] Various exemplary embodiments will be described in detail below with reference to the drawings, in which the same or equivalent parts are designated by the same reference numerals.

[0013] 1 is a diagram schematically illustrating a plasma processing apparatus according to an exemplary embodiment. The plasma processing apparatus 100 shown in FIG. 1 performs plasma processing on a wafer W. The wafer W has an insulating layer formed on its surface or the like.

[0014] The plasma processing apparatus 100 includes a processing chamber 1, a mounting table 2, an insulating member 9, a shower head 10, a main body 11, a shower plate 12, gas discharge holes 13, gas introduction holes 14, a gas supply unit 20, an exhaust port 41, an exhaust pipe 42, and an exhaust unit 43. The plasma processing apparatus 100 further includes a high-frequency power supply 30, a matching box 32, a power supply line 33, a shaping circuit 34, a control unit 50, and potential setting circuits 61 and 63.

[0015] The plasma processing apparatus 100 has a substantially cylindrical metal processing vessel 1. The processing vessel 1 is electrically grounded. The mounting table 2 is provided below the shower head 10 inside the processing vessel 1 and is configured to horizontally mount a wafer W thereon. The mounting table 2 functions as a lower electrode and is electrically connected to a potential setting circuit 61. The potential of the mounting table 2 (hereinafter simply referred to as the mounting table 2), which serves as the lower electrode, can be set by the potential setting circuit 61. The configuration of the potential setting circuit 61 is shown in each of FIGS. 2 to 4.

[0016] The planar electrode ME is a conductor formed by combining multiple conductive wires in a planar manner. The planar electrode ME may be, for example, a conductor formed by arranging multiple conductive wires in a mesh pattern, or a conductor formed by arranging multiple conductive wires without crossing each other (approximately parallel), etc. The planar electrode ME is provided in the processing space 15 between the showerhead 10 and the mounting table 2 and extends along the surface 2a of the mounting table 2. The potential of the planar electrode ME can be set by a potential setting circuit 63. The configuration of the potential setting circuit 63 is shown in each of FIGS. 5 to 7. An example of the configuration of a planar electrode ME including multiple conductive wires arranged in a mesh pattern is shown in FIG. 8.

[0017] The mounting table 2 may have a heating mechanism or a cooling mechanism (neither of which is shown) depending on the plasma processing. A plurality of lift pins (not shown) may be inserted into the mounting table 2 so as to be able to protrude and retract into the upper surface of the mounting table 2. The wafer W is transferred to and from the mounting table 2 by the lifting mechanism (not shown) lifting and lowering the plurality of lift pins.

[0018] An opening is provided in the top of the processing chamber 1, and a shower head 10 is fitted into the opening via an insulating member 9 so as to face the mounting table 2. The shower head 10 is a conductor, is electrically connected to a high-frequency power supply 30, and is configured so that a voltage is applied from the high-frequency power supply 30, and functions as an upper electrode.

[0019] A high-frequency power supply 30 is electrically connected to the shower head 10 via a matching box 32, a power supply line 33, and a shaping circuit 34. The power supply line 33 electrically connects the high-frequency power supply 30 and the shower head 10 to each other. The positive voltage component of the high-frequency voltage output from the high-frequency power supply 30 via the matching box 32 is cut by the shaping circuit 34. As a result, the shaping circuit 34 generates a shaped high-frequency voltage. The shaped high-frequency voltage is applied to the shower head 10.

[0020] The matching box 32 is provided on the power supply line 33 and is electrically connected between the high frequency power supply 30 and the shaping circuit 34. The matching box 32 is configured to match the load impedance to the internal impedance (or output impedance) of the high frequency power supply 30.

[0021] The shaping circuit 34 is provided on the power supply line 33 and electrically connected between the matching box 32 and the shower head 10. The shaping circuit 34 is configured to cut the positive voltage component of the high frequency voltage supplied from the high frequency power supply 30, thereby generating a shaped high frequency voltage, and supplying the shaped high frequency voltage to the shower head 10.

[0022] The shaping circuit 34 includes a capacitor 34a and a diode 34b. The capacitor 34a is provided between the matching box 32 and the shower head 10, and the portion of the power supply line 33 between the capacitor 34a and the shower head 10 is grounded via the diode 34b. That is, one end of the capacitor 34a is electrically connected to the high-frequency power supply 30 via the matching box 32, and the other end of the capacitor 34a is electrically connected to the shower head 10. The anode of the diode 34b is electrically connected to the capacitor 34a and the shower head 10 via the power supply line 33. The cathode of the diode 34b is grounded.

[0023] The showerhead 10 (hereinafter simply referred to as the showerhead 10), which serves as an upper electrode, may have a cylindrical overall shape. The showerhead 10 has a main body 11 having an opening at the bottom, and a shower plate 12 provided to close the opening of the main body 11. The internal space between the main body 11 and the shower plate 12 provides a gas diffusion space. The shower plate 12 has a plurality of gas ejection holes 13.

[0024] The shower head 10 is provided with a gas inlet 14 , and a processing gas for plasma processing supplied from a gas supply unit 20 is introduced into the shower head 10 through the gas inlet 14 .

[0025] The gas supply unit 20 is configured to supply a processing gas into the shower head 10. The processing gas introduced into the shower head 10 can be supplied to the processing space 15 through the gas discharge holes 13.

[0026] The gas supply unit 20 can supply multiple gases necessary for plasma processing, such as a processing gas, a plasma generating gas, and a purge gas. An appropriate processing gas is selected depending on the plasma processing to be performed. For example, the processing gas can include a gas used in film formation to provide a film raw material to the wafer W. The gas supply unit 20 has multiple gas supply sources and gas supply pipes (neither of which are shown), and the gas supply pipes are provided with valves and flow rate controllers such as mass flow controllers (neither of which are shown).

[0027] An exhaust port 41 is provided in the bottom wall of the processing vessel 1, and an exhaust device 43 is connected to the exhaust port 41 via an exhaust pipe 42. The exhaust device 43 has an automatic pressure control valve and a vacuum pump (both not shown). The exhaust device 43 evacuates the processing vessel 1 and can maintain the interior of the processing vessel 1 at a preset vacuum level.

[0028] A loading / unloading port (not shown) is provided on the sidewall of the processing vessel 1 for loading / unloading the wafer W into / from the processing vessel 1. The loading / unloading port is configured to be opened and closed by a gate valve (not shown).

[0029] The valves and flow rate controllers of the gas supply unit 20, as well as the high frequency power supply, are controlled by a control unit 50. The control unit 50 controls various processes performed by the plasma processing apparatus 100.

[0030] 2 to 7, the configuration of the potential setting circuit 61 and the configuration of the potential setting circuit 63 will be specifically described. Figures 2 to 4 are diagrams showing the configuration of the potential setting circuit 61 that sets the potential of the mounting table 2, and Figures 5 to 7 are diagrams showing the configuration of the potential setting circuit 63 that sets the potential of the planar electrode ME.

[0031] Example 1 A plasma processing apparatus 100 according to Example 1 includes a potential setting circuit 61 having the configuration shown in FIG. 2 and a potential setting circuit 63 having the configuration shown in FIG. 5. The potential setting circuit 61 shown in FIG. 2 is configured to ground the mounting table 2. The potential setting circuit 63 shown in FIG. 5 is configured to ground the planar electrode ME. The planar electrode ME is a mesh-like conductor that is provided in the processing space 15 and extends along the surface 2 a of the mounting table 2. The potential setting circuit 63 is configured to set the potential of the planar electrode ME to a ground potential. Therefore, in the processing space 15, a current path is not formed along the radial direction of the wafer W, but is formed along the direction PS from the planar electrode ME at the ground potential toward the shower head 10. Therefore, a radial potential difference is not formed on the surface 2 a of the wafer W, and damage to the wafer W that may be caused by this potential difference can be reduced.

[0032] Example 2 A plasma processing apparatus 100 according to Example 2 includes a potential setting circuit 61 having the configuration shown in FIG. 3 and a potential setting circuit 63 having the configuration shown in FIG. 5. The potential setting circuit 61 shown in FIG. 3 includes a capacitor 61c, a DC power supply 61e, and a pulse generator 61f. One end of the pulse generator 61f is electrically connected to the mounting table 2 via the capacitor 61c. The other end of the pulse generator 61f is electrically connected to the negative electrode of a variable DC power supply 61e, which has an adjustable DC voltage output. The positive electrode of the DC power supply 61e is grounded. The planar electrode ME is a mesh-like conductor and is provided in the processing space 15, extending along the surface 2a of the mounting table 2. The potential setting circuit 63 is configured to set the potential of the planar electrode ME to ground potential. Therefore, in the processing space 15, a current path is not formed along the radial direction of the wafer W but along the direction PS from the planar electrode ME at ground potential toward the showerhead 10. Therefore, a radial potential difference is not formed on the surface 2a of the wafer W, thereby reducing damage to the wafer W that may be caused by this potential difference. Furthermore, the potential setting circuit 61, which sets the potential of the mounting table 2, is configured so that a DC voltage supplied from a DC power supply 61e is shaped into a pulse wave by a pulse generator 61f and then this pulse wave is applied to the mounting table 2. This makes it possible for the potential setting circuit 61 to adjust the energy of ions traveling from the plasma excited by the high-frequency power supply 30 toward the mounting table 2. As such, in the second embodiment, the potential setting circuit 61 can be considered as a bias voltage application circuit.

[0033] Third Embodiment A plasma processing apparatus 100 according to the third embodiment includes a potential setting circuit 61 having the configuration shown in FIG. 4 and a potential setting circuit 63 having the configuration shown in FIG. 6. The potential setting circuit 61 shown in FIG. 4 includes a high-frequency power supply 61a and a matching unit 61b. The high-frequency power supply 61a is electrically connected to the mounting table 2 via the matching unit 61b. The potential setting circuit 63 having the configuration shown in FIG. 6 includes a filter circuit 63a. The filter circuit 63a has one end electrically connected to the planar electrode ME and is configured to prevent a voltage having the frequency of the high-frequency voltage supplied from the high-frequency power supply 61a from being conducted to ground. The other end of the filter circuit 63a is grounded. The filter circuit 63a may be, for example, an LC circuit. The planar electrode ME is a mesh-like conductor and is disposed in the processing space 15, extending along the surface 2a of the mounting table 2. As a result, a current path due to the high-frequency power applied from the high-frequency power supply 30 to the showerhead 10 is formed along a direction PS from the planar electrode ME toward the showerhead 10. Therefore, a radial potential difference is not formed on the surface 2a of the wafer W, and damage to the wafer W that may be caused by this potential difference can be reduced. Furthermore, the potential of the planar electrode ME follows the voltage change of the high-frequency voltage supplied from the high-frequency power supply 61a due to the action of the filter circuit 63a. Therefore, a current path is formed between the high-frequency power supply 61a and the showerhead 10 without passing through the planar electrode ME. This allows the high-frequency power supply 61a to adjust the energy of ions traveling from the plasma excited by the high-frequency power supply 30 toward the mounting table 2. In this way, in the third embodiment, the potential setting circuit can be considered as a bias voltage application circuit.

[0034] Example 4 A plasma processing apparatus 100 according to Example 4 includes a potential setting circuit 61 having the configuration shown in FIG. 4 and a potential setting circuit 63 having the configuration shown in FIG. 7. The potential setting circuit 63 shown in FIG. 7 includes a diode 63b. The cathode of the diode 63b is electrically connected to the planar electrode ME. The anode of the diode 63b is grounded. The planar electrode ME is a mesh-like conductor provided in the processing space 15 and extends along the surface 2a of the mounting table 2. The potential of the planar electrode ME follows the voltage change of the high-frequency voltage supplied from the high-frequency power supply 61a. Therefore, in the processing space 15, a current path is not formed along the radial direction of the wafer W, but along a direction PS from the planar electrode ME toward the showerhead 10, where the potential follows the voltage change of the high-frequency voltage supplied from the high-frequency power supply 61a. Therefore, a radial potential difference is not formed on the surface 2a of the wafer W, thereby reducing damage to the wafer W that may be caused by this potential difference.

[0035] An example of the configuration of the planar electrode ME used in the above-described Examples 1 to 4 is shown in Fig. 8. Fig. 8 is an enlarged view illustrating a part of the configuration of the planar electrode ME including a plurality of conducting wires arranged in a mesh pattern.

[0036] The wire diameter LW of the conductor ME1 of the planar electrode ME may need to be thick enough to allow current to flow through it. Furthermore, it is preferable that the wire diameter LW is sufficiently smaller than the distance between the planar electrode ME and the wafer W placed on the mounting table 2. In such a case, the wire diameter LW of the conductor ME1 of the planar electrode ME may be, for example, in the range of 0.3 mm to 10 mm.

[0037] The distance between the planar electrode ME and the wafer W placed on the mounting table 2 is preferably sufficiently larger than the wire diameter LW. In this case, the planar electrode ME can be disposed, for example, within a range of 1 mm to 200 mm from the wafer W placed on the mounting table 2.

[0038] The opening D of the opening ME2 of the planar electrode ME is preferably sufficiently wider than the thickness of the sheath region formed between the wafer W and the plasma bulk to allow positive ions to pass through. Furthermore, the opening D of the opening ME2 is preferably sufficiently narrower than the diameter of the wafer W to prevent the formation of a potential distribution on the wafer W. In such a case, the opening D of the opening ME2 may be, for example, in the range of 1 mm to 60 mm.

[0039] In the case of a planar electrode ME configured by arranging multiple conductors along a common plane without crossing each other (approximately parallel), the diameter of the conductors may be, for example, in the range of 0.1 mm to 10 mm, and the spacing between adjacent conductors may be, for example, in the range of 1 mm to 60 mm. In this case, the planar electrode ME may be located within a range of, for example, 1 mm to 200 mm from the wafer W placed on the mounting table 2.

[0040] Although various exemplary embodiments have been described above, the present invention is not limited to the above-described exemplary embodiments, and various additions, omissions, substitutions, and modifications may be made. Furthermore, elements in different embodiments may be combined to form other embodiments.

[0041] Various exemplary embodiments included in the present disclosure are now described in [E1] to [E13] below.

[0042] [E1] A plasma processing apparatus comprising: a processing vessel; a first radio frequency power supply; a shower head electrically connected to the first radio frequency power supply and configured to receive a voltage from the first radio frequency power supply and functioning as an upper electrode; a shaping circuit configured to supply to the shower head a shaped radio frequency voltage generated by cutting a positive voltage component of the radio frequency voltage supplied from the first radio frequency power supply; a mounting table provided below the shower head and configured to have a function as a lower electrode and on which a wafer is placed; a planar electrode provided in a space between the showerhead and the mounting table, extending along a surface of the mounting table and formed by combining a plurality of conductors in a planar manner; a first potential setting circuit configured to set a potential of the planar electrode; and a second potential setting circuit configured to set a potential of the mounting table.

[0043] [E2] The plasma processing apparatus according to [E1] above, wherein the shaping circuit includes a first capacitor and a first diode, one end of the first capacitor is electrically connected to the high frequency power supply, the other end of the first capacitor is electrically connected to the shower head, an anode of the first diode is electrically connected to the first capacitor and the shower head, and a cathode of the first diode is grounded.

[0044] [E3] The plasma processing apparatus according to [E1] or [E2] above, wherein the first potential setting circuit is configured to ground the planar electrode.

[0045] [E4] The plasma processing apparatus according to [E3] above, wherein the second potential setting circuit is configured to ground the mounting table.

[0046] [E5] The plasma processing apparatus according to [E3] above, wherein the second potential setting circuit includes a DC power supply, a pulse generator, and a capacitor, and the pulse generator shapes a DC voltage supplied from the DC power supply into a pulse wave, and then applies the pulse wave to the mounting table, one end of the pulse generator being electrically connected to the mounting table via the capacitor, the other end of the pulse generator being electrically connected to a negative electrode of the DC power supply, and the positive electrode of the DC power supply being grounded.

[0047] [E6] The plasma processing apparatus according to [E1] or [E2] above, wherein the second potential setting circuit includes a third high frequency power supply, the third high frequency power supply being electrically connected to the mounting table, the first potential setting circuit including a filter circuit having one end electrically connected to the planar electrode and configured to not conduct a voltage of the frequency of the high frequency voltage supplied from the third high frequency power supply, and the other end of the filter circuit being grounded.

[0048] [E7] The plasma processing apparatus according to [E1] or [E2] above, wherein the second potential setting circuit includes a third high frequency power supply, the third high frequency power supply being electrically connected to the mounting table, the first potential setting circuit includes a second diode, the cathode of the second diode being electrically connected to the planar electrode, and the anode of the second diode being grounded.

[0049] [E8] The plasma processing apparatus according to any one of [E1] to [E7] above, wherein the planar electrode is disposed within a range of 1 mm to 200 mm from the wafer placed on the stage.

[0050] [E9] The plasma processing apparatus according to any one of [E1] to [E8] above, wherein the planar electrode includes the plurality of conducting wires arranged in a mesh pattern, or the plurality of conducting wires arranged along a common plane without intersecting each other.

[0051] [E10] The plasma processing apparatus according to [E9] or [E10] above, wherein the wire diameter of each of the plurality of conducting wires arranged in a mesh pattern on the planar electrode is within a range of 0.3 mm to 10 mm.

[0052] [E11] The plasma processing apparatus according to [E9] above, wherein the mesh size of the planar electrode including the plurality of conducting wires arranged in a mesh pattern is in the range of 1 mm to 60 mm. [E12] The plasma processing apparatus according to [E9] above, wherein the wire diameter of each of the plurality of conducting wires arranged along a common surface of the planar electrode without crossing each other is in the range of 0.1 mm to 10 mm.

[0053] [E13] The plasma processing apparatus according to [E9] or [E12] above, wherein the planar electrode includes the plurality of conductive wires arranged along a common plane without crossing each other, and the spacing between adjacent conductive wires is within the range of 1 mm or more and 60 mm or less.

[0054] From the foregoing, it will be understood that various embodiments of the present disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.

[0055] 1...processing vessel, 10...shower head, 100...plasma processing apparatus, 11...main body, 12...shower plate, 13...gas discharge hole, 14...gas introduction hole, 15...processing space, 2...mounting table, 20...gas supply unit, 2a...surface, 30...high frequency power supply, 32...matching box, 33...power supply line, 34...shaping circuit, 34a...capacitor, 34b...diode, 41...exhaust port, 42...exhaust pipe, 43...exhaust device, 50...controller, 61...potential setting circuit, 61a...high frequency power supply, 61b...matching box, 61c...capacitor, 61e...DC power supply, 61f...pulse generator, 63...potential setting circuit, 63a...filter circuit, 63b...diode, 9...insulating member, ME...flat electrode, ME1...conductor, ME2...opening, PS...direction, W...wafer.

Claims

1. A plasma processing apparatus comprising: a processing vessel; a first radio frequency power supply; a showerhead electrically connected to the first radio frequency power supply and configured to receive a voltage from the first radio frequency power supply and functioning as an upper electrode; a shaping circuit configured to supply a shaped radio frequency voltage generated by cutting a positive voltage component of the radio frequency voltage supplied from the first radio frequency power supply to the showerhead; a mounting table provided below the showerhead and configured to have a wafer placed thereon and functioning as a lower electrode; a planar electrode provided in a space between the showerhead and the mounting table, extending along a surface of the mounting table and formed by combining a plurality of conductors in a planar shape; a first potential setting circuit configured to set a potential of the planar electrode; and a second potential setting circuit configured to set a potential of the mounting table.

2. The plasma processing apparatus of claim 1, wherein the shaping circuit includes a first capacitor and a first diode, one end of the first capacitor is electrically connected to the high frequency power supply, the other end of the first capacitor is electrically connected to the shower head, an anode of the first diode is electrically connected to the first capacitor and the shower head, and a cathode of the first diode is grounded.

3. The plasma processing apparatus according to claim 1, wherein the first potential setting circuit is configured to ground the planar electrode.

4. The plasma processing apparatus according to claim 3, wherein the second potential setting circuit is configured to ground the mounting table.

5. The plasma processing apparatus according to claim 3, wherein the second potential setting circuit includes a DC power supply, a pulse generator, and a capacitor, and the DC voltage supplied from the DC power supply is shaped into a pulse wave by the pulse generator, and the pulse wave is then applied to the mounting table, one end of the pulse generator is electrically connected to the mounting table via the capacitor, the other end of the pulse generator is electrically connected to the negative electrode of the DC power supply, and the positive electrode of the DC power supply is grounded.

6. The plasma processing apparatus of claim 1, wherein the second potential setting circuit includes a third high frequency power supply, the third high frequency power supply being electrically connected to the mounting table, the first potential setting circuit includes a filter circuit having one end electrically connected to the planar electrode and configured not to conduct a voltage of the frequency of the high frequency voltage supplied from the third high frequency power supply, the other end of the filter circuit being grounded.

7. The plasma processing apparatus of claim 1, wherein the second potential setting circuit includes a third high frequency power supply, the third high frequency power supply being electrically connected to the mounting table, the first potential setting circuit includes a second diode, the cathode of the second diode being electrically connected to the planar electrode, and the anode of the second diode being grounded.

8. The plasma processing apparatus according to claim 1, wherein the planar electrode is disposed within a range of 1 mm to 200 mm from the wafer placed on the stage.

9. A plasma processing apparatus according to any one of claims 1 to 7, wherein the planar electrode includes the plurality of conductors arranged in a mesh pattern, or the plurality of conductors arranged along a common plane without intersecting with each other.

10. The plasma processing apparatus according to claim 9, wherein the wire diameter of each of the plurality of conductors arranged in a mesh pattern on the planar electrode is within a range of 0.3 mm to 10 mm.

11. The plasma processing apparatus according to claim 9, wherein the mesh size of the planar electrode including the plurality of conducting wires arranged in a mesh pattern is within the range of 1 mm to 60 mm.

12. The plasma processing apparatus according to claim 9, wherein the wire diameter of each of the plurality of conductors arranged along a common surface of the planar electrode without intersecting with each other is within a range of 0.1 mm to 10 mm.

13. The plasma processing apparatus according to claim 9, wherein the planar electrode includes a plurality of conductive wires arranged along a common plane without crossing each other, and the distance between adjacent conductive wires is within the range of 1 mm to 60 mm.

Citation Information

Patent Citations

  • Treating apparatus using gas plasma reaction

    JP1981076242A

  • Plasma cvd system and plasma cvd method

    JP2003203873A

  • Plasma processing apparatus

    JP2020149859A

  • Plasma processing apparatus and plasma processing method

    JP2022018062A