Semiconductor device

Abstract

Provided is a novel semiconductor device. This semiconductor device comprises a light-emitting element and a drive transistor having a gate and a back gate, and has: a first function for supplying a first potential to the back gate; a second function for supplying a video signal to the gate of the drive transistor and maintaining a second potential corresponding to the video signal at the back gate of the drive transistor; and a third function for, after execution of the second function, supplying a third potential to the gate of the drive transistor and supplying a current corresponding to the second potential to the light-emitting element.

Description

Semiconductor Devices

[0001] One embodiment of the present invention relates to a semiconductor device.

[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), and driving methods or manufacturing methods thereof.

[0003] In recent years, research and development of self-luminous display devices using light-emitting elements such as light-emitting diodes (LEDs) as pixels has been actively conducted. In particular, active matrix display devices using organic electroluminescence (EL) elements as light-emitting elements have attracted attention. Generally, the pixels of active matrix display devices are configured to include light-emitting elements and pixel circuits. The pixel circuits also include transistors (drive transistors) that control the amount of current supplied to the light-emitting elements in accordance with video signals.

[0004] The light emission brightness of a light-emitting element is determined by the magnitude of the drain current of the drive transistor. Therefore, if there is variation in the electrical characteristics (threshold voltage, etc.) of the drive transistors among the multiple pixels that make up the screen of a display device, even if the same video signal is supplied to the multiple pixels, the light emission brightness of each pixel will differ. The variation in the electrical characteristics of the drive transistors among the multiple pixels is one of the causes of a deterioration in the display quality of the display device.

[0005] In order to reduce the variation in the electrical characteristics of the drive transistors among a plurality of pixels, pixel circuits with various circuit configurations have been proposed. Patent Document 1 discloses a configuration in which a transistor having a gate and a back gate is used as the drive transistor to reduce the variation in the electrical characteristics of the drive transistor.

[0006] JP 2016-212418 A

[0007] However, in the configuration disclosed in Patent Document 1, it is necessary to hold charge in both the gate and back gate of the drive transistor, and therefore, if charge leaks from at least one of the gate or back gate of the drive transistor, there is a concern that the influence of variations in the electrical characteristics of the drive transistor may increase.

[0008] An object of one embodiment of the present invention is to provide a semiconductor device in which the influence of variation in characteristics is reduced, to provide a semiconductor device with low power consumption, to provide a semiconductor device with high reliability, or to provide a novel semiconductor device.

[0009] Note that the description of the above-mentioned problems does not preclude the existence of other problems. The other problems will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. Note that one embodiment of the present invention does not necessarily solve all of these problems (the above-mentioned problems and other problems).

[0010] (1) One embodiment of the present invention is a semiconductor device that includes a transistor having a gate and a back gate and a light-emitting element, and has a first function of supplying a first potential to the back gate, a second function of supplying a video signal to the gate and holding a second potential corresponding to the video signal at the back gate, and a third function of supplying a third potential to the gate after performing the second function and supplying a current corresponding to a difference between the third potential and the video signal to the light-emitting element.

[0011] In (1), the transistor can be a p-channel transistor, silicon can be used for a semiconductor layer in which a channel is formed, and the third potential can be a potential higher than the first potential.

[0012] (2) Another embodiment of the present invention includes first to eighth transistors, a driving transistor, a light-emitting element, and a capacitor, in which a gate of the first transistor and a gate of the seventh transistor are electrically connected to a first wiring, a gate of the second transistor and a gate of the fifth transistor are electrically connected to a second wiring, a gate of the third transistor, a gate of the sixth transistor, and a gate of the eighth transistor are electrically connected to a third wiring, a gate of the fourth transistor is electrically connected to a fourth wiring, a first terminal of the first transistor is electrically connected to a fifth wiring, a second terminal of the first transistor is electrically connected to a gate of the driving transistor, a first terminal of the second transistor, and a first terminal of the third transistor, and a first terminal of the fourth transistor is electrically connected to a sixth wiring and the capacitor. the second terminal of the fourth transistor is electrically connected to the first terminal of the driving transistor, the second terminal of the driving transistor is electrically connected to the first terminal of the fifth transistor and the first terminal of the seventh transistor, the second terminal of the seventh transistor is electrically connected to the second electrode of the capacitive element, the back gate of the driving transistor, and the first terminal of the eighth transistor, the second terminal of the fifth transistor is electrically connected to the first terminal of the sixth transistor and the anode of the light-emitting element, the cathode of the light-emitting element is electrically connected to the seventh wiring, the second terminal of the third transistor, the second terminal of the sixth transistor, and the second terminal of the eighth transistor are electrically connected to the eighth wiring, and the second terminal of the second transistor is electrically connected to the ninth wiring.

[0013] (3) Another aspect of the present invention is a light-emitting element including a first transistor, a second transistor, a fifth transistor, a seventh transistor, an eighth transistor, a driving transistor, a light-emitting element, and a capacitor, wherein a gate of the first transistor and a gate of the seventh transistor are electrically connected to a first wiring, a gate of the second transistor and a gate of the fifth transistor are electrically connected to a second wiring, a gate of the eighth transistor is electrically connected to a third wiring, a first terminal of the first transistor is electrically connected to a fifth wiring, and a second terminal of the first transistor is electrically connected to a gate of the driving transistor and a first terminal of the second transistor. The semiconductor device has a first terminal of the transistor electrically connected to a sixth wiring and a first electrode of the capacitance element, a second terminal of the driving transistor electrically connected to a first terminal of the fifth transistor and a first terminal of the seventh transistor, a second terminal of the seventh transistor electrically connected to a second electrode of the capacitance element, a back gate of the driving transistor and a first terminal of the eighth transistor, a second terminal of the fifth transistor electrically connected to an anode of a light-emitting element, a cathode of the light-emitting element electrically connected to the seventh wiring, a second terminal of the eighth transistor electrically connected to the eighth wiring, and a second terminal of the second transistor electrically connected to a ninth wiring.

[0014] In (2) or (3), the first to eighth transistors and the driving transistor may each be a p-type transistor, and the first to eighth transistors may each be an n-type transistor.

[0015] In (2) or (3), in order to enhance the second function, an oxide semiconductor can be used for the semiconductor layers in which the channels of the seventh transistor and the eighth transistor are formed. In addition, silicon can be used for the semiconductor layer in which the channel of the driving transistor is formed.

[0016] In addition, in (1), (2) or (3), an organic EL element can be used as the light-emitting element.

[0017] According to one embodiment of the present invention, a semiconductor device in which the influence of variations in characteristics is reduced, a semiconductor device with low power consumption, a semiconductor device with high reliability, or a novel semiconductor device can be provided.

[0018] Note that the description of the above effects does not preclude the existence of other effects. The other effects will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. Note that one embodiment of the present invention does not necessarily have all of these effects (the above effects and other effects).

[0019] 1A to 1C are diagrams illustrating an example of a circuit configuration of a semiconductor device. FIG. 2 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 3 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 4 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 5 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 6 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 7 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 8 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 9 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIGS. 10A to 10C are diagrams illustrating circuit symbols of transistors. FIG. 11 is a timing chart illustrating an example of an operation of a semiconductor device. FIG. 12 is a diagram illustrating an example of an operation of a semiconductor device. FIG. 13 is a diagram illustrating an example of an operation of a semiconductor device. FIG. 14 is a diagram illustrating an example of an operation of a semiconductor device. FIG. 15 is a diagram illustrating an example of an operation of a semiconductor device. FIG. 16 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 17 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 18 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 19 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 20 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 21 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 22 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 23 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 24 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 25 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 26 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIG. 27 is a diagram illustrating an example of a circuit configuration of a semiconductor device. FIGS. 28A1 to 28A7 are diagrams illustrating an example of a circuit configuration with indirect connection. FIGS. 28B1 to 28B6 are diagrams illustrating an example of a circuit configuration with direct connection. FIGS. 29A to 29C are diagrams illustrating the configuration of a transistor. FIGS. 30A to 30C are diagrams illustrating the configuration of a transistor. FIGS. 31A and 31B are diagrams illustrating the configuration of a transistor. FIGS. 32A to 32C are diagrams illustrating the configuration of a transistor. FIGS. 33A to 33C are diagrams illustrating the configuration of a transistor. FIGS. 34A to 34D are cross-sectional views illustrating a method for forming a metal oxide film.35A to 35D are cross-sectional views illustrating a method for forming a metal oxide film. FIG. 36 is a view illustrating an example of the planar configuration of a semiconductor device. FIG. 37 is a view illustrating an example of the planar configuration of a semiconductor device. FIG. 38 is a view illustrating an example of the planar configuration of a semiconductor device. FIG. 39 is a view illustrating an example of the cross-sectional configuration of a semiconductor device. FIGS. 40A and 40B are views illustrating an example of the cross-sectional configuration of a semiconductor device. FIG. 41A is a perspective view showing an example of the configuration of a display device. FIGS. 41B to 41F are plan views showing an example of a pixel array. FIG. 42 is a block diagram illustrating an example of the configuration of a display device. FIGS. 43A and 43B are block diagrams showing an example of the configuration of a display device. FIGS. 44A and 44B are block diagrams showing an example of the configuration of a display device. FIGS. 45A to 45C and 45E are circuit diagrams showing an example of the configuration of a semiconductor device. FIG. 45D is a timing chart showing an example of the operation of the semiconductor device. FIG. 46 is a cross-sectional view showing an example of the configuration of a display device. FIGS. 47A and 47B are cross-sectional views showing an example of the configuration of a display device. FIGS. 48A and 48B are cross-sectional views showing an example of the configuration of a display device. 49A to 49D are diagrams showing an example of an electronic device, 50A to 50F are diagrams showing an example of an electronic device, and 51A to 51G are diagrams showing an example of an electronic device.

[0020] Hereinafter, embodiments will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different ways and that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the following description of the embodiments.

[0021] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component that houses a chip in a package are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, electronic devices, etc. may themselves be semiconductor devices and may also include semiconductor devices.

[0022] In the drawings and the like relating to this specification, the size, layer thickness, or region may be exaggerated for clarity. Therefore, the size, aspect ratio, etc. are not necessarily limited. Note that the drawings are schematic illustrations of ideal examples, and are not limited to the shapes, values, etc. shown in the drawings.

[0023] In the configuration of the invention of the embodiment, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations may be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned. Furthermore, to make the drawings easier to understand, the illustration of some components may be omitted in perspective views, plan views, etc.

[0024] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion between components. Therefore, they do not limit the number of components or the order of the components. For example, a component referred to as "first" in one embodiment of this specification may be referred to as "second" in another embodiment or in the claims. For example, a component referred to as "first" in one embodiment of this specification may be omitted in another embodiment or in the claims. Even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims to avoid confusion between components. Even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Even if a term has an ordinal number in this specification, the ordinal number may be omitted in the claims.

[0025] In this specification, terms indicating position, such as "above," "below," "upward," or "belowward," may be used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the direction in which each configuration is depicted. Therefore, the terms are not limited to those used in the specification, and can be rephrased appropriately depending on the situation. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing 180 degrees.

[0026] Furthermore, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below and in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed on insulating layer A in direct contact with it, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0027] In this specification, terms such as "overlap" do not limit the state of the stacking order of components, etc. For example, the expression "electrode B overlapping insulating layer A" does not limit the state in which electrode B is formed on insulating layer A, but does not exclude the state in which electrode B is formed under insulating layer A or the state in which electrode B is formed on the right (or left) side of insulating layer A, etc.

[0028] In this specification and the like, terms such as "film" and "layer" can be interchanged depending on the situation. For example, the term "conductive layer" may be interchanged with the term "conductive film." Or, for example, the term "insulating film" may be interchanged with the term "insulating layer." Or, depending on the situation or circumstances, terms such as "film" and "layer" may be interchanged with other terms without using terms such as "film" and "layer." For example, the term "conductive layer" or "conductive film" may be interchanged with the term "conductor." Or, the term "conductor" may be interchanged with the term "conductive layer" or "conductive film." Or, for example, the term "insulating layer" or "insulating film" may be interchanged with the term "insulator." Or, the term "insulator" may be interchanged with the term "insulating layer" or "insulating film."

[0029] In this specification, terms such as "electrode," "wiring," and "terminal" do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" and "wiring" include cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes cases where multiple "electrodes," "wirings," "terminals," etc. are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal," and a "terminal" can be part of a "wiring" or "electrode." Furthermore, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" and "conductive layer" depending on the situation.

[0030] In this specification and the like, terms such as "wiring," "signal line," and "power line" may be interchangeable depending on the circumstances. For example, the term "wiring" may be changed to the term "signal line." Furthermore, the term "wiring" may be changed to the term "power line." Similarly, the reverse is also true, and terms such as "signal line" and "power line" may be changed to the term "wiring." A term such as "power line" may be changed to the term "signal line." Similarly, the reverse is also true, and terms such as "signal line" may be changed to the term "power line." Furthermore, the term "potential" applied to a wiring may be changed to the term "signal" depending on the circumstances. Similarly, the reverse is also true, and terms such as "signal" may be changed to the term "potential."

[0031] In this specification, "source" refers to a source region, a source electrode, or a source wiring. A source region refers to a region of a semiconductor layer whose resistivity is equal to or lower than a certain value. A source electrode refers to a conductive layer including a portion connected to a source region. A source wiring refers to a conductive layer for electrically connecting the source electrode of at least one transistor to another electrode or another wiring.

[0032] In this specification, "drain" refers to a drain region, a drain electrode, or a drain wiring. A drain region refers to a region of a semiconductor layer whose resistivity is equal to or less than a certain value. A drain electrode refers to a conductive layer including a portion connected to the drain region. A drain wiring refers to a conductive layer for electrically connecting a drain electrode of a transistor to another electrode or another wiring.

[0033] In this specification, the term "gate" refers to a gate electrode or a gate wiring. The gate electrode refers to an electrode that overlaps with a semiconductor layer of a transistor and has a function of controlling the resistance between the source and drain of the transistor depending on a supplied voltage. The gate wiring refers to a conductive layer that electrically connects the gate electrode of a transistor to another electrode or another wiring.

[0034] In this specification, one of the source or the drain of a transistor may be referred to as a "first terminal of the transistor", and the other of the source or the drain of the transistor may be referred to as a "second terminal of the transistor".

[0035] In this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it also includes cases where the angle is -5° or more and 5° or less. Furthermore, "substantially parallel" or "roughly parallel" refers to a state in which two straight lines are arranged at an angle of -15° or more and 15° or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is 85° or more and 95° or less. Furthermore, "substantially perpendicular" or "approximately perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0036] Furthermore, voltage often refers to the potential difference between a certain potential and a reference potential (for example, ground potential or source potential). Therefore, voltage and potential can often be interchanged. In this specification and elsewhere, unless otherwise specified, voltage and potential can be interchanged.

[0037] In this specification and the like, a high power supply potential VDD (hereinafter also simply referred to as "VDD") refers to a power supply potential that is higher than a low power supply potential VSS. A low power supply potential VSS (hereinafter also simply referred to as "VSS") refers to a power supply potential that is lower than a high power supply potential VDD. A ground potential GND (hereinafter also simply referred to as "GND") can also be used as VDD or VSS. For example, when VDD is GND, VSS is a lower potential than GND, and when VSS is GND, VDD is a higher potential than GND.

[0038] In this specification, the "on state" of a transistor means that the source and drain of the transistor are in an electrically conductive state (a state in which electricity can be passed), and the "off state" of a transistor means that the source and drain of the transistor are in an electrically non-conductive state (a state that can be considered to be electrically disconnected).

[0039] In this specification, the term "on-state current" refers to a current that flows between a source and a drain when a transistor is on, and the term "off-state current" refers to a current that flows between a source and a drain when a transistor is off.

[0040] In this specification and the like, potential H is a potential that turns on an n-channel field effect transistor (also referred to as an "n-type transistor") and turns off a p-channel field effect transistor (also referred to as a "p-type transistor"). Potential L is a potential that turns off an n-type transistor and turns on a p-type transistor. Therefore, potential H is a potential higher than potential L. Potential H may be equal to VDD. Potential L may be equal to VSS. Unless otherwise specified, the transistors described in this specification are enhancement-type (normally-off) n-type transistors.

[0041] In addition, in drawings and the like, to clearly show the potential of wirings, electrodes, etc., "H" indicating a potential H or "L" indicating a potential L may be added adjacent to the wirings, electrodes, etc. Furthermore, "H" or "L" may be enclosed in a box next to wirings, electrodes, etc. where a potential change has occurred. Furthermore, when a transistor is in an off state, an "x" symbol may be added over the transistor. Furthermore, an arrow may be added to indicate the direction of current flow.

[0042] In this specification, when referring to counting values ​​and measurement values, terms such as "identical," "same," "equal," or "uniform" (including synonyms thereof) are used, this includes an error of plus or minus 10%, unless otherwise specified.

[0043] In addition, in drawings and the like relating to this specification, arrows indicating the X direction, Y direction, and Z direction may be used. In this specification and the like, the "X direction" refers to the direction along the X axis, and the forward direction and the reverse direction may not be distinguished unless explicitly stated. The same applies to the "Y direction" and the "Z direction." The X direction, Y direction, and Z direction are directions that intersect with each other. For example, the X direction, Y direction, and Z direction are directions that are perpendicular to each other. In this specification and the like, one of the X direction, Y direction, or Z direction may be referred to as the "first direction" or "first direction." The other may be referred to as the "second direction" or "second direction." The remaining one may be referred to as the "third direction" or "third direction."

[0044] Generally, a "capacitance" has a configuration in which two electrodes face each other with an insulator (dielectric) interposed therebetween. In this specification, etc., the term "capacitance element" includes the above-mentioned "capacitance." That is, in this specification, etc., the term "capacitance element" includes a configuration in which two electrodes face each other with an insulator interposed therebetween, a configuration in which two wires face each other with an insulator interposed therebetween, or a configuration in which two wires are arranged with an insulator interposed therebetween.

[0045] In this specification, when the same symbol is used for multiple elements, and particularly when it is necessary to distinguish between them, an identifying symbol such as “A”, “b”, “_1”, "[n]”, or "[m, n]” may be added to the symbol.

[0046] In this specification, "connection" includes, for example, "electrical connection."

[0047] When "electrical connection" is defined to define the connection configuration of circuit elements as an object, "electrical connection" includes, for example, "direct connection" and "indirect connection." "A and B are directly connected" refers to a case where no circuit element (e.g., a transistor or a switch; wiring is not a circuit element) is interposed between A and B. On the other hand, "A and B are indirectly connected" refers to a case where one or more circuit elements are interposed between A and B.

[0048] Here, when "A and B are indirectly connected," it refers to the following connection relationship, for example. In other words, assuming that a circuit is operating, if there is a timing when an exchange of electrical signals or an interaction of potentials occurs between A and B at some point during the operation of the circuit, such a circuit configuration can be defined as "A and B are indirectly connected" as an entity. Note that even if there is a timing when an exchange of electrical signals or an interaction of potentials does not occur between A and B, if there is a timing when an exchange of electrical signals or an interaction of potentials occurs between A and B at some point during the operation of the circuit, it can be defined as "A and B are indirectly connected." Note that the definition "A and B are indirectly connected" defines the connection relationship of circuit elements as an entity. Therefore, for example, even if a power supply voltage is not supplied to a circuit and the circuit is not operating, if a power supply voltage is supplied to the circuit and the circuit operates, and an exchange of electrical signals or an interaction of potentials occurs between A and B at some point during the operation of the circuit, then the connection configuration of the circuit can be defined as "A and B are indirectly connected."

[0049] Specific examples of "indirect connection" are shown below. First, an example of "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors, as shown in FIGS. 28A1 and 28A2. Similarly, an example of "A and B are indirectly connected" is when A and B are connected via one or more switches. In the case of "A and B are indirectly connected," assuming that the circuit is operating, it is sufficient that one transistor between A and B is in an on state, a conductive state, or a state in which current can flow at least once. Note that in the case of "A and B are indirectly connected," it is also sufficient that one transistor between A and B is in an off state or a non-conductive state at least once. Similarly, assuming that the circuit is operating, it is sufficient that each of the multiple transistors between A and B is in an on state, a conductive state, or a state in which current can flow at least once. In other words, it is not necessary for all of the multiple transistors to be in an on state, a conductive state, or a state in which current can flow at the same time. Therefore, multiple transistors between A and B may be in an off state or a non-conducting state at the same time or at different times. As another example, as shown in FIG. 28A3 , when A and C are connected via the source and drain of transistor TrP and B and C are connected via the source and drain of transistor TrQ, it can be defined that "A and C are indirectly connected," "B and C are indirectly connected," or "A and B are indirectly connected." However, as will be described later, when a constant potential V is supplied to C from a power supply, GND, or the like, it can be said that "A and C are indirectly connected" or "B and C are indirectly connected," but it cannot be said that "A and B are indirectly connected."

[0050] While we have provided examples of cases where an indirect connection can and cannot be established, we will now present another example of a case where an indirect connection cannot be established. Even if an electrical signal exchange or potential interaction occurs between A and B at some point during the operation of the circuit, there are exceptional cases where it cannot be said that "A and B are indirectly connected." An example of such an exceptional case is when A and B are connected via an insulator. In other words, when A and B are connected via an insulator, it cannot be said that "A and B are indirectly connected." A specific example of a case where A and B are connected via an insulator is when a capacitive element is connected between A and B, as shown in FIG. 28A4. Similarly, when A and B are connected via an insulator, it can be seen that a gate insulating film of a transistor is interposed, as shown in FIG. 28A5. In this case, it cannot be said that "A (the gate of the transistor) and B (the source or drain of the transistor) are indirectly connected."

[0051] Another example of a case where it cannot be said that something is "indirectly connected" is when there is no timing when an electrical signal is exchanged or when potential interaction occurs between A and B, and it cannot be said that "A and B are indirectly connected." An example of this is when, as shown in Figures 28A6 and 28A7, multiple transistors are connected via their sources and drains in the path from A to B, and a constant potential V is supplied between the multiple transistors from a power supply, GND, or the like. In this case, it cannot be said that "A and B are indirectly connected," but it is possible to say that "A and V are indirectly connected" or "B and V are indirectly connected." In addition, in Figure 28A3, if A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, and a constant potential V is supplied to C from a power supply or GND, etc., the connection relationship will be the same as in Figures 28A6 and 28A7, so it cannot be said that "A and B are indirectly connected," but it can be said that "A and C are indirectly connected," or "B and C are indirectly connected."

[0052] Although an example of an indirect connection has been given above, an indirect connection is included in the category of an electrical connection, so if "A and B are indirectly connected," it can also be said that "A and B are electrically connected."

[0053] Next, specific examples of "direct connection" are shown. Examples of "A and B are directly connected" include cases where A and B are connected without any circuit element between them, as shown in FIGS. 28B1, 28B2, and 28B3. When A and B are connected to a power supply that supplies a constant potential V or to GND without any circuit element between them, as shown in FIGS. 28B4 and 28B5, it can be said that "A and B are directly connected," "A and V are directly connected," or "B and V are directly connected." It can also be said that "A and B are directly connected," when A (or B) is connected to a constant potential V via the source and drain of a transistor, as shown in FIG. 28B6. Because A and V or B and V are connected via the source and drain of a transistor, they cannot be said to be directly connected, but rather that "A and V are indirectly connected" or "B and V are indirectly connected."

[0054] Although an example of a direct connection has been given above, a direct connection is included in the category of an electrical connection, so when "A and B are directly connected," it can also be said that "A and B are electrically connected."

[0055] Embodiment 1 A semiconductor device 100A according to one embodiment of the present invention will be described with reference to the drawings. The semiconductor device 100A can be used for a pixel of a display device, for example.

[0056] 1A shows an example of a circuit configuration of a semiconductor device 100A. The semiconductor device 100A includes a pixel circuit 51A and a light-emitting element 61. The pixel circuit 51A includes transistors Tr1 to Tr8, a transistor TrD, and a capacitor Cs.

[0057] The gate of the transistor Tr1 is connected to the wiring GL1 and the gate of the transistor Tr7, and one of the source and the drain is connected to the wiring DL. The other of the source and the drain of the transistor Tr1 is connected to one of the source and the drain of the transistor Tr2, one of the source and the drain of the transistor Tr3, and the gate of the transistor TrD.

[0058] The gate of transistor Tr2 is connected to wiring GL2 and the gate of transistor Tr5, and the other of the source and the drain is connected to wiring VL4. The gate of transistor Tr3 is connected to wiring GL3, the gate of transistor Tr6, and the gate of transistor Tr8, and the other of the source and the drain is connected to wiring VL3. The gate of transistor Tr4 is connected to wiring GL4, and the one of the source and the drain is connected to wiring VL1 and the first electrode of capacitor Cs.

[0059] A fixed potential such as GND is supplied to the first electrode of the capacitor Cs. The connection destination of the first electrode of the capacitor Cs is not limited to the wiring VL1, and it can be connected to any of the wirings VL2 to VL4. It is also possible to provide another capacitor between the second electrode of the capacitor Cs and a wiring, electrode, or the like to which a fixed potential is supplied. The operation of the semiconductor device 100A will be described later. By providing such a capacitor, the function of retaining charge written to the node NDb, which will be described later, can be improved.

[0060] The other of the source or drain of the transistor Tr4 is connected to one of the source or drain of a transistor TrD, the other of which is connected to one of the source or drain of a transistor Tr5 and one of the source or drain of a transistor Tr7.

[0061] The other of the source or drain of transistor Tr5 is connected to one of the source or drain of transistor Tr6 and a first terminal of light-emitting element 61. The other of the source or drain of transistor Tr6 is connected to wiring VL3. The second terminal of light-emitting element 61 is connected to wiring VL2. In FIG. 1A , the first terminal of light-emitting element 61 functions as an anode, and the second terminal of light-emitting element 61 functions as a cathode.

[0062] A second electrode of the capacitor Cs is connected to the back gate of the transistor TrD, the other of the source and the drain of the transistor Tr7, and one of the source and the drain of the transistor Tr8. The other of the source and the drain of the transistor Tr8 is connected to a wiring VL3. In FIG. 1A, the transistors Tr1 to Tr8 and the transistor TrD included in the pixel circuit 51A are shown as p-channel transistors. A potential H is supplied to the wiring VL1, and a potential L is supplied to the wirings VL2 and VL3.

[0063] In FIG. 1A, the other of the source or drain of transistor Tr1, one of the source or drain of transistor Tr2, one of the source or drain of transistor Tr3, and the gate of transistor TrD are connected, and a region where these are always at the same potential during circuit operation is called node NDa.

[0064] The second electrode of the capacitance element Cs, the back gate of the transistor TrD, the other of the source or drain of the transistor Tr7, and the one of the source or drain of the transistor Tr8 are connected together, and the region where these are always at the same potential during circuit operation is called a node NDb.

[0065] The other of the source or drain of the transistor Tr5, one of the source or drain of the transistor Tr6, and the first terminal of the light emitting element 61 are connected together, and a region where these are always at the same potential is called a node NDc.

[0066] The transistor TrD has a back gate. The transistors Tr1 to Tr8 can also have back gates. Since the transistor TrD has a back gate, the transistors Tr1 to Tr8 can also have back gates without adding additional processes. FIG. 1B shows an example of a circuit symbol for a transistor having a back gate.

[0067] The gate and back gate of a transistor are arranged to sandwich a channel formation region of a semiconductor layer. Both the gate and the back gate are formed of a conductive layer or a semiconductor layer with low resistivity. The back gate can function in the same way as the gate. When the gate is used to control the on and off states of a transistor, the potential of the back gate can be set to the same potential as the gate. Furthermore, the back gate can be set to GND or any other potential.

[0068] For example, when turning on a transistor, supplying a potential that turns the transistor on to both the gate and back gate can increase the on-state current compared to supplying only one to the gate. Connecting the gate and back gate, as shown in Figure 1C, makes it possible to maintain the gate and back gate at the same potential. Furthermore, independently controlling the back gate potential without linking it to the gate allows the threshold voltage of the transistor to be adjusted.

[0069] A fixed potential such as GND may be supplied to the back gate. Since the gate and the back gate are formed of a conductive layer or the like, sandwiching the channel formation region of the semiconductor layer between the gate and the back gate makes it difficult for an electric field generated outside the transistor to act on the channel formation region (also referred to as an "electric field shielding effect"). Therefore, providing a back gate in a transistor stabilizes the operation of the transistor. Furthermore, providing a back gate in a transistor reduces variations in characteristics among multiple transistors. Providing a back gate in a transistor can improve the reliability of the transistor. Therefore, the reliability of a semiconductor device including the transistor can be improved. Note that the electric field shielding effect can be obtained even when one or both of the gate and the back gate are electrically floating (also referred to as a "floating state"), but the effect can be enhanced by supplying a potential to the gate and the back gate.

[0070] As described above, in FIG. 1A, the transistors Tr1 to Tr8 and the transistor TrD included in the pixel circuit 51A are shown as p-type transistors. It is possible to use n-type transistors for some or all of the transistors included in the pixel circuit 51A. Normally-off transistors are easier to realize with p-type transistors than with n-type transistors, and circuit design is relatively easy. Meanwhile, n-type transistors have higher field-effect mobility than p-type transistors, and therefore the operating speed of the semiconductor device 100A can be increased.

[0071] 2, the transistors Tr1 to Tr8 included in the pixel circuit 51A may be n-type, and the transistor TrD may be p-type. As shown in FIG. 3, when an n-type transistor is used as the transistor TrD, the first terminal of the light-emitting element 61 is connected to the wiring VL2, and the second terminal of the light-emitting element 61 is connected to the other of the source or the drain of the transistor Tr5 and one of the source or the drain of the transistor Tr6. In this case, a potential L is supplied to the wiring VL1, and a potential H is supplied to the wirings VL2 and VL3.

[0072] In the semiconductor device 100A, the transistor TrD functions as a driving transistor. The transistor TrD has a function of determining the amount of current flowing through the light-emitting element 61. The transistors Tr1 to Tr8 function as switches. Therefore, as shown in FIG. 4, the transistors Tr1 to Tr8 included in the semiconductor device 100A can be replaced with switches SW1 to SW8. In FIG. 4, one of the source and drain of the transistor corresponds to a first terminal of the switch, and the other of the source and drain of the transistor corresponds to a second terminal of the switch.

[0073] As shown in FIG. 5, the wiring VL3 may not be provided, and the other of the source or the drain of the transistor Tr3, the other of the source or the drain of the transistor Tr6, and the other of the source or the drain of the transistor Tr8 may be connected to the wiring VL2.

[0074] As shown in FIG. 6, it is also possible to not provide the wiring VL3, but to connect the other of the source or the drain of the transistor Tr3 to the wiring VL4, and to connect the other of the source or the drain of the transistor Tr6 and the other of the source or the drain of the transistor Tr8 to the wiring VL2.

[0075] 7, the wiring VL3 may not be provided, and the other of the source or drain of the transistor Tr3, the other of the source or drain of the transistor Tr6, and the other of the source or drain of the transistor Tr8 may be connected to the wiring VL3. Also, as shown in FIG. 8, the wiring VL4 may not be provided, and the other of the source or drain of the transistor Tr2, the other of the source or drain of the transistor Tr3, the other of the source or drain of the transistor Tr6, and the other of the source or drain of the transistor Tr8 may be connected to the wiring VL3.

[0076] As shown in FIG. 9, it is also possible to connect the other of the source or drain of the transistor Tr2, the other of the source or drain of the transistor Tr3, the other of the source or drain of the transistor Tr6, and the other of the source or drain of the transistor Tr8 to the wiring VL2 without providing the wiring VL3 and the wiring VL4.

[0077] By eliminating one or both of the wirings VL3 and VL4, the integration degree of the semiconductor device 100A can be increased. For example, the resolution and / or definition of a display device using the semiconductor device 100A as a display unit can be increased. Furthermore, by eliminating one or both of the wirings VL3 and VL4, the area occupied by a semiconductor device including the semiconductor device 100A can be reduced.

[0078] Furthermore, by omitting one or both of the wirings VL3 and VL4, the area occupied by the semiconductor device 100A can be increased, thereby increasing the degree of freedom in designing the semiconductor device 100A. Therefore, the degree of freedom in designing semiconductor devices including the semiconductor device 100A can be increased.

[0079] In addition, the pixel circuit 51A according to one embodiment of the present invention can use transistors with various structures. For example, transistors with various structures such as planar type, FIN type, top-gate type, and bottom-gate type can be used. In addition, as the transistor according to one embodiment of the present invention, a MOS transistor, a junction transistor, a bipolar transistor, or the like can be used.

[0080] When an n-channel transistor is used as a transistor in the pixel circuit 51A, an OS transistor (a transistor including an oxide semiconductor in a semiconductor layer in which a channel is formed) may be used as the transistor. Since an oxide semiconductor has a band gap of 2 eV or more, the off-state current is significantly small. Specifically, the off-state current of an OS transistor per 1 μm of channel width at room temperature is 1 pA (1×10 −１２ A) Below, 1aA (1×10 −１８ A) Below, 1zA (1×10 −２１ A) or less or 1yA (1 x 10 −２４ A) It can be as follows:

[0081] When an OS transistor is used as a transistor included in the pixel circuit 51A, charge written to each node can be retained for a long period of time. For example, in a display device including the semiconductor device 100A, when a still image that does not need to be rewritten for each frame is displayed, the image can be continuously displayed even if the operation of the peripheral driver circuit is stopped. Such a driving method of stopping the operation of the peripheral driver circuit while displaying a still image is also called "idling stop driving." By performing idling stop driving, the power consumption of the display device can be reduced.

[0082] In particular, by using OS transistors as the transistors Tr7 and Tr8, charge written to the node NDb can be held for a long period of time.

[0083] Furthermore, the off-state current of an OS transistor hardly increases even in a high-temperature environment. Specifically, the off-state current hardly increases even in an environmental temperature range of room temperature to 200° C. Furthermore, the on-state current is unlikely to decrease even in a high-temperature environment. A semiconductor device including an OS transistor has stable operation and high reliability even in a high-temperature environment.

[0084] The transistors constituting the pixel circuit 51A can be single-gate transistors having one gate between the source and drain. However, double-gate transistors can also be used. Figure 10A shows the circuit symbol for a double-gate transistor 180A.

[0085] The transistor 180A has a configuration in which a transistor M1 and a transistor M2 are connected in series. Fig. 10A shows a state in which one of the source or drain of the transistor M1 is connected to a terminal S, the other of the source or drain of the transistor M1 is connected to one of the source or drain of the transistor M2, and the other of the source or drain of the transistor M2 is connected to a terminal D. Fig. 10A also shows a state in which the gates of the transistor M1 and the transistor M2 are connected to each other and also to a terminal G.

[0086] The transistor 180A shown in FIG. 10A has a function of switching conduction or non-conduction between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor 180A, which is a double-gate transistor, has the transistor M1 and the transistor M2 connected in series and functions as one transistor. That is, in FIG. 10A , one of the source or the drain of the transistor 180A is connected to the terminal S, the other of the source or the drain is connected to the terminal D, and the gate is connected to the terminal G. Furthermore, since the double-gate transistor has the transistor M1 and the transistor M2 connected in series, it has a high withstand voltage between the terminal S and the terminal D. Therefore, it has high reliability.

[0087] The transistors constituting the pixel circuit 51A may be triple-gate transistors. Fig. 10B shows an example of a circuit symbol for a triple-gate transistor 180B.

[0088] The transistor 180B has a configuration in which a transistor M1, a transistor M2, and a transistor M3 are connected in series. Fig. 10B shows a state in which one of the source or drain of the transistor M1 is connected to a terminal S, the other of the source or drain of the transistor M1 is connected to one of the source or drain of the transistor M2, the other of the source or drain of the transistor M2 is connected to one of the source or drain of the transistor M3, and the other of the source or drain of the transistor M3 is connected to a terminal D. Fig. 10B also shows a state in which the gates of the transistors M1, M2, and M3 are connected to each other and to a terminal G.

[0089] The transistor 180B shown in FIG. 10B has a function of switching conduction or non-conduction between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the triple-gate transistor 180B has the transistors M1, M2, and M3 connected in series and functions as one transistor. That is, in FIG. 10B, one of the source or the drain of the transistor 180B is connected to the terminal S, the other of the source or the drain is connected to the terminal D, and the gate is connected to the terminal G. Furthermore, the triple-gate transistor has a higher withstand voltage between the terminal S and the terminal D than the double-gate transistor, and therefore has higher reliability.

[0090] 10C shows a state in which six transistors (transistors M1 to M6) are connected in series. The gates of the six transistors are connected to one another and are also connected to the terminal G.

[0091] The transistor 180C shown in FIG. 10C has a function of switching conduction or non-conduction between the terminal S and the terminal D by changing the potential of the terminal G. Therefore, the transistor 180C includes the transistors M1 to M6 and functions as a single transistor. That is, in FIG. 10C, one of the source or the drain of the transistor 180C is connected to the terminal S, the other of the source or the drain is connected to the terminal D, and the gate is connected to the terminal G. The withstand voltage between the terminal S and the terminal D of the transistor 180C is higher than those of the transistors 180A and 180B. Therefore, the transistor 180C has higher reliability than the transistors 180A and 180B.

[0092] Although the transistors M1 to M6 are shown as n-type transistors in FIGS. 10A to 10C, the same effect can be obtained even if the transistors M1 to M6 are p-type transistors.

[0093] A transistor having multiple gates and connected to each other, such as the transistor 180A, the transistor 180B, and the transistor 180C, may be referred to as a "multi-gate transistor" or a "multi-gate transistor."

[0094] Furthermore, a multi-gate transistor is equivalent to a transistor with a long channel length. Therefore, a multi-gate transistor has better electrical characteristics in a saturation region (also called "saturation characteristics") than a single-gate transistor. A multi-gate transistor can be used to improve the saturation characteristics of a transistor.

[0095] Specifically, by using a multi-gate transistor for the transistor TrD, it is possible to improve the saturation characteristics of the transistor TrD. The improved saturation characteristics of the transistor TrD improve the reproducibility of the light emission luminance of the light emitting element 61 in response to a video signal written to the semiconductor device 100A. This improves the display quality of a display device using the semiconductor device 100A.

[0096] Furthermore, since the transistors Tr7 and Tr8 have a function of retaining charge at the node NDb, it is preferable that the off-state current of the transistors Tr7 and Tr8 be small. Regarding the off-state current, a multi-gate transistor can have a smaller off-state current than a single-gate transistor. Therefore, it is preferable to use multi-gate transistors for the transistors Tr7 and Tr8. Note that the transistors Tr1 to Tr6 may also be multi-gate transistors.

[0097] Furthermore, the transistors Tr1 to Tr8 functioning as switches can increase their operating speed (speed of switching between the on state and the off state, signal transfer speed, etc.) by shortening the channel length L. Therefore, by making the channel length L of the transistors Tr1 to Tr8 shorter than the channel length L of the transistor TrD, the operating speed of the semiconductor device 100A and the reproducibility of the light emission luminance of the light-emitting element 61 in response to a video signal can be improved.

[0098] Furthermore, when the semiconductor device 100A is arranged in a matrix, the wiring GL1 can be shared with the wiring GL3 in the previous row. By sharing the wiring GL1 with the wiring GL3 in the previous row, the number of wirings per row can be reduced. Therefore, the integration degree of the semiconductor device 100A can be increased.

[0099] The light-emitting element 61 may be a display element such as an EL element (an EL element including organic and inorganic materials, an organic EL element, or an inorganic EL element), an LED (a white LED, a red LED, a green LED, a blue LED, or the like), a micro LED, a QLED (Quantum-dot Light Emitting Diode), or an electron-emitting element.

[0100] <Operation Example> Next, an operation example of the semiconductor device 100A shown in Fig. 1A will be described with reference to the drawings. Fig. 11 is a timing chart for describing an operation example of the semiconductor device 100A shown in Fig. 1A. Figs. 12 to 15 are circuit diagrams for describing an operation example of the semiconductor device 100A shown in Fig. 1A.

[0101] In an initial state, a potential H is supplied to the wirings GL1 and GL3, and a potential L is supplied to the wirings GL2 and GL4. The potential H is supplied to the wiring VL1, the potential L is supplied to the wirings VL2 and VL3, and the potential Vref is supplied to the wiring VL4. The wirings VL1 to VL4 function as power supply lines. The video signal Vda is supplied to the wiring DL.

[0102] In this embodiment, unless otherwise specified, the potential H is VDD, the potential L is VSS, and the potential Vref is a potential equal to or greater than the potential L and equal to or less than the potential H (for example, 0 V). When the transistor TrD is a p-type transistor, the video signal Vda is a potential equal to or greater than the potential L and equal to or less than the potential Vref. When the transistor TrD is an n-type transistor, the video signal Vda is a potential equal to or greater than the potential Vref and equal to or less than the potential H.

[0103] [Period T11] In the period T11, a potential H is supplied to the wirings GL4 and GL2 (see FIG. 12). As a result, the transistors Tr4, Tr2, and Tr5 are turned off, and the light-emitting element 61 stops emitting light.

[0104] Furthermore, a potential L is supplied to the wiring GL3. Then, the transistors Tr3, Tr6, and Tr8 are turned on, and the potential L is supplied to the nodes NDa, NDb, and NDc. In this embodiment, the transistor TrD is a p-type transistor, so when the potential of the node NDa, that is, the potential of the gate of the transistor TrD, becomes the potential L, the transistor TrD is turned on. Furthermore, when the potential of the node NDb, that is, the potential of the back gate of the transistor TrD, becomes the potential L, the threshold voltage of the transistor TrD shifts significantly in the positive direction.

[0105] In this way, the initialization of the semiconductor device 100A is completed.

[0106] Note that in the period T11, a potential L can be supplied to the wiring GL4 to turn on the transistor Tr4. By turning on the transistor Tr4 in the period T11, the path from the other of the source or the drain of the transistor Tr4 to the one of the source or the drain of the transistor Tr7 can be charged to the potential H. Therefore, the implementation time of the period T12 that follows the period T11 can be shortened.

[0107] [Period T12] In the period T12, a potential H is supplied to the wiring GL3, and a potential L is supplied to the wiring GL4 and the wiring GL1 (see FIG. 13). When the potential H is supplied to the wiring GL3, the transistors Tr3, Tr6, and Tr8 are turned off.

[0108] When the potential L is supplied to the wiring GL1, the transistors Tr1 and Tr7 are turned on. In addition, the video signal Vda is supplied to the node NDa from the wiring DL.

[0109] When the potential L is supplied to the wiring GL4, the transistor Tr4 is turned on. At the start of the period T12, the transistor TrD is on, so that current flows from the wiring VL1 to the node NDb through the channel formation regions of the transistors Tr4, TrD, and Tr7. Therefore, the potential of the node NDb increases from the potential L toward the potential H.

[0110] Here, if the potential difference between the gate and source of the transistor TrD on the node NDa side is voltage Vfg and the threshold voltage of the transistor TrD is voltage Vth, the current Id flowing through the channel formation region of the transistor TrD is expressed by equation (1).

[0111]

[0112] In formula (1), W is the channel width of the transistor, L is the channel length of the transistor, μ is the mobility of the transistor, and C ＯＸ indicates the gate capacitance of the transistor.

[0113] Furthermore, when a video signal Vda is supplied to the node NDa, a current Id flowing between the source and drain of the transistor TrD is expressed by the following equation (2).

[0114]

[0115] Here, the transistor TrD is a transistor having a back gate. If the potential of the node NDb connected to the back gate of the transistor TrD is the potential Vdb, the threshold voltage of the transistor TrD is controlled by the potential of the node NDb. Therefore, when the potential of the node NDb increases, the threshold voltage of the transistor TrD decreases. Then, when the threshold voltage of the transistor TrD reaches Vda-VDD, the transistor TrD is turned off. At this time, the current Id flowing between the source and drain of the transistor TrD is expressed by equation (3).

[0116]

[0117] Equation (3) indicates that when the threshold voltage of transistor TrD changes to Vda-VDD in response to a change in potential Vdb, transistor TrD is turned off (time T12a, see FIG. 14). That is, the threshold voltage of transistor TrD is set to a voltage corresponding to the video signal Vda-VDD. However, if the threshold voltage of transistor TrD can be brought closer to Vda-VDD, the threshold voltage of transistor TrD does not need to be set to Vda-VDD. Even in this case, the effect of variations in the threshold voltage of transistor TrD can be reduced.

[0118] Since the transistor TrD is turned off, the node NDb is brought into a floating state, and thus a charge is held at the node NDb such that the threshold voltage of the transistor TrD becomes Vda-VDD.

[0119] [Period T13] In the period T13, a potential H is supplied to the wiring GL1, and a potential L is supplied to the wiring GL2 (see FIG. 15). When the potential H is supplied to the wiring GL1, the transistors Tr1 and Tr7 are turned off. When the potential L is supplied to the wiring GL2, the transistors Tr2 and Tr5 are turned on. Furthermore, when the transistor Tr2 is turned on, the potential Vref is supplied to the node NDa.

[0120] Furthermore, when transistor Tr5 is turned on, a current flows through the light-emitting element 61, causing the light-emitting element 61 to emit light. More specifically, a current flows between the first terminal and the second terminal of the light-emitting element 61, causing the light-emitting element 61 to emit light. The magnitude of the current flowing through the light-emitting element 61 is determined by transistor TrD. More specifically, a current determined by the above formula (1) flows. In period T13, voltage Vfg is potential Vref-VDD, and Vth is Vda-VDD. Therefore, a current proportional to the square of Vref-Vda flows through the light-emitting element 61. In this way, the influence of the threshold voltage of transistor TrD can be mitigated.

[0121] The semiconductor device 100A according to one embodiment of the present invention holds charge according to the video signal Vda by floating only the back-gate side of the transistor TrD, which functions as a driving transistor. Furthermore, a fixed potential is supplied to the gate of the transistor TrD during light emission. Therefore, charge leakage according to the video signal Vda is less likely to occur than in a configuration in which both the gate and back-gate of the driving transistor are floating to hold charge. Therefore, the semiconductor device 100A has less fluctuation in the emission luminance of the light-emitting element 61 and is highly reliable. Furthermore, a display device using the semiconductor device 100A as a pixel has less luminance variation in the display region and can achieve good display quality.

[0122] Furthermore, since there is no need to worry about charge leakage from the gate side of the transistor TrD during light emission, Si transistors having a larger off-state current than OS transistors can be used for the transistors Tr1, Tr2, and Tr3. Since Si transistors have higher field-effect mobility than OS transistors, the operating speed of the semiconductor device 100A can be increased. Furthermore, since single-gate transistors can be used for the transistors Tr1, Tr2, and Tr3, the layout area can be reduced.

[0123] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes or the like.

[0124] Embodiment 2 In this embodiment, a modification of the semiconductor device 100A according to one embodiment of the present invention will be described. Note that to avoid repetition of the description, differences from the semiconductor device 100A will be mainly described.

[0125] 16 shows an example of a circuit configuration of a semiconductor device 100B, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100B has a pixel circuit 51B and a light-emitting element 61. The pixel circuit 51B has a configuration similar to that of the pixel circuit 51A, but differs in that multi-gate transistors are used for the transistors Tr7 and Tr8.

[0126] 16 shows a case where the transistor Tr7 is a double-gate transistor configured by connecting transistors Tr7a and Tr7b in series. One of the source or drain of transistor Tr7a functions as one of the source or drain of transistor Tr7. The other of the source or drain of transistor Tr7a and the source or drain of transistor Tr7b are connected to each other. The other of the source or drain of transistor Tr7b functions as the other of the source or drain of transistor Tr7. The gates of transistors Tr7a and Tr7b are connected to each other and function as the gate of transistor Tr7.

[0127] 16 shows a case where the transistor Tr8 is a double-gate transistor configured by connecting transistors Tr8a and Tr8b in series. One of the source or drain of transistor Tr8a functions as one of the source or drain of transistor Tr8. The other of the source or drain of transistor Tr8a and the source or drain of transistor Tr8b are connected to each other. The other of the source or drain of transistor Tr8b functions as the other of the source or drain of transistor Tr8. The gate of transistor Tr8a and the gate of transistor Tr8b are connected to each other and function as the gate of transistor Tr8.

[0128] By using a multi-gate transistor for the transistor Tr7, the off-state current of the transistor Tr7 can be reduced. By using a multi-gate transistor for the transistor Tr8, the off-state current of the transistor Tr8 can be reduced. By using a multi-gate transistor for at least one of the transistors Tr7 and Tr8, the charge held in the node NDb is less likely to leak. Therefore, the charge written to the node NDb can be held for a long period of time. Therefore, the reliability of the semiconductor device 100B can be improved.

[0129] 17 shows an example of a circuit configuration of a semiconductor device 100C, which is a modification of the semiconductor device 100B. The semiconductor device 100C has a pixel circuit 51C and a light-emitting element 61. The pixel circuit 51C is a modification of the pixel circuit 51B. In the pixel circuit 51C, a first terminal of a capacitance element Ca is connected to the other of the source or the drain of the transistor Tr7a and to one of the source or the drain of the transistor Tr7b.

[0130] In the pixel circuit 51C, the first terminal of the capacitance element Cb is connected to the other of the source or drain of the transistor Tr8a and one of the source or drain of the transistor Tr8b. While Fig. 17 shows an example in which the second terminal of the capacitance element Ca and the second terminal of the capacitance element Cb are connected to the wiring VL1, this is not limiting. The second terminals of the capacitance elements Ca and Cb may be connected to a fixed potential, such as GND or VSS. Alternatively, different potentials may be supplied to the second terminals.

[0131] By providing the capacitance element Ca, the transistor Tr7 becomes less susceptible to noise, and the operation of the semiconductor device 100C becomes stable. Also, by providing the capacitance element Cb, the transistor Tr8 becomes less susceptible to noise, and the operation of the semiconductor device 100C becomes stable. Therefore, the reliability of the semiconductor device 100C can be improved.

[0132] 18 shows an example of a circuit configuration of a semiconductor device 100D, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100D has a pixel circuit 51D and a light-emitting element 61. The pixel circuit 51D has a configuration in which the transistor Tr3 is removed from the pixel circuit 51A. By eliminating the transistor Tr3, the occupied area can be reduced compared to the semiconductor device 100A.

[0133] 19 shows an example of the circuit configuration of a semiconductor device 100E, which is a modified example of the semiconductor device 100D. The semiconductor device 100E includes a pixel circuit 51E and a light-emitting element 61. The pixel circuit 51E has a configuration in which the transistor Tr6 is removed from the pixel circuit 51D. By eliminating the transistor Tr6, the occupied area can be further reduced compared to the semiconductor device 100D.

[0134] 20, the other of the source and the drain of the transistor Tr8 can be connected to the wiring VL2 without providing the wiring VL3. By not providing the wiring VL3, the integration degree of the semiconductor device 100E can be increased. For example, the resolution and / or definition of a display device using the semiconductor device 100E as a display unit can be increased.

[0135] 21 shows an example of the circuit configuration of a semiconductor device 100F, which is a modified example of the semiconductor device 100E. The semiconductor device 100F has a pixel circuit 51F and a light-emitting element 61. The pixel circuit 51F has a configuration in which the transistor Tr4 is removed from the pixel circuit 51E. By eliminating the transistor Tr4, the occupied area can be further reduced compared to the semiconductor device 100E. Furthermore, by eliminating the transistor Tr4, the formation of the wiring GL4 is also unnecessary. This allows for an increased degree of integration of the semiconductor device 100F.

[0136] 22 shows an example of a circuit configuration of a semiconductor device 100G, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100G includes a pixel circuit 51G and a light-emitting element 61. The pixel circuit 51G differs from the pixel circuit 51A in that the other of the source and the drain of the transistor Tr6 is connected to the node NDa. By not connecting the other of the source and the drain of the transistor Tr6 to the wiring VL3, parasitic capacitance generated in the wiring VL3 can be reduced.

[0137] 23 shows an example of a circuit configuration of a semiconductor device 100H, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100H includes a pixel circuit 51H and a light-emitting element 61. The pixel circuit 51H differs from the pixel circuit 51A in that the other of the source and the drain of the transistor Tr6 is connected to the node NDb. By not connecting the other of the source and the drain of the transistor Tr6 to the wiring VL3, the parasitic capacitance generated in the wiring VL3 can be reduced. Furthermore, the parasitic capacitance generated between the transistor Tr6 and the node NDb is added to the node NDb, thereby improving the function of retaining charge written to the node NDb.

[0138] FIG. 24 shows an example of the circuit configuration of a semiconductor device 100I, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100I includes a pixel circuit 51I and a light-emitting element 61. The pixel circuit 51I differs from the pixel circuit 51A in that one of the source or drain of the transistor Tr3 is connected to the node NDb instead of the node NDa. By connecting one of the source or drain of the transistor Tr3 to the node NDb, the transistor Tr3 is connected in parallel with the transistor Tr8. Therefore, during the initialization performed in the period T11, the potential of the node NDb can be quickly set to the potential L. This shortens the time required for the period T11.

[0139] FIG. 25 shows an example of the circuit configuration of a semiconductor device 100J, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100J includes a pixel circuit 51J and a light-emitting element 61. The pixel circuit 51J differs from the pixel circuit 51A in that one of the source or drain of the transistor Tr3 is connected to the node NDc instead of the node NDa. By connecting one of the source or drain of the transistor Tr3 to the node NDc, the transistor Tr3 is connected in parallel with the transistor Tr6. Therefore, during the initialization performed in the period T11, the potential of the node NDc can be quickly set to the potential L. This shortens the time required for the period T11.

[0140] FIG. 26 shows an example of a circuit configuration of a semiconductor device 100K, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100K includes a pixel circuit 51K and a light-emitting element 61. The pixel circuit 51K differs from the pixel circuit 51A in that one of the source or drain of the transistor Tr8 is connected to the node NDa instead of the node NDb. By connecting one of the source or drain of the transistor Tr8 to the node NDa, the transistor Tr8 is connected in parallel with the transistor Tr3. Therefore, during the initialization performed in the period T11, the potential of the node NDa can be quickly set to the potential L. This shortens the time required for the period T11.

[0141] 27 shows an example of a circuit configuration of a semiconductor device 100L, which is a modified example of the semiconductor device 100A shown in FIG. 1A. The semiconductor device 100L includes a pixel circuit 51L and a light-emitting element 61. The pixel circuit 51L differs from the pixel circuit 51A in that one of the source or drain of the transistor Tr8 is connected to the node NDc instead of the node NDb. By connecting one of the source or drain of the transistor Tr8 to the node NDc of the light-emitting element 61, the transistor Tr8 is connected in parallel with the transistor Tr6. Therefore, during the initialization performed in the period T11, the potential of the node NDc can be quickly set to the potential L. This shortens the time required for the period T11.

[0142] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes or the like.

[0143] Embodiment 3 In this embodiment, a transistor that can be used for a semiconductor device according to one embodiment of the present invention will be described.

[0144] <Transistor Configuration Example 1> Figure 29A is a plan view of a transistor 200A that can be used for a semiconductor device of one embodiment of the present invention. Figure 29B is a cross-sectional view taken along the line A1-A2 indicated by a dashed dotted line in Figure 29A. Figure 29C is a cross-sectional view taken along the line A3-A4 indicated by a dashed dotted line in Figure 29A. Note that some elements are omitted in the plan view of Figure 29A for clarity. Some elements may also be omitted in other plan views.

[0145] The transistor 200A has an insulating layer 202 over a substrate 201 and a semiconductor layer 203 over the insulating layer 202. The transistor 200A also has an insulating layer 204 over the insulating layer 202 and the semiconductor layer 203. The transistor 200A also has a conductive layer 205 over the insulating layer 204. The semiconductor layer 203 and the conductive layer 205 have regions that overlap with each other with the insulating layer 204 interposed therebetween.

[0146] The semiconductor layer 203 has a drain region 203a, a channel formation region 203b, and a source region 203c. In the semiconductor layer 203, a region overlapping with the conductive layer 205 functions as the channel formation region 203b. Therefore, the conductive layer 205 functions as the gate electrode of the transistor 200A. The insulating layer 204 functions as a gate insulating layer of the transistor 200A.

[0147] The length of the channel formation region 203b in the X direction is the channel length L of the transistor 200A (see FIG. 29B), and the length of the channel formation region 203b in the Y direction is the channel width W of the transistor 200A (see FIG. 29C).

[0148] An insulating layer 206 is provided over the insulating layer 204 and the conductive layer 205. An opening 207a is provided in the insulating layer 204 and the insulating layer 206 in a region overlapping with a drain region 203a of the semiconductor layer 203. An opening 207b is provided in the insulating layer 204 and the insulating layer 206 in a region overlapping with a source region 203c of the semiconductor layer 203.

[0149] Furthermore, a conductive layer 208a is provided over the insulating layer 206 and the opening 207a, and a conductive layer 208b is provided over the insulating layer 206 and the opening 207b. The conductive layer 208a is connected to the drain region 203a of the semiconductor layer 203 at the bottom of the opening 207a. The conductive layer 208b is connected to the source region 203c of the semiconductor layer 203 at the bottom of the opening 207b. Thus, the conductive layer 208a functions as a drain electrode of the transistor 200A, and the conductive layer 208b functions as a source electrode of the transistor 200A.

[0150] In addition, an insulating layer 209 is provided over the insulating layer 206 and the conductive layer 208 (the conductive layer 208a and the conductive layer 208b).

[0151] 30A is a plan view of a transistor 200B that can be used for a semiconductor device of one embodiment of the present invention. The transistor 200B is a variation of the transistor 200A. To avoid repetition of description, differences between the transistor 200B and the transistor 200A will be mainly described.

[0152] Fig. 30B is a cross-sectional view taken along the dashed line A1-A2 in Fig. 30A. Fig. 30C is a cross-sectional view taken along the dashed line A3-A4 in Fig. 30A.

[0153] The transistor 200B differs from the transistor 200A in that a conductive layer 219 is provided between the substrate 201 and the insulating layer 202. The conductive layer 219 functions as a backgate electrode of the transistor M1. Therefore, the conductive layer 219 overlaps with the channel formation region 203b. The conductive layer 219 preferably extends beyond the end of the channel formation region 203b. That is, the conductive layer 219 may cover the channel formation region 203b. Covering the channel formation region 203b with the conductive layer 219 can enhance the electric field shielding effect described in the above embodiment.

[0154] 31A is a plan view of a transistor 200C that can be used in a semiconductor device according to one embodiment of the present invention. FIG. 31B is a cross-sectional view taken along the line A1-A2 indicated by a dashed dotted line in FIG. 31A.

[0155] The transistor 200C includes an insulating layer 202 over a substrate 201 and a conductive layer 255 over the insulating layer 202. The transistor 200C also includes an insulating layer 257 over the conductive layer 255, an insulating layer 258 over the insulating layer 257, and an insulating layer 259 over the insulating layer 258. Note that in this specification, the insulating layer 257, the insulating layer 258, and the insulating layer 259 may be collectively referred to as an insulating layer 256 or a spacer layer. The transistor 200C also includes a conductive layer 261 over the insulating layer 259.

[0156] In addition, an opening 262 is provided in the conductive layer 261, the insulating layer 259, the insulating layer 258, and the insulating layer 257 in a region overlapping with part of the conductive layer 255. In addition, a semiconductor layer 263 is provided to cover the opening 262.

[0157] The semiconductor layer 263 has a region overlapping with the bottom of the opening 262 and a region overlapping with the side surface of the opening 262. That is, the semiconductor layer 263 has a region in contact with the insulating layer 256 in the opening 262. The semiconductor layer 263 also has a region in contact with the conductive layer 255 and a region in contact with the conductive layer 261 in the opening 262.

[0158] An insulating layer 264 is provided over the insulating layer 259, the conductive layer 261, and the semiconductor layer 263. A conductive layer 265 is provided over the insulating layer 264. The conductive layer 265 has a region overlapping with the semiconductor layer 263. The conductive layer 265 has a region overlapping with the semiconductor layer 263 with the insulating layer 264 interposed therebetween.

[0159] The insulating layer 264 and the conductive layer 265 each have a region overlapping with the opening 262. The insulating layer 264 and the conductive layer 265 each have a region overlapping with the opening 262. In the opening 262, the semiconductor layer 263 has a region overlapping with the conductive layer 265 with the insulating layer 264 interposed therebetween and a region overlapping with a side surface of the opening 262 (a side surface of the insulating layer 256).

[0160] Furthermore, an insulating layer 266 is provided on the insulating layer 264. Note that the upper surface of the insulating layer 266 is preferably flat. Alternatively, the heights (positions in the Z direction) of the upper surfaces of the insulating layer 266 and the conductive layer 265 may be the same or approximately the same. For example, the flatness of the upper surface of the insulating layer 266 can be improved by performing chemical mechanical polishing (CMP) processing or the like. Furthermore, by performing CMP processing, the positions of the upper surfaces of the insulating layer 266 and the conductive layer 265 can be made to be the same or approximately the same. By performing CMP processing, unevenness on the sample surface can be reduced, and the coverage of the insulating layer and conductive layer to be formed subsequently can be improved.

[0161] When an oxide semiconductor is used for the semiconductor layer 263, the conductive layer 255 in contact with the semiconductor layer 263 and the conductive layer 261 in contact with the semiconductor layer 263 are preferably formed using a conductive material that makes the oxide semiconductor n-type. For example, a conductive material containing nitrogen may be used. For example, a conductive material containing titanium or tantalum and nitrogen may be used. Alternatively, another conductive material may be provided over the conductive material containing nitrogen.

[0162] When an oxide semiconductor is used for the semiconductor layer 263, it is preferable to use a material containing oxygen and in which hydrogen is reduced for the insulating layer 258. For example, a material containing silicon and oxygen may be used. Specifically, silicon oxide, silicon oxynitride, or the like may be used. Since hydrogen is an impurity element in an oxide semiconductor, contact between the semiconductor layer 263, which is an oxide semiconductor, and the insulating layer 258 in which hydrogen is reduced makes it difficult for the semiconductor layer 263 to become n-type. Furthermore, contact between the semiconductor layer 263, which is an oxide semiconductor, and the insulating layer 258 containing oxygen reduces oxygen vacancies in the semiconductor layer 263, thereby stabilizing the characteristics of the transistor and improving its reliability.

[0163] In the case where an oxide semiconductor is used for the semiconductor layer 263, the insulating layer 258 preferably contains excess oxygen. In this specification, excess oxygen refers to oxygen that is released by heating. A material that releases oxygen by heating is a material that releases oxygen in an amount of 1.0×10 converted into oxygen atoms as determined by thermal desorption spectroscopy (TDS) analysis. １８ atoms / cm ３ or more, preferably 1.0 × 10 １９ atoms / cm ３ More preferably, 2.0 × 10 １９ atoms / cm ３ or more or 3.0 x 10 ２０ atoms / cm ３ The surface temperature of the film during the TDS analysis is preferably in the range of 100°C to 700°C or 100°C to 400°C.

[0164] Furthermore, when a material containing excess oxygen is used for the insulating layer 258, a material through which oxygen is not easily transmitted may be used for the insulating layers 257 and 259. Examples of the material through which oxygen is not easily transmitted include an oxide containing one or both of aluminum and hafnium, and a nitride of silicon. By using a material through which oxygen is not easily transmitted for the insulating layers 257 and 259, the excess oxygen contained in the insulating layer 258 is not easily released into the lower or upper layer. Therefore, sufficient oxygen can be supplied to the oxide semiconductor. For example, a structure can be provided in which an insulating layer containing silicon and oxygen (the insulating layer 258) is provided between two insulating layers containing silicon and nitrogen (the insulating layer 257 and the insulating layer 259).

[0165] When an oxide semiconductor is used for the semiconductor layer 263, by using a material containing hydrogen for the insulating layers 257 and 259, hydrogen is supplied to a region of the semiconductor layer 263 in contact with the insulating layer 257 and a region of the semiconductor layer 263 in contact with the insulating layer 259, and each region of the semiconductor layer 263 becomes n-type. Therefore, the region of the semiconductor layer 263 in contact with the conductive layer 261 and the region of the semiconductor layer 263 in contact with the insulating layer 259 function as one of the source region and the drain region. The region of the semiconductor layer 263 in contact with the conductive layer 255 and the region of the semiconductor layer 263 in contact with the insulating layer 257 function as the other of the source region and the drain region.

[0166] The conductive layer 261 functions as one of the source electrode and the drain electrode of the transistor 200C. The conductive layer 255 functions as the other of the source electrode and the drain electrode of the transistor 200C. The transistor 200C is a transistor in which the source electrode and the drain electrode are arranged in the Z direction. That is, the source and the drain of the transistor 200C are arranged at different heights. In other words, the source and the drain of the transistor 200C are arranged at different positions in the Z direction. Such a transistor is also called a "vertical channel transistor," "vertical channel transistor," "vertical transistor," or "VFET (Vertical Field Effect Transistor)."

[0167] In the above configuration, in the transistor 200C, which is a VFET, the length of the side surface of the insulating layer 158 as viewed from the X direction or the Y direction is the channel length L (channel length L1) (see FIG. 31B ). Therefore, the channel length L of the transistor 200C is determined according to the thickness t1 of the insulating layer 258.

[0168] Alternatively, the insulating layers 257 and 259 may be formed using a material that does not contain hydrogen or contains very little hydrogen. For example, silicon nitride or silicon nitride oxide containing very little hydrogen may be used. In this case, the region of the semiconductor layer 263 in contact with the insulating layer 257 and the region of the semiconductor layer 263 in contact with the insulating layer 259 are not made n-type. Therefore, the region of the semiconductor layer 263 in contact with the conductive layer 261 functions as one of the source region and the drain region. The region of the semiconductor layer 263 in contact with the conductive layer 255 functions as the other of the source region and the drain region. The region of the semiconductor layer 263 in contact with the insulating layer 258 functions as a channel formation region.

[0169] In this case, the sum of the lengths of the side surfaces of the insulating layers 257, 258, and 259 as viewed from the X direction or the Y direction is the channel length L (channel length L2). Therefore, the channel length L of the transistor 200C is determined according to the total thickness t2 of the insulating layers 257, 258, and 259. In this manner, the transistor 200C has a channel formation region that extends along the side surface of the insulating layer 256.

[0170] Furthermore, because the semiconductor layer 263 is provided in the opening 262, the perimeter of the opening 262 as viewed in the Z direction is the channel width W of the transistor 200C (see FIG. 31A ). The perimeter may be determined, for example, at a position halfway through the thickness t1 or halfway through the thickness t2 of the insulating layer 258. If necessary, the perimeter of any position on the opening 262 may be used as the channel width W. For example, the perimeter of the bottom of the opening 262 may be used as the channel width W, or the perimeter of the top of the opening 262 may be used as the channel width W. Although FIG. 31A shows the outline (planar shape) of the opening 262 as viewed in the Z direction as a circle, this is not limiting. For example, the outline of the opening 262 as viewed in the Z direction may be an ellipse, a rectangle, or the like.

[0171] In the memory device of one embodiment of the present invention, the channel length L is preferably smaller than at least the channel width W. In one embodiment of the present invention, the channel length L is 0.1 to 0.99 times, preferably 0.5 to 0.8 times, the channel width W.

[0172] Furthermore, in order to improve the coverage of the semiconductor layer 263, the insulating layer 264, and the conductive layer 265 formed inside the opening 262, the taper angle θ of the side surface of the opening 262, i.e., the taper angle θ of each of the side surfaces of the insulating layer 257, the insulating layer 258, and the insulating layer 259, is preferably 45° to 90°, more preferably 50° to 75°. Note that the taper angle θ of the side surface of a layer (insulating layer, conductive layer, or semiconductor layer) refers to the angle between the bottom surface and the side surface of the layer (see FIG. 31B ).

[0173] A vertical transistor can occupy a smaller area than a transistor in which a channel formation region, a source region, and a drain region are separately provided on the XY plane (also called a "horizontal transistor"). Therefore, by using a vertical channel transistor in a semiconductor device, the area occupied by the semiconductor device can be reduced. Furthermore, by using a vertical channel transistor in a semiconductor device, high integration of the semiconductor device can be achieved.

[0174] Furthermore, in a lateral transistor, the channel length is limited by the exposure limit of photolithography. In a vertical channel transistor according to one embodiment of the present invention, the channel length can be set by the thickness of the insulating layer 256 or 258. Therefore, the channel length of the transistor can be made into an extremely fine structure that is equal to or less than the exposure limit of photolithography (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and 1 nm or more or 5 nm or more). This increases the on-state current of the transistor 200C, thereby improving frequency characteristics. By using a vertical channel transistor, a semiconductor device with high operating speed can be provided.

[0175] <Transistor Structure Example 4> Fig. 32A is a plan view of a transistor 200D that can be used for a semiconductor device of one embodiment of the present invention. Fig. 32B is a cross-sectional view taken along the line A1-A2 indicated by a dashed dotted line in Fig. 32A . Fig. 32C is a cross-sectional view taken along the line A3-A4 indicated by a dashed dotted line in Fig. 32A . Note that Fig. 32B is a cross-sectional view of the transistor 200D in the channel length direction, and Fig. 32C is a cross-sectional view of the transistor 200D in the channel width direction.

[0176] As shown in Figures 32A to 32C, the transistor 200D includes a semiconductor layer 520a arranged on the substrate 201, a semiconductor layer 520b arranged on the semiconductor layer 520a, conductive layers 542a and 542b arranged spaced apart from each other on the semiconductor layer 520b, an insulating layer 580 arranged on the conductive layers 542a and 542b and having an opening formed between the conductive layers 542a and 542b, a conductive layer 560 arranged in the opening, an insulating layer 550 arranged among the semiconductor layer 520b, the conductive layers 542a, 542b, and the insulating layer 580, and the conductive layer 560, and a semiconductor layer 520c arranged among the semiconductor layer 520b, the conductive layers 542a, 542b, the insulating layer 580, and the insulating layer 550. 32B and 32C , the top surface of the conductive layer 560 is substantially aligned with the top surfaces of the insulating layer 550, the insulating layer 554, the semiconductor layer 520c, and the insulating layer 580. Note that hereinafter, the semiconductor layers 520a, 520b, and 520c may be collectively referred to as the semiconductor layer 520. The conductive layers 542a and 542b may be collectively referred to as the conductive layer 542.

[0177] 32A to 32C , an insulating layer 554 is disposed between the insulating layer 524, the semiconductor layer 520a, the semiconductor layer 520b, the conductive layer 542a, and the conductive layer 542b and the insulating layer 580. The insulating layer 554 has regions in contact with the semiconductor layer 520c, the conductive layer 542a, the conductive layer 542b, the semiconductor layer 520a, the semiconductor layer 520b, and the insulating layer 524.

[0178] Although the transistor 200D has a three-layer structure including the semiconductor layer 520a, the semiconductor layer 520b, and the semiconductor layer 520c in the channel formation region and its vicinity, the present invention is not limited to this structure. For example, a two-layer structure including the semiconductor layer 520b and the semiconductor layer 520c or a stacked structure of four or more layers may be provided. Furthermore, each of the semiconductor layer 520a, the semiconductor layer 520b, and the semiconductor layer 520c may have a stacked structure of two or more layers.

[0179] For example, when an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer 520, and the semiconductor layer 520c has a stacked structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has a composition similar to that of the semiconductor layer 520b, and the second metal oxide has a composition similar to that of the semiconductor layer 520a.

[0180] Here, the conductive layer 560 functions as the gate electrode of the transistor, and the conductive layers 542a and 542b function as source and drain electrodes, respectively. As described above, the conductive layer 560 is formed so as to fill the opening of the insulating layer 580 and the region sandwiched between the conductive layers 542a and 542b. Here, the conductive layers 560, 542a, and 542b are arranged in a self-aligned manner with respect to the opening of the insulating layer 580. That is, in the transistor 200D, the gate electrode can be arranged between the source and drain electrodes in a self-aligned manner. Therefore, the conductive layer 560 can be formed without providing a margin for alignment, thereby reducing the area occupied by the transistor 200D. This reduces the area occupied by the semiconductor device. Furthermore, the integration degree of the semiconductor device can be increased.

[0181] 32A to 32C , the conductive layer 560 includes a conductive layer 560a provided inside the insulating layer 550 and a conductive layer 560b provided so as to be embedded inside the conductive layer 560a. Although the conductive layer 560 in the transistor 200D has a two-layer stacked structure, the present invention is not limited to this. For example, the conductive layer 560 may have a single-layer structure or a stacked structure of three or more layers.

[0182] The transistor 200D includes an insulating layer 202 disposed on the substrate 201, an insulating layer 514 disposed on the insulating layer 202, an insulating layer 516 disposed on the insulating layer 514, a conductive layer 505 disposed so as to be embedded in the insulating layer 516, an insulating layer 522 disposed on the insulating layer 516 and the conductive layer 505, and an insulating layer 524 disposed on the insulating layer 522. In addition, a semiconductor layer 520a is disposed on the insulating layer 524.

[0183] Further, insulating layers 574 and 581 functioning as interlayer films are provided over the transistor 200D. The insulating layer 574 is provided in contact with top surfaces of the conductive layer 560, the insulating layer 550, the insulating layer 554, the semiconductor layer 520c, and the insulating layer 580.

[0184] When an oxide semiconductor is used for the semiconductor layer 520, the insulating layers 522, 554, and 574 preferably have a function of suppressing diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, and the like). For example, the insulating layers 522, 554, and 574 preferably have a lower hydrogen permeability than the insulating layers 524, 550, and 580. The insulating layers 522 and 554 preferably have a function of suppressing diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, and the like). For example, the insulating layers 522 and 554 preferably have a lower oxygen permeability than the insulating layers 524, 550, and 580.

[0185] Here, the insulating layer 524, the semiconductor layer 520, and the insulating layer 550 are separated by the insulating layer 522 and the insulating layer 574. Therefore, impurities such as hydrogen and excess oxygen contained in layers above the insulating layer 574 and below the insulating layer 522 can be prevented from being mixed into the insulating layer 524, the semiconductor layer 520, and the insulating layer 550.

[0186] 32B shows an example in which a conductive layer 545 (conductive layer 545a and conductive layer 545b) connected to the transistor 200D and functioning as a plug is provided. Note that an example is shown in which an insulating layer 541 (insulating layer 541a and insulating layer 541b) is provided in contact with the side surface of the conductive layer 545 functioning as a plug. That is, the insulating layer 541 is provided in contact with the inner walls of the openings of the insulating layer 554, the insulating layer 580, the insulating layer 574, and the insulating layer 581. In addition, in FIG. 32B, a first conductive layer of the conductive layer 545 is provided in contact with the side surface of the insulating layer 541, and a second conductive layer of the conductive layer 545 is provided further inside.

[0187] Here, the height of the top surface of the conductive layer 545 and the height of the top surface of the insulating layer 581 can be approximately the same. Note that although the transistor 200D shows a structure in which the first conductive layer of the conductive layer 545 and the second conductive layer of the conductive layer 545 are stacked, the present invention is not limited to this. For example, the conductive layer 545 may be provided as a single layer or a stacked structure of three or more layers. When the structure has a stacked structure, the structures may be distinguished by assigning ordinal numbers to the order of formation.

[0188] Furthermore, the thickness of the semiconductor layer 520b in a region that does not overlap with the conductive layer 542 may be thinner than the thickness of the region that overlaps with the conductive layer 542. This is achieved by removing part of the top surface of the semiconductor layer 520b when forming the conductive layers 542a and 542b. When a conductive film that will become the conductive layer 542 is formed on the top surface of the semiconductor layer 520b, a low-resistance region may be formed near the interface with the conductive film. In this way, removing the low-resistance region located between the conductive layers 542a and 542b on the top surface of the semiconductor layer 520b can prevent a channel from being formed in the region.

[0189] Next, the detailed structure of the transistor 200D that can be used in the semiconductor device of one embodiment of the present invention will be described.

[0190] The conductive layer 505 is arranged to have a region overlapping with the conductive layer 560 with the semiconductor layer 520 interposed therebetween. By providing the conductive layer 505 so as to be embedded in the insulating layer 516, unevenness on the top surfaces of the conductive layer 505 and the insulating layer 516 can be reduced, and coverage with layers formed in later steps can be improved.

[0191] The conductive layer 505 includes a conductive layer 505a, a conductive layer 505b, and a conductive layer 505c. The conductive layer 505a is provided in contact with the bottom and sidewalls of an opening provided in the insulating layer 516. The conductive layer 505b is provided so as to fill a recess formed in the conductive layer 505a. The top surface of the conductive layer 505b is lower than the top surfaces of the conductive layer 505a and the insulating layer 516. The conductive layer 505c is provided in contact with the top surface of the conductive layer 505b and the side surface of the conductive layer 505a. The height of the top surface of the conductive layer 505c is approximately the same as the height of the top surface of the conductive layer 505a and the top surface of the insulating layer 516. In other words, the conductive layer 505b is surrounded by the conductive layers 505a and 505c.

[0192] In the case where an oxide semiconductor is used for the semiconductor layer 520, the conductive layer 505a and the conductive layer 505c can be formed of a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule (N ２ O, NO, NO ２ A conductive material having a function of suppressing the diffusion of impurities such as copper atoms, etc., or a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) is used.

[0193] By using a conductive material that has a function of reducing hydrogen diffusion for the conductive layers 505a and 505c, it is possible to prevent impurities such as hydrogen contained in the conductive layer 505b from diffusing into the semiconductor layer 520 through the insulating layer 524 or the like. Furthermore, by using a conductive material that has a function of suppressing oxygen diffusion for the conductive layers 505a and 505c, it is possible to prevent the conductive layer 505b from being oxidized and its conductivity from decreasing. Examples of conductive materials that have a function of suppressing oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductive layer 505a can be formed as a single layer or a stack of any of the above conductive materials. For example, titanium nitride may be used for the conductive layer 505a.

[0194] The conductive layer 505b may be formed using a conductive material containing tungsten, copper, or aluminum as a main component. For example, the conductive layer 505b may be formed using tungsten. When the conductive layer 560 is used as a gate electrode, the conductive layer 505 functions as a back gate electrode.

[0195] The conductive layer 505 is preferably provided to be larger than the channel formation region in the semiconductor layer 520. In particular, as shown in Fig. 32C, the conductive layer 505 preferably extends to a region outside the end portion intersecting with the channel width direction of the semiconductor layer 520. In other words, the conductive layer 505 and the conductive layer 560 preferably overlap with each other with an insulating layer interposed therebetween on the outside of the side surface of the semiconductor layer 520 in the channel width direction.

[0196] With the above structure, the channel formation region of the semiconductor layer 520 can be surrounded by the electric field of the conductive layer 560 functioning as a gate electrode and the electric field of the conductive layer 505 functioning as a back gate electrode.

[0197] The conductive layer 505 may be used as a wiring by extending it beyond the end of the semiconductor layer 520. However, the present invention is not limited to this, and a conductive layer that functions as a wiring may be provided under the conductive layer 505.

[0198] The insulating layer 514 may be formed using an insulating material that functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200D from the substrate side. Therefore, the insulating layer 514 may be formed using an insulating material that functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200D from the substrate side. ２ O, NO, NO ２ It is preferable to use an insulating material that has a function of suppressing the diffusion of impurities such as copper atoms (i.e., copper atoms are difficult to penetrate), or an insulating material that has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., oxygen is difficult to penetrate).

[0199] For example, aluminum oxide, silicon nitride, or the like is used for the insulating layer 514. This can prevent impurities such as water or hydrogen from diffusing from the substrate side of the insulating layer 514 to the transistor 200D. Alternatively, it can prevent oxygen contained in the insulating layer 524 or the like from diffusing toward the substrate side of the insulating layer 514.

[0200] The insulating layer 516, the insulating layer 580, and the insulating layer 581, which function as interlayer films, may be formed using an insulating material having a lower dielectric constant than the insulating layer 514. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance generated between wirings can be reduced. For example, the insulating layer 516, the insulating layer 580, and the insulating layer 581 may be formed using silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like, as appropriate.

[0201] When the conductive layer 560 is used as a gate electrode, the insulating layers 522 and 524 function as gate insulating layers.

[0202] Here, the insulating layer 524 in contact with the semiconductor layer 520 preferably contains excess oxygen. For example, silicon oxide, silicon oxynitride, or the like may be used as appropriate for the insulating layer 524. By providing an insulating layer containing oxygen in contact with the semiconductor layer 520, oxygen vacancies in the semiconductor layer 520 are reduced, and the reliability of the transistor 200D is improved.

[0203] 32C , the thickness of the insulating layer 524 in a region that does not overlap with the insulating layer 554 and the semiconductor layer 520b may be thinner than the thickness of the other region. The thickness of the insulating layer 524 in a region that does not overlap with the insulating layer 554 and the semiconductor layer 520b is preferably a thickness that allows sufficient diffusion of the oxygen.

[0204] As with the insulating layer 514, the insulating layer 522 is made of a material that functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 200D from the substrate side. For example, the insulating layer 522 is made of a material that has lower hydrogen permeability than the insulating layer 524. By surrounding the insulating layer 524, the semiconductor layer 520, the insulating layer 550, and the like with the insulating layer 522, the insulating layer 554, and the insulating layer 574, impurities such as water or hydrogen can be prevented from entering the transistor 200D from the outside.

[0205] Furthermore, the insulating layer 522 is preferably made of a material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, and the like) (i.e., the oxygen is less likely to permeate). For example, the insulating layer 522 is made of a material that has lower oxygen permeability than the insulating layer 524. The insulating layer 522 has a function of suppressing the diffusion of oxygen and impurities, so that oxygen diffusing from the semiconductor layer 520 toward the substrate can be reduced. Furthermore, the conductive layer 505 can be prevented from reacting with oxygen contained in the insulating layer 524 or the semiconductor layer 520.

[0206] An insulating layer containing an oxide of one or both of aluminum and hafnium, which are insulating materials, may be used as the insulating layer 522. Examples of the insulating layer containing an oxide of one or both of aluminum and hafnium include aluminum oxide, hafnium oxide, and an oxide containing aluminum and hafnium (hafnium aluminate). When the insulating layer 522 is formed using such a material, the insulating layer 522 functions as a layer that suppresses oxygen release from the semiconductor layer 520 and the intrusion of impurities such as hydrogen into the semiconductor layer 520 from the periphery of the transistor 200D.

[0207] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulating layers. Alternatively, these insulating layers may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulating layers. For example, the insulating layer 522 may have a three-layer structure in which silicon nitride, silicon oxide, and aluminum oxide are stacked in this order.

[0208] The insulating layer 522 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), or strontium titanate (SrTiO ３ ) or (Ba,Sr)TiO ３ An insulating layer containing a so-called high-k material such as BST may be used as a single layer or a laminate. As transistors become smaller and more highly integrated, problems such as leakage current may occur due to the thinning of the gate insulating layer. By using a high-k material for the insulating layer that functions as the gate insulating layer, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0209] Note that each of the insulating layer 522 and the insulating layer 524 can have a stacked structure of two or more layers. In this case, the insulating layer 522 and the insulating layer 524 are not limited to a stacked structure made of the same material, and can have a stacked structure made of different materials.

[0210] The semiconductor layer 520 includes a semiconductor layer 520a, a semiconductor layer 520b on the semiconductor layer 520a, and a semiconductor layer 520c on the semiconductor layer 520b. By providing the semiconductor layer 520a below the semiconductor layer 520b, it is possible to suppress the diffusion of impurities from structures formed below the semiconductor layer 520a to the semiconductor layer 520b. Furthermore, by providing the semiconductor layer 520c on the semiconductor layer 520b, it is possible to suppress the diffusion of impurities from structures formed above the semiconductor layer 520c to the semiconductor layer 520b.

[0211] When an oxide semiconductor is used for the semiconductor layer 520, the semiconductor layer 520 can have a stacked structure of multiple oxide layers with different atomic ratios of metal atoms. For example, when the semiconductor layer 520 includes at least indium (In) and the element M, the ratio of the number of atoms of the element M contained in the semiconductor layer 520a to the number of atoms of all elements constituting the semiconductor layer 520a is made higher than the ratio of the number of atoms of the element M contained in the semiconductor layer 520b to the number of atoms of all elements constituting the semiconductor layer 520b. Furthermore, the atomic ratio of the element M contained in the semiconductor layer 520a to In is made higher than the atomic ratio of the element M contained in the semiconductor layer 520b to In. Here, the semiconductor layer 520c can use the metal oxide used for the semiconductor layer 520a or the semiconductor layer 520b.

[0212] The energy of the conduction band minimum of the semiconductor layer 520a and the semiconductor layer 520c is preferably higher than the energy of the conduction band minimum of the semiconductor layer 520b. In other words, the electron affinity of the semiconductor layer 520a and the semiconductor layer 520c is preferably lower than the electron affinity of the semiconductor layer 520b. In this case, the semiconductor layer 520c may be made of a metal oxide that can be used for the semiconductor layer 520a. Specifically, the ratio of the number of atoms of the element M contained in the semiconductor layer 520c to the number of atoms of all elements constituting the semiconductor layer 520c is made higher than the ratio of the number of atoms of the element M contained in the semiconductor layer 520b to the number of atoms of all elements constituting the semiconductor layer 520b. Furthermore, the atomic ratio of the element M contained in the semiconductor layer 520c to In is made higher than the atomic ratio of the element M contained in the semiconductor layer 520b to In.

[0213] Here, the energy level of the conduction band minimum changes gradually at the junction between the semiconductor layers 520a, 520b, and 520c. In other words, the energy level of the conduction band minimum at the junction between the semiconductor layers 520a, 520b, and 520c changes continuously or can be said to be a continuous junction. To achieve this, the defect level density of the mixed layers formed at the interface between the semiconductor layers 520a and 520b and the interface between the semiconductor layers 520b and 520c is reduced.

[0214] Specifically, the semiconductor layers 520a and 520b, and the semiconductor layers 520b and 520c, may have a common element other than oxygen (as a main component), thereby forming a mixed layer with a low defect level density. For example, when the semiconductor layer 520b is an In—Ga—Zn oxide, the semiconductor layers 520a and 520c may be made of In—Ga—Zn oxide, Ga—Zn oxide, gallium oxide, or the like. The semiconductor layer 520c may also have a stacked structure. For example, a stacked structure of In—Ga—Zn oxide and Ga—Zn oxide on the In—Ga—Zn oxide, or a stacked structure of In—Ga—Zn oxide and gallium oxide on the In—Ga—Zn oxide, may be used. In other words, a stacked structure of In—Ga—Zn oxide and an oxide not containing In may be used as the semiconductor layer 520c.

[0215] Specifically, the semiconductor layer 520a may be made of a metal oxide having an atomic ratio of In:Ga:Zn=1:3:4 or thereabouts, or an atomic ratio of 1:1:0.5 or thereabouts. The semiconductor layer 520b may be made of a metal oxide having an atomic ratio of In:Ga:Zn=4:2:3 or thereabouts, or an atomic ratio of 3:1:2 or thereabouts, or an atomic ratio of 1:1:1 or thereabouts. The semiconductor layer 520c may be made of a metal oxide having an atomic ratio of In:Ga:Zn=1:3:4 or thereabouts, or an atomic ratio of In:Ga:Zn=4:2:3 or thereabouts, or an atomic ratio of Ga:Zn=2:1 or thereabouts, or an atomic ratio of Ga:Zn=2:5 or thereabouts. Specific examples of the semiconductor layer 520c having a stacked structure include a stacked structure of In:Ga:Zn=4:2:3 [atomic ratio] or the vicinity thereof and Ga:Zn=2:1 [atomic ratio] or the vicinity thereof, a stacked structure of In:Ga:Zn=4:2:3 [atomic ratio] or the vicinity thereof and Ga:Zn=2:5 [atomic ratio] or the vicinity thereof, and a stacked structure of In:Ga:Zn=4:2:3 [atomic ratio] or the vicinity thereof and gallium oxide.

[0216] In this case, the main carrier path is the semiconductor layer 520b. By configuring the semiconductor layers 520a and 520c as described above, the defect state density at the interface between the semiconductor layers 520a and 520b and at the interface between the semiconductor layers 520b and 520c can be reduced. This reduces the effect of interface scattering on carrier conduction, allowing the transistor 200D to achieve high on-state current and high frequency characteristics. Note that if the semiconductor layer 520c has a stacked structure, in addition to the effect of reducing the defect state density at the interface between the semiconductor layers 520b and 520c, it is expected that the diffusion of constituent elements of the semiconductor layer 520c toward the insulating layer 550 can be suppressed. More specifically, since the semiconductor layer 520c has a stacked structure and an oxide not containing In is located above the stacked structure, it is possible to suppress In diffusion toward the insulating layer 550. The insulating layer 550 functions as a gate insulating layer, and diffusion of In can cause poor transistor characteristics. Therefore, by forming the semiconductor layer 520c into a stacked structure, a highly reliable semiconductor device can be provided.

[0217] A conductive layer 542 (a conductive layer 542a and a conductive layer 542b) functioning as a source electrode and a drain electrode is provided over the semiconductor layer 520b. When an oxide semiconductor is used for the semiconductor layer 520b, the conductive layer 542 is preferably made of a conductive material that is not easily oxidized or that maintains its conductivity even when it absorbs oxygen.

[0218] A region of the semiconductor layer 520 in contact with the conductive layer 542 functions as a source region or a drain region of the transistor 200D. Here, the region between the conductive layer 542a and the conductive layer 542b is formed to overlap with the opening of the insulating layer 580. This allows the conductive layer 560 to be disposed in a self-aligned manner between the conductive layer 542a and the conductive layer 542b.

[0219] The insulating layer 550 functions as a gate insulating layer. The insulating layer 550 is disposed in contact with the top surface of the semiconductor layer 520c. The insulating layer 550 can be formed using silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, or silicon oxide having vacancies. For example, silicon oxide or silicon oxynitride is used as the insulating layer 550.

[0220] The insulating layer 550 is formed using an insulating material in which the concentration of impurities such as water or hydrogen is reduced, similarly to the insulating layer 524. The thickness of the insulating layer 550 is 1 nm to 20 nm.

[0221] A metal oxide may be provided between the insulating layer 550 and the conductive layer 560. The metal oxide suppresses oxygen diffusion from the insulating layer 550 to the conductive layer 560. This can suppress oxidation of the conductive layer 560 due to oxygen contained in the insulating layer 550.

[0222] Although the conductive layer 560 is shown as a two-layer structure in FIGS. 32A to 32C, it can also be a single-layer structure or a stacked structure of three or more layers.

[0223] The conductive layer 560a is formed of the above-mentioned hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N ２ O, NO, NO ２ It is preferable to use a conductive layer having a function of suppressing the diffusion of impurities such as copper atoms, etc. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0224] The conductive layer 560a has a function of suppressing oxygen diffusion, which can suppress a decrease in conductivity due to oxidation of the conductive layer 560b caused by oxygen contained in the insulating layer 550. Examples of conductive materials that can suppress oxygen diffusion include tantalum, tantalum nitride, ruthenium, and ruthenium oxide.

[0225] The conductive layer 560b may be formed using a conductive material containing tungsten, copper, or aluminum as a main component. Furthermore, since the conductive layer 560 also functions as a wiring, a conductive layer with high conductivity may be used. For example, a conductive material containing tungsten, copper, or aluminum as a main component may be used. Furthermore, the conductive layer 560b may have a layered structure, for example, a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0226] 32B and 32C , in a region of the semiconductor layer 520b that does not overlap with the conductive layer 542, in other words, in the channel formation region of the semiconductor layer 520, the side surface of the semiconductor layer 520 is arranged to be covered with the conductive layer 560. This makes it easier for the electric field of the conductive layer 560, which functions as the gate electrode of the transistor 200D, to act on the side surface of the semiconductor layer 520. This increases the on-state current of the transistor 200D and improves its frequency characteristics.

[0227] Like the insulating layer 514, the insulating layer 554 is made of an insulating material that prevents impurities such as water or hydrogen from entering the transistor 200D from the insulating layer 580 side. For example, the insulating layer 554 is made of an insulating material that has lower hydrogen permeability than the insulating layer 524. Furthermore, as shown in FIGS. 32B and 32C , the insulating layer 554 is provided in contact with the side surfaces of the semiconductor layer 520c, the top and side surfaces of the conductive layer 542a, the top and side surfaces of the conductive layer 542b, the side surfaces of the semiconductor layer 520a and the semiconductor layer 520b, and the top surface of the insulating layer 524. With this structure, hydrogen contained in the insulating layer 580 can be prevented from entering the semiconductor layer 520 from the top surfaces or side surfaces of the conductive layer 542a, the conductive layer 542b, the semiconductor layer 520a, the semiconductor layer 520b, and the insulating layer 524.

[0228] Furthermore, an insulating material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, and the like) (i.e., oxygen is less likely to permeate) is used for the insulating layer 554. For example, an insulating material that has lower oxygen permeability than the insulating layer 580 or the insulating layer 524 is used for the insulating layer 554.

[0229] When an oxide semiconductor is used for the semiconductor layer 520, the insulating layer 554 can be formed by a sputtering method. By forming the insulating layer 554 by a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the insulating layer 524 in the vicinity of a region in contact with the insulating layer 554. This allows oxygen to be supplied from this region into the semiconductor layer 520 through the insulating layer 524. The insulating layer 554 has a function of suppressing upward diffusion of oxygen, thereby preventing oxygen from diffusing from the semiconductor layer 520 to the insulating layer 580. The insulating layer 522 has a function of suppressing downward diffusion of oxygen, thereby preventing oxygen from diffusing from the semiconductor layer 520 toward the substrate. In this manner, oxygen is supplied to the channel formation region of the semiconductor layer 520. This reduces oxygen vacancies in the semiconductor layer 520, and suppresses the transistor from becoming normally on.

[0230] For example, an insulating layer containing an oxide of one or both of aluminum and hafnium can be formed as the insulating layer 554. Note that as the insulating layer containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like can be used.

[0231] The insulating layer 580 is provided over the insulating layer 524, the semiconductor layer 520, and the conductive layer 542 with the insulating layer 554 interposed therebetween. For example, the insulating layer 580 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly suitable because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are particularly suitable because they can easily form a region containing oxygen that is released by heating.

[0232] The insulating layer 574, like the insulating layer 514, is formed using an insulating material that functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the insulating layer 580 from above. The insulating layer 574 is formed using an insulating material that can be used for the insulating layer 514, the insulating layer 554, and the like, for example.

[0233] 32A to 32C show an example in which an insulating layer 581 functioning as an interlayer film is provided over the insulating layer 574. As the insulating layer 581, an insulating material in which the concentration of impurities such as water or hydrogen is reduced is used, similar to the insulating layer 524 and the like.

[0234] The conductive layers 545a and 545b are disposed in openings formed in the insulating layer 581, the insulating layer 574, the insulating layer 580, and the insulating layer 554. The conductive layers 545a and 545b are provided opposite to each other with the conductive layer 560 interposed therebetween. Note that the height of the top surfaces of the conductive layers 545a and 545b may be flush with the top surface of the insulating layer 581.

[0235] Note that an insulating layer 541a is provided in contact with the inner walls of the openings of the insulating layer 581, the insulating layer 574, the insulating layer 580, and the insulating layer 554, and a first conductive layer of the conductive layer 545a is formed in contact with the side surface of the insulating layer 541a. A conductive layer 542a is located in at least a part of the bottom of the opening, and the conductive layer 545a is in contact with the conductive layer 542a. Similarly, an insulating layer 541b is provided in contact with the inner walls of the openings of the insulating layer 581, the insulating layer 574, the insulating layer 580, and the insulating layer 554, and a first conductive layer of the conductive layer 545b is formed in contact with the side surface of the insulating layer 541b. A conductive layer 542b is located in at least a part of the bottom of the opening, and the conductive layer 545b is in contact with the conductive layer 542b.

[0236] The conductive layers 545a and 545b may be formed using a conductive material containing tungsten, copper, or aluminum as a main component. Each of the conductive layers 545a and 545b may have a stacked structure of two or more layers.

[0237] When the conductive layer 545 has a stacked structure, a conductive layer having a function of suppressing diffusion of impurities such as water or hydrogen may be used for the conductive layers in contact with the semiconductor layer 520a, the semiconductor layer 520b, the conductive layer 542, the insulating layer 554, the insulating layer 580, the insulating layer 574, and the insulating layer 581. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide is used. By using such a conductive material, oxygen contained in the insulating layer 580 can be prevented from being absorbed by the conductive layers 545a and 545b. Furthermore, impurities such as water or hydrogen from above the insulating layer 581 can be prevented from entering the semiconductor layer 520 through the conductive layers 545a and 545b.

[0238] The insulating layers 541a and 541b may be, for example, insulating layers that can be used for the insulating layer 554. The insulating layers 541a and 541b are provided in contact with the insulating layer 554, and therefore can prevent impurities such as water or hydrogen from the insulating layer 580 or the like from entering the semiconductor layer 520 through the conductive layers 545a and 545b. Furthermore, oxygen contained in the insulating layer 580 can be prevented from being absorbed by the conductive layers 545a and 545b.

[0239] <Transistor Configuration Example 5> A modification of the transistor 200D shown in FIG. 32 is shown in FIG. 33. FIG. 33A is a plan view of a transistor 200E which is a modification of the transistor 200D. FIG. 33B is a cross-sectional view taken along the line A1-A2 indicated by the dashed dotted line in FIG. 33A. FIG. 33C is a cross-sectional view taken along the line A3-A4 indicated by the dashed dotted line in FIG. 33A. Because the transistor 200E is a modification of the transistor 200D, differences between the transistor 200E and the transistor 200D will be mainly described.

[0240] The transistor 200E has a structure in which the semiconductor layer 520c and the conductive layer 505c are omitted from the structure of the transistor 200D. Reducing the number of components of the transistor reduces production costs. Furthermore, reducing the number of components of the transistor shortens the manufacturing process, improving manufacturing yield.

[0241] Furthermore, the transistor 200E has a region where the insulating layer 554 and the insulating layer 522 are in contact with each other outside the semiconductor layer 520, and the side surface of the insulating layer 524 is covered with the insulating layer 554. When an oxide semiconductor is used for the semiconductor layer 520, covering the side surface of the insulating layer 524 with the insulating layer 554 not only prevents oxygen from diffusing to the outside through the insulating layer 524 but also prevents excessive oxygen from being supplied to the semiconductor layer 520 from the insulating layer 524 side.

[0242] Note that an insulating layer may be provided between the insulating layer 580, the insulating layer 554, the conductive layer 542, and the semiconductor layer 520b and the insulating layer 550. Aluminum oxide, hafnium oxide, or the like is preferably used for the insulating layer. By providing the insulating layer, it is possible to suppress desorption of oxygen from the semiconductor layer 520 to the insulating layer 550, excessive supply of oxygen from the insulating layer 550 to the semiconductor layer 520, oxidation of the conductive layer 542, and the like.

[0243] <Constituent Materials of Transistor> Next, constituent materials that can be used for the transistor 200 (transistor 200A, transistor 200B, transistor 200C, transistor 200D, and transistor 200E) will be described.

[0244] [Substrate] When a transistor is provided on a substrate, the material used for the substrate is not particularly limited. The substrate can be determined depending on the purpose, taking into consideration the presence or absence of light transparency and heat resistance sufficient to withstand heat treatment. For example, an insulating substrate, a semiconductor substrate, or a conductive substrate can be used. Examples of insulating substrates that can be used include glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, and stabilized zirconia substrates (such as yttria-stabilized zirconia substrates). Furthermore, semiconductor substrates, flexible substrates, resin substrates, and the like may also be used.

[0245] Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, and compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, there are semiconductor substrates having an insulator region inside the aforementioned semiconductor substrate, such as an SOI (Silicon On Insulator) substrate. Furthermore, the semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0246] Conductive substrates include graphite substrates, metal substrates, alloy substrates, conductive resin substrates, etc. Also, there are substrates having metal nitrides, substrates having metal oxides, etc. Furthermore, there are substrates in which a conductive layer or a semiconductor layer is provided on an insulator substrate, substrates in which a conductive layer or an insulating layer is provided on a semiconductor substrate, and substrates in which a semiconductor layer or an insulating layer is provided on a conductive substrate.

[0247] Examples of materials that can be used for flexible substrates or resin substrates include polyesters such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile, acrylic resin, polyimide, polymethyl methacrylate, polycarbonate (PC), polyethersulfone (PES), polyamide (nylon, aramid, etc.), polysiloxane, cycloolefin resin, polystyrene, polyamideimide, polyurethane, polyvinyl chloride, polyvinylidene chloride, polypropylene, polytetrafluoroethylene (PTFE), ABS resin, and cellulose nanofiber.

[0248] By using the above materials for the substrate, a lightweight semiconductor device can be provided. Furthermore, by using the above materials for the substrate, a semiconductor device that is resistant to impact can be provided. Furthermore, by using the above materials for the substrate, a semiconductor device that is less likely to break can be provided. Furthermore, a substrate having elements provided on it may be used. The elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light-emitting element, a memory element, and the like.

[0249] [Insulating Layer] An inorganic insulating film is used for each of the insulating layers (insulating layer 202, insulating layer 204, insulating layer 206, insulating layer 209, insulating layer 257, insulating layer 258, insulating layer 259, insulating layer 264, insulating layer 266, insulating layer 516, insulating layer 522, insulating layer 524, insulating layer 541, insulating layer 554, insulating layer 580, insulating layer 574, insulating layer 581, etc.). Examples of inorganic insulating films include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Examples of oxide insulating films include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminate film. Examples of nitride insulating films include a silicon nitride film and an aluminum nitride film. Examples of the oxynitride insulating film include a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, an yttrium oxynitride film, and a hafnium oxynitride film. Examples of the nitride oxide insulating film include a silicon nitride oxide film and an aluminum nitride oxide film. An insulating layer included in a semiconductor device may be an organic insulating film.

[0250] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0251] For example, as transistors become more miniaturized and highly integrated, problems such as leakage current may occur due to thinner gate insulating layers. Using high-k materials for insulating layers that function as gate insulating layers, such as insulating layer 204 and insulating layer 264, enables lower voltages during transistor operation while maintaining the physical film thickness. It also enables thinner equivalent oxide thickness (EOT) for the gate insulating layer. On the other hand, using a material with a low dielectric constant for an insulating layer that functions as an interlayer film can reduce parasitic capacitance between wiring. Therefore, it is preferable to select materials according to the function of the insulating layer. Note that materials with a low dielectric constant also have high dielectric strength.

[0252] Examples of high-dielectric-constant (high-k) materials include aluminum oxide, gallium oxide, hafnium oxide, tantalum oxide, zirconium oxide, hafnium zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0253] Examples of materials with a low relative dielectric constant include inorganic insulating materials such as silicon oxide, silicon oxynitride, and silicon nitride oxide, and resins such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic resin. Other inorganic insulating materials with a low relative dielectric constant include silicon oxide doped with fluorine, silicon oxide doped with carbon, and silicon oxide doped with carbon and nitrogen. Another example is silicon oxide having voids.

[0254] [Conductive Layer] For the conductive layers (conductive layer 205, conductive layer 208, conductive layer 219, conductive layer 255, conductive layer 261, conductive layer 265, conductive layer 505, conductive layer 545, conductive layer 560, etc.) used in the transistor 200, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, zinc, tantalum, nickel, titanium, iron, cobalt, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., an alloy containing any of the above metal elements, an alloy combining any of the above metal elements, or the like. As the alloy containing any of the above metal elements, a nitride of the alloy or an oxide of the alloy may be used. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, semiconductors with high electrical conductivity, typified by polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used.

[0255] Nitrogen-containing conductive materials, such as nitrides containing tantalum, nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten, nitrides containing ruthenium, nitrides containing tantalum and aluminum, or nitrides containing titanium and aluminum; oxygen-containing conductive materials, such as ruthenium oxide, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel; and materials containing metal elements, such as titanium, tantalum, or ruthenium, are preferred because they are conductive materials that are resistant to oxidation, have the function of suppressing oxygen diffusion, or maintain conductivity even after absorbing oxygen. Examples of oxygen-containing conductive materials include indium oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide (also referred to as ITO), indium tin oxide containing titanium oxide, indium tin oxide with added silicon (also referred to as ITSO), indium zinc oxide (also referred to as IZO (registered trademark)), and indium zinc oxide containing tungsten oxide. In this specification and the like, a conductive layer formed using a conductive material containing oxygen may be referred to as an oxide conductive layer.

[0256] Conductive materials containing tungsten, copper or aluminum as a main component are preferred because they have high conductivity.

[0257] Furthermore, a plurality of conductive layers formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing oxygen. A stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing nitrogen. A stacked structure may be formed by combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0258] For example, when an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer 203 of the transistor 200A or 200B, a conductive layer functioning as a gate electrode, such as the conductive layer 205 or the conductive layer 219, may have a stacked structure in which a material containing the metal element described above and a conductive material containing oxygen are combined. In this case, the conductive material containing oxygen is preferably provided on the semiconductor layer 203 side. By providing the conductive material containing oxygen on the semiconductor layer 203 side, oxygen desorbed from the conductive material is easily supplied to a channel formation region of the semiconductor layer 203.

[0259] When an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer 203, the semiconductor layer 263, or the semiconductor layer 520, the conductive layers 208a, 208b, 255, the conductive layer 261, the conductive layer 542a, and the conductive layer 542b are conductive layers in contact with the semiconductor layer 203, the semiconductor layer 263, or the semiconductor layer 520, respectively. Therefore, a conductive material that is resistant to oxidation, a conductive material that maintains low electrical resistance even when oxidized, a metal oxide having conductivity (also referred to as an oxide conductor), or a conductive material that has a function of suppressing oxygen diffusion may be used for each of the conductive layers. Examples of the conductive material include a conductive material containing nitrogen and a conductive material containing oxygen. This can suppress a decrease in the conductivity of the conductive layer 208a, the conductive layer 208b, the conductive layer 255, the conductive layer 261, the conductive layer 542a, and the conductive layer 542b.

[0260] By using a conductive material containing oxygen for the conductive layers 208a, 208b, 255, 261, 542a, and 542b, the conductive layers 208a, 208b, 255, 261, 542a, and 542b, the conductivity can be maintained even if the conductive layers 208a, 208b, 255, 261, 542a, and 542b absorb oxygen. For example, even when an insulating layer containing excess oxygen is used as an insulating layer in contact with the conductive layers 208a, 208b, 255, 261, 542a, and 542b, the conductivity of the conductive layers 208a, 208b, 255, 261, 542a, and 542b can be maintained, which is preferable. For each of the conductive layer 208a, the conductive layer 208b, the conductive layer 255, the conductive layer 261, the conductive layer 542a, and the conductive layer 542b, for example, ITO, ITSO, IZO (registered trademark), or the like can be used.

[0261] [Semiconductor Layer] As the semiconductor layer (semiconductor layer 203, semiconductor layer 263, semiconductor layer 520, etc.), a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, or the like can be used alone or in combination. Examples of the semiconductor material include silicon and germanium. Compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, and nitride semiconductors may also be used. Examples of the compound semiconductor include an organic material having semiconductor properties or a metal oxide (also referred to as an oxide semiconductor) having semiconductor properties. Note that these semiconductor materials may contain impurities as dopants.

[0262] The semiconductor layer may be made of a semiconductor made of a single element or a compound semiconductor. Examples of semiconductors made of a single element include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Other examples of compound semiconductors include organic semiconductors and nitride semiconductors. Note that oxide semiconductors are also a type of compound semiconductor. Note that these semiconductor materials may contain impurities as dopants.

[0263] When silicon is used for the semiconductor layer, examples of silicon that can be used for the semiconductor layer include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polysilicon (LTPS).

[0264] For example, by using silicon for the semiconductor layer 203 of the transistor 200A or 200B and adding phosphorus or arsenic as an n-type dopant to the drain region 203a and the source region 203c of the semiconductor layer 203, the transistor can function as an n-type transistor. Also, by adding boron as a p-type dopant to the drain region 203a and the source region 203c of the semiconductor layer 203, the transistor can function as a p-type transistor. When the drain region 203a and the source region 203c of the semiconductor layer 203 contain both an n-type dopant and a p-type dopant, the conductivity type with a higher dopant concentration is more likely to be realized.

[0265] A two-dimensional material that functions as a semiconductor may be used as the semiconductor layer of a transistor. Two-dimensional materials, also known as layered materials, are a general term for a group of materials that have a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked via bonds weaker than covalent or ionic bonds, such as van der Waals bonds. Layered materials have high electrical conductivity within a unit layer, i.e., high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity for the semiconductor layer, a transistor with a large on-state current can be provided.

[0266] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen (an element belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS ２), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２ ), tungsten tellurium (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ) etc.

[0267] When an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer, the band gap of the metal oxide is preferably 2.0 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a wide band gap for the semiconductor layer, the off-state current of the transistor can be significantly reduced. Since an OS transistor has a small off-state current, the power consumption of the semiconductor device can be reduced. Note that the oxide semiconductor will be described in detail in Embodiment 4.

[0268] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes or the like.

[0269] Embodiment 4 In this embodiment, an oxide semiconductor layer that can be used as a semiconductor layer of a transistor will be described.

[0270] [Oxide Semiconductor Layer] The oxide semiconductor layer of one embodiment of the present invention preferably includes a crystalline metal oxide. Examples of the structure of the crystalline metal oxide include a c-axis aligned crystal (CAAC) structure, a polycrystalline (poly-crystal) structure, and a nanocrystalline (nc) structure. By using a crystalline metal oxide for the oxide semiconductor layer, the density of defect states in the oxide semiconductor layer can be reduced. Therefore, the reliability of a transistor including the oxide semiconductor layer of one embodiment of the present invention can be improved, and the reliability of a memory device including the transistor can be improved.

[0271] The oxide semiconductor layer of one embodiment of the present invention preferably includes a metal oxide having a CAAC structure. The CAAC structure is a crystal structure in which a plurality of microcrystals (typically, a plurality of microcrystals having a hexagonal crystal structure) have c-axis orientation and are connected without being oriented in the a-b plane. Furthermore, when a cross section of an oxide semiconductor layer having a CAAC structure is observed using a high-resolution transmission electron microscope (TEM) image, it can be confirmed that metal atoms are arranged in a layered manner in the crystal parts. Therefore, an oxide semiconductor layer having a CAAC structure can also be said to have a structure having layered crystal parts.

[0272] The crystallinity of the oxide semiconductor layer can be analyzed by, for example, X-ray diffraction (XRD), TEM, or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.

[0273] Note that the crystallinity of the semiconductor material included in the oxide semiconductor layer is not particularly limited. For example, the oxide semiconductor layer may include one or more of an amorphous semiconductor (a semiconductor having an amorphous structure), a single-crystal semiconductor (a semiconductor having a single-crystal structure), or a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part). When the oxide semiconductor layer has crystallinity, deterioration of transistor characteristics can be suppressed in some cases.

[0274] Examples of metal oxides contained in the oxide semiconductor layer of one embodiment of the present invention include indium oxide, gallium oxide, and zinc oxide. The metal oxide according to one embodiment of the present invention preferably contains at least indium (In) or zinc (Zn). The metal oxide preferably contains two or three elements selected from indium, an element M, and zinc. The element M is a metal element or a metalloid element having a high bond energy with oxygen, e.g., a metal element or a metalloid element having a bond energy with oxygen higher than that of indium. Specific examples of the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. When the element M contained in the metal oxide is gallium, the metal oxide according to one embodiment of the present invention preferably contains one or more selected from indium, gallium, and zinc. Note that in this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal element" described in this specification and the like may also include metalloid elements.

[0275] Examples of metal oxides according to one embodiment of the present invention include indium zinc oxide (In—Zn oxide), indium tin oxide (In—Sn oxide), indium titanium oxide (In—Ti oxide), indium gallium oxide (In—Ga oxide), indium gallium aluminum oxide (In—Ga—Al oxide), indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga—Zn oxide, also referred to as GZO), aluminum zinc oxide (Al—Zn oxide, also referred to as AZO), and indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO). Examples of the usable oxide include indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO or IAGZO). Alternatively, examples of the usable oxide include indium tin oxide containing silicon (also referred to as ITSO), gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide).

[0276] By increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the metal oxide, the transistor can have a large on-state current and high frequency characteristics.

[0277] Note that the metal oxide may contain one or more metal elements having a higher period number in the periodic table instead of indium. Alternatively, the metal oxide may contain one or more metal elements having a higher period number in the periodic table in addition to indium. The greater the overlap of the orbitals of metal elements, the greater the carrier conduction in the metal oxide tends to be. Therefore, by including a metal element having a higher period number in the periodic table, the field-effect mobility of a transistor may be improved. Examples of metal elements having a higher period number in the periodic table include metal elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0278] The metal oxide may contain one or more nonmetallic elements, which may increase the field-effect mobility of the transistor. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0279] Furthermore, by increasing the ratio of the number of zinc atoms to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the metal oxide can be made highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0280] Furthermore, by increasing the ratio of the number of atoms of element M to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation due to oxygen vacancies can be suppressed, and a transistor with a small off-state current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, thereby improving reliability.

[0281] In the present embodiment, an In—Ga—Zn oxide may be used as an example of the metal oxide.

[0282] The oxide semiconductor layer of one embodiment of the present invention has crystallinity and preferably has a CAAC structure.

[0283] The oxide semiconductor layer of one embodiment of the present invention can be manufactured by forming a metal oxide using at least two kinds of film formation methods. For example, the oxide semiconductor layer of one embodiment of the present invention can be manufactured by forming a metal oxide using a first film formation method and a second film formation method. Note that an oxide semiconductor layer formed using at least two kinds of film formation methods may be referred to as a hybrid OS.

[0284] The oxide semiconductor layer of one embodiment of the present invention can be manufactured by forming a metal oxide as a first layer by a first deposition method and then forming a metal oxide as a second layer on the first layer by a second deposition method. In this case, it is preferable to use a deposition method that causes less damage to a surface on which the oxide semiconductor layer is to be formed compared to the second deposition method as the first deposition method. By using a deposition method that causes less damage to a surface on which the oxide semiconductor layer is to be formed as the first deposition method, formation of a mixed layer at the interface between the oxide semiconductor layer and a layer on which the oxide semiconductor layer is to be formed can be suppressed. Furthermore, impurities such as silicon can be prevented from being mixed into the second layer, thereby increasing the crystallinity of the oxide semiconductor layer.

[0285] Examples of the first film formation method include atomic layer deposition (ALD), chemical vapor deposition (CVD), molecular beam epitaxy (MBE), and wet methods. Examples of CVD methods include plasma enhanced CVD (PECVD), thermal CVD, photo-assisted CVD, and metal organic CVD (MOCVD). Examples of wet methods include spray coating. Compared to the sputtering method described below, the ALD and CVD methods are suitable as the first film formation method because they can suppress damage to the surface to be formed.

[0286] Examples of the ALD method include a thermal ALD method in which a precursor and a reactant are reacted using only thermal energy, and a plasma enhanced ALD (PEALD) method in which a plasma-excited reactant is used.

[0287] The ALD method can deposit atoms layer by layer, and therefore has the advantages of enabling ultrathin film formation, film formation on high aspect ratio structures or surfaces with large steps, film formation with fewer defects such as pinholes, film formation with excellent coverage, and film formation at low temperatures. Furthermore, the PEALD method may be preferable in some cases because it utilizes plasma, allowing film formation at lower temperatures. Note that some precursors used in the ALD method contain elements such as carbon or chlorine. Therefore, films formed by the ALD method may contain larger amounts of elements such as carbon or chlorine than films formed by other film formation methods. The amounts of these elements can be quantified using X-ray photoelectron spectroscopy (XPS) or secondary ion mass spectrometry (SIMS). In the method for forming a metal oxide film according to one embodiment of the present invention, an ALD method is used. However, since the ALD method employs one or both of a high substrate temperature condition during film formation and an impurity removal treatment, the amount of carbon and chlorine contained in the film may be smaller than that in the case of using an ALD method without employing these conditions.

[0288] Unlike film formation methods in which particles emitted from a target or the like are deposited, the ALD method is a film formation method in which a film is formed by a reaction on the surface of a workpiece. Therefore, it is a film formation method that is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method has excellent step coverage and excellent thickness uniformity, making it suitable for coating the surface of an opening with a high aspect ratio.

[0289] The plasma CVD method can produce high-quality films at relatively low temperatures. Furthermore, the thermal CVD method is a film formation method that can minimize plasma damage to the workpiece because it does not use plasma. Furthermore, the thermal CVD method produces films with fewer defects because no plasma damage occurs during film formation.

[0290] Examples of the second film formation method include sputtering, pulsed laser deposition (PLD), etc. Metal oxides formed using the second film formation method tend to have a CAAC structure.

[0291] Note that the first layer may be, for example, a metal oxide having a microcrystalline structure or an amorphous structure with lower crystallinity than a CAAC structure. By forming a second layer with high crystallinity on the first layer with low crystallinity, or by forming the second layer and then performing heat treatment, the crystallinity of the first layer may be increased using the second layer as a nucleus. This can increase the crystallinity of the entire oxide semiconductor layer, including the vicinity of the interface with the surface on which it is formed.

[0292] Furthermore, a third layer can be further formed on the second layer. Because the second layer has high crystallinity, the third layer can grow crystals using the crystals of the second layer as nuclei or seeds. Therefore, even if a film formation method that easily imparts crystallinity is not used as a film formation method for the third layer, the third layer can be crystallized. Here, for example, by forming the third layer using a film formation method that has higher coverage than the second layer, the oxide semiconductor layer can have both high crystallinity and high coverage throughout the layer.

[0293] For example, the oxide semiconductor layer of one embodiment of the present invention can be fabricated by forming a metal oxide as a first layer by a first deposition method, forming a metal oxide as a second layer by a second deposition method, and forming a metal oxide as a third layer by the first deposition method. Specifically, an ALD method can be used as the first deposition method, and a sputtering method can be used as the second deposition method. The ALD method has better coverage than the sputtering method, and the use of the ALD method as the deposition method for the first layer and the third layer can improve the coverage of the oxide semiconductor layer. Therefore, the oxide semiconductor layer can be well covered over steps, openings, and the like with a high aspect ratio.

[0294] [Method for Manufacturing Oxide Semiconductor Layer] The semiconductor layer 230, which is an oxide semiconductor layer, can be manufactured by, for example, forming a semiconductor layer 230a on the layer 229, which is a surface to be formed, by an ALD method, forming a semiconductor layer 230b, which is an oxide semiconductor layer, on the semiconductor layer 230a, which is an oxide semiconductor layer, by a sputtering method, and forming a semiconductor layer 230c, which is an oxide semiconductor layer, on the semiconductor layer 230b, by an ALD method. Furthermore, after forming the semiconductor layer 230, which is an oxide semiconductor layer, it is preferable to perform heat treatment. The heat treatment can improve the crystallinity of the semiconductor layer 230. The heat treatment here is not limited to heat treatment. For example, it may be heat applied during the manufacturing process.

[0295] The layer 229 corresponds to the insulating layer 202, the insulating layer 256, the insulating layer 258, or the like described in the above embodiments. The layer 229 does not need to be crystalline. When the layer 229 is crystalline, it may have a crystal structure with low lattice matching with the metal oxide contained in the semiconductor layer 230.

[0296] An example of a method for manufacturing the semiconductor layer 230 will be described with reference to FIGS. 34A to 34D and 35A to 35D.

[0297] When a metal oxide film is formed by a sputtering method, alloying may occur between components contained in the metal oxide film and components contained in the layer on which the film is formed due to damage caused by sputtering particles on the surface on which the film is formed or by energy imparted to the substrate by the sputtering particles, etc. When alloying occurs, it is difficult to improve the crystallinity of the alloyed region even when heat treatment, which will be described later, is performed. Furthermore, there is a concern that using an oxide semiconductor layer having an alloyed region in a transistor may adversely affect the initial characteristics or reliability of the transistor. Therefore, it is preferable to suppress alloying between components contained in the metal oxide film and components contained in the layer on which the film is formed.

[0298] Therefore, first, a semiconductor layer 230a is formed on the layer 229 by ALD (FIG. 34A), and then a semiconductor layer 230b is formed on the semiconductor layer 230a by sputtering (FIG. 34B).

[0299] In the method for forming an oxide semiconductor layer of one embodiment of the present invention, the semiconductor layer 230a is formed between the semiconductor layer 230b and the layer 229 by a deposition method that causes little damage to a surface on which the semiconductor layer 230a is formed. This suppresses alloying of components contained in the semiconductor layer 230 and components contained in the layer 229, thereby enabling the semiconductor layer 230 to have higher crystallinity.

[0300] By using the above configuration, the thickness of the alloyed region can be thinned, or made thin enough that the alloyed region cannot be observed. For example, the thickness of the alloyed region can be set to 0 nm or more and 3 nm or less, preferably 0 nm or more and 2 nm or less, more preferably 0 nm or more and 1 nm or less, and even more preferably 0 nm or more and less than 0.3 nm. Note that Figures 34A and 34B show an example in which no alloyed region is formed between layer 229 and semiconductor layer 230a.

[0301] The thickness of the alloyed region may be calculated by performing a line analysis of the composition of the region and its surroundings using SIMS or energy dispersive X-ray spectroscopy (EDX).

[0302] For example, EDX line analysis is performed on the region and its periphery, with the direction perpendicular to the surface of the semiconductor layer 230a being the depth direction. Next, in the profile of the quantitative values ​​of each element in the depth direction obtained by this analysis, the depth at which the quantitative value of a metal (In, if the semiconductor layer 230a contains In) that is the main component of the semiconductor layer 230a but is not the main component of the layer that will become the surface (here, layer 229) becomes half-value is defined as the depth (position) of the interface between the region and the semiconductor layer 230a. Furthermore, the depth at which the quantitative value of an element (e.g., Si) that is the main component of the layer that will become the surface but is not the main component of the semiconductor layer 230a becomes half-value is defined as the depth (position) of the interface between the region and the layer that will become the surface. From the above, the thickness of the alloyed region can be calculated.

[0303] In the oxide semiconductor layer of one embodiment of the present invention, when the thickness of the alloyed region is observed by EDX analysis, the thickness is, for example, 0 nm to 3 nm, preferably 0 nm to 2 nm, more preferably 0 nm to 1 nm, and still more preferably 0 nm to less than 0.3 nm.

[0304] For example, when a silicon oxide layer is used as the layer 229 and SIMS analysis is performed on the semiconductor layer 230 formed on the layer 229, the depth at which the silicon concentration is 50% of the maximum concentration of the layer 229 is defined as the interface, and the silicon concentration is 1.0×10 ２１ atoms / cm ３ , preferably 5.0×10 ２０ atoms / cm ３ , more preferably 1.0 × 10 ２０ atoms / cm ３ The distance between the depth at which the thickness decreases to 3 nm and the interface is defined as thickness t_s2. The thickness t_s2 is preferably 3 nm or less, and more preferably 2 nm or less.

[0305] By reducing the thickness of the alloyed region, the thickness t_s2 can be set to a value within the above range.

[0306] By reducing the alloyed region, it becomes possible to form the CAAC structure near the surface to be formed. Here, "near the surface to be formed" refers to, for example, a region from more than 0 nm to 3 nm, preferably more than 0 nm to 2 nm, more preferably 1 nm to 2 nm, approximately perpendicularly from the surface to be formed of the semiconductor layer 230.

[0307] The CAAC structure near the formation surface can sometimes be confirmed by observation using a TEM. For example, in cross-sectional observation of the semiconductor layer 230 using a high-resolution TEM, bright spots arranged in layers in a direction parallel to the formation surface are confirmed near the formation surface.

[0308] When the semiconductor layer 230a is formed by an ALD method, an oxide semiconductor layer having a microcrystalline structure or an amorphous structure, which has lower crystallinity than the CAAC structure, may be formed. That is, at the manufacturing stage shown in FIG. 34A , the semiconductor layer 230a may have a region having lower crystallinity than the semiconductor layer 230b.

[0309] The semiconductor layer 230b preferably has a composition suitable for forming a CAAC structure.

[0310] When the semiconductor layer 230b is formed by sputtering, a mixed layer 231 is formed on or near the surface of the semiconductor layer 230a. Furthermore, when the semiconductor layer 230b is formed, sputtering particles or energy imparted to the substrate by the sputtering particles or the like may form minute crystalline regions in the mixed layer 231. In a subsequent heat treatment step, the mixed layer 231 or the minute crystalline regions formed in the mixed layer 231 may act as nuclei, and at least a portion of the semiconductor layer 230a may be crystallized.

[0311] In forming the semiconductor layer 230b by a sputtering method, it is preferable to heat the substrate. In forming the metal oxide, by increasing the substrate temperature (stage temperature) during the formation of the metal oxide, it is possible to form a metal oxide with high crystallinity in some cases.

[0312] Next, a semiconductor layer 230c is formed on the semiconductor layer 230b by ALD (FIG. 34C). For the formation of the semiconductor layer 230c by ALD, the method for forming the semiconductor layer 230a can be referred to.

[0313] When the semiconductor layer 230c is formed on the semiconductor layer 230b having the CAAC structure by the ALD method, the semiconductor layer 230c may grow epitaxially using the semiconductor layer 230b as a nucleus. Therefore, when the semiconductor layer 230c is formed, the semiconductor layer 230c may have a region having the CAAC structure. Furthermore, it is preferable that the region having the CAAC structure is formed over the entire semiconductor layer 230c.

[0314] Next, a heat treatment step may be performed. This heat treatment step may increase the crystallinity of the region having the CAAC structure in the semiconductor layer 230c. Furthermore, if the region is formed only below the semiconductor layer 230c after film formation by the ALD method, this heat treatment step may cause the region to expand upward (FIG. 34D). That is, this heat treatment may cause the region having the CAAC structure to be formed throughout the entire semiconductor layer 230c.

[0315] Furthermore, it is preferable that at least a portion of the semiconductor layer 230a is converted into CAAC by this heat treatment process ( FIG. 34D ). It is expected that the CAAC conversion is facilitated by the mixed layer 231 formed in the semiconductor layer 230a during the deposition of the semiconductor layer 230b, which acts as a nucleus or seed. It is preferable that the region in the semiconductor layer 230a that is converted into CAAC is wide, and it is preferable that the CAAC conversion extend to the vicinity of the layer 229.

[0316] Furthermore, because the CAAC is formed from the top to the bottom of the semiconductor layer 230a, the CAAC can be formed up to the vicinity of the layer 229 without being limited by the material or crystallinity of the layer 229. For example, even if the layer 229 has an amorphous structure, the semiconductor layer 230a can have high crystallinity. Therefore, the method for forming an oxide semiconductor layer according to one embodiment of the present invention is particularly suitable for the case where a layer on which the oxide semiconductor layer is formed has an amorphous structure.

[0317] 34A to 34D are cross-sectional views illustrating a method for forming a metal oxide film according to one embodiment of the present invention. Also, FIGS. 34A to 34D can be regarded as conceptual diagrams illustrating a film formation model of a metal oxide according to one embodiment of the present invention. As shown in FIGS. 34A to 34D , the semiconductor layer 230a and the semiconductor layer 230c each have high crystallinity using the highly crystalline semiconductor layer 230b as a nucleus or seed. Specifically, the crystallinity of the semiconductor layer 230a may be increased by heat treatment during the formation of the semiconductor layer 230b or after the formation of the semiconductor layer 230c. The crystallinity of the semiconductor layer 230c may be increased by heat treatment during the formation of the semiconductor layer 230c or after the formation of the semiconductor layer 230c. The heat treatment has an assisting effect of increasing the crystallinity.

[0318] As described above, in the method for forming a metal oxide film according to one embodiment of the present invention, the crystallinity of the upper and lower oxide semiconductors (the semiconductor layer 230a and the semiconductor layer 230c here) can be increased by using the semiconductor layer 230b (i.e., CAAC) with high crystallinity as a nucleus or seed. This increases the crystallinity of the entire oxide semiconductor. In other words, the upper and lower oxide semiconductors can be grown in a solid phase using the semiconductor layer 230b as a nucleus or seed, thereby forming an oxide semiconductor with high crystallinity. An oxide semiconductor formed by such a film formation method, i.e., a CAAC film here, can be referred to as an axial growth CAAC (AG CAAC). Note that although FIGS. 35A to 35D illustrate a structure including the semiconductor layer 230a, the semiconductor layer 230b, and the semiconductor layer 230c, the present invention is not limited thereto. For example, the structure including the semiconductor layer 230a and the semiconductor layer 230b can also be an AG CAAC.

[0319] In the semiconductor layer 230, it is preferable that a region having a CAAC structure is widely present throughout the layer. Figure 35A shows the state in which the semiconductor layer 230a, the semiconductor layer 230b, and the semiconductor layer 230c are each crystallized. At this time, the boundary between the semiconductor layer 230a and the semiconductor layer 230b may not be observed. Also, the boundary between the semiconductor layer 230b and the semiconductor layer 230c may not be observed. The semiconductor layer 230 may be expressed as a single layer whose interface is not clearly observed. The semiconductor layer 230 may be expressed as a single layer.

[0320] Furthermore, there are cases where a portion of the semiconductor layer 230a or the semiconductor layer 230c is not crystallized. The example shown in Fig. 35B shows a state in which the vicinity of the interface with the layer 229 in the semiconductor layer 230a is not crystallized. Fig. 35C shows a state in which the vicinity of the surface in the semiconductor layer 230c is not crystallized. Fig. 35D shows a state in which the vicinity of the interface with the layer 229 in the semiconductor layer 230a and the vicinity of the surface of the semiconductor layer 230c are not crystallized.

[0321] By increasing the crystallinity of the oxide semiconductor layer, an increase in the electrical resistance of the semiconductor layer of a transistor using the oxide semiconductor layer can be suppressed or the initial characteristics (particularly, on-state current) of the transistor can be improved, which is expected to make the transistor suitable for high-speed operation.In addition, the reliability of the transistor can be improved and the on-state current can be increased.

[0322] The oxide semiconductor layer of one embodiment of the present invention has high crystallinity throughout the entire layer. Therefore, in the semiconductor layer 230, the boundaries between the stacked semiconductor layers 230a, 230b, and 230c may not be visible. In particular, after heat treatment, it may be difficult to identify the boundaries between the stacked films. The presence or absence of the boundaries between the stacked films can be confirmed using, for example, a TEM or the like.

[0323] As described above, the use of a metal oxide with a high In content in a transistor can increase the field-effect mobility of the transistor. On the other hand, an oxide semiconductor with a high In content tends to become polycrystalline. The use of a metal oxide with a polycrystalline structure in a transistor adversely affects the initial characteristics or reliability of the transistor. Therefore, by using an oxide semiconductor with a high In content in one or both of the semiconductor layer 230a and the semiconductor layer 230c, crystals that reflect the crystal orientation of the semiconductor layer 230b are formed, and polycrystallization can be suppressed.

[0324] Furthermore, it is preferable that the lattice mismatch between the crystals of the semiconductor layer 230b and the crystals of the semiconductor layer 230a or the semiconductor layer 230c is small. This allows the semiconductor layer 230a or the semiconductor layer 230c to form crystals that reflect the orientation of the crystals of the semiconductor layer 230b. In this case, for example, in cross-sectional observation of the semiconductor layer 230 using a high-resolution TEM, bright spots arranged in layers in a direction parallel to the formation surface are confirmed in the semiconductor layer 230a or the semiconductor layer 230c.

[0325] As long as the lattice mismatch between the crystals of the semiconductor layer 230b and the crystals of the semiconductor layer 230a or 230c is small, the crystal structure of the semiconductor layer 230a or 230c is not particularly limited. The crystal structure of the semiconductor layer 230a or 230c may be any of cubic, tetragonal, orthorhombic, hexagonal, monoclinic, and trigonal.

[0326] [Composition of Oxide Semiconductor Layer] As described above, the semiconductor layer 230b preferably has a composition suitable for forming a CAAC structure. The semiconductor layer 230b can be formed by, for example, a sputtering method. The semiconductor layer 230b preferably contains, for example, zinc. By containing zinc, the semiconductor layer 230b becomes a metal oxide with high crystallinity. Furthermore, the semiconductor layer 230b preferably contains an element M in addition to zinc. By containing the element M in the semiconductor layer 230b, for example, it is possible to suppress the formation of oxygen vacancies in the metal oxide. Therefore, the reliability of a transistor using an oxide semiconductor layer can be improved. Specifically, the semiconductor layer 230b may be made of a metal oxide having an In:M:Zn = 1:1:1 atomic ratio or a composition thereabout, an In:M:Zn = 1:1:1.2 atomic ratio or a composition thereabout, an In:M:Zn = 1:1:0.5 atomic ratio or a composition thereabout, an In:M:Zn = 1:1:2 atomic ratio or a composition thereabout, an In:M:Zn = 4:2:3 atomic ratio or a composition thereabout, an In:M:Zn = 1:3:2 atomic ratio or a composition thereabout, or an In:M:Zn = 1:3:4 atomic ratio or a composition thereabout. Note that a composition thereabout includes a range of ±30% of the desired atomic ratio. Furthermore, it is preferable to use one or more of gallium, aluminum, and tin as the element M.

[0327] The semiconductor layer 230b may be configured without the element M. For example, it may be an In-Zn oxide. Specifically, it may have a composition of In:Zn=1:1 (atomic ratio) or a composition thereabout, an In:Zn=2:1 (atomic ratio) or a composition thereabout, or an In:Zn=4:1 (atomic ratio) or a composition thereabout. Alternatively, indium oxide may be used. It may also be configured with a trace amount of the element M. For example, it may have a composition of In:Ga:Zn=4:0.1:1 (atomic ratio) or a composition thereabout, or an In:Ga:Zn=2:0.1:1 (atomic ratio) or a composition thereabout. Furthermore, it may have a composition of In:Sn:Zn=4:0.1:1 (atomic ratio) or a composition thereabout, or an In:Sn:Zn=2:0.1:1 (atomic ratio) or a composition thereabout.

[0328] The semiconductor layer 230a and the semiconductor layer 230c can be made of a metal oxide having a high proportion of In. The semiconductor layer 230a and the semiconductor layer 230c can be formed by, for example, an ALD method. In particular, it is preferable to use a metal oxide having a higher proportion of In than the element M. By using a metal oxide having a high proportion of In, when the oxide semiconductor layer is used in a transistor, the on-state current can be increased and the frequency characteristics can be improved.

[0329] The semiconductor layer 230a and the semiconductor layer 230c may be configured without containing the element M. For example, they may be made of In-Zn oxide. Specifically, they may have a composition of In:Zn=1:1 (atomic ratio) or a composition thereabout, an In:Zn=2:1 (atomic ratio) or a composition thereabout, or an In:Zn=4:1 (atomic ratio) or a composition thereabout. Alternatively, indium oxide may be used. The semiconductor layer 230a and the semiconductor layer 230c may be configured with a trace amount of the element M. Specifically, they may have a composition of In:Ga:Zn=4:0.1:1 (atomic ratio) or a composition thereabout, an In:Ga:Zn=2:0.1:1 (atomic ratio) or a composition thereabout, an In:Sn:Zn=4:0.1:1 (atomic ratio) or a composition thereabout, or an In:Sn:Zn=2:0.1:1 (atomic ratio) or a composition thereabout.

[0330] Increasing the zinc content of the oxide semiconductor can improve the crystallinity of the oxide semiconductor. It is particularly preferable that the semiconductor layer 230a contains zinc. For example, when the semiconductor layer 230a is formed by an ALD method and the semiconductor layer 230b is formed by a sputtering method, zinc contained in the semiconductor layer 230a may diffuse into the semiconductor layer 230b. This diffusion may occur during sputtering or subsequent heat treatment. The diffusion of zinc from the semiconductor layer 230a to the semiconductor layer 230b is expected to improve the crystallinity. Alternatively, the diffusion of zinc from the semiconductor layer 230a to the semiconductor layer 230b is expected to promote the lateral growth of crystal parts having c-axis orientation, thereby facilitating the formation of CAAC.

[0331] The semiconductor layer 230a and the semiconductor layer 230c can be made of a metal oxide having a higher proportion of In than the semiconductor layer 230b.

[0332] Alternatively, for example, a metal oxide having a higher Ga content than the semiconductor layer 230b can be used for the semiconductor layer 230a and the semiconductor layer 230c. For example, it is preferable to use a metal oxide having an In:Ga:Zn=1:1:1 atomic ratio or a composition thereabout, a metal oxide having an In:Ga:Zn=1:3:2 atomic ratio or a composition thereabout, or a metal oxide having an In:Ga:Zn=1:3:4 atomic ratio or a composition thereabout for the semiconductor layer 230a and the semiconductor layer 230c, respectively. Increasing the Ga content may result in the band gaps of the semiconductor layer 230a and the semiconductor layer 230c being larger than those of the semiconductor layer 230b. As a result, the semiconductor layer 230b is sandwiched between the semiconductor layer 230a and the semiconductor layer 230c, which have larger band gaps, and the semiconductor layer 230b functions primarily as a current path (channel). By sandwiching the semiconductor layer 230b between the semiconductor layers 230a and 230c, it is possible to reduce trap levels at the interface of the semiconductor layer 230b and in the vicinity thereof, thereby realizing a buried channel transistor in which the channel is kept away from the insulating layer interface, and thus increasing the field-effect mobility.

[0333] In the oxide semiconductor layer of one embodiment of the present invention, even when the semiconductor layers 230a and 230c are formed using compositions that make it difficult to form a CAAC structure when a single layer is formed, crystal growth occurs using the semiconductor layer 230b as a nucleus, so that the entire oxide semiconductor layer including the semiconductor layers 230a and 230c can have the CAAC structure. Alternatively, the CAAC structure can be formed in a region including at least a part of the semiconductor layer 230a and the semiconductor layer 230c and the semiconductor layer 230b.

[0334] In particular, even when the semiconductor layers 230 a and 230 c have a high In content, the semiconductor layers can have suitable crystallinity for use as semiconductor layers of a transistor. In the oxide semiconductor layer of one embodiment of the present invention, the increase in the In content can improve the on-state characteristics of the transistor, and the improvement in reliability can be achieved by using a CAAC structure with high crystallinity.

[0335] The semiconductor layer 230a and the semiconductor layer 230c may have different compositions.

[0336] The semiconductor layer 230a and the semiconductor layer 230c may be made of a metal oxide having the same composition as the semiconductor layer 230b.

[0337] By using an oxide semiconductor layer having a CAAC structure formed by using the above two types of film formation methods for a channel formation region of a transistor, a transistor with excellent characteristics (e.g., a transistor with high on-state current, a transistor with high field-effect mobility, a transistor with a small S value, a transistor with high frequency characteristics (also referred to as f characteristics), a highly reliable transistor, etc.) can be realized.

[0338] The composition of the metal oxide used in the semiconductor layer 230 can be analyzed using, for example, EDX, XPS, inductively coupled plasma-mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Alternatively, the analysis may be performed using a combination of these techniques. Note that for elements with low content, the actual content and the content obtained by analysis may differ due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0339] [C-Axis Orientation Rate] The oxide semiconductor layer of one embodiment of the present invention has a CAAC structure. The crystallinity of the oxide semiconductor layer of one embodiment of the present invention can be evaluated using, for example, crystal orientation.

[0340] The crystal orientation can be obtained from a Fast Fourier Transform (FFT) pattern obtained by performing FFT processing on a TEM image. Specifically, the direction of the crystal axis can be obtained using the FFT pattern. The FFT pattern obtained by FFT processing reflects reciprocal lattice space information similar to that of an electron diffraction pattern.

[0341] By performing FFT processing on each region in a TEM image of an oxide semiconductor layer, the crystal orientation of each region can be obtained. For example, by obtaining the crystal orientation for each region within a certain area, a map showing the crystal orientation can be formed. Specifically, two spots with high intensity are observed in the FFT pattern of a region having a layered crystalline portion. The direction of the crystal axis of the region can be obtained from the angle of the line segment connecting the two spots.

[0342] The c-axis orientation rate can be calculated by calculating the proportion of c-axis oriented regions in a map showing crystal orientation. Here, the c-axis oriented regions are defined as regions whose orientation coincides with the c-axis and regions whose orientation differs from the c-axis by 20° or less.

[0343] In the oxide semiconductor layer of one embodiment of the present invention, the c-axis orientation ratio can be calculated, for example, by TEM observation of a cross section or a plan view of the oxide semiconductor layer. The region where FFT is performed (also referred to as an FFT window) can be a circle with a diameter of 1.0 nm, for example. Note that the region where FFT is performed is not limited to a circle.

[0344] In the oxide semiconductor layer of one embodiment of the present invention, the c-axis orientation rate is 60% or more, preferably 70% or more, more preferably 80% or more, more preferably 90% or more, and still more preferably 95% or more.

[0345] The c-axis orientation rates of the region formed as semiconductor layer 230a, the region formed as semiconductor layer 230b, and the region formed as semiconductor layer 230c are defined as Rc1, Rc2, and Rc3, respectively. Rc2 and Rc3 are each 60% or more, preferably 70% or more, more preferably 80% or more, more preferably 90% or more, and even more preferably 95% or more. Rc3 / Rc1 is preferably greater than 1. Rc2 / Rc1 is preferably greater than 1.

[0346] After the semiconductor layer 230 is fabricated, the boundaries between the semiconductor layers 230a, 230b, and 230c may not be clearly observed.

[0347] The semiconductor layer 230 of one embodiment of the present invention can be divided into three regions, namely, a first region, a second region, and a third region, starting from the top of the layer 229. Each region is a layer-like region.

[0348] The first region, the second region, and the third region each have a CAAC structure. The c-axis orientation rate of the third region is preferably higher than that of the first region. The c-axis orientation rate of the second region is preferably higher than that of the first region. The c-axis orientation rates of the second region and the third region are each 80% or higher, more preferably 90% or higher, and even more preferably 95% or higher.

[0349] The first region is located at a distance of 0 nm to 3 nm from the top surface of the layer 229 , and the third region is located at a distance of 0 nm to 3 nm from the top surface of the semiconductor layer 230 .

[0350] Alternatively, the layer thickness in each region may be approximately the same, for example.

[0351] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0352] Fifth Embodiment In this embodiment, an example of a planar layout and an example of a cross-sectional structure of a semiconductor device 100A will be described.

[0353] In this embodiment, the transistors Tr1 to Tr8 are each configured using the transistor 200A (see FIGS. 29A to 29C) described in Embodiment 3, and the transistor TrD is each configured using the transistor 200B (see FIGS. 30A to 30C). To avoid repetition, the following description will mainly focus on matters not described in other embodiments. Matters not described in this embodiment can be understood by referring to the other embodiments.

[0354] Fig. 36 is a diagram showing an example of a planar layout of the semiconductor device 100A shown in Fig. 1. Fig. 37 is an enlarged view of a portion of Fig. 36. Fig. 39 is a cross-sectional view taken along the line A1-A2 indicated by the dashed-dotted line in Fig. 36. Fig. 40A is a cross-sectional view taken along the line A3-A4 indicated by the dashed-dotted line in Figs. 36 and 37. Fig. 40B is a cross-sectional view taken along the line A5-A6 indicated by the dashed-dotted line in Figs. 36 and 37.

[0355] The semiconductor device 100A described in this embodiment includes a conductive layer 271[1], a conductive layer 271[2], a conductive layer 272, a conductive layer 273, a conductive layer 274[1], and a conductive layer 274[2] over an insulating layer 204. In addition, a conductive layer 211[1], a conductive layer 211[2], a conductive layer 211[3], a conductive layer 212[1], a conductive layer 212[2], a conductive layer 213[1], a conductive layer 213[2], a conductive layer 214[1], a conductive layer 214[2], and a conductive layer 214[3] over an insulating layer 206.

[0356] The conductive layer 211[1] is connected to the conductive layer 211[2] through the conductive layer 271[1]. Specifically, an opening 225 and an opening 226 are provided in a part of the insulating layer 206 in a region overlapping with the conductive layer 271[1], and the conductive layer 211[1] and the conductive layer 271[1] are in contact with each other in a region overlapping with the opening 225, and the conductive layer 211[2] and the conductive layer 271[1] are in contact with each other in a region overlapping with the opening 226 (see FIGS. 36 and 39).

[0357] By providing a plurality of openings 225 connecting the conductive layer 211[1] and the conductive layer 271[1], the contact resistance between the conductive layer 211[1] and the conductive layer 271[1] can be reduced. By providing a plurality of openings 226 connecting the conductive layer 211[2] and the conductive layer 271[1], the contact resistance between the conductive layer 211[2] and the conductive layer 271[1] can be reduced.

[0358] In addition, the conductive layer 211[2] is connected to the conductive layer 211[3] via the conductive layer 271[2]. The conductive layers 211[1], 271[1], 211[2], 271[2], and 211[3] function as the wiring VL1. Therefore, in FIG. 36, the wiring VL1 extends in the X direction.

[0359] In addition, the conductive layer 212[1] is connected to the conductive layer 212[2] via the conductive layer 272. The conductive layer 212[1], the conductive layer 272, and the conductive layer 212[2] function as the wiring VL2. Therefore, in FIG. 36, the wiring VL2 extends in the X direction.

[0360] The conductive layer 213[1] is connected to the conductive layer 213[2] via the conductive layer 273. The conductive layer 213[1], the conductive layer 273, and the conductive layer 213[2] function as the wiring VL3. Therefore, in FIG. 36, the wiring VL3 extends in the X direction.

[0361] In addition, conductive layer 214[1] is connected to conductive layer 214[2] via conductive layer 274[1], and conductive layer 214[2] is connected to conductive layer 214[3] via conductive layer 272[2]. Conductive layer 214[1], conductive layer 274[1], conductive layer 214[2], conductive layer 272[2], and conductive layer 214[3] function as wiring VL4. Therefore, in FIG. 36, wiring VL4 extends in the X direction.

[0362] The conductive layer 221 functions as a wiring DL and extends in the Y direction in Fig. 36. A part of the conductive layer 221 functions as one of the source electrode and the drain electrode of the transistor Tr1.

[0363] The semiconductor device 100A described in this embodiment further includes a conductive layer 275, a conductive layer 276, a conductive layer 277, a conductive layer 278, a conductive layer 228, a conductive layer 279, and a conductive layer 282 over the insulating layer 204. Further, a conductive layer 215, a conductive layer 216, a conductive layer 217, a conductive layer 221, a conductive layer 222, a conductive layer 223, and a conductive layer 224 over the insulating layer 206.

[0364] The conductive layer 275 functions as the wiring GL4 and extends in the X direction in Fig. 36. A part of the conductive layer 275 functions as the conductive layer 205 that is the gate electrode of the transistor Tr4. In this specification, the conductive layer 205 that functions as the gate electrode of the transistor Tr4 is referred to as the conductive layer 205[4].

[0365] The conductive layer 276 functions as the wiring GL1 and extends in the X direction in Fig. 36. A part of the conductive layer 276 functions as the gate electrode of the transistor Tr1, and another part functions as the gate electrode of the transistor Tr7.

[0366] The conductive layer 277 functions as the wiring GL2 and extends in the X direction in Fig. 36. A part of the conductive layer 277 functions as the gate electrode of the transistor Tr2, and another part functions as the gate electrode of the transistor Tr5.

[0367] The conductive layer 278 functions as the wiring GL3 and extends in the X direction in Fig. 36. A part of the conductive layer 278 functions as the gate electrode of the transistor Tr3, another part functions as the gate electrode of the transistor Tr6, and still another part functions as the gate electrode of the transistor Tr8.

[0368] Conductive layer 271[1], conductive layer 271[2], conductive layer 272, conductive layer 273, conductive layer 274[1], conductive layer 274[2], conductive layer 275, conductive layer 276, conductive layer 277, conductive layer 278, conductive layer 228, conductive layer 279, and conductive layer 282 can be formed simultaneously in the same process using the same material. Furthermore, conductive layer 211[1], conductive layer 211[2], conductive layer 211[3], conductive layer 212[1], conductive layer 212[2], conductive layer 213[1], conductive layer 213[2], conductive layer 214[1], conductive layer 214[2], conductive layer 214[3], conductive layer 215, conductive layer 216, conductive layer 217, conductive layer 221, conductive layer 222, conductive layer 223, and conductive layer 224 can be formed simultaneously using the same material and in the same process.

[0369] A part of the conductive layer 215 functions as the other of the source electrode and the drain electrode of the transistor Tr1. Another part of the conductive layer 215 functions as one of the source electrode and the drain electrode of the transistor Tr2. Still another part of the conductive layer 215 functions as one of the source electrode and the drain electrode of the transistor Tr3.

[0370] The conductive layer 215 is in contact with the conductive layer 279 in a region overlapping with the opening 239 provided in the insulating layer 206 (see FIG. 37). Part of the conductive layer 279 functions as the conductive layer 205, which is the gate electrode of the transistor TrD. Therefore, the other of the source or the drain of the transistor Tr1, the gate of the transistor TrD, the one of the source or the drain of the transistor Tr2, and the one of the source or the drain of the transistor Tr3 are connected to one another through the conductive layer 215. The conductive layer 215 functions as a node NDa.

[0371] In this specification, the conductive layer 205 functioning as the gate electrode of the transistor TrD is referred to as a conductive layer 205[D] (see FIG. 40A), and the semiconductor layer 203 of the transistor TrD is referred to as a semiconductor layer 203[D].

[0372] A part of the conductive layer 214[2] functions as the other of the source electrode and the drain electrode of the transistor Tr2 (see FIG. 36). Therefore, the other of the source and the drain of the transistor Tr2 is connected to the wiring VL4. A part of the conductive layer 216 functions as the other of the source and the drain electrode of the transistor Tr3. The conductive layer 216 is connected to the conductive layer 213[2] through the conductive layer 228. Therefore, the other of the source and the drain of the transistor Tr3 is connected to the wiring VL3.

[0373] Another part of the conductive layer 216 functions as the other of the source electrode and the drain electrode of the transistor Tr6. Thus, the other of the source electrode and the drain electrode of the transistor Tr6 is connected to the wiring VL3.

[0374] Part of the conductive layer 211[2] functions as one of the source electrode and the drain electrode of the transistor Tr4, and therefore, one of the source and the drain of the transistor Tr4 is connected to the wiring VL1 (see FIGS. 36, 37, and 40B).

[0375] In this specification, the conductive layer 208a functioning as one of the source electrode and the drain electrode of the transistor Tr4 is referred to as a conductive layer 208a[4]. The opening 207a of the transistor Tr4 is referred to as an opening 207a[4], and the opening 207b of the transistor Tr4 is referred to as an opening 207b[4]. The semiconductor layer 203 functioning as the semiconductor layer 203 of the transistor Tr4 is referred to as a semiconductor layer 203[4].

[0376] Part of the conductive layer 223 functions as the other of the source and drain electrodes of the transistor Tr4, and the other part functions as one of the source and drain electrodes of the transistor TrD (see FIGS. 36, 37, 40A, and 40B). Thus, the other of the source and drain of the transistor Tr4 is connected to the source and drain of the transistor TrD.

[0377] In this specification, the conductive layer 208b functioning as the other of the source electrode and the drain electrode of the transistor Tr4 is referred to as a conductive layer 208b[4]. The conductive layer 208a functioning as one of the source electrode and the drain electrode of the transistor TrD is referred to as a conductive layer 208a[D]. The opening 207a of the transistor TrD is referred to as an opening 207a[D], and the opening 207b of the transistor TrD is referred to as an opening 207b[D].

[0378] A part of the conductive layer 224 functions as the other of the source electrode and the drain electrode of the transistor TrD, another part functions as one of the source electrode and the drain electrode of the transistor Tr5, and still another part functions as one of the source electrode and the drain electrode of the transistor Tr7. Thus, the other of the source and the drain of the transistor TrD is connected to one of the source and the drain of the transistor Tr5 and one of the source and the drain of the transistor Tr7.

[0379] In this specification, the conductive layer 208b serving as the other of the source and drain electrodes of the transistor TrD is referred to as a conductive layer 208b[D]. The conductive layer 208a serving as one of the source and drain electrodes of the transistor Tr5 is referred to as a conductive layer 208a[5]. The conductive layer 208a serving as one of the source and drain electrodes of the transistor Tr7 is referred to as a conductive layer 208a[7].

[0380] The semiconductor device 100A described in this embodiment includes a conductive layer 281 over a substrate 201. Part of the conductive layer 281 functions as the conductive layer 219 which is the back gate electrode of the transistor TrD. The conductive layer 281 also functions as a node NDb.

[0381] A region where the conductive layer 281 and the conductive layer 282 overlap with each other with the insulating layer 202 and the insulating layer 204 interposed therebetween functions as a capacitor Cs (see FIGS. 36, 37, and 40B). The conductive layer 282 functions as a first electrode of the capacitor Cs, and the conductive layer 281 functions as a second electrode of the capacitor Cs.

[0382] The conductive layer 282 is in contact with the conductive layer 211[2] in a region overlapping with the opening 227 provided in the insulating layer 206. Therefore, the first terminal of the capacitor is connected to the wiring VL1. The conductive layer 281 is connected to the conductive layer 222. Part of the conductive layer 222 functions as the other of the source and drain electrodes of the transistor Tr7, and the other part functions as one of the source and drain electrodes of the transistor Tr8. Therefore, the second terminal of the capacitor is connected to the backgate of the transistor TrD, the other of the source and drain of the transistor Tr7, and one of the source and drain of the transistor Tr8.

[0383] Part of the conductive layer 213[2] functions as the other of the source electrode and the drain electrode of the transistor Tr8. Therefore, the other of the source electrode and the drain electrode of the transistor Tr8 is connected to the wiring VL3.

[0384] A part of the conductive layer 217 functions as the other of the source electrode and the drain electrode of the transistor Tr5. Another part of the conductive layer 217 functions as one of the source electrode and the drain electrode of the transistor Tr6. The conductive layer 217 is connected to a first terminal of the light-emitting element 61. Therefore, the other of the source and the drain of the transistor Tr5 and the one of the source and the drain of the transistor Tr6 are connected to the first terminal of the light-emitting element 61. The conductive layer 217 functions as a node NDc.

[0385] Note that this embodiment shows a structure in which an insulating layer 218 having a flat upper surface is provided above the insulating layer 209. An insulating layer containing an organic material is suitable for the insulating layer 218. For example, the insulating layer 218 can be formed using an acrylic resin, polyimide, polyamide, polyimideamide, epoxy resin, siloxane resin, benzocyclobutene resin, phenol resin, or a precursor of these resins. Alternatively, the insulating layer 218 may be formed using an inorganic material, and CMP treatment may be performed on the upper surface of the insulating layer 218. By reducing the unevenness on the upper surface of the insulating layer 218, the coverage of an insulating layer and a conductive layer formed later can be improved.

[0386] Furthermore, in the semiconductor device 100A, the width Wg of the conductive layer 275 (the length of the conductive layer 275 in the Y direction; the length in the direction perpendicular to the direction in which the conductive layer 275 extends) is preferably set larger than the channel length Ls of the transistor Tr4 connected to the conductive layer 275 (see FIG. 37). More specifically, in the semiconductor device 100A, it is preferable to set the minimum value of the width Wg larger than the maximum value of the channel length Ls. This can reduce signal delays that occur when a signal is supplied to the transistor via the conductive layer 275. The same applies to the conductive layers 276, 277, and 278.

[0387] Furthermore, in the semiconductor device 100A, the width Wp (length in the Y direction; length in the direction perpendicular to the direction in which it extends as the wiring VL1) of the conductive layer (conductive layer 211 (conductive layer 211[1], conductive layer 211[2], and conductive layer 211[3]) and (conductive layer 271 (conductive layer 271[1] and conductive layer 271[2]))) functioning as the wiring VL1 is preferably set to be larger than the width Wr of the conductive layer branching from the conductive layer 211 and used as a lead wiring of the semiconductor device 100A (see FIG. 37 ). More specifically, in the semiconductor device 100A, it is preferable to set the minimum value of the width Wp to be larger than the maximum value of the width Wr. This reduces a decrease in the power supply capability of the conductive layer extending as a power supply line, allowing the semiconductor device 100A to operate stably. This can improve the reliability of the semiconductor device 100A. The same applies to the conductive layers functioning as the wirings VL2, VL3, and VL4.

[0388] 36 and 37 show a configuration in which, for example, a semiconductor layer 203[4] functioning as the other of the source and drain of transistor Tr4 and a semiconductor layer 203[D] functioning as one of the source and drain of transistor TrD are connected by a conductive layer 223. In such a case, the conductive layer 223 can be eliminated by using a semiconductor layer having a shape shown as semiconductor layer 203[4D] in FIG. 38. Note that the semiconductor layer 203[4D] is hatched in FIG. 38. It can be said that the semiconductor layer 203[4D] shown in FIG. 38 has a configuration in which the semiconductor layer 203[4] and the semiconductor layer 203[D] are connected.

[0389] In a plan view, the semiconductor layer 203[4D] has a region overlapping with the opening 207a[4], a region overlapping with the conductive layer 205[4], a region overlapping with the conductive layer 205[D], and a region overlapping with the opening 207b[D]. The semiconductor layer 203[4D] is connected to the conductive layer 211[2] that functions as the conductive layer 208a[4] through the opening 207a[4]. The semiconductor layer 203[4D] is connected to the conductive layer 224 that functions as the conductive layer 208b[D] through the opening 207b[D].

[0390] Furthermore, a region (region 210) of the semiconductor layer 203[4D] between a region overlapping with the conductive layer 205[4] and a region overlapping with the conductive layer 205[D] functions as the other of the source and drain of the transistor Tr4 and also functions as one of the source and drain of the transistor TrD. Therefore, it can be said that the region 210 of the semiconductor layer 203[4D] functions as a wiring or a conductive layer.

[0391] By using the semiconductor layer 203[4D] instead of the semiconductor layer 203[4] and the semiconductor layer 203[D], the formation of the conductive layer 223, the opening 207b[4], and the opening 207a[D] is unnecessary. This reduces the area occupied by the semiconductor device 100A. Furthermore, the integration degree of the semiconductor device 100A can be increased.

[0392] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes or the like.

[0393] Embodiment 6 A semiconductor device according to one embodiment of the present invention can be applied to a display device or the like. Furthermore, a semiconductor device according to one embodiment of the present invention can be applied to a module (also referred to as a "display module") including the display device. In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention will be described.

[0394] Examples of the display module include a module in which a connector such as a flexible printed circuit (FPC) or a tape carrier package (TCP) is attached to a display device, and a module in which an integrated circuit (IC) is mounted by a chip-on-glass (COG) method or a chip-on-film (COF) method.

[0395] <Structural Example of Display Device> FIG. 41A is a perspective view illustrating a structural example of a display device 400 according to one embodiment of the present invention.

[0396] Display device 400 has a configuration in which substrate 411 and substrate 451 are bonded together. In Fig. 41A, substrate 411 is indicated by a dashed line.

[0397] The display device 400 includes a display portion 452, a circuit portion 454a, a circuit portion 454b, a connection portion 457, and a wiring portion 458. Fig. 41A shows an example in which an IC 456 and an FPC 459 are mounted on the display device 400. Therefore, the configuration shown in Fig. 41A can also be said to be a display module including the display device 400, an IC, and an FPC.

[0398] The circuit portion 454a includes, for example, a scanning line driver circuit (also referred to as a gate driver or a scan driver), and the circuit portion 454b includes, for example, a signal line driver circuit (also referred to as a source driver or a data driver).

[0399] The wiring portion 458 has a function of supplying signals and power to the display portion 452, the circuit portion 454a, and the circuit portion 454b. The signals and power are input to the wiring portion 458 from the outside of the display device 400 via the FPC 459. Alternatively, the signals and power are input to the wiring portion 458 from the IC 456.

[0400] 41A shows an example in which an IC 456 is provided on a substrate 451 by a COG method, a COF method, or the like. For example, an IC including one or both of a scan line driver circuit and a signal line driver circuit can be used as the IC 456. Note that the display device 400 and the display module may not include an IC. Alternatively, the IC 456 may be mounted on an FPC by a COF method or the like.

[0401] Note that a scanning line driver circuit may be configured by one or both of the IC 456 and the circuit portion 454a. In this case, the IC 456 may be referred to as a gate driver IC. Also, a signal line driver circuit may be configured by one or both of the IC 456 and the circuit portion 454b. In this case, the IC 456 may be referred to as a source driver IC.

[0402] Display section 452 is a region in display device 400 that displays an image, and has a plurality of periodically arranged pixels 455. Fig. 41A shows an enlarged view of one pixel 455.

[0403] The pixel 455 shown in FIG. 41A includes a pixel 453R that emits red (R) light, a pixel 453G that emits green (G) light, and a pixel 453B that emits blue (B) light. A full-color display can be achieved by configuring one pixel 455 with the pixels 453R, 453G, and 453B. The pixels 453R, 453G, and 453B each function as a subpixel. The display device 400 shown in FIG. 41A illustrates an example in which the pixels 453R, 453B, and 453G that function as subpixels are arranged in a stripe array. Note that the number of subpixels that constitute one pixel 455 is not limited to three and may be four or more. For example, the pixel 455 may include four subpixels that emit R, G, B, and white (W) light, respectively. Alternatively, the pixel 455 may include four subpixels that emit R, G, B, and yellow (Y) light, respectively.

[0404] In this specification, elements relating to red light may be identified by the identification symbol "R," elements relating to green light by the identification symbol "G," and elements relating to blue light by the identification symbol "B," and these elements may be described separately. Furthermore, common elements may be described without identifying the elements. For example, when it is necessary to distinguish between multiple pixels 453, they may be referred to as pixel 453R, pixel 453G, or pixel 453B. Furthermore, when it is not necessary to distinguish between pixel 453R, pixel 453G, and pixel 453B, they may be simply referred to as pixel 453.

[0405] Each of the pixels 453R, 453G, and 453B includes a light-emitting element and a circuit (pixel circuit) that controls the light-emitting luminance of the light-emitting element. The semiconductor device 100 (semiconductor devices 100A to 100L) of one embodiment of the present invention can be used as the pixel 453.

[0406] The connection portion 457 is provided outside the display portion 452. The connection portion 457 can be provided along one side or multiple sides of the display portion 452. The number of connection portions 457 may be single or multiple. FIG. 41A shows an example in which the connection portion 457 is provided so as to surround the four sides of the display portion. The connection portion 457 connects a common electrode of the display element and a wiring portion 458, and can supply a potential to the common electrode.

[0407] Here, for example, the transistor according to one embodiment of the present invention can be used for at least part of the display portion 452, the circuit portion 454a, and the circuit portion 454b included in the display device 400.

[0408] For example, by using a vertical transistor such as the above-described transistor 200C for one or both of the circuit portions 454a and 454b, the area occupied by the circuit portions 454a and 454b can be reduced, and a display device with a narrow frame can be obtained.

[0409] Furthermore, for example, by using a vertical transistor such as the transistor 200C in a pixel circuit included in the display portion 452, the area occupied by the pixel circuit can be reduced, and a high-resolution display device can be obtained. For example, a display device with a resolution of 300 ppi or more, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, or 3000 ppi or more can be realized.

[0410] Note that the display device of one embodiment of the present invention may have a function as a touch panel. For example, various sensing elements (also referred to as sensor elements) that can detect the proximity or contact of a sensed object such as a finger can be applied to the display device.

[0411] Examples of sensor types include capacitance type, resistive film type, surface acoustic wave type, infrared type, optical type, and pressure sensitive type.

[0412] The capacitance type includes, for example, a surface capacitance type and a projected capacitance type. The projected capacitance type includes, for example, a self-capacitance type and a mutual capacitance type. The mutual capacitance type is preferred because it enables simultaneous multi-point detection.

[0413] Examples of touch panels include out-cell, on-cell, and in-cell types. Note that the in-cell type touch panel has a configuration in which electrodes constituting a detection element are provided on one or both of a substrate supporting a display element (also called a display device) and an opposing substrate.

[0414] [Pixel Array] Figures 41B to 41F are plan views illustrating pixel arrays. In a display device according to one embodiment of the present invention, the pixel array is not particularly limited, and various arrays can be applied. Examples of pixel arrays include a stripe array (see Figure 41B), an S-stripe array (see Figure 41C), a delta array (see Figure 41D), a zigzag array (see Figure 41E), and a pentile array (see Figure 41F). Other examples include a mosaic array, a diamond array, and a Bayer array.

[0415] 41B to 41F, examples of the top surface shape of each subpixel (pixel 453R, pixel 453G, and pixel 453B) include a triangle, a square (including a rectangle and a square), a polygon such as a pentagon, shapes with rounded corners of these polygons, an ellipse, and a circle. Here, the top surface shape of each subpixel corresponds to the top surface shape of the display region of the display element of each subpixel. The top surface shape and size of each subpixel can be determined independently. The arrangements of pixel 453R, pixel 453G, and pixel 453B may be interchanged as appropriate. The arrangement of the display elements and the arrangement of the pixel circuits can be the same or different.

[0416] Here, the pentile arrangement is a special pixel arrangement that artificially enhances the resolution. Therefore, a stripe arrangement, for example, can be adopted in a display device. In one embodiment of the present invention, the area occupied by a pixel circuit can be reduced by using vertical transistors such as the above-described transistor 200C for some or all of the transistors constituting the pixel circuit. Therefore, the pixel arrangement can be changed from the pentile arrangement to, for example, a stripe arrangement without reducing the resolution of the display device.

[0417] [Light-emitting element] Examples of the light-emitting element include self-luminous light-emitting elements such as LEDs, organic EL elements (also called OLEDs (organic LEDs)), and semiconductor lasers. As the LED, for example, a mini LED or a micro LED can be used.

[0418] Examples of light-emitting substances that the light-emitting element has include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (quantum dot materials, etc.).

[0419] The light emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, white, etc. Furthermore, the color purity can be improved by providing the light emitting element with a microcavity structure.

[0420] One of a pair of electrodes included in the light-emitting element functions as an anode electrode, and the other electrode functions as a cathode electrode.

[0421] In this embodiment, an example in which an organic EL element is used as a light-emitting element will be described. Therefore, a display device according to one embodiment of the present invention is a display device using an organic EL element.

[0422] Note that the display device according to one embodiment of the present invention is suitable for any of a top emission type that emits light in the direction opposite to the substrate on which the light-emitting element is formed, a bottom emission type that emits light toward the substrate on which the light-emitting element is formed, and a dual emission type that emits light on both sides.

[0423] For example, by using a vertical transistor such as the transistor 200C described above, the area occupied by the pixel circuit can be reduced, thereby increasing the aperture ratio of the pixel, particularly in bottom-emission display devices and dual-emission display devices, and realizing a display device with an aperture ratio of, for example, 50% or more, 55% or more, or 60% or more.

[0424] In this specification and the like, the aperture ratio refers to the ratio of the area of ​​the region through which light is emitted to the area of ​​the pixel.

[0425] <Circuit Configuration Example of Display Device> FIGS. 42, 43A, 43B, 44A, and 44B are block diagrams illustrating circuit configuration examples of a display device 460 that can be used for the display device 400 of one embodiment of the present invention.

[0426] 42, the display device 460 has a display unit 462, a first drive circuit unit 463, and a second drive circuit unit 464. The display unit 462 has a plurality of pixels 461 arranged in a matrix of m rows and n columns (m and n are each an integer of 2 or greater), for example.

[0427] When at least a part of the display device 460 is used in the above-described display device 400, the pixel 461 corresponds to the pixel 453, the display unit 462 corresponds to the display unit 452, the first drive circuit unit 463 corresponds to the circuit unit 454a, and the second drive circuit unit 464 corresponds to the circuit unit 454b. Each of the first drive circuit unit 463 and the second drive circuit unit 464 may include at least a part of the IC 456.

[0428] 42 , the pixel 461 arranged in the first row and first column is indicated as pixel 461[1,1], the pixel 461 arranged in the first row and nth column is indicated as pixel 461[1,n], the pixel 461 arranged in the mth row and first column is indicated as pixel 461[m,1], and the pixel 461 arranged in the mth row and nth column is indicated as pixel 461[m,n]. Note that the pixel 461 arranged in the uth row and vth column (u is an integer of 1 to m, and v is an integer of 1 to n) may be indicated as pixel 461[u,v].

[0429] The display device 460 also has m wires 465 that are arranged parallel or approximately parallel to each other and whose potentials are controlled by a circuit included in a first drive circuit unit 463. The potential of one wire 465 is applied to n pixels 461 arranged in the row direction. Note that a configuration may be adopted in which multiple wires are included per wire 465, in accordance with the configuration of the pixel 461. A display device 460A shown in FIG. 43A shows an example configuration in which two wires are included per wire 465.

[0430] The display device 460 also has n wires 466 that are arranged parallel or approximately parallel to each other and whose potentials are controlled by a circuit included in the second drive circuit unit 464. The potential of one wire 466 is applied to m pixels 461 arranged in the column direction. Note that a configuration may be adopted in which one wire 466 includes multiple wires in accordance with the configuration of the pixel 461.

[0431] The pixel 461 has a function of causing a light-emitting element to emit light with emission intensity according to a data potential written to a pixel circuit selected by the potential of a wiring 465 via a wiring 466, for example.

[0432] The circuit included in the first drive circuit unit 463 functions as, for example, a scanning line drive circuit (sometimes called a gate line drive circuit, gate driver, scan driver, or row driver).

[0433] The circuit included in the second driver circuit unit 464 functions as, for example, a signal line driver circuit (which may also be called a source line driver circuit, a source driver, a data driver, or a column driver). In addition, for example, the circuit may have a function of converting (digital-analog conversion) image data displayed on the display device 460 into a video signal to be supplied to each pixel.

[0434] Note that the pixel 461 can be configured such that, for example, a current to be passed through a light-emitting element is output to a monitor line (not shown). The current output to the monitor line is converted into an analog voltage (current-voltage conversion) or a digital signal (analog-digital conversion) in the second driver circuit unit 464, for example, and can be output to the outside of the display device 460. Using the analog voltage or the digital signal, for example, correction of image data (also referred to as external correction) can be performed outside the display device.

[0435] Specific configuration examples of each element circuit that can be used in the circuits included in the first drive circuit unit 463 and the second drive circuit unit 464 will be described later. Note that, for example, a semiconductor device 480 described later can be used as at least a part of the circuits included in the first drive circuit unit 463 and the second drive circuit unit 464.

[0436] One embodiment of the present invention can employ various configurations as modified examples of the display device 460. For example, as shown in Figures 43A, 43B, 44A, and 44B, a configuration can be employed in which a first driver circuit unit 463L and a first driver circuit unit 463R are arranged to face each other with a display unit 462 interposed therebetween.

[0437] 43B shows a configuration example of a display device 460B having m wirings 465L whose potentials are controlled by a circuit included in a first drive circuit unit 463L, and m wirings 465R whose potentials are controlled by a circuit included in a first drive circuit unit 463R. The potentials of one wiring 465L and one wiring 465R are respectively applied to n pixels 461 arranged in the row direction.

[0438] The display device 460C shown in FIG. 44A is an example of a configuration having m wirings 465 whose potentials are controlled by both a circuit included in a first driver circuit unit 463L and a circuit included in a first driver circuit unit 463R. The potential of one wiring 465 is applied to n pixels 461 arranged in the row direction. By using such a configuration, for example, the actual wiring load (parasitic capacitance and parasitic resistance) can be reduced to 1 / 4. Therefore, for example, the display device can be made faster, have higher definition, higher resolution, have a narrower frame, and have a larger screen.

[0439] A display device 460D shown in FIG. 44B has m / 2 wirings 465L whose potentials are controlled by a circuit included in a first driver circuit unit 463L and m / 2 wirings 465R whose potentials are controlled by a circuit included in a first driver circuit unit 463R. The potential of one wiring 465L is applied to n pixels 461 arranged in the row direction in odd-numbered rows. The potential of one wiring 465R is applied to n pixels 461 arranged in the row direction in even-numbered rows. This configuration can reduce the number of stages of the shift register by half, for example. Therefore, for example, the display device can be made faster, more precise, and more highly resolved, with a narrower frame and a larger screen.

[0440] Although not shown, for example, two second drive circuit sections 464 may be arranged to face each other with the display section 462 interposed therebetween.

[0441] Note that one embodiment of the present invention may be a display device 460 having any of the above-described various structures, and may also be a display device 460 having a sensor portion provided so as to overlap with the display portion 462 when viewed from above. The sensor portion can have the function of, for example, a touch sensor, a near-touch sensor, or a fingerprint sensor. These sensors can be, for example, capacitive sensors or optical sensors.

[0442] In the display device 460 provided with a sensor unit, the first drive circuit unit 463 (or the first drive circuit unit 463L and the first drive circuit unit 463R) may include, for example, a circuit having a function of driving the sensor unit. The second drive circuit unit 464 may include, for example, a circuit having a function of outputting a signal detected by the sensor unit to the outside of the display device.

[0443] [Peripheral Driving Circuit] Next, a configuration example of each element circuit that can be used in the peripheral driving circuit of the display device 460 will be described.

[0444] In this specification and the like, the circuits included in the first drive circuit unit 463 and the circuits included in the second drive circuit unit 464 of the display device 460 may be collectively referred to as the "peripheral drive circuit."

[0445] The peripheral driver circuit can be configured using various component circuits. Examples of such component circuits include shift register circuits, flip-flop circuits, latch circuits, buffer circuits, inverter circuits, and level shifter circuits. Other examples include multiplexer circuits, demultiplexer circuits, source follower circuits, source-grounded amplifier circuits, sample-and-hold circuits, and switch circuits (e.g., transmission gates and analog switches). Other examples include current-voltage converter circuits, analog-to-digital converter circuits, digital-to-analog converter circuits, operational amplifier circuits, comparator circuits, pass-transistor logic circuits, encoder circuits, decoder circuits, and gate circuits (e.g., AND circuits, OR circuits, and NOT circuits). Other examples include circuits that combine these circuits. These component circuits can be configured using, for example, transistors and capacitive elements.

[0446] In one embodiment of the present invention, various transistors can be used as transistors included in the peripheral driver circuit. For example, vertical transistors such as the transistor 200C described above can be used as some or all of the transistors included in the peripheral driver circuit.

[0447] By using vertical transistors for some or all of the transistors constituting the peripheral driver circuit, it is possible to reduce the area occupied by, for example, buffer circuits constituting the circuit included in the first driver circuit unit 463. This makes it possible to narrow the frame of the display device. Also, it is possible to reduce the area occupied by, for example, demultiplexers and source followers constituting the circuit included in the second driver circuit unit 464. This makes it possible to achieve higher resolution and higher definition of the display device.

[0448] Note that some or all of the transistors included in the peripheral driver circuits can be OS transistors, for example. Alternatively, both OS transistors and Si transistors can be used.

[0449] As described above, OS transistors have the characteristic of having an extremely small off-state current. Furthermore, OS transistors have the characteristic that the off-state current hardly increases even in a high-temperature environment, and the on-state current is not easily reduced. Si transistors have a higher operating speed than OS transistors. Furthermore, by connecting the gates of an n-type transistor and a p-type transistor, Si transistors can be used to form a CMOS circuit (e.g., a circuit that operates complementarily, a CMOS logic gate, a CMOS logic circuit, or the like).

[0450] It is also possible to configure a CMOS circuit using an OS transistor as an n-type transistor and a Si transistor as a p-type transistor. By using a combination of an OS transistor and a Si transistor, a semiconductor device with low power consumption and high operating speed can be realized. Therefore, depending on the specifications of the display device, OS transistors and Si transistors may be used as appropriate for the transistors that configure the peripheral driver circuits.

[0451] 45A to 45E are circuit diagrams illustrating configuration examples of a semiconductor device that can be used in a peripheral driver circuit. The semiconductor device can be used, for example, as part of a scanning line driver circuit (such as a circuit included in the first driver circuit unit 463). It can also be used, for example, as part of a shift register.

[0452] A semiconductor device 480 shown in FIG. 45A includes m register units 481 and m buffer units 482. The semiconductor device 480 is connected to m wirings GLa and m wirings GLb. The m register units 481 are connected to each other via m wirings SR. FIG. 45A illustrates a portion of the semiconductor device 480, including register units 481_u to 481_u+2, buffer units 482_u to 482_u+2, wirings SR_u-1 to SR_u+4, wirings GLa_u to GLa_u+2, and wirings GLb_u to GLb_u+2. m is an integer of 2 or more. u is an integer of 1 to m. Note that u+α (α is an integer of 1 or more) does not exceed m. u-α is not less than 1.

[0453] FIG. 45B is a circuit diagram illustrating an example configuration of the register unit 481 and the buffer unit 482. FIG. 45C is a circuit block corresponding to the register unit 481 and the buffer unit 482. The register unit 481 can be applied to each of the register units 481_1 to 481_m. The buffer unit 482 can be applied to each of the buffer units 482_1 to 482_m. That is, for example, in the register unit 481_u, the wiring IN81 is connected to the wiring SR_u-1, the wiring IN82 is connected to the wiring SR_u+2, and the wiring OUT81 is connected to the wiring SR_u. Furthermore, for example, in the buffer unit 482_u, the wiring OUT8A is connected to the wiring GLa_u, and the wiring OUT8B is connected to the wiring GLb_u. Note that the wirings IN81, IN8A, IN8B, VLD, and VLS are not shown in FIGS. 45A and 45C. The same applies to the register units 481_1 to 481_u-1 and the register units 481_u+1 to 481_m, and the same applies to the buffer units 482_1 to 482_u-1 and the buffer units 482_u+1 to 482_m.

[0454] That is, in the semiconductor device 480, the wiring OUT81 in the register portion 481_u-1 is connected to the wiring IN81 in the register portion 481_u through the wiring SR_u-1, and the wiring OUT81 in the register portion 481_u is connected to the wiring IN81 in the register portion 481_u+1 through the wiring SR_u. With this configuration, the register portions 481_1 to 481_m are sequentially selected, and a desired potential can be applied to the wiring GLa_u and the wiring GLb_u in the buffer portion 482_u connected to the selected register portion 481_u. Note that in the semiconductor device 480, the potential of the wiring VLS is applied to the wiring GLa_u and the wiring GLb_u in the buffer portion 482_u connected to the unselected register portion 481_u.

[0455] The register unit 481 shown in FIG. 45B includes a transistor M81, a transistor M82, a transistor M83, a transistor M84, a transistor M85, and a transistor M86. The transistor M81 brings the wiring VLD and the wiring NL81 into a conductive state or a non-conductive state depending on the potential of the wiring IN81. The transistor M82 brings the wiring VLD and the wiring NL82 into a conductive state or a non-conductive state depending on the potential of the wiring IN82. The transistor M83 brings the wiring VLS and the wiring NL81 into a conductive state or a non-conductive state depending on the potential of the wiring NL82. The transistor M84 brings the wiring VLS and the wiring NL82 into a conductive state or a non-conductive state depending on the potential of the wiring IN81. The transistor M85 has a function of bringing the wiring IN83 and the wiring OUT81 into a conductive state or a non-conductive state depending on the potential of the wiring NL81. The transistor M86 has a function of bringing the wiring VLS and the wiring OUT81 into a conductive state or a non-conductive state depending on the potential of the wiring NL82.

[0456] 45B includes a transistor M8A, a transistor M8B, a transistor M8C, and a transistor M8D. The transistor M8A brings the wiring IN8A and the wiring OUT8A into electrical contact or non-conduction state depending on the potential of the wiring NL81. The transistor M8B brings the wiring IN8B and the wiring OUT8B into electrical contact or non-conduction state depending on the potential of the wiring NL81. The transistor M8C brings the wiring VLS and the wiring OUT8A into electrical contact or non-conduction state depending on the potential of the wiring NL82. The transistor M8D brings the wiring VLS and the wiring OUT8B into electrical contact or non-conduction state depending on the potential of the wiring NL82.

[0457] FIG. 45D is a timing chart illustrating an example of the operation of the register unit 481 and the buffer unit 482 shown in FIG. 45B.

[0458] In the following description of the operation, it is assumed that a potential H is applied to the wiring VLD and a potential L is applied to the wiring VLS. It is also assumed that either the potential H or the potential L is applied to each of the wirings IN81, IN82, IN83, IN8A, and IN8B. Note that the potential H is higher than the potential L. For example, it is assumed that the potential H is higher than the potential L by at least the threshold voltage of the transistor.

[0459] 45D shows potentials (potential H or potential L) applied to the wirings IN81, IN82, IN83, IN8A, and IN8B in each period (periods T81 to T83) of the operation. The timing chart also shows changes in the potentials of the wirings NL81, NL82, OUT81, OUT8A, and OUT8B.

[0460] In the period T81, a potential L is applied to the wirings IN81 and IN82. The potential of the wiring NL82 is also assumed to be a potential H. Therefore, the potential L is applied to the wiring NL81. At this time, the transistors M85, M8A, and M8B are each in an off state (non-conductive state), and the transistors M86, M8C, and M8D are each in an on state (conductive state). Therefore, the potential L is applied to the wirings OUT81, OUT8A, and OUT8B, regardless of the potentials (potential H or potential L) of the wirings IN83, IN8A, and IN8B. In the following description of the operation, unless otherwise specified, the potential of each wiring is assumed to be maintained at the potential of the previous period.

[0461] In the period T82, a potential H is applied to the wiring IN81, so that the potential of the wiring NL82 becomes a potential L and the potential of the wiring NL81 becomes a potential H. Then, the transistors M85, M8A, and M8B are turned on, and the transistors M86, M8C, and M8D are turned off. Therefore, the potentials (potential H or potential L) of the wirings IN83, IN8A, and IN8B are applied to the wirings OUT81, OUT8A, and OUT8B, respectively, via the transistors M85, M8A, and M8B. Note that even if the potential L is applied to the wiring IN81 after that, the potentials of the wirings NL82 and NL81 are maintained.

[0462] In the period T83, a potential H is applied to the wiring IN82, so that the potential of the wiring NL82 becomes the potential H and the potential of the wiring NL81 becomes the potential L. Then, the transistors M85, M8A, and M8B are turned off, and the transistors M86, M8C, and M8D are turned on. Therefore, the potential L is applied to the wirings OUT81, OUT8A, and OUT8B regardless of the potentials (potential H or potential L) of the wirings IN83, IN8A, and IN8B. Note that even if the potential L is applied to the wiring IN82 after that, the potentials of the wirings NL82 and NL81 are maintained.

[0463] 45E is a circuit diagram illustrating a modified example of the register unit 481 and the buffer unit 482. The register unit 481a and the buffer unit 482a shown in FIG. 45E differ from the register unit 481 and the buffer unit 482 in that they include a bootstrap circuit. That is, the register unit 481a includes a transistor M87 and a capacitance element C81 in addition to the register unit 481, and the buffer unit 482a includes a transistor M8E, a transistor M8F, a capacitance element C8A, and a capacitance element C8B in addition to the buffer unit 482. Note that the capacitance elements C81, C8A, and C8B are sometimes referred to as bootstrap capacitances.

[0464] The gate of the transistor M87 is connected to the wiring VLD. The gate of the transistor M85 is connected to the wiring NL81 via the source and drain of the transistor M87. The gate of the transistor M85 is connected to the wiring OUT81 via the capacitor C81.

[0465] The gate of the transistor M8E is connected to the wiring VLD. The gate of the transistor M8A is connected to the wiring NL81 via the source and drain of the transistor M8E. The gate of the transistor M8A is connected to the wiring OUT8A via the capacitor C8A.

[0466] The gate of the transistor M8F is connected to the wiring VLD. The gate of the transistor M8B is connected to the wiring NL81 via the source and drain of the transistor M8F. The gate of the transistor M8B is connected to the wiring OUT8B via the capacitor C8B.

[0467] In the register unit 481, when the transistor M85 transfers the potential H from the wiring IN83 to the wiring OUT81, a potential drop occurs due to the threshold voltage. Therefore, by employing a bootstrap circuit as in the register unit 481a, the transistor M85 can be maintained in an on state by capacitive coupling due to the bootstrap capacitance. Therefore, the potential H can be transferred to the wiring OUT81 without a potential drop due to the threshold voltage.

[0468] Similarly, in the buffer portion 482, when the transistor M8A transfers the potential H from the wiring IN8A to the wiring OUT8A, a potential drop occurs due to the threshold voltage. Also, when the transistor M8B transfers the potential H from the wiring IN8B to the wiring OUT8B, a potential drop occurs due to the threshold voltage. Therefore, by employing a bootstrap circuit as in the buffer portion 482a, the transistors M8A and M8B can be maintained in an on state by capacitive coupling due to bootstrap capacitance. Therefore, the potential H can be transferred to the wiring OUT8A and the wiring OUT8B without a potential drop due to the threshold voltage.

[0469] <Example of Cross-Sectional Structure of Display Device> FIG. 46 is a cross-sectional view illustrating an example of a cross-sectional structure of a display device of one embodiment of the present invention.

[0470] 46 , the structures shown in the regions 490a, 490b, and 490c can be used in the display device 400. For example, the structure shown in the region 490a can be used in a region where the pixel 453 is provided. The structure shown in the region 490b can be used in a region where the circuit portion 454a, the circuit portion 454b, and the like are provided. The structure shown in the region 490c can be used in a region where the FPC 459 is provided.

[0471] The display device 490 has a substrate 351 and a substrate 352. An adhesive layer 342 is provided between the substrates 351 and 352. The substrate 352 faces the substrate 351 with the adhesive layer 342 interposed therebetween. Note that the region 490c does not have the substrate 352 or the adhesive layer 342.

[0472] An insulating layer 382 is provided on the substrate 352 side of the substrate 351. A transistor, a light-emitting element, and the like are provided on the insulating layer 382.

[0473] Here, as an example, the transistor 200A and the transistor 200B described in the above embodiment are provided in the region 490a, and the transistor 200A described in the above embodiment is provided in the region 490b. Furthermore, a conductive layer 384 is provided in the region 490c. The conductive layer 384 can be formed in the same process as the conductive layers 208a and 208b.

[0474] An insulating layer 218 is provided to cover the transistor 200A and the transistor 200B.

[0475] In the region 490a, a pixel electrode 311 is provided on the insulating layer 218. The pixel electrode 311 is connected to the conductive layer 208b through openings provided in the insulating layer 218 and the insulating layer 209. In addition, an insulating layer 237 is provided on the insulating layer 218. The insulating layer 237 has a region that covers an end portion of the pixel electrode 311.

[0476] An EL layer 313 is provided so as to cover the insulating layer 237 and the pixel electrode 311. A common electrode 315 is provided so as to cover the EL layer 313. A protective layer 331 is provided so as to cover the common electrode 315.

[0477] The pixel electrode 311 and the common electrode 315 overlap with each other via the EL layer 313, and the pixel electrode 311 and the EL layer 313 are in contact with each other, and the region where the EL layer 313 and the common electrode 315 are in contact functions as a light-emitting element 330. The pixel electrode 311 functions as one electrode (or a first terminal) of the light-emitting element 330, and the common electrode 315 functions as the other electrode (or a second terminal). The EL layer 313 has a function of emitting light with a luminance corresponding to the amount of current flowing between the pixel electrode 311 and the common electrode 315 via the EL layer 313.

[0478] A light-shielding layer 317 is provided on the substrate 352 on the substrate 351 side.

[0479] In region 490a, an opening is provided in light-shielding layer 317 so as to have an area overlapping with light-emitting element 330. Therefore, light emitted by light-emitting element 330 is emitted to the outside of display device 490 through the opening provided in light-shielding layer 317. In Fig. 46, this state is represented by a dashed arrow and the word "Light."

[0480] In the region 490c, the conductive layer 386 is provided over part of the insulating layer 218. The conductive layer 386 has a region in contact with the conductive layer 384 through openings provided in the insulating layer 218 and the insulating layer 209.

[0481] The conductive layer 386 is connected to the FPC 459 through a connection layer 388. As the connection layer 388, for example, an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like can be used.

[0482] <Structure Examples of Light-Emitting Element> In one embodiment of the present invention, light-emitting elements with various structures can be used as light-emitting elements included in a display device.

[0483] 47A, 47B, 48A, and 48B are cross-sectional views illustrating light-emitting elements with various configurations.

[0484] 47A includes light-emitting elements 330R, 330G, and 330B between substrates 351 and 352. Light-emitting element 330R is a display element included in a pixel that emits red light, light-emitting element 330G is a display element included in a pixel that emits green light, and light-emitting element 330B is a display element included in a pixel that emits blue light. When describing matters common to light-emitting element 330R, light-emitting element 330G, and light-emitting element 330B, they may be simply referred to as light-emitting element 330.

[0485] 47A omits some of the configuration between the substrate 351 and the light-emitting element 330 and the configuration between the substrate 352 and the light-emitting element 330. The display device 490A includes, between the substrate 351 and the light-emitting element 330, for example, a transistor that constitutes a pixel circuit and an insulating layer 218 that is provided to cover the transistor.

[0486] The display device 490A employs an SBS (Side By Side) structure, which allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in the selection of materials and configurations, and facilitating the improvement of light emission intensity and reliability.

[0487] The display device 490A is a top-emission display device. In the top-emission type, a transistor or the like can be arranged to overlap with a light-emitting region of a light-emitting element, and therefore the aperture ratio of a pixel can be increased compared to a bottom-emission type.

[0488] On the insulating layer 218, a light emitting element 330R, a light emitting element 330G, and a light emitting element 330B are provided.

[0489] The light-emitting element 330R has a pixel electrode 311R on the insulating layer 218, an EL layer 313R on the pixel electrode 311R, and a common electrode 315 on the EL layer 313R. The light-emitting element 330R shown in Fig. 47A emits red (R) light. The EL layer 313R has a light-emitting layer that emits red light.

[0490] The light-emitting element 330G has a pixel electrode 311G on the insulating layer 218, an EL layer 313G on the pixel electrode 311G, and a common electrode 315 on the EL layer 313G. The light-emitting element 330G shown in Fig. 47A emits green (G) light. The EL layer 313G has a light-emitting layer that emits green light.

[0491] The light-emitting element 330B has a pixel electrode 311B on the insulating layer 218, an EL layer 313B on the pixel electrode 311B, and a common electrode 315 on the EL layer 313B. The light-emitting element 330B shown in Fig. 47A emits blue (B) light. The EL layer 313B has a light-emitting layer that emits blue light.

[0492] 47A, the EL layers 313R, 313G, and 313B are all shown to have the same thickness, but this is not limited to this. The EL layers 313R, 313G, and 313B may have different thicknesses. For example, it is preferable to set the thicknesses of the EL layers 313R, 313G, and 313B so that the optical path length increases the intensity of the light emitted by each layer. This allows for a microcavity structure to be realized, and the color purity of the light emitted from each light-emitting element to be improved.

[0493] The pixel electrode 311R is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330R through openings provided in the insulating layers 209 and 218. The pixel electrode 311G is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330G. The pixel electrode 311B is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330B.

[0494] Ends of the pixel electrode 311R, the pixel electrode 311G, and the pixel electrode 311B are covered with an insulating layer 237. The insulating layer 237 functions as a partition wall. The insulating layer 237 can be formed in a single layer structure or a stacked layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the material that can be used for the insulating layer 209 and the material that can be used for the insulating layer 218 can be used for the insulating layer 237. The insulating layer 237 can insulate the pixel electrode from the common electrode. Furthermore, the insulating layer 237 can insulate adjacent light-emitting elements from each other.

[0495] The common electrode 315 is a continuous film provided in common to the light-emitting elements 330R, 330G, and 330B. The common electrode 315 shared by the plurality of light-emitting elements is connected to a conductive layer formed of the same material and in the same process as the pixel electrodes 311R, 311G, and 311B in an area where no light-emitting element is provided.

[0496] In the display device of one embodiment of the present invention, a conductive film that transmits visible light is preferably used for the electrode from which light is extracted, and a conductive film that reflects visible light is preferably used for the electrode from which light is not extracted, out of the pixel electrode and the common electrode.

[0497] A conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.

[0498] Materials for forming the pair of electrodes of the light-emitting element can include metals, alloys, electrically conductive compounds, and mixtures thereof, as appropriate. Specific examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, as well as alloys containing these metals in appropriate combination. Examples of such materials include indium tin oxide (In-Sn oxide), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Examples of such materials include aluminum alloys, such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and silver alloys, such as an alloy of silver, magnesium, and an alloy of silver, palladium, and copper (also referred to as Ag-Pd-Cu or APC). Other examples of the material include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not exemplified above, rare earth metals such as europium and ytterbium, alloys containing appropriate combinations of these, and graphene.

[0499] The light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one electrode of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transmissive / semi-reflective electrode), and the other electrode is preferably an electrode that is reflective to visible light (reflective electrode). By having the light-emitting element have a microcavity structure, light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.

[0500] The light transmittance of the transparent electrode is 40% or more. For example, it is preferable to use an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more for the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transmissive / semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and less than 100%, preferably 70% or more and less than 100%. Furthermore, the resistivity of these electrodes is 1×10 −２ Preferably, it is Ωcm or less.

[0501] The EL layer 313R, the EL layer 313G, and the EL layer 313B are each provided in an island shape. In FIG. 47A , the ends of adjacent EL layers 313R and 313G overlap, and the ends of adjacent EL layers 313G and 313B overlap. Although not shown, the ends of adjacent EL layers 313R and 313B overlap. When forming island-shaped EL layers using a metal mask (or a fine metal mask), the ends of adjacent EL layers may overlap as shown in FIG. 47A , but this is not limited to this. That is, adjacent EL layers may not overlap but may be spaced apart. Furthermore, the display device may have both overlapping portions between adjacent EL layers and portions between adjacent EL layers that do not overlap but are spaced apart.

[0502] Each of the EL layers 313R, 313G, and 313B includes at least a light-emitting layer. The light-emitting layer includes one or more light-emitting materials. As the light-emitting material, a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. Furthermore, a material that emits near-infrared light can also be used as the light-emitting material.

[0503] Examples of the light-emitting material include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0504] The light-emitting layer may contain one or more organic compounds (such as a host material and an assist material) in addition to a light-emitting substance (guest material). As the one or more organic compounds, one or both of a substance with high hole-transporting properties (hole-transporting material) and a substance with high electron-transporting properties (electron-transporting material) can be used. Furthermore, as the one or more organic compounds, a bipolar substance (a substance with high electron-transporting properties and high hole-transporting properties) or a TADF material may be used.

[0505] The light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex. This configuration allows efficient emission using Exciplex-Triple Energy Transfer (ExTET), which is energy transfer from the exciplex to the light-emitting material (phosphorescent material). By selecting a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest-energy absorption band of the light-emitting material, the energy transfer becomes smooth and light emission can be achieved efficiently. This configuration allows the light-emitting element to simultaneously achieve high efficiency, low-voltage operation, and a long life.

[0506] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting properties (hole-injecting layer), a layer containing a hole-transporting material (hole-transporting layer), a layer containing a substance with high electron-blocking properties (electron-blocking layer), a layer containing a substance with high electron-injecting properties (electron-injecting layer), a layer containing an electron-transporting material (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer).In addition, the EL layer may include one or both of a bipolar substance and a TADF material.

[0507] The light-emitting element can be formed using either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. Each of the layers constituting the light-emitting element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0508] The light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer. The tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer injects electrons into one of the two light-emitting units and holes into the other. The tandem structure allows the light-emitting element to emit light with high luminous intensity. Furthermore, the tandem structure can reduce the current required to achieve the same luminous intensity compared to a single structure, thereby improving reliability. The tandem structure can also be called a stacked structure.

[0509] In Figure 47A, when light-emitting elements with a tandem structure are used, it is preferable that the EL layer 313R has a structure having multiple light-emitting units that emit red light, the EL layer 313G has a structure having multiple light-emitting units that emit green light, and the EL layer 313B has a structure having multiple light-emitting units that emit blue light.

[0510] A protective layer 331 is provided on the light-emitting elements 330R, 330G, and 330B. The protective layer 331 and the substrate 352 are bonded via an adhesive layer 342. A light-shielding layer 317 is provided on the substrate 352. For example, a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements. In FIG. 47A , the space between the substrates 352 and 351 is filled with the adhesive layer 342, thereby applying a solid sealing structure. Alternatively, a hollow sealing structure may be applied in which the space is filled with an inert gas (such as nitrogen or argon). In this case, the adhesive layer 342 may be provided so as not to overlap the light-emitting elements. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer 342.

[0511] By providing the protective layer 331 on the light emitting elements 330R, 330G, and 330B, the reliability of the light emitting elements can be improved.

[0512] The protective layer 331 can have a single layer structure or a stacked structure of two or more layers. The conductivity of the protective layer 331 does not matter. The protective layer 331 can be formed using at least one of an insulating film, a semiconductor film, and a conductive film.

[0513] The protective layer 331 has an inorganic film, which can prevent oxidation of the common electrode 315 and prevent impurities (such as moisture and oxygen) from entering the light-emitting element, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.

[0514] An inorganic insulating film can be used for the protective layer 331. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. Specific examples of these inorganic insulating films are as described above. In particular, the protective layer 331 preferably contains a nitride or a nitride oxide, and more preferably contains a nitride.

[0515] The protective layer 331 may be an inorganic film containing ITO, In—Zn oxide, Ga—Zn oxide, Al—Zn oxide, IGZO, or the like. The inorganic film preferably has high resistance, specifically, preferably has higher resistance than the common electrode 315. The inorganic film may further contain nitrogen.

[0516] When light emitted from the light-emitting element is extracted through the protective layer 331, it is preferable that the protective layer 331 has high transparency to visible light. For example, ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.

[0517] For example, a stacked structure of aluminum oxide and silicon nitride on the aluminum oxide, or a stacked structure of aluminum oxide and IGZO on the aluminum oxide can be used as the protective layer 331. By using such a stacked structure, impurities (such as water and oxygen) can be prevented from entering the EL layer side.

[0518] Furthermore, the protective layer 331 may have an organic film. For example, the protective layer 331 may have both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 331 include the organic insulating films that can be used for the insulating layer 218.

[0519] The display device 490A is a top-emission type. Light emitted by the light-emitting elements is emitted toward the substrate 352. The substrate 352 is preferably made of a material that is highly transparent to visible light. The pixel electrodes 311R, 311G, and 311B contain a material that reflects visible light, and the counter electrode (common electrode 315) contains a material that transmits visible light.

[0520] A light-shielding layer 317 is preferably provided on the surface of the substrate 352 facing the substrate 351. The light-shielding layer 317 can be provided between adjacent light-emitting elements.

[0521] A colored layer such as a color filter may be provided on the surface of the substrate 352 on the substrate 351 side or on the protective layer 331. When a color filter is provided over the light-emitting element, the color purity of light emitted from the pixel can be increased.

[0522] The colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges. For example, a red (R) color filter that transmits light in the red wavelength range, a green (G) color filter that transmits light in the green wavelength range, and a blue (B) color filter that transmits light in the blue wavelength range can be used. Each colored layer can be made of one or more of a metal material, a resin material, a pigment, and a dye. The colored layers are formed at desired positions by a printing method, an inkjet method, an etching method using photolithography, or the like.

[0523] Various optical members can be arranged on the outside of the substrate 352 (the surface opposite to the substrate 351). Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. In addition, a surface protection layer such as an anti-static film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches during use, and an impact absorbing layer may be arranged on the outside of the substrate 352. For example, a glass layer or a silica layer (SiO ｘ The surface protection layer can be preferably formed of a material such as DLC (diamond-like carbon), aluminum oxide (AlO ｘ ), polyester-based materials, or polycarbonate-based materials may also be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.

[0524] The substrate 351 and the substrate 352 can each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like. A material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted. Using a flexible material for the substrate 351 and the substrate 352 increases the flexibility of the display device, making it possible to realize a flexible display (for example, a bendable display, a foldable display, a rollable display, a slidable display, or a stretchable display). Furthermore, a polarizing plate may be used for at least one of the substrates 351 and 352.

[0525] The substrates 351 and 352 may each be made of polyester such as polyethylene terephthalate or polyethylene naphthalate, polyacrylonitrile, acrylic resin, polymethyl methacrylate, polycarbonate (PC), polyethersulfone, polyimide, polyamide (nylon, aramid, etc.), polysiloxane, cycloolefin resin, polystyrene, polyamideimide, polyurethane, polyvinyl chloride, polyvinylidene chloride, polypropylene, polytetrafluoroethylene, ABS resin, cellulose nanofiber, etc. At least one of the substrates 351 and 352 may be made of glass having a thickness sufficient to provide flexibility.

[0526] When a circularly polarizing plate is superimposed on a display device, it is preferable that the display device has a substrate with high optical isotropy. A substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). Examples of films with high optical isotropy include triacetyl cellulose (also called TAC or cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.

[0527] The adhesive layer 342 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet curable adhesive), a reactive curable adhesive, a thermosetting adhesive, and an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide, PVC (polyvinyl chloride), PVB (polyvinyl butyral), and EVA (ethylene vinyl acetate). Materials with low moisture permeability, such as epoxy resin, are particularly preferred. Two-component resins may also be used. Adhesive sheets may also be used.

[0528] In one embodiment of the present invention, a light-emitting element can be fabricated by a vacuum process such as a vapor deposition method, or a solution process such as a spin coating method or an inkjet method. Examples of vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, and chemical vapor deposition (CVD). In particular, functional layers included in the EL layer (e.g., hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) can be formed by a vapor deposition method (e.g., vacuum deposition), a coating method (e.g., dip coating, die coating, bar coating, spin coating, spray coating), a printing method (e.g., inkjet printing, screen printing (stencil printing), offset printing (lithographic printing), flexography (relief printing), gravure printing, microcontact printing, etc.), etc.

[0529] 47B includes a light-emitting element 330R, a light-emitting element 330G, a light-emitting element 330B, a colored layer 332R that transmits red light, a colored layer 332G that transmits green light, and a colored layer 332B that transmits blue light. The display device 490B differs from the display device 490A mainly in that a light-emitting element having a common EL layer 313 and a colored layer (such as a color filter) are used for each sub-pixel of each color. Note that descriptions of parts that are the same as those of the display devices described above may be omitted.

[0530] The light emitting element 330R has a pixel electrode 311R, an EL layer 313 on the pixel electrode 311R, and a common electrode 315 on the EL layer 313. The light emitted from the light emitting element 330R is extracted as red light to the outside of the display device 490B via the colored layer 332R.

[0531] The light emitting element 330G has a pixel electrode 311G, an EL layer 313 on the pixel electrode 311G, and a common electrode 315 on the EL layer 313. Light emitted from the light emitting element 330G is extracted as green light to the outside of the display device 490B via a colored layer 332G.

[0532] The light emitting element 330B has a pixel electrode 311B, an EL layer 313 on the pixel electrode 311B, and a common electrode 315 on the EL layer 313. Light emitted from the light emitting element 330B is extracted as blue light to the outside of the display device 490B via a colored layer 332B.

[0533] The light-emitting elements 330R, 330G, and 330B each share an EL layer 313 and a common electrode 315. The configuration in which the EL layer 313 is common to the subpixels of each color can reduce the number of manufacturing steps compared to the configuration in which different EL layers are provided for the subpixels of each color.

[0534] 47B emit white light. The white light emitted by the light-emitting elements 330R, 330G, and 330B passes through the colored layers 332R, 332G, and 332B, thereby obtaining light of a desired color.

[0535] A light-emitting element that emits white light preferably includes two or more light-emitting layers. When two light-emitting layers are used to obtain white light, the light-emitting layers are selected so that the emission colors of the two light-emitting layers have a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer have a complementary color relationship, a configuration in which the light-emitting element as a whole emits white light can be obtained. Furthermore, when white light is obtained using three or more light-emitting layers, the emission colors of the three or more light-emitting layers are combined to form a configuration in which the light-emitting element as a whole emits white light.

[0536] The EL layer 313 preferably includes, for example, a light-emitting layer having a light-emitting substance that emits blue light and a light-emitting layer having a light-emitting substance that emits visible light with a wavelength longer than that of blue. The EL layer 313 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 313 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0537] A tandem structure is preferably used for the light-emitting element emitting white light. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow (Y) light and a light-emitting unit that emits blue (B) light, a two-stage tandem structure having a light-emitting unit that emits red (R) light and green (G) light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light, in this order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light and red light, and a light-emitting unit that emits blue light, in this order, or the like can be applied. For example, examples of the number of layers of the light-emitting units and the order of colors, from the anode side, include a two-layer structure of B and Y, a two-layer structure of B and X (light-emitting unit X), a three-layer structure of B, Y, and B, and examples of the number of layers of the light-emitting layers in light-emitting unit X and the order of colors, from the anode side, include a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, and a three-layer structure of R, G, and R. Furthermore, another layer may be provided between the two light-emitting layers.

[0538] By applying a microcavity structure, a light emitting element configured to emit white light may emit light of a specific wavelength such as red, green or blue intensified form.

[0539] Alternatively, for example, the light-emitting elements 330R, 330G, and 330B shown in FIG. 47B emit blue light. In this case, the EL layer 313 includes one or more light-emitting layers that emit blue light. In a pixel that emits blue light, the blue light emitted by the light-emitting element 330B can be extracted. Furthermore, in a pixel that emits red light and a pixel that emits green light, a color conversion layer can be provided between the light-emitting element 330R or the light-emitting element 330G and the substrate 352 to convert the blue light emitted by the light-emitting element 330R or the light-emitting element 330G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a coloring layer 332R between the color conversion layer and the substrate 352 on the light-emitting element 330R, and a coloring layer 332G between the color conversion layer and the substrate 352 on the light-emitting element 330G. A portion of the light emitted by the light-emitting element may be transmitted directly without being converted by the color conversion layer. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0540] 48A is an example of a display device employing an MML (metal maskless) structure. That is, the display device 490C has light-emitting elements fabricated without using a metal mask (or a fine metal mask). The structure between the substrate 351 and the insulating layer 218 and the structure between the protective layer 331 and the substrate 352 are similar to those of the display device 490A, and therefore will not be described here.

[0541] Furthermore, light-emitting elements with an MML structure can be manufactured without using a metal mask. This makes it possible to realize a display device that exceeds the upper limit of resolution due to the alignment accuracy of the metal mask. Furthermore, it is possible to eliminate the need for equipment for manufacturing the metal mask and the process of cleaning the metal mask. Furthermore, it is possible to mass-produce display devices.

[0542] Furthermore, by adopting the MML structure, it is possible to realize a display device that integrates minute light-emitting elements, and therefore, without artificially increasing the resolution by applying a special pixel arrangement such as a pentile arrangement, it is possible to realize a display device that employs a so-called stripe arrangement in which R, G, and B are arranged in one direction, and has a resolution of 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more.

[0543] In light-emitting devices employing the MML structure, layers including the light-emitting layer are not formed using a fine metal mask, but are formed by depositing the light-emitting layer on one surface and then processing it using photolithography. This makes it possible to realize high-definition display devices or display devices with high aperture ratios, which have been difficult to achieve until now. Furthermore, since the light-emitting layer can be made separately for each color, it is possible to realize display devices with extremely vivid images, high contrast, and high display quality. Furthermore, providing a sacrificial layer on the light-emitting layer reduces damage to the light-emitting layer during the manufacturing process of the display device, thereby improving the reliability of the light-emitting device.

[0544] For example, if a display device is composed of three types of light-emitting elements, namely, a light-emitting element that emits blue light, a light-emitting element that emits green light, and a light-emitting element that emits red light, three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and processing by photolithography three times.

[0545] In FIG. 48A, a light emitting element 330R, a light emitting element 330G, and a light emitting element 330B are provided on an insulating layer 218.

[0546] The light-emitting element 330R includes a conductive layer 324R on the insulating layer 218, a conductive layer 326R on the conductive layer 324R, a layer 333R on the conductive layer 326R, a common layer 314 on the layer 333R, and a common electrode 315 on the common layer 314. The light-emitting element 330R shown in FIG. 48A emits red (R) light. The layer 333R includes a light-emitting layer that emits red light. In the light-emitting element 330R, the layer 333R and the common layer 314 can be collectively referred to as an EL layer. One or both of the conductive layer 324R and the conductive layer 326R can be referred to as a pixel electrode.

[0547] The light-emitting element 330G includes a conductive layer 324G on the insulating layer 218, a conductive layer 326G on the conductive layer 324G, a layer 333G on the conductive layer 326G, a common layer 314 on the layer 333G, and a common electrode 315 on the common layer 314. The light-emitting element 330G shown in FIG. 48A emits green (G) light. The layer 333G includes a light-emitting layer that emits green light. In the light-emitting element 330G, the layer 333G and the common layer 314 can be collectively referred to as an EL layer. Furthermore, one or both of the conductive layer 324G and the conductive layer 326G can be referred to as a pixel electrode.

[0548] The light-emitting element 330B includes a conductive layer 324B on the insulating layer 218, a conductive layer 326B on the conductive layer 324B, a layer 333B on the conductive layer 326B, a common layer 314 on the layer 333B, and a common electrode 315 on the common layer 314. The light-emitting element 330B shown in FIG. 48A emits blue (B) light. The layer 333B includes a light-emitting layer that emits blue light. In the light-emitting element 330B, the layer 333B and the common layer 314 can be collectively referred to as an EL layer. One or both of the conductive layer 324B and the conductive layer 326B can be referred to as a pixel electrode.

[0549] In this specification and the like, among the EL layers included in the light-emitting elements, layers provided in an island shape for each light-emitting element are referred to as layers 333B, 333G, or 333R, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 314. Note that in this specification and the like, the layers 333R, 333G, and 333B may be referred to as island-shaped EL layers or EL layers formed in an island shape, without including the common layer 314.

[0550] The layers 333R, 333G, and 333B are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0551] 48A, the layers 333R, 333G, and 333B are all shown to have the same thickness, but this is not limitative. The layers 333R, 333G, and 333B may have different thicknesses.

[0552] The conductive layer 324R is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330R through openings provided in the insulating layer 209 and the insulating layer 218. The conductive layer 324G is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330G. The conductive layer 324B is connected to a transistor (not shown) included in a pixel circuit corresponding to the light-emitting element 330B.

[0553] The conductive layers 324R, 324G, and 324B are formed so as to cover the openings provided in the insulating layer 218. A layer 328 is filled in the recesses of the conductive layers 324R, 324G, and 324B, respectively.

[0554] The layer 328 has a function of planarizing the recesses of the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B. The conductive layer 326R, the conductive layer 326G, and the conductive layer 326B, which are connected to the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B, are provided on the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B, as well as the layer 328. Therefore, the regions overlapping with the recesses of the conductive layer 324R, the conductive layer 324G, and the conductive layer 324B can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixel. It is preferable to use a conductive layer that functions as a reflective electrode for the conductive layer 324R and the conductive layer 326R.

[0555] The layer 328 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for the layer 328. In particular, the layer 328 is preferably formed using an insulating material, and more preferably using an organic insulating material. For example, the organic insulating material that can be used for the insulating layer 237 can be used for the layer 328.

[0556] 48A shows an example in which the top surface of layer 328 has a flat portion, but there are no particular limitations on the shape of layer 328. The top surface of layer 328 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0557] The height of the upper surface of layer 328 and the height of the upper surface of conductive layer 324R may be the same or approximately the same, or may be different from each other. For example, the height of the upper surface of layer 328 may be lower or higher than the height of the upper surface of conductive layer 324R.

[0558] The end of the conductive layer 326R may be aligned with the end of the conductive layer 324R, or may cover the side surface of the end of the conductive layer 324R. The end of each of the conductive layers 324R and 326R preferably has a tapered shape. Specifically, the end of each of the conductive layers 324R and 326R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 333R provided along the side surface of the pixel electrode has an inclined portion. By tapering the side surface of the pixel electrode, the coverage of the EL layer provided along the side surface of the pixel electrode can be improved.

[0559] The conductive layers 324G and 326G, as well as the conductive layers 324B and 326B, are similar to the conductive layers 324R and 326R, and therefore detailed description thereof will be omitted.

[0560] The top surface and side surfaces of the conductive layer 326R are covered with the layer 333R. Similarly, the top surface and side surfaces of the conductive layer 326G are covered with the layer 333G, and the top surface and side surfaces of the conductive layer 326B are covered with the layer 333B. Therefore, the entire region where the conductive layers 326R, 326G, and 326B are provided can be used as the light-emitting regions of the light-emitting elements 330R, 330G, and 330B, thereby increasing the aperture ratio of the pixel.

[0561] Part of the top surface and side surfaces of each of the layers 333R, 333G, and 333B are covered with the insulating layer 325 and the insulating layer 327. A common layer 314 is provided on the layers 333R, 333G, and 333B, and the insulating layer 325 and the insulating layer 327, and a common electrode 315 is provided on the common layer 314. The common layer 314 and the common electrode 315 are each a continuous film provided in common to a plurality of light-emitting elements.

[0562] In FIG. 48A , the insulating layer 237 shown in FIG. 47A and the like is not provided between the conductive layer 326R and the layer 333R. That is, the display device 490C does not have an insulating layer (also referred to as a partition wall, bank, or spacer) that is in contact with the pixel electrode and covers the upper edge of the pixel electrode. Therefore, the distance between adjacent light-emitting elements can be made extremely narrow. Therefore, a high-definition and high-resolution display device can be obtained. Furthermore, a mask (e.g., a photomask) for forming the insulating layer is not required, which reduces the manufacturing cost of the display device.

[0563] As described above, the layers 333R, 333G, and 333B each include a light-emitting layer. The layers 333R, 333G, and 333B each preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, the layers 333R, 333G, and 333B each preferably include a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. Alternatively, the layers 333R, 333G, and 333B each preferably include a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. The surfaces of the layers 333R, 333G, and 333B are exposed during the manufacturing process of the display device. Therefore, providing one or both of a carrier transport layer and a carrier block layer on the light-emitting layer can prevent the light-emitting layer from being exposed to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.

[0564] The common layer 314 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 314 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The common layer 314 is shared by the light-emitting element 330R, the light-emitting element 330G, and the light-emitting element 330B.

[0565] The side surfaces of the layers 333R, 333G, and 333B are covered with the insulating layer 325. The insulating layer 327 covers the side surfaces of the layers 333R, 333G, and 333B with the insulating layer 325 interposed therebetween.

[0566] The side surfaces (and even part of the top surfaces) of the layers 333R, 333G, and 333B are covered with at least one of the insulating layer 325 and the insulating layer 327, which prevents the common layer 314 (or the common electrode 315) from contacting the pixel electrode and the side surfaces of the layers 333R, 333G, and 333B, thereby preventing short circuits in the light-emitting element, thereby improving the reliability of the light-emitting element.

[0567] The insulating layer 325 is preferably in contact with each side surface of the layer 333R, the layer 333G, and the layer 333B. When the insulating layer 325 is in contact with the layer 333R, the layer 333G, and the layer 333B, peeling of the layer 333R, the layer 333G, and the layer 333B can be prevented, and the reliability of the light-emitting element can be improved.

[0568] The insulating layer 327 is provided on the insulating layer 325 so as to fill the recesses in the insulating layer 325. The insulating layer 327 preferably covers at least a part of the side surface of the insulating layer 325.

[0569] By providing the insulating layers 325 and 327, the gaps between adjacent island-shaped layers can be filled, which reduces large unevenness in height on the surface where layers (for example, the carrier injection layer and the common electrode) are formed on the island-shaped layers, thereby making the surface flatter. Therefore, the coverage of the carrier injection layer, the common electrode, and the like can be improved.

[0570] The common layer 314 and the common electrode 315 are provided over the layer 333R, the layer 333G, the layer 333B, the insulating layer 325, and the insulating layer 327. Before the insulating layer 325 and the insulating layer 327 are provided, a step is generated between a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (a region between light-emitting elements). In the display device of one embodiment of the present invention, the insulating layer 325 and the insulating layer 327 can flatten the step, thereby improving the coverage of the common layer 314 and the common electrode 315. Therefore, poor connection due to disconnection of the step can be suppressed. Furthermore, the step can be suppressed from locally thinning the common electrode 315, thereby suppressing an increase in electrical resistance.

[0571] The upper surface of the insulating layer 327 preferably has a shape with high flatness. The upper surface of the insulating layer 327 may have at least one of a flat surface, a convex curved surface, and a concave curved surface. For example, the upper surface of the insulating layer 327 preferably has a convex curved surface shape with a large radius of curvature.

[0572] An inorganic insulating film can be used for the insulating layer 325. Examples of materials that can be used for the inorganic insulating film include oxide, nitride, oxynitride, and nitride oxide. Specific examples of these inorganic insulating films are as described above. The insulating layer 325 may have a single-layer structure or a stacked-layer structure. Aluminum oxide is particularly preferable because it has a high etching selectivity with respect to the EL layer and protects the EL layer in the formation of the insulating layer 327 described later. By using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by an ALD method as the insulating layer 325, the insulating layer 325 can be formed with fewer pinholes and excellent protection of the EL layer. The insulating layer 325 may also have a stacked-layer structure of a film formed by an ALD method and a film formed by a sputtering method. The insulating layer 325 may have a stacked-layer structure of, for example, an aluminum oxide film formed by an ALD method and a silicon nitride film formed by a sputtering method.

[0573] The insulating layer 325 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 325 preferably has a function of suppressing diffusion of at least one of water and oxygen. The insulating layer 325 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0574] The insulating layer 325 has a function as a barrier insulating layer, which can suppress the entry of impurities (typically, at least one of water and oxygen) that may diffuse into each light-emitting element from the outside. With this structure, a highly reliable light-emitting element and a highly reliable display device can be provided.

[0575] The insu...

Claims

a transistor having a gate and a back gate, and a light-emitting element; a first function of supplying a first potential to the back gate; a second function of supplying a video signal to the gate and holding a second potential corresponding to the video signal at the back gate; and a third function of supplying a third potential to the gate after the second function is executed, and supplying a current corresponding to a difference between the third potential and the video signal to the light-emitting element. 　 In claim 1, The semiconductor device, wherein the transistor is a p-type transistor. 　 In claim 1 or 2, The transistor is a semiconductor device containing silicon in a semiconductor layer in which a channel is formed. 　 In claim 1 or 2, The third potential is a potential higher than the first potential. 　 In claim 1 or 2, The light-emitting element is an organic electroluminescence (EL) element. 　 The pixel includes first to eighth transistors, a driving transistor, a light emitting element, and a capacitance element, a gate of the first transistor and a gate of the seventh transistor are electrically connected to a first wiring; a gate of the second transistor and a gate of the fifth transistor are electrically connected to a second wiring; a gate of the third transistor, a gate of the sixth transistor, and a gate of the eighth transistor are electrically connected to a third wiring; a gate of the fourth transistor is electrically connected to a fourth wiring; a first terminal of the first transistor is electrically connected to a fifth wiring; a second terminal of the first transistor is electrically connected to a gate of the driving transistor, a first terminal of the second transistor, and a first terminal of the third transistor; a first terminal of the fourth transistor is electrically connected to a sixth wiring and a first electrode of the capacitance element; a second terminal of the fourth transistor electrically connected to a first terminal of the driving transistor; a second terminal of the driving transistor is electrically connected to a first terminal of the fifth transistor and a first terminal of the seventh transistor; a second terminal of the seventh transistor is electrically connected to a second electrode of the capacitance element, a back gate of the driving transistor, and a first terminal of the eighth transistor; a second terminal of the fifth transistor is electrically connected to a first terminal of the sixth transistor and an anode of the light emitting element; The cathode of the light-emitting element is electrically connected to a seventh wiring, a second terminal of the third transistor, a second terminal of the sixth transistor, and a second terminal of the eighth transistor are electrically connected to an eighth wiring; The second terminal of the second transistor is electrically connected to a ninth wiring. 　 a first transistor, a second transistor, a fifth transistor, a seventh transistor, an eighth transistor, a driving transistor, a light emitting element, and a capacitive element; a gate of the first transistor and a gate of the seventh transistor are electrically connected to a first wiring; a gate of the second transistor and a gate of the fifth transistor are electrically connected to a second wiring; the gate of the eighth transistor is electrically connected to a third wiring; a first terminal of the first transistor is electrically connected to a fifth wiring; a second terminal of the first transistor electrically connected to a gate of the driving transistor and a first terminal of the second transistor; a first terminal of the driving transistor is electrically connected to a sixth wiring and a first electrode of the capacitance element; a second terminal of the driving transistor is electrically connected to a first terminal of the fifth transistor and a first terminal of the seventh transistor; a second terminal of the seventh transistor is electrically connected to a second electrode of the capacitance element, a back gate of the driving transistor, and a first terminal of the eighth transistor; a second terminal of the fifth transistor electrically connected to an anode of the light-emitting element; The cathode of the light-emitting element is electrically connected to a seventh wiring, a second terminal of the eighth transistor is electrically connected to an eighth wiring; The second terminal of the second transistor is electrically connected to a ninth wiring. 　 In claim 6, The semiconductor device, wherein the first to eighth transistors and the driving transistor are p-type transistors. 　 In claim 6, The semiconductor device, wherein each of the first to eighth transistors is an n-type transistor. 　 In claim 7, The semiconductor device, wherein the first transistor, the second transistor, the fifth transistor, the seventh transistor, the eighth transistor and the drive transistor are p-type transistors. 　 In claim 7, The semiconductor device, wherein the first transistor, the second transistor, the fifth transistor, the seventh transistor, and the eighth transistor are each an n-type transistor. 　 In claim 6 or 7, The seventh transistor and the eighth transistor are semiconductor devices each including an oxide semiconductor in a semiconductor layer in which a channel is formed. 　 In claim 6 or 7, The driving transistor is a semiconductor device including silicon in a semiconductor layer in which a channel is formed. 　 In claim 6 or 7, The light-emitting element is an organic electroluminescence (EL) element.

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