Display device and method for manufacturing display device

Abstract

Disclosed is a display device comprising: a first substrate; a second substrate arranged on the first substrate; a light-emitting diode of which at least a portion is accommodated in the second substrate; a first electrode pad arranged on the second substrate to be electrically connected to the light-emitting diode; a planarization insulating layer disposed on the second substrate to cover the first electrode pad; a transistor arranged on the planarization insulating layer and electrically connected to the first electrode pad; and a third substrate arranged on the transistor.

Description

Display device and method for manufacturing the display device

[0001] Embodiments of the present invention relate to a display device and a method for manufacturing the display device, for example, a flexible display device and a method for manufacturing the flexible display device.

[0002] As display devices that visually display electrical signals evolve, a variety of display devices with superior characteristics, such as thinness, weight reduction, and low power consumption, are being introduced. For example, flexible display devices that can be folded or rolled are being introduced. Recently, active research and development is underway on display devices with diverse structures, such as stretchable display devices capable of transforming into various forms.

[0003] Embodiments of the present invention provide a display device and a method for manufacturing the display device, for example, a flexible display device and a method for manufacturing the flexible display device.

[0004] Embodiments of the present invention disclose a display device including: a first substrate; a second substrate disposed on the first substrate; a light-emitting diode at least partially accommodated in the second substrate; a first electrode pad electrically connected to the light-emitting diode and disposed on the second substrate; a planarization insulating layer covering the first electrode pad and disposed on the second substrate; a transistor disposed on the planarization insulating layer and electrically connected to the first electrode pad; and a third substrate disposed on the transistor.

[0005] In the present embodiment, the transistor may include an active layer including a channel region, a drain region, and a source region; and a gate electrode overlapping the channel region.

[0006] In this embodiment, the gate electrode may be placed between the light-emitting diode and the active layer.

[0007] In this embodiment, the gate electrode may be placed between the third substrate and the active layer.

[0008] In this embodiment, the light emitting diode is spaced apart from the first substrate, and the first substrate and the second substrate may each be formed of a transparent material.

[0009] In this embodiment, the light-emitting diode is in contact with the first substrate, and the first substrate may be made of a transparent material.

[0010] In this embodiment, the light transmittances of the first substrate and the second substrate may be different from each other.

[0011] In this embodiment, the first sealing layer may further be included, which supports the first substrate and is disposed on the lower portion of the first substrate.

[0012] In this embodiment, a second sealing layer disposed on the third substrate may be further included.

[0013] Another embodiment of the present invention discloses a method for manufacturing a display device, comprising: placing a second substrate on a first substrate; placing a light-emitting diode inside the second substrate; curing the second substrate; placing a first electrode pad on the second substrate so as to be electrically connected to the light-emitting diode; placing a planarization insulating layer on the second substrate so as to cover the first electrode pad; placing a transistor on the planarization insulating layer so as to be electrically connected to the first electrode pad; and placing a third substrate on the transistor.

[0014] In this embodiment, the method may further include a step of placing the first substrate on a carrier substrate; and a step of curing the first substrate.

[0015] In the present embodiment, the method may further include a step of attaching a carrier film on the third substrate; a step of removing the carrier substrate from the first substrate; a step of attaching a first sealing layer to the first substrate; and a step of removing the carrier film from the third substrate.

[0016] In this embodiment, the method may further include a step of defining a first opening so as to penetrate the first substrate, the second substrate, the planarization insulating layer, and the third substrate.

[0017] In this embodiment, the step of attaching the second sealing layer to the third substrate may be further included.

[0018] In the present embodiment, the step of arranging the transistor may include a step of arranging an active layer including a channel region, a drain region, and a source region; and a step of arranging a gate electrode so as to overlap the channel region.

[0019] In this embodiment, the gate electrode may be placed between the light-emitting diode and the active layer.

[0020] In this embodiment, the gate electrode may be placed between the third substrate and the active layer.

[0021] In the present embodiment, the step of arranging the light-emitting diode is a step of arranging the light-emitting diode so as to be spaced apart from the first substrate, and the first substrate and the second substrate may each be formed of a transparent material.

[0022] In the present embodiment, the step of arranging the light-emitting diode is a step of arranging the light-emitting diode so that it comes into contact with the first substrate, and the first substrate may be made of a transparent material.

[0023] In this embodiment, the light transmittances of the first substrate and the second substrate may be different from each other.

[0024] According to one embodiment of the present invention, a display device having improved stretchability and a simple manufacturing process and improved reliability can be provided due to a simplified laminated structure.

[0025] These effects are exemplary and the scope of the present invention is not limited by the above-described effects.

[0026] FIG. 1 is a perspective view schematically showing a display device according to one embodiment of the present invention.

[0027] Figures 2a and 2b are perspective views showing the display device of Figure 1 extended in the first direction.

[0028] Figure 2c is a perspective view showing the display device of Figure 1 extended in the second direction.

[0029] Figure 2d is a perspective view showing the display device of Figure 1 extended in the first direction and the second direction.

[0030] Figure 2e is a perspective view showing the display device of Figure 1 extended in the third direction.

[0031] Figure 3 is a schematic plan view of a display device according to one embodiment of the present invention.

[0032] FIG. 4a is an enlarged plan view of part IV of FIG. 3 as part of a display device according to one embodiment of the present invention.

[0033] FIG. 4b is an enlarged plan view of part IV of FIG. 3 as part of a display device according to one embodiment of the present invention.

[0034] FIG. 4c is an enlarged plan view of part IV of FIG. 3 as part of a display device according to one embodiment of the present invention.

[0035] FIG. 5 is a cross-sectional view schematically showing a first island portion and a first bridge portion arranged in a display area of ​​a display device according to one embodiment of the present invention.

[0036] FIGS. 6A to 6C are equivalent circuit diagrams of subpixels of a display device according to one embodiment of the present invention, respectively.

[0037] FIG. 7a and FIG. 7b are cross-sectional views schematically showing a light-emitting element of a display device according to one embodiment of the present invention, respectively.

[0038] FIG. 8 is a schematic cross-sectional view of a portion of a display device according to one embodiment of the present invention.

[0039] FIGS. 9A to 9H are schematic cross-sectional views of a portion of a display device according to one embodiment of the present invention.

[0040] FIG. 10 is a schematic flowchart of a method for manufacturing a display device according to one embodiment of the present invention.

[0041] FIG. 11 is a schematic cross-sectional view of a portion of a display device according to one embodiment of the present invention.

[0042] FIGS. 12A to 12G are perspective views schematically illustrating embodiments of an electronic device including a display device according to one embodiment of the present invention.

[0043] The present invention is capable of various modifications and embodiments. Specific embodiments are illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention, as well as the methods for achieving them, will become clearer with reference to the embodiments described in detail below, along with the drawings. However, the present invention is not limited to the embodiments disclosed below and can be implemented in various forms.

[0044] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. When describing with reference to the drawings, identical or corresponding components are given the same reference numerals and redundant descriptions thereof will be omitted.

[0045] In the examples below, the terms first, second, etc. are not used in a limiting sense, but are used for the purpose of distinguishing one component from another.

[0046] In the examples below, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0047] In the examples below, terms such as “include” or “have” mean that a feature or component described in the specification is present, and do not preclude the possibility that one or more other features or components may be added.

[0048] In the following examples, when a part such as a film, region, component, etc. is said to be on or above another part, it includes not only a case where it is directly on top of the other part, but also a case where another film, region, component, etc. is interposed in between.

[0049] For convenience of explanation, the sizes of components in the drawings may be exaggerated or reduced. For example, the sizes and thicknesses of each component shown in the drawings are arbitrarily indicated for convenience of explanation, and thus the present invention is not necessarily limited to what is shown.

[0050] In some embodiments, where implementations are otherwise feasible, specific process sequences may be performed in a different order than described. For example, two processes described in succession may be performed substantially simultaneously, or in a reverse order from the described order.

[0051] In this specification, “A and / or B” refers to the case where it is A, or B, or both A and B. And, “at least one of A or B” refers to the case where it is A, or B, or both A and B.

[0052] In the following examples, when it is said that a film, region, component, etc. are connected, it includes cases where the films, regions, components, etc. are directly connected, and / or cases where other films, regions, components, etc. are interposed between the films, regions, components, etc. and are indirectly connected. For example, when it is said in this specification that a film, region, component, etc. are electrically connected, it refers to cases where the films, regions, components, etc. are directly electrically connected, and / or cases where other films, regions, components, etc. are interposed between them and are indirectly electrically connected.

[0053] The x-axis, y-axis, and z-axis are not limited to the three axes in the Cartesian coordinate system, but can be interpreted in a broader sense that includes them. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but they can also refer to different directions that are not orthogonal to each other.

[0054] Fig. 1 is a perspective view schematically illustrating a display device (1) according to one embodiment of the present invention. Figs. 2a and 2b are perspective views illustrating the display device (1) of Fig. 1 in a state extended in a first direction. Fig. 2c is a perspective view illustrating the display device (1) of Fig. 1 in a state extended in a second direction. Fig. 2d is a perspective view illustrating the display device of Fig. 1 in a state extended in the first and second directions. Fig. 2e is a perspective view illustrating the display device (1) of Fig. 1 in a state extended in a third direction.

[0055] Referring to FIG. 1, a display device (1) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels. The display device (1) may provide a predetermined image using light emitted from the plurality of pixels. The non-display area (NDA) may be arranged outside the display area (DA). The non-display area (NDA) is an area where pixels are not arranged and may entirely surround the display area (DA).

[0056] The display device (1) can be extended or contracted in various directions. The display device (1) can be extended in a first direction (e.g., in the x direction and / or in the -x direction) by an external force applied by an external object or a user. In one embodiment, as illustrated in FIGS. 2A and 2B, a display area (DA) and / or a non-display area (NDA) of the display device (1) can be extended in the first direction (e.g., in the x direction and / or in the -x direction). In one embodiment, for example, as illustrated in FIG. 2A, the display device (1) can be extended along the x direction and the -x direction, or as illustrated in FIG. 2B, one side of the display device (1) can be fixed and can be extended along the x direction.

[0057] The display device (1) can be stretched in a second direction (e.g., the y direction and / or the -y direction) by an external force applied by an external object or a user. In one embodiment, as illustrated in FIG. 2 c, the display area (DA) and / or the non-display area (NDA) of the display device (1) can be stretched in the y direction and the -y direction. In another embodiment, one side of the display device (1) can be fixed while being stretched in the y direction or the -y direction.

[0058] The display device (1) can be extended in a plurality of directions, for example, a first direction (e.g., the x direction and / or the -x direction) and a second direction (e.g., the y direction and / or the -y direction) by an external force applied by an external object or a part of a human body. As illustrated in Fig. 2d, the display area (DA) and / or the non-display area (NDA) of the display device (1) can be extended in the ±x direction and the ±y direction.

[0059] The display device (1) can be elongated in a third direction (e.g., the z direction or the -z direction) by an external force applied by an external object or a part of a human body. In one embodiment, FIG. 2e illustrates that a part of the display device (1), for example, a part of the display area (DA), protrudes in the z direction. In another embodiment, a part of the display device (1), for example, a part of the display area (DA), can protrude along the -z direction (or be sunken along the z direction).

[0060] Although FIGS. 2A to 2E illustrate the display device (1) extending in the first, second, and / or third directions, the present invention is not limited thereto. In other embodiments, the display device (1) may be variously deformed into an irregular shape, such as being bent or twisted along two or more axes.

[0061] Figure 3 is a plan view schematically showing a display device (1) according to one embodiment of the present invention.

[0062] A plurality of pixels may be arranged in a display area (DA) of a display device (1). Each pixel may include subpixels that emit light of different colors. A light-emitting element corresponding to each subpixel may be arranged in the display area (DA). A circuit for providing electrical signals to the light-emitting elements arranged in the display area (DA) and to transistors electrically connected to the light-emitting elements may be located in a non-display area (NDA) surrounding the display area (DA). A gate driving circuit (GDC) may be arranged in a first non-display area (NDA1) and a second non-display area (NDA2) arranged on both sides of the display area (DA). The gate driving circuit (GDC) may include drivers for providing electrical signals to the gate electrodes of each of the transistors electrically connected to the light-emitting elements. FIG. 3 illustrates that the gate driving circuit (GDC) is arranged in each of the first non-display area (NDA1) and the second non-display area (NDA2), but the present invention is not limited thereto. In another embodiment, the gate drive circuit (GDC) may be placed in either the first non-display area (NDA1) or the second non-display area (NDA2).

[0063] The data drive circuit (DDC) may be disposed in a third non-display area (NDA3) and / or a fourth non-display area (NDA4) that extends from the first non-display area (NDA1) and the second non-display area (NDA2). In one embodiment, FIG. 3 illustrates that the data drive circuit (DDC) is disposed in the fourth non-display area (NDA4). In another embodiment, the data drive circuit (DDC) may be disposed in each of the third non-display area (NDA3) and the fourth non-display area (NDA4).

[0064] Although Fig. 3 illustrates that the data drive circuit (DDC) is arranged in the fourth non-display area (NDA4) of the display device (1), the present invention is not limited thereto. In another embodiment, the display device (1) may further include a flexible circuit board (not shown) electrically connected through a terminal portion (not shown) arranged in the fourth non-display area (NDA4), and the data drive circuit (DDC) may be arranged on the aforementioned flexible circuit board.

[0065] In some embodiments, the elongation rate of the non-display area (NDA) may be equal to or less than the elongation rate of the display area (DA). In one embodiment, the elongation rates of the non-display areas (NDAs) may be different for each area. In one embodiment, for example, the first non-display area (NDA1), the second non-display area (NDA2), and the third non-display area (NDA3) may have substantially the same elongation rates, but the elongation rate of the fourth non-display area (NDA4) may be less than the elongation rates of each of the first non-display area (NDA1), the second non-display area (NDA2), and the third non-display area (NDA3).

[0066] FIG. 4a is an enlarged plan view of part IV of FIG. 3 as part of a display device (1) according to one embodiment of the present invention.

[0067] Referring to FIG. 4a, the display device (1) may include first island portions (11) spaced apart from each other along a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a display area (DA), and first bridge portions (12) extending to adjacent first island portions (11).

[0068] Each first island portion (11) may be extended to a plurality of first bridge portions (12). In one embodiment, for example, each first island portion (11) may be connected to four first bridge portions (12). Two first bridge portions (12) may be arranged on both sides of the first island portion (11) along a first direction (e.g., x direction or -x direction), and the remaining two first bridge portions (12) may be arranged on both sides of the first island portion (11) along a second direction (e.g., y direction or -y direction). In one embodiment, four first bridge portions (12) may be extended to each of the four sides of the first island portion (11). Each of the four first bridge portions (12) may be adjacent to each corner of the first island portion (11).

[0069] The first bridge portions (12) can be spaced apart from each other by first openings (CS1) defined between the first bridge portions (12). In one embodiment, a first opening (CS1) having an approximately H shape and a first opening (CS1) having an approximately I shape obtained by rotating the aforementioned H shape by 90 degrees can be alternately and repeatedly defined along a first direction (e.g., an x ​​direction or a -x direction) and a second direction (e.g., a y direction or a -y direction), respectively. Both ends of each first bridge portion (12) extend to each of the adjacent first island portions (11), and one side of each first bridge portion (12) can be spaced apart from one side of the adjacent first island portion (11) and / or one side of another first bridge portion (12) by the first openings (CS1).

[0070] The display device (1) may include second island portions (21) spaced apart from each other in a non-display area, for example, the first non-display area (NDA1) illustrated in FIG. 4a, and second bridge portions (22) extending to adjacent second island portions (21).

[0071] Each second island portion (21) may extend along a first direction (e.g., the x direction or the -x direction). The second island portions (21) may be spaced apart from each other along a second direction (e.g., the y direction or the -y direction) intersecting the first direction (e.g., the x direction or the -x direction). Each second island portion (21) may include drivers of a gate drive circuit (GDC, FIG. 2) described with reference to FIG. 3.

[0072] The second bridge portion (22) may have a serpentine shape. The length of the second bridge portion (22) may be greater than the shortest distance between adjacent second island portions (21) along the second direction (e.g., the y direction or the -y direction). In one embodiment, the second bridge portion (22) may have a shape of approximately omega (Ω) that is convex toward the first direction (e.g., the x direction or the -x direction). The second bridge portions (22) may be arranged between adjacent second island portions (21), but may be spaced apart from each other.

[0073] The second bridge portions (22) between adjacent second island portions (21) can be spaced apart from each other by the second opening portions (CS2). Between the adjacent second island portions (21), the second opening portions (CS2) and the second bridge portions (22) can be alternately arranged and defined along the first direction (e.g., the x direction or the -x direction). The second opening portions (CS2) can have the same shape. Both ends of each second bridge portion (22) extend to the adjacent second island portions (21), and one side of each second bridge portion (22) can be spaced apart from the side of the adjacent second island portion (21) and / or one side of another second bridge portion (22) by the second opening portion (CS2).

[0074] Any one of the second island portions (21) arranged in the first non-display area (NDA1) may correspond to the first island portions (11) of a plurality of rows arranged in the display area (DA). In one embodiment, for example, any one of the second island portions (21) arranged in the first non-display area (NDA1) may correspond to the first island portions (11) arranged in the (i)-th row and the first island portions (11) arranged in the (i+1)-th row in the display area (DA) (wherein, i is a positive number greater than 0). Although FIG. 4A illustrates that one second island portion (21) corresponds to two rows of the first island portions (11), the present invention is not limited thereto. In another embodiment, any one of the second island portions (21) arranged in the first non-display area (NDA1) may correspond to n rows of the first island portions (11) arranged in the display area (DA) (where n is a positive integer greater than or equal to 3).

[0075] A non-display area, for example, a first non-display area (NDA1), may include a first sub-non-display area (SNDA1) in which the aforementioned second island portions (21) and second bridge portions (22) are arranged, and a second sub-non-display area (SNDA2) between the first sub-non-display area (SNDA1) and the display area (DA). Third bridge portions (23) may be arranged in the second sub-non-display area (SNDA2) to extend the display area (DA) to the first sub-non-display area (SNDA1). One end of the third bridge portion (23) may extend to the second island portion (21) and / or the second bridge portion (22), and the opposite end of the third bridge portion (23) may extend to the first island portion (11) and / or the first bridge portion (12).

[0076] The third bridge portion (23) may have a serpentine shape. In one embodiment, the shape of the third bridge portion (23) may be different from the shapes of each of the first bridge portion (12) and the second bridge portion (22). In one embodiment, as illustrated in FIG. 4A, the third bridge portion (23) may have a shape of approximately omega (Ω) that is convex in the second direction (e.g., the y direction or the -y direction). Among adjacent third bridge portions (23) arranged along the second direction (e.g., the y direction or the -y direction), one may have a structure that is symmetrical to each other, such as being convex in the y direction and the other being convex in the -y direction. Between the third bridge portions (23), a structure may be provided in which third openings (CS3) and fourth openings (CS4) of different shapes are repeatedly defined. The width of the third bridge portion (23) may be different from the width of the first bridge portion (12) and the width of the second bridge portion (22). In one embodiment, the width of the third bridge portion (23) may be larger than the width of the first bridge portion (12) and smaller than the width of the second bridge portion (22).

[0077] FIG. 4a shows that the second island portion (21) and the second bridge portion (22) of the non-display area, for example, the first non-display area (NDA1), have different shapes from the first island portion (11) and the first bridge portion (12) of the display area (DA), respectively. In another embodiment of the present invention, the second island portion (21) and the second bridge portion (22) of the non-display area may have the same shapes as the first island portion (11) and the first bridge portion (12) of the display area (DA), respectively.

[0078] FIG. 4b is an enlarged plan view of part IV of FIG. 3 as part of a display device (1) according to one embodiment of the present invention.

[0079] Referring to Fig. 4b, the display device (1) includes first island portions (11) that are spaced apart from each other in the display area (DA) and first bridge portions (12) that connect adjacent first island portions (11) that are spaced apart from each other by a first opening (CS1). The structure of the display area (DA) of Fig. 4b may be the same as the structure of the display area (DA) described above with reference to Fig. 4a.

[0080] The display device (1) may include second island portions (21) and second bridge portions (22) arranged in a non-display area, for example, a first non-display area (NDA1). In one embodiment, the second island portions (21) and the second bridge portions (22) may have substantially the same shape as the first island portions (11) and the first bridge portion (12), respectively.

[0081] The second island portions (21) can be spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a non-display area, for example, a first non-display area (NDA1). Each of the second bridge portions (22) can connect adjacent second island portions (21). The second bridge portions (22) can be spaced apart from each other by a second opening (CS2) defined between the second bridge portions (22).

[0082] The second opening (CS2) may have substantially the same shape as the first opening (CS1). For example, the second opening (CS2) having an approximately H shape and the second opening (CS2) having an approximately I shape may be alternately and repeatedly defined in a non-display area, for example, the first non-display area (NDA1). The two ends of each second bridge portion (22) are connected to each of the adjacent second island portions (21), and one side of each second bridge portion (22) may be spaced apart from one side of the adjacent second island portion (21) and / or one side of another second bridge portion (22) by the second opening (CS2).

[0083] Each second island section (21) can be connected to four second bridge sections (22). Each second island section (21) can include drivers of the gate drive circuit (GDC, FIG. 2) described with reference to FIG. 3.

[0084] The second island portions (21) of any one row arranged in the first non-display area (NDA1) may correspond to the first island portions (11) of any one row arranged in the display area (DA). In one embodiment, for example, the second island portions (21) arranged in the (i)th row along the first direction (e.g., the x direction or the -x direction) in the first non-display area (NDA1) may correspond to the first island portions (11) arranged in the same row, for example, the (i)th row, in the display area (DA) (wherein, i is a positive number greater than 0).

[0085] The display device (1) may include third bridge units (23) arranged in a second sub-non-display area (SNDA2) for connecting a display area (DA) and a first sub-non-display area (SNDA1). The non-display area, for example, the first non-display area (NDA1), may include a first sub-non-display area (SNDA1) in which second island units (21) and second bridge units (22) are arranged, and a second sub-non-display area (SNDA2) including third bridge units (23) and positioned between the first sub-non-display area (SNDA1) and the display area (DA). The third bridge unit (23) may be substantially the same as the first bridge unit (12) and the second bridge unit (22). In one embodiment, for example, the width of the third bridge unit (23) may be the same as the width of the first bridge unit (12) and the width of the second bridge unit (22).

[0086] FIG. 4c is an enlarged plan view of part IV of FIG. 3 as part of a display device (1) according to one embodiment of the present invention.

[0087] Referring to FIG. 4c, the display device (1) may include first island portions (11) spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in the display area (DA) and first bridge portions (12) extending to adjacent first island portions (11).

[0088] The first bridge portions (12) may be defined to be spaced apart from each other by a first opening (CS1) positioned between the first bridge portions (12). The first bridge portion (12) may have a winding shape. In one embodiment, for example, as illustrated in FIG. 4c, the first bridge portion (12) may have a shape roughly like the letter 'S'.

[0089] Each first island portion (11) may be extended to a plurality of first bridge portions (12). In one embodiment, for example, each first island portion (11) may be extended to four first bridge portions (12). Two first bridge portions (12) may be arranged on both sides of the first island portion (11) along a first direction (e.g., x direction or -x direction), and the remaining two first bridge portions (12) may be arranged on both sides of the first island portion (11) along a second direction (e.g., y direction or -y direction). The four first bridge portions (12) may extend to each of the four sides of the first island portion (11). Each of the four first bridge portions (12) may be adjacent to each corner of the first island portion (11).

[0090] The display device (1) may include second island portions (21) spaced apart from each other in a first direction (e.g., x direction or -x direction) and a second direction (e.g., y direction or -y direction) in a non-display area, for example, a first non-display area (NDA1) illustrated in FIG. 4c, and second bridge portions (22) extending to adjacent second island portions (21).

[0091] The second bridge portions (22) may be defined by being spaced apart from each other by a second opening (CS2) positioned between the second bridge portions (22). The second bridge portion (22) may have a winding shape. In one embodiment, for example, as illustrated in FIG. 4C, the second bridge portion (22) may have approximately the shape of the 'letter S'. The size and / or width of the second bridge portion (22) may be different from the size and / or width of the first bridge portion (12). In one embodiment, for example, the size and / or width of the second bridge portion (22) may be larger than the size and / or width of the first bridge portion (12). The radius of curvature of the rounded portion of the second bridge portion (22) may be different from the radius of curvature of the rounded portion of the first bridge portion (12). In one embodiment, for example, the radius of curvature of the rounded portion of the second bridge portion (22) may be greater than the radius of curvature of the rounded portion of the first bridge portion (12).

[0092] Each second island portion (21) may be extended to a plurality of second bridge portions (22). Each second island portion (21) may be connected to four second bridge portions (22). Two second bridge portions (22) may be arranged on both sides of the second island portion (21) along a first direction (e.g., x direction or -x direction), and the remaining two second bridge portions (22) may be arranged on both sides of the second island portion (21) along a second direction (e.g., y direction or -y direction). In one embodiment, four second bridge portions (22) may be extended to each of the four sides of the second island portion (21). Each second bridge portion (22) may be extended to the central portion of each side of the second island portion (21).

[0093] The second island portions (21) of any one row arranged in the first non-display area (NDA1) may correspond to the first island portions (11) of a plurality of rows arranged in the display area (DA). In one embodiment, for example, the second island portions (21) of any one row arranged in the first non-display area (NDA1) may correspond to the first island portions (11) arranged in the (i)-th row of the display area (DA) and the first island portions (11) arranged in the (i+1)-th row (wherein i is a positive integer greater than 0). In another embodiment, the second island portions (21) of any one row may correspond to n rows of the first island portions (11) (wherein n is a positive integer greater than 3).

[0094] A non-display area, for example, a first non-display area (NDA1), may include a first sub-non-display area (SNDA1) in which the aforementioned second island portions (21) and second bridge portions (22) are arranged, and a second sub-non-display area (SNDA2) between the first sub-non-display area (SNDA1) and the display area (DA). Third bridge portions (23) may be arranged in the second sub-non-display area (SNDA2) to extend to the display area (DA) and the first sub-non-display area (SNDA1). One end of the third bridge portion (23) may extend to the second island portion (21), and the opposite end of the third bridge portion (23) may extend to the first island portion (11). In one embodiment, for example, one end of the third bridge portion (23) may extend to the central portion of one side of the second island portion (21), and the opposite end of the third bridge portion (23) may extend to the central portion of one side of the first island portion (11).

[0095] The third bridge portion (23) may have a serpentine shape. In one embodiment, the shape of the third bridge portion (23) may be different from the shapes of the first bridge portion (12) and the second bridge portion (22). The width of the third bridge portion (23) may be different from the width of the first bridge portion (12) and the width of the second bridge portion (22). The width of the third bridge portion (23) may be larger than the width of the first bridge portion (12) and smaller than the width of the second bridge portion (22). Third openings (CS3) and fourth openings (CS4) of different shapes may be alternately defined between the third bridge portions (23) in the second direction (e.g., the y direction or the -y direction).

[0096] FIG. 5 is a cross-sectional view schematically showing a first island portion (11) and a first bridge portion (12) arranged in a display area (DA) of a display device (1) according to one embodiment of the present invention.

[0097] Referring to Fig. 5, the first island portion (11) and the first bridge portion (12) arranged in the display area (DA) may be spaced apart from each other with the first opening (CS1) therebetween. The first island portion (11) includes light-emitting elements (LEDs) and a circuit for driving the light-emitting elements electrically connected thereto, for example, a pixel driving circuit portion (PC), and the first bridge portion (12) may include wiring (WL) electrically connected to pixel driving circuit portions (PC) arranged in each of the adjacent first island portions (11).

[0098] Looking at the first island portion (11), a buffer layer (111) including an inorganic insulator is disposed on a substrate (100), and a pixel driver circuit (PC) may be disposed on the buffer layer (111). An insulating layer (IL) including an inorganic insulator and / or an organic insulator may be disposed between the pixel driver circuit (PC) and the light emitting element (LED). The light emitting element (LED) is disposed on the insulating layer (IL) and may be electrically connected to a corresponding pixel driver circuit (PC). The light emitting elements (LED) may emit light of different colors or the same color. In one embodiment, the light emitting elements (LED) may emit red, green, and blue light, respectively. In some embodiments, the light emitting elements (LED) may emit white light. In another embodiment, the light emitting elements (LED) may emit red, green, blue, and white light, respectively.

[0099] The substrate (100) may include a polymer resin such as polyethersulfone, polyarylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate. In one embodiment, the substrate (100) may be a single layer including the aforementioned polymer resin. In another embodiment, the substrate (100) may be a multilayer structure including a base layer including the aforementioned polymer resin and a barrier layer including an inorganic insulating material. The substrate (100) including the polymer resin may have flexible, rollable, and bendable properties.

[0100] In one embodiment, FIG. 5 illustrates three pixel driver circuits (PCs) arranged in each first island portion (11) and three light-emitting elements (LEDs) connected to each pixel driver circuit portion (PC), but the present invention is not limited thereto. In another embodiment, the number of pixel driver circuits (PCs) and light-emitting elements (LEDs) arranged in the first island portion (11) may be one, two, four or more.

[0101] The encapsulation layer (300) may be disposed on a light-emitting element (LED) and may protect the light-emitting element (LED) from external force and / or moisture permeation. The encapsulation layer (300) may include an inorganic encapsulation layer and / or an organic encapsulation layer. In some embodiments, the encapsulation layer (300) may include a structure in which an inorganic encapsulation layer including an inorganic insulating material, an organic encapsulation layer including an organic insulating material, and an inorganic encapsulation layer including an inorganic insulating material are laminated. In other embodiments, the encapsulation layer (300) may include an organic material such as a resin. In some embodiments, the encapsulation layer (300) may include urethane epoxy acrylate. The encapsulation layer (300) may include a photosensitive material, for example, a material such as a photoresist.

[0102] Looking at the first bridge portion (12), an insulating layer (IL) including an organic insulating material may be placed on the substrate (100). When the display device (1) is stretched, the first bridge portion (12), which is relatively subject to a large amount of deformation, may not have a layer including an inorganic insulating material that is prone to cracking, unlike the first island portion (11).

[0103] In one embodiment, the substrate (100) corresponding to the first bridge portion (12) may have the same laminated structure as the substrate (100) corresponding to the first island portion (11). In one embodiment, the substrate (100) corresponding to the first bridge portion (12) and the substrate (100) corresponding to the first island portion (11) may be polymer resin layers formed together in the same process. In another embodiment, the substrate (100) corresponding to the first bridge portion (12) may have a different laminated structure from the substrate (100) corresponding to the first island portion (11). In some embodiments, the substrate (100) corresponding to the first bridge portion (12) may have a multilayer structure including a base layer including a polymer resin and a barrier layer including an inorganic insulating material, and the substrate (100) corresponding to the first bridge portion (12) may have a structure of a polymer resin layer without a layer including an inorganic insulating material.

[0104] The wirings (WL) of the first bridge unit (12) may be signal lines (e.g., gate lines, data lines, etc.) for providing electrical signals to transistors included in the pixel driving circuit unit (PC) of the first island unit (11), as described above, or voltage lines (e.g., driving voltage lines, initialization voltage lines, etc.) for providing voltage. An encapsulation layer (300) may also be arranged in the first bridge unit (12). In another embodiment, the encapsulation layer (300) may not be present in the first bridge unit (12).

[0105] Referring to FIGS. 4A to 4C and FIG. 5, the substrate (100) corresponding to the first island portion (11) and the substrate (100) corresponding to the first bridge portion (12) may be connected to each other. In other words, the plan views illustrated in FIGS. 4A to 4C may be substantially the same as the plan view of the substrate (100) of FIG. 5. In other words, the substrate (100) includes a region corresponding to the first island portion (11) and a region corresponding to the first bridge portion (12), and an opening (100OP1) having the same shape as the first opening (CS1) may be defined in the substrate (100). Similarly, the sealing layer (300) corresponding to the first island portion (11) and the sealing layer (300) corresponding to the first bridge portion (12) may extend or be connected to each other. In one embodiment, for example, the plan views illustrated in FIGS. 4A to 4C above may be substantially identical to the plan views of the encapsulation layer (300). In other words, the encapsulation layer (300) includes an area corresponding to the first island portion (11) and an area corresponding to the first bridge portion (12), and an opening (300OP1) having the same shape as the first opening portion (CS1) may be defined in the encapsulation layer (300).

[0106] The circuit-light-emitting element layer (200) between the substrate (100) and the encapsulation layer (300) may include a buffer layer (111), a pixel driving circuit (PC), a wiring (WL), an insulating layer (IL), and a light-emitting element (LED). Similar to the substrate (100), the plan views illustrated in FIGS. 4A to 4C may be substantially the same as the plan views of the circuit-light-emitting element layer (200). In other words, an opening (200OP1) having the same shape as the first opening (CS1) may be defined in the circuit-light-emitting element layer (200).

[0107] Figures 6a to 6c are equivalent circuit diagrams of subpixels of a display device (1) according to one embodiment of the present invention, respectively.

[0108] Referring to FIG. 6a, a light emitting element (LED) corresponding to a subpixel is electrically connected to a pixel driver circuit (PC), and the pixel driver circuit (PC) may include a first transistor (T1), a second transistor (T2), and a storage capacitor (Cst). The pixel driver circuit (PC) may be electrically connected to a signal line and a voltage line. The signal line may include a gate line such as a first scan line (SL1) and a data line (DL), and the voltage line may include a first voltage line (VDDL).

[0109] The second transistor (T2) can be electrically connected to the first scan line (SL1) and the data line (DL). The first scan line (SL1) can provide a first scan signal (GW) to a gate electrode of the second transistor (T2). The second transistor (T2) can transmit a data signal (Dm) input from the data line (DL) to the first transistor (T1) according to the first scan signal (GW1) input from the first scan line (SL1).

[0110] The storage capacitor (Cst) is electrically connected to the second transistor (T2) and the first voltage line (VDDL), and can store a voltage corresponding to the difference between the voltage received from the second transistor (T2) and the first power voltage (VDD) supplied by the first voltage line (VDDL).

[0111] The first transistor (T1) is a driving transistor and can control a driving current flowing through a light-emitting element (LED). The first transistor (T1) can be connected to a first voltage line (VDDL) and a storage capacitor (Cst). The first transistor (T1) can control a driving current flowing through the light-emitting element (LED) from the first voltage line (VDDL) in response to a voltage value stored in the storage capacitor (Cst). The light-emitting element (LED) can emit light having a predetermined brightness by the driving current. A first electrode of the light-emitting element (LED) can be electrically connected to the first transistor (T1), and a second electrode can be electrically connected to a second voltage line (VSSL) that supplies a second power voltage (VSS).

[0112] Although FIG. 6a illustrates that the pixel driver circuit (PC) includes two transistors and one storage capacitor, in other embodiments, the pixel driver circuit (PC) may include three or more transistors.

[0113] Referring to FIG. 6b, the pixel driving circuit unit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), and a storage capacitor (Cst).

[0114] The pixel driver circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a first scan line (SL1), a second scan line (SL2), a third scan line (SL3), and an emission control line (EML), and a data line (DL). The voltage lines may include first and second initialization voltage lines (VIL1, VIL2) and a first voltage line (VDDL).

[0115] The first voltage line (VDDL) can transmit the first power voltage (VDD) to the first transistor (T1). The first initialization voltage line (VIL1) can transmit the first initialization voltage (Vint) that initializes the first transistor (T1) to the pixel driver circuit (PC). The second initialization voltage line (VIL2) can transmit the second initialization voltage (Vaint) that initializes the first electrode of the light-emitting element (LED) to the pixel driver circuit (PC).

[0116] The first transistor (T1) may be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and may be electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The first transistor (T1) functions as a driving transistor, and receives a data signal (Dm) according to the switching operation of the second transistor (T2) to supply a driving current to the light-emitting element (LED).

[0117] The second transistor (T2) is a data writing transistor and is electrically connected to the first scan line (SL1) and the data line (DL). The second transistor (T2) is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5). The second transistor (T2) is turned on in response to the first scan signal (GW) received through the first scan line (SL1) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0118] The third transistor (T3) is electrically connected to the first scan line (SL1) and is electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The third transistor (T3) can be turned on in response to the first scan signal (GW) received through the first scan line (SL1) to diode-connect the first transistor (T1).

[0119] The fourth transistor (T4) is a first initialization transistor and is electrically connected to the third scan line (SL3) and the first initialization voltage line (VIL1). The fourth transistor (T4) is turned on according to the third scan signal (GI) received through the third scan line (SL3) and transmits the first initialization voltage (Vint) from the first initialization voltage line (VIL1) to the gate electrode of the first transistor (T1) to initialize the voltage of the gate electrode of the first transistor (T1). The third scan signal (GI) may correspond to the first scan signal of another pixel driver circuit unit arranged in the previous row of the corresponding pixel driver circuit unit (PC).

[0120] The fifth transistor (T5) may be a motion control transistor, and the sixth transistor (T6) may be a light emission control transistor. The fifth transistor (T5) and the sixth transistor (T6) are electrically connected to the light emission control line (EML), and are turned on simultaneously according to the light emission control signal (EM) transmitted through the light emission control line (EML), thereby forming a current path so that a driving current can flow from the first voltage line (VDDL) in the direction of the light emitting element (LED).

[0121] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the second scan line (SL2), the second initialization voltage line (VIL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on according to the second scan signal (GB) transmitted through the second scan line (SL2), and can transmit the second initialization voltage (Vaint) from the second initialization voltage line (VIL2) to the first electrode of the light-emitting element (LED) to initialize the first electrode of the light-emitting element (LED).

[0122] A storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the first voltage line (VDDL). The storage capacitor (Cst) can maintain a voltage applied to the gate electrode of the first transistor (T1) by storing and maintaining a voltage corresponding to a difference between the voltages at both ends of the first voltage line (VDDL) and the gate electrode of the first transistor (T1).

[0123] Referring to FIG. 6c, the pixel driving circuit unit (PC) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), an eighth transistor (T8), a ninth transistor (T9), a storage capacitor (Cst), and an auxiliary capacitor (Ca).

[0124] The pixel driver circuit (PC) is electrically connected to signal lines and voltage lines. The signal lines may include gate lines such as a first scan line (SL1), a second scan line (SL2), a third scan line (SL3), and an emission control line (EML), and a data line (DL). The voltage lines may include first and second initialization voltage lines (VIL1, VIL2), a sustain voltage line (VSL), and a first voltage line (VDDL).

[0125] The first voltage line (VDDL) can transmit a first power voltage (VDD) to the first transistor (T1). The first initialization voltage line (VIL1) can transmit a first initialization voltage (Vint) for initializing the first transistor (T1) to the pixel driver circuit (PC). The second initialization voltage line (VIL2) can transmit a second initialization voltage (Vaint) for initializing the first electrode of the light-emitting element (LED) to the pixel driver circuit (PC). The sustain voltage line (VSL) can provide a sustain voltage (VSUS) to the second node (N2), for example, the second electrode (CE2) of the storage capacitor (Cst), during the initialization period and the data writing period.

[0126] The first transistor (T1) may be electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8), and may be electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The first transistor (T1) functions as a driving transistor, and may receive a data signal (Dm) according to the switching operation of the second transistor (T2) to supply a driving current to the light-emitting element (LED).

[0127] The second transistor (T2) is electrically connected to the first scan line (SL1) and the data line (DL), and is electrically connected to the first voltage line (VDDL) via the fifth transistor (T5) and the eighth transistor (T8). The second transistor (T2) is turned on in response to the first scan signal (GW) received through the first scan line (SL1) and performs a switching operation to transmit the data signal (Dm) transmitted to the data line (DL) to the first node (N1).

[0128] The third transistor (T3) is electrically connected to the first scan line (SL1) and is electrically connected to the light-emitting element (LED) via the sixth transistor (T6). The third transistor (T3) is turned on in response to the first scan signal (GW) received through the first scan line (SL1), thereby diode-connecting the first transistor (T1), thereby compensating for the threshold voltage of the first transistor (T1).

[0129] The fourth transistor (T4) is electrically connected to the third scan line (SL3) and the first initialization voltage line (VIL1), and is turned on in response to the third scan signal (GI) transmitted through the third scan line (SL3) to transmit the first initialization voltage (Vint) from the first initialization voltage line (VIL1) to the gate electrode of the first transistor (T1) to initialize the voltage of the gate electrode of the first transistor (T1). The third scan signal (GI) may correspond to the first scan signal of another pixel driving circuit unit arranged in the previous row of the corresponding pixel driving circuit unit (PC).

[0130] The fifth transistor (T5), the sixth transistor (T6), and the eighth transistor (T8) are electrically connected to the light emission control line (EML), and are simultaneously turned on in response to the light emission control signal (EM) transmitted through the light emission control line (EML), thereby forming a current path so that a driving current can flow from the first voltage line (VDDL) in the direction of the light emitting element (LED).

[0131] The seventh transistor (T7) is a second initialization transistor and can be electrically connected to the second scan line (SL2), the second initialization voltage line (VIL2), and the sixth transistor (T6). The seventh transistor (T7) is turned on in response to the second scan signal (GB) received through the second scan line (SL2) and transmits the second initialization voltage (Vaint) from the second initialization voltage line (VIL2) to the first electrode of the light-emitting element (LED) to initialize the first electrode of the light-emitting element (LED).

[0132] The ninth transistor (T9) can be electrically connected to the second scan line (SL2), the second electrode (CE2) of the storage capacitor (Cst), and the sustain voltage line (VSL). The ninth transistor (T9) is turned on according to the second scan signal (GB) transmitted through the second scan line (SL2), and can transmit the sustain voltage (VSUS) to the second node (N2), for example, the second electrode (CE2) of the storage capacitor (Cst), during the initialization section and the data writing section.

[0133] The eighth transistor (T8) and the ninth transistor (T9) may be electrically connected to a second node (N2), for example, a second electrode (CE2) of a storage capacitor (Cst), respectively. In some embodiments, the eighth transistor (T8) may be turned off and the ninth transistor (T9) may be turned on in an initialization period and a data writing period, and the eighth transistor (T8) may be turned on and the ninth transistor (T9) may be turned off in an emission period. Since the sustain voltage (VSUS) is transmitted to the second node (N2) in the initialization period and the data writing period, the uniformity of the luminance (e.g., LRU, Long Range Uniformity) of the display device according to the voltage drop of the first voltage line (VDDL) may be improved.

[0134] The storage capacitor (Cst) includes a first electrode (CE1) and a second electrode (CE2). The first electrode (CE1) is electrically connected to the gate electrode of the first transistor (T1), and the second electrode (CE2) is electrically connected to the eighth transistor (T8) and the ninth transistor (T9).

[0135] The auxiliary capacitor (Ca) can be electrically connected to the sixth transistor (T6), the sustain voltage line (VSL), and the first electrode of the light-emitting element (LED). The auxiliary capacitor (Ca) stores and maintains a voltage corresponding to the voltage difference between the first electrode of the light-emitting element (LED) and the sustain voltage line (VSL) while the seventh transistor (T7) and the ninth transistor (T9) are turned on, thereby preventing the problem of the black luminance increasing when the sixth transistor (T6) is turned off.

[0136] FIG. 7a is a cross-sectional view schematically showing a light-emitting element of a display device (1) according to one embodiment of the present invention.

[0137] Referring to FIG. 7A, a light-emitting element according to one embodiment of the present invention may include an organic light-emitting diode (220) including an organic material. The organic light-emitting diode (220) may include a first electrode (221) disposed on an insulating layer, a second electrode (225) facing the first electrode (221), and a light-emitting layer (223) interposed between the first electrode (221) and the second electrode (225). A first functional layer (222) may be disposed between the first electrode (221) and the light-emitting layer (223), and a second functional layer (224) may be disposed between the light-emitting layer (223) and the second electrode (225).

[0138] The edge of the first electrode (221) may be covered with a bank layer (BKL) including an insulating material. An opening (B-OP) overlapping the central portion of the first electrode (221) may be defined in the bank layer (BKL).

[0139] The first electrode (221) may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In another embodiment, the first electrode (221) may include a reflective layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. In another embodiment, the first electrode (221) may further include a layer including ITO, IZO, ZnO, AZO, or In2O3 on or under the aforementioned reflective layer.

[0140] The light-emitting layer (223) may include a relatively high molecular weight or relatively low molecular weight organic material that emits light of a predetermined color. The first functional layer (222) may include a hole transport layer (HTL) and / or a hole injection layer (HIL). The second functional layer (224) may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0141] The second electrode (225) may be formed of a conductive material having a relatively low work function. In one embodiment, for example, the second electrode (225) may include a (semi-)transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof. In another embodiment, the second electrode (225) may further include a layer such as ITO, IZO, ZnO, AZO, or In2O3 on the (semi-)transparent layer including the aforementioned material.

[0142] FIG. 7b is a cross-sectional view schematically showing a light-emitting element of a display device (1) according to one embodiment of the present invention.

[0143] Referring to FIG. 7b, in one embodiment of the present invention, a light-emitting element may include an inorganic light-emitting diode (230) including an inorganic material. The inorganic light-emitting diode (230) may include a first semiconductor layer (231), a second semiconductor layer (232), an intermediate layer (233) between the first semiconductor layer (231) and the second semiconductor layer (232), a first electrode (235) electrically connected to the first semiconductor layer (231), and a second electrode (238) electrically connected to the second semiconductor layer (232). The first electrode (235) and the second electrode (238) of the inorganic light-emitting diode (230) may be electrically connected to a first electrode pad (241) and a second electrode pad (242), respectively, which are disposed on the same layer.

[0144] In some embodiments, the first semiconductor layer (231) may include a p-type semiconductor layer. The p-type semiconductor layer may be In x Al y Ga 1-x-y A semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be selected from among, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., and a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc. can be doped.

[0145] The second semiconductor layer (232) may include, for example, an n-type semiconductor layer. The n-type semiconductor layer may be selected from semiconductor materials having a composition formula of InxAlyGa1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1), such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, etc., and may be doped with an n-type dopant such as Si, Ge, or Sn.

[0146] The intermediate layer (233) is a region where electrons and holes recombine, and as electrons and holes recombine, they transition to a relatively low energy level and can generate light having a corresponding wavelength. The intermediate layer (233) is, for example, In x Al y Ga 1-x-yIt can be formed by including a semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), and can be formed as a single quantum well structure or a multi quantum well structure (MQW: Multi Quantum Well). In another embodiment, the intermediate layer (233) may include a quantum wire structure or a quantum dot structure.

[0147] Although Fig. 7b illustrates that the first semiconductor layer (231) includes a p-type semiconductor layer and the second semiconductor layer (232) includes an n-type semiconductor layer, the present invention is not limited thereto. In another embodiment, the first semiconductor layer (231) may include an n-type semiconductor layer and the second semiconductor layer (232) may include a p-type semiconductor layer.

[0148] Fig. 8 is a schematic cross-sectional view of a part of a display device (1) according to one embodiment of the present invention.

[0149] In Fig. 8, the same reference numerals as in Figs. 1 to 7b refer to the same members, and their redundant descriptions are omitted.

[0150] Referring to FIG. 8, the display device (1) may include a first encapsulating layer (511), a first adhesive layer (522), a first substrate (531), a second substrate (532), a light-emitting diode (540), a first electrode pad (551), a second electrode pad (552), a planarizing insulating layer (560), a connecting electrode (CM), a second voltage line (VSSL), a gate insulating layer (570), a buffer layer (580), a transistor (TR), a wiring (WL), a third substrate (533), a second adhesive layer (523), and a second encapsulating layer (512).

[0151] The first encapsulating layer (511) may be placed on the lower portion of the first substrate (531) to support the first substrate (531). The first encapsulating layer (511) may include or be composed of a stretched sheet. The first encapsulating layer (511) may be formed of an elastomer film, a polydimethylsiloxane (PDMS) film, a silicone film, or the like.

[0152] The first adhesive layer (522) may be disposed on the first encapsulating layer (511). The first adhesive layer (522) may be in direct contact with the upper surface of the first encapsulating layer (511) and the lower surface of the first substrate (531). The first adhesive layer (522) may attach the first encapsulating layer (511) and the first substrate (531). The first adhesive layer (522) may use a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), or the like. The first adhesive layer (522) may include an acrylic-based material, a silicone-based material, or a urethane-based material.

[0153] The first substrate (531) is stretchable and can be placed on the first encapsulating layer (511). A first adhesive layer (522) can be interposed between the first substrate (531) and the first encapsulating layer (511). An opening (531OP) having the same shape as the first opening (CS1) can be defined in the first substrate (531). The first substrate (531) can be formed of a transparent material.

[0154] The first substrate (531) may include a polymer resin such as polyethersulfone, polyarylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate.

[0155] The second substrate (532) is stretchable and can be placed on the first substrate (531). An opening (532OP) having the same shape as the first opening (CS1) can be defined in the second substrate (532). The first substrate (531) and the second substrate (532) can be formed of different materials. In one embodiment, for example, the light transmittances of the first substrate (531) and the second substrate (532) can be different. In one embodiment, for example, the first substrate (531) can be formed of a transparent material, and the second substrate (532) can be formed of an opaque material. However, this is exemplary, and the first substrate (531) and the second substrate (532) can also be formed of the same material.

[0156] The second substrate (532) may include a polymer resin such as polyethersulfone, polyarylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate.

[0157] At least a portion of the light emitting diode (540) may be accommodated in the second substrate (532). The light emitting diode (540) may be arranged inside the second substrate (532) in the first island portion (11). The light emitting diode (540) may include a first semiconductor layer (541), a second semiconductor layer (542), an intermediate layer (543), a first electrode (544), and a second electrode (545).

[0158] The light-emitting diode (540) may correspond to the inorganic light-emitting diode (230) described with reference to FIG. 7B. Specifically, the first semiconductor layer (541), the second semiconductor layer (542), the intermediate layer (543), the first electrode (544), and the second electrode (545) may correspond to the first semiconductor layer (231), the second semiconductor layer (232), the intermediate layer (233), the first electrode (235), and the second electrode (238) described with reference to FIG. 7B, respectively.

[0159] A second semiconductor layer (542) may be disposed under a first semiconductor layer (541). An intermediate layer (543) may be disposed between the first semiconductor layer (541) and the second semiconductor layer (542). A first electrode (544) may be disposed on the first semiconductor layer (541). A second electrode (545) may be disposed on the second semiconductor layer (542) so as to be spaced apart from the first semiconductor layer (541). Parts of the first electrode (544) and the second electrode (545) may be exposed from the second substrate (532). In one embodiment, for example, the upper surfaces of the first electrode (544) and the second electrode (545) may form the same plane as the upper surface of the second substrate (532).

[0160] The light emitting diode (540) may be spaced apart from the first substrate (531). At this time, the first substrate (531) and the second substrate (532) may each be formed of a transparent material. Light emitted from the light emitting diode (540) may sequentially pass through the second substrate (532), the first substrate (531), the first adhesive layer (522), and the first sealing layer (511) and be displayed externally.

[0161] The first electrode pad (551) may be disposed on the second substrate (532) to be electrically connected to the light-emitting diode (540). The first electrode pad (551) may be in contact with the first electrode (544) and electrically connected to the first electrode (544). The second electrode pad (552) may be disposed on the second substrate (532) to be electrically connected to the light-emitting diode (540). The second electrode pad (552) may be in contact with the second electrode (545) and electrically connected to the second electrode (545). The first electrode pad (551) and the second electrode pad (552) may each be disposed on the first island portion (11).

[0162] The first electrode pad (551) may correspond to the first electrode pad (241) described with reference to Fig. 7b. In addition, the second electrode pad (552) may correspond to the second electrode pad (242) described with reference to Fig. 7b.

[0163] A planarization insulating layer (560) may be disposed on the second substrate (532) to cover the first electrode pad (551) and the second electrode pad (552). The planarization insulating layer (560) may include an organic insulator such as a general-purpose polymer such as polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorinated polymer, a p-xylene polymer, a vinyl alcohol polymer, and a blend thereof.

[0164] The planarization insulating layer (560) may include a first planarization insulating layer (561) and a second planarization insulating layer (562). The second planarization insulating layer (562) may be disposed on the first planarization insulating layer (561). In one embodiment, for example, the first planarization insulating layer (561) and the second planarization insulating layer (562) may be formed of the same material. However, this is merely exemplary, and the first planarization insulating layer (561) and the second planarization insulating layer (562) may be formed of different materials.

[0165] An opening (561OP, 562OP) having the same shape as the first opening (CS1) may be defined in the planarization insulating layer (560). That is, an opening (561OP) having the same shape as the first opening (CS1) may be defined in the planarization insulating layer (560). In addition, an opening (562OP) having the same shape as the first opening (CS1) may be defined in the second planarization insulating layer (562).

[0166] A connection electrode (CM) and a second voltage line (VSSL) may be disposed between a first planarization insulating layer (561) and a second planarization insulating layer (562). The connection electrode (CM) and the second voltage line (VSSL) may each be disposed on the first planarization insulating layer (561). The second planarization insulating layer (562) may cover each of the connection electrode (CM) and the second voltage line (VSSL). The connection electrode (CM) and the second voltage line (VSSL) may be disposed to be spaced apart from each other. The connection electrode (CM) and the second voltage line (VSSL) may each be electrically connected to a light-emitting diode (540). The connection electrode (CM) may penetrate the first planarization insulating layer (561) and come into contact with the first electrode pad (551). The second voltage line (VSSL) can penetrate the first planarization insulating layer (561) and contact the second electrode pad (552). The second voltage line (VSSL) can correspond to the second voltage line (VSSL) described with reference to FIGS. 6a to 6c.

[0167] The gate insulating layer (570) may be disposed on the planarization insulating layer (560). The gate insulating layer (570) may be formed of silicon oxide (SiO2), silicon nitride (SiN X ), silicon oxynitride (SiO N ), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO X ) may include inorganic insulators such as zinc oxide (ZnO). X ) may be zinc oxide (ZnO) and / or zinc peroxide (ZnO2). An opening (570OP) having the same shape as the first opening (CS1) may be defined in the gate insulating layer (570). A buffer layer (580) may be disposed on the gate insulating layer (570). The buffer layer (580) may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may be formed as a single layer or multilayer structure including the above-described material. An opening (580OP) having the same shape as the first opening (CS1) may be defined in the buffer layer (580).

[0168] The transistor (TR) is disposed on a planarization insulating layer (560) and may be electrically connected to the first electrode pad (551). The transistor (TR) may be disposed on the first island portion (11). The transistor (TR) may include an active layer (ACT) and a gate electrode (GE).

[0169] An active layer (ACT) may be disposed between a gate insulating layer (570) and a buffer layer (580). The active layer (ACT) is disposed on the gate insulating layer (570), and the buffer layer (580) may cover the active layer (ACT). The active layer (ACT) may include polysilicon (poly-Si). In another embodiment, the active layer (ACT) may include amorphous silicon (a-Si), an oxide semiconductor, an organic semiconductor, or the like. The active layer (ACT) may include a channel region (C) and a drain region (D) and a source region (S) disposed on opposite sides of the channel region (C), respectively. At this time, the connection electrode (CM) may electrically connect the source region (S) and the first electrode pad (551).

[0170] The gate electrode (GE) may be disposed between the planarization insulating layer (560) and the gate insulating layer (570). The gate electrode (GE) is disposed on the planarization insulating layer (560), and the gate insulating layer (570) may cover the gate electrode (GE). That is, the transistor (TR) may be provided as a top gate type, in which the gate electrode (GE) is disposed between the light emitting diode (540) and the active layer (ACT). The gate electrode (GE) may overlap the channel region (C). The gate electrode (GE) may include a relatively low-resistance metal material. The gate electrode (GE) may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and may be formed as a multilayer or single layer including the above materials.

[0171] The wiring (WL) may be arranged in the first bridge portion (12). The wiring (WL) may correspond to the wiring (WL) described with reference to FIG. 5. In FIG. 8, two wirings (WL) are illustrated as being arranged on the planarization insulating layer (560) and the gate insulating layer (570), but this is only an example, and the number and arrangement of the wirings (WL) are not limited thereto.

[0172] The third substrate (533) is stretchable and can be placed on the buffer layer (580). That is, the third substrate (533) can be placed on the transistor (TR). An opening (533OP) having the same shape as the first opening (CS1) can be defined in the third substrate (533). The third substrate (533) can include a polymer resin such as polyethersulfone, polyarylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate.

[0173] The second adhesive layer (523) may be disposed on the third substrate (533). The second adhesive layer (523) may be in direct contact with the upper surface of the third substrate (533) and the lower surface of the second encapsulating layer (512). The second adhesive layer (523) may attach the third substrate (533) and the second encapsulating layer (512). The second adhesive layer (523) may use a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), or the like. The second adhesive layer (523) may include an acrylic-based material, a silicone-based material, or a urethane-based material.

[0174] The second encapsulating layer (512) may be disposed on the third substrate (533). The second encapsulating layer (512) may support the third substrate (533). The second encapsulating layer (512) may include or be composed of a stretched sheet. The second encapsulating layer (512) may be formed of an elastomer film, a polydimethylsiloxane (PDMS) film, a silicone film, or the like.

[0175] FIGS. 9A to 9H are schematic cross-sectional views of a portion of a display device (1) according to one embodiment of the present invention, and FIG. 10 is a schematic flowchart of a manufacturing method (2) of a display device according to one embodiment of the present invention.

[0176] Referring to FIGS. 9a to 10, a method for manufacturing the display device (1) described with reference to FIG. 8 can be seen.

[0177] In FIGS. 9a to 10, the same reference numerals as in FIG. 8 indicate the same members, and their redundant descriptions are omitted.

[0178] First, referring to FIGS. 9A and 10, the manufacturing method (2) of the display device may include a step (S100) of placing a first substrate (531) on a carrier substrate (CSUB), and a step (S101) of curing the first substrate (531).

[0179] The carrier substrate (CSUB) is a substrate that supports the first substrate (531) during the process, and may be formed of a glass material. After the first substrate (531) is placed on the carrier substrate (CSUB), the first substrate (531) may be cured. The first substrate (531) may cover the carrier substrate (CSUB).

[0180] Referring to FIGS. 9b and 10, the method for manufacturing a display device (2) may include a step (S102) of placing a second substrate (532) on a first substrate (531). The second substrate (532) may be placed on the first substrate (531) and cover the first substrate (531).

[0181] Referring to FIGS. 9c and 10, the manufacturing method (2) of the display device may include a step (S103) of arranging a light-emitting diode (540) inside a second substrate (532), and a step (S104) of curing the second substrate (532).

[0182] Before the second substrate (532) is cured, at least a portion of the light-emitting diode (540) may be accommodated in the second substrate (532). At this time, the light-emitting diode (540) may include a first semiconductor layer (541), a second semiconductor layer (542), an intermediate layer (543), a first electrode (544), and a second electrode (545). When the light-emitting diode (540) is placed inside the second substrate (532), the second substrate (532) may be cured.

[0183] Referring to FIGS. 9D and 10, the manufacturing method (2) of the display device may include a step (S105) of placing a first electrode pad (551) on a second substrate (532), a step (S106) of placing a planarization insulating layer (560) on the second substrate (532), a step (S107) of placing a transistor (TR) on the planarization insulating layer (560), and a step (S108) of placing a third substrate (533) on the transistor (TR). In the step (S105) of placing the first electrode pad (551) on the second substrate (532), a second electrode pad (552) may be placed on the second substrate (532).

[0184] In the process of placing the first electrode pad (551) on the second substrate (532), a separate bonding process for joining the first electrode pad (551) and the light-emitting diode (540) may not be required. In one embodiment, for example, a flux coating or resin coating process for removing oxides may not be required on the surface where the first electrode pad (551) and the second substrate (532) come into contact.

[0185] Likewise, in the process of placing the second electrode pad (552) on the second substrate (532), a separate bonding process for joining the second electrode pad (552) and the light-emitting diode (540) may not be required. In one embodiment, for example, a flux coating or resin coating process for removing oxides may not be required on the surface where the second electrode pad (552) and the second substrate (532) come into contact. That is, the process for manufacturing the display device (1) can be simplified.

[0186] The step (S106) of placing a planarization insulating layer (560) on the second substrate (532) may include a step of placing a first planarization insulating layer (561) on the second substrate (532), and a step of placing a second planarization insulating layer (562) on the first planarization insulating layer (561). At this time, a connection electrode (CM) and a second voltage line (VSSL) may be interposed between the first planarization insulating layer (561) and the second planarization insulating layer (562).

[0187] A gate insulating layer (570) and a buffer layer (580) may be placed between the planarization insulating layer (560) and the third substrate (533). That is, the gate insulating layer (570) may be placed on the planarization insulating layer (560), the buffer layer (580) may be placed on the gate insulating layer (570), and the third substrate (533) may be placed on the buffer layer (580).

[0188] The step of placing a transistor (TR) may include a step of placing a gate electrode (GE) and a step of placing an active layer (ACT). The gate electrode (GE) may be placed on a planarization insulating layer (560). In addition, the active layer (ACT) may be placed on a gate insulating layer (570). That is, the gate electrode (GE) may be placed, the gate insulating layer (570) may be placed on the gate electrode (GE), and the active layer (ACT) may be placed on the gate insulating layer (570). At this time, the active layer (ACT) may include a channel region (C), a drain region (D), and a source region (S).

[0189] In the above-described process, the manufacturing method (2) of the display device may include a step of arranging wiring (WL). In FIG. 9d, two wirings (WL) are illustrated as being arranged on the planarization insulating layer (560) and the gate insulating layer (570), but this is only an example, and the number and arrangement of the wirings (WL) are not limited thereto.

[0190] Referring to FIGS. 9E and 10, the manufacturing method (2) of the display device may include a step (S109) of defining a first opening (CS1). The first opening (CS1) may penetrate through the first substrate (531), the second substrate (532), the planarization insulating layer (560), the gate insulating layer (570), the buffer layer (580), and the third substrate (533). The first opening (CS1) may be in contact with the first island portion (11) and the first bridge portion (12).

[0191] In this process, an opening (531OP) may be defined in a first substrate (531), an opening (532OP) may be defined in a second substrate (532), openings (561OP, 562OP) may be defined in a planarization insulating layer (560), an opening (570OP) may be defined in a gate insulating layer (570), an opening (580OP) may be defined in a buffer layer (580), and an opening (533OP) may be defined in a third substrate (533). The first opening (CS1) may be defined by a photolithography process. In one embodiment, the first opening (CS1) can be defined, for example, through a process of dry etching or wet etching the first substrate (531), the second substrate (532), the planarization insulating layer (560), the gate insulating layer (570), the buffer layer (580), and the third substrate (533).

[0192] Referring to FIGS. 9f and 10, the manufacturing method (2) of the display device may include a step (S110) of attaching a carrier film (CRF) on a third substrate (533), and a step (S111) of removing a carrier substrate (CSUB) from a first substrate (531).

[0193] The carrier film (CRF) may be attached to the third substrate (533) by a carrier adhesive layer (ADL). That is, the carrier adhesive layer (ADL) may be disposed on the third substrate (533), and the carrier film (CRF) may be disposed on the carrier adhesive layer (ADL). The carrier film (CRF) is a protective film that facilitates handling during subsequent processes, and may include a flexible plastic material such as polyethylene terephthalate (PET), polyimide, or the like. The adhesive layer may use a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), or the like.

[0194] The carrier substrate (CSUB) can be separated from the first substrate (531) by a laser lift-off method that irradiates a laser beam to the lower portion of the carrier substrate (CSUB). In another embodiment, the carrier substrate (CSUB) can be separated from the first substrate (531) using a known physical or chemical method.

[0195] Referring to FIGS. 9g and 10, the manufacturing method (2) of the display device may include a step (S112) of attaching a first encapsulating layer (511) to a first substrate (531). The first encapsulating layer (511) may be attached to the first substrate (531) by a first adhesive layer (522). That is, the first adhesive layer (522) may be disposed on the first encapsulating layer (511), and the first substrate (531) may be disposed on the first adhesive layer (522).

[0196] Referring to FIGS. 9g, 9h, and 10, the manufacturing method (2) of the display device may include a step (S113) of removing a carrier film (CRF) from a third substrate (533), and a step (S114) of attaching a second encapsulating layer (512) to the third substrate (533). After the carrier film (CRF) and the carrier adhesive layer (ADL) are removed from the third substrate (533), the second encapsulating layer (512) may be attached to the third substrate (533) using a second adhesive layer (523). That is, the second adhesive layer (523) may be disposed on the third substrate (533), and the second encapsulating layer (512) may be disposed on the second adhesive layer (523).

[0197] Fig. 11 is a schematic cross-sectional view of a part of a display device (1) according to one embodiment of the present invention.

[0198] In Fig. 11, the same reference numerals as in Fig. 8 indicate the same members, and their duplicate descriptions are omitted.

[0199] Referring to FIG. 11, the display device (1) may include a first encapsulating layer (511), a first adhesive layer (522), a first substrate (531), a second substrate (532), a light-emitting diode (540), a first electrode pad (551), a second electrode pad (552), a planarizing insulating layer (560), a connecting electrode (CM), a second voltage line (VSSL), a gate insulating layer (570), a buffer layer (580), a transistor (TR), a wiring (WL), a third substrate (533), a second adhesive layer (523), and a second encapsulating layer (512).

[0200] The first sealing layer (511) can be placed on the lower side of the first substrate (531) to support the first substrate (531).

[0201] The first adhesive layer (522) can be disposed on the first encapsulating layer (511). The first adhesive layer (522) can be in direct contact with the upper surface of the first encapsulating layer (511) and the lower surface of the first substrate (531). The first adhesive layer (522) can attach the first encapsulating layer (511) and the first substrate (531).

[0202] The first substrate (531) is stretchable and can be placed on the first encapsulating layer (511). A first adhesive layer (522) can be interposed between the first substrate (531) and the first encapsulating layer (511). An opening (531OP) having the same shape as the first opening (CS1) can be defined in the first substrate (531). The first substrate (531) can be formed of a transparent material.

[0203] The second substrate (532) is stretchable and can be placed on the first substrate (531). An opening (532OP) having the same shape as the first opening (CS1) can be defined in the second substrate (532).

[0204] At least a portion of the light emitting diode (540) may be accommodated in the second substrate (532). The light emitting diode (540) may be arranged inside the second substrate (532) in the first island portion (11). The light emitting diode (540) may include a first semiconductor layer (541), a second semiconductor layer (542), an intermediate layer (543), a first electrode (544), and a second electrode (545).

[0205] The light emitting diode (540) can be in contact with the first substrate (531). At this time, the first substrate (531) can be formed of a transparent material. In addition, the second substrate (532) can be formed of a transparent or opaque material. The light emitted from the light emitting diode (540) can be displayed externally by sequentially passing through the first substrate (531), the first adhesive layer (522), and the first sealing layer (511). Even if the second substrate (532) is formed of an opaque material, since the light emitting diode (540) and the first substrate (531) are in contact, the light emitted from the light emitting diode (540) can be displayed externally.

[0206] The first electrode pad (551) may be placed on the second substrate (532) so as to be electrically connected to the light-emitting diode (540). The second electrode pad (552) may be placed on the second substrate (532) so as to be electrically connected to the light-emitting diode (540). The first electrode pad (551) and the second electrode pad (552) may each be placed on the first island portion (11).

[0207] A planarization insulating layer (560) may be placed on the second substrate (532) to cover the first electrode pad (551) and the second electrode pad (552). The planarization insulating layer (560) may include a first planarization insulating layer (561) and a second planarization insulating layer (562).

[0208] An opening (561OP, 562OP) having the same shape as the first opening (CS1) may be defined in the planarization insulating layer (560). That is, an opening (561OP) having the same shape as the first opening (CS1) may be defined in the first planarization insulating layer (561). In addition, an opening (562OP) having the same shape as the first opening (CS1) may be defined in the second planarization insulating layer (562). A connection electrode (CM) and a second voltage line (VSSL) may be arranged between the first planarization insulating layer (561) and the second planarization insulating layer (562).

[0209] The gate insulating layer (570) may be disposed on the planarization insulating layer (560). An opening (570OP) having the same shape as the first opening (CS1) may be defined in the gate insulating layer (570).

[0210] The buffer layer (580) may be disposed on the gate insulating layer (570). An opening (580OP) having the same shape as the first opening (CS1) may be defined in the buffer layer (580). The transistor (TR) may be disposed on the planarization insulating layer (560) and may be electrically connected to the first electrode pad (551). The transistor (TR) may be disposed on the first island portion (11). The transistor (TR) may include an active layer (ACT) and a gate electrode (GE).

[0211] An active layer (ACT) may be disposed between a planarization insulating layer (560) and a gate insulating layer (570). The active layer (ACT) is disposed on the planarization insulating layer (560), and the gate insulating layer (570) may cover the active layer (ACT). The active layer (ACT) may include polysilicon (poly-Si). In another embodiment, the active layer (ACT) may include amorphous silicon (a-Si), an oxide semiconductor, an organic semiconductor, or the like. The active layer (ACT) may include a channel region (C) and a drain region (D) and a source region (S) respectively disposed on opposite sides of the channel region (C). At this time, the connection electrode (CM) may electrically connect the source region (S) and the first electrode pad (551).

[0212] The gate electrode (GE) may be disposed between the gate insulating layer (570) and the buffer layer (580). The gate electrode (GE) is disposed on the gate insulating layer (570), and the buffer layer (580) may cover the gate electrode (GE). That is, the transistor (TR) may be provided as a bottom gate type, in which the gate electrode (GE) is disposed between the third substrate (533) and the active layer (ACT). The gate electrode (GE) may overlap the channel region (C). In such a structure, since the gate electrode (GE) can protect the active layer (ACT), the reliability of the display device (1) may be improved.

[0213] The wiring (WL) can be placed in the first bridge section (12).

[0214] The third substrate (533) is stretchable and can be placed on the buffer layer (580). That is, the third substrate (533) can be placed on the transistor (TR). An opening (533OP) having the same shape as the first opening (CS1) can be defined in the third substrate (533). The second adhesive layer (523) can be placed on the third substrate (533). The second adhesive layer (523) can be in direct contact with the upper surface of the third substrate (533) and the lower surface of the second encapsulating layer (512). The second adhesive layer (523) can attach the third substrate (533) and the second encapsulating layer (512). The second encapsulating layer (512) can be placed on the third substrate (533).

[0215] The display device (1) according to the above-described embodiments can be used in various electronic devices capable of providing images. Here, the term "electronic device" refers to a device that uses electricity and can provide a predetermined image.

[0216] FIGS. 12A to 12G are perspective views schematically illustrating embodiments of an electronic device including a display device according to one embodiment of the present invention.

[0217] Referring to FIG. 12A, a display device according to an embodiment of the present invention may be utilized in a wearable electronic device (3100) that can be worn on a part of a user's body. The wearable electronic device (3100) may include a body portion (3110) and a display portion (3120) provided on the body portion (3110). The display device according to embodiments of the present invention may be utilized as the display portion (3120) of the wearable electronic device (3100). As illustrated in FIG. 12A, the wearable electronic device (3100) may be deformable. In one embodiment, it may be utilized as a smart watch or a smartphone, depending on the user's selection.

[0218] FIG. 12B illustrates a medical electronic device (3200). In one embodiment, the medical electronic device (3200) may include a body portion (3210) and a light-emitting portion (3220). A display device according to embodiments of the present invention may be used as the light-emitting portion (3220) of the medical electronic device (3200). The light-emitting portion (3220) may emit light of a certain wavelength band (e.g., infrared, visible light, etc.) to the patient's body. In one embodiment, the body portion (3210) may have a stretchable fiber material and may have a structure that allows the light-emitting portion to be worn on the body of a user.

[0219] FIG. 12C illustrates an educational electronic device (3300). In one embodiment, the educational electronic device may include a display unit (3320) provided within a frame (3310). The display unit (3320) may utilize a display device according to embodiments of the present invention. The display unit (3320) may provide an image such as a sea with crashing waves, a snow-covered mountain, or a volcano with flowing lava, wherein the display unit (3320) may expand in the height direction (e.g., the z direction) to reflect the height of the wave, mountain, or volcano. In some embodiments, a portion of the display unit (3320) may sequentially vary in height along the direction of flowing lava to display the movement of lava in three dimensions. The educational electronic device (3300) may include a plurality of pins (or stroke units, 3330) arranged on the back surface of the display unit (3320) so that the display unit (3320) expands in the height direction. The pins (3330) can be implemented to move along a third direction (e.g., the z direction or the -z direction) so that the image displayed on the display unit (3320) has a three-dimensional height. Fig. 12c describes an educational electronic device (3300), but its use is not limited to providing certain image information.

[0220] While the electronic devices illustrated in FIGS. 12A through 12G are described as electronic devices whose shapes can be variable, the present invention is not limited thereto. As described in the embodiments below, display devices according to embodiments of the present invention can be used in electronic devices in which a portion capable of displaying an image (e.g., a screen) is fixed.

[0221] FIG. 12D illustrates a robot (3400) as another electronic device according to one embodiment of the present invention. The robot (3400) can recognize movement or objects using a camera unit (3440) and display a predetermined image to a user through a display unit (3420, 3430). In some embodiments, since the display devices according to one embodiment of the present invention can extend in various directions as described above, they can be assembled into a body frame having a hemispherical shape, and thus the robot (3400) can include a hemispherical display unit (3420, 3430).

[0222] FIG. 12e illustrates a vehicle display device (3500) as another electronic device according to one embodiment of the present invention. The vehicle display device (3500) may include a cluster (3510), a center information display (CID) (3520), and / or a co-driver display. Since the display device according to the embodiment of the present invention can be extended in various directions, it may be used in the cluster (3510), the center information display (CID) (3520), and / or the co-driver display regardless of the shape of the internal frame of the vehicle.

[0223] Although FIG. 12ea illustrates that the cluster (3510), the CID (Center Information Display) (3520), and / or the co-driver display are each separate, the present invention is not limited thereto. In another embodiment, two or more selected from the cluster (3510), the CID (Center Information Display) (3520), and the co-driver display may be connected integrally.

[0224] In some embodiments, a vehicle display device (3500) may include a button (3540) capable of displaying a predetermined image. Referring to the enlarged view of FIG. 12EB, the hemispherical button (3540) may include an object (3542) that provides a button usability by moving in the z-direction or -z-direction, and a display device positioned on the object (3542). In some embodiments, when the object (3542) has a three-dimensionally rounded surface, the display device may also have a three-dimensionally rounded surface.

[0225] FIG. 12F illustrates an electronic device according to one embodiment of the present invention, which is an electronic device (3600) for advertising or display purposes. In some embodiments, the electronic device (3600) for advertising or display purposes may be installed on a fixed structure (3610), such as a wall or pillar. If the structure (3610) includes a recessed surface as illustrated in FIG. 12F, the electronic device (3600) for advertising or display purposes may also be positioned along the recessed surface of the structure (3610). In some embodiments, the electronic device (3600) for advertising or display purposes may be installed on the structure (3610) using a heat shrink film or the like.

[0226] FIG. 12G illustrates an electronic device according to one embodiment of the present invention as a controller (3700). The controller (3700) may include an image-type button. In one embodiment, for example, the controller (3700) may include first to third button areas (3720, 3730, 3740) in which a portion of the display unit (3710) protrudes in the z direction or protrudes in the -z direction (or is sunken in the z direction). In some embodiments, the first and third button areas (3720, 3740) may protrude in the z direction, and the second button area (3730) may protrude in the -z direction (or is sunken in the z direction).

[0227] While the present invention has been described with reference to the embodiments illustrated in the drawings, these are merely exemplary, and those skilled in the art will appreciate that various modifications and equivalent alternative embodiments are possible. Therefore, the true scope of technical protection of the present invention should be determined by the technical spirit of the appended claims.

Claims

1. First substrate; A second substrate arranged on the first substrate; A light emitting diode, at least a portion of which is accommodated in said second substrate; A first electrode pad electrically connected to the light-emitting diode and arranged on the second substrate; A planarizing insulating layer covering the first electrode pad and arranged on the second substrate; A transistor disposed on the above-mentioned flat insulating layer and electrically connected to the first electrode pad; and A display device, comprising a third substrate disposed on the transistor.

2. In paragraph 1, The above transistor, An active layer including a channel region, a drain region, and a source region; and A display device, comprising a gate electrode overlapping the channel region.

3. In paragraph 2, A display device, wherein the gate electrode is disposed between the light-emitting diode and the active layer.

4. In paragraph 2, A display device, wherein the gate electrode is disposed between the third substrate and the active layer.

5. In paragraph 1, The above light emitting diode is spaced apart from the first substrate, A display device, wherein the first substrate and the second substrate are each made of a transparent material.

6. In paragraph 1, The above light emitting diode is in contact with the first substrate, A display device, wherein the first substrate is made of a transparent material.

7. In paragraph 1, A display device wherein the light transmittances of the first substrate and the second substrate are different from each other.

8. In paragraph 1, A display device further comprising a first sealing layer supporting the first substrate and disposed below the first substrate.

9. In paragraph 1, A display device further comprising a second sealing layer disposed on the third substrate.

10. A step of placing a second substrate on the first substrate; A step of arranging a light-emitting diode inside the second substrate; A step of curing the second substrate; A step of arranging a first electrode pad on the second substrate so as to be electrically connected to the light-emitting diode; A step of placing a planarizing insulating layer on the second substrate to cover the first electrode pad; A step of arranging a transistor on the planarization insulating layer so as to be electrically connected to the first electrode pad; and A method for manufacturing a display device, comprising: a step of placing a third substrate on the transistor.

11. In paragraph 10, A step of placing the first substrate on a carrier substrate; and A method for manufacturing a display device, further comprising: a step of curing the first substrate.

12. In paragraph 11, A step of attaching a carrier film on the third substrate; A step of removing the carrier substrate from the first substrate; a step of attaching a first sealing layer to the first substrate; and A method for manufacturing a display device, further comprising: a step of removing the carrier film from the third substrate.

13. In paragraph 10, A method for manufacturing a display device, further comprising: defining a first opening so as to penetrate the first substrate, the second substrate, the planarization insulating layer, and the third substrate.

14. In paragraph 10, A method for manufacturing a display device, further comprising the step of attaching a second sealing layer to the third substrate.

15. In paragraph 10, The step of placing the above transistor is, A step of arranging an active layer including a channel region, a drain region, and a source region; and A method for manufacturing a display device, comprising: a step of arranging a gate electrode so as to overlap the channel region.

16. In paragraph 15, A method for manufacturing a display device, wherein the gate electrode is disposed between the light-emitting diode and the active layer.

17. In paragraph 15, A method for manufacturing a display device, wherein the gate electrode is disposed between the third substrate and the active layer.

18. In paragraph 10, The step of placing the above light-emitting diode is: This is a step of arranging the light-emitting diode so as to be spaced apart from the first substrate. A method for manufacturing a display device, wherein the first substrate and the second substrate are each made of a transparent material.

19. In paragraph 10, The step of placing the above light-emitting diode is: This is a step of arranging the above light-emitting diode so that it is in contact with the first substrate. A method for manufacturing a display device, wherein the first substrate is made of a transparent material.

20. In paragraph 10, A method for manufacturing a display device, wherein the light transmittances of the first substrate and the second substrate are different from each other.

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