Encoding / decoding method and apparatus including CRC addition for staircase code in wireless communication system

Abstract

The present disclosure relates to an encoding / decoding method and apparatus including CRC addition for a staircase code. According to an embodiment of the present disclosure, the encoding method, performed by a transmission device in a wireless communication system, including CRC addition of a staircase code, comprises the steps of: inserting new information bits in a single layer or a plurality of layers of the staircase code; adding, to the new information bits, CRC bits generated by performing CRC encoding on a set of new information bits in the single layer or the plurality of layers; and transmitting, to a reception device, a staircase code codeword generated by performing row-wise encoding or column-wise encoding using an element code in each layer of the staircase code.

Description

Encoding / decoding method and device including CRC addition for staircase code in wireless communication system

[0001] The present disclosure relates to a communication method and device using a staircase code in a wireless communication system.

[0002] Looking back at the evolution of wireless communication over successive generations, technologies have primarily been developed for human-facing services such as voice, multimedia, and data. With the commercialization of 5G (5th-generation) communication systems, an explosive increase in connected devices is expected to be connected to communication networks. Examples of networked objects include vehicles, robots, drones, home appliances, displays, smart sensors installed in various infrastructures, construction equipment, and factory equipment. Mobile devices are expected to evolve into diverse form factors, including augmented reality glasses, virtual reality headsets, and holographic devices. In the 6th-generation (6G) era, efforts are being made to develop improved 6G communication systems to connect hundreds of billions of devices and objects and provide diverse services. For this reason, 6G communication systems are often referred to as "beyond 5G."

[0003] The 6G communication system, expected to be realized around 2030, will have a maximum transmission speed of terabytes per second (i.e., 1,000 gigabits per second) and a wireless latency of 100 microseconds (μsec). In other words, compared to 5G, the transmission speed in a 6G communication system will be 50 times faster, while the wireless latency will be reduced to one-tenth.

[0004] To achieve these high data rates and ultra-low latency, 6G communication systems are being considered for implementation in the terahertz band (e.g., from 95 gigahertz (GHz) to 3 terahertz (THz)). Compared to the millimeter wave (mmWave) band introduced in 5G, the terahertz band is expected to experience more severe path loss and atmospheric absorption, making it more crucial to ensure signal reach, or coverage, in this band. Key technologies to ensure coverage include radio frequency (RF) components, antennas, new waveforms that offer better coverage than OFDM (orthogonal frequency division multiplexing), beamforming, and multiple antenna transmission technologies such as massive multiple-input and multiple-output (MIMO), full-dimensional MIMO (FD-MIMO), array antennas, and large-scale antennas. In addition, new technologies such as metamaterial-based lenses and antennas, high-dimensional spatial multiplexing using orbital angular momentum (OAM), and reconfigurable intelligent surfaces (RIS) are being discussed to improve the coverage of terahertz band signals.

[0005] In addition, in order to improve frequency efficiency and system network, 6G communication systems are developing full duplex technology that utilizes the same frequency resources for uplink and downlink at the same time; network technology that integrates satellites and high-altitude platform stations (HAPS); network structure innovation technology that supports mobile base stations and enables optimization and automation of network operation; dynamic spectrum sharing technology through collision avoidance based on spectrum usage prediction; AI-based communication technology that utilizes artificial intelligence (AI) from the design stage and internalizes end-to-end AI support functions to realize system optimization; and next-generation distributed computing technology that realizes services with complexity that exceeds the limits of terminal computing capabilities by utilizing ultra-high-performance communication and computing resources (mobile edge computing (MEC), cloud, etc.). In addition, efforts are being made to further strengthen connectivity between devices, further optimize networks, promote softwareization of network entities, and increase the openness of wireless communications through the design of new protocols to be used in 6G communication systems, the implementation of hardware-based security environments, the development of mechanisms for the safe use of data, and the development of technologies for maintaining privacy.

[0006] Research and development of these 6G communication systems are expected to enable a new level of hyper-connected experience through the hyper-connectivity of 6G communication systems, which encompass not only connections between things but also connections between people and things. Specifically, 6G communication systems are expected to enable services such as truly immersive extended reality (Truly Immersive XR), high-fidelity mobile holograms, and digital replicas. Furthermore, services such as remote surgery, industrial automation, and emergency response, which are provided through 6G communication systems through enhanced security and reliability, will find application in diverse fields such as industry, medicine, automobiles, and home appliances.

[0007] Staircase codes are being studied as one of the encoding methods that can be used in next-generation communication systems, such as the aforementioned 5G and 6G communication systems. Staircase codes were first proposed in the field of optical communications in 2012, and at the time, they were introduced as codes that could guarantee excellent performance at very high code rates, using the Bose-Chaudhuri-Hocquenghem (BCH) code as a component code. Staircase codes are known to have very excellent performance, with a difference of only 0.56 dB from the theoretical performance limit of a bit error rate (BER) of 10-15, especially when based on hard decision decoding (HDD).

[0008] The present disclosure provides a method and device for efficiently performing encoding / decoding including addition of a cyclic redundancy check (CRC) for a staircase code in a wireless communication system.

[0009] In addition, the present disclosure provides a method and apparatus for performing CRC encoding for a staircase code in a single layer or multiple layers in a wireless communication system.

[0010] The present disclosure also provides a method and device for adjusting the length of a CRC code in CRC encoding for a staircase code in a wireless communication system.

[0011] According to an embodiment of the present disclosure, an encoding method including CRC (cyclic redundancy check) addition of a staircase code, performed in a transmitting device in a wireless communication system, includes the steps of: inserting new information bits in a single or multiple layers of the staircase code; performing CRC encoding on a set of new information bits in the single or multiple layers and adding CRC bits generated by performing the CRC encoding to the new information bits; and transmitting a staircase code word generated by performing row-by-row encoding or column-by-column encoding using element codes in each layer of the staircase code to a receiving device.

[0012] In addition, according to an embodiment of the present disclosure, a transmitting device for performing encoding, including CRC addition of a staircase code, in a wireless communication system includes a transceiver, and a processor configured to insert new information bits in a single or multiple layers of the staircase code, perform CRC encoding on a set of new information bits in the single or multiple layers, and add the generated CRC bits to the new information bits, and transmit, through the transceiver, a staircase code word generated by performing row-by-row encoding or column-by-column encoding using element codes in each layer of the staircase code to a receiving device.

[0013] In addition, according to an embodiment of the present disclosure, a method for decoding a staircase code performed in a receiving device in a wireless communication system includes a process of receiving encoding-related setting information including a CRC addition of the staircase code from a transmitting device, a process of receiving an encoded staircase code code word from the transmitting device, and a process of restoring information bits by performing row-by-row decoding or column-by-column decoding using an element code in each layer of the staircase code based on the setting information, wherein a decoding error for the staircase code code word is detected using a single-layer unit CRC code or a multiple-layer unit CRC code.

[0014] In addition, according to an embodiment of the present disclosure, a receiving device for performing decoding of a staircase code in a wireless communication system includes a transceiver, and a processor configured to receive encoding-related setting information including a CRC addition of the staircase code from a transmitting device through the transceiver, receive an encoded staircase code code word from the transmitting device through the transceiver, perform row-by-row decoding or column-by-column decoding using an element code in each layer of the staircase code based on the setting information to restore information bits, and detect a decoding error for the staircase code code word using a single-layer unit CRC code or a multiple-layer unit CRC code.

[0015] Figure 1a is a diagram showing an example of a configuration of a square matrix-based staircase code.

[0016] Fig. 1b is a diagram for explaining an encoding method using a square matrix-based staircase code of Fig. 1a.

[0017] Figure 2a is a diagram showing an example of a configuration of a non-square matrix-based staircase code.

[0018] Figures 2b and 3 are drawings for explaining an encoding method using a non-square matrix-based staircase code of Figure 2a.

[0019] Figure 4 is a diagram for explaining a decoding method using a square matrix-based staircase code.

[0020] Figure 5 is a diagram for explaining a decoding method using a non-square matrix-based staircase code.

[0021] FIG. 6 is a diagram illustrating an example of an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure;

[0022] FIG. 7 is a diagram illustrating an example of an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure;

[0023] FIG. 8 is a diagram illustrating an example of an encoding method including CRC addition for a non-square matrix-based staircase code according to an embodiment of the present disclosure;

[0024] FIG. 9 is a diagram illustrating an example of an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure;

[0025] FIG. 10a, FIG. 10b and FIG. 10c are diagrams illustrating various methods for adjusting the length L' of a CRC code according to an embodiment of the present disclosure;

[0026] FIG. 11 is a diagram illustrating an example of an encoding method including CRC addition for a non-square matrix-based staircase code according to an embodiment of the present disclosure;

[0027] FIG. 12 is a diagram for explaining a method of adjusting the length of a CRC code by considering the number of overlapping portions in each layer in a staircase code according to an embodiment of the present disclosure;

[0028] FIG. 13a is a diagram illustrating an encoding method including CRC addition for a step code performed in a transmitting device of a wireless communication system according to an embodiment of the present disclosure;

[0029] FIG. 13b is a diagram illustrating a decoding method for a step code performed in a receiving device of a wireless communication system according to an embodiment of the present disclosure; and

[0030] FIG. 14 is a diagram showing an example configuration of a communication device in a wireless communication system according to an embodiment of the present disclosure.

[0031] The operating principles of the present disclosure are described in detail below with reference to the attached drawings. In the following description of the present disclosure, detailed descriptions of related known functions or configurations will be omitted if they are deemed to unnecessarily obscure the gist of the present disclosure. Furthermore, the terms described below are defined based on the functions of the present disclosure and may vary depending on the intent or custom of the user or operator. Therefore, their definitions should be based on the overall content of this specification.

[0032] For the same reason, some components in the attached drawings are omitted or schematically depicted. Furthermore, the dimensions of each component do not entirely reflect its actual size. Identical or corresponding components in each drawing are assigned the same reference numbers.

[0033] The advantages and features of the present disclosure, and methods for achieving them, will become clearer with reference to the embodiments described below in detail with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below and may be implemented in various different forms. The various embodiments are provided to ensure that the present disclosure is complete and to fully convey the scope of the present disclosure to those skilled in the art, and the present disclosure is defined solely by the scope of the claims. Like reference numerals designate like elements throughout the specification.

[0034] At this time, it will be understood that each block of the processing flow diagrams and combinations of the flow diagrams can be performed by computer program instructions. These computer program instructions can be installed in a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing equipment, so that the instructions executed by the processor of the computer or other programmable data processing equipment create a means for performing the functions described in the flow diagram block(s). These computer program instructions can also be stored in a computer-available or computer-readable memory that can direct a computer or other programmable data processing equipment to implement the functions in a specific manner, so that the instructions stored in the computer-available or computer-readable memory can also produce a manufactured item that includes an instruction means for performing the functions described in the flow diagram block(s). Since the computer program instructions may be installed on a computer or other programmable data processing device, a series of operational steps may be performed on the computer or other programmable data processing device to create a computer-executable process, and the instructions that cause the computer or other programmable data processing device to perform the steps for performing the functions described in the flowchart block(s) may also provide steps for performing the functions described in the flowchart block(s).

[0035] Additionally, each block may represent a module, segment, or portion of code that contains one or more executable instructions for performing a specific logical function(s). It should also be noted that in some alternative implementation examples, the functions described in the blocks may occur out of order. For example, two blocks depicted in succession may actually be executed substantially concurrently, or the blocks may sometimes be executed in reverse order, depending on their respective functions.

[0036] The term "~unit" used in various embodiments of the present disclosure refers to a software or hardware component, and the "~unit" performs certain roles. However, the "~unit" is not limited to software or hardware. The "~unit" may be configured to reside on an addressable storage medium and may be configured to regenerate one or more processors. Thus, as an example, the "~unit" includes components such as software components, object-oriented software components, class components, and task components, processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functionality provided within the components and "~units" may be combined into a smaller number of components and "~units" or further separated into additional components and "~units." In addition, the components and "~units" may be implemented to regenerate one or more CPUs within a device or a secure multimedia card. Additionally, in various embodiments of the present disclosure, '~bu' may include one or more processors.

[0037] In this disclosure, phrases such as “A and / or B”, “A or B”, “at least one of A and B”, “at least one of A or B”, “A, B, or C”, “at least one of A, B, and C”, and “at least one of A, B, or C” can each include any one of the items listed together in that phrase, or all possible combinations thereof. Terms such as “first”, “second”, or “first” or “second” may be used simply to distinguish the corresponding component from other corresponding components and do not limit the corresponding components in any other respect (e.g., importance or order).

[0038] In embodiments of the present disclosure, a user equipment (UE) may be a terminal, a mobile station (MS), a cellular phone, a smartphone, a computer, or any other electronic device capable of performing a communication function. In addition, a base station (BS) is a network entity that performs resource allocation to a UE, and may be at least one of a Node B, an eNB (eNode B), a gNB (gNode B), a wireless access unit, a base station controller, or a node on a network.

[0039] Furthermore, the various embodiments of the present disclosure described below may be applied to other communication systems having similar technical backgrounds or channel configurations. Furthermore, the various embodiments of the present disclosure may be applied to other communication systems with some modifications, as determined by a person skilled in the art, without significantly departing from the scope of the present disclosure.

[0040] In specifically describing various embodiments of the present disclosure, the communication system may utilize a wireless communication system, and for example, may utilize a 5G communication system based on the 5G communication standard (NR (New RAN)) proposed by 3GPP (3rd generation partnership project long term evolution), a wireless communication standard standardization organization. In addition, it may be applied to other communication systems with similar technical backgrounds with slight modifications within a range that does not significantly deviate from the scope of the present disclosure, and this may be possible at the discretion of a person skilled in the technical field of the present disclosure. For the convenience of the following description, some terms and names defined in the 3GPP standard may be used. However, the present disclosure is not limited by the above terms and names, and may be equally applied to systems conforming to other standards.

[0041] To facilitate understanding of the embodiments of the present disclosure, a staircase code will first be described. The staircase code can be viewed as a type of product code that has the characteristics of both a block code and a convolutional code. This can be easily understood through the structure of the staircase code. In the staircase code, a single level of stairs is formed by sequentially stacking M codewords of the same length encoded with a preset element code (e.g., a low density parity check (LDPC) code, a linear code including a polar code, etc.) as a row / column vector to create a matrix.

[0042] And if the rightmost M columns / rows of the codewords that make up the staircase code are regarded as rows / columns, and new information bits are added to each row and encoding is performed with the element code in the same way, a layer composed of new M codewords can be formed. Afterwards, when forming the next layer of the staircase code, the same operation is repeated in reverse, and if this process is repeated k times, the number of layers, a staircase code with k layers can be generated.

[0043] Here, double encoding is performed on the M overlapping rows (or columns) of each adjacent layer of the staircase code, and through individual decoding at each layer, the hard decision estimate value in the case of hard decision decoding, or the log likelihood ratio (LLR) value in the case of soft decision decoding (SDD), is transferred to the overlapping part of the adjacent layer, so there is a decoding error rate performance gain through this. In addition, the staircase code is a code that has the advantage of being able to completely parallelize the decoding of codewords corresponding to each row of a specific layer, and can also parallelize the decoding of non-adjacent layers as needed, so that the tradeoff between the error rate performance and the decoding delay can be adjusted during decoding.

[0044] Hereinafter, with reference to FIGS. 1A to 4, a method for encoding / decoding a staircase code based on a square matrix or a non-square matrix will be described. [Table 1] below defines the parameters referenced in the description of the staircase code.

[0045] [Table 1]

[0046]

[0047] First, the above-described staircase code can be expressed by dividing it into two forms: a staircase code based on a square matrix and a staircase code based on a non-square matrix (or fat matrix). In the following disclosure, the square matrix constituting the staircase code when encoding in a transmitting device is denoted as “A”, and the non-square matrix is ​​denoted as “B”. In addition, the square matrix constituting the staircase code when decoding in a receiving device is denoted as “X”, and the non-square matrix is ​​denoted as “Y”. In the following embodiments, in the square matrix-based staircase code, the first layer includes an initial matrix and one square matrix, and each layer of the remaining layers includes an overlapping portion with the previous layer (e.g., a square matrix) and one square matrix. In a non-square matrix-based staircase code, the first layer includes an initial matrix and one non-square matrix, and the remaining layers include an overlapping portion with the previous layer (e.g., a square matrix) and one non-square matrix. If the overlapping portion is regarded as one matrix, each layer in a square matrix or non-square matrix-based staircase code can be understood as including two matrices. In addition, the number of matrices included in each layer of the remaining layers in a square matrix or non-square matrix-based staircase code can be one or more. If the number of matrices included in each layer is one, the matrix can be understood as including the overlapping portion.

[0048] Figure 1a is a diagram showing an example of a configuration of a square matrix-based staircase code.

[0049] Referring to Fig. 1a, a square matrix is ​​a matrix in which the number of rows and the number of columns are the same, and Fig. 1a illustrates a staircase code based on a square matrix with a number of layers (k) of 5. Referring to Fig. 1a, a staircase code composed of, for example, 6 square matrices (A0, A1, A2, A3, A4, A5) having a size of M×M is illustrated, but if the number of matrices is 3 or more, a staircase code including overlapping portions can be formed. The number of layers, 5, is merely an example and may be 2 or more. In the example of Fig. 1a, two square matrices (A0, A1) form a first layer (110) in the staircase code, two square matrices (A1, A2) form a second layer (120), and in the same manner, a staircase code having multiple layers (or tiers) of a third layer, a fourth layer, and a fifth layer can be formed. And the first layer and the second layer have overlapping parts of A1, and the second layer and the third layer have overlapping parts of A2. In the same way, other layers may also have overlapping parts. In the staircase code, the decoding reliability can be improved through the overlapping parts. In the staircase code, the first matrix (or initial matrix) (A0) can be filled with, for example, all elements of the matrix with values ​​of 0 (or predetermined values) and can indicate the starting point of the staircase code. Since the staircase code based on a square matrix such as Fig. 1a has low complexity in encoding / decoding, a transmitting device and a receiving device using the staircase code can be implemented with low complexity.

[0050] Fig. 1b is a diagram for explaining an encoding method using a square matrix-based staircase code of Fig. 1a.

[0051] In the example of FIG. 1b, the first layer (110) of the staircase code includes a matrix (A0) (111) of size M×M and a matrix (A1) of size M×M. All elements of the matrix (A0) have, for example, a value of 0 (or a predetermined value), and the matrix (A1) includes an information portion (112) and a parity portion (113). The information portion (122) is filled with new information bits. For example, the parity portion (113) may be filled through row-wise encoding for each of the five rows of the first layer (110). That is, encoding is performed row-by-row using element code C, such as LDPC code, polar code, BCH code, etc., for the information bits of each row of the matrix (A0) and matrix (A1) of the first layer (110), to generate parity bits, and the parity bits are filled in the corresponding row of the parity part (113).

[0052] In the example of FIG. 1b, the second layer (120) of the staircase code includes a matrix (A1) (121) of size M×M and a matrix (A2) of size M×M. The second layer (120) includes the matrix (A1) and the matrix (A2), and the matrix (A1) corresponds to an overlapping portion of the first layer (110) and the second layer (120). The matrix (A2) of the second layer (120) includes an information portion (122) and a parity portion (123). The information portion (122) is filled with new information bits. For example, the parity portion (123) may be filled through column-wise encoding for each of the five columns of the second layer (120). Encoding using element code C, such as LDPC code, polar code, BCH code, etc., is performed column-by-column on the information bits of each column of the matrix (A1) and matrix (A2) of the second layer (120) to generate parity bits, and the parity bits are filled in the corresponding column of the parity part (123).

[0053] As described above, the encoding method using a square matrix-based staircase code is performed by alternating row-wise encoding or column-wise encoding in units of layers consisting of two square matrices, for example, and one square matrix is ​​overlapped between adjacent layers. In the case of the square matrix-based staircase code, the code length N of the element codeword in each layer consisting of two matrices C is simplified to twice M, and the number of information bits K Ccan be simply calculated as (2M-r). r is the number of parity bits of the element codeword. As a generalized example, in the above square matrix-based staircase code, the two matrices constituting each layer can be referred to as the first matrix and the second matrix, and when n is 2 or greater, the first matrix in the n-th layer overlaps the second matrix in the n-1th layer, and the first matrix in the n+1th layer overlaps the second matrix in the n-th layer.

[0054] Figure 2a is a diagram showing an example of a configuration of a non-square matrix-based staircase code.

[0055] Referring to Fig. 2a, a non-square matrix is ​​a matrix in which the number of rows and the number of columns are different, and Fig. 2a illustrates a staircase code based on a non-square matrix with a layer number (k) of 5. Referring to Fig. 2a, for example, a staircase code is illustrated consisting of a first matrix (initial matrix) (B0) of size M×M and a plurality of non-square matrices (B1, B2, B3, B4, B5) of size M×(NM) or (NM)×M. However, if the number of matrices constituting the staircase code is 3 or more, a staircase code including an overlapping portion between adjacent layers can be formed. In Fig. 2a, a first layer (210) of the staircase code includes a matrix (B0) and a matrix (B1), a second layer (220) includes at least a portion (201) of the matrix (B1) and a matrix (B2), and a third layer includes at least a portion of the matrix (B2) and a matrix (B3). Also, the second layer (220) may include at least a portion (201) of the matrix (B1) and the matrix (B2), and the third layer may include at least a portion (202) of the matrix (B2) and the matrix (B3). In the same manner, a staircase code having multiple layers (or tiers) of the fourth layer and the fifth layer may be formed. In Fig. 2a, the first layer (210) and the second layer (220) have overlapping portions (201) corresponding to at least a portion of the matrix (B1), and the second layer (220) and the third layer have overlapping portions (202) corresponding to at least a portion of the matrix (B2). In the same manner, other layers may also have overlapping portions. In the staircase code, the decoding reliability can be improved through the overlapping portion(s).

[0056] In Fig. 2a, the overlapping portion assumes an example having a size of M×M. In the staircase code, the first matrix (initial matrix) (B0) may be filled with, for example, all elements of the matrix having values ​​of 0 (or predetermined values), and may indicate the starting point of the staircase code. Since a staircase code based on a non-square matrix as in Fig. 2a has low complexity in encoding / decoding, a transmitting device and a receiving device using the staircase code can be implemented with low complexity. As a generalized example, in the staircase code based on a non-square matrix, the two matrices constituting each layer may be referred to as a first matrix and a second matrix, and the second matrix uses a non-square matrix. When n is 2 or more, the first matrix in the n-th layer overlaps at least a portion of the second matrix in the n-1th layer, and the first matrix in the n+1th layer overlaps at least a portion of the second matrix in the nth layer. And, the first matrix (initial matrix) of the staircase code and the first matrix corresponding to the overlapping portion when n is 2 or greater can use square matrices. As an optional embodiment, it is also possible to configure at least one of the first matrix (initial matrix) and the first matrix corresponding to the overlapping portion as a non-square matrix.

[0057] FIG. 2b and FIG. 3 are drawings for explaining an encoding method using a non-square matrix-based staircase code of FIG. 2a.

[0058] In Fig. 2b, the first layer (210) of the staircase code includes a matrix (B0) (211) of size M×M and a matrix (B1) of size M×(NM). All elements of the matrix (B0) have, for example, a value of 0, and the matrix (B1) includes an information portion (212a or 212b) and a parity portion (213a or 213b). Fig. 2b (a) illustrates a case where the size of the parity portion (213a) is larger than that of the information portion (212a), and Fig. 2b (b) illustrates a case where the size of the information portion (212b) is larger than that of the parity portion (213b). The information portion (212a or 212b) is filled with new information bits. For example, in the first layer (210), the parity portion (213a or 213b) can be filled in through row-wise encoding for each of the five rows. Reference numeral 21 indicated by a dotted line in FIG. 2b illustrates a boundary line of the overlapping portion of the first layer (210) and the second layer (220). In the matrix (B0) and the matrix (B1), encoding using an element code C, such as an LDPC code, a polar code, or a BCH code, is performed row-by-row for the information bits of each row to generate parity bits, and the parity bits are filled in the corresponding row of the parity portion (213a or 213b). In addition, as in the example of FIG. 2b, in the overlapping portion between adjacent layers in the staircase code, a case where information bits and parity bits are mixed (FIG. 2b (b)) and a case where only parity bits exist (FIG. 2b (a)) can be considered.

[0059] For convenience of explanation, the example of Fig. 3 shows an encoding method performed in the second layer (220) of a staircase code, assuming that the size of the parity portion (213a) is larger than the information portion (212a), as in the example of (a) of Fig. 2b. The method of Fig. 3 can be equally applied to the example of (b) of Fig. 2b. Referring to Fig. 3, the second layer (220) of the staircase code includes at least a portion (201) of a matrix (B1) and a matrix (B2) having a size of (NM)×M. At least a portion (201) corresponding to the overlapping portion of the first layer (210) and the second layer (220) in the staircase code is a matrix having a size of M×M, and the matrix (B2) includes an information portion (222) and a parity portion (223). The information portion (222) is filled with new information bits. For example, in the second layer (220), the parity part (223) can be filled in through column-wise encoding for each of the five columns. Encoding is performed column-by-column using an element code C, such as an LDPC code, a polar code, or a BCH code, for the information bits of each column of the overlapping part (201) and the matrix (B2), to generate parity bits, and the parity bits are filled in the corresponding column of the parity part (223). The overlapping part (201) can be virtually rotated by, for example, 90 degrees when encoding together with the matrix (B2). As described above, the encoding method using a staircase code based on a non-square matrix is ​​performed by alternating row-wise encoding or column-wise encoding, and at least a portion of the non-square matrix is ​​provided as an overlapping part between adjacent layers.

[0060] In the present disclosure, for the non-square matrix-based step code, only the relationship between M and r in [Table 1] is sufficient for N C Wow K CSince it is not possible to express the number of information bits of the element codeword and the code length of the element codeword, the number of information bits of the element codeword and the code length of the element codeword are displayed separately. And in the case of the step code based on the square matrix, N C Wow K C may not be indicated separately.

[0061] In the example of Fig. 3, the encoding method using a non-square matrix-based staircase code is specifically explained. First, the elements of the initial matrix (B0) of size M×M can be filled with 0, meaning that no information is loaded, or information bits can be filled. In the case of a square matrix-based staircase code, the matrix is ​​filled in all layers. Although it is composed of square matrices of size M×M, in the case of a non-square matrix-based staircase code, the initial matrix (B0) of the first layer is composed of a square matrix of size M×M, and the remaining matrices in each layer of the staircase code are can be composed of non-square matrices of size M×(NM) or (NM)×M.

[0062] Step 1: Matrix B that constructs the step code i First, to form (i=1, 2, …, k) B i A total of M(NMr) information bits can be inserted into the left (NMr) columns by row or column, or in any method or order, where r is the number of parity bits. The example in Fig. 3 is a matrix B i It is assumed that row-by-row encoding is performed in matrix B, although not shown in Fig. 3. i Column-wise encoding can be performed in which case the encoding operations in steps 2 and 3 below are performed on the matrix B in step 1 above. i The opposite operation can be performed when row-by-row encoding is performed.

[0063] Step 2: Then, for each row, the matrix B of the previous layer i-1By treating the M bits corresponding to the overlapping portion (201) as information bits and performing encoding using the element code C on the total (Nr) information bits including the newly inserted (31) information bits (222), r parity bits (223) can be generated in units of columns or rows. By applying the corresponding operation equally to all rows, a new staircase (or matrix) can be generated.

[0064] Step 3: From the second layer onwards, the operations can be divided into two according to the stair index i. For example, if i is even, the matrix B of the previous layer i-1 The rightmost M columns can be virtually rotated 90° counterclockwise. That is, the overlapping portion can be formed by rows with the rightmost column at the top. Based on the matrix composed of M rows thus created, the matrix B is located on the right. i The operations of steps 1 and 2 above can be performed to generate a new layer matrix B generated in this way. i The matrix B of the previous layer of the existing structure before performing the virtual rotation i-1 It is pasted at the bottom of the rightmost M columns. In addition, if the index i of the layer is even, since the previous layer is a layer that performed row-by-row encoding, the first row of the next layer can be configured from the rightmost M columns of the previous layer for encoding in the next layer, and the total M columns of the previous layer can be rotated in order to become the M rows of the next layer.

[0065] If the layer index i above is odd, the matrix B of the previous layer i-1 Matrix B on the right side of the bottom M rows based on iThe operations of steps 1 and 2 above can be performed to generate . When the layer index is i, row-by-row encoding can be performed on the lowermost M rows of the previous layer (i-1), in which case operations such as 90-degree rotation are not required.

[0066] Step 4: If the operations of steps 1 to 3 described above are repeated a total of k times, a staircase code consisting of k layers can be generated.

[0067] The encoding method using the overlapping portion and virtual rotation in steps 1 to 4 above can be applied in the same manner to a square matrix-based staircase code.

[0068] In the case where no information is loaded in the initial matrix B0 of the first layer from the codeword of the staircase code generated in the above manner, the codeword obtained by reading all bits of the matrix B1 excluding the initial matrix B0 in the first layer and the matrices (B2, B3, …) in the remaining layers as row or column vectors regardless of the order can be defined as the final codeword. As an optional embodiment, in the case where the initial matrix B1 in the first layer contains information bits, all matrices (B0, The codeword obtained by reading all bits of B1B2, B3, … as a row or column vector regardless of the order can be defined as the final codeword. This definition can be applied to both square matrix-based step codes and non-square matrix-based step codes.

[0069] In the following description of the present disclosure, for convenience, it is assumed that the initial matrix B0 does not contain information bits and is filled with, for example, values ​​of 0.

[0070] [Table 2] below shows the code rate (R) of the element codeword in the non-square matrix-based step code mentioned above. C ) and the total code rate (R) of the staircase code tot) is an example.

[0071] [Table 2]

[0072]

[0073] For non-square matrix-based staircase codes, the total code length N of the codewords tot can be calculated as kM(NM), and for square matrix-based step codes, it is in simpler form kM 2 can be expressed as kM(Nr) for non-square matrix-based step codes or kM(Mr) for square matrix-based step codes. In the case of square matrix-based step codes, the code rate is the code rate of the element codeword. and total code rate Comparing them, it can be seen that the code rate of the element codeword is higher. In other words, if the code rate of the entire codeword of the staircase code is increased, the code rate of the element codeword increases to a larger value, which has a great impact on the performance of the element code.

[0074] Figure 4 is a diagram for explaining a decoding method using a square matrix-based staircase code.

[0075] The square matrix-based staircase code can be encoded using the encoding method of Fig. 1b as described above, and can be decoded using the decoding method of Fig. 4. Decoding can utilize decoding using the element code C of the LDPC code, polar code, BCH code, etc. used during encoding.

[0076] First, it is assumed that the transmitting device encodes and transmits a staircase code composed of a plurality of square matrices (A0, A1, A2, A3, A4, A5) having a size of M×M using a staircase code based on a square matrix with a layer number (k) of 5, as in the examples of FIGS. 1a and 1b. The receiving device can receive / obtain a staircase code composed of six square matrices (X0, X1, X2, X3, X4, X5) having a size of M×M, as in FIG. 4 (a). At this time, if the initial matrix (A0) has a value of 0 (or a predetermined value), for example, what is actually received by the receiving device is a staircase code of five square matrices (X1, X2, X3, X4, X5), and the receiving device fills the initial matrix (X0) of the staircase code with a value of 0 (or a predetermined value) like the initial matrix (A0). The receiving device can decode information bits by performing row-wise decoding on the matrices (X4, X5) of the fifth layer in step 401, column-wise decoding on the matrices (X3, X4) of the fourth layer in step 402, and alternately performing row-wise decoding or column-wise decoding on the third layer to the first layer in steps 403 to 405 in the same manner as in (b) of FIG. 4. In addition, as an optional example, it is also possible to decode information bits by alternately performing row-wise decoding or column-wise decoding in the reverse order from the first layer to the fifth layer.

[0077] Figure 5 is a diagram for explaining a decoding method using a non-square matrix-based staircase code.

[0078] A non-square matrix-based staircase code can be encoded using the encoding method of Fig. 3 as described above, and can be decoded using the decoding method of Fig. 5. Decoding can utilize decoding using the element code C of the LDPC code, polar code, BCH code, etc. used during encoding.

[0079] First, it is assumed that the transmitting device encodes and transmits a staircase code composed of a first matrix (initial matrix) (B0) of size M×M and five non-square matrices (B1, B2, B3, B4, B5) of size M×(NM) or (NM)×M, as in the examples of FIG. 2a to FIG. 3, based on a non-square matrix with a layer number (k) of 5. The receiving device can receive / acquire a first matrix (initial matrix) (Y0) of size M×M and five non-square matrices (Y1, Y2, Y3, Y4, Y5) of size M×(NM) or (NM)×M, as in (a) of FIG. 5. At this time, if the initial matrix (B0) has, for example, a value of 0 (or a predetermined value), what is actually received by the receiving device is a staircase code of five non-square matrices (Y1, Y2, Y3, Y4, Y5), and the receiving device fills the initial matrix (Y0) of the staircase code with a value of 0 (or a predetermined value) like the initial matrix (B0). As shown in (b) of FIG. 5, the receiving device performs row-wise decoding on the matrices (Y4, Y5) of the fifth layer in step 501, column-wise decoding on the matrices (Y3, Y4) of the fourth layer in step 502, and in the same manner, alternately performs row-wise decoding or column-wise decoding on the third layer to the first layer in steps 503 to 505 to decode the information bits. Additionally, as an optional example, it is also possible to decode information bits by alternately performing row-by-row decoding or column-by-column decoding in reverse order from the first layer to the fifth layer in Fig. 5 (b).

[0080] The encoding of the above-mentioned staircase code results in a very long codeword. If a portion of the codeword experiences a burst error channel, decoding failure of the corresponding codeword may occur. To resolve such decoding failure, the Hybrid automatic retransmission request (HARQ) technique used in 5G NR systems can be utilized. In this regard, retransmitting the entire codeword of the staircase code to repair a decoding error in a specific component codeword has a negative impact on resource efficiency, decoding complexity, and delay.

[0081] Therefore, if we could detect errors by concatenating cyclic redundancy check (CRC) bits for each element codeword in each layer of the staircase code and retransmit only the specific codeword in which an error is detected, the aforementioned negative effects could be improved. However, the length of the element codewords that make up the staircase code is relatively small, so retransmitting only the codewords in which an error is detected may be practically limited. Furthermore, adding individual CRC bits to each element codeword can lead to unnecessary resource utilization and loss in terms of code rate.

[0082] In this way, retransmitting the entire codeword or a specific component codeword of a staircase code has many problems. To solve these problems, embodiments of the present disclosure propose various embodiments that utilize CRC for error detection of staircase codes, but do not add CRC bits to the entire codeword or component codeword constituting the staircase code, but add CRC bits to a set of new information bits in each single layer or a set of information bits of multiple layers during the encoding process of the staircase code.

[0083] These embodiments of the present disclosure enable error detection using CRC of a single layer or multiple layers of a staircase code, thereby preventing unnecessary waste of resources and enabling the use of error detection capabilities and retransmission techniques without significant loss in terms of code rate. In addition, the length of the CRC bits added to each layer or multiple layers of the staircase code can be dynamically adjusted, so that relatively long CRC bits can be added to a specific layer that has insufficient error detection capabilities or relatively low decoding performance. In addition, in the present disclosure, information bits can be protected by using the CRC bits for error correction rather than partial error detection. Hereinafter, adding CRC bits to each layer of a staircase code will be referred to as CRC encoding. And the CRC bits can be referred to as a CRC code.

[0084] In the present disclosure, the transmitting device can individually perform CRC encoding on each element codeword of the staircase code in the same manner as the CRC encoding method applied in the NR system. The generated CRC bits can be attached to the end of the existing information bits. The receiving device can perform error detection on each element codeword by individually performing CRC on each element codeword. The scope of the CRC encoding may or may not include the first M duplicated / overlapped bits of the element codeword (for example, the duplicated / overlapped bits (hereinafter, "overlapped bits") may include information bits and parity bits already processed in the previous layer of the staircase code, or may be composed only of parity bits). CRC encoding may also be performed on the overlapped bits, but in this case, CRC encoding may be performed on parity bits that do not require protection, which may reduce resource utilization efficiency. Whether to perform CRC encoding on the above-described overlapping part of the staircase code can be selectively adjusted depending on the channel environment or the importance of resource utilization efficiency.

[0085] FIG. 6 is a diagram illustrating an example of an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure.

[0086] An example of Fig. 6 is two square matrices (A) of size M×M in a staircase code having multiple layers. i-1 , A i )(where i is the layer index) represents the row-wise CRC encoding in the i-th layer. Matrix (A i-1 ) contains the previously encoded bits (611) in the i-1th layer and corresponds to the overlapping part in the staircase code. In the i-th layer, the matrix (A i ) includes new information bits (612), CRC bits (613) and parity bits (614).

[0087] Action 1: (a) of Fig. 6 shows the matrix (A) in the i-th layer i ) shows the operation of inserting new information bits (612). M 2 A matrix (A) containing previously encoded bits (611) of bit numbers i-1 ) adjacent to the right of the matrix (A) i ) are added with new information bits (612) of M×d bits in d columns. The number of new information bits inserted in each row is assumed to be d. In this case, each row of the i-th layer consists of M+d information bits. As an optional embodiment, the matrix (A i-1 ) is not limited to the example of Fig. 6, and the position where new information bits (612) are added to the matrix (A i-1 ) can be added to various locations such as the right, left, or middle.

[0088] Operation 2: (b) of Fig. 6 illustrates an operation in which CRC encoding of length L is performed for each row of the i-th layer. L can be of various lengths, and the CRC code for each length can be defined as a generator polynomial or a generator matrix. Through CRC encoding, each row of the i-th layer includes CRC bits (613) in terms of element codes. It can be composed of information bits of the dog. In (b) of Fig. 6, CRC encoding performed row by row in the i-th layer is performed by matrix (A i-1 ) in each row of the previously encoded bits (611) and the matrix (A i ) is performed on the information bits including new information bits (612) in each row of the matrix (A), and the CRC bits (613) generated through CRC encoding are i ) are added to the right of the new information bits (612).

[0089] Operation 3: (c) of Fig. 6 shows an operation in which encoding is performed using an element code C, such as an LDPC code, a polar code, or a BCH code, for each row of the i-th layer. In each row of the i-th layer, a total of Encoding is performed using element codes for the information bits of the number r, and r parity bits (614) are generated, and each row is a total of can be filled with encoded bits. Parity bits (614) generated through encoding using element codes are stored in a matrix (A i ) are added to the right of the CRC bits (613).

[0090] The example of Fig. 6 illustrates row-wise encoding performed in the i-th layer, and row-wise encoding and column-wise encoding in the staircase code can be performed alternately as described above. Column-wise encoding performed in the i-1, i+1-th layers can be performed in the same manner by replacing the row-wise operations of operations 1 to 3 in the encoding method of Fig. 6 with column-wise operations. In addition, the row-wise or column-wise encoding can be performed in units of element codewords.

[0091] FIG. 7 is a diagram illustrating an example of an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure.

[0092] The example of Fig. 7 shows an example in which the encoding method of Fig. 6 is performed on a staircase code composed of a plurality of square matrices (A0, A1, A2, A3, A4, A5) having a size of M×M using a staircase code based on a square matrix with a layer number (k) of 5.

[0093] In (a) of Fig. 7, row-wise encoding can be performed on the matrices (A0, A1) of the first layer (710) by applying the encoding method of Fig. 6. The matrix (A0) is an initial matrix filled with 0s. Thereafter, in (b) of Fig. 7, column-wise encoding can be performed on the matrices (A1, A2) of the second layer (720) by applying the encoding method of Fig. 6 on a column-by-column basis. In the same manner, row-wise encoding or column-wise encoding can be alternately performed on the remaining layers of the staircase code.

[0094] FIG. 8 is a diagram illustrating an example of an encoding method including CRC addition for a non-square matrix-based staircase code according to an embodiment of the present disclosure.

[0095] The example of Fig. 8 shows an example in which the encoding method of Fig. 6 for CRC encoding is performed on a staircase code having a layer number (k) of 3, which is composed of an initial matrix (B0) of size M×M and a plurality of non-square matrices (B1, B2, B3) of size M×(NM) or (NM)×M, similar to the examples of Figs. 2a to 3. In the encoding method of the staircase code based on a non-square matrix of Fig. 8, the matrix (B) in the i-th layer i ) and the operation in which new information bits are inserted into the i-th layer, and the operation in which CRC encoding of length L is performed for each row or column unit of the i-th layer, can be applied in the same manner as operations 1 and 2 in the encoding method of Fig. 6. And the operation in which encoding is performed using element code C, such as LDPC code, polar code, BCH code, etc., for each row or column unit of the i-th layer, is performed by indicating the number of bits encoded in operation 3 in the encoding method of Fig. 6. The value of is not 2M, but the code length N of the element codeword C If set as such, it can be applied in the same way.

[0096] Figures 8(a), (b), and (c) illustrate various examples of combinations of information bits, CRC bits, and parity bits included in the overlapping portions (801, 802, and 803) between adjacent layers according to the code rate of the element codeword in each layer of the staircase code. Figure 8(a) illustrates a case where only parity bits are included in the overlapping portion (801), Figure 8(b) illustrates a case where information bits, CRC bits, and parity bits are included in the overlapping portion (802), and Figure 8(c) illustrates a case where CRC bits and parity bits are included in the overlapping portion (803). As in the example of Fig. 8, the overlapping portion between adjacent layers of the staircase code can include more information bits in the overlapping portion (802) when increasing the code rate, error rate during decoding, etc., and when the error rate during decoding is high, CRC bits and / or parity bits can be further included in the overlapping portion (803) to lower the error rate.

[0097] In the embodiments of FIGS. 6 to 8, in the encoding method of a staircase code based on a square matrix or a non-square matrix, CRC bits are added by performing row-wise or column-wise CRC encoding on information bits including previously encoded bits and new information bits in each layer. However, in the embodiments below, a CRC encoding method that adds CRC bits by performing row-wise or column-wise CRC encoding on new information bits excluding previously encoded bits in each layer will be described. In this way, CRC encoding using new information bits in a staircase code according to the present disclosure will be referred to as layer-wise CRC encoding.

[0098] The layer-by-layer CRC encoding performs CRC encoding on a set of new information bits attached to each layer of the staircase code during the encoding process of the staircase code. The generated CRC bits are attached to the right column(s) of the information bits. A receiving device that receives a staircase code encoded through the layer-by-layer CRC encoding can detect errors on a layer-by-layer basis by performing CRC on each specific layer. As an optional embodiment, in a staircase code to which the layer-by-layer CRC encoding is applied, the overlapping portion between adjacent layers may or may not include information bits (e.g., information bits encoded in the previous layer) or parity bits. When performing CRC encoding on new information bits on each layer of the staircase code in this way, since the method of reading the corresponding information bits when converting them into a row vector does not affect the encoding / decoding performance, various methods such as row-first or column-first can be used to read the corresponding information bits and perform CRC encoding. As an optional embodiment, the layer-by-layer CRC encoding can be performed by CRC encoding on a single layer basis or CRC encoding on a multiple layer basis.

[0099] FIG. 9 is a diagram illustrating an example of an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure. The example of FIG. 9 illustrates single-layer unit CRC encoding.

[0100] An example of Fig. 9 is two square matrices (A) of size M×M in a staircase code having multiple layers. i-1 , A i )(where i is the layer index) represents the row-wise CRC encoding in the i-th layer. Matrix (A i-1 ) contains the previously encoded bits (911) in the i-1th layer and corresponds to the overlapping part in the staircase code. In the i-th layer, the matrix (A i) includes new information bits (912), CRC bits (913) and parity bits (914).

[0101] Action 1: (a) of Fig. 9 shows the matrix (A) in the i-th layer i ) shows the operation of inserting new information bits (912). M 2 A matrix (A) containing previously encoded bits (911) of bit numbers i-1 ) adjacent to the right of the matrix (A) i ) are added with new information bits (912) of M×d bits in d columns. The number of new information bits inserted in each row is assumed to be d. In this case, each row of the i-th layer consists of M+d information bits. As an optional embodiment, the matrix (A i-1 ) is not limited to the example of Fig. 9, and the position where new information bits (912) are added to the matrix (A i-1 ) can be added to various locations such as the right, left, or middle.

[0102] Operation 2: (b) of Fig. 9 illustrates an operation in which CRC encoding of length L' is performed for each row of the i-th layer. L' can be of various lengths, and the CRC code for each length can be defined as a generator polynomial or a generator matrix. Through CRC encoding, each row of the i-th layer includes CRC bits (913) in terms of element codes. It can be composed of information bits of dogs. Here, the length of L' can be set in various ways, and specific examples will be described later. In (b) of Fig. 9, CRC encoding in the i-th layer is performed by matrix (A i-1 ) except for the previously encoded bits (911) of the matrix (A i) can be performed on a set or all of new information bits (912). CRC encoding on a set or all of new information bits (912) can be performed on a set or all of bits read by increasing or decreasing the row index in each column through row vector transformation in the columns into which new information bits (912) are inserted, as shown in the example shown by the arrow in (b) of Fig. 9. The CRC bits (91) generated through CRC encoding are stored in a matrix (A i ) are added to the right of the new information bits (913).

[0103] Operation 3: (c) of Fig. 9 shows an operation in which encoding is performed using an element code C, such as an LDPC code, a polar code, or a BCH code, for each row of the i-th layer. In each row of the i-th layer, a total of Encoding is performed using element codes for the information bits of the number r, and r parity bits (914) are generated, and each row is a total of can be filled with encoded bits. Parity bits (914) generated through encoding using element codes are stored in a matrix (A i ) are added to the right of the CRC bits (913).

[0104] The example of Fig. 9 illustrates row-wise encoding performed in the i-th layer, and row-wise encoding and column-wise encoding in the staircase code can be performed alternately as described above. Column-wise encoding performed in the i-1, i+1-th layers can be performed in the same manner by replacing the row-wise operations of operations 1 to 3 in the encoding method of Fig. 9 with column-wise operations. In addition, the row-wise or column-wise encoding can be performed in units of element codewords.

[0105] In the embodiment of FIG. 9, the encoding method of generating a CRC code using a set of new information bits, excluding previously encoded bits in each layer of the staircase code, can generate a CRC code with a relatively smaller number of bits compared to the CRC encoding method of FIG. 6. In this case, since parity bits can be generated with a relatively larger number of bits in each layer, the decoding performance can be improved while reducing the code rate loss. In addition, the CRC encoding method of FIG. 9 can be applied in the same manner to a non-square matrix-based staircase code.

[0106] FIGS. 10A to 10C illustrate various methods for adjusting the length L' of a CRC code in an encoding method including CRC addition for a square matrix-based staircase code according to an embodiment of the present disclosure.

[0107] When the length of the CRC code is L', and L' is compared with the number of rows M of a square matrix, the example in Fig. 10a shows that when L' is divisible by M (i.e. ) for the case where L' is not divisible by M. The examples in Figs. 10b and 10c are It is about.

[0108] Looking at the structure of each layer of the staircase code in Figures 10a to 10c, each layer is composed of matrices of size M×N (A i-1 , A i ) (where i is the layer index), and the left matrix (A i-1 ) are the M columns of bits previously processed in the i-1th layer and are bits to be used as information bits in the ith layer. The right matrix (A i ) are inserted into d columns from the leftmost side, and a CRC code (bits) of length L' generated through CRC encoding for a set of new information bits is inserted into the right matrix (A i) are added to the right column(s) adjacent to d columns (hereinafter referred to as CRC column(s)). Right matrix (A i ) Parity bits are added to the rightmost r columns.

[0109] Figure 10a shows the case where the length L' of the CRC code is equal to an integer multiple of the number of rows M of the square matrix (1001) (or when L is divisible by M), and the matrix (A i ) can be filled entirely with CRC bits. In this case, the matrix (A i )at Immediately to the right of the columns where new information bits of size are inserted dog CRC column(s) generated by CRC encoding Parity bits are added. As a result, N=M+d+ The relationship +r is established.

[0110] Figures 10b and 10c illustrate the case (1002, 1003) where the length L' of the CRC code is not divisible by the number of rows M of the square matrix. In the case of Figures 10b and 10c, the CRC bits generated through CRC encoding are in the matrix (A i )of After filling in the CRC columns of the dog, the last Because the entire CRC column cannot be filled (as in the examples of Figs. 10b and 10c), the remaining parity part (where M-L') CRC bits are filled in), empty spaces (areas) are generated in (M-L') row(s) in the CRC column(s). Additional (parity) bits or information bits can be inserted into the empty spaces (areas), for example. The additional (parity) bits are A dog can be inserted. The above additional (parity) bits can be parity bits using the element code, even parity bits, or zero bits. When parity bits using the element code are inserted, The parameter(s) of the element code for a row may be changed, and when the even parity bits are inserted, 1 even parity bit generated based on the new information bits in the corresponding row may be inserted. When the zero bits are inserted, the empty space may be easily filled.

[0111] When inserting information bits into the above-mentioned empty space, new information bits or previously inserted information bits can be inserted by repetition in the empty space. In this case, the same encoding strategy can be used because the codeword of the row into which CRC bits are inserted and the codeword of the row(s) into which CRC bit(s) are not inserted have the same number of information bits in the encoding of the element code.

[0112] As an optional embodiment, when inserting additional (parity) bits (or null bits) into the above blank space, method 1, method 2, or method 3 below can be used.

[0113] Method 1: Inserting parity bits into the element code

[0114] In the row(s) where the above-mentioned empty space is created, the code rate can be adjusted to generate at least one more parity bit than in other rows. The code rate can be finely adjusted. Method 1 can be used when the preset information bits are limited.

[0115] Method 2: Zero Padding

[0116] The above empty space is filled with null bit(s) by inserting a value(s) of 0 through nulling. In this case, the receiving device can know in advance through the system parameters for the staircase code that the empty space is filled with null bit(s). Therefore, when using a systematic code, decoding is possible by inserting a maximum reliability value, and performance gains can be expected through this.

[0117] Method 3: Inserting a parity bit

[0118] Matrix (A i ) can be used to generate even parity bit(s) using the information bits in the corresponding row(s) where the above blank space is generated and inserted into the blank space.

[0119] The various methods for adjusting the length L' of the CRC code in the embodiments of FIGS. 10a to 10c can be applied in the same manner to a non-square matrix-based staircase code.

[0120] FIG. 11 is a diagram illustrating an example of an encoding method including CRC addition for a non-square matrix-based staircase code according to an embodiment of the present disclosure. The example of FIG. 11 illustrates multi-layer unit CRC encoding.

[0121] Figure 11 illustrates a staircase code based on a non-square matrix with a layer count (k) of 3 or more. For example, a number of non-square matrices (B) of size M×(NM) or (NM)×M i-1 , B i , B i-1 ) in the staircase code, which includes an M×M sized overlapping portion between adjacent layers. In the example of Fig. 11, the overlapping portion may include, for example, previously encoded bits.

[0122] In (a) of Fig. 11, the staircase code includes, for example, S (S=3 in Fig. 11) new information parts (1101a, 1101b, 1101c) in units in which multi-layer unit CRC encoding can be performed. In (b) of Fig. 11, the CRC parts (1102a, 1102b, 1102c) are respectively added adjacent to the new information parts (1101a, 1101b, 1101c) in the corresponding layer. In the present embodiment, the CRC parts (1102a, 1102b, 1102c) can be generated by performing a single CRC encoding on a set of S new information parts (1101a, 1101b, 1101c). The entire CRC bits generated in this way can be divided into S CRC parts (1102a, 1102b, 1102c) and added adjacent to the corresponding new information part in each layer. As in the example of Fig. 11, CRC encoding can be performed in units of multiple layers. For example, if the total number of layers of the staircase code is 30 and the multiple layer units in which CRC encoding is performed is S=3, CRC encoding can be performed once for every three layers, so a total of 10 CRC encodings can be performed. When CRC encoding is performed by the method of Fig. 11, the receiving device can perform CRC in units of multiple layers to detect errors. And when performing single-layer unit CRC encoding as in the embodiment of FIG. 9, indexes for distinguishing CRC bits are required for each layer of the staircase code, but when performing multiple-layer unit CRC encoding as in the embodiment of FIG. 11, since CRC bits can be distinguished for each multiple layer, the number of indexes for distinguishing CRC bits can be reduced. This enables efficient CRC encoding / decoding in a transmitting device and a receiving device using a staircase code.

[0123] As an optional embodiment, in a staircase code to which multi-layer CRC encoding is applied, the overlapping portion between adjacent layers may or may not include information bits (e.g., information bits from a previous layer) or parity bits. When performing CRC encoding on new information bits in multi-layer units of the staircase code, since the method of reading the corresponding information bits when converting them into row vectors does not affect encoding / decoding performance, the corresponding information bits can be read in various ways, such as row-first or column-first, and CRC encoding can be performed.

[0124] The method of FIG. 11 described above can be applied in the same manner to multi-layer unit CRC encoding based on a square matrix.

[0125] To explain the CRC encoding method in multiple layers in detail, when the number of layers to perform CRC encoding at a time is S, The generation process of the th layers is as follows: 1), 2), 3). Assume that the number of new information bits in each row of each layer is d.

[0126] Action 1): In Fig. 11, the matrix (B) in the i-th layer i ) can be inserted into the matrix B of each layer. i ( ) in the matrix B of size M×M containing the information bits encoded in the i-1 layer. i-1 Add M×d new information bits to the d adjacent right columns. At this time, each row contains M+d information bits. At this time, the direction of adding new information bits is not limited to the example of Fig. 11, and the matrix (A i-1 ) can be added to various locations such as the right, left, or middle.

[0127] Operation 2): CRC encoding of length L' can be performed in multiple layer units in Fig. 11. CRC encoding is performed by adding a CRC code of length L' to as many new information bits as S(M×d). At this time, CRC encoding is performed in multiple layer units as described in the example of Fig. 11. The CRC bits generated through one CRC encoding are divided into S CRC parts and can be added adjacent to the corresponding new information bits (information part) in each layer. L' can be of various lengths, and the CRC code for each length is defined as a generator polynomial or a generator matrix. Through CRC encoding, each row is divided into a total of S CRC bits in terms of element codes. It can be composed of information bits of a dog. At this time, the length of L' can be adjusted as exemplified in the embodiments of FIGS. 10a to 10c.

[0128] Operation 3): Encoding can be performed using element code C, such as LDPC code, polar code, BCH code, etc., for each row or column unit of the i-th layer. For each row or column of the i-th layer, the total Encoding is performed using element codes on the information bits of r, and r parity bits are generated, and each row is divided into a total of can be filled with encoded bits. Parity bits generated through encoding using element codes are stored in a matrix (B i ) can be added to the right of the CRC bits. In the receiving device, errors can be detected through individual CRCs in multiple layer units.

[0129] As an optional embodiment, in the above multi-layer unit CRC encoding, if the number of total layers k is not a multiple of S, which is the number of layers (units) on which one CRC encoding is performed, for example, There may be as many layers as there are dogs left. In this case It is also possible to perform CRC encoding only on the information bits of the dog's layer(s).

[0130] FIG. 12 is a diagram for explaining a method of adjusting the length of a CRC code by considering the number of overlapping portions in each layer in a staircase code according to an embodiment of the present disclosure.

[0131] Referring to Fig. 12, a staircase code based on a square or non-square matrix with k layers is illustrated. The non-square matrices constituting the staircase code (B0, B1, B2, …, B k-2 , B k-1 , B k ) includes overlapping portions (1201, 1202, 1203, …, 1204, 1205, 1206) between adjacent layers. The overlapping portions may include, for example, bits encoded in the previous layer. In Fig. 12, due to the structural characteristics of the staircase code, the matrix B0 of the first layer and the matrix B of the last layer k Unlike other layers located in the middle, it includes only one overlapping portion, and the other layers may include two overlapping portions. Since the overlapping portion includes the encoded bits of the other layers, information of the adjacent other layers can be obtained through the overlapping portion during decoding. Since the first layer and the last layer in the staircase code each include only one overlapping portion, the decoding performance and / or error detection performance may be relatively low compared to the other layers. By adjusting the length of the CRC code in the first layer and the last layer to be longer than the length of the CRC code in the other layers, the error detection performance in the first layer and the last layer can be further improved. As an optional embodiment, the decoding performance and / or error detection performance of the staircase code can be improved by selectively reducing or increasing the length of the CRC code in layers other than the first layer and the last layer.

[0132] In the above embodiments of the present disclosure, the total number of information bits and the code rate of the staircase code can be determined or negotiated in various ways through signaling between the transmitting device and the receiving device in the communication system. For example, assuming that the transmitting device is a base station and the receiving device is a terminal, or vice versa, the transmitting device can provide, for example, first control information related to the encoding of the staircase code to the receiving device in advance. The first control information related to the encoding can be information indicating / indicating at least one of the parameters in [Table 1]. In an optional embodiment, the first control information can correspond to MCS information. In this case, the first control information can be stored / provided in advance to the transmitting device and the receiving device, for example, as table information, and the transmitting device and the receiving device can check the encoding-related parameters of the staircase code corresponding to the MCS information from the table information and perform encoding and decoding operations.

[0133] As an optional example, in the encoding-related parameters of the staircase code, the number of layers k and the number of rows / columns in each layer M are the total code length N, which have a great influence on the encoding / decoding performance and complexity. tot and the total number of information bits K tot Because it determines the N, it can be determined in various ways depending on the requirements such as decryption performance or system delay. Here, the N tot Wow K tot can use predetermined information. A receiving device that receives a signal encoded using a staircase code receives the first control information and then sets encoding-related parameters (N) based on the channel environment, requirements, and currently available resource size. tot , K tot, k, M) requires adjustment, the second control information related to encoding of the staircase code indicating the adjusted encoding-related parameters may be transmitted to the transmitting device. The transmitting device may perform encoding of the staircase code using the adjusted parameters based on the second control information and transmit the encoded signal to the receiving device. The receiving device may decode the received signal based on the encoding-related parameters in the first control information or the second control information. At least one of the transmission and reception operations of the first control information and the second control information may be selectively performed between the transmitting device and the receiving device. The first control information and the second control information may be transmitted and received between the transmitting device and the receiving device through at least one of system information, RRC (Radio Resource Control) information, MAC-CE (Medium Access Control-Control Element), and DCI (Downlink Control Information) information.

[0134] FIG. 13A is a diagram illustrating an encoding method including CRC addition for a step code performed in a transmitting device of a wireless communication system according to an embodiment of the present disclosure. The encoding method including CRC addition may be performed using at least one of the embodiments of FIGS. 6 to 12. The step code of FIG. 13A may be applied to both square matrix-based step codes and non-square matrix-based step codes.

[0135] Referring to FIG. 13A, in step 1301, a transmitting device may transmit encoding-related control information (setting information) including a CRC addition of a staircase code described in the embodiments of FIGS. 6 to 12 to a receiving device. The setting information may include at least one of the parameters in [Table 1], or information indicating / indicating the at least one parameter, or information corresponding to the at least one parameter. If the transmitting device and the receiving device have previously stored or know the encoding-related parameters of the staircase code, step 1301 may be omitted.

[0136] At step 1302, the transmitting device inserts / places / appends new information bits in single or multiple layers of the staircase code.

[0137] In step 1303, the transmitting device performs CRC encoding on the set of new information bits in the single or multiple layers and adds the generated CRC bits adjacent to the new information bits. When CRC encoding is performed in a single layer unit, CRC encoding may be performed in a layer unit on the set of new information bits excluding bits encoded in a previous layer. When CRC encoding is performed in a multiple layer unit, one CRC encoding may be performed on the entire set of new information bits in the multiple layers excluding bits encoded in a previous layer(s), the generated CRC bits may be divided by the number of the multiple layers, and the divided CRC bits may be added to each layer of the multiple layers.

[0138] In the above step 1303, CRC encoding is not performed on the overlapping portion between adjacent layers of the staircase code. In an optional embodiment, the length (L') of the CRC bits (i.e., the CRC code) generated through the CRC encoding may be the same for all layers of the staircase code, or may be adjusted differently in at least one layer among all layers. When the length (L') of the CRC code is adjusted differently in at least one layer, an empty space (region) may be generated in the corresponding layer, and the empty space (region) may be filled with information bits, parity bits, or null bits.

[0139] In step 1304, the transmitting device performs row-by-row encoding or column-by-column encoding using an element code C on bits including previously encoded bits, new information bits, and CRC bits in each layer of the staircase code, and adds the generated parity bits to the corresponding layer to generate an element codeword, and transmits a staircase codeword composed of a plurality of generated element codewords to the receiving device.

[0140] As an optional embodiment, although not illustrated in FIG. 13a, the transmitting device may transmit the encoding-related control information (setting information) to the receiving device, and then receive from the receiving device encoding-related control information determined / adjusted by the receiving device based on channel conditions, requirements, current available resource size, etc. In this case, the transmitting device may perform an encoding method including CRC addition for a staircase code based on the determined / adjusted encoding-related control information.

[0141] FIG. 13b is a diagram illustrating a decoding method for a step code performed in a receiving device of a wireless communication system according to an embodiment of the present disclosure. The step code of FIG. 13b can be applied to both square matrix-based step codes and non-square matrix-based step codes.

[0142] Referring to FIG. 13B, in step 1311, the receiving device can receive encoding-related control information (setting information) including a CRC addition of a staircase code from the transmitting device. In step 1312, the receiving device can receive an encoded staircase code word from the transmitting device. Then, in step 1313, the receiving device can perform row-by-row decoding or column-by-column decoding using element codes in each layer of the staircase code to restore information bits. In the decoding process, the receiving device can perform a CRC for detecting a decoding error using a single-layer unit CRC code or a multiple-layer unit CRC code.

[0143] As an optional embodiment, although not shown in FIG. 13b, the receiving device may transmit to the transmitting device encoding-related control information determined / adjusted by the receiving device based on channel conditions, requirements, current available resource size, etc. after receiving the encoding-related control information (setting information) from the transmitting device. In this case, the receiving device may receive an encoded staircase code word from the transmitting device based on the determined / adjusted encoding-related control information.

[0144] As an optional embodiment, the transmitting device may inform the receiving device through setting information whether encoding, including CRC addition of the staircase code, is performed in a single layer unit or in a multi-layer unit, or this may be predetermined between the transmitting device and the receiving device.

[0145] Through the embodiments of the present disclosure described above, a CRC code can be added during the encoding of a staircase code to transmit an encoded signal. The CRC code can be effectively applied to retransmission using HARQ. In addition, CRC encoding can be performed as CRC encoding in a single layer unit or CRC encoding in a multi-layer unit as described above, and retransmission using HARQ can also be performed in a single layer unit or a multi-layer unit, thereby improving resource utilization efficiency. In addition, the CRC encoding method using a new set of information bits in the present disclosure can improve decoding performance while reducing code rate loss, and can improve error detection capability for layers with relatively low error detection performance by dynamically adjusting the CRC length for each layer of the staircase code.

[0146] FIG. 14 is a diagram illustrating an example configuration of a communication device in a wireless communication system according to an embodiment of the present disclosure. The communication device may be a transmitting device performing the above-described step code encoding method or a receiving device performing the above-described step code decoding method. Furthermore, the communication device of FIG. 14 may be either a base station or a terminal.

[0147] The communication device of FIG. 14 may include a processor (1401), a transceiver (1403), and a memory (1405). The processor (1401), the transceiver (1403), and the memory (1405) of the communication device may operate according to the encoding / decoding method of the staircase code described in the embodiments of FIGS. 1A to 13B . However, the components of the communication device are not limited to the examples described above. For example, the communication device may include more or fewer components than the components described above. In addition, the processor (1401), the transceiver (1403), and the memory (1405) may be implemented in the form of a single chip.

[0148] The transceiver (1403) is a general term for the receiver and transmitter of a communication device, and can transmit and receive signals with the counterpart communication device. At this time, the transmitted and received signals may include at least one of control information and data. In addition, the transceiver (1403) may receive a signal, output it to the processor (1401), and transmit the signal output from the processor (1401). In addition, the transceiver (1403) of FIG. 14 may include an RF transmitter that up-converts and amplifies the frequency of a transmitted signal, and an RF receiver that low-noise amplifies and frequency-downconverts the received signal. In addition, the transceiver (1403) may receive a signal, output it to the processor (1401), and transmit the signal output from the processor (1401) to the counterpart communication device via a network. The memory (1405) may store programs and data necessary for performing the encoding / decoding method of the staircase code described in the embodiments of FIGS. 1A to 13B. The memory (1405) can store control information or data included in a signal acquired from the communication device. The memory (1405) can be configured as a storage medium or a combination of storage media, such as a ROM, a RAM, a hard disk, a CD-ROM, and a DVD. In addition, the processor (1401) can control a series of processes so that the communication device can operate according to at least one of the embodiments of FIGS. 1A to 13B. The processor (1401) can include at least one processor.

[0149] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software. If implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured for execution by one or more processors within an electronic device. The one or more programs include instructions that cause the electronic device to execute the methods according to the embodiments described in the claims or specification of the present disclosure.

[0150] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage devices, compact disc-ROMs (CD-ROMs), digital versatile discs (DVDs) or other forms of optical storage devices, magnetic cassettes, or may be stored in memories formed by a combination of some or all of these. In addition, each configuration memory may include multiple copies. The above program may be stored on an attachable storage device that is accessible via a communication network such as the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a storage area network (SAN), or a combination thereof. This storage device may be connected to a device performing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device performing an embodiment of the present disclosure.

[0151] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed in the singular or plural form, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in the plural form may be composed of singular elements, or components expressed in the singular form may be composed of plural elements.

[0152] While the detailed description of this disclosure has described specific embodiments, it should be understood that various modifications are possible without departing from the scope of this disclosure. Therefore, the scope of this disclosure should not be limited to the described embodiments, but should be defined not only by the scope of the claims described below, but also by equivalents thereof.

Claims

1. In a wireless communication system, a method of encoding, including addition of a CRC (cyclic redundancy check) to a staircase code, performed in a transmitting device, A process of inserting new information bits into single or multiple layers of the above staircase code; A process of performing CRC encoding on a set of new information bits in the single or multiple layers and adding the generated CRC bits to the new information bits; and An encoding method comprising a process of transmitting a code word of a staircase code generated by performing row-by-row encoding or column-by-column encoding using element codes at each layer of the staircase code to a receiving device.

2. In paragraph 1, An encoding method in which, when the CRC encoding is performed in the single layer, the CRC encoding is performed layer by layer on the set of new information bits excluding bits encoded in a previous layer of the single layer.

3. In paragraph 1, An encoding method in which, when the CRC encoding is performed in the plurality of layers, the CRC encoding is performed on the set of new information bits excluding bits encoded in previous layers of the plurality of layers.

4. In paragraph 3, The above-mentioned additional process is, A process of performing a single CRC encoding on the entire set of new information bits in the above multiple layers; The above CRC bits are divided into the number of the plurality of layers; and An encoding method comprising a process of adding the divided CRC bits to each layer of the plurality of layers.

5. In paragraph 1, An encoding method in which the lengths of the CRC bits are the same in all layers of the staircase code or adjusted differently in at least one layer among all layers.

6. In paragraph 5, An encoding method in which, when the length of the CRC bits is adjusted differently in at least one layer and a blank space is issued, the blank space is filled with information bits, parity bits, or null bits based on the length of the CRC bits and the number of rows in the matrix of the staircase code.

7. In paragraph 1, An encoding method in which the above-mentioned staircase code uses one of a square matrix-based staircase code and a non-square matrix-based staircase code, each layer in the above-mentioned staircase code includes at least one matrix, and the above-mentioned staircase code includes at least one overlapping portion between adjacent layers.

8. In paragraph 1, It further includes a process of transmitting encoding-related setting information including the CRC addition of the above step code to the receiving device, and the CRC encoding is performed based on the setting information. An encoding method wherein the setting information includes at least one of information on the element code, the number of layers of the staircase code, the number of information bits of the element codeword, the code length of the element codeword, the total number of information bits of the staircase code codeword, the total code length of the staircase code codeword, the number of parity bits of the element codeword, and the length of the CRC bits.

9. In paragraph 1, It further includes a process of receiving encoding-related control information including the CRC addition of the above step code from the receiving device, and the CRC encoding is performed based on the control information. An encoding method, wherein the control information includes at least one of information on the element code, the number of layers of the staircase code, the number of information bits of the element codeword, the code length of the element codeword, the total number of information bits of the staircase code codeword, the total code length of the staircase code codeword, the number of parity bits of the element codeword, and the length of the CRC bits.

10. In a transmitting device that performs encoding, including adding a CRC (cyclic redundancy check) to a staircase code in a wireless communication system, Transmitter and receiver; and Inserting new information bits in single or multiple layers of the above step code, Performing CRC encoding on a set of new information bits in the single or multiple layers and adding the generated CRC bits to the new information bits, A transmitter including a processor configured to transmit, to a receiving device, a code word of a staircase code generated by performing row-by-row encoding or column-by-column encoding using element codes at each layer of the staircase code through the transceiver.

11. A transmitter according to claim 10, adapted to operate according to any one of the methods of claims 2 to 9.

12. In a method for decoding a step code performed in a receiving device in a wireless communication system, A process of receiving encoding-related setting information including addition of a CRC (cyclic redundancy check) of the staircase code from a transmitting device; A process of receiving an encoded step code word from the above transmitting device; and Based on the above setting information, a process is included for restoring information bits by performing row-by-row decoding or column-by-column decoding using element codes in each layer of the above staircase code. A decoding method in which a decoding error for the above-mentioned staircase code word is detected using a single-layer unit CRC code or a multi-layer unit CRC code.

13. In paragraph 12, A decoding method in which the above-mentioned staircase code uses one of a square matrix-based staircase code and a non-square matrix-based staircase code, each layer in the above-mentioned staircase code includes at least one matrix, and the above-mentioned staircase code includes at least one overlapping portion between adjacent layers.

14. In a receiving device that performs decoding of a staircase code in a wireless communication system, Transmitter and receiver; and Through the above transceiver, encoding-related setting information including the addition of a CRC (cyclic redundancy check) of the staircase code is received from the transmitting device, Through the above transceiver, an encoded step code word is received from the above transmitting device, Based on the above setting information, row-by-row decoding or column-by-column decoding using element codes is performed at each layer of the staircase code to restore information bits. A receiving device comprising a processor configured to detect a decoding error for the staircase code word using a single-layer unit CRC code or a multi-layer unit CRC code.

15. In paragraph 14, A receiving device in which the above-mentioned staircase code uses one of a square matrix-based staircase code and a non-square matrix-based staircase code, each layer in the staircase code includes at least one matrix, and the staircase code includes at least one overlapping portion between adjacent layers.

Images