Coding method and apparatus for polar code

Abstract

A coding method and apparatus for a polar code, which relate to the technical field of communications, and can enable a nested PC-Polar code to reuse a sub-block interleaving rate matching mode of an NR PC-Polar code, so as to improve the NR compatibility. The method comprises: on the basis of a reliability sequence having a length of N, mapping an information bit sequence having a length of k to k bits of a first sequence having a length of N to obtain a second sequence, the second sequence comprising k information bits, x parity check (PC) bits and N-k-x frozen bits, wherein k, N and x are all positive integers, m information bits among the k information bits are the first m bits ranked in descending order of reliability in the second sequence, and the remaining (k-m) information bits among the k information bits are bits in the second sequence that correspond to the first (k-m) information bits ranked in descending order of reliability in a preset information bit set, and the x PC bits are x PC bits in a preset PC bit set; and performing polar coding on the second sequence to obtain a third sequence.

Description

Polar code encoding method and device

[0001] This application claims priority to a Chinese patent application filed with the State Intellectual Property Office on October 31, 2023, with application number 202311444208.8 and application name “Polar Code Encoding Method and Device,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The embodiments of the present application relate to the field of communication technologies, and in particular to a method and apparatus for encoding polar codes. Background Art

[0003] To reduce coding complexity in communication systems, a coding scheme based on parity check polar codes (PC-Polar codes) has been proposed. PC-Polar codes can include those in the new radio (NR) standard and nested PC-Polar codes.

[0004] NR PC-Polar codes can first perform rate matching, and then determine the information bits, frozen bits, and PC bits based on the rate-matched code length and code rate. Unlike NR PC-Polar codes, the information bits, frozen bits, and PC bits of nested PC-Polar codes are independent of the rate-matched code length and code rate. The PC bits and PC equations corresponding to different numbers of information bit sequences are nested. Nested PC-Polar codes first determine the information bits, frozen bits, and PC bits, and then perform rate matching.

[0005] However, the rate matching method of the nested PC-Polar code is a nested puncturing sequence designed based on performance, and cannot reuse the sub-block interleaving rate matching method of the NR PC-Polar code, resulting in poor NR compatibility.

[0006] Summary of the Invention

[0007] The present application provides a polar code encoding method and apparatus, which can nest PC-Polar codes and reuse the sub-block interleaving rate matching method of NR PC-Polar codes, thereby improving NR compatibility.

[0008] In a first aspect, embodiments of the present application provide a polar code encoding method, which can be executed by a transmitting device. Unless otherwise specified, the "transmitting device" in this application can refer to the transmitting device itself, or a component in the transmitting device (such as a processor, chip, or chip system), or a logic module or software that can implement all or part of the functions of the transmitting device. The method includes: mapping an information bit sequence with a length of k to k bits of a first sequence with a length of N according to a reliability sequence with a length of N, to obtain a second sequence; wherein the second sequence includes k information bits, x parity check PC bits and Nkx frozen bits, and k, N, and x are all positive integers; m information bits of the k information bits are the first m bits in the second sequence sorted from high to low according to reliability, and the remaining (km) information bits of the k information bits are the bits in the second sequence corresponding to the first (km) information bits in a preset information bit set sorted from high to low according to reliability; the x PC bits are x PC bits in the preset PC bit set; and polarization coding is performed on the second sequence to obtain a third sequence.

[0009] Based on the first aspect, a polar code encoding scheme with nesting properties is provided. Different numbers of information bit sequences can construct polar codes based on the same m information bits, preset information bit set, and preset PC bit set. The m information bits, preset information bit set, and preset PC bit set have nesting properties for different numbers of information bit sequences and do not change with changes in the number of information bit sequences. Furthermore, the PC-Polar code with nesting properties obtained based on the m information bits, preset information bit set, and preset PC bit set can reuse the sub-block interleaving rate matching method of the NR PC-Polar code. This PC-Polar code with nesting properties still has good rate matching performance under the sub-block interleaving rate matching method of the NR PC-Polar code, simplifying the rate matching operation, improving NR compatibility, and enhancing communication performance.

[0010] In one possible design, the value of k is any of the following: 7, 8, 9, 10, or 11.

[0011] In one possible design, the m information bits are the following bits in the second sequence: 15, 23, 27, 29, 30, 31.

[0012] Based on this possible design, the transmitting device can determine the m information bits in the second sequence based on the specific value of m and the reliability sequence. For example, the transmitting device can determine the first m bits in the second sequence, sorted from highest to lowest reliability, as the m information bits. These m information bits have a nested nature for information bit sequences of different numbers (e.g., k equal to 7, 8, 9, 10, or 11), and do not change with changes in the length of the information bit sequence, thereby reducing decoding complexity and improving decoding performance.

[0013] In one possible design, the preset information bit set corresponds to the following bits in the second sequence: 11, 19, 13, 14, and 22.

[0014] Based on this possible design, the preset information bit set has a nested characteristic for information bit sequences of different numbers (such as k equal to 7, 8, 9, 10, or 11), and will not change with the length of the information bit sequence, thereby reducing the decoding complexity and improving the decoding performance.

[0015] In one possible design, the difference between the numbers of any two bits of the PC bit check is not 1.

[0016] Based on this possible design, by setting the difference between the numbers of any two bits of any PC bit check in the preset PC bit set not to 1, the decoding performance and rate matching performance can be improved.

[0017] In one possible design, the preset PC bit set corresponds to the following bits in the second sequence: 21, 26, 25, and 28.

[0018] Based on this possible design, the preset PC bit set has a nested characteristic for information bit sequences of different numbers (such as k equal to 7, 8, 9, 10, or 11), and will not change with the length of the information bit sequence, thereby reducing the decoding complexity and improving the decoding performance.

[0019] In one possible design, when the PC bit is the 21st bit in the second sequence, the bit for PC bit check is one or more of the following bits in the second sequence: 11, 14; or, when the PC bit is the 26th bit in the second sequence, the bit for PC bit check is one or more of the following bits in the second sequence: 13, 19; or, when the PC bit is the 25th bit in the second sequence, the bit for PC bit check is one or more of the following bits in the second sequence: 13, 22; or, when the PC bit is the 28th bit in the second sequence, the bit for PC bit check is one or more of the following bits in the second sequence: 11, 13, 19.

[0020] Based on this possible design, an optimal example is provided for the PC bit and the bit of the PC bit check, which can improve the decoding performance and rate matching performance.

[0021] In one possible design, bit 7 of the second sequence is a frozen bit.

[0022] Based on this possible design, if a rate matching method based on sub-block interleaving and puncturing from front to back is adopted, bit 7 is located relatively forward. When E=24, 23, 22, 21, 20, 19 or 18, bit 7 will be punctured, so bit 7 is pre-frozen, and bit 7 of the second sequence can be set to a frozen bit (or it can also be called a pre-frozen bit).

[0023] In a second aspect, embodiments of the present application provide a polar code encoding method that can be performed by a transmitting device. Unless otherwise specified, the "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software that implements all or part of the functions of the transmitting device. The method includes: mapping an information bit sequence of length k to k bits of a first sequence of length N based on a reliability sequence of length N to obtain a fourth sequence; wherein the fourth sequence includes k information bits, 0 parity check bits (PC bits), and Nk frozen bits, where k and N are both positive integers; performing polar coding on the fourth sequence to obtain a fifth sequence; and performing rate matching on the fifth sequence using a forward-to-backward puncturing method to obtain a sixth sequence.

[0024] Based on the second aspect, a polar code encoding scheme with nesting properties is provided. Different information bit sequences, k in number, can be constructed using k information bits and 0 PC bits based on the same reliability sequence. These k information bits and 0 PC bits exhibit a nesting property for different information bit sequences and do not change with the number of information bit sequences. Furthermore, the PC-Polar code with nesting properties derived from these k information bits and 0 PC bits can utilize the sub-block interleaving rate matching puncturing method of the forward-to-backward NR PC-Polar code to ensure the nesting property of the information bits. This PC-Polar code with nesting properties maintains good rate matching performance even under the sub-block interleaving rate matching puncturing method of the NR PC-Polar code, simplifying rate matching operations, improving NR compatibility, and enhancing communication performance.

[0025] In one possible design, the value of k is any of the following: 3, 4, 5, or 6.

[0026] In one possible design, before performing rate matching on the fifth sequence in a forward-to-backward puncturing manner, the method further includes: performing sub-block interleaving on the fifth sequence according to a first interleaving pattern; wherein the first interleaving pattern is used to indicate that the values ​​on the Ath sub-block of the fifth sequence are swapped and placed on the Bth sub-block of the fifth sequence after interleaving; the mapping relationship between A and B is: (31, 31), (30, 30), (29, 29), (27, 28), (28, 27), (26, 26), (25, 25), (2 4,24), (23,23), (15,22), (22,21), (14,20), (21,19), (13,18), (20,17), (12,16), (19,15), (11,14), (18,13), (10,12), (17,11), (9,10), (16,9), (8,8), (7,7), (6,6), (5,5), (3,4), (4,3), (2,2), (1,1), (0,0).

[0027] In the third aspect, an embodiment of the present application provides a communication device, which can be applied to the transmitting device of the first aspect or the second aspect above to implement the functions performed by the transmitting device above. The communication device can be a transmitting device, or it can be a chip or chip system or system on chip of the transmitting device, etc. The communication device can perform the functions performed by the transmitting device above through hardware, or it can perform the corresponding software implementation through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; accordingly, the processing module can also independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0028] Exemplarily, a processing module is configured to map an information bit sequence of length k to k bits of a first sequence of length N according to a reliability sequence of length N, to obtain a second sequence; wherein the second sequence includes k information bits, x parity check PC bits, and Nkx frozen bits, where k, N, and x are all positive integers; m of the k information bits are the first m bits in the second sequence sorted from high to low according to reliability, and the remaining (km) of the k information bits are bits in the second sequence corresponding to the first (km) information bits in a preset information bit set sorted from high to low according to reliability; the x PC bits are x PC bits in the preset PC bit set; and the processing module is further configured to perform polarization coding on the second sequence to obtain a third sequence.

[0029] In another example, the processing module is configured to map an information bit sequence of length k to k bits of a first sequence of length N based on a reliability sequence of length N, to obtain a fourth sequence; wherein the fourth sequence includes k information bits, 0 parity check (PC) bits, and Nk frozen bits, where k and N are both positive integers; and the processing module is further configured to perform polar coding on the fourth sequence to obtain a fifth sequence, and perform rate matching on the fifth sequence according to a forward-to-backward puncturing method to obtain a sixth sequence.

[0030] Optionally, the transceiver module and the processing module of the communication device in the third aspect can also perform the corresponding functions in the above-mentioned first aspect or any possible design of the first aspect, or perform the corresponding functions in the above-mentioned second aspect or any possible design of the second aspect. Please refer to the detailed description in the method example for details. The beneficial effects that can be achieved can also be found in the above-mentioned related content.

[0031] In a fourth aspect, an embodiment of the present application provides a communications device, comprising one or more processors; the one or more processors are configured to run a computer program or instruction. When the one or more processors execute the computer program or instruction, the polar code encoding method described in any one of the first to second aspects is executed.

[0032] In one possible design, the communication device further includes one or more memories, the one or more memories being coupled to one or more processors, and the one or more memories being used to store the above-mentioned computer programs or instructions. In one possible implementation, the memory is located outside the communication device. In another possible implementation, the memory is located within the communication device. In an embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. In one possible implementation, the communication device further includes a transceiver, and the transceiver is used to receive information and / or send information.

[0033] In one possible design, the communication device further includes one or more communication interfaces, the one or more communication interfaces are coupled to one or more processors, and the one or more communication interfaces are used to communicate with other modules outside the communication device.

[0034] In a fifth aspect, an embodiment of the present application provides a communication device, comprising an interface circuit and a logic circuit; the interface circuit is configured to input and / or output information; and the logic circuit is configured to execute the polar code encoding method described in either the first or second aspect, and to process and / or generate information based on the information.

[0035] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions or a program. When the computer instructions or program are executed on a computer, the polar code encoding method as described in either the first aspect or the second aspect is executed.

[0036] In a seventh aspect, an embodiment of the present application provides a computer program product comprising computer instructions, which, when executed on a computer, enables the polar code encoding method as described in either the first aspect or the second aspect to be executed.

[0037] In an eighth aspect, an embodiment of the present application provides a computer program. When the computer program is executed on a computer, the polar code encoding method as described in any one of the first aspect or the second aspect is executed.

[0038] In a ninth aspect, an embodiment of the present application provides a chip, comprising: a processor, the processor being coupled to a memory, the memory being used to store programs or instructions. When the program or instructions are executed by the processor, the polar code encoding method as described in either the first aspect or the second aspect is executed.

[0039] Among them, the technical effects brought about by any design method in the fourth to ninth aspects can refer to the technical effects brought about by any one of the first or second aspects mentioned above, and will not be repeated here.

[0040] In the tenth aspect, an embodiment of the present application provides a communication system, which may include a communication device for performing the communication as described in the first aspect or any possible design of the first aspect, or may also include a communication device for performing the communication as described in the second aspect or any possible design of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] FIG1 is a schematic diagram of a search process for an interleaving pattern provided in an embodiment of the present application;

[0042] FIG2 is a schematic diagram of a communication system provided in an embodiment of the present application;

[0043] FIG3 is a schematic diagram of encoding and decoding performed by a transmitting device and a receiving device according to an embodiment of the present application;

[0044] FIG4 is a schematic diagram of the composition of a communication device provided in an embodiment of the present application;

[0045] FIG5 is a flowchart of a polar code encoding method provided in an embodiment of the present application;

[0046] FIG6 is a schematic diagram of a PC bit and information bit provided in an embodiment of the present application;

[0047] FIG7 is a schematic diagram of a PC bit and information bit provided in an embodiment of the present application;

[0048] FIG8 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0049] FIG9 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0050] FIG10 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0051] FIG11 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0052] FIG12 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0053] FIG13 is a schematic diagram of a polar code encoding method provided in an embodiment of the present application;

[0054] FIG14 is a schematic diagram of an information bit provided in an embodiment of the present application;

[0055] FIG15 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0056] FIG16 is a schematic diagram of a performance comparison provided in an embodiment of the present application;

[0057] FIG17 is a schematic diagram of a performance comparison provided by an embodiment of the present application;

[0058] FIG18 is a schematic diagram of a performance comparison provided by an embodiment of the present application;

[0059] FIG19 is a schematic diagram of a performance comparison provided by an embodiment of the present application;

[0060] FIG20 is a schematic diagram of a communication device provided in an embodiment of the present application;

[0061] Figure 21 is a structural diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0062] Before describing the embodiments of the present application, the technical terms involved in the embodiments of the present application are described.

[0063] Parity check polar codes (PC-Polar codes): These codes effectively improve the code spectrum performance of Polar codes. They include information bits, frozen bits, and parity check (PC) bits. Information bits carry information bits, frozen bits carry frozen bits, and PC bits carry PC bits.

[0064] Among them, a part of the set can be selected from the frozen bits as PC bits. The values ​​of the PC bits on these PC bits are different from other frozen bits. They are not fixed to 0, but are determined by the PC equation based on the value of the information bit of the information bit preceding the PC bit. Therefore, the PC bits can also be called dynamic frozen bits (that is, the position comes from the frozen bits, but the value is not fixed to 0).

[0065] New radio parity check polar codes (NR PC-Polar codes) in the new radio interface standard: The transmitting device can first perform rate matching and then determine the information bits, frozen bits, and PC bits based on the code length and code rate after rate matching. After the PC bits are determined, the interval between the PC bits and the information bits they check is fixed.

[0066] Before performing rate matching, the transmitting device may perform sub-block interleaving on a Polar code sequence with a mother code length of N, and perform rate matching on the sequence after sub-block interleaving.

[0067] For example, the transmitting device may divide a Polar code sequence with a mother code length of N into 32 sub-blocks of the same length, where each sub-block is N / 32 in size. Sub-block interleaving is then performed on a sub-block basis, referring to the sub-block interleaving pattern shown in Table 1 below, to obtain a sub-block interleaved sequence.

[0068] Table 1 Sub-block interleaving pattern

[0069] It can be understood that the above Table 1 is defined starting from bit 0, and can also be defined starting from bit 1, that is, the above 0, 1, ..., 31 can be replaced by 1, 2, ..., 32 respectively without limitation.

[0070] Based on the above description, after performing sub-block interleaving, the transmitting device can determine the corresponding rate matching method based on the code rate R = K / E and the rate-matched code length E. K represents the length of the information bit sequence, or can also be described as the number of information bit sequences. The rate-matched code length E is also called the transmission length E.

[0071] For example, the transmitting end device can determine the mother code length N=max(min([N M , N R , N max),32). If E > N, determine the rate matching method as repetition, that is, after the transmitting device sends the mother code of length N, it resends the (E - N) bits after sub-block interleaving. If E < N, the transmitting device can determine whether to puncture from the front to the back or shorten from the back to the front based on the current code rate R for the sequence after sub-block interleaving. If R < 7 / 16, perform rate matching by puncturing (N - E) bits from the front to the back for the sequence after sub-block interleaving; otherwise, shorten (N - E) bits from the back to the front for the sequence after sub-block interleaving.

[0072] Among them, N M and the code rate R = K / E and N DM are related, If E ≤ 9 / 8 × N DM and R < 9 / 16, then N M = N DM / 2; otherwise, N M = N DM . N R is related to K and the lowest code rate R min and, N max = 1024.

[0073] Based on the above description, the rate matching method of the NR PC-Polar code is related to the specific values of K and E, which means that the information bits, PC bits, and frozen bits corresponding to different K and E are different and cannot be nested.

[0074] Nested PC-Polar code: Different from the NR PC-Polar code, the information bits, frozen bits, and PC bits of the nested PC-Polar code are independent of the code length and code rate after rate matching. The PC bits and PC equations corresponding to different sequences of K information bits or different transmission lengths E (i.e., the code length after rate matching of the mother code length) are the same, and the PC bits and PC equations do not change with the change of K or E. That is, the PC bits and PC equations of the nested PC-Polar code are nested. The nested PC-Polar code can first determine the information bits, frozen bits, and PC bits, ensure the best performance of using the same PC equation for different sequences of information bits under the mother code length, and then perform rate matching.

[0075] Among them, the rate matching method of the nested PC-Polar code is a nested puncturing sequence designed based on performance, which is a design for each (K, E) with good fine-grained performance. The following gives the rate matching process of the nested PC-Polar code obtained through performance search:

[0076] Step 1, for the input sequence of initialized rate matching The interleaved sequence is en=e0,e1,e2,…,e N-1 .

[0077] in, is the mother code long sequence of the nested PC-Polar code.

[0078] For example, the input sequence can be interleaved using the interleaving pattern P(n) shown in Table 2 below. The interleaved sequence e n You can obtain it by following the following methods:

[0079] for n=0to N-1

[0080] e n =d P(n)

[0081] end for

[0082] Table 2 Interwoven pattern

[0083] It can be understood that the above Table 2 is defined starting from bit 0, and can also be defined starting from bit 1, that is, the above 0, 1, ..., 31 can be replaced by 1, 2, ..., 32 respectively without limitation.

[0084] Step 2: Perform rate matching on the interleaved sequence en. The output sequence after rate matching is f0, f1, f2, ..., f E-1 .

[0085] Where E is the code length after rate matching.

[0086] For example, the output sequence f0,f1,f2,…,f E-1 You can obtain it by following the following methods:

[0087] for k=0to E-1

[0088] f k =e k mod N

[0089] end for

[0090] Based on the above description of the interleaving pattern corresponding to nested PC-Polar codes, a search algorithm can be designed to determine the interleaving pattern corresponding to these nested PC-Polar codes based on sequence performance and nesting characteristics. Specifically, the interleaving pattern corresponding to the nested PC-Polar codes exhibits nesting properties for sequences with varying numbers of information bits and does not change with changes in the length of the information bit sequences. This significantly reduces complexity while maintaining optimal sequence performance and nesting properties.

[0091] For example, a list search algorithm can be used to search for puncturing locations for multiple sequence samples (these multiple sequence samples can correspond to information bit sequences of different lengths, with each information bit sequence length being less than or equal to K). With each increase in the number of punctures, the average sequence performance of all sequences is calculated. This average sequence performance is used as a metric, and the position corresponding to the optimal average sequence performance is determined as the puncturing location to generate an interleaving pattern corresponding to the nested PC-Polar code. The average performance can refer to the mean of the sequence's SNR@BLER = 1E-2, where SNR represents the signal-to-noise ratio and BLER represents the block error rate.

[0092] Optionally, the interleaving pattern corresponding to the nested PC-Polar code may be determined by referring to the performance search process shown in FIG1 below:

[0093] Step 1: Initialize the search space of puncture positions to 0 to N-1, and the number of punctures to 0.

[0094] Step 2: Select a location from the current search space as a new punching location.

[0095] Step 3: Simulate the sequence performance of all sequences based on the current puncture position.

[0096] Step 4: Take the average of the sequence performance of all sequences to obtain the metrics corresponding to different puncture positions under the current number of punctures.

[0097] Step 5: Keep the punching positions corresponding to the optimal list of metrics as candidate punching positions under the current number of punchings.

[0098] Step 6: Update the alternative search space of each List: Delete the current punch position from the search space.

[0099] Step 7: Add one to the number of holes punched.

[0100] Step 8: Determine whether the number of punctures is less than the maximum number of punctures. If so, continue from step 2 above until the number of punctures equals the maximum number of punctures. If not, output the interleaving pattern corresponding to the nested PC-Polar code (or the optimal puncturing pattern).

[0101] Based on the above description, the rate matching method of the nested PC-Polar code is a nested puncturing sequence designed based on performance. It cannot reuse the sub-block interleaving rate matching method of the NR PC-Polar code, and has poor NR compatibility.

[0102] To address the problems existing in the above-mentioned NR PC-Polar codes and nested PC-Polar codes, an embodiment of the present application proposes that: a transmitting device may map an information bit sequence of length k to k bits of a first sequence of length N based on a reliability sequence of length N, to obtain a second sequence; wherein the second sequence includes k information bits, x parity check PC bits, and Nkx frozen bits, where k, N, and x are all positive integers; m of the k information bits are the first m bits in the second sequence sorted from high to low in terms of reliability; the remaining (km) of the k information bits are the bits in the second sequence corresponding to the first (km) information bits in a preset information bit set sorted from high to low in terms of reliability; the x PC bits are the x PC bits in the preset PC bit set; and polar coding is performed on the second sequence to obtain a third sequence.

[0103] The embodiments of the present application provide a polar code encoding scheme with nesting properties. Different numbers of information bit sequences can be constructed using the same m information bits, preset information bit set, and preset PC bit set to construct polar codes. These m information bits, preset information bit set, and preset PC bit set exhibit a nesting property for different numbers of information bit sequences and do not change with the number of information bit sequences. Furthermore, the nested PC-Polar code derived from these m information bits, preset information bit set, and preset PC bit set can reuse the sub-block interleaving rate matching scheme of the NR PC-Polar code. This nested PC-Polar code maintains good rate matching performance even under the sub-block interleaving rate matching scheme of the NR PC-Polar code, simplifying rate matching operations, improving NR compatibility, and enhancing communication performance.

[0104] The following describes in detail the implementation of the embodiments of the present application in conjunction with the accompanying drawings.

[0105] The polar code encoding method provided in the embodiments of the present application can be used in any communication system, which can be a third generation partnership project (3GPP) communication system, such as a long term evolution (LTE) system, or a fifth generation (5G) mobile communication system, a system of hybrid networking of LTE and 5G, a NR system, an NR vehicle to everything (V2X) system, a device-to-device (D2D) communication system, a machine to machine (M2M) communication system, the Internet of Things (IoT), a narrowband Internet of Things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE), a wideband code division multiple access (WCDMA) system, a code division multiple access 2000 (CDMA2000) system, a time division synchronous code division multiple access system (TD-SCDMA), or a time division synchronous code division multiple access system. Division-synchronization code division multiple access (TD-SCDMA), enhanced mobile broadband (eMBB), ultra-reliable and low-latency communication (URLLC), enhanced machine-type communication (eMTC), and various types of next-generation communication systems, such as the sixth generation (6G) mobile communication system, may also be non-terrestrial network (NTN) system, non-3GPP communication system, etc., without restriction.

[0106] The polar code encoding method provided in the embodiments of the present application can be applied to various communication scenarios, and is particularly suitable for channel coding scenarios in which polar codes are used as short codes in communication systems. For example, the method can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0107] The following describes the communication system provided in an embodiment of the present application using Figure 2 as an example.

[0108] FIG2 is a schematic diagram of a communication system provided in an embodiment of the present application. As shown in FIG2 , the communication system may include at least one terminal device and at least one network device.

[0109] Among them, the terminal device in Figure 2 can be located within the beam / cell coverage of the network device, and the network device can provide communication services for the terminal device. Exemplarily, the network device can use channel coding to encode the downlink data, and transmit it to the terminal device through the air interface after constellation modulation (that is, the network device is a transmitting device, and the terminal device is a receiving device); the terminal device can also use channel coding to encode the uplink data, and send it to the network device through the air interface after constellation modulation (that is, the terminal device is a transmitting device, and the network device is a receiving device). It can be understood that when network devices communicate with network devices, or when terminal devices communicate with terminal devices, they can also communicate based on channel coding, that is, the transmitting device and the receiving device can both be network devices, or both be terminal devices, without limitation.

[0110] The terminal device in Figure 2 can be a device with wireless transceiver capabilities or a chip or chip system that can be installed in the device, which can allow users to access the network and is used to provide voice and / or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit (subscriber unit), terminal (terminal), mobile station (MS), or mobile terminal (MT).

[0111] Exemplarily, the terminal device in FIG2 may be a mobile phone, a tablet computer, or a computer with wireless transceiver function. The terminal device may also be a user station, a mobile station, a remote station, a remote terminal device, a mobile terminal device, a user terminal device, a wireless communication device, a user agent, a user device, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication capabilities, a computing device, a processing device connected to a wireless modem, an in-vehicle device, a wearable device, a terminal device in the Internet of Things, a home appliance, a virtual reality (VR) terminal, an augmented reality (AR) terminal, a wireless terminal in industrial control, a wireless terminal in unmanned driving, a wireless terminal in telemedicine, a wireless terminal in a smart grid, a wireless terminal in a smart city, a wireless terminal in a smart home, a vehicle with vehicle-to-vehicle (V2V) communication capabilities, an intelligent connected vehicle, a UAV to UAV (UAV to Unmanned aerial vehicles (UAVs, U2Us) with communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs), etc. are not restricted.

[0112] The network device in Figure 2 can be any device deployed in an access network that can communicate wirelessly with a terminal device. It can also be a chip or chip system that can be installed in the above-mentioned device. It can also be a logical node or logical module or a function implemented in software. It can be used to implement wireless physical control functions, resource scheduling and wireless resource management, wireless access control, and mobility management. Specifically, the network device can be a device that supports wired access or a device that supports wireless access.

[0113] Exemplarily, the network device may be composed of one or more access network (AN) / radio access network (RAN) nodes. The AN / RAN nodes may be: a gNB, a transmission reception point (TRP), an evolved NodeB (eNB), a radio network controller (RNC), a NodeB (NB), a base station controller (BSC), a base transceiver station (BTS), a home evolved NodeB (HNB), a base band unit (BBU), or a wireless fidelity (Wi-Fi) access point (AP).

[0114] In another example, network equipment may include a baseband unit (BBU) and a remote radio unit (RRU). The BBU and RRU can be placed in different locations. For example, the RRU can be remotely located in a high-traffic area, while the BBU can be placed in a central computer room. The BBU and RRU can also be placed in the same computer room. The BBU and RRU can also be different components within the same rack.

[0115] In another example, the network device may also be a device including a centralized unit (CU) node, or a distributed unit (DU) node, or a CU node and a DU node. For example, the network device can be divided into CU and DU from a logical function perspective, with some protocol layer functions placed in the CU for centralized control, and the remaining part or all of the protocol layer functions distributed in the DU, which is centrally controlled by the CU. Furthermore, the centralized unit CU can also be divided into a control plane (CU-CP) and a user plane (CU-UP). In different systems, CU (including CU-CP or CU-UP) or DU may also have different names. For example, in an open radio access network (O-RAN) system, CU may also be called O-CU (open CU), DU may also be called O-DU, CU-CP may also be called O-CU-CP, and CU-UP may also be called O-CU-UP.

[0116] Based on the above description of the terminal device and the network device, the polar code encoding method provided in the embodiment of the present application can optionally be implemented by the above-mentioned terminal device or network device, or by a component of the terminal device or network device, such as an application specific integrated circuit (ASIC) deployed in the terminal device or network device, a field programmable gate array (FPGA), or software (such as a program code in a memory), without limitation.

[0117] Optionally, in an embodiment of the present application, the transmitting device (or referred to as a signal source) and the receiving device (or referred to as a signal sink) may perform encoding and decoding using the process shown in FIG. 3 below.

[0118] The transmitting device can perform source coding on the bits it generates to obtain a source bit stream. This source bit stream is then channel-coded and modulated before being sent to the receiving device via a noisy channel. When the receiving device receives the modulated symbols via the noisy channel, it can demodulate them and then perform channel decoding to recover the source bit stream. This is then followed by source decoding to obtain the decoding result.

[0119] In a specific implementation, as shown in Figure 2, each terminal device and network device can adopt the structure shown in Figure 4, or include the components shown in Figure 4. Figure 4 is a schematic diagram of the structure of a communication device 400 provided in an embodiment of the present application. The communication device 400 can be a terminal device or a chip or system-on-chip in a terminal device; it can also be a network device or a chip or system-on-chip in a network device. As shown in Figure 4, the communication device 400 includes a processor 401, a transceiver 402, and a communication circuit 403.

[0120] Furthermore, the communication device 400 may further include a memory 404 . The processor 401 , the memory 404 and the transceiver 402 may be connected via a communication line 403 .

[0121] The processor 401 is a central processing unit (CPU), a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 401 may also be other devices with processing functions, such as circuits, devices, or software modules, without limitation.

[0122] Transceiver 402 is used to communicate with other devices or other communication networks. Such other communication networks may be Ethernet, radio access networks (RAN), wireless local area networks (WLAN), etc. Transceiver 402 may be a module, circuit, transceiver, or any device capable of communication.

[0123] The communication line 403 is used to transmit information between the components included in the communication device 400.

[0124] The memory 404 is used to store instructions, where the instructions may be computer programs.

[0125] The memory 404 may be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions, or a random access memory (RAM) or other type of dynamic storage device that can store information and / or instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0126] It should be noted that the memory 404 can exist independently of the processor 401 or can be integrated with the processor 401. The memory 404 can be used to store instructions, program code, or some data. The memory 404 can be located within the communication device 400 or outside the communication device 400, without limitation. The processor 401 is configured to execute the instructions stored in the memory 404 to implement the polar code encoding method provided in the following embodiments of the present application.

[0127] In one example, the processor 401 may include one or more CPUs, such as CPU0 and CPU1 in FIG. 4 .

[0128] As an optional implementation, the communication device 400 includes multiple processors. For example, in addition to the processor 401 in FIG. 4 , it may also include a processor 407 .

[0129] As an optional implementation, the communication apparatus 400 further includes an output device 405 and an input device 406. For example, the input device 406 is a keyboard, a mouse, a microphone, a joystick, or the like, and the output device 405 is a display screen, a speaker, or the like.

[0130] It should be noted that the communication device 400 may be a desktop computer, a portable computer, a network server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device having a structure similar to that shown in FIG4 . Furthermore, the structure shown in FIG4 does not limit the communication device. In addition to the components shown in FIG4 , the communication device may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0131] In the embodiment of the present application, the chip system can be composed of chips, or can include chips and other discrete devices.

[0132] In addition, the actions, terms, etc. involved in the various embodiments of this application can refer to each other without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are only examples, and other names can also be used in specific implementations without limitation.

[0133] The polar code encoding method provided in an embodiment of the present application is described below with reference to FIG5 and the communication system shown in FIG2 . The transmitting device may be any terminal device or network device in the communication system shown in FIG2 , and the receiving device may also be any terminal device or network device in the communication system shown in FIG2 . The transmitting device or receiving device described in the following embodiment may include the components shown in FIG4 .

[0134] FIG5 is a flowchart of a polar code encoding method provided in an embodiment of the present application. As shown in FIG5 , the method may include:

[0135] Step 501: The transmitting end device maps an information bit sequence of length k to k bits of a first sequence of length N according to a reliability sequence of length N to obtain a second sequence.

[0136] The reliability sequence may be used to indicate the reliability corresponding to each bit of the sequence. A larger reliability value indicates a more reliable bit. The length of the reliability sequence may be N, where N is a positive integer.

[0137] Optionally, the reliability sequence may be an NR reliability sequence.

[0138] For example, taking the reliability sequence length N as 32 as an example, the reliability sequence may be the reliability sequence shown in Table 3 below, where: Represents reliability, Indicates the bit corresponding to the reliability:

[0139] Table 3 Reliability sequence

[0140] It can be understood that the above Table 3 is defined starting from bit 0, and can also be defined starting from bit 1, that is, the above 0, 1, ..., 31 can be replaced by 1, 2, ..., 32 respectively without limitation.

[0141] Referring to the above reliability sequence, the transmitting device may map an information bit sequence of length k to k bits of a first sequence of length N to obtain a second sequence.

[0142] In which, the second sequence may include k information bits, x parity check PC bits and Nkx frozen bits, where k, N, and x are all positive integers; m information bits among the k information bits are the first m bits in the second sequence sorted from high to low according to reliability, and the remaining (km) information bits among the k information bits are the bits in the second sequence corresponding to the first (km) information bits in the preset information bit set sorted from high to low according to reliability; the x PC bits are the x PC bits in the preset PC bit set.

[0143] Exemplarily, the length k of the information bit sequence can be any of the following values: 7, 8, 9, 10, or 11.

[0144] Optionally, the specific value of m can be determined according to row weight and reliability.

[0145] For example, the number of bits corresponding to one or more rows may be determined as a specific value of m according to the order of reliability from high to low. For example, the value of m may be 6.

[0146] For example, taking the order of reliability from high to low as shown in Table 3 above as an example, the row weight corresponding to bit 31 is 32, the row weight corresponding to bits (30, 29, 27, 23, 15) is 16, and the row weight corresponding to bits (28, 22, 25, 26, 21, 14, 13, 19, 11, 7) is 8. According to the order of reliability from high to low, the number of bits corresponding to the first two row weights can be confirmed as the specific value of m, that is, the number of bits corresponding to the row weight of 32 and the row weight of 16 can be determined as 6 as the value of m, that is, m is equal to 6.

[0147] It is understandable that the sending end device can determine the specific value of m based on the row weight and reliability, or the specific value of m can also be predefined by the protocol. The sending end device determines the specific value of m based on the protocol predefined without limitation.

[0148] Based on the above description of the value of m, the transmitting device can determine the m information bits in the second sequence according to the specific value of m and the reliability sequence.

[0149] For example, taking N as 32, m as 6, and the reliability sequence as shown in Table 3 above, m of the k information bits can be the first 6 bits in the second sequence sorted from high to low according to reliability, that is, the m information bits can be the following bits in the second sequence: 15, 23, 27, 29, 30, 31.

[0150] Based on the above description of the m information bits, the m information bits have a nested characteristic for information bit sequences of different numbers (such as k equals 7, 8, 9, 10, or 11), and will not change with the length of the information bit sequence, thereby reducing decoding complexity and improving decoding performance.

[0151] Optionally, the preset information bit set and the preset PC bit set may be determined according to row weight and reliability.

[0152] For NR PC-Polar codes, if the number of PC bits that need to be determined is n, PC , we can first determine the minimum row weight w corresponding to k information bits min , if the number of remaining bits after removing the information bits with the same row weight from the bit set corresponding to the minimum row weight is greater than or equal to n PC , we can select the first n bits sorted from high to low in terms of reliability from the bit set corresponding to the minimum row weight. PCPositions are used as PC bits, and the information bits with the same row weight are shifted to the bits with lower reliability. If the number of remaining bits is less than n PC , then select the first bit from the bit set corresponding to the minimum row weight, sorted by reliability from high to low bits are used as PC bits, and the remaining The PC bits can be obtained from K+n PC Select the first bit in descending order of reliability. bits are used as PC bits.

[0153] For example, as shown in (a) of FIG6 , the number of PC bits that need to be determined as predefined by the protocol is n PC =4, the number of information bits k = 10 as an example, the row weights corresponding to the 10 information bits include 32, 16, and 8, among which the number of information bits corresponding to the row weights 32 and 16 is 6, and the minimum row weight corresponding to the 10 information bits is w min =8, the bit set corresponding to the minimum row weight 8 includes 10 bits: (28, 22, 25, 26, 21, 14, 13, 19, 11, 7), and the bit set needs to include 10-6=4 information bits. After removing the information bits with the same row weight (that is, removing 4 information bits), the number of remaining bits is 6, which is greater than n PC Therefore, we can select the first n bits sorted from high to low reliability from the bit set corresponding to the minimum row weight 8. PC Positions are used as PC bits, that is, bits 28, 22, 25, and 26 can be used as PC bits, and information bits with the same row weight are shifted to bits with lower reliability, that is, 4 bits among bits 21, 14, 13, 19, 11, and 7 can be determined as information bits.

[0154] However, if the rate matching method based on sub-block interleaving and puncturing from front to back as shown in Table 1 is used, bit 7 is located relatively early. When E = 24, 23, 22, 21, 20, 19, or 18, bit 7 will be punctured. Therefore, bit 7 is pre-frozen, and bit 7 of the second sequence can be set as a frozen bit (or also called a pre-frozen bit). Therefore, for the second sequence determined based on the information bit sequence of length k, the 6 bits corresponding to row weights 32 and 16 can be determined as m = 6 information bits, and km bits can be selected from the bit set (21, 14, 13, 19, 11) with a row weight of 8 as information bits.

[0155] However, when k is greater than or equal to 8, the corresponding performance of the PC bits and information bits determined based on the above method still needs to be improved. Therefore, the selection method of the PC bits and information bits can be changed, that is, the x PC bits of the second sequence can be determined according to the preset PC bit set, and the km information bits of the second sequence can be determined according to the preset information bit set to improve the decoding performance and rate matching performance.

[0156] 6( b ), the preset PC bit set may correspond to the following bits in the second sequence: 21, 26, 25, and 28. The preset information bit set may correspond to the following bits in the second sequence: 11, 19, 13, 14, and 22.

[0157] Optionally, the difference between the numbers of any two bits of any PC bit check in the preset PC bit set is not 1.

[0158] For example, taking k=9 as an example, the information bits of the second sequence may include 13, 14, 22, 15, 23, 27, 29, 30, and 31. Compared with the PC bit check bits including 13 and 14 (or including 14 and 15), if the PC bit check bits include one of 13 and 14 (or include one of 14 and 15), its performance can be greatly improved, that is, when the difference between the numbers of any two bits of any PC bit check in any one of the preset PC bit set is not 1, the decoding performance and rate matching performance can be improved.

[0159] Optionally, the interval between the PC bit and the bit of the PC bit check may be a prime number or an even number, without limitation.

[0160] For example, with k=11, the information bits of the second sequence may include 11, 19, 13, 14, 22, 15, 23, 27, 29, 30, and 31. Taking the PC bit as 21 as an example, for bit 11, the prime number requirement is not met between PC bit 21 and bit 11, but better performance can be obtained when PC bit 21 checks bit 11, that is, the interval between the PC bit and the information bit checked by the PC bit can also be an even number to improve decoding performance and rate matching performance.

[0161] Optionally, the bits for the PC bit check may be information bits of the second sequence or frozen bits of the second sequence, without limitation.

[0162] Based on the above description of the PC bit and the PC check bit, exemplarily, as shown in the PC equation in (b) of Figure 7, when the PC bit is the 21st bit in the second sequence, the PC bit check bit can be one or more of the following bit positions in the second sequence: 11, 14; or, when the PC bit is the 26th bit in the second sequence, the PC bit check bit can be one or more of the following bit positions in the second sequence: 13, 19; or, when the PC bit is the 25th bit in the second sequence, the PC bit check bit can be one or more of the following bit positions in the second sequence: 13, 22; or, when the PC bit is the 28th bit in the second sequence, the PC bit check bit can be one or more of the following bit positions in the second sequence: 11, 13, 19.

[0163] Among them, compared with the information bits, PC bits and PC equations corresponding to the nested PC-Polar code shown in (a) of Figure 7, the information bits, PC bits and PC equations provided in the embodiment of the present application as shown in (b) of Figure 7 can be compatible with the sub-block interleaving rate matching method of the NR PC-Polar code on the basis of satisfying the nesting characteristics, thereby improving the decoding performance and rate matching performance.

[0164] Based on the above description of the preset PC bit set, PC equation and preset information bit set, the preset PC bit set, PC equation and preset information bit set have nested characteristics for information bit sequences of different numbers (such as k equal to 7, 8, 9, 10, or 11), and will not change with the change of the length of the information bit sequence.

[0165] Based on the above description of information bits and PC bits, optionally, the transmitting device can map the information bit sequence of length k to the k information bits of the first sequence in sequence according to the reliability sequence, and set the values ​​of the remaining Nk bits of the first sequence (including x PC bits and Nkx frozen bits) to 0 to obtain a second sequence.

[0166] For example, the value of x can be 4.

[0167] For example, taking N=32 and k=11 as an example, the transmitting device can map the information bit sequence of length 11 to the following 11 information bits of the first sequence: (11, 19, 13, 14, 22, 15, 23, 27, 29, 30, 31), set the 4 PC bits (21, 26, 25, 28) of the first sequence to 0, and set the remaining 17 frozen bits to 0 to obtain the second sequence.

[0168] Step 502: The transmitting device performs polarization coding on the second sequence to obtain a third sequence.

[0169] The transmitting device may multiply the second sequence by the Polar coding matrix to obtain a third sequence.

[0170] Optionally, the transmitting device may also perform rate matching on the third sequence using the sub-block interleaving rate matching method of the NR PC-Polar code.

[0171] The transmitting device may refer to the sub-block interleaving pattern shown in Table 1 above, perform sub-block interleaving on the third sequence in units of sub-blocks to obtain a sub-block interleaved sequence, and perform rate matching on the sub-block interleaved sequence.

[0172] Based on the method shown in Figure 5, a polar code encoding scheme with nesting properties is provided. Different numbers of information bit sequences can construct polar codes based on the same m information bits, preset information bit set, and preset PC bit set. These m information bits, preset information bit set, and preset PC bit set exhibit a nesting property for different numbers of information bit sequences and do not change with the number of information bit sequences. Furthermore, the nested PC-Polar code derived from these m information bits, preset information bit set, and preset PC bit set can reuse the sub-block interleaving rate matching scheme of the NR PC-Polar code. This nested PC-Polar code maintains good rate matching performance even under the sub-block interleaving rate matching scheme of the NR PC-Polar code, simplifying rate matching operations, improving NR compatibility, and enhancing communication performance.

[0173] Optionally, based on the method shown in Figure 5 above, the following Figures 8 to 12 respectively give a comparison of the rate matching performance of different short code schemes (such as the length of the information bit sequence is 7, 8, 9, 10 or 11), wherein the cross mark indicates the performance of the LTE-RM code under FHT decoding, the circle mark indicates the performance of the nested PC-Polar code obtained based on the search under the nested puncturing sequence obtained based on the search, the triangle mark curve pointing to the right indicates the performance of the nested PC-Polar code obtained based on the search under NR sub-block interleaving rate matching, the asterisk mark indicates the performance of the NR constructed Polar code (without PC check) under NR sub-block interleaving rate matching, the triangle mark pointing downward indicates the performance of the NR PC-Polar code under NR sub-block interleaving rate matching, and finally, the triangle mark pointing to the left indicates the performance of the PC-Polar code with nested characteristics provided in an embodiment of the present application under sub-block interleaving rate matching of the NR PC-Polar code.

[0174] The horizontal axis of the performance comparison diagram is the code length E after puncturing, ranging from 18 to N (eg, 32), and the vertical axis is the SNR required to achieve BLER=0.01. The lower the curve, the better the performance.

[0175] According to Figures 8 to 12, it can be found that the PC-Polar code with nested characteristics provided in the embodiment of the present application can obtain performance similar to that of the nested PC-Polar code obtained based on the search when adopting the NR sub-block interleaving rate matching method, and the performance can be close to the performance of the LTE-RM code under FHT decoding.

[0176] FIG13 is a schematic diagram of another polar code encoding method provided in an embodiment of the present application. As shown in FIG13 , the method may include:

[0177] Step 1301: The transmitting end device maps an information bit sequence of length k to k bits of a first sequence of length N according to a reliability sequence of length N to obtain a fourth sequence.

[0178] The reliability sequence may be used to indicate the reliability corresponding to each bit of the sequence. A larger reliability value indicates a more reliable bit. The length of the reliability sequence may be N, where N is a positive integer.

[0179] Exemplarily, the reliability sequence may be an NR reliability sequence (or may also be described as a reliability sequence corresponding to an NR PC-Polar code). For example, taking the reliability sequence length N as 32 as an example, the reliability sequence may be the reliability sequence shown in Table 3 above.

[0180] In another example, the reliability sequence may also be a reliability sequence corresponding to the nested PC-Polar code. For example, taking the reliability sequence length N as 32 as an example, the reliability sequence may also be the reliability sequence shown in Table 4 below, where: Represents reliability, Indicates the bit corresponding to the reliability:

[0181] Table 4 Reliability sequence

[0182] It is understandable that the above Table 4 is defined starting from bit 0, and may also be defined starting from bit 1, that is, the above 0, 1, ..., 31 may be replaced by 1, 2, ..., 32 respectively without limitation.

[0183] Referring to the above reliability sequence, the transmitting device may map the information bit sequence of length k to k bits of the first sequence of length N to obtain a fourth sequence.

[0184] The fourth sequence may include k information bits, 0 PC bits and Nk frozen bits, where k and N are both positive integers.

[0185] Exemplarily, the value of k can be any one of the following: 3, 4, 5, or 6.

[0186] According to the reliability sequences shown in Table 3 or Table 4 above, as shown in FIG14 , it can be found that when the mother code length N of the ultra-short code is 32 and the value of k can be any of the following: 3, 4, 5, or 6, whether using the reliability sequence corresponding to the NR PC-Polar code shown in Table 3 or the reliability sequence corresponding to the nested PC-Polar code shown in Table 4, the ultimately determined information bits are the same. Moreover, when the length E after rate matching for these k values ​​is {18, 19, 20, 21, …, 32}, the corresponding rate matching scheme is the rate matching puncturing scheme based on sub-block interleaving. Therefore, when the value of k can be any of the following: 3, 4, 5, or 6, the rate matching scheme based on sub-block interleaving of the NR PC-Polar code can be directly multiplexed.

[0187] Based on the above description, the transmitting device can map the information bit sequence of length k to the first k bits of the first sequence of length N sorted from high to low according to the reliability sequence of length N, and set the remaining Nk bits to 0 to obtain a fourth sequence.

[0188] Optional, since the number of PC bits is 0, The number of is also 0; among them, Indicates n PC (i.e., the number of PC bits) The number of PC bits that sacrifice the reliability of the information bits.

[0189] For example, taking N=32 and K=3 as an example, when n PC =3, According to the reliability sequence, the three most reliable positions 31, 30, and 29 should be selected as information bits, because the minimum row weight in the information bit set is equal to 2 4 =16, This means that the position with the highest reliability needs to be selected from the positions with a row weight of 16 as the PC bit. The row weights of 30 and 29 in the information bits are both 16, and the reliability of 30 is higher, so the 30th bit becomes the PC bit, and 28 becomes the new information bit with reduced reliability.

[0190] Step 1302: The transmitting device performs polarization coding on the fourth sequence to obtain a fifth sequence.

[0191] The transmitting device may multiply the fourth sequence by the Polar coding matrix to obtain a fifth sequence.

[0192] Step 1303: The transmitting end device performs rate matching on the fifth sequence according to a puncturing method from front to back to obtain a sixth sequence.

[0193] As shown in Figure 14, the information bits for k = {3, 4, 5, 6} are (29 30 31), (27 29 30 31), (23 27 29 3031), and (15 23 27 29 30 31), respectively. This means that the information bits for k = 3 are a subset of the information bits for k = 4, the information bits for k = 4 are a subset of the information bits for k = 5, and the information bits for k = 5 are a subset of the information bits for k = 6. Therefore, if the sub-block interleaving rate matching method based on NR PC-Polar codes adopts a back-to-front shortening method, these positions will be shortened, and the nested nature of the information bits cannot be guaranteed. Furthermore, because the code rate of control information is not very high, from a performance perspective, using a front-to-back puncturing method for rate matching in the low and medium code rate ranges will achieve better performance.

[0194] Optionally, before performing rate matching on the fifth sequence in a forward-to-backward puncturing manner, the transmitting end device may further perform sub-block interleaving on the fifth sequence according to the first interleaving pattern.

[0195] Exemplarily, the first interleaving pattern may be the interleaving pattern shown in Table 1 above. The first interleaving pattern may also be described as: used to indicate that the values ​​on the Ath sub-block of the fifth sequence are swapped and placed on the Bth sub-block of the fifth sequence after interleaving; the mapping relationship between A and B is: (31, 31), (30, 30), (29, 29), (27, 28), (28, 27), (26, 26), (25, 25), (24, 24), (23, 23), ( 15, 22), (22, 21), (14, 20), (21, 19), (13, 18), (20, 17), (12, 16), (19, 15), (11, 14), (18, 13), (10, 12), (17, 11), (9, 10), (16, 9), (8, 8), (7, 7), (6, 6), (5, 5), (3, 4), (4, 3), (2, 2), (1, 1), (0, 0).

[0196] Based on the method shown in Figure 13, a polar code encoding scheme with nesting properties is provided. Information bit sequences with different numbers, k, can be constructed using k information bits and zero PC bits, determined based on the same reliability sequence. These k information bits and zero PC bits exhibit a nesting property for information bit sequences with different numbers, and do not change with the number of information bit sequences. Furthermore, the PC-Polar code with nesting properties derived from these k information bits and zero PC bits can utilize the forward-to-backward sub-block interleaving rate matching puncturing method of NR PC-Polar codes to maintain the nesting property of the information bits. This PC-Polar code with nesting properties maintains good rate matching performance even under the sub-block interleaving rate matching puncturing method of NR PC-Polar codes, simplifying rate matching operations, improving NR compatibility, and enhancing communication performance.

[0197] Optionally, based on the method shown in Figure 13 above, the following Figures 15 to 18 respectively give a comparison of the rate matching performance of different short code schemes (such as the length of the information bit sequence is 3, 4, 5 or 6), wherein the cross mark indicates the performance of the LTE-RM code under FHT decoding, the circle mark indicates the performance of the nested PC-Polar code obtained based on the search under the nested puncturing sequence obtained based on the search, the triangle mark curve pointing to the right indicates the performance of the nested PC-Polar code obtained based on the search under NR sub-block interleaving rate matching, the asterisk mark indicates the performance of the NR constructed Polar code (without PC check) under NR sub-block interleaving rate matching, the triangle mark pointing downward indicates the performance of the NR PC-Polar code under NR sub-block interleaving rate matching, and finally, the triangle mark pointing to the left indicates the performance of the PC-Polar code with nested characteristics provided in an embodiment of the present application under sub-block interleaving rate matching of the NR PC-Polar code.

[0198] The horizontal axis of the performance comparison diagram is the code length E after puncturing, ranging from 18 to N (eg, 32), and the vertical axis is the SNR required to achieve BLER=0.01. The lower the curve, the better the performance.

[0199] According to Figures 15 to 18, it can be found that the PC-Polar code with nested characteristics provided in the embodiment of the present application can achieve performance similar to that of the nested PC-Polar code obtained based on the search when adopting the NR sub-block interleaving rate matching puncturing method, and the performance can be close to the performance of the LTE-RM code under FHT decoding.

[0200] Optionally, based on the method shown in Figure 13 above, the following Figure 19 shows a comparison of rate matching performance of different short code schemes (such as the length of the information bit sequence is 3, 4, 5 or 6), wherein the cross mark indicates the performance of the LTE-RM code under FHT decoding, the circle mark indicates the performance of the nested PC-Polar code obtained based on the search under the nested puncturing sequence obtained based on the search, the asterisk mark indicates the performance of the NR-constructed Polar code (without PC check) under NR sub-block interleaving rate matching, and the triangle mark corresponds to the performance of the PC-Polar code with nested characteristics provided in the embodiment of the present application under the NR sub-block interleaving rate matching puncturing method.

[0201] The horizontal axis of the performance comparison diagram is the code length E after puncturing, ranging from 18 to N (eg, 32), and the vertical axis is the SNR required to achieve BLER=0.01. The lower the curve, the better the performance.

[0202] According to Figure 19, it can be found that the performance of the PC-Polar code with nested characteristics provided in the embodiment of the present application using the NR sub-block interleaving rate matching puncturing method is close to the performance of the puncturing sequence obtained based on the previous performance nested search, and is better than the performance of the LTE-RM code under rate matching.

[0203] It should be noted that the above embodiments are all explained by taking the definition starting from bit 0 as an example. It is understandable that the definition can also be explained starting from bit 1, that is, the above 0, 1, ..., 31 can be replaced by 1, 2, ..., 32 respectively without limitation.

[0204] In addition, in the above method, very short codes with an information bit sequence length of 3 to 11 are used as an example for explanation. It can be understood that the length of the very short code is not limited to 3 to 11, and can also be other lengths. The information bit sequence can also be a pre-transformed polar code, a polarization adjusted convolutional (PAC) code, etc., without limitation.

[0205] It should be noted that the various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or there is a logical conflict, the terms and / or descriptions of the different embodiments provided in this application are consistent and can be referenced by each other. The technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0206] It is understood that in the embodiments of the present application, the execution subject may perform some or all of the steps in the embodiments of the present application. These steps or operations are merely examples, and the embodiments of the present application may also perform other operations or variations of various operations. In addition, the various steps may be performed in a different order than those presented in the embodiments of the present application, and it is possible that not all operations in the embodiments of the present application need to be performed.

[0207] The above mainly introduces the solution provided by the embodiment of the present application from the perspective of interaction between devices. It is understandable that, in order to realize the above functions, each device includes a hardware structure and / or software module corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0208] The embodiments of the present application can divide the functional modules of each device according to the above method examples. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiments of the present application is schematic and is only a logical function division. In actual implementation, there may be other division methods.

[0209] In the case of dividing each functional module according to each function, Figure 20 shows a communication device 200, which can execute the actions performed by the sending end device in the method shown in Figures 5 to 19 above. All relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiment and will not be repeated here.

[0210] The communication device 200 may include a transceiver module 2001 and a processing module 2002. Exemplarily, the communication device 200 may be a communication device, or a chip used in a communication device, or other combined device or component having the aforementioned communication device functionality. When the communication device 200 is a communication device, the transceiver module 2001 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 2002 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the communication device 200 is a component having the aforementioned communication device functionality, the transceiver module 2001 may be a radio frequency unit; the processing module 2002 may be a processor (or processing circuit), such as a baseband processor. When the communication device 200 is a system-on-chip (SoC), the transceiver module 2001 may be the input / output interface of the SoC (e.g., a baseband chip); the processing module 2002 may be the SoC's processor (or processing circuit), which may include one or more central processing units. It should be understood that the transceiver module 2001 in the embodiment of the present application can be implemented by a transceiver or a transceiver-related circuit component; the processing module 2002 can be implemented by a processor or a processor-related circuit component (or, referred to as a processing circuit).

[0211] For example, the transceiver module 2001 can be used to perform all transceiver operations performed by the communication device in the embodiments shown in Figures 5 to 19, and / or to support other processes of the technology described herein; the processing module 2002 can be used to perform all operations other than transceiver operations performed by the communication device in the embodiments shown in Figures 5 to 19, and / or to support other processes of the technology described herein.

[0212] As another possible implementation, the transceiver module 2001 in FIG20 may be replaced by a transceiver that integrates the functionality of the transceiver module 2001; and the processing module 2002 may be replaced by a processor that integrates the functionality of the processing module 2002. Furthermore, the communication device 200 shown in FIG20 may further include a memory.

[0213] Alternatively, when the processing module 2002 is replaced by a processor and the transceiver module 2001 is replaced by a transceiver, the communication device 200 involved in the embodiment of the present application may also be the communication device 210 shown in Figure 21, wherein the processor may be the logic circuit 2101 and the transceiver may be the interface circuit 2102. Furthermore, the communication device 210 shown in Figure 21 may also include a memory 2103.

[0214] The embodiments of the present application also provide a computer program product, which, when executed by a computer, can implement the functions of any of the above method embodiments.

[0215] The embodiments of the present application also provide a computer program, which, when executed by a computer, can implement the functions of any of the above method embodiments.

[0216] The embodiment of the present application also provides a computer-readable storage medium. All or part of the processes in the above-mentioned method embodiments can be completed by a computer program to instruct the relevant hardware, and the program can be stored in the above-mentioned computer-readable storage medium. When the program is executed, it can include the processes of the above-mentioned method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including the data sending end and / or the data receiving end) of any of the above-mentioned embodiments, such as the hard disk or memory of the terminal. The above-mentioned computer-readable storage medium can also be an external storage device of the above-mentioned terminal, such as a plug-in hard disk equipped on the above-mentioned terminal, a smart memory card (smart media card, SMC), a secure digital (secure digital, SD) card, a flash card (flash card), etc. Further, the above-mentioned computer-readable storage medium can also include both the internal storage unit of the above-mentioned terminal and an external storage device. The above-mentioned computer-readable storage medium is used to store the above-mentioned computer program and other programs and data required by the above-mentioned terminal. The above-mentioned computer-readable storage medium can also be used to temporarily store data that has been output or is to be output.

[0217] It should be noted that the terms "first" and "second" in the specification, claims and drawings of this application are used to distinguish different objects, rather than to describe a specific order. "First" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this embodiment, unless otherwise specified, "multiple" means two or more.

[0218] Furthermore, the terms "include," "comprise," and "have," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0219] It should be understood that in this application, "at least one (item)" refers to one or more. "Multiple" refers to two or more. "At least two (items)" refers to two or three and more than three. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple. “When” and “if” both mean that corresponding measures will be taken under certain objective circumstances. They do not limit the time, nor do they require any judgment action when they are implemented, nor do they mean that there are other limitations.

[0220] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner to facilitate understanding.

[0221] In this application, "sending information to ... (a terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from ... (a terminal device)" can be understood as the source of the information being the terminal device. This can include receiving information directly or indirectly from the terminal device. The information may undergo necessary processing between the source and destination, such as formatting changes, but the destination can still understand the valid information from the source.

[0222] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0223] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0224] The units described as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0225] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0226] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

Claims

1. A polar code encoding method, characterized in that: include: According to a reliability sequence of length N, an information bit sequence of length k is mapped to k bits of a first sequence of length N to obtain a second sequence; wherein the second sequence includes k information bits, x parity check PC bits and Nkx frozen bits, and k, N, and x are all positive integers; m information bits of the k information bits are the first m bits in the second sequence sorted from high to low in terms of reliability, and the remaining (km) information bits of the k information bits are the bits in the second sequence corresponding to the first (km) information bits in a preset information bit set sorted from high to low in terms of reliability; the x PC bits are the x PC bits in the preset PC bit set; Polarization encoding is performed on the second sequence to obtain a third sequence.

2. The method according to claim 1, characterized in that The value of k is any one of the following: 7, 8, 9, 10, or 11.

3. The method according to claim 1 or 2, characterized in that: The m information bits are the following bit positions in the second sequence: 15, 23, 27, 29, 30, 31.

4. The method according to any one of claims 1 to 3, characterized in that: The preset information bit set corresponds to the following bit positions in the second sequence: 11, 19, 13, 14, and 22.

5. The method according to any one of claims 1 to 4, characterized in that: The difference between the numbers of any two bits of the PC bit check is not 1.

6. The method according to any one of claims 1 to 5, characterized in that: The preset PC bit set corresponds to the following bits in the second sequence: 21, 26, 25, and 28.

7. The method according to claim 6, characterized in that When the PC bit is the 21st bit in the second sequence, the bit of the PC bit check is one or more of the following bits in the second sequence: 11, 14; or When the PC bit is the 26th bit in the second sequence, the bit of the PC bit check is one or more of the following bit positions in the second sequence: 13, 19; or When the PC bit is the 25th bit in the second sequence, the bit of the PC bit check is one or more of the following bit positions in the second sequence: 13, 22; or When the PC bit is the 28th bit in the second sequence, the bit of the PC bit check is one or more of the following bit positions in the second sequence: 11, 13, 19.

8. The method according to any one of claims 1 to 7, characterized in that: Bit 7 of the second sequence is a frozen bit.

9. A polar code encoding method, characterized in that: include: According to the reliability sequence of length N, an information bit sequence of length k is mapped to k bits of the first sequence of length N to obtain a fourth sequence; wherein the fourth sequence includes k information bits, 0 parity check PC bits and Nk frozen bits, where k and N are both positive integers; Performing polarization encoding on the fourth sequence to obtain a fifth sequence; The fifth sequence is rate matched according to a puncturing method from front to back to obtain a sixth sequence.

10. The method according to claim 9, characterized in that The value of k is any one of the following: 3, 4, 5, or 6.

11. The method according to claim 9 or 10, characterized in that: Before performing rate matching on the fifth sequence in a forward-to-backward puncturing manner, the method further includes: performing sub-block interleaving on the fifth sequence according to the first interleaving pattern; The first interleaving pattern is used to indicate that the values ​​on the Ath sub-block of the fifth sequence are swapped and placed on the Bth sub-block of the interleaved fifth sequence; the mapping relationship between A and B is: (31, 31), (30, 30), (29, 29), (27, 28), (28, 27), (26, 26), (25, 25), (24, 24), (23, 23), (15, 22), (22, 21), (14, 20), (21, 19), (13, 18), (20, 17), (12, 16), (19, 15), (11, 14), (18, 13), (10, 12), (17, 11), (9, 10), (16, 9), (8, 8), (7, 7), (6, 6), (5, 5), (3, 4), (4, 3), (2, 2), (1, 1), (0, 0).

12. A communication device, characterized in that: include: A processing module, configured to map an information bit sequence of length k to k bits of a first sequence of length N according to a reliability sequence of length N, to obtain a second sequence; wherein the second sequence includes k information bits, x parity check PC bits and Nkx frozen bits, and k, N, and x are all positive integers; m information bits of the k information bits are the first m bits in the second sequence sorted from high to low in terms of reliability, and the remaining (km) information bits of the k information bits are bits in the second sequence corresponding to the first (km) information bits in a preset information bit set sorted from high to low in terms of reliability; and the x PC bits are x PC bits in a preset PC bit set; The processing module is further configured to perform polarization encoding on the second sequence to obtain a third sequence.

13. The device according to claim 12, characterized in that The value of k is any one of the following: 7, 8, 9, 10, or 11.

14. The device according to claim 12 or 13, characterized in that The m information bits are the following bit positions in the second sequence: 15, 23, 27, 29, 30, 31.

15. The device according to any one of claims 12 to 14, characterized in that: The preset information bit set corresponds to the following bit positions in the second sequence: 11, 19, 13, 14, and 22.

16. The device according to any one of claims 12 to 15, characterized in that: The difference between the numbers of any two bits of the PC bit check is not 1.

17. The device according to any one of claims 12 to 16, characterized in that: The preset PC bit set corresponds to the following bits in the second sequence: 21, 26, 25, and 28.

18. The device according to claim 17, characterized in that When the PC bit is the 21st bit in the second sequence, the bit of the PC bit check is one or more of the following bits in the second sequence: 11, 14; or When the PC bit is the 26th bit in the second sequence, the bit of the PC bit check is one or more of the following bit positions in the second sequence: 13, 19; or When the PC bit is the 25th bit in the second sequence, the bit of the PC bit check is one or more of the following bit positions in the second sequence: 13, 22; or When the PC bit is the 28th bit in the second sequence, the bit of the PC bit check is one or more of the following bit positions in the second sequence: 11, 13, 19.

19. The device according to any one of claims 12 to 18, characterized in that: Bit 7 of the second sequence is a frozen bit.

20. A communication device, characterized in that: include: A processing module, configured to map an information bit sequence of length k to k bits of a first sequence of length N according to a reliability sequence of length N, to obtain a fourth sequence; wherein the fourth sequence includes k information bits, 0 parity check PC bits and Nk frozen bits, where k and N are both positive integers; The processing module is further used to perform polarization encoding on the fourth sequence to obtain a fifth sequence; The processing module is further configured to perform rate matching on the fifth sequence in a puncturing manner from front to back to obtain a sixth sequence.

21. The device according to claim 20, characterized in that The value of k is any one of the following: 3, 4, 5, or 6.

22. The device according to claim 20 or 21, characterized in that Before the processing module performs rate matching on the fifth sequence in a forward-to-backward puncturing manner, the processing module is further configured to: performing sub-block interleaving on the fifth sequence according to the first interleaving pattern; The first interleaving pattern is used to indicate that the values ​​on the Ath sub-block of the fifth sequence are swapped and placed on the Bth sub-block of the interleaved fifth sequence; the mapping relationship between A and B is: (31, 31), (30, 30), (29, 29), (27, 28), (28, 27), (26, 26), (25, 25), (24, 24), (23, 23), (15, 22), (22, 21), (14, 20), (21, 19), (13, 18), (20, 17), (12, 16), (19, 15), (11, 14), (18, 13), (10, 12), (17, 11), (9, 10), (16, 9), (8, 8), (7, 7), (6, 6), (5, 5), (3, 4), (4, 3), (2, 2), (1, 1), (0, 0).

23. A communication device, characterized in that: The communication device includes a processor; the processor is used to run a computer program or an instruction so that the polar code encoding method according to any one of claims 1 to 8 is executed, or the polar code encoding method according to any one of claims 9 to 11 is executed.

24. The communication device according to claim 23, characterized in that The communication device further comprises a memory for storing the computer program or instructions.

25. A communication device, characterized in that: The communication device includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the polar code encoding method according to any one of claims 1 to 8, or execute the polar code encoding method according to any one of claims 9 to 11, and process and / or generate the information according to the information.

26. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer instruction or a program. When the computer instruction or the program is executed on a computer, the polar code encoding method according to any one of claims 1 to 8 is executed, or the polar code encoding method according to any one of claims 9 to 11 is executed.

27. A computer program product, characterized in that The computer program product includes computer instructions; when part or all of the computer instructions are executed on a computer, the polar code encoding method according to any one of claims 1 to 8 is executed, or the polar code encoding method according to any one of claims 9 to 11 is executed.

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