Method for manufacturing semiconductor device, and semiconductor device

Abstract

In the present invention, disclosed is a method for bonding a first semiconductor substrate 100 (semiconductor chip) to a second semiconductor substrate 200 (semiconductor wafer) by hybrid bonding. The first semiconductor substrate 100 includes an organic insulating film 102, a plurality of electrodes 103, and a plurality of dummy electrodes 104. The second semiconductor substrate 200 includes an organic insulating film 202 and a plurality of electrodes 203. In this method, after the electrodes 103 and the electrodes 203 are aligned, the organic insulating film 102 and the organic insulating film 202 are bonded to each other, and the electrodes 103 and the electrodes 203 are bonded to each other. In this hybrid bonding, the dummy electrodes 104 are provided on the first semiconductor substrate 100 so as to protrude further than the terminal electrodes 103, and such that the tips of the dummy electrodes 104 are embedded in the organic insulating film 202 of the second semiconductor substrate 200. Due to this configuration, manufacturing yields are improved by reliably bonding semiconductor substrates to each other.

Description

Semiconductor device manufacturing method and semiconductor device

[0001] The present disclosure relates to a method for manufacturing a semiconductor device and a semiconductor device.

[0002] In recent years, three-dimensional integration techniques have been studied to improve the integration degree of LSIs. Non-Patent Document 1 discloses an example of three-dimensional integration techniques for semiconductor chips.

[0003] FC Chen et al., “System on Integrated Chips(SoIC TM) for 3D Heterogeneous Integration”, 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), p.594-599(2019)

[0004] As a three-dimensional semiconductor integration technology, hybrid bonding is being considered for wafer-to-wafer (W2W) bonding or chip-on-wafer (CoW) bonding. In hybrid bonding, organic insulating materials are sometimes used for the insulating film at the connection interface as a countermeasure against foreign matter. In this case, because the coefficient of thermal expansion (CTE) of the organic insulating film is higher than that of the metal material (e.g., copper) of the terminal electrodes, the terminal electrodes are configured to protrude from the organic insulating film to take into account heating during bonding. However, when semiconductor components having such a configuration are bonded together, the protruding terminal electrodes contact each other first, making it difficult for the insulating films to contact each other. This can lead to misalignment or detachment during the temporary bonding of the terminal electrodes. This can lead to insecure bonding of the terminal electrodes and the insulating films, resulting in reduced manufacturing yield.

[0005] The present disclosure aims to provide a semiconductor device manufacturing method and a semiconductor device that can reliably bond semiconductor substrates together and improve manufacturing yield in hybrid bonding using an organic insulating film on at least one side.

[0006] [1] One aspect of the present disclosure relates to a method for manufacturing a semiconductor device. The method includes the steps of: preparing a first semiconductor substrate having a first substrate body, a first insulating film provided on one surface of the first substrate body, and at least one first electrode and at least one first dummy electrode provided on one surface of the first substrate body; preparing a second semiconductor substrate having a second substrate body, a second insulating film provided on one surface of the second substrate body, and at least one second electrode provided on one surface of the second substrate body; positioning the first semiconductor substrate and the second semiconductor substrate so that the first insulating film and the second insulating film face each other and the first electrode and the second electrode are aligned; bonding the first insulating film and the second insulating film to each other; and bonding the first electrode and the second electrode to each other. The second insulating film is an organic insulating film. In this manufacturing method, the first dummy electrode is configured so that at least a portion of the first dummy electrode is embedded in the second insulating film.

[0007] In this semiconductor device manufacturing method, at least one first dummy electrode is provided on one surface of the first substrate body of the first semiconductor substrate. This first dummy electrode is configured to be at least partially embedded in the second insulating film, which is an organic insulating film. The first dummy electrode and the second insulating film prevent misalignment or separation of the terminal electrodes when they are bonded together, ensuring reliable bonding of the first semiconductor substrate and the second semiconductor substrate. Therefore, this manufacturing method ensures reliable bonding of the terminal electrodes and the insulating films, improving manufacturing yield.

[0008] [2] In the method for manufacturing a semiconductor device according to [1] above, it is preferable that the protrusion height of the first dummy electrode from the surface of the first insulating film is greater than the first protrusion height of the first electrode from the surface of the first insulating film. This ensures that the first dummy electrode is embedded in the second insulating film. Therefore, this manufacturing method ensures that the first semiconductor substrate and the second semiconductor substrate are bonded together, improving manufacturing yield.

[0009] [3] In the semiconductor device manufacturing method of [1] or [2] above, it is preferable that the protrusion height of the first dummy electrode from the surface of the first insulating film is equal to or greater than the sum of the first protrusion height of the first electrode from the surface of the first insulating film and the second protrusion height of the second electrode from the surface of the second insulating film. This allows the first dummy electrode to contact the second insulating film and be embedded in the second insulating film before the first electrode and the second electrode come into contact and become misaligned. Therefore, this manufacturing method ensures reliable bonding of the first semiconductor substrate and the second semiconductor substrate, improving manufacturing yield.

[0010] [4] In the semiconductor device manufacturing method according to any one of [1] to [3] above, it is preferable that the protrusion height of the first dummy electrode from the surface of the first insulating film is smaller than the thickness of the second insulating film. This prevents the first dummy electrode from protruding too high, which would hinder the bonding between the first electrode and the second electrode. Therefore, this manufacturing method ensures reliable bonding between the first electrode and the second electrode, improving manufacturing yield.

[0011] [5] In the semiconductor device manufacturing method according to any one of [1] to [4] above, the protruding height of the first dummy electrode from the surface of the first insulating film may be 0.02 μm to 5 μm. By setting the protruding height of the first dummy electrode to 0.02 μm or more, the first dummy electrode is reliably embedded in the second insulating film. On the other hand, by setting the protruding height of the first dummy electrode to 5 μm or less, the protruding height is prevented from becoming too high and interfering with the bonding between the first electrode and the second electrode. Therefore, according to this manufacturing method, the first semiconductor substrate and the second semiconductor substrate are reliably bonded, and the first electrode and the second electrode are reliably bonded, improving manufacturing yield.

[0012] [6] In the semiconductor device manufacturing method according to any one of [1] to [5] above, when aligning the first electrode and the second electrode, it is preferable that the first dummy electrode contacts the second insulating film before the first electrode and the second electrode contact each other. This allows the first dummy electrode to contact the second insulating film and be embedded in the second insulating film before the first electrode and the second electrode come into contact and become misaligned. Therefore, this manufacturing method ensures reliable bonding of the first semiconductor substrate and the second semiconductor substrate, improving manufacturing yield.

[0013] [7] In the method for manufacturing a semiconductor device according to any one of [1] to [6] above, in the step of preparing the first semiconductor substrate, the first dummy electrode may be made of the same metal material as the first electrode, and the first electrode and the first dummy electrode may be polished so that the first dummy electrode protrudes beyond the first electrode. This allows the protruding height of the first dummy electrode to be formed by a simple means. Furthermore, the first dummy electrode and the first electrode before polishing can be produced by the same method, improving manufacturing efficiency.

[0014] [8] In the method for manufacturing a semiconductor device according to any one of [1] to [6] above, in the step of preparing the first semiconductor substrate, a metal material may be added onto the main body of the first dummy electrode so that the first dummy electrode protrudes further than the first electrode. This allows the protruding height of the first dummy electrode to be formed by a simple means. Furthermore, the first dummy electrode and the first electrode before the addition of the metal material can be fabricated by the same method, improving manufacturing efficiency.

[0015] [9] In the method for manufacturing a semiconductor device according to any one of [1] to [8] above, a region of the second insulating film facing the first dummy electrode may be formed to be thicker than other regions of the second insulating film. This allows the first dummy electrode to contact the second insulating film earlier, and the first dummy electrode is reliably embedded in the second insulating film. Therefore, this manufacturing method reliably bonds the first semiconductor substrate and the second semiconductor substrate, improving manufacturing yield.

[0016]

[10] In the method for manufacturing a semiconductor device according to any one of the above [1] to [9], it is preferable that the at least one first dummy electrode includes a plurality of first dummy electrodes. Such a plurality of first dummy electrodes and the second insulating film further securely bond the first semiconductor substrate and the second semiconductor substrate, thereby improving the manufacturing yield.

[0017]

[11] In the semiconductor device manufacturing method of

[10] above, the at least one first electrode may include multiple first electrodes, or multiple first electrodes may be positioned between multiple dummy electrodes. In this case, the dummy electrodes are arranged on the outside, making it easier to design an electrical circuit including the first electrodes, etc., on the inside. Furthermore, by arranging the dummy electrodes on the outside, stress applied to the dummy electrodes when stress in the rotational direction is applied to the semiconductor substrate or semiconductor chip can be reduced, preventing chip detachment, etc. Furthermore, by arranging the dummy electrodes on the outside, misalignment in the rotational direction can be easily detected by the dummy electrodes, and the dummy electrodes can also serve as alignment marks. Stress and deformation such as warping can also be suppressed.

[0018]

[12] In the method for manufacturing a semiconductor device according to any one of the above [1] to

[11] , the first dummy electrode is preferably an alignment mark for aligning the first electrode and the second electrode, thereby eliminating the need for space for individual dummy electrodes and improving the packaging density of wiring electrodes on the semiconductor substrate.

[0019]

[13] In the method for manufacturing a semiconductor device according to any one of the above [1] to

[12] , the planar shape of the first dummy electrode may be a cross, annular, circular, or polygonal shape. By using the dummy electrode in such a shape, it is possible to sensitively and quantitatively detect misalignment of the semiconductor substrate or semiconductor chip in the up / down, left / right, and rotational directions.

[0020]

[14] In the method for manufacturing a semiconductor device according to any one of [1] to

[13] above, the second semiconductor substrate may have at least one second dummy electrode provided on one surface of the second substrate body, and the first dummy electrode and the second dummy electrode may have complementary planar shapes. By using such first dummy electrode and second dummy electrode to align the first semiconductor substrate and the second semiconductor substrate, it becomes easier to align them.

[0021]

[15] In the method for manufacturing a semiconductor device according to

[14] above, the first insulating film of the first semiconductor substrate may be an organic insulating film, and the second dummy electrode may be configured so as to be at least partially embedded in the first insulating film. By providing dummy electrodes on both semiconductor substrates and embedding them in the insulating films in this manner, the first semiconductor substrate and the second semiconductor substrate are bonded more reliably, and manufacturing yield is further improved.

[0022] Another aspect of the present disclosure relates to a semiconductor device. The semiconductor device includes a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes a first substrate body, a first insulating film provided on one surface of the first substrate body, and at least one first electrode and at least one first dummy electrode provided on one surface of the first substrate body. The second semiconductor substrate includes a second substrate body, a second insulating film provided on one surface of the second substrate body, and at least one second electrode provided on one surface of the second substrate body. In this semiconductor device, the first insulating film and the second insulating film are bonded to each other, and the first electrode and the second electrode are bonded to each other. The second insulating film is an organic insulating film. In this semiconductor device, the first dummy electrode is configured to be at least partially embedded in the second insulating film.

[0023] In this semiconductor device, at least one first dummy electrode is provided on one surface of the first substrate body of the first semiconductor substrate. This first dummy electrode is configured so that at least a portion of the first dummy electrode is embedded in the second insulating film, which is an organic insulating film. The first dummy electrode and the second insulating film reliably bond the first semiconductor substrate and the second semiconductor substrate.

[0024] According to the present disclosure, in hybrid bonding in which an organic insulating film is used on at least one side, semiconductor substrates can be reliably bonded to each other, thereby improving manufacturing yield.

[0025] FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor device manufactured by a semiconductor device manufacturing method according to an embodiment of the present disclosure. Parts (a) to (c) of FIG. 2 are cross-sectional views sequentially illustrating a method for manufacturing the semiconductor device shown in FIG. 1. Part (a) of FIG. 3 is an enlarged cross-sectional view of a portion of Part (a) of FIG. 2, and Part (b) of FIG. 3 is an enlarged cross-sectional view of a portion of Part (b) of FIG. 2. FIG. 4 is a partially cutaway perspective view showing a state in which a dummy electrode is embedded in an organic insulating film. Part (a) of FIG. 5 is a plan view showing a first modified example of a dummy electrode (alignment mark), Part (b) of FIG. 5 is a cross-sectional view taken along line Vb-Vb in Part (a) of FIG. 5, and Part (c) of FIG. 5 is a cross-sectional view taken along line Vc-Vc in Part (a) of FIG. 5. Part (a) of Fig. 6 is a plan view showing an example of a dummy electrode having a shape complementary to that of the dummy electrode shown in Fig. 5, and part (b) of Fig. 6 is a cross-sectional view taken along line VIb-VIb in part (a) of Fig. 6. Fig. 7 is a plan view showing the dummy electrode shown in Fig. 5 and the dummy electrode shown in Fig. 6 overlapping each other. Parts (a) and (b) of Fig. 8 are plan views showing an example in which a first modified example of a dummy electrode is provided at the four corners of a semiconductor substrate, and part (c) of Fig. 8 is a plan view showing the dummy electrode shown in part (a) of Fig. 8 overlapping with the dummy electrode shown in part (b) of Fig. 8. Parts (a) and (b) of Fig. 9 are plan views showing a second modified example of a dummy electrode (alignment mark). Part (a) of Fig. 10 is a plan view showing the dummy electrode shown in part (a) of Fig. 9 overlapping with the dummy electrode shown in part (b) of Fig. 9. Part (b) of Fig. 10 is a plan view showing a third modified example of the dummy electrode (alignment mark), and is a plan view showing a state in which the dummy electrode shown in part (a) of Fig. 9 and a cross-shaped dummy electrode overlap. Parts (a) and (b) of Fig. 11 are plan views showing an example in which the second modified example of the dummy electrode is provided at two points on a diagonal line of a semiconductor substrate, and part (c) of Fig. 11 is a plan view showing a state in which the dummy electrode shown in part (a) of Fig. 11 and the dummy electrode shown in part (b) of Fig. 11 overlap.

[0026] Hereinafter, several embodiments of the present disclosure will be described in detail, with reference to the drawings as necessary. In the following description, identical or equivalent parts will be designated by the same reference numerals, and duplicate explanations will be omitted. Furthermore, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings unless otherwise specified. When terms such as "left," "right," "front," "back," "top," "bottom," "upper," and "lower" are used in the description and claims of this specification, these are intended for explanatory purposes and do not necessarily mean that these relative positions will always be the same. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.

[0027] In this specification, the term "layer" or "film" encompasses not only a structure with a shape formed over the entire surface when observed in a plan view, but also a structure with a shape formed on a portion of the surface. In this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes, as long as the intended effect of the process is achieved. A numerical range indicated using "to" indicates a range that includes the numerical values ​​before and after "to" as the minimum and maximum values, respectively.

[0028] (Configuration of Semiconductor Device) FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor device manufactured by a semiconductor device manufacturing method according to an embodiment. As shown in FIG. 1 , the semiconductor device 1 includes a first semiconductor substrate 10 and a second semiconductor substrate 20. The first semiconductor substrate 10 includes a substrate body 11 (first substrate body), an insulating film 12 (first insulating film) provided on one surface 11 a of the substrate body 11, and a plurality of terminal electrodes 13 (first electrodes) and dummy electrodes 14 (first dummy electrodes) provided on the one surface 11 a of the substrate body 11. The second semiconductor substrate 20 includes a substrate body 21 (second substrate body), an insulating film 22 (second insulating film) provided on one surface 21 a of the substrate body 21, and a plurality of terminal electrodes 23 (second electrodes) provided on the one surface 21 a of the substrate body 21. In the semiconductor device 1, the insulating film 12 and the insulating film 22 are bonded to each other to form a single insulating film. Furthermore, each of the terminal electrodes 13 and each of the terminal electrodes 23 are bonded to each other, and each of them forms one terminal electrode. The terminal electrodes 13 and 23 are made of a metal material such as copper. The insulating films 12 and 22 are organic insulating films, and are made of, for example, polyimide (PI), an organic insulating material. The insulating film 22 is configured so that the tip (the lower part in FIG. 1 ) of the dummy electrode 14 that protrudes below the terminal electrode 13 (toward the second semiconductor substrate 20) is embedded therein. This allows the first semiconductor substrate 10 and the second semiconductor substrate 20 to be firmly bonded together. The insulating film 12 on the side where the dummy electrode 14 is provided is preferably an organic insulating film, but may also be made of SiO ２ The insulating film 22 is mainly formed of an organic insulating film, but may also contain an inorganic insulating film in part.

[0029] The first semiconductor substrate 10 and the second semiconductor substrate 20 constituting such a semiconductor device 1 may be semiconductor chips or semiconductor wafers. For example, when the first semiconductor substrate 10 is a semiconductor chip and the second semiconductor substrate 20 is a semiconductor wafer, a Chip-on-Wafer (CoW) structure is formed. In this case, the second semiconductor substrate 20 may be, but is not limited to, a substrate on which multiple semiconductor chips, such as LSI (Large Scale Integrated Circuit) chips or CMOS (Complementary Metal Oxide Semiconductor) sensors, are formed in locations corresponding to the semiconductor chip (first semiconductor substrate 10). The first semiconductor substrate 10, which is a semiconductor chip, may be, but is not limited to, a semiconductor chip such as an LSI or memory. Note that both the first semiconductor substrate 10 and the second semiconductor substrate 20 may be semiconductor wafers, in which case a Wafer-to-Wafer (W2W) structure is formed. The first semiconductor substrate 10 and the second semiconductor substrate 20 are finely bonded to each other by a hybrid bonding method described below using an organic insulating film and a dummy electrode, so that the respective terminal electrodes and the organic insulating film around them are firmly and precisely bonded without misalignment.

[0030] (Method of Manufacturing Semiconductor Device) Next, a method of manufacturing the semiconductor device 1 will be described with reference to Fig. 2 and Fig. 3. Parts (a) to (c) of Fig. 2 are schematic cross-sectional views sequentially showing a method of manufacturing the semiconductor device 1 shown in Fig. 1. Part (a) of Fig. 3 is an enlarged cross-sectional view of part (a) of Fig. 2, and part (b) of Fig. 3 is an enlarged cross-sectional view of part (b) of Fig. 2.

[0031] The semiconductor device 1 can be manufactured, for example, through the following steps (a) to (e): (a) preparing a first semiconductor substrate having a first substrate body, a first insulating film provided on one surface of the first substrate body, and at least one first electrode and at least one first dummy electrode provided on one surface of the first substrate body; (b) preparing a second semiconductor substrate having a second substrate body, a second insulating film provided on one surface of the second substrate body, and at least one second electrode provided on one surface of the second substrate body; (c) positioning the first semiconductor substrate and the second semiconductor substrate such that the first insulating film and the second insulating film face each other and the first electrode and the second electrode are aligned; (d) bonding the first insulating film and the second insulating film to each other; and (e) bonding the first electrode and the second electrode to each other.

[0032] [Step (a)] Step (a) is a step of preparing a first semiconductor substrate 100, which is a silicon substrate on which an integrated circuit consisting of semiconductor elements and wiring connecting them is formed. In step (a), as shown in FIG. 2A, a plurality of terminal electrodes 103 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 101a of a substrate body 101 made of silicon or the like, and an insulating film 102 (first insulating film) made of an organic insulating material is also provided. The thickness D of the insulating film 102 may be, for example, 1 μm to 10 μm, or may be 5 μm or less. The terminal electrodes 103 are electrodes that penetrate the insulating film 102 to expose the integrated circuits and the like formed on the first semiconductor substrate 100 to the outside. The insulating film 102 may be provided on the one surface 101a of the substrate body 101 after the insulating film 102 is provided, or the insulating film 102 may be provided on the one surface 101a of the substrate body 101 after the insulating film 102 is provided.

[0033] In step (a), a dummy electrode 104 made of copper, aluminum, or the like is further provided on one surface 101a of the substrate body 101. As shown in FIG. 3A, the dummy electrode 104 is formed so that a protruding height H of the dummy electrode 104 from the surface 102a of the insulating film 102 is greater than a protruding height H1 (first protruding height) of the terminal electrode 103 from the surface 102a of the insulating film 102. The protruding height H of the dummy electrode 104 is preferably equal to or greater than the sum of the protruding height H1 of the terminal electrode 103 from the surface 102a of the insulating film 102 and the protruding height H2 (second protruding height) of the terminal electrode 203 described later from the surface 202a of the insulating film 202, and more preferably greater than the sum of the protruding heights H1 and H2. The protruding height H of the dummy electrodes 104 may be, for example, 0.02 μm to 5 μm, preferably 0.08 μm to 0.2 μm, and more preferably 0.12 μm to 0.16 μm. The protruding height H1 of the terminal electrodes 103 is, for example, preferably 40 nm to 100 nm, and more preferably 60 nm to 80 nm. Such dummy electrodes 104 are provided, for example, on the outside of the substrate body 101 so as to sandwich the multiple terminal electrodes 103 therebetween. The dummy electrodes 104 may also be provided on the inside of the substrate body 101.

[0034] The minimum protrusion height H of the dummy electrode 104 may be calculated, for example, from the following formula (1). Here, H is the protruding height of the dummy electrode 104 from the surface 102a of the insulating film 102, and μ ａ is the average height H1 of the protrusion of the terminal electrode 103 on the first semiconductor substrate 100 side where the dummy electrode 104 is provided from the surface of the insulating film 102, and μ ｂ is the average height H2 of the protrusion of the terminal electrode 203 on the second semiconductor substrate 200 side facing the dummy electrode 104 from the surface of the insulating film 202. ａ ２ is the variance of the protrusion height H1 of the terminal electrode 103 from the surface of the insulating film 102, and σ ｂ ２ is the variance of the protrusion height H2 of the terminal electrode 203 from the surface of the insulating film 202, and σ ＰＩ ２is the variance of the thickness D of the insulating film 202 of the second semiconductor substrate 200.

[0035] The dummy electrode 104 can be formed, for example, as follows. First, metal portions that will become the terminal electrodes 103 and dummy electrodes 104 are formed from the same material (e.g., copper) on one surface 101a of the substrate body 101, and the insulating film 102 is formed. Then, the surfaces of the metal portions and the surface of the insulating film 102 are polished and planarized using a polishing means using a CMP (Chemical Mechanical Polishing) method. During this planarization, the protrusion height H of the dummy electrode 104 can be made higher than the protrusion height H1 of the terminal electrode 103 by changing the material composition or polishing rate of the slurry used in the CMP method, making the metal portion of the dummy electrode 104 larger than the metal portion of the terminal electrode 103 (changing the size), or increasing the pad density around the metal portion of the dummy electrode 104 (changing the density). This polishing allows the terminal electrode 103 to slightly protrude from the surface 102a of the insulating film 102, and the dummy electrode 104 to protrude further than the terminal electrode 103. The surface roughness Ra of the insulating film 102 and the terminal electrode 103 after polishing may be 1 nm or less. Alternatively, as another method, metal portions that will become the terminal electrode 103 and the dummy electrode 104 are formed from the same material on one surface 101a of the substrate body 101, and the insulating film 102 is also formed. Then, the surfaces of the metal portions and the surface of the insulating film 102 are polished and flattened by a polishing means such as CMP. Thereafter, another metal material is deposited (added) by sputtering on the metal portion (main body) that corresponds to the dummy electrode 104, so that the protruding height H of the dummy electrode 104 is greater than the protruding height H1 of the terminal electrode 103.

[0036] [Step (b)] Step (b) is the same as step (a) except for the provision of dummy electrodes. Step (b) is a step of preparing a second semiconductor substrate 200, which is a silicon substrate on which an integrated circuit consisting of semiconductor elements and interconnections connecting them is formed. In step (b), as shown in FIG. 2A, a plurality of terminal electrodes 203 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 201a of a substrate body 201 made of silicon or the like, and an insulating film 202 (second insulating film) made of an organic insulating material is also provided. The terminal electrodes 203 are electrodes for exposing the integrated circuits and the like formed on the second semiconductor substrate 200 to the outside through the insulating film 202. The insulating film 202 may be provided on the one surface 201a of the substrate body 201 before the provision of the plurality of terminal electrodes 203, or the insulating film 202 may be provided on the one surface 201a of the substrate body 201 after the provision of the plurality of terminal electrodes 203. The thickness D of the insulating film 202 may be, for example, 1 μm to 10 μm, or may be 5 μm or less. In the step (b), polishing is also preferably performed to flatten the surfaces of the insulating film 202 and the terminal electrodes 203. The surface roughness Ra of the insulating film 202 and the terminal electrodes 203 after polishing may be 1 nm or less.

[0037] The organic insulating material used for the insulating films 102 and 202 in steps (a) and (b) is, for example, polyimide, a polyimide precursor (e.g., polyimide ester or polyamic acid), polyamideimide, bismaleimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These organic insulating materials are, for example, silicon oxide (SiO ２The organic insulating material has a lower elastic modulus than inorganic materials such as silicon dioxide, making it a soft material. By using such an organic insulating material, when bonding insulating films together in the step (d) described below, even if fine debris is present on the insulating film, it is absorbed into the insulating film, preventing poor bonding due to the debris and enabling reliable bonding of the insulating films together. For example, if the thickness of the insulating films 102 and 202 is 4 μm, debris with a diameter or width of 4 μm can be embedded within the organic insulating film. The elastic modulus of the organic insulating material constituting the insulating films 102 and 202 may be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus here refers to Young's modulus. The organic insulating material constituting the insulating films 102 and 202 preferably has a thermal expansion coefficient of 70 ppm / K or less, more preferably 50 ppm / K or less.

[0038] Furthermore, the organic insulating material used for the insulating films 102 and 202 is liquid or soluble in a solvent, and therefore each insulating film can be easily formed as a thin film by spin coating or the like. Furthermore, since these organic insulating materials are heat-resistant, they can withstand the temperatures (e.g., high temperatures of 300°C or higher) when bonding the terminal electrodes 103 and 203 in step (e) described below, preventing the bonding between the insulating films from deteriorating due to high temperatures. The organic insulating material constituting the insulating films 102 and 202 may be a photosensitive resin, a thermosetting non-conductive film (NCF), or a thermosetting resin. This organic insulating material may also be an underfill material. The insulating film 102 on the side opposite to the side where the dummy electrode 104 is embedded is made of SiO . ２ The insulating film 202 on the side where the dummy electrodes 104 are embedded may be formed mainly from an organic insulating material, but may contain an inorganic insulating material to the extent that the embedding of the dummy electrodes 104 is not hindered.

[0039] [Step (c)] Next, after the preparation of the first semiconductor substrate 100 and the second semiconductor substrate 200 is completed, the first semiconductor substrate 100 and the second semiconductor substrate 200 are arranged so that the insulating film 102 and the insulating film 202 face each other and the terminal electrode 103 and the terminal electrode 203 are aligned, as shown in (a) of FIG. 2 .

[0040] [Step (d)] and [Step (e)] Next, once the terminal electrodes 203 of the second semiconductor substrate 200 have been positioned relative to the terminal electrodes 103 of the first semiconductor substrate 100, the first semiconductor substrate 100 is moved relatively to the second semiconductor substrate 200, as shown in part (b) of FIG. 2 . At this time, the tips of the dummy electrodes 104 of the first semiconductor substrate 100 come into contact with the insulating film 202 of the second semiconductor substrate 200. At this stage, it is preferable that the terminal electrodes 103 of the first semiconductor substrate 100 and the terminal electrodes 203 of the second semiconductor substrate 200 are not in contact with each other, and a gap is formed between the two terminal electrodes. However, the terminal electrodes 103 and 203 may be in contact with each other. In this state, the first semiconductor substrate 100 and the second semiconductor substrate 200 are heated to a predetermined high temperature, for example, 200°C to 350°C. 3B, the first semiconductor substrate 100 is pressed against the second semiconductor substrate 200 with a predetermined pressure (e.g., 0.8 MPa) so that the tip 104a of the dummy electrode 104 penetrates into the insulating film 202 that has been softened by heating (see also FIG. 4, which is shown upside down). After the tip 104a of the dummy electrode 104 penetrates into the insulating film 202, the terminal electrode 103 of the first semiconductor substrate 100 and the terminal electrode 203 of the second semiconductor substrate 200 come into contact. By having the dummy electrode 104 penetrate into the insulating film 202 in this manner, the first semiconductor substrate 100 is positioned relative to the second semiconductor substrate 200, and the two substrates are fixed together.

[0041] The above-described pressing process is continued for, for example, about one hour using a pressing member. Because the dummy electrodes 104 penetrate into the insulating film 202, the two substrates are fixed to each other, and thus, no misalignment occurs between the terminal electrodes 103 and 203 during this pressing process. The heating process is maintained during this pressing process. During this heating process, the insulating film 102 of the first semiconductor substrate 100 thermally expands (the terminal electrodes 103 also thermally expand), so that the surface of the insulating film 102 and the surface of the terminal electrodes 103 become substantially coincident with each other. Similarly, during this heating process, the insulating film 202 of the second semiconductor substrate 200 thermally expands (the terminal electrodes 203 also thermally expand), so that the surface of the insulating film 202 and the surface of the terminal electrodes 203 become substantially coincident with each other. Thus, in the semiconductor device manufacturing method according to this embodiment, hybrid bonding is performed in a state in which the surfaces of the terminal electrodes 103 and the insulating film 102 and the terminal electrodes 203 and the insulating film 202 are substantially coincident with each other during heating. By performing hybrid bonding in this state, when bonding the insulating film 102 of the first semiconductor substrate 100 and the insulating film 202 of the second semiconductor substrate 200, the terminal electrode 103 of the first semiconductor substrate 100 and the terminal electrode 203 of the second semiconductor substrate 200 can be more reliably butt-joined. The bonding of the insulating films and the bonding of the electrodes may be performed simultaneously, or the electrodes may be bonded by further increasing the pressure after the insulating films are bonded. That is, steps (d) and (e) may be performed simultaneously, or step (e) may be performed while step (d) is being performed. By such bonding, the semiconductor device 1 shown in FIG. 1 is obtained.

[0042] When the electrodes are bonded by further pressing after the insulating films have been bonded, step (d) includes a pre-bonding step for bonding the insulating films 102 and 202 together, and a final bonding step for bonding the terminal electrodes 103 and 203 together. In this bonding method, as described above, it is preferable that the dummy electrode 104 penetrates the insulating film 202 and fixes the two substrates together at both the pre-bonding and final bonding stages. Furthermore, when performing pre-bonding and final bonding, the heating temperature and pressure during pre-bonding may differ from those during final bonding, either in terms of both temperature and pressure, or in terms of only a portion of the temperature and pressure. For example, the heating temperature during pre-bonding may be 150°C to 400°C, and the heating temperature during final bonding may be 200°C to 350°C. Furthermore, the pressure during pre-bonding may be 1 MPa to 6 MPa, and the pressure during final bonding may be 1 MPa to 20 MPa.

[0043] The semiconductor device 1, which is made up of the first semiconductor substrate 100 and the second semiconductor substrate 200 bonded together by hybrid bonding in this manner, may be further divided into individual pieces.

[0044] 4, the bonding strength of the dummy electrode 104 to the second semiconductor substrate 200 (insulating film 202) will be described. For example, if the diameter of the dummy electrode 104 is 10 μm, the bottom area of ​​the dummy electrode 104 is 78.5 μm. ２ On the other hand, the perimeter of the dummy electrode 104 is 31.4 μm, and if the protruding height H of the dummy electrode 104 is 50 μm, the side area of ​​the dummy electrode 104 is 1.57 μm ２ From these numerical values, it can be seen that the bottom area of ​​the dummy electrode 104 is larger than the lateral area. In other words, it can be seen that the magnitude of the bonding force of the dummy electrode 104 is dominated by the size of the bottom area of ​​the dummy electrode 104. If four such dummy electrodes 104 are provided on one semiconductor substrate, the adhesion force to the insulating film 202 made of polyimide will be, for example, 20 MPa. It is clear that with such adhesion force, the first semiconductor substrate 100 is more reliably bonded and held to the second semiconductor substrate 200.

[0045] As described above, according to the manufacturing method of the semiconductor device of this embodiment, the dummy electrode 104 is provided on one surface 101a of the substrate body 101 of the first semiconductor substrate 100. A portion of this dummy electrode 104 is configured to be embedded in the insulating film 202, which is an organic insulating film. Such dummy electrode 104 and insulating film 202 suppress misalignment and detachment when bonding the terminal electrodes together, thereby reliably bonding the first semiconductor substrate 100 and the second semiconductor substrate 200. Therefore, according to this manufacturing method, bonding of the terminal electrodes together and bonding of the insulating films together can be reliably performed, thereby improving manufacturing yield.

[0046] In the manufacturing method of the semiconductor device according to this embodiment, the protrusion height H of the dummy electrode 104 from the surface 102a of the insulating film 102 is greater than the protrusion height H1 of the terminal electrode 103 from the surface 102a of the insulating film 102. This ensures that the dummy electrode 104 is embedded in the insulating film 202. Therefore, according to this manufacturing method, the first semiconductor substrate 100 and the second semiconductor substrate 200 are reliably bonded together, improving the manufacturing yield.

[0047] In the manufacturing method of a semiconductor device according to this embodiment, the protrusion height H of the dummy electrode 104 is equal to or greater than the sum of the protrusion height H1 of the terminal electrode 103 and the protrusion height H2 of the terminal electrode 203 from the surface 202a of the insulating film 202. As a result, the dummy electrode 104 comes into contact with the insulating film 202 before the terminal electrode 103 and the terminal electrode 203 come into contact and become misaligned, and the dummy electrode 104 is embedded in the insulating film 202. Therefore, according to this manufacturing method, the first semiconductor substrate 100 and the second semiconductor substrate 200 are reliably bonded, improving the manufacturing yield.

[0048] In the manufacturing method of the semiconductor device according to this embodiment, the protruding height H of the dummy electrode 104 is smaller than the thickness D of the insulating film 202. This prevents the protruding height H of the dummy electrode 104 from becoming too large and impeding the bonding between the terminal electrode 103 and the terminal electrode 203. Therefore, according to this manufacturing method, the terminal electrode 103 and the terminal electrode 203 are reliably bonded to each other, improving the manufacturing yield.

[0049] In the manufacturing method of the semiconductor device according to this embodiment, when aligning the terminal electrodes 103 and 203, the terminal electrodes 103 and 204 are made to come into contact with each other after the dummy electrodes 104 come into contact with the insulating film 202. As a result, the dummy electrodes 104 come into contact with the insulating film 202 before the terminal electrodes 103 and 204 come into contact and become misaligned, and the dummy electrodes 104 are embedded in the insulating film 202. Therefore, according to this manufacturing method, the first semiconductor substrate 100 and the second semiconductor substrate 200 are reliably bonded, improving the manufacturing yield.

[0050] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the first semiconductor substrate 100, the dummy electrodes 104 may be made of the same metal material as the terminal electrodes 103, and the terminal electrodes 103 and dummy electrodes 104 may be polished so that the dummy electrodes 104 protrude beyond the terminal electrodes 103. This allows the protrusion height H of the dummy electrodes 104 to be formed by a simple means. Furthermore, the dummy electrodes 104 and terminal electrodes 103 before polishing can be produced by the same method, improving manufacturing efficiency.

[0051] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the first semiconductor substrate 100, a metal material may be added onto the main body of the dummy electrode 104 so that the dummy electrode 104 protrudes further than the terminal electrode 103. This allows the protrusion height H of the dummy electrode 104 to be formed by a simple means. Furthermore, the dummy electrode 104 and the terminal electrode 103 before the addition of the metal material can be fabricated by the same method, improving manufacturing efficiency.

[0052] [First Modification] Next, a first modification of the dummy electrode in the semiconductor device manufacturing method according to this embodiment will be described with reference to FIGS. 5 to 8. Although the shape and arrangement of the dummy electrode according to this modification are different, the manufacturing method of the semiconductor device using the dummy electrode is the same as that described above, and detailed description thereof will be omitted. Part (a) of FIG. 5 is a plan view showing a first modification of the dummy electrode (alignment mark), part (b) of FIG. 5 is a cross-sectional view taken along line Vb-Vb in part (a) of FIG. 5, and part (c) of FIG. 5 is a cross-sectional view taken along line Vc-Vc in part (a) of FIG. 5. Part (a) of FIG. 6 is a plan view showing an example of a dummy electrode having a shape complementary to the dummy electrode shown in FIG. 5, and part (b) of FIG. 6 is a cross-sectional view taken along line VIb-VIb in part (a) of FIG. 6. FIG. 7 is a plan view showing the dummy electrode shown in FIG. 5 and the dummy electrode shown in FIG. 6 overlapping each other. Parts (a) and (b) of Figure 8 are plan views showing an example in which a first variant of the dummy electrode is provided at the four corners of a semiconductor substrate, and part (c) of Figure 8 is a plan view showing a state in which the dummy electrode shown in part (a) of Figure 8 and the dummy electrode shown in part (b) of Figure 8 overlap.

[0053] As shown in parts (a), (b), and (c) of FIG. 5, the dummy electrode 104A provided on the first semiconductor substrate 100 is, for example, cross-shaped. Like the dummy electrode 104, the dummy electrode 104A is formed on the substrate main body 101 and protrudes from the insulating film 102. The protruding height of the dummy electrode 104A may be higher than that of the terminal electrode 103 and may be the same as that of the dummy electrode 104. Meanwhile, in this first modified example, a dummy electrode 204A (second dummy electrode) corresponding to the dummy electrode 104A is provided on the second semiconductor substrate 200. Like the dummy electrodes 104 and 104A, the dummy electrode 204A is provided on the surface 201a of the substrate main body 201 and protrudes from the insulating film 202. The dummy electrode 204A may protrude more than the terminal electrode 203, and may have a protruding height similar to that of the dummy electrodes 104 and 104A, for example. Parts (a) and (b) of Figure 6 show such a dummy electrode 204A. The dummy electrode 204A is an assembly electrode with four rectangular portions arranged at equal intervals, and has a shape complementary to the cross-shaped dummy electrode 104A. Figure 7 shows such dummy electrodes 104A and 204A arranged overlapping each other so as to correspond to each other. Such dummy electrodes 104A and 204A can be used as alignment marks, and by overlapping them as shown in Figure 7, the first semiconductor substrate 100 and the second semiconductor substrate 200 can be positioned.

[0054] 8 shows an example in which four dummy electrodes 104A are arranged at the four corners of the first semiconductor substrate 100, and four corresponding dummy electrodes 204A are arranged at the four corners of the second semiconductor substrate 200. By providing dummy electrodes as alignment marks at the four corners of each substrate in this manner, it is possible to more accurately position the first semiconductor substrate 100 and the second semiconductor substrate 200. In the example shown in FIG. 8, the dummy electrodes 104A, 204A are formed outside the terminal electrode regions 103A, 104A in which the multiple terminal electrodes 103, 104 are formed.

[0055] As described above, the method for manufacturing a semiconductor device according to the first modification can achieve the following effects in addition to the effects of the above-described embodiment. That is, in the first modification, the dummy electrodes 104A and 204A serve as alignment marks for aligning the terminal electrodes 103 and 203, and the first semiconductor substrate 100 and the second semiconductor substrate 200 can be aligned using the dummy electrodes. Furthermore, since there is no need for space for providing individual dummy electrodes, the packaging density of wiring electrodes on the semiconductor substrate can be improved.

[0056] Furthermore, in the method for manufacturing a semiconductor device according to the first modification, the second semiconductor substrate 200 has a dummy electrode 204A provided on one surface 201a of the substrate body 201, and the dummy electrode 104A and the dummy electrode 204A have complementary planar shapes. By using such dummy electrode 104A and dummy electrode 204A to align the first semiconductor substrate 100 and the second semiconductor substrate 200, the alignment of the two becomes easier.

[0057] Furthermore, in the method for manufacturing a semiconductor device according to the first modification, the insulating film 102 of the first semiconductor substrate 100 is an organic insulating film, and a portion of the dummy electrode 204A is configured to be embedded in the organic insulating film 102. By providing dummy electrodes on each of the two semiconductor substrates in this manner and configuring them to be embedded in the insulating films, the first semiconductor substrate 100 and the second semiconductor substrate 200 are bonded more reliably, and the manufacturing yield is further improved.

[0058] [Second Modification] Next, a second modification of the dummy electrodes in the semiconductor device manufacturing method according to this embodiment will be described with reference to FIGS. 9 to 11 . Although the shape and arrangement of the dummy electrodes according to the second modification are different, the manufacturing method of the semiconductor device using the dummy electrodes is the same as that described above, and therefore detailed description will be omitted. Furthermore, the protruding height and complementary shapes of the dummy electrodes are the same as those of the first modification, and therefore will not be described. Parts (a) and (b) of FIG. 9 are plan views showing a second modification of the dummy electrodes (alignment marks). Part (a) of FIG. 10 is a plan view showing the dummy electrode shown in part (a) of FIG. 9 and the dummy electrode shown in part (b) of FIG. 9 overlapping each other. As shown in FIG. 9 , in the second modification, the dummy electrode 104B on the first semiconductor substrate 100 side has a circular ring shape in plan view. Meanwhile, the dummy electrode 204B on the second semiconductor substrate 200 side has a circular shape in plan view. Note that the dummy electrode 204B may have a polygonal shape, such as a square. Note that the dummy electrodes 104B, 204B protrude from the insulating films, as in the first modification. As shown in part (a) of Figure 10, when positioning the first semiconductor substrate 100 and the second semiconductor substrate 200, the positions of the substrates are adjusted so that the dummy electrode 204B is located inside the dummy electrode 104B. This alignment allows the first semiconductor substrate 100 and the second semiconductor substrate 200 to be aligned.

[0059] Furthermore, in the second variant, similar to the first variant, when the first semiconductor substrate 100 and the second semiconductor substrate 200 are bonded, the dummy electrode 104B is embedded in the insulating film 202, and the dummy electrode 204B is embedded in the insulating film 102.

[0060] 11 shows an example in which two dummy electrodes 104B are arranged at two of the four corners (diagonally) of the first semiconductor substrate 100, and two dummy electrodes 204B are arranged at two of the four corners of the second semiconductor substrate 200. By providing dummy electrodes as alignment marks at two locations on each substrate in this manner, the first semiconductor substrate 100 and the second semiconductor substrate 200 can be positioned with greater precision. In the example shown in FIG. 11, the dummy electrodes 104B, 204B are formed outside the terminal electrode regions 103A, 104A in which the multiple terminal electrodes 103, 104 are formed, as in the first modification.

[0061] [Third Modification] Next, referring to part (b) of FIG. 10 , a third modification of the dummy electrode in the semiconductor device manufacturing method according to this embodiment will be described. Although the shape and arrangement of the dummy electrode according to the third modification are different, the manufacturing method of the semiconductor device using the dummy electrode is the same as that described above, and detailed description thereof will be omitted. Part (b) of FIG. 10 is a plan view showing a third modification of the dummy electrode (alignment mark), illustrating the state in which the dummy electrode shown in part (a) of FIG. 9 overlaps with a cross-shaped dummy electrode. As shown in part (b) of FIG. 10 , in the third modification, the dummy electrode 104B on the first semiconductor substrate 100 has a circular ring shape in plan view, similar to the second modification. Meanwhile, the dummy electrode 204c on the second semiconductor substrate 200 has a cross shape in plan view. Then, as shown in part (b) of FIG. 10, when positioning the first semiconductor substrate 100 and the second semiconductor substrate 200, the positions of the substrates are adjusted so that the dummy electrode 204C is located inside the dummy electrode 104B.

[0062] The above has described in detail the semiconductor device manufacturing method and the semiconductor device embodiments and modifications according to the present disclosure. However, the present invention is not limited to the above embodiments and modifications and can be applied to various other embodiments and modifications. For example, in the above description, the insulating film 202 has a generally flat shape, but this is not limiting. For example, in the semiconductor device manufacturing method according to the present embodiment, the region of the insulating film 202 facing the dummy electrode 104 may be formed to be thicker than other regions of the insulating film 202. For example, the facing region may be irradiated with argon ions to roughen the surface of the insulating film 202 and increase the thickness. This allows the dummy electrode 104 to contact the insulating film 202 more quickly, ensuring that the dummy electrode 104 is reliably embedded in the insulating film 202. Therefore, this manufacturing method reliably bonds the first semiconductor substrate 100 and the second semiconductor substrate 200, improving manufacturing yield.

[0063] 1...semiconductor device, 10,100...first semiconductor substrate, 11,101...substrate body (first substrate body), 12,102...insulating film (first insulating film), 13,103...terminal electrode (first electrode), 14,104,104A,104B...dummy electrode (first dummy electrode), 20,200...second semiconductor substrate, 21,201...substrate body (second substrate body), 22,202...insulating film (second insulating film), 23,203...terminal electrode (second electrode), 204A,204B,204C...dummy electrode (second dummy electrode).

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of: preparing a first semiconductor substrate having a first substrate body, a first insulating film provided on one side of the first substrate body, and at least one first electrode and at least one first dummy electrode provided on the one side of the first substrate body; preparing a second semiconductor substrate having a second substrate body, a second insulating film provided on one side of the second substrate body, and at least one second electrode provided on the one side of the second substrate body; positioning the first semiconductor substrate and the second semiconductor substrate such that the first insulating film and the second insulating film face each other and the first electrode and the second electrode are aligned; bonding the first insulating film and the second insulating film to each other; and bonding the first electrode and the second electrode to each other, wherein the second insulating film is an organic insulating film, and the first dummy electrode is configured so that at least a portion of the first dummy electrode is embedded in the second insulating film.

2. The method for manufacturing a semiconductor device according to claim 1, wherein a protruding height of said first dummy electrode from the surface of said first insulating film is greater than a first protruding height of said first electrode from the surface of said first insulating film.

3. A method for manufacturing a semiconductor device as described in claim 1 or 2, wherein a protruding height of the first dummy electrode from the surface of the first insulating film is equal to or greater than the sum of a first protruding height of the first electrode from the surface of the first insulating film and a second protruding height of the second electrode from the surface of the second insulating film.

4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein a protruding height of said first dummy electrode from the surface of said first insulating film is smaller than a thickness of said second insulating film.

5. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein the protrusion height of the first dummy electrode from the surface of the first insulating film is 0.02 μm to 5 μm.

6. A method for manufacturing a semiconductor device according to any one of claims 1 to 5, wherein when aligning the first electrode and the second electrode, the first electrode and the second electrode come into contact with each other after the first dummy electrode comes into contact with the second insulating film.

7. A method for manufacturing a semiconductor device according to any one of claims 1 to 6, wherein in the step of preparing the first semiconductor substrate, the first dummy electrode is made of the same metal material as the first electrode, and the first electrode and the first dummy electrode are polished so that the first dummy electrode protrudes beyond the first electrode.

8. A method for manufacturing a semiconductor device according to any one of claims 1 to 6, wherein in the step of preparing the first semiconductor substrate, a metal material is added onto a main body of the first dummy electrode so that the first dummy electrode protrudes beyond the first electrode.

9. A method for manufacturing a semiconductor device according to any one of claims 1 to 8, wherein a region of the second insulating film facing the first dummy electrode is formed to be thicker than other regions of the second insulating film.

10. The method for manufacturing a semiconductor device according to any one of claims 1 to 9, wherein the at least one first dummy electrode includes a plurality of dummy electrodes.

11. The method for manufacturing a semiconductor device according to claim 10, wherein the at least one first electrode includes a plurality of first electrodes, and the plurality of first electrodes are positioned between the plurality of dummy electrodes.

12. The method for manufacturing a semiconductor device according to any one of claims 1 to 11, wherein the first dummy electrode is an alignment mark for aligning the first electrode and the second electrode.

13. The method for manufacturing a semiconductor device according to any one of claims 1 to 12, wherein the first dummy electrode has a planar shape that is a cross shape, an annular shape, a circular shape, or a polygonal shape.

14. A method for manufacturing a semiconductor device as claimed in any one of claims 1 to 13, wherein the second semiconductor substrate has at least one second dummy electrode provided on one surface of the second substrate body, and the first dummy electrode and the second dummy electrode have complementary planar shapes.

15. The method for manufacturing a semiconductor device according to claim 14, wherein the first insulating film of the first semiconductor substrate is an organic insulating film, and the second dummy electrode is configured so that at least a portion of the second dummy electrode is embedded in the first insulating film.

16. A semiconductor device comprising: a first substrate body, a first insulating film provided on one side of the first substrate body, a first semiconductor substrate having at least one first electrode and at least one first dummy electrode provided on the one side of the first substrate body; a second substrate body, a second insulating film provided on one side of the second substrate body, and at least one second electrode provided on the one side of the second substrate body, wherein the first insulating film and the second insulating film are bonded to each other, the first electrode and the second electrode are bonded to each other, the second insulating film is an organic insulating film, and the first dummy electrode is configured so that at least a portion of the first dummy electrode is embedded in the second insulating film.

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