Method for determining a network layout of an electrical network; computer program; computer-readable data carrier; data processing device; and electrical network

Abstract

The present disclosure relates to a computer-implemented method for determining a network layout of an electrical network with two or more network ports, wherein a network layout indicates a spatial distribution of conductive material electrically connecting network ports of the electrical network, the method comprising: (a) generating a plurality of candidate network layouts, wherein each candidate network layout is divided into a plurality of modules; (b) computing, for each candidate network layout, a performance metric based on module-specific scattering information of each module of the candidate network layout; and (c) determining the network layout based on the performance metric of each candidate network.

Description

[0001] METHOD FOR DETERMINING A NETWORK LAYOUT OF AN ELECTRICAL NETWORK; COMPUTER PROGRAM; COMPUTER-READABLE DATA CARRIER; DATA PROCESSING

[0002] DEVICE; AND ELECTRICAL NETWORK

[0003] TECHNICAL FIELD

[0004] The present disclosure relates to a method for determining a network layout of an electrical network, and a corresponding computer program, computer-readable data carrier and data processing device. The present disclosure further relates to an electrical network having the determined network layout.

[0005] BACKGROUND

[0006] An electrical network (e.g. an electrical circuit) is an interconnection of electrical elements such as resistors, inductors, capacitors, and switches. For radiofrequency (RF) or microwave circuits, examples for distributed elements may further comprise transmission lines and coupled transmission lines. The interconnections may be provided by conductors such as wires, metallic strips, and cables, and / or by waveguides. An active electrical network contains at least one voltage or current source that can supply energy to the electrical network. A passive electrical network does not contain any voltage or current sources. As an example, an electrical network may be provided as a printed circuit board. As another example, an electrical network may be provided as an integrated circuit on a planar piece of semiconductor material such as silicon.

[0007] An electrical network typically comprises network ports. Network ports are points or regions where input signals are applied, or output signals are taken. The relationship between the input and output signals may be described using a scattering matrix (or S-matrix) which relates the voltage and current at the network ports. The elements of the S-matrix are referred to as scattering parameters (or S -parameters).

[0008] The values of the S-parameters are determined by the internal makeup of the electrical network. Thus, in order to predict a response of the electrical network to an input signal, the S-parameters of the electrical network may be computed. The internal makeup of the electrical network may be described by a network layout which indicates a spatial distribution of conductive material electrically connecting network ports of the electrical network. The computation of the S-parameters may then be performed based on the network layout, for example, using electromagnetic (EM) simulation software.

[0009] By calculating the S-parameters for various candidate network layouts, it is possible to determine a network layout having S-parameters closest to a predetermined target by using an optimization algorithm. As an example, it may be a target to determine network layout having certain EM characteristics such as a power amplifier (PA) having a certain gain behavior. A PA is a two-port electrical network that uses electric power from a power supply to increase the amplitude (magnitude of the voltage or current) of an input signal, producing a proportionally greater amplitude of an output signal according to its gain.

[0010] However, the computation of S-parameters using EM simulation software can become a time-consuming effort requiring significant computational resources for large network layouts. Liu, Z., Karahan, E. A., & Sengupta, K. (2022). Deep Learning-Enabled Inverse Design of 30-94 GHz Psat,3dBSiGe PA Supporting Concurrent Multiband Operation at Multi -Gb / s. IEEE Microwave and Wireless Components Letters, 32(6), 724-727. https: / / doi.Org / 10.l 109 / LMWC.2022.3161979, hereafter referred to as Liu et al. (2022), relates to machine-learning (ML)-based technique for estimating S-parameters of an electrical network. The technique employs a deep convolutional neural network (CNN) to more rapidly predict scattering properties of nearly arbitrary planar electromagnetic structures on a chip. The CNN outputs S-parameters for an inputted network layout provided as a two-dimensional grid of cells indicating presence or absence of conductive material. A network layout having S-parameters closest to a predetermined target is then determined using a genetic algorithm (GA) as the optimization algorithm.

[0011] SUMMARY

[0012] The technique disclosed in Liu et al. (2022) requires a training dataset for training the CNN in order to estimate S-parameters for a candidate network layout (i.e. not known from the training dataset) with sufficient accuracy. The training dataset comprises network layouts with associated S-parameters computed using EM simulation software serving as the ground truth record. The computational effort for generating the training dataset increases significantly with the size of the network layout. Furthermore, since the network layouts included in the training dataset should correspond to the candidate network layout in terms of its geometric configuration (e.g. size, shape, granularity, port arrangement, and the like), a new training dataset needs to be generated whenever the geometric configuration of the candidate network layout is changed. In this way, the technique disclosed in Liu et al. (2022) lacks flexibility and requires significant computational effort, because dedicated sets of training data need to be generated for each geometric configuration of candidate network layouts, each time involving time-consuming EM simulations.

[0013] Hence, there is a need for a more flexible and faster method for determining a network layout of an electrical network.

[0014] One embodiment relates to a computer-implemented method for determining a network layout of an electrical network with two or more network ports, wherein a network layout indicates a spatial distribution of conductive material electrically connecting network ports of the electrical network. The method comprises generating a plurality of candidate network layouts, wherein each candidate network layout is divided into a plurality of modules. The method further comprises computing, for each candidate network layout, a performance metric based on module-specific scattering information of each module of the candidate network layout. The method further comprises determining the network layout based on the performance metric of each candidate network layout.

[0015] Another embodiment relates to a computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method according to an embodiment, such as the one above.

[0016] Another embodiment relates to a computer-readable data carrier having stored thereon the computer program according to an embodiment, such as the one above.

[0017] Another embodiment relates to a data processing device comprising a processor and a memory, the memory containing instructions executable by the processor, whereby the data processing device is operative to carrying out the method according to an embodiment, such as the one above.

[0018] Another embodiment relates to an electrical network having a network layout determined based on the method according to an embodiment, such as the one above.

[0019] Another embodiment relates to an electrical network arranged using a planar medium, wherein the electrical network is divided into a plurality of modules, and each module is surrounded by a series of grounded vias passing through the planar medium.

[0020] Further preferred embodiments are defined in the dependent claims.

[0021] By dividing each candidate network layout into a plurality of modules, the performance metric for determining the network layout can be computed based on the module-specific scattering information which, due to the smaller size of the modules compared to the full candidate network layout, can be computed much faster compared to computing the scattering information for the full candidate network layout at once. In this manner, the computational efficiency of determining the network layout can be increased. Furthermore, the geometric configuration of the candidate network layout can be flexibly altered by arranging modules accordingly.

[0022] BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Fig. 1 shows a network layout provided as a two-dimensional spatial lattice of cells;

[0024] Fig. 2 shows a flowchart of a method for determining a network layout of an electrical network according to an embodiment; Fig. 3A shows a network layout provided as a two-dimensional spatial lattice of cells according to an embodiment;

[0025] Fig. 3B shows an electrical network according to an embodiment, wherein the electrical network has a configuration according to the network layout of Fig. 3A;

[0026] Fig. 4 shows an electrical network according to an embodiment, wherein the electrical network comprises an output matching network having a configuration according to the network layout of Fig. 3 A;

[0027] Fig. 5 shows a non-exhaustive compilation of modules with different geometric configurations;

[0028] Fig. 6A shows a flowchart of generating of a module according to a first approach;

[0029] Fig. 6B shows a flowchart of generating of a module according to a second approach;

[0030] Fig. 7A shows two modules having four module ports each;

[0031] Fig. 7B shows the two modules of Fig. 7B interconnected to form a (candidate) network layout;

[0032] Fig. 8 shows a flowchart of a method that extends the method for determining a network layout of an electrical network with two or more network ports according to an embodiment;

[0033] Fig. 9A shows a portion of a two-dimensional spatial distribution of conductive material based on a regular spatial lattice of quadratic cells in which diagonally neighboring cells form a point-like connection;

[0034] Fig. 9B shows an adjustment of point-like connections;

[0035] Fig. 9C shows an adjustment of point-like connections;

[0036] Fig. 9D shows an adjustment of point-like connections;

[0037] Fig. 9E shows an adjustment of point-like connections; and

[0038] Fig. 10 shows a schematic illustration of a hardware structure of a data processing device according to an embodiment. DETAILED DESCRIPTION

[0039] The present disclosure shall now be described in conjunction with specific embodiments. The specific embodiments serve to provide the skilled person with a better understanding but are not intended to in any way restrict the scope of the invention, which is defined by the appended claims. In particular, the embodiments described independently throughout the description can be combined to form further embodiments to the extent that they are not mutually exclusive.

[0040] A network layout indicates a spatial distribution of conductive material electrically connecting network ports of the electrical network. Two network ports, or any two points of the electrical network, are considered to be electrically connected, if there is a continuous path of conductive material (e.g. metallic material such as copper) for conducting a current. The two points are then said to have metal connectivity. The network layout may be provided or represented as a spatial lattice of cells indicating presence or absence of conductive material. The spatial lattice may be regular or irregular. As an example, a network layout may be provided as a two-dimensional spatial lattice of pixels, wherein each pixel may represent a binary value (e.g. black or white color) indicating presence or absence of conductive material. As another example, a network layout may be provided as a three-dimensional spatial lattice of voxels.

[0041] Fig. 1 shows a network layout 100 provided as a two-dimensional spatial lattice of pixels (i.e. cells). The pixels are numerated using a chessboard notation. Black pixels indicate presence of conductive material, while white pixels indicate absence of conductive material. The black pixels form a spatial distribution of conductive material electrically connecting network ports IN, OUT at pixels el7 and ml.

[0042] Typically, an electrical network may be provided as a PCB, for example, according to the network layout 100 of Fig. 1. The PCB may comprise an arrangement of network elements (e.g. resistors, inductors, capacitors, microchips, and the like) and corresponding interconnections as described by the spatial distribution of conductive material indicated by the network layout 100. The electrical network may have a network port IN at which an input signal may be applied. The electrical network may further have a network port OUT at which an output signal may be taken.

[0043] The network layout 100 of Fig. 1 comprises 15 x 15 cells. Thus, the number of possible network layouts is 215 X 15~ 5.4 x 1067. It is practically unfeasible to scan such a large search space of network layouts using EM simulation software. However, also common ML-based techniques may become practically unfeasible as the size of the training dataset required to train the ML model scales with the number of cells in the network layouts and the EM simulations required to generate correct answer labels (i.e. ground truth) for each network layout become time consuming. For common ML-based techniques it is thus preferable if the number of cells to simulate is kept sufficiently small, thereby limiting the size / granularity of the network layouts. However, using large / granular network layouts may be attractive since it allows discretizing, for example, an area of a chip or PCB with higher resolution, which in turn improves the resolution and variety of S-parameter responses achievable. The present disclosure suggests an improved technique to address these issues.

[0044] Fig. 2 shows a flow chart of a method 1000 for determining a network layout of an electrical network. The method 1000 is performed by a computer.

[0045] Step SI 100 includes generating a plurality of candidate network layouts, wherein each candidate network layout is divided into a plurality of modules. Each module refers to a portion of the candidate network layout, thus indicating a portion of the spatial distribution of conductive material electrically connecting network ports of the electrical network. The plurality of modules jointly represents the full candidate network layout.

[0046] The plurality of modules may comprise modules with different geometric configurations such as different sizes, shapes, granularities, port arrangements, and the like. Alternatively, or in addition thereto, the plurality of modules may comprise modules with the same geometric configuration. As an example, a network layout provided as a two-dimensional grid of 16 x 16 cells may be divided into one module having 8 x 16 cells and two modules of 8 x 8 cells.

[0047] The plurality of candidate network layout may be generated randomly. As an example, each module may be randomly selected from a database of modules. As another example, a spatial distribution of conductive material of a module may be generated randomly. Then, a candidate network layout may be formed by joining modules together such that network ports are electrically connected.

[0048] Step S 1200 includes computing, for each candidate network layout, a performance metric based on modulespecific scattering information of each module of the candidate network layout. The module-specific scattering information may be indicative of the scattering properties of the respective module. The modulespecific scattering information may be determined based on the S -matrix and / or the S -parameters of the respective module. The module-specific scattering information may be the S-matrix and / or the S- parameters of the respective module. The module-specific scattering information may be determined using EM simulation software. Alternatively, the module-specific scattering information may be determined using an ML-based technique. The module-specific scattering information may be determined in advance. Alternatively, the module-specific scattering information may be determined when computing the performance metric. In this case, the module-specific scattering information of one module may be computed in parallel to other modules. The performance metric may be a measure for quantifying a performance of the candidate network layout. The performance may be assessed with respect to a function of the candidate network layout (e.g. amplification of an input signal). The performance metric may be indicative of an EM characteristic (e.g. a scattering property, an impedance, and the like) of the candidate network layout, and / or a proximity of the EM characteristic to a predetermined target value (e.g. a desired scattering property, a desired impedance, and the like).

[0049] The performance metric of the candidate network layout may be computed by combining the modulespecific scattering information of each module to derive network layout-specific scattering information of the candidate network layout, and by evaluating, as the performance metric, one or more EM characteristics of the candidate network layout based on the network layout-specific scattering information. As an example, an EM characteristic may refer to a relationship of an amplitude (magnitude of the voltage or current) of an input signal and an amplitude of an output signal. For an electrical network serving as a PA, said relationship may be described by the gain of the PA.

[0050] Step S1300 includes determining the network layout based on the performance metric of each candidate network layout. The network layout determined in step SI 300 may be referred to as the optimal network layout. As an example, determining the network layout may comprise comparing the performance metric of all candidate network layouts with one another, and selecting, as the network layout, the candidate layout with an optimal performance metric among all candidate network layouts. Depending on how the performance metric is evaluated, the optimal performance metric may either be the maximal performance metric or the minimal performance metric among all candidate network layouts. As an example, if the performance metric relates to in a positive manner (i.e. higher is more desirable), the maximum performance metric may be used. As another example, if the performance metric relates to a in a negative manner (i.e. lower is more desirable), the minimum performance metric may be used. The optimal performance metric may be a local maximum or minimum, or a global maximum or minimum of the whole search space of network layouts.

[0051] Thus, by dividing each candidate network layout into modules, the performance metric for determining the network layout can be computed based on the module-specific scattering information which, due to the smaller size of the modules compared to the full candidate network layout, can be computed much faster compared to computing the scattering information for the full candidate network layout at once. In this manner, the computational efficiency of determining the network layout can be increased. Furthermore, the geometric configuration of the candidate network layout can be flexibly altered by arranging modules accordingly.

[0052] Each module may comprise module ports arranged at one or more sides of the module and enabling electrical connection between neighboring modules or serving as a network port. In this manner, the interconnections between modules may be established at predetermined locations of the module ports, thereby allowing various modules to be easily joined together to form a candidate network layout in which network ports are electrically connected via module ports. As an example, a module may have one or more module ports on each side suitable of being joined to another module. As another example, a module may have no module ports on at least one side and one or more module ports on each of the other sides. If a side of the module is provided with one module port, the module port may be positioned in the middle of the side. If a side of the module is provided with more than one module port, the module ports may be positioned with equidistant spacings along the side. It is also possible to place module ports at any other position along one or more sides of the module as long as any two neighboring module ports are separated with a minimum distance suitable for avoiding cross-talk between them.

[0053] A module port may be an active module port, if the module port is electrically connected to a network port, or if the module port serves as a network port. In other words, an activated module port lies on the continuous path of conductive material for conducting a current within the electrical network. Module ports which are not used in electrically connecting network ports may be terminated. As an example, unused module ports may be terminated in a passive load such as a short-circuit or an open-circuit in order to minimize leakage of EM energy from the corresponding module. As another example, unused module ports may be terminated in a capacitance, an inductance, or a resistance.

[0054] Any two modules comprising conductive material electrically connecting network ports may be shielded from each other. The shielding of each of said two modules may provide an endpoint for EM fields produced within each corresponding module. In this manner, it may be ensured that, outside the module ports, no EM coupling between said two modules occurs, which would otherwise negatively affect the individual performance of each corresponding module and thus its scattering properties. Furthermore, the shielding may also be ensured that a well-defined EM mode (e.g. a quasi-TEM mode for a microstrip, or TExy mode for a rectangular waveguide) may be assumed at the module ports connecting the said two modules.

[0055] Shielding a module may comprise providing, at one or more sides of the module, a barrier structure, wherein the barrier structure comprises a gap for any active module port. In this manner, shielding is achieved by the barrier structure in order to ensure that, outside the module ports, no EM coupling between said two modules occurs, which would otherwise negatively affect the individual performance of each corresponding module and thus its scattering properties. As an example, the barrier structure may be provided by a grounded mesh or plating surrounding the module. The grounded mesh or plating may comprise a metallic material such as copper. The barrier structure may be provided at locations of unused module ports. As another example, the barrier may be provided by an electronic bandgap structure exhibiting a stop-band for a frequency of interest, wherein the frequency of interest may correspond to a frequency of a current applied at one or more module ports of the module. The electrical network may be provided on a two-dimensional plane, and the barrier structure may be provided by a series of grounded vias. A via may be a small, drilled or etched hole that goes through the plane of the electrical network, wherein the hole is plated with a metallic material such as copper to form an electrical connection through the plane . The series of grounded vias may also be referred to as a grounded via fence. In this manner, the barrier structure for shielding may be provided simply by drilling or etching small holes around the module, plating their inside with conductive material connected to ground. Grounded vias may be provided at locations of unused module ports.

[0056] Each module may comprise a spatial lattice of cells, each cell being associated with a binary value indicating either presence or absence of conductive material. The spatial lattice may be regular or irregular. As an example, a module may comprise a two-dimensional spatial lattice of pixels, wherein each pixel may represent a binary value (e.g. black or white color) indicating presence or absence of conductive material. As another example, a module may comprise a three-dimensional spatial lattice of voxels.

[0057] Fig. 3A shows a network layout 200 provided as a two-dimensional spatial lattice of cells (i.e. pixels) according to an embodiment. The pixels are numerated using a chessboard notation. Black pixels indicate presence of conductive material, white pixels indicate absence of conductive material. The black pixels form a spatial distribution of conductive material electrically connecting network ports at pixels el7 and ml.

[0058] The exemplary network layout 200 shown in Fig. 3A is divided into four modules with the same size (i.e. 7x7 cells), square shape, granularity (i.e. same size cells), port arrangement (i.e. in the middle of each side). The top-left module U1 having cells [b-h][10-16], top-right module U2 having cells [j-p][10-16], and bottom -right module U3 having cells [j-p] [2-8] are shielded by a grounded via fence 201. The module ports at el7, i 13, m9 and ml represent active module ports. The module ports at ml7, al3, ql3, e9, a5, i5, q5, and el represent unused module ports. The unused module ports at ml7, al3, ql3, e9, i5, and q5 are provided with grounded vias 201.

[0059] The number of possible spatial distributions of conductive material in such modules of 7 x 7 cells is 27x7~ 5.6x l014. Compared to the 5.4x l067possible network layout without division into modules described above with reference to Fig. 1, this leads to a substantial reduction of the search space of network layouts (e.g. here, by a factor of IO53).

[0060] An electrical network may then be constructed according to the determined network layout. In other words, an electrical network may have a network layout determined based on the method 1000. The electrical network may be arranged using a planar medium, wherein the electrical network is divided into a plurality of modules, and each module is surrounded by a series of grounded vias passing through the planar medium. As an example, the electrical network is provided as a printed circuit board (PCB). As another example, the electrical network may be provided as integrated circuit (IC).

[0061] Fig. 3B shows an electrical network 300 according to an embodiment, wherein the electrical network 300 has a configuration according to the network layout 200 of Fig. 3A. The electrical network 300 in Fig. 3B illustrates an arrangement of grounded via fences 201 and conductive material as indicated by the network layout 200. The grounded via fences 201 delimit the modules Ul, U2, U3 of the electrical network 300. The electrical network 300 has a network port IN at the top left at which an input signal may be applied. The electrical network further has a network port OUT at the bottom right at which an output signal may be taken.

[0062] Fig. 4 shows an electrical network 400 according to an embodiment, wherein the electrical network 400 comprises an output matching network 405 having a configuration according to the network layout of Fig. 3 A. The output matching network 405 comprises three modules surrounded by grounded via fences 201. The electrical network 400 further comprises an input matching network 403. The input matching network 403 is coupled to the output matching network 405 via an amplifier 404. A first electrical signal may be applied at an input pad 401 connected to the input matching network 403. A second electrical signal may be taken at an output pad 402 connected to the output matching network 405. Other pads may be connected to ground GND. In another example, alternatively, or in addition thereto, the input matching network 403 may have a network layout that is determined based on the method 1000. In other words, the electrical network 400 may comprise at least one section (e.g. the output matching network 405) having a network layout determined based on the method 1000.

[0063] The modules Ul, U2, U3 of the network layout 200 shown in Figs. 3A, 3B and 4 have a square shape and comprise one module port (used or unused) on each of their sides. However, modules may have any shape and may comprise a different number of modules ports on each of their sides. Within a network layout, modules with different geometric configurations (e.g. size, shape, granularity, port arrangement, and the like) may be used. Fig. 5 shows a non-exhaustive compilation of modules with different geometric configurations.

[0064] In step SHOO, generating a plurality of candidate network layouts in step SHOO may further comprise determining, for each module, the module-specific scattering information using an estimation based on the spatial lattice of cells. In other words, the module-specific scattering information may be determined during or after the generation of the plurality of candidate network layouts. The module-specific scattering information may be the S-matrix and / or the S-parameters (i.e. the elements ofthe S -matrix) of the respective module. The estimation may take into account the geometric configuration (e.g. size, shape, granularity, port arrangement, and the like) of the respective module, the spatial distribution of conductive material as indicated by the binary values of each cell of the spatial lattice of cells of the respective module, and the arrangement of barrier structures at one or more sides of the respective module.

[0065] Alternatively, for each module, the module-specific scattering information may be determined in advance using an estimation based on the spatial lattice of cells. In other words, the scattering information may be determined before the generation of the plurality of candidate network layouts is performed. In this manner, repeatedly calculating module-specific scattering information for the same module can be avoided. As an example, the module-specific scattering information may be stored in a lookup table. In this manner, the module-specific scattering information may be quickly retrievable during the generation of the plurality of candidate network layouts, thereby increasing the computational efficiency of the method 1000. As an example, the lookup table may be provided as a hash map.

[0066] Alternatively, module-specific scattering information may be determined in advance only for some modules and module-specific scattering information for other modules may be determined during the generation of the plurality of candidate network layouts. Furthermore, during the generation of the plurality of candidate network layouts, after the module-specific scattering information has been determined, it may be stored in the lookup table in order to be retrievable during a subsequent iteration of the method 1000.

[0067] The estimation of the module-specific scattering information may be performed based on a machinelearning (ML) model. The ML model may output module-specific scattering information (e.g. S-matrix and / or S-parameters) estimated for module provided as input based on a spatial distribution of conductive material of the module (e.g. as indicated by a spatial lattice of cells of the module). The estimation based on the ML model may use a deep convolutional neural network (CNN) to estimate the module-specific scattering information. In this manner, the module-specific scattering information can be computed at high speed compared to a computation based on EM simulation software.

[0068] The ML model may be trained using a training dataset comprising a plurality of modules each associated with a correct answer label (i.e. ground truth) for the module-specific scattering information (e.g. determined using EM simulation software). The module-specific scattering information of the modules included in the training dataset may be computed using EM simulation software. After the ML model has been trained, the ML model may be able to accurately predict the module-specific scatter information for any module including modules not included in the training dataset. The accuracy of the prediction by the ML model may depend on the number of weights of the ML models, the size of the training dataset, and the like. The number of weights and the size of the training dataset may be selected such as to ensure a desired accuracy of the prediction by the ML model.

[0069] Generally, training of an ML model may be performed by determining a difference between an output of the ML model and a correct answer label (i.e. ground truth) associated with the input to the ML model as a loss function, back-propagating a gradient of the loss function with respect to weights of the ML model, and fine-tuning the weights of the ML model so that a value of the loss function is minimized. As an example, an ML model according to the present disclosure may be trained such that, for a module of the training dataset, a difference between the S-parameters predicted by the ML model and the S-parameters computed using EM simulation software is minimized.

[0070] The generating of a training dataset may be performed according to a first approach 2000a as shown in Fig. 6A, or according to a second approach 2000b as shown in Fig. 6B. One or more modules in the training dataset may be generated according to the first approach 2000a. The first approach 2000a may comprise the steps S2100a to S2800a, and optionally step S2900a. Alternatively, or in addition thereto, one or more modules in the training dataset may be generated according to the second approach 2000b. The second approach 2000b may comprise the steps S2100b to S2700b, and optionally step S2800b.

[0071] Both the first approach 2000a and the second approach 2000b comprise a path creation algorithm for creating a path between two cells ai and 012 of a module, wherein the cells ai and 0.2 each have a binary value of 1 indicating presence of conductive material. In the path creation algorithm, starting at cell ai, a neighboring cell that is closer to (X2 may be selected (i.e. a Euclidian distance between the cell 0.2 and the selected cell is less than a Euclidian distance between the cell 012 and the cell ai). Then, a binary value of the selected cell may be set to 1 indicating presence of conductive material. Then, the above steps of selecting a neighboring cell and setting its binary value to 1 may be repeated for the previously selected cell, until there is a continuous path of conductive material between the cells ai and 012.

[0072] Fig. 6A shows a flowchart of generating of a module according to the first approach 2000a. According to the first approach 2000a, binary values of cells in a randomly generated lattice of cells of a module may be inverted to ensure a continuous path of conductive material between module ports.

[0073] In step S2100a, a module may be generated by randomly drawing, for each cell in the spatial lattice of cells of the module, a real numerical value from a uniform distribution in the interval [0,1], Then, in step S2200a, the cells of each module may be binarized by setting all cells having a real numerical value less than a threshold pmetal to have a binary value of 1, while the remaining cells may be set to have a binary value of 0, wherein 1 and 0 denote presence of conductive material and absence of conductive material, respectively. As an example, the threshold Pmetal may be selected within the range 0 to 1, preferably within the range 0.4 to 0.65.

[0074] In order to avoid generating a large share of modules without metal connectivity between module ports, the binary value of one or more cells in the spatial lattice of cells may be inverted according to steps S2400a to S2900a described below, thereby ensuring a continuous path of conductive material between a pair of module ports. The probability of performing the steps S2400a to S2900a of inverting binary values may be set to a value greater than 0% and less than or equal to 100%, and preferably to a value between and including 95% and 97.5%.

[0075] In step S2300a for each module, it may be decided whether or not to perform inverting of binary values based on a predetermined probability. In other words, a Bernoulli trial (i.e. a coin flip experiment resulting in either “success”, e.g. heads, or “failure”, e.g. tails) may be conducted, wherein the likelihood of “success” is given by the predetermined probability, and the inverting of binary values is performed in case the result of the Bernoulli trial indicates “success”. As an example, for a predetermined probability set of 95%, it may be decided on average that 95 out of 100 modules generated are subjected to the inverting binary values according to steps S2400a to S2900a. Otherwise, the method 2000a terminates for the respective module.

[0076] In step S2400a, for each module, a start port and an end port may be selected from the module ports of the respective module, for which a continuous path of conductive material is to be ensured. In other words, the start port and the end port are selected to become active module ports. If a module has more than two module ports, the start port and end port may be randomly selected, or the subsequent steps S2500a to S2900a may be performed for each possible pair of module ports.

[0077] In step S2500a, for each module, binary values of non-metallic cells (i.e. a binary value indicating absence of conductive material, e.g. a binary value of 0) at the first port and the second port may be inverted. In this manner, it may be ensured that there is at least one metallic cell (i.e. with a binary value indicating presence of conductive material, e.g. a binary value of 1) at each of the start port and the end port by flipping binary value of cells adjacent to each of the start port and the end port.

[0078] In step S2600a, for each module, a set P of all cells tk with continuous paths of conductive material to the start port may be formed. Then, in step S2700a, for each module, a Euclidean distance may be calculated from each cell Oik in the set to a nearest cell that does not belong to the set P and that is at least one cell closer to the end port than the respective cell Oik along a direction defined by a vector pointing from the start port to the end port. Then, in step S2800a, for each module, a pair of cells Oik and yr having the least Euclidian distance may be selected and a continuous path of conductive material may be created between them according to the path creation algorithm described above.

[0079] In step S2900a, for each module, it may be determined whether or not there is a continuous path of conductive material between the start port and the end port. If yes, then the method 2000a may terminate for the respective module. If no, then the method 2000a may return to step S2600a. Alternatively, if no, the method 2000a may return to step S2400a (not shown in Fig. 6A). Fig. 6B shows a flowchart of generating of a module according to the second approach 2000b. According to the second approach 2000b, a module may be generated by successively forming a continuous path of conductive material between module ports. In the second approach 2000b, each module may be initially generated as an all-zero lattice of cells (i.e. all cells having a binary value of 0 denoting absence of conductive material). Then, a number of metallic paths may be created between randomly selected points in the lattice of cells. In this manner, the generated modules may contain mainly sequences of interconnected metallic cells, rather than isolated cells or groups of cells which frequently occurs when using the first approach 2000a with a small value for pmetal, thereby resulting in spatial distributions of conductive material that may more accurately represent an electrical network comprising multiple interconnected network elements (e.g. resistors, inductors, capacitors, microchips, and the like).

[0080] In step S2100b, for each module, an all-zero lattice of cells may initially be generated. Then, in step S2200b, for each module, an integer number Iliinesma5 be randomly drawn from a range between niower, limit and Hupper, limit, wherein niower, limit is greater than or equal to 0, and nUpper, limit is greater than 0. Here, the niines represents the number of sequences of interconnected metallic cells to be created. Then, in step S2300b, for each module, a loop index i (initially set to 0) may be incremented by 1. Then, in step S2400b, for each module, a pair of cells in the lattice of cells may be randomly selected. Then, in step S2500b, for each module, it may be determined whether or not a Euclidian distance between the pair of cells is less than a minimum distance criterion. If yes, then the method 2000b returns to step S2400b, where another pair of random cells is chosen instead. If no, then the method 2000b proceeds with step S2600b. As an example, the minimum distance criterion may correspond to half of the length of the shortest side of the module (e.g. for a two-dimensional module with 16x 8 cells, the minimum distance may be 4). In this manner, it may be possible to avoid creating very short sequences of interconnected metallic cells.

[0081] In step S2600b, for each module, a continuous path of conductive material may be created between the pair of cells according to the path creation algorithm described above. Then, in step S700b, for each module, it may be determined whether or not the loop index i equals niines- If yes, then the method 2000b, may proceed to the next step. If no, then the method 2000b may return to step S2400b. Then, in the optional step S2800b, it may be determined whether or not there is a continuous path of conductive material between module ports. If yes, then the method 2000b may terminate for the respective module. If no, then the method 2000b may proceed with step S2300a of the first approach 2000a.

[0082] The estimation may be performed based on EM simulation software. The estimation based on EM simulation software may be performed instead of an estimation based on an ML model. In this manner, the accuracy of the predicted model-specific scattering estimation may be improved. The estimation based on EM simulation software may be performed in addition to an estimation based on an ML model. In this manner, the ML model may be continuously trained. Note that generating the plurality of candidate network layouts may comprise generating modules according to any of the methods 2000a and 2000b for generating the training dataset. Modules may then be combined to form each of the plurality of candidate network layouts.

[0083] In step S1200, computing, for each candidate network layout, the performance metric may comprise deriving network layout-specific scattering information based on module-specific scattering information of each module. When the modules comprising conductive material electrically connecting network ports are assumed to be shielded from each other, the module-specific scattering information of said modules may be linearly combined to compute the network layout-specific scattering information. As an example, for each module, the module-specific scattering information may comprise module-specific S-parameters of the module. Then, computing, for each candidate network layout, the performance metric may comprise deriving network layout-specific S-parameters based on module-specific S-parameters. As detailed description of computing a network layout-specific S-parameter for a candidate network layout by linearly combining the module-specific S-parameter of each of the modules included in the candidate network layout will be elaborated below with reference to Equations 1 to 12.

[0084] In order to compute the network layout-specific S-parameters based on the module-specific S-parameters, the module-specific S-parameters comprised in a module-specific S-matrix are first converted into modulespecific admittance parameter (Y-parameters) comprised in a module-specific admittance matrix (Y- matrix) according to Equation 1.

[0085] [Equation 1J

[0086] Here, S denotes the module-specific S-matrix having dimension N xN for a module with N module ports, wherein N is a positive integer. Y denotes the module-specific Y-matrix having dimension NxN, IN denotes the identity matrix having dimension NxN, and fy denotes a diagonal matrix with the square roots of the characteristic admittance at each module port, i.e. the inverse of the characteristic impedance (described below).

[0087] As an example, consider a candidate network layout having two modules U1 and U2. Each of the modules U 1 and U2 comprises four module ports which may be numbered as shown in Fig. 7A. The module-specific Y-matrix Y ui) of the module U1 having the module-specific Y-parameters y(U1)ij with i, j e {1, 2, 3, 4}, and the module-specific Y-matrix Y u2) of the module U2 having the module-specific Y-parameters y(U2)ij with i, j e { 1, 2, 3, 4} are given in Equations 2 and 3.

[0088] [Equation 3]

[0089] As an example, the modules U1 and U2 may connected via module port 3 of the module U1 and module port 2 of the module U2, the module port 1 of the module U 1 may serve as a network port for an input signal, the module port 4 of the module U2 may serve as a network port for an output signal, and the remaining module ports may be terminated as shown in Fig. 7B. Here, network ports of the candidate network layout are numbered by the circled numerals (1) to (7). In other words, only the network ports (1), (3) and (7) are active network ports, and the network ports (2), (4), (5) and (6) are terminated.

[0090] Then, the module-specific Y-parameters y(U1)ij and y(U2)ij of the modules module U1 and U2, respectively, may be inserted into a larger modified nodal admittance matrix Y according to Equation 4.

[0091] [Equation 4]

[0092] Here, the larger modified nodal admittance matrix Y has dimensions corresponding to the number of network ports squared, i.e. Y has dimensions 7x7. The row and column indices of the larger modified nodal admittance matrix Y follow the numbering scheme of the network ports as shown in Fig. 7B (circled numerals (1) to (7)). For network port (3) representing the interconnection between the modules U1 and U2, the Y-parameters y(U1)33 and y(U2)22 are summed. Then, one may solve for a first nodal voltage vector v(1)with unit current at network port (1) (i.e. where the input signal is applied) as shown in Equation 5.

[0093] [Equation 5]

[0094] Similarly, one may solve for a second nodal voltage vector v(2)with unit current at network port (7) (i.e. where the output signal is taken) as shown in Equation 6.

[0095] [Equation 6]

[0096] Then, reduced impedance parameters (reduced Z-parameters) may be obtained for the network ports that are in use by the candidate network layout (i.e. the network port (1) for the input signal and the network port (7) for the output signal) according to Equation 7.

[0097] [Equation 7]

[0098] Here, Z denotes the reduced impedance matrix (reduced Z-matrix) of the candidate network layout having dimension 2x2, and having the reduced Z-parameters Zy with i, j G { 1, 2}. Lastly, the network layout-specific S-parameters Sy with i, j e { 1, 2} may be calculated from the reduced Z -parameters Zy according to Equations 8 to 12, wherein Zo is the characteristic impedance. The characteristic impedance Zo may be determined based on the geometric configuration of the modules and / or the type of conductive material to be used. As an example, the characteristic impedance Zo may be selected to be 50 . As another example, the characteristic impedance Zo may be selected to be equal to the impedance of a network port.

[0099] [Equation 12]

[0100] Other procedures for calculating the network layout-specific S-parameters are possible. Common circuit simulation software may be used to calculate the network layout-specific S-parameters, and the procedure outlined above with reference to Equations 1 to 12 shall be seen as an exemplary implementation.

[0101] The computing, for each candidate network layout, the performance metric may further comprise computing, as the performance metric, a deviation of one or more of the network layout-specific S- parameters from a corresponding one or more target values. The deviation may be computed as a rootmean-square error (RMSE).

[0102] The method 1000 may further comprise comparing the performance metric of the network layout to a predetermined minimum performance criterion. In addition thereto, the method 1000 may further comprise, if the network layout fails to satisfy the predetermined minimum performance criterion, modifying the plurality of candidate network layouts, and repeating the steps S1200 to SI 300 until the network layout satisfies the predetermined minimum performance criterion or until a predetermined maximum number of repetitions is reached. An example for such an extension to method 1000 is described in the following. Fig. 8 shows a flowchart of a method 1000’ that extends the method 1000 for determining a network layout of an electrical network with two or more network ports. The description of Fig. 2 applies accordingly. In step S 1400, a loop index k (initially set to 0) may be incremented by 1. Then, in step S 1500, the performance metric of the network layout (i.e. as determined in step SI 300) may be compared to a predetermined minimum performance criterion. The predetermined minimum performance criterion may be indicative of a distance from a target value used for computing the performance metric. As an example, in case the performance metric computed in step S 1200 is computed as a RMSE between one or more of the network layout-specific S-parameters and a corresponding one or more target values, the predetermined minimum performance criterion may indicate a minimum RMSE.

[0103] Then, in step SI 600, it may be determined whether or not the network layout fails to satisfy the predetermined minimum performance criterion. If yes, then the method 1000’ may proceed with step S 1700. If no, then the method 1000’ may terminate.

[0104] The predetermined minimum performance criterion may be satisfied if a performance metric is greater than or equal to a predetermined minimum performance threshold. As an example, in case the performance metric is defined as a score indicating a distance from one or more target values, wherein a higher score indicates a smaller distance, then any score less than a minimum score may be considered to fail (i.e. not satisfy) the predetermined minimum performance criterion.

[0105] Alternatively, the predetermined minimum performance criterion may be satisfied if a performance metric is less than a predetermined minimum performance threshold. In terms of the above example, any RMSE greater than or equal to the minimum RMSE may be considered to fail the predetermined minimum performance criterion.

[0106] In step S1700, it may be determined whether or not the loop index k equals nrep, wherein nrepis a positive integer representing the predetermined maximum number of repetitions. If yes, then method 1000’ may terminate. If no, then the method 1000’ may proceed with step S1800. In step S1800, the plurality of candidate network layouts may be modified and the method 1000’ proceeds with step S1200. In this manner, the network layout may be further refined until it satisfies the predetermined minimum performance criterion or until a predetermined maximum number of repetitions is reached. The step SI 700 may be optional.

[0107] Modifying the plurality of candidate network layouts may comprise removing, from the plurality of candidate network layouts, a subset of candidate network layouts having the most distant performance metric with respect to the predetermined minimum performance criterion. In addition thereto, modifying the plurality of candidate network layouts may further comprise adjusting, in each remaining candidate network layout, at least one module. In other words, the plurality of candidate network layout may be modified by selecting a number of the best candidate network layouts (i.e. having a performance metric closest to the predetermined minimum performance criterion) and perform adjustments on at least one module of each of the remaining candidate network layouts.

[0108] As an example, the plurality of candidate network layouts may be modified by removing one half of the plurality corresponding to the candidate network layouts in the 50thpercentile (i.e. having a performance metric less than the median across the plurality of candidate network layout). The remaining half of the plurality corresponding to the best 50% of the plurality of candidate nodes may then be selected for adjustments.

[0109] Adjusting, for each candidate network layout, at least one module may comprise replacing the at least one module with at least one new module having a different spatial distribution of conductive material. As an example, the at least one module may be replaced with a module in which binary values of a randomly selected subset of the spatial lattice of cells of the at least one module have been inverted (i.e. “l”s become “0”s and vice versa). As another example, the at least one module of one candidate network layout may be replaced with at least one module of another candidate network layout to be adjusted.

[0110] Fig. 9A shows a portion of a two-dimensional spatial distribution of conductive material based on a regular spatial lattice of quadratic cells in which diagonally neighboring cells form a point-like connection (as indicated by the circles next to the question marks “?”). Such point-like connections may result in an infinitely large impedance, thereby affecting a result of EM simulations for deriving the module-specific scattering information of a module comprising such a spatial distribution. However, if such diagonal connections are intended to indicate a certain angular orientation (e.g. a 45° angle) of a path of conductive material, infinitely large impedances for such point-like connections may be problematic. In order to resolve this issue, such point-like connections in a spatial distribution of conductive material may be adjusted in order to instead result in finite impedances.

[0111] As an example, Fig. 9B shows an adjustment of point-like connections comprising selecting cells having a binary value indicating absence of conductive material and bordering the point-like connections (i.e. being adjacent to both diagonally neighboring cells), and then inverting the binary value of the selected cells such as to indicate presence of conductive material. In this manner, point-like connections may be converted to step-shaped connections.

[0112] As another example, Fig. 9C shows an adjustment of point-like connections comprising dividing cells bordering the point-like connections into a plurality of sub-cells (i.e. increasing granularity), and setting the binary values of sub-cells bordering the point-like connections to indicate presence of conductive material. In this manner, point-like connections may be broadened to form connections with non-zero thickness. As yet another example, Fig. 9D shows an adjustment of point-like connections comprising selecting cells having a binary value indicating presence of conductive material and bordering the point-like connections, and increasing a size of the selected cells. In this manner, the selected cells may partially overlap neighboring cells.

[0113] As yet another example, Fig. 9E shows an adjustment of point-like connections comprising using octagonally-shaped cells, augmenting horizontal or vertical connections with square-shaped cells, and augmenting diagonal connections with diamond-shaped cells (i.e. squares rotated by 45°). Here, augmenting a connection may mean placing a cell within the lattice of cells such that its midpoint coincides with center of the connection. In this manner, horizontal, vertical and diagonal connection may be provided with the same thickness.

[0114] A data processing device may be provided having means for carrying out the steps of the method for determining a network layout according to any of the embodiments disclosed above. The data processing device may comprise a processor and a memory, the memory containing instructions executable by the processor, whereby the data processing device is operative to carry out the method according to any of the embodiments disclosed above.

[0115] As an example, Fig. 10 shows a schematic illustration of a hardware structure of a data processing device 500 according to an embodiment. The data processing device 500 has an interface module 510 providing means for transmitting and receiving information. The data processing device 500 has also a processor 520 (e.g. a CPU) for controlling the data processing device 500 and for, for instance, process executing the steps of the methods of any of the embodiments disclosed above. It also has a working memory 530 (e.g. a random-access memory) and an instruction storage 540 storing a computer program having computer- readable instructions which, when executed by the processor 520, cause the processor 520 to perform the methods of any of the embodiments disclosed above.

[0116] The instruction storage 540 may include a ROM (e.g. in the form of an electrically erasable programmable read-only memory (EEPROM) or flash memory) which is pre-loaded with the computer-readable instructions. Alternatively, the instruction storage 540 may include a RAM or similar type of memory, and the computer-readable instructions can be input thereto from a computer program product, such as a computer-readable storage medium such as a CD-ROM, etc.

[0117] In the foregoing description, aspects are described with reference to several embodiments. Accordingly, the specification should be regarded as illustrative, rather than restrictive. Similarly, the figures illustrated in the drawings, which highlight the functionality and advantages of the embodiments, are presented for example purposes only. The architecture of the embodiments is sufficiently flexible and configurable, such that it may be utilized in ways other than those shown in the accompanying figures. Software embodiments presented herein may be provided as a computer program, or software, such as one or more programs having instructions or sequences of instructions, included or stored in an article of manufacture such as a machine-accessible or machine-readable medium, an instruction store, or computer- readable storage device, each of which can be non-transitory, in one example embodiment. The program or instructions on the non-transitory machine-accessible medium, machine-readable medium, instruction store, or computer-readable storage device, may be used to program a computer system or other electronic device. The machine- or computer-readable medium, instruction store, and storage device may include, but are not limited to, floppy diskettes, optical disks, and magneto-optical disks or other types of media / machine-readable medium / instruction store / storage device suitable for storing or transmitting electronic instructions. The techniques described herein are not limited to any particular software configuration. They may find applicability in any computing or processing environment. The terms “computer-readable”, “machine-accessible medium”, “machine-readable medium”, “instruction store”, and “computer-readable storage device” used herein shall include any medium that is capable of storing, encoding, or transmitting instructions or a sequence of instructions for execution by the machine, computer, or computer processor and that causes the machine / computer / computer processor to perform any one of the methods described herein. Furthermore, it is common in the art to speak of software, in one form or another (e.g., program, procedure, process, application, module, unit, logic, and so on), as taking an action or causing a result. Such expressions are merely a shorthand way of stating that the execution of the software by a processing system causes the processor to perform an action to produce a result.

[0118] Some embodiments may also be implemented by the preparation of application-specific integrated circuits, field-programmable gate arrays, or by interconnecting an appropriate network of conventional component circuits.

[0119] Some embodiments include a computer program product. The computer program product may be a storage medium or media, instruction store(s), or storage device(s), having instructions stored thereon or therein which can be used to control, or cause, a computer or computer processor to perform any of the procedures of the example embodiments described herein. The storage medium / instruction store / storage device may include, by example and without limitation, an optical disc, a ROM, a RAM, an EPROM, an EEPROM, a DRAM, a VRAM, a flash memory, a flash card, a magnetic card, an optical card, nano systems, a molecular memory integrated circuit, a RAID, remote data storage / archive / warehousing, and / or any other type of device suitable for storing instructions and / or data.

[0120] Stored on any one of the computer-readable medium or media, instruction store(s), or storage device(s), some implementations include software for controlling both the hardware of the system and for enabling the system or microprocessor to interact with a human user or other mechanism utilizing the results of the embodiments described herein. Such software may include without limitation device drivers, operating systems, and user applications. Ultimately, such computer-readable media or storage device(s) further include software for performing example aspects, as described above.

[0121] Included in the programming and / or software of the system are software modules for implementing the procedures described herein. In some example embodiments herein, a module includes software, although in other example embodiments herein, a module includes hardware, or a combination of hardware and software.

[0122] While various embodiments of the present disclosure have been described above, it should be understood that they have been presented by way of example, and not limitation. It will be apparent to persons skilled in the relevant art(s) that various changes in form and detail can be made therein. Thus, the above-described example embodiments are not limiting.

Claims

CLAIMS1. A computer-implemented method for determining a network layout of an electrical network with two or more network ports, wherein a network layout indicates a spatial distribution of conductive material electrically connecting network ports of the electrical network, the method comprising:(a) generating a plurality of candidate network layouts, wherein each candidate network layout is divided into a plurality of modules;(b) computing, for each candidate network layout, a performance metric based on module-specific scattering information of each module of the candidate network layout; and(c) determining the network layout based on the performance metric of each candidate network layout.

2. The method according to claim 1, wherein each module comprises module ports arranged at one or more sides of the module and enabling electrical connection between neighboring modules or serving as a network port.

3. The method according to claim 2, wherein a module port is an active module port, if the module port is electrically connected to a network port, or if the module port serves as a network port.

4. The method according to claim 3, wherein any two modules comprising conductive material electrically connecting network ports are shielded from each other.

5. The method according to claim 4, wherein shielding a module comprises providing, at one or more sides of the module, a barrier structure, wherein the barrier structure comprises a gap for any active module port.

6. The method according to claim 5, wherein the electrical network is provided on a two-dimensional plane, and the barrier structure is provided by a series of grounded vias.

7. The method according to any one of claims 1 to 6, wherein each module comprises a spatial lattice of cells, each cell being associated with a binary value indicating either presence or absence of conductive material.

8. The method according to claim 7, wherein generating a plurality of candidate network layouts further comprises:determining, for each module, the module-specific scattering information using an estimation based on the spatial lattice of cells.

9. The method according to claim 7, wherein, for each module, the module-specific scattering information is determined in advance using an estimation based on the spatial lattice of cells.

10. The method according to any one of claim 8 or 9, wherein the module-specific scattering information is stored in a lookup table.

11. The method according to any one of claims 8 to 10, wherein the estimation is performed based on a machine-learning model.

12. The method according to any one of claims 8 to 10, wherein the estimation is performed based on electromagnetic simulation software.

13. The method according to claim 12, wherein computing, for each candidate network layout, the performance metric comprises: deriving network layout-specific scattering information based on module-specific scattering information of each module.

14. The method according to any one of claims 1 to 13, wherein, for each module, the module-specific scattering information comprises module-specific S-parameters of the module.

15. The method according to claim 14, wherein computing, for each candidate network layout, the performance metric comprises: deriving network layout-specific S-parameters based on module-specific S-parameters.

16. The method according to claim 15, wherein computing, for each candidate network layout, the performance metric further comprises: computing, as the performance metric, a deviation of one or more of the network layout-specific S- parameters from a corresponding one or more target values.

17. The method according to any one of claims 1 to 16 further comprising:(d) comparing the performance metric of the network layout to a predetermined minimum performance criterion; and(e) if the network layout fails to satisfy the predetermined minimum performance criterion, modifying the plurality of candidate network layouts, and repeating the steps (b) to (c) until the networklayout satisfies the predetermined minimum performance criterion or until a predetermined maximum number of repetitions is reached.

18. The method according to claim 17, wherein the predetermined minimum performance criterion is satisfied if a performance metric is greater than or equal to a predetermined minimum performance threshold.

19. The method according to any one of claim 17 or 18, wherein modifying the plurality of candidate network layouts comprises: removing, from the plurality of candidate network layouts, a subset of candidate network layouts having the most distant performance metric with respect to the predetermined minimum performance criterion; and adjusting, in each remaining candidate network layout, at least one module.

20. The method according to claim 19, wherein adjusting, for each candidate network layout, at least one module comprises: replacing the at least one module with at least one new module having a different spatial distribution of conductive material.

21. A computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method according to any one of claims 1 to 20.

22. A computer-readable data carrier having stored thereon the computer program according to claim 21.

23. A data processing device comprising a processor and a memory, the memory containing instructions executable by the processor, whereby the data processing device is operative to carry out the method according to any one of claims 1 to 20.

24. An electrical network having a network layout determined based on the method according to any one of claims 1 to 20.

25. An electrical network arranged using a planar medium, wherein the electrical network is divided into a plurality of modules, and each module is surrounded by a series of grounded vias passing through the planar medium.

26. The electrical network according to any one of claim 24 or 25, wherein the electrical network is provided as a printed circuit board, PCB.

27. The electrical network according to any one of claim 24 or 25, wherein the electrical network is provided as integrated circuit, IC.

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