Bidirectional switch and control method

Abstract

A bidirectional switch (10) provided between a first input / output terminal (t1) and a second input / output terminal (t2) comprises a first FET (11), a second FET (12), and a control circuit (20) for controlling the first FET (11) and the second FET (12). The control circuit (20) monitors the voltage of the first input / output terminal (t1) and the voltage of the second input / output terminal (t2). When the bidirectional switch (10) acquires a signal for allowing conduction between the first input / output terminal (t1) and the second input / output terminal (t2), if the voltage of the first input / output terminal (t1) is greater than the voltage of the second input / output terminal (t2), the control circuit (20) raises the gate-source voltage of the first FET (11) while keeping said voltage lower than the gate-source voltage of the second FET (12), and if the voltage of the second input / output terminal (t2) is greater than the voltage of the first input / output terminal (t1), the control circuit (20) raises the gate-source voltage of the second FET (12) while keeping said voltage lower than the gate-source voltage of the first FET (11).

Description

Two-way switch and control method

[0001] The present disclosure relates to a bidirectional switch and a control method thereof.

[0002] Patent Documents 1 and 2 disclose techniques for suppressing inrush current in a switch.

[0003] JP 2015-35847 A JP 2021-125804 A

[0004] When a capacitor is connected to the load side, a large inrush current flows to charge the capacitor on the load side when the switch is turned on, so measures have been taken such as providing a separate circuit to suppress the inrush current as disclosed in Patent Documents 1 and 2. Such circuits require resistive elements with large resistance values ​​and high voltage and power resistance, which increases their size.

[0005] Furthermore, it is desirable to suppress inrush current in a bidirectional switch that switches between blocking and passing AC current or DC current that can flow in both directions.

[0006] Therefore, the present disclosure provides a bidirectional switch and the like that can suppress inrush current while suppressing an increase in size.

[0007] A bidirectional switch according to the present disclosure is a bidirectional switch provided between a first input / output terminal and a second input / output terminal, comprising a first FET, a second FET, and a control circuit that controls the first FET and the second FET, wherein the drain of the first FET is connected to the first input / output terminal, the source of the first FET is connected to the source of the second FET, and the drain of the second FET is connected to the second input / output terminal, and the control circuit monitors the voltage of the first input / output terminal and the voltage of the second input / output terminal, and when the bidirectional switch acquires a signal that establishes conduction between the first input / output terminal and the second input / output terminal, if the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, the control circuit increases the gate-source voltage of the first FET while suppressing it to be lower than the gate-source voltage of the second FET, and if the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal, the control circuit increases the gate-source voltage of the second FET while suppressing it to be lower than the gate-source voltage of the first FET.

[0008] A control method according to the present disclosure is a control method for a bidirectional switch provided between a first input / output terminal and a second input / output terminal, the bidirectional switch comprising a first FET and a second FET, the drain of the first FET being connected to the first input / output terminal, the source of the first FET being connected to the source of the second FET, and the drain of the second FET being connected to the second input / output terminal, the control method including the steps of monitoring a voltage of the first input / output terminal and a voltage of the second input / output terminal, and controlling a gate-source voltage of the first FET and a gate-source voltage of the second FET when the bidirectional switch acquires a signal that establishes conduction between the first input / output terminal and the second input / output terminal, wherein in the controlling step, when the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, the gate-source voltage of the first FET is increased while being suppressed more than the gate-source voltage of the second FET, and when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal, the gate-source voltage of the second FET is increased while being suppressed more than the gate-source voltage of the first FET.

[0009] These comprehensive or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or may be realized as any combination of a system, a method, an integrated circuit, a computer program, and a recording medium.

[0010] According to the bidirectional switch and the like according to one aspect of the present disclosure, it is possible to suppress an inrush current while suppressing an increase in size.

[0011] Fig. 1 is a circuit diagram showing an example of a bidirectional switch according to an embodiment; Fig. 2 is a diagram showing a circuit state of the bidirectional switch when the voltage of the first input / output terminal is higher than the voltage of the second input / output terminal; Fig. 3 is a diagram showing a circuit state of the bidirectional switch when the voltage of the second input / output terminal is higher than the voltage of the first input / output terminal; Fig. 4 is a diagram for explaining that inrush current can be suppressed; Fig. 5 is a flowchart showing an example of a control method according to another embodiment;

[0012] Hereinafter, the embodiments will be specifically described with reference to the drawings.

[0013] The embodiments described below are all comprehensive or specific examples, and the numerical values, shapes, materials, components, arrangement and connection of the components, steps, and order of steps shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0014] (Embodiment) Hereinafter, a bidirectional switch according to an embodiment will be described.

[0015] FIG. 1 is a circuit diagram showing an example of a bidirectional switch 10 according to an embodiment.

[0016] The bidirectional switch 10 is a switch provided between the input / output terminal t1 and the input / output terminal t2. The input / output terminal t1 is an example of a first input / output terminal, and the input / output terminal t2 is an example of a second input / output terminal. When the voltage of the input / output terminal t1 is greater than the voltage of the input / output terminal t2, the bidirectional switch 10 can switch between blocking and passing a current from the input / output terminal t1 to the input / output terminal t2. When the voltage of the input / output terminal t2 is greater than the voltage of the input / output terminal t1, the bidirectional switch 10 can switch between blocking and passing a current from the input / output terminal t2 to the input / output terminal t1. The current that the bidirectional switch 10 switches between blocking and passing may be either an AC current or a DC current.

[0017] The bidirectional switch 10 includes an FET 11 , an FET 12 , a control circuit 20 , and a voltage generating source 30 .

[0018] FET 11 is an example of a first FET. For example, FET 11 is an n-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). FET 12 is an example of a second FET. For example, FET 12 is an n-channel MOSFET. Note that FIG. 1 shows the body diodes of each of FETs 11 and 12.

[0019] The drain of FET 11 is connected to the input / output terminal t1. The source of FET 11 is connected to the source of FET 12. Specifically, the source of FET 11 is connected to the source of FET 12 via a resistor 21 (described later). The gate of FET 11 is connected to a voltage generating source 30.

[0020] The drain of FET 12 is connected to input / output terminal t2. The source of FET 12 is connected to the source of FET 11. Specifically, the source of FET 12 is connected to the source of FET 11 via a resistor 21 (described later). The gate of FET 12 is connected to a voltage generating source 30.

[0021] The voltage generating source 30 has a positive output terminal connected to the gates of the FETs 11 and 12, and when it receives a signal that connects the input / output terminal t1 and the input / output terminal t2, it generates a voltage to be applied to the gates of the FETs 11 and 12. The voltage generating source 30 has, for example, a light emitting element 31 and a light receiving element 32.

[0022] The light-emitting element 31 is a light-emitting diode having an anode connected to the input / output terminal t3 and a cathode connected to the input / output terminal t4. The light-receiving element 32 is a photovoltaic diode array, with the anode of the diode at one end (upper side in FIG. 1 ) of the photovoltaic diode array serving as a positive output terminal and the cathode of the diode at the other end (lower side in FIG. 1 ) of the photovoltaic diode array serving as a negative output terminal. When the voltage generating source 30 receives a signal that connects the input / output terminals t1 and t2 to each other, specifically when the voltage at the input / output terminal t3 becomes higher than the voltage at the input / output terminal t4 and a current flows from the input / output terminal t3 to the input / output terminal t4, the voltage generating source 30 causes the light-emitting element 31 to emit light and the light-receiving element 32 to receive the light from the light-emitting element 31, thereby generating a voltage to be applied to the gates of the FETs 11 and 12.

[0023] When the voltage generating source 30 receives a signal that connects the input / output terminal t1 and the input / output terminal t2, both FETs 11 and 12 are turned on, allowing a current to flow between the input / output terminal t1 and the input / output terminal t2, that is, the bidirectional switch 10 is brought into a conductive state. Furthermore, when the voltage generating source 30 no longer receives a signal that connects the input / output terminal t1 and the input / output terminal t2, specifically when no current flows from the input / output terminal t3 to the input / output terminal t4, both FETs 11 and 12 are turned off, thereby cutting off the current that flows between the input / output terminal t1 and the input / output terminal t2, that is, the bidirectional switch 10 is brought into a non-conductive state.

[0024] However, if a load including a capacitor is connected to the input / output terminal t1 or t2, when the bidirectional switch 10 is in a conductive state, a large inrush current will flow to charge the capacitor, which may burn out the rectifying elements, etc. In order to suppress such inrush current, the bidirectional switch 10 is provided with a control circuit 20.

[0025] The control circuit 20 monitors the voltage at the input / output terminal t1 and the voltage at the input / output terminal t2, and when the bidirectional switch 10 (specifically, the voltage generating source 30) acquires a signal that connects the input / output terminal t1 and the input / output terminal t2, the control circuit 20 performs the following operations according to the voltage at the input / output terminal t1 and the voltage at the input / output terminal t2.

[0026] When the voltage at input / output terminal t1 is higher than the voltage at input / output terminal t2, control circuit 20 increases the gate-source voltage of FET 11 while suppressing it to be lower than the gate-source voltage of FET 12. Furthermore, when the voltage at input / output terminal t2 is higher than the voltage at input / output terminal t1, control circuit 20 increases the gate-source voltage of FET 12 while suppressing it to be lower than the gate-source voltage of FET 11. In order to achieve this function, control circuit 20 includes, for example, resistor 21, comparator 22, and FETs 23 and 24.

[0027] One end (upper side in FIG. 1) of resistor 21 is connected to the source of FET 11, and the other end (lower side in FIG. 1) is connected to the source of FET 12. Because resistor 21 is a resistive element with a resistance value of, for example, about 1 Ω, the voltage drop and power consumption are small when a current flows between input / output terminal t1 and input / output terminal t2.

[0028] When the bidirectional switch 10 (specifically, the voltage generating source 30) receives a signal that connects the input / output terminal t1 and the input / output terminal t2, the control circuit 20 performs the following operation using the resistor 21.

[0029] When the voltage at input / output terminal t1 is higher than the voltage at input / output terminal t2, control circuit 20 applies a voltage between the gate of FET 11 and the other end of resistor 21 (lower side in FIG. 1 ) and between the gate of FET 12 and the other end of resistor 21, thereby increasing the gate-source voltage of FET 11 while suppressing it to be lower than the gate-source voltage of FET 12. Furthermore, when the voltage at input / output terminal t2 is higher than the voltage at input / output terminal t1, control circuit 20 applies a voltage between the gate of FET 11 and one end of resistor 21 (upper side in FIG. 1 ) and between the gate of FET 12 and one end of resistor 21, thereby increasing the gate-source voltage of FET 12 while suppressing it to be lower than the gate-source voltage of FET 11.

[0030] As will be described in detail later, a voltage is applied between the gate and source of FET 11 or 12 via resistor 21 provided between FET 11 and FET 12, so that the gate-source voltage of FET 11 or 12 can be increased while being suppressed. Note that resistor 21 may be a small resistive element with a resistance value of about 1 Ω, so even if such resistor 21 is added, the size of bidirectional switch 10 is unlikely to increase.

[0031] To realize the above function using the resistor 21 of the control circuit 20, for example, a comparator 22 and FETs 23 and 24 are used.

[0032] The comparator 22 has a positive input terminal connected to the input / output terminal t1 and a negative input terminal connected to the input / output terminal t2. This allows the comparator 22 to monitor the voltages at the input / output terminals t1 and t2, and outputs a High signal when the voltage at the input / output terminal t1 is greater than the voltage at the input / output terminal t2, and outputs a Low signal when the voltage at the input / output terminal t2 is greater than the voltage at the input / output terminal t1. For example, the voltage for operating the comparator 22 is supplied from a voltage generating source 30.

[0033] FET 23 is an example of a third FET. For example, FET 23 is an n-channel MOSFET. FET 24 is an example of a fourth FET. For example, FET 24 is a p-channel MOSFET. For example, FET 24 is a depletion-type p-channel MOSFET and serves as a normally-on switch, so it can be turned off by inputting a negative bias to the gate.

[0034] The FET 23 is connected between the negative output terminal of the voltage generating source 30 (specifically, the light receiving element 32) and the other end (lower side in FIG. 1) of the resistor 21. Specifically, the drain of the FET 23 is connected to the other end of the resistor 21, and the source of the FET 23 is connected to the negative output terminal of the light receiving element 32. In addition, the gate of the FET 23 is connected to the output terminal of the comparator 22.

[0035] The FET 24 is connected between the negative output terminal of the voltage generating source 30 (specifically, the light receiving element 32) and one end (upper side in FIG. 1) of the resistor 21. Specifically, the drain of the FET 24 is connected to one end of the resistor 21, and the source of the FET 24 is connected to the negative output terminal of the light receiving element 32. In addition, the gate of the FET 24 is connected to the output terminal of the comparator 22.

[0036] Here, the circuit state of the bidirectional switch 10 according to the voltage at the input / output terminal t1 and the voltage at the input / output terminal t2 will be described with reference to FIGS. 2A and 2B.

[0037] FIG. 2A is a diagram showing the circuit state of the bidirectional switch 10 when the voltage at the input / output terminal t1 is greater than the voltage at the input / output terminal t2.

[0038] FIG. 2B is a diagram showing the circuit state of the bidirectional switch 10 when the voltage at the input / output terminal t2 is greater than the voltage at the input / output terminal t1.

[0039] 1 and 2A, when the output of comparator 22 is a High signal, FET 23 is turned on, causing control circuit 20 to apply a voltage generated by voltage source 30 between the gate of FET 11 and the other end of resistor 21 (lower side in FIGS. 1 and 2A) and between the gate of FET 12 and the other end of resistor 21. As shown in FIGS. 1 and 2B, when the output of comparator 22 is a Low signal, FET 24 is turned on, causing control circuit 20 to apply a voltage generated by voltage source 30 between the gate of FET 11 and one end of resistor 21 (upper side in FIGS. 1 and 2B) and between the gate of FET 12 and one end of resistor 21.

[0040] As a result, FETs 23 and 24 can be automatically controlled in accordance with the magnitude relationship between the voltages at input / output terminals t1 and t2, specifically, the output of comparator 22 which monitors the voltages at input / output terminals t1 and t2, and thus a voltage can be automatically applied between the gate and source of FET 11 or 12 via resistor 21. Therefore, since control circuit 20 is equipped with comparator 22 and FETs 23 and 24, inrush current can be suppressed without software control.

[0041] Next, the principle by which the control circuit 20 can suppress the inrush current will be described with reference to FIG.

[0042] FIG. 3 is a diagram illustrating the ability to suppress inrush current. The "ON signal" graph in FIG. 3 represents a signal that connects input / output terminals t1 and t2 to each other. Specifically, it represents the voltage at input / output terminal t3 relative to input / output terminal t4. The "Vgs B" graph in FIG. 3 represents the gate-source voltage of FET 12, and the "Vgs A" graph represents the gate-source voltage of FET 11. The "output current" graph in FIG. 3 represents the current flowing between input / output terminals t1 and t2. The dashed line in the "output current" graph in FIG. 3 represents the current flowing between input / output terminals t1 and t2 when the resistance value of resistor 21 is 0 Ω (i.e., when resistor 21 is not provided). FIG. 3 illustrates the above parameters when the voltage at input / output terminal t1 is greater than the voltage at input / output terminal t2, i.e., when bidirectional switch 10 is in the circuit state shown in FIG. 2A.

[0043] When voltage source 30 receives a signal that connects input / output terminal t1 and input / output terminal t2, a voltage is applied to the gates of FETs 11 and 12, and current begins to flow from input / output terminal t1 to input / output terminal t2. This suppresses the gate-source voltage (Vgs A) of FET 11 due to the voltage drop across resistor 21. This increases the on-resistance of FET 11, suppressing the peak current flowing from input / output terminal t1 to input / output terminal t2—in other words, suppressing the inrush current. In contrast, when resistor 21 has a resistance of 0 Ω, the peak current is not suppressed, meaning the inrush current is not suppressed. For example, the peak current can be reduced to 1 / 10 or less compared to when resistor 21 has a resistance of 0 Ω.

[0044] The reason why the gate-source voltage of FET 11 rises after a certain time from the suppressed state is that the capacitor included in the load is charged, the difference between the input voltage (the voltage at input / output terminal t1 in the examples of Figures 2A and 3) and the output voltage (the voltage at input / output terminal t2 in the examples of Figures 2A and 3) becomes smaller, the current flowing through resistor 21 decreases, and the voltage drop across resistor 21 becomes smaller.

[0045] 3 has been described for the case where the voltage at input / output terminal t1 is greater than the voltage at input / output terminal t2, but the same can be said for the case where the voltage at input / output terminal t2 is greater than the voltage at input / output terminal t1. Specifically, when voltage generating source 30 receives a signal that connects input / output terminals t1 and t2, voltage is applied to the gates of FETs 11 and 12, and current begins to flow from input / output terminal t2 to input / output terminal t1. The gate-source voltage (Vgs B) of FET 12 is suppressed by the voltage drop across resistor 21. This increases the on-resistance of FET 12, suppressing the peak current of the current flowing from input / output terminal t2 to input / output terminal t1, i.e., suppressing inrush current.

[0046] As described above, when the input / output terminals t1 and t2 are electrically connected, the gate-source voltage of FET 11 or 12 is increased while being suppressed in accordance with the voltages at the input / output terminals t1 and t2. This increases the on-resistance of FET 11 or 12, whose gate-source voltage is increased while being suppressed, thereby suppressing inrush current. FETs 11 and 12 are components necessary for switching between blocking and passing current flowing between the input / output terminals t1 and t2. Since inrush current can be suppressed by controlling the components necessary for bidirectional switch 10, a separate inrush current suppression circuit including resistor elements with high resistance, high voltage resistance, and high power resistance is not required. Therefore, bidirectional switch 10 can suppress inrush current while minimizing increases in size.

[0047] (Other Embodiments) As described above, the embodiments have been described as examples of the technology according to the present disclosure. However, the technology according to the present disclosure is not limited to these, and can be applied to embodiments in which modifications, substitutions, additions, omissions, etc. are made as appropriate. For example, the following modifications are also included in one embodiment of the present disclosure.

[0048] For example, in the above embodiment, an example has been described in which control circuit 20 includes resistor 21, comparator 22, and FETs 23 and 24, but control circuit 20 does not have to include resistor 21, comparator 22, and FETs 23 and 24. For example, control circuit 20 may be realized by a processor such as a microcomputer, and the microcomputer may implement a function of monitoring the voltage at input / output terminal t1 and the voltage at input / output terminal t2, and a function of increasing the gate-source voltage of FET 11 while suppressing it below the gate-source voltage of FET 12, or a function of increasing the gate-source voltage of FET 12 while suppressing it below the gate-source voltage of FET 11.

[0049] For example, in the above embodiment, an example has been described in which the bidirectional switch 10 is provided with the voltage generating source 30, but the bidirectional switch 10 does not have to be provided with the voltage generating source 30, and the voltage generating source 30 does not have to be a component of the bidirectional switch 10.

[0050] For example, the present disclosure can be realized not only as the bidirectional switch 10 but also as a control method for the bidirectional switch 10 including steps (processing) performed by the components that make up the bidirectional switch 10 .

[0051] FIG. 4 is a flowchart showing an example of a control method according to another embodiment.

[0052] The control method is a control method for a bidirectional switch 10 provided between a first input / output terminal and a second input / output terminal, the bidirectional switch 10 comprising a first FET and a second FET, the drain of the first FET being connected to the first input / output terminal, the source of the first FET being connected to the source of the second FET, and the drain of the second FET being connected to the second input / output terminal, and the control method includes, as shown in FIG. 4 , a step of monitoring a voltage of the first input / output terminal and a voltage of the second input / output terminal (step S11), and when the bidirectional switch 10 acquires a signal that connects the first input / output terminal and the second input / output terminal to each other, and controlling the gate-source voltage of the second FET and the gate-source voltage of the second FET (steps S12 to S14). In the controlling step, when the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal (Yes in step S12), the gate-source voltage of the first FET is increased while being suppressed to be lower than the gate-source voltage of the second FET (step S13), and when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal (No in step S12), the gate-source voltage of the second FET is increased while being suppressed to be lower than the gate-source voltage of the first FET (step S14).

[0053] For example, the present disclosure can be realized as a program for causing a computer (processor) to execute steps included in the control method. Furthermore, the present disclosure can be realized as a non-transitory computer-readable recording medium, such as a CD-ROM, on which the program is recorded.

[0054] For example, when the present disclosure is realized as a program (software), each step is performed by running the program using hardware resources such as a computer's CPU, memory, input / output circuits, etc. In other words, each step is performed by the CPU acquiring data from memory or input / output circuits, etc., performing calculations, and outputting the calculation results to memory or input / output circuits, etc.

[0055] In the above embodiment, each component included in the bidirectional switch 10 may be configured with dedicated hardware, or may be realized by executing a software program suitable for each component. Each component may be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0056] Some or all of the functions of the bidirectional switch 10 according to the above embodiment are typically realized as an LSI, which is an integrated circuit. These functions may be individually integrated into single chips, or some or all of them may be integrated into a single chip. Furthermore, the integrated circuit is not limited to an LSI, and may be realized using a dedicated circuit or a general-purpose processor. It is also possible to use an FPGA (Field Programmable Gate Array), which can be programmed after LSI manufacturing, or a reconfigurable processor, which can reconfigure the connections and settings of circuit cells within an LSI.

[0057] Furthermore, if an integrated circuit technology that can replace LSI emerges due to advances in semiconductor technology or other derivative technologies, it is natural that each component included in the bidirectional switch 10 can be integrated into an integrated circuit using that technology.

[0058] In addition, this disclosure also includes forms obtained by making various modifications to the embodiments that a person skilled in the art would think of, and forms realized by arbitrarily combining the components and functions in each embodiment within the scope of the present disclosure.

[0059] (Additional Notes) The above description of the embodiments discloses the following techniques.

[0060] (Technology 1) A bidirectional switch provided between a first input / output terminal and a second input / output terminal, the bidirectional switch comprising: a first FET, a second FET, and a control circuit that controls the first FET and the second FET, wherein the drain of the first FET is connected to the first input / output terminal, the source of the first FET is connected to the source of the second FET, and the drain of the second FET is connected to the second input / output terminal, the control circuit monitors the voltage of the first input / output terminal and the voltage of the second input / output terminal, and when the bidirectional switch acquires a signal that establishes conduction between the first input / output terminal and the second input / output terminal, if the voltage of the first input / output terminal is higher than the voltage of the second input / output terminal, the control circuit increases the gate-source voltage of the first FET while suppressing it to be lower than the gate-source voltage of the second FET, and if the voltage of the second input / output terminal is higher than the voltage of the first input / output terminal, the control circuit increases the gate-source voltage of the second FET while suppressing it to be lower than the gate-source voltage of the first FET.

[0061] According to this, when the first input / output terminal and the second input / output terminal are brought into conduction, the gate-source voltage of the first FET or the second FET is increased while being suppressed in accordance with the voltage of the first input / output terminal and the voltage of the second input / output terminal. Therefore, the on-resistance of the first FET or the second FET, whose gate-source voltage is increased while being suppressed, increases, thereby suppressing inrush current. The first FET and the second FET are components necessary for switching between blocking and passing current flowing between the first input / output terminal and the second input / output terminal. Since the inrush current can be suppressed by controlling the components necessary for such a bidirectional switch, a separate inrush current suppression circuit including a resistive element with a high resistance value, high voltage resistance, and high power resistance is not required. Therefore, the bidirectional switch of the present disclosure can suppress inrush current while suppressing an increase in size.

[0062] (Technology 2) The bidirectional switch according to Technology 1, wherein the control circuit includes a resistor having one end connected to the source of the first FET and the other end connected to the source of the second FET; when the bidirectional switch acquires a signal causing conduction between the first input / output terminal and the second input / output terminal, if the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, a voltage is applied between the gate of the first FET and the other end of the resistor, and between the gate of the second FET and the other end of the resistor, thereby increasing the gate-source voltage of the first FET while suppressing it to be lower than the gate-source voltage of the second FET; and when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal, a voltage is applied between the gate of the first FET and one end of the resistor, and between the gate of the second FET and one end of the resistor, thereby increasing the gate-source voltage of the second FET while suppressing it to be lower than the gate-source voltage of the first FET.

[0063] According to this, a voltage is applied between the gate and source of the first FET or the second FET via a resistor provided between the first and second FETs, so that the gate-source voltage of the first FET or the second FET can be increased while being suppressed. Note that the resistor can be a small resistive element with a resistance value of about 1 Ω, so even if such a resistor is added, the size of the bidirectional switch is unlikely to increase.

[0064] (Technology 3) The present invention further includes a voltage generation source having a positive output terminal connected to a gate of the first FET and a gate of the second FET, and generating a voltage to be applied to the gate of the first FET and the gate of the second FET when a signal for bringing the first input / output terminal and the second input / output terminal into conduction is received, the control circuit including a comparator having a positive input terminal connected to the first input / output terminal and a negative input terminal connected to the second input / output terminal, a third FET connected between the negative output terminal of the voltage generation source and the other end of the resistor, and a fourth FET connected between the negative output terminal of the voltage generation source and one end of the resistor, the comparator monitoring the voltage at the first input / output terminal and the voltage at the second input / output terminal, a second FET connected to the first input / output terminal and connected to the second input / output terminal; a third FET connected to the second input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a third FET connected to the first input / output terminal and connected to the second input / output terminal; a fourth FET connected to the first input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a fourth FET connected to the first input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a fourth FET connected to the first input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a second FET connected to the second input / output terminal and connected to the second input / output terminal; a third FET connected to the first input / output terminal and connected to the second input / output terminal; a fourth FET connected to the second input / output terminal and connected to the second input / output terminal; a fourth ...

[0065] According to this, the third FET and the fourth FET can be automatically controlled according to the magnitude relationship between the voltages of the first input / output terminal and the second input / output terminal, specifically, the output of the comparator that monitors the voltages of the first input / output terminal and the second input / output terminal, and consequently, a voltage can be automatically applied between the gate and source of the first FET or the second FET via the resistor. Therefore, since the control circuit includes the comparator, the third FET, and the fourth FET, it is possible to suppress inrush current without software control.

[0066] (Technology 4) The bidirectional switch according to Technology 3, wherein the voltage generation source has a light-emitting element and a light-receiving element, and when a signal that connects the first input / output terminal and the second input / output terminal is acquired, the voltage generation source causes the light-emitting element to emit light and causes the light-receiving element to receive light from the light-emitting element, thereby generating a voltage to be applied to the gate of the first FET and the gate of the second FET.

[0067] In this way, a light emitting element and a light receiving element may be used to control the conduction and non-conduction of the two-way switch.

[0068] (Technology 5) A control method for a bidirectional switch provided between a first input / output terminal and a second input / output terminal, the bidirectional switch comprising a first FET and a second FET, the drain of the first FET being connected to the first input / output terminal, the source of the first FET being connected to the source of the second FET, and the drain of the second FET being connected to the second input / output terminal, the control method including the steps of monitoring a voltage at the first input / output terminal and a voltage at the second input / output terminal, and controlling a gate-source voltage of the first FET and a gate-source voltage of the second FET when the bidirectional switch acquires a signal that establishes conduction between the first input / output terminal and the second input / output terminal, in which, in the controlling step, when the voltage at the first input / output terminal is higher than the voltage at the second input / output terminal, the gate-source voltage of the first FET is increased while being suppressed to be lower than the gate-source voltage of the second FET, and when the voltage at the second input / output terminal is higher than the voltage at the first input / output terminal, the gate-source voltage of the second FET is increased while being suppressed to be lower than the gate-source voltage of the first FET.

[0069] This makes it possible to provide a control method that can suppress inrush current while suppressing an increase in size.

[0070] The present disclosure can be applied to a bidirectional switch that switches between blocking and passing AC or DC current.

[0071] 10 Bidirectional switch 11, 12, 23, 24 FET 20 Control circuit 21 Resistor 22 Comparator 30 Voltage generating source 31 Light emitting element 32 Light receiving element t1, t2, t3, t4 Input / output terminal

Claims

1. A bidirectional switch provided between a first input / output terminal and a second input / output terminal, comprising: a first FET; a second FET; and a control circuit for controlling the first FET and the second FET, wherein the drain of the first FET is connected to the first input / output terminal, the source of the first FET is connected to the source of the second FET, and the drain of the second FET is connected to the second input / output terminal, the control circuit monitors a voltage of the first input / output terminal and a voltage of the second input / output terminal, and when the bidirectional switch acquires a signal for establishing conduction between the first input / output terminal and the second input / output terminal, when the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, the control circuit increases the gate-source voltage of the first FET while suppressing it to be lower than the gate-source voltage of the second FET, and when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal, the control circuit increases the gate-source voltage of the second FET while suppressing it to be lower than the gate-source voltage of the first FET.

2. The bidirectional switch according to claim 1, wherein the control circuit includes a resistor having one end connected to the source of the first FET and the other end connected to the source of the second FET, and when the bidirectional switch receives a signal for establishing electrical continuity between the first input / output terminal and the second input / output terminal, when the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, a voltage is applied between the gate of the first FET and the other end of the resistor, and between the gate of the second FET and the other end of the resistor, thereby raising the gate-source voltage of the first FET while suppressing it to be lower than the gate-source voltage of the second FET, and when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal, a voltage is applied between the gate of the first FET and one end of the resistor, and between the gate of the second FET and one end of the resistor, thereby raising the gate-source voltage of the second FET while suppressing it to be lower than the gate-source voltage of the first FET.

3. The control circuit further comprises a voltage generation source having a positive output terminal connected to a gate of the first FET and a gate of the second FET, for generating a voltage to be applied to the gate of the first FET and the gate of the second FET when a signal for establishing conduction between the first input / output terminal and the second input / output terminal is acquired; the control circuit comprises: a comparator having a positive input terminal connected to the first input / output terminal and a negative input terminal connected to the second input / output terminal; a third FET connected between the negative output terminal of the voltage generation source and the other end of the resistor; and a fourth FET connected between the negative output terminal of the voltage generation source and one end of the resistor; the comparator monitors the voltage of the first input / output terminal and the voltage of the second input / output terminal, and outputs a High signal when the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, and outputs a Low signal when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal; 3. The bidirectional switch according to claim 2, wherein when the output of the comparator is a High signal, the third FET is brought into a conductive state, causing the control circuit to apply the voltage generated by the voltage generation source between the gate of the first FET and the other end of the resistor, and between the gate of the second FET and the other end of the resistor; and when the output of the comparator is a Low signal, the fourth FET is brought into a conductive state, causing the control circuit to apply the voltage generated by the voltage generation source between the gate of the first FET and one end of the resistor, and between the gate of the second FET and one end of the resistor.

4. The bidirectional switch according to claim 3, wherein the voltage generation source has a light-emitting element and a light-receiving element, and when a signal for connecting the first input / output terminal and the second input / output terminal is acquired, the voltage generation source causes the light-emitting element to emit light and the light-receiving element to receive light from the light-emitting element, thereby generating a voltage to be applied to the gate of the first FET and the gate of the second FET.

5. A method for controlling a bidirectional switch provided between a first input / output terminal and a second input / output terminal, the bidirectional switch comprising: a first FET; and a second FET, the drain of the first FET being connected to the first input / output terminal, the source of the first FET being connected to the source of the second FET, and the drain of the second FET being connected to the second input / output terminal, the control method including the steps of: monitoring a voltage of the first input / output terminal and a voltage of the second input / output terminal; and controlling a gate-source voltage of the first FET and a gate-source voltage of the second FET when the bidirectional switch acquires a signal for connecting the first input / output terminal and the second input / output terminal, the step of controlling includes: when the voltage of the first input / output terminal is greater than the voltage of the second input / output terminal, raising the gate-source voltage of the first FET while suppressing it to be lower than the gate-source voltage of the second FET; and when the voltage of the second input / output terminal is greater than the voltage of the first input / output terminal, raising the gate-source voltage of the second FET while suppressing it to be lower than the gate-source voltage of the first FET. Control methods.

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