DC circuit breaker, DC circuit breaker device, and free-standing circuit breaker device

Abstract

Provided is a DC circuit breaker in which a zero current generating means is eliminated and which performs arc-free opening of a mechanical switch when a DC current is cut off. A hybrid breaking unit 110 includes a mechanical contact switch 12 and a semiconductor switch connector 14 connected in parallel to each other, and is configured to satisfy formula 1.　(Formula 1) Vath > ILHBURTON ... ,where Vath is the arc start voltage of the mechanical contact switch 12. ILHBU is the rated cutoff current of the hybrid breaking unit 110. RTON is the combined resistance when all semiconductor switches of the semiconductor switch connector 14 are on.

Description

DC circuit breakers, DC circuit breaking devices and independent circuit breaking devices

[0001] The present invention relates to a DC circuit breaker, a DC circuit breaking device, and an independent circuit breaking device used in high-voltage and extra-high-voltage power systems and the like.

[0002] In recent years, with the spread of renewable energy sources such as wind power, photovoltaic power, and solar thermal power generation, and the rapid advances in semiconductor power electronics, there has been growing momentum toward the transmission and distribution of DC power, and the development of related technologies is actively underway.

[0003] In an electric power system that controls power transmission and distribution, when a serious fault such as a ground fault or short circuit occurs in a transmission / distribution line, measures are immediately taken to prevent the fault from spreading to healthy systems by quickly disconnecting the connection (current) of the transmission / distribution line connected to the fault point. The device that performs this high-speed disconnection is the circuit breaker that is the subject of this invention.

[0004] AC current has the characteristic of crossing zero every half cycle. In 50 Hz or 60 Hz AC power systems, this characteristic can be utilized to automatically stop the arc discharge (a type of energized state) that occurs when the contacts are opened within a few half cycles using a mechanical contact breaker, thereby interrupting the AC current. However, in DC power systems, where current always flows in one direction, it is theoretically difficult for a mechanical contact breaker to quickly interrupt DC current.

[0005] In this specification, the term "high speed" is used as a modifier to refer to a DC circuit breaker that has the ability to complete a breaking operation in 10 ms or less, which corresponds to half a cycle of the commercial frequency (e.g., 50 Hz), in other words, a DC circuit breaker that can break at a breaking speed equal to or faster than that of an AC circuit breaker.

[0006] In order to overcome the difficulties of the mechanical contact type DC circuit breaker, a hybrid DC circuit breaker (h-DCCB) was devised, which combines a mechanical contact switch (MSW) and a self-arc-suppressing power semiconductor switch (hereinafter simply abbreviated as "semiconductor SW"), as shown in Figures 1A to 1C (see, for example, Patent Document 1). In this specification, "mechanical switch" refers to a mechanical contact switch, and "MSW" is also used as an abbreviation for "mechanical switch."

[0007] 1A to 1C are configuration diagrams of conventional DC circuit breakers 300a, 300b, and 300c each equipped with a zero current generating means 305. The DC circuit breakers 300a, 300b, and 300c each have the zero current generating means 305 at a different position.

[0008] Each of these conventional DC circuit breakers 300a-300c comprises one high-speed MSW 302 placed in a steady-state current path 301, a semiconductor SW (single or multiple series-connected semiconductor SWs) 304 placed in a detour / break current path 303 connected in parallel with the steady-state current path 301, and a zero current generating means 305 disposed in the steady-state current path 301 and / or the detour / break current path 303.

[0009] When DC circuit breakers 300a-300c receive a tripping command from the power grid due to a ground fault or the like, they first switch semiconductor switch 304 of bypass / break current path 303 from off (open) to on (closed), and activate zero current generating means 305. When zero current generating means 305 has sufficiently actuated and the load current (= transmission / distribution current) of steady-state current path 301 becomes zero or nearly zero, high-speed MSW 302 is switched from on to off, commutating the load current from steady-state current path 301 to bypass / break current path 303, and the operation of zero current generating means 305 is stopped. Finally, semiconductor switch 304 is turned off to break the load current flowing through bypass / break current path 303. In this way, the tripping operation of DC circuit breaker 300 is completed.

[0010] U.S. Patent No. 8,717,716

[0011] However, in such conventional high-voltage and extra-high-voltage h-DCCBs, the high-speed MSW must have a moving contact that moves a long contact distance at extremely high speed (i.e., in a short time) to establish a rated withstand voltage set to a value equal to or greater than the transmission / distribution voltage when opening the contacts (switching from on to off) in response to a disconnection command. Such high-speed MSWs have the following problems compared to typical electromagnetic relays: a) they are large, b) they are expensive, c) they require long manufacturing times, and d) they have high running costs. These problems become more pronounced and more serious as the voltage increases.

[0012] Furthermore, in conventional high voltage and extra-high voltage h-DCCBs, the installation and operation of a zero current generating means was essential, which resulted in the following problems: e) the volume and weight of the zero current generating means increased, f) the interruption process became complicated and difficult to control, g) the manufacturing costs increased due to the use of power semiconductors and large capacity passive components, and h) in some cases, loss of time during interruption occurred.

[0013] An object of the present invention is to provide a DC circuit breaker, a DC circuit breaking device, and an independent circuit breaking device that, when interrupting DC current, can open a mechanical switch substantially without arc discharge while omitting a zero current generating means.

[0014] The DC circuit breaker of the present invention comprises: a mechanical switch; and a semiconductor switch unit having one or a plurality of first self-extinguishing semiconductor switches connected in parallel to the mechanical switch and controlling current flow and current interruption in a first direction from one end to the other end, the first self-extinguishing semiconductor switches being connected in series or parallel to each other; ａｔｈ > I ＬＨＢＵ R ＴＯＮ ...(Equation 1) is set. However, V ａｔｈ is the arc inception voltage of the mechanical switch. ＬＨＢＵis the rated breaking current set as the upper limit of the breaking current of the DC circuit breaker. ＴＯＮ is the combined resistance of the semiconductor switch unit when all the first self-extinguishing semiconductor switches in the semiconductor switch unit are on.

[0015] The DC circuit breaking device and the independent circuit breaking device of the present invention include one or more of the above DC circuit breakers.

[0016] According to the present invention, by configuring a DC circuit breaker to satisfy (Equation 1), it is possible to omit the zero current generating means and reduce the arc discharge time of the mechanical switch to essentially zero when interrupting DC current, i.e., to open the mechanical switch without arc discharge.

[0017] 2 is a configuration diagram of a first conventional DC circuit breaker equipped with zero current generating means. FIG. 3 is a configuration diagram of a second conventional DC circuit breaker equipped with zero current generating means. FIG. 4 is a configuration diagram of a third conventional DC circuit breaker equipped with zero current generating means. FIG. 5 is a configuration diagram of an HBU (high voltage h-DCCB (hybrid DC circuit breaker)) which is an embodiment of a DC circuit breaker. FIG. 6 is a configuration diagram of a connection body formed by connecting the self-arc-extinguishing type power semiconductors SW of FIG. 2 in series. FIG. 7 is a configuration diagram of a connection body formed by connecting the self-arc-extinguishing type power semiconductors SW of FIG. 2 in parallel. FIG. 8 is a configuration diagram of a connection body formed by connecting the self-arc-extinguishing type power semiconductors SW of FIG. 2 in series-parallel. FIG. 9 is a configuration diagram of a bidirectional HBU. FIG. 10 is a configuration diagram of an h-DCCB of the first embodiment. FIG. 11 is a configuration diagram of an h-DCCB of the second embodiment. FIG. 12 is a configuration diagram of an h-DCCB of the third embodiment. FIG. 13 is a configuration diagram of a series-type h-DCCB of the fourth embodiment. FIG. 14 is a configuration diagram of a series-parallel type h-DCCB of the fourth embodiment. 1 is a configuration diagram of a voltage balancer used in an h-DCCB of a fourth embodiment. FIG. 2 is a configuration diagram of an h-DCCB of a fifth embodiment in which an energy absorber is equipped in a first mode. FIG. 3 is a configuration diagram of an h-DCCB of a fifth embodiment in which an energy absorber is equipped in a second mode. FIG. 4 is a configuration diagram of an h-DCCB of a fifth embodiment in which an energy absorber is equipped in a third mode. FIG. 5 is a configuration diagram of an h-DCCB of a sixth embodiment. FIG. 6 is a configuration diagram of an h-DCCB of a seventh embodiment. FIG. 7 is a configuration diagram of a test device used in a test from which the inventors obtained their findings. FIG. 8 is a graph showing the relationship between the elapsed time and the voltage across the MSW in a DC interruption test with the test device. FIG. 9 is a scatter diagram of the relationship between the load current in a pseudo HBU in the test device and the arc inception voltage of the MSW. FIG. 10 is a diagram showing the resistance value R of the resistance of the bypass / interrupting current path in a pseudo HBU in the test device. ＣＯＭ and the arc starting voltage V of MSW ａｔｓ The scatter plot of the relationship between the I Ｌ R ＣＯＭ 10 is a scatter diagram of the relationship between the resistance value R of the bypass / break current path in the pseudo HBU in the test device and the arc discharge time Tb. ｃｏｍ and the load current I Ｌ This is a scatter plot of the relationship between

[0018] Hereinafter, embodiments of the present invention will be described. However, the embodiments disclosed herein are merely examples and do not limit the scope of the present invention. The present invention can be embodied in various other forms, and substitutions, modifications, and various omissions can be made without departing from the spirit of the present invention.

[0019] Hereinafter, components common to multiple embodiments will be designated by the same reference numerals throughout the drawings, and the reference numerals may be omitted to simplify the description.

[0020] The voltage classifications used in this specification, such as "high voltage" and "extra high voltage," conform to Japan's "Ministry Ordinance on Technical Standards for Electrical Equipment." These are shown in Table 1 below.

[0021]

[0022] First, the inventors will explain the findings that form the basis of the present invention. The inventors discovered that in a DC circuit breaker, if the mechanical switch is opened while satisfying the conditions of the above-mentioned (Equation 1), the arc discharge time of the mechanical switch becomes substantially zero, that is, the mechanical switch can be opened without arc discharge (arc-free). For the sake of convenience, the above-mentioned (Equation 1) will be described again. ａｔｈ > I ＬＨＢＵ R ＴＯＮ ...(Formula 1)

[0023] However, V ａｔｈ is the arc inception voltage of the mechanical switch. ＬＨＢＵ is the rated breaking current, which is set as the upper limit of the breaking current of a DC circuit breaker. The upper limit of the breaking current of a DC circuit breaker is determined according to the product specifications.

[0024] A unidirectional DC circuit breaker has a first self-arc-extinguishing semiconductor switch that controls current flow and current interruption in one direction in the semiconductor switch section. In contrast, a bidirectional DC circuit breaker has, in addition to the first self-arc-extinguishing semiconductor switch, a second self-arc-extinguishing semiconductor switch that controls current flow and current interruption in the other direction opposite to the one direction. ＴＯＮ ​In a unidirectional DC circuit breaker, R is the combined resistance of the semiconductor switch unit when all of the first self-extinguishing semiconductor switches that control unidirectional current flow and current cutoff in the semiconductor switch unit are on.

[0025] R ＴＯＮ In a bidirectional DC circuit breaker, R is the combined resistance of the semiconductor switch section when both the first self-arc-suppressing semiconductor switch and the second self-arc-suppressing semiconductor switch are on. However, there are cases where the first self-arc-suppressing semiconductor switch and the second self-arc-suppressing semiconductor switch are bipolar semiconductors. In this case, there is a rectifying element (e.g., a freewheeling diode) connected in anti-parallel with its forward direction reversed to that of each self-arc-suppressing semiconductor switch (anti-parallel connection: a parallel connection in which the forward direction is reverse to that of the corresponding semiconductor SW). Therefore, R in this case ＴＯＮ is defined as the combined resistance of the semiconductor switch section when one of the first self-arc-suppressing semiconductor switches and the other of the second self-arc-suppressing semiconductor switches are all on and all off, respectively, and the rectifying elements connected in anti-parallel to the other switch that is off are all conducting in the forward direction.

[0026] (Equation 1) is V ａｔｈ The smaller the R ＴＯＮ It should be noted that when the semiconductor switch unit is made up of one self-extinguishing semiconductor switch, the combined resistance of the semiconductor switch unit is the resistance of only that one self-extinguishing semiconductor switch.

[0027] Here, the process of obtaining the condition of (Equation 1) will be briefly explained. In order to search for a method for arc-free opening of an MSW under high voltage, the inventors used a resistor (resistance value R ｃｏｍ ) and various industrial MSWs connected in parallel, a pseudo HBU was used to simulate a load current of 120 A or less on an experimental transmission line equipped with a high voltage source of DC 1500 V or less. ＬWhile conducting repeated basic experiments to break the current, we discovered the facts (1) to (5) below, which form the basis of our current findings. A series dual contactor (rated load voltage between contacts: DC 1000V, rated load current: DC 250A) was used as the specimen. The test results will be explained below.

[0028] 12 is a diagram showing the configuration of a test device 230 used by the inventors to test their findings. 13 to 17 are graphs showing the test results of various tests conducted using the test device 230.

[0029] In FIG. 12, a DC power supply 232 and a bank capacitor 234 are connected in parallel with each other. A MOSFET 236 (Q ＢＣ ) is connected at one end to a DC power supply 232, and at the other end to a pseudo HBU (HBU: hybrid interrupt base unit) 240 via a current limiting resistor 238 for current limiting. The pseudo HBU 240 is configured by a parallel connection of an MSW (mechanical switch) 242 and a resistor (resistor likened to a semiconductor SW connection body) 244 provided in the bypass / interrupt current path.

[0030] The MOSFET controller 250 and the MSW controller 252 output the gate voltage of the MOSFET 236 and the excitation current of the coil of the MSW 242 with a predetermined pulse width based on the input from the function generator 248 (FG), thereby switching the MOSFET 236 and the MSW 242 on and off with a predetermined timing.

[0031] The definitions of the symbols in FIG. 12 are as follows: Ｌ : Load current flowing through the pseudo HBU 240, V ＲＬ : voltage across current limiting resistor 238, V ＭＳＷ : voltage across the pseudo HBU 240, R Ｌ : resistance value of current limiting resistor 238, R ＣＯＭ : resistance value of resistor 244, E Ｏ : voltage of DC power supply 232, C ＢＣ : The capacitance of the bank capacitor 234.

[0032] Resistance value R of current limiting resistor 238 L and the resistance value R of the resistor 244 ＣＯＭ , voltage E０ By changing the Ｌ and R ＣＯＭ , E ０ It can be simulated by a combination of

[0033] Fact (1): Arc discharge inception voltage V ａｔｈ is known to be an inherent characteristic of MSW, determined by the structure, mechanism, atmospheric gas, contact material, etc. of the MSW, but can be obtained relatively easily using a simple experimental system such as the test device 230 in FIG.

[0034] FIG. 13 shows the relationship between the elapsed time and the voltage across the MSW 242 (=the voltage across the pseudo HBU 240) V in a DC interruption test in which the MSW 242 of the pseudo HBU 240 is switched from on to off. ＭＳＷ This is an oscilloscope waveform showing the relationship between V and the moment the contacts of MSW242 are opened. ＭＳＷ The trigger was set to operate at the jump of V (i.e., the start of arc discharge) and recorded. The time from the time when the MSW controller 252 sent an ON signal to the excitation coil of the MSW 242 to start excitation to the time when the MSW 242 actually opened (V ａｔｈ It is not possible to accurately predict the time (opening time or release time) until the moment when the ON signal appears. This is because the opening of the MSW 242 is a stochastic phenomenon. It is difficult to precisely control the opening time (release time) by controlling the sending time of the ON signal.

[0035] In order to observe such a phenomenon that occurs stochastically and ambiguously with an oscilloscope, ＭＳＷ The waveform is acquired using the trigger recording function mentioned above. This function stops data storage when the voltage exceeds a predetermined set voltage. The waveform in Figure 13 is ＭＳＷ The data was acquired by setting the oscilloscope to trigger when the voltage exceeded 10V.

[0036] In FIG. ａｔｈ is the arc discharge inception voltage, V ａis the arc discharge voltage at each time point. In the pseudo HBU 240, the current flows only through the MSW 242 during the steady-state energization period, flows through both the MSW 242 and the resistor 244 during the arc discharge period, and flows only through the resistor 244 during the complete commutation period after the arc is extinguished.

[0037] V on the vertical axis of FIG. ＭＳＷ In the test device 230 of FIG. Ｏ = 1000V, I Ｌ Assume an experiment in which a current of 100 A is commutated to resistor 244. At this time, I Ｌ To make the current limiting resistor 238 100 A, Ｌ = 1000 V / 100 A = 10 Ω. The resistance value R of the resistor 244 ＣＯＭ As can be seen from FIG. 15 described later, the resistance is in the range of 0.1 to several Ω in the test.

[0038] On the other hand, during the period of complete commutation in FIG. 13, the MSW 242 is turned off, so the load of the test device 230 is the series connection of the current limiting resistor 238 and the resistor 244, and all the current flows through the resistor 244. In the case of FIG. ＣＯＭ = 0.9Ω, V ＭＳＷ = 100A x 0.9Ω = 90V, and the V on the vertical axis of FIG. ＭＳＷ It is consistent with the scale.

[0039] In the test device 230, various I Ｌ and R ＣＯＭ The opening / commutation test of the pseudo HBU 240 was carried out with the combination of the above. Ｌ and the arc starting voltage V of MSW242 ａｔｈ 15 is a scatter diagram of the relationship between the resistance value R of the resistor 244 of the bypass / break current path of the pseudo HBU 240. ＣＯＭ and the arc starting voltage V of MSW ａｔｈ 16 is a scatter diagram of the relationship between the I Ｌ R ＣＯＭ and arc discharge time T ｂ 17 is a scatter diagram of the relationship between the resistance value R ＣＯＭ and the load current IＬ This is a scatter plot of the relationship between

[0040] V ａｔｈ Since it fluctuates, the same combination (I Ｌ , V ＣＯＭ ) always have the same V ａｔｈ However, as can be seen from FIGS. 14 and 15, the fluctuation range is approximately V ａｔｈ．ｍｉｎ (=14V) ~ V ａｔｈ．ｍａｘ (=20V).

[0041] Fact (2): When opening the contacts, the arc discharge that occurs at the MSW contacts of the MSW 242 is generated by the MSW voltage (V ＭＳＷ ) As can be seen from the transition, V ａｔｈ The arc voltage V ａ The arc voltage V increases rapidly, and eventually the arc is extinguished and the current is completely commutated to the resistor 244 (the bypass / breaking current path). ａ The reason why V steps up so sharply is because the MSW242 used in the test is a specimen with a two-contact structure in series. ａｔｈ The value of fluctuates, but as shown in Figures 14 and 15, it is within a certain narrow range (V ａｔｈ．ｍａｘ ~V ａｔｈ。ｍｉｎ ) from the above. In other words, according to FIGS. 14 and 15, the plotted points are within the V ａｔｈ While remaining within a narrow range of I on the horizontal axis, Ｌ and R ｃｏｍ Because it is distributed over a wide range of ａｔｈ is I Ｌ (Fig. 14) ｃｏｍ (Fig. 15)

[0042] Fact (3): According to Figure 16, I Ｌ and R ｃｏｍ The product of (I Ｌ R ｃｏｍ ) is decreased, the arc discharge time T ｂ is reduced, and the contacts are essentially arc-free. If the resistance is further reduced, the contacts are completely arc-free. ｃｏｍIn FIG. 16, the actual arc-free parting occurs when 10 μs<T ｂ ≦100 μs, completely arc-free contact opening is T ｂ It is defined as ≦10 μs.

[0043] Fact (4): According to Figure 17, near the arc commutation / arc-free commutation transition boundary, V ａｔｈ and R and I Ｌ Between them, V ａｔｈ = I Ｌ R ｃｏｍ , the following relationship is established.

[0044] Fact (5): According to Figure 17, condition V ａｔｈ。ｍｉｎ > I Ｌ R ｃｏｍ When the above condition is satisfied, complete arc-free opening (commutation) is realized. ａｔｈ。ｍａｘ > I Ｌ R ｃｏｍ When this is satisfied, at least substantially arc-free opening (commutation) is achieved. Ｌ I ＬＭＡＸ , code R ｃｏｍ R ＴＯＮ The above formula (1) is rewritten as: V ａｔｈ As V ａｔｈ。ｍｉｎ You can also choose V ａｔｈ。ｍａｘ You can also choose V ａｔｈ。ｍｉｎ and V ａｔｈ。ｍａｘ Intermediate values, for example, V ａｔｈ It is also possible to select the average value of the above. The test in Fig. 17 was conducted using the same specimens, but was carried out independently from the tests in Figs. 13 to 16.

[0045] (HBU) The h-DCCB (Figure 2), an embodiment of the basic element of the present invention, is a special h-DCCB that can perform high-speed interruption in the high-voltage range of 750V to approximately 1500V. High-voltage and extra-high-voltage h-DCCBs that perform high-speed interruption in higher high-voltage and extra-high-voltage ranges are constructed by connecting multiple h-DCCBs for this high-voltage range as one unit (basic element). In order to emphasize that the basic element h-DCCB is the basic unit for assembling h-DCCBs for higher high-voltage and extra-high-voltage ranges described below, the basic element h-DCCB will be referred to as a hybrid interruption base unit (hereinafter, HBU) in this specification.

[0046] In contrast to an HBU, an h-DCCB, such as an h-DCCB for high voltage and extra-high voltage ranges that is an assembly of one or more HBUs, is simply called an h-DCCB. Because an h-DCCB is made up of one or more HBUs, a single HBU is also an h-DCCB. To distinguish between an HBU and an h-DCCB, the former will be referred to as a DC circuit breaker and the latter as a DC circuit breaker, as appropriate. Because a DC circuit breaker is made up of one or more DC circuit breakers, a single DC circuit breaker is also a DC circuit breaker.

[0047] (DC Circuit Breaker / Embodiment) <Configuration> Fig. 2 shows the configuration of an HBU 110, which is an embodiment of a DC circuit breaker. The HBU 110 is also a high-voltage h-DCCB, and is a DC circuit breaker placed on a transmission / distribution line 2. The HBU 110 is configured by connecting in parallel one high-speed, high-voltage MSW 12 placed on a steady-state current path 11 and a semiconductor SW connection body 14 of a self-arc-suppressing semiconductor SW 17 placed on a bypass / breaking current path 13.

[0048] However, in this specification, the semiconductor SW 17 may be a single unit (only one unit) and is also referred to as a "semiconductor SW connection unit." All of the semiconductor SW connections 14 of the semiconductor SW connection unit SW 17 are simultaneously controlled to be on / off. Furthermore, "simultaneous on / off control" is used to mean both simultaneous control of switching from on to off and simultaneous control of switching from off to on.

[0049] An example of a high-speed opening MSW12 is the Omron make-contact type DC power relay: Model G9EC-1-B-X1 (weight 650 g, volume 375 cm ３ , rated load voltage between contacts DC 1000V, rated load current DC 100A, release time 4ms or less). On the other hand, an example of a semiconductor SW is ROHM's SiC-MOSFET: Model S4103 (drain-source breakdown voltage 1200V, rated pulse current 237A, on-resistance 22mΩ).

[0050] The MSW drive circuit 15 drives the MSW 12. The MSW drive circuit 15 is insulated and isolated from the load current circuit and other drive circuits. The gate drive circuit assembly 16 is configured as a collection of insulating isolation gate drive circuits 18 that independently drive the gates of the semiconductor SWs 17 included in the semiconductor SW connection body 14. In the gate drive circuit assembly 16, each insulating isolation gate drive circuit 18 is insulated and isolated from the other insulating isolation gate drive circuits 18, the load current circuit, and the MSW drive circuit 15.

[0051] The SW controller 19 is composed of an on / off signal generator 25 and an on / off signal distributor 26. When the on / off signal generator 25 receives a trip command 27 from outside (for example, a facility-side trip control device), it generates on / off signals for the MSW 12 and the semiconductor SW connection body 14 in time series according to a predetermined algorithm and sends them to the on / off signal distributor 26. The on / off signal distributor 26 distributes and sends these on / off signals to the MSW drive circuit 15 and each gate drive circuit in the gate drive circuit assembly 16.

[0052] The MSW 12 has the following specifications: a rated contact breakdown voltage in the range of at least 750 V DC to 1500 V DC, a rated current of at least 50 A DC, and a contact opening speed of at least 10 ms (the time from when the MSW receives a contact opening signal to when the contacts separate and move to a position that provides the specified contact rated breakdown voltage). Small, industrial, high-voltage, high-speed MSWs that meet these specifications have recently been mass-produced and are available at relatively low cost. In this specification, an MSW with a contact opening speed of 10 ms or less is referred to as a high-speed MSW.

[0053] The semiconductor SW connection body 14 is a connection body configured by connecting self-arc-suppressing semiconductor SW 17 (shown by the symbol of MOSFET in FIG. 2) with uniform characteristics in (a) series (FIG. 3A), (b) parallel (FIG. 3B), or (c) series-parallel (FIG. 3C) so that the forward direction coincides with the direction of the transmission / distribution current. The number p of series of the semiconductor SW connection body 14 is determined by the drain-source rated voltage V of the semiconductor SW connection body 14. Ｂ The total p・V Ｂ is determined so as to match the rated withstand voltage between contacts of the MSW 12. On the other hand, the number q of parallel connections of the semiconductor SW connection body 14 is determined so as to match the pulse rated drain current I ＤＰ The sum of q・I ＤＰ is determined to match the current carrying rating of the MSW 12.

[0054] 4 is a configuration diagram of a bidirectional HBU 120 corresponding to the unidirectional HBU 110 of FIG. 2. In the HBU 120, the semiconductor SW connection body 14 is configured as a connection body in which a unidirectional semiconductor SW connection body 14a including a semiconductor SW 17a that is turned on / off to switch current flow in a first direction (in FIG. 4, the direction of the rightward arrow shown at both ends of the power transmission / distribution line 2) and a other-directional semiconductor SW connection body 14b including a semiconductor SW 17b that is turned on / off to switch current flow in a second direction opposite to the first direction (in FIG. 4, the direction of the leftward arrow shown at both ends of the power transmission / distribution line 2) are connected in series. Insulated isolation gate drive circuits 18a and 18b generate gate voltages for the semiconductor SWs 17a and 17b of the one-directional and other-directional semiconductor SW connections body 14a and 14b, respectively.

[0055] Self-extinguishing semiconductor switches include unipolar semiconductors such as MOSFETs and JFETs, and bipolar semiconductors such as IGBTs and PNP transistors. The difference between the two is that in unipolar semiconductors, current flows in both directions when a voltage is applied to the gate (=ON), whereas in bipolar semiconductors, even if a voltage is applied to the gate, the built-in pn diode blocks the flow of current in the reverse direction, so the switch cannot be switched ON (conductive state). In the following embodiments, the semiconductor SWs 17a and 17b will be described as unipolar semiconductors.

[0056] In other words, the semiconductor SW connection body 14 and the gate drive circuit assembly 16 of the HBU 120 are configured by converting the semiconductor SW connection body 14 and the gate drive circuit assembly 16 of the HBU 110 in Figures 2 and 3A-3C into a one-way semiconductor SW connection body 14a and a one-way gate drive circuit assembly 16a, respectively, and further adding a other-way semiconductor SW connection body 14b and a other-way gate drive circuit assembly 16b to the one-way semiconductor SW connection body 14a and the one-way gate drive circuit assembly 16a.

[0057] 3B and 3C, in the case where the semiconductor SW 17 in the HBU 110 (or 120) is a MOS semiconductor, the semiconductor SW 17 (or 17a, 17b) included in each parallel-connected column (lined up in the vertical direction in the figures) can all be driven simultaneously by gate signals output from a single insulation isolation gate drive circuit 18. In this case, the number of insulation isolation gate drive circuits 18 per parallel-connected column can be reduced by q-1.

[0058] In the HBUs 110 and 120, the rated breaking current is I for the current flow in one direction (the direction of the right arrow in FIGS. 2 and 4) and the other direction (the direction of the left arrow in FIG. 4). ＬＨＢＵ The arc discharge inception voltage specific to MSW12 is V ａｔｈ When all the semiconductor switches 17 of the semiconductor switch connection body 14 are turned on, the combined on-resistance is R ＴＯＮ When V ａｔｈ and R ＴＯＮ and I ＬＭＡＸ The characteristic of this design is that it is designed so that the relationship of the above-mentioned (Equation 1) holds between these.

[0059] As explained in the above findings, if the HBUs 110 and 120 are configured in the relationship of (Equation 1), the high-speed opening of the MSW 12 can shorten the discharge time T ｂ The MSW 12 can be opened with an arc-free discharge in which the time required for the current to flow is substantially zero (0.1 ms or less in the example of FIG. 16).

[0060] <<Operation>> When the SW controller 19 receives the shutdown command 27 issued from the outside, it proceeds with the following shutdown process.

[0061] First, an ON signal is sent to the gate drive circuit assembly 16 to immediately turn on all semiconductor SWs in the semiconductor SW connection body 14 (all semiconductor SWs 17 in the HBU 110, and all semiconductor SWs 17a and 17b in the HBU 120). This operation opens the bypass / breaking current path 13. At the same time, or immediately after sending the ON signal to the semiconductor SW connection body 14, the SW controller 19 sends an OFF signal to the MSW drive circuit 15 to turn off (open contacts) the MSW 12. Note that, since there is a magnetomechanical delay in the opening operation of the MSW 12, even if an OFF signal is sent to the MSW 12 simultaneously with the ON signal to the semiconductor SW connection body 14, the semiconductor SW connection body 14 always turns on first, and the MSW 12 turns off after a delay of several milliseconds (arc-free opening). When the MSW 12 turns off, the full load current I Ｌ is commutated to the bypass / breaking current path 13.

[0062] At this stage, if an event occurs that stops the issuance of the shutdown command 27 (e.g., erroneous detection of an abnormal current), the HBUs 110 and 120 can return to a steady-state energization state without completing the shutdown. In this case, the SW controller 19 can send an ON signal to the MSW 12 and an OFF signal to the semiconductor SW connection body 14.

[0063] When a predetermined predicted MSW interruption time (described later) has elapsed since sending the OFF signal to the MSW drive circuit 15, the SW controller 19 sends an OFF signal to the gate drive circuit assembly 16 of the semiconductor SW connection body 14 to turn off all the semiconductor SWs 17 of the semiconductor SW connection body 14 (all the semiconductor SWs 17a and 17b in the HBU 120), thereby interrupting the bypass / interruption current path 13. In this way, the transmission / distribution line 2 is interrupted by the HBUs 110 and 120.

[0064] <<Expected MSW Opening Time>> Here, the definition of the "expected MSW opening time" of the MSW 12 will be explained. This time is the sum of the "mean contact separation time," which is the average time elapsed from the time the SW controller 19 outputs an OFF signal to the moment the MSW contacts are released, the "mean time to establish contact withstand voltage," which is the average time taken from the time the contacts are released to the moment the withstand voltage between the contacts recovers to or exceeds the rated withstand voltage, and a redundant time (0.5 ms to 1 ms, determined experimentally) determined in consideration of probabilistic variations in both times and variations between individuals. In other words, expected MSW opening time = mean contact separation time + mean time to establish contact withstand voltage + variation redundant time.

[0065] The contact separation time is the magneto-mechanical response time specific to the MSW used, and is often referred to as the release time in make-contact MSWs. Meanwhile, the time to establish contact breakdown voltage is the longer of the actual moving contact time and the arc discharge duration time of the MSW. In this embodiment, as described below, the actual moving contact time is greater than the arc discharge duration time (=0 ms), so the time to establish contact breakdown voltage = the actual moving contact time.

[0066] 2 and 4, the HBUs 110 and 120 may be configured such that an energy absorbing current path, in which an energy absorber such as an arrester is placed, is connected in parallel with the steady-state current path 11 and the bypass / breaking current path 13. This energy absorber serves to suppress a voltage surge that occurs when the semiconductor SW connection body 14 is switched off in the final stage of the above-mentioned breaking process, and to absorb the energy that has accumulated in the transmission / distribution line capacitance and inductance.

[0067] <<Effects>> The effects of the HBUs 110 and 120 will be described below. As described above, the HBUs can exhibit high-speed interruption function in the high-voltage and low-voltage range of DC 1500V or less.

[0068] 2 to 4, the HUBs 110 and 120 have a configuration in which the zero current generating means 305 is removed from the DC circuit breakers 300a to 300c of Figures 1A to 1C. Therefore, it can be said that the following problems that occurred with the conventional DC circuit breakers 300a to 300c equipped with the zero current generating means 305 are solved: e) increased volume and weight, f) the breaking process becomes complicated and difficult to control, g) increased manufacturing costs due to the use of power semiconductors and large-capacity passive components, and h) loss of breaking time in some cases.

[0069] Furthermore, HUBs 110 and 120 employ industrially mass-produced MSWs that are small and open at high speed in the high-voltage, low-voltage range of 1500 V or less, and are configured to open the MSWs arc-free, divert the load current to a bypass / breaking current path in a short time, and have the function of breaking the MSW at the predicted breaking time. This solves the problems that the high-speed MSWs that were apparent in conventional DC circuit breakers 300 a - 300 c have, namely, that "a) they become large, b) they are expensive, c) they take a long time to manufacture, and d) they increase running costs."

[0070] (DC Circuit Breaker / First Embodiment) <Configuration> Fig. 5 is a configuration diagram of an h-DCCB 130 according to the first embodiment. The HBUs 110 and 120 described above are h-DCCBs that can only operate in a high-voltage, low-voltage range of DC 1500 V or less. In contrast, the h-DCCB 130 is an h-DCCB that can operate in a high-voltage and extra-high-voltage range of DC 1500 V or more.

[0071] Although the h-DCCBs 130-190 in Figures 5-11 are equipped with an HBU 110 as a one-way DC circuit breaker, it is also possible to equip the h-DCCBs 130-190 with an HBU 120 instead of the HBU 110, thereby changing the h-DCCBs 130-190 from one-way DC circuit breakers to two-way DC circuit breakers.

[0072] In the h-DCCBs 130-190 of FIGS. 5-11, all of the HBUs 110 or 120 they are equipped with are configured to satisfy the condition of the above-mentioned (Equation 1).

[0073] Returning to FIG. 5, the h-DCCB 130 controls the HBU (hybrid breaking base unit) 110 to reduce the load current I Ｌ The required number m of units are connected in series in the direction of flow.

[0074] However, it is assumed that the SW controller 19 does not exist inside these HBUs 110 in Fig. 5. The individual SW controller 19 of each HBU 110 is replaced with an individual MSW drive interface 20 and gate drive interface 21 of each HBU 110, and an SW controller 22 for the entire h-DCCB 130. The MSW drive interface 20 receives an on / off signal from the MSW drive circuit 15 (Fig. 2) of the MSW 12. The gate drive interface 21 receives an on / off signal from the gate drive circuit assembly 16 (Fig. 2) of the semiconductor SW connection body 14.

[0075] The on / off of the MSW drive circuit 18 and gate drive circuit assembly 16 of each HBU 110 is controlled by an on / off signal issued from the SW controller 22 via the MSW drive interface 20 and gate drive interface 21. The internal configuration, functions, operations, and effects of the HBU 110 are the same as those described for the HBU 110, so a description thereof will be omitted.

[0076] The required rated breaking voltage of h-DCCB130 is V ＤＣＣＢ , the rated breaking voltage of the HBU110 to be used is V ＨＢＵ Then, the number of series m is For example, V ＨＢＵ = DC 1000V, then V ＤＣＣＢ The optimum m when = DC 1500V is m = 2, V ＤＣＣＢ = DC 6600V, the optimum m is m = 7. A positive integer greater than the optimum value can also be selected.

[0077] When the SW controller 22 receives a shutoff command 27 from the outside, it controls the MSW driver circuit 15 and the gate driver circuit assembly 16 of each HBU 110 according to a predetermined algorithm.

[0078] <<Operation>> Next, a description will be given of the disconnection process of the h-DCCB 130. When the SW controller 22 of the h-DCCB 130 receives a disconnection command from the outside, all HBUs 110 (HBU １ , H.B.U. ２ ...HBU ｍ ) to simultaneously turn on all the semiconductor switches 17 of all the HBUs 110. This operation opens all the bypass / break current paths 13 in all the HBUs 110.

[0079] Furthermore, at the same time as this, or after turning on all the semiconductor SWs 17, the SW controller 22 sends an OFF signal to the MSW drive circuits 15 of all the HBUs 110 to turn off all the MSWs 12 (open contacts). When all the MSWs 12 are turned off, the load current I Ｌ are commutated to the respective bypass / breaking current paths 13. It should be noted here that the breaking times of the MSWs 12 of the HBUs 110 fluctuate stochastically, and therefore vary within a certain time range (for example, see the aforementioned redundant time of 0.5 ms).

[0080] When the predicted MSW interruption time has elapsed, the SW controller 22 sends an OFF signal to the gate drive circuit assemblies 16 of all HBUs 110 to simultaneously turn OFF all semiconductor SWs 17. In this way, the interruption of the power transmission / distribution line 2 by the h-DCCB 130 is completed.

[0081] It is an easy idea to connect m MSWs with a certain rated voltage between contacts in series and have them function as one MSW with m times the rated interrupting voltage, but in actual MSWs, the timing at which the contacts open fluctuates, so if a series connection of m MSWs is carelessly opened, a power transmission / distribution voltage that far exceeds the rated withstand voltage between contacts will be concentrated on the one MSW that opens first, which could lead to a severe outcome such as a sustained intense arc discharge and burnout.

[0082] In the h-DCCB 130, as described above, the MSWs of all HBUs are opened in an arc-free manner, and the load current I Ｌ is continuously commutated to the bypass / breaking current path 13, and I ＬSince the process of breaking the above two terminals is performed simultaneously by the semiconductor SW connection body 14, even if one MSW opens first, the situation where the transmission and distribution voltage is concentrated will never occur. Ｌ When the current is commutated to the bypass / breaking current path 13, the voltage applied to the contacts of the MSW 12 is maximum I Ｌ R ｃｏｍ The voltage is low, at most about 10 V DC.

[0083] In the high voltage and extra high voltage h-DCCB 130, on / off control signals are sent to all HBUs 110 at the same time, so the interruption speed (time) of the h-DCCB 130 is the same as the interruption speed (time) of a single HBU 110. Therefore, it can be said that the h-DCCB 130 can be interrupted at high speed.

[0084] <<Effects>> The h-DCCB 130 is configured by connecting HBUs 110 in series that do not have a zero current generating means. Therefore, it can be said that it solves the problems of the conventional h-DCCB (Figure 1) that are associated with the presence of a zero current generating means: e) increased volume and weight, f) difficulty in control due to the complicated interruption process, g) increased manufacturing costs due to the use of power semiconductors and large-capacity passive components, and h) loss of interruption time in some cases.

[0085] Furthermore, the h-DCCB130 is configured by connecting in series an industrial small-sized high-speed MSW that can be used in the low voltage range of the high voltage band with an HBU110 that can open contacts quickly and arc-free, so even in high voltage and extra-high voltage ranges, it can interrupt at the same high speed as an HBU alone, and even when all MSWs are combined, it is small, lightweight, and inexpensive.It can be said that this solves the problems of custom-made high-speed MSWs that were a concern with conventional h-DCCBs: a) they become large, b) they are expensive, c) they take time to manufacture, and d) they increase running costs.

[0086] (DC Circuit Breaker / Second Embodiment) <Configuration> Fig. 6 is a configuration diagram of an h-DCCB 140 according to a second embodiment. The h-DCCB 140 relates to an h-DCCB in which the rated breaking current of the HBU 110 is increased. In the HBU 110, as shown in Fig. 3B, the pulse rated drain current I of the semiconductor SW connection body 14 is increased by increasing the number of parallel connections of semiconductor SW. ＤＰ Therefore, it can be said that the upper limit of the rated breaking current of the HBU 110 is determined by the rated load current of the single MSW 12.

[0087] The h-DCCB 140 is configured to operate the hybrid breaker unit (HBU) 110 (FIG. 2) in response to the load current I Ｌ The required number n of HBUs are connected in parallel so that the flow directions are aligned. However, there is no SW controller 19 inside these HBUs 110, and the SW controller is placed externally. The internal configuration, functions, operations, and effects of the HBUs 110 are as explained above, so explanations will be omitted.

[0088] The number of parallel connections n is determined by the rated breaking current of the h-DCCB140. ＬＤＣＣＢ , the rated load current of HBU110 is I ＬＭＳＷ (= rated load current of MSW12), the current-carrying resistance of MSW12 is R ＭＳＷ , the combined on-resistance of the semiconductor SW connection body 14 is R ＴＯＮ Then, It is possible to select a positive integer greater than the optimum value.

[0089] For example, I ＬＤＣＣＢ = 400A, I ＬＭＳＷ = 250A, R ＭＳＷ ,=7.8mΩ,R ＴＯＮ When n = 22 mΩ, the right side of (Equation 3) becomes 1.69, so the optimum number of HBUs connected in parallel is n = 2.

[0090] Each HBU 110 is provided with an MSW drive interface 20 for receiving an on / off signal from the MSW drive circuit 15 (FIG. 2) of the MSW 12, and a gate drive interface 21 for receiving an on / off signal from the gate drive circuit assembly 16 (FIG. 2) of the semiconductor SW connection body 14. The on / off of the MSW drive circuit 18 and gate drive circuit assembly 16 of each HBU 110 is controlled by an on / off signal issued from a SW controller 22 via the MSW drive interface 20 and gate drive interface 21.

[0091] When the SW controller 22 receives a cutoff command from the outside, it controls the MSW driver circuit 15 and the gate driver circuit assembly 16 of each HBU 110 according to a predetermined algorithm.

[0092] <<Operation>> Next, a description will be given of the disconnection process of the h-DCCB 140. When the SW controller 22 of the h-DCCB 140 receives a disconnection command, it disconnects all n HBUs 110 (HBUs １ , H.B.U. ２ ...HBU ｍ ) to immediately turn on all semiconductor SWs 17 of all HBUs 110. This operation simultaneously opens the bypass / break current paths of all HBUs 110. Furthermore, at the same time as this, or immediately after turning on all semiconductor SWs 17, the SW controller 22 sends an OFF signal to the MSW drive circuits 15 of the MSWs 12 of all HBUs, causing the MSWs 12 of all HBUs 110 to transition to an OFF state (open contacts) without arcing. When the MSWs 12 are turned OFF, the load current I Ｌ is commutated to the bypass / breaking current path 13.

[0093] The SW controller 22 sends an OFF signal to the gate drive circuit assemblies 16 of all HBUs 110 when a predetermined predicted MSW interruption time has elapsed, starting from the time when the OFF signal was sent to the MSW drive circuits 15 of all HBUs 110, and simultaneously turns OFF all semiconductor SWs 17 of all HBUs 110. In this way, load current interruption of the transmission / distribution line 2 by the h-DCCB 140 is completed.

[0094] As shown in Figure 6, when n HBUs 110 are connected in parallel to function as one h-DCCB 140 and a load current greater than the rated load current of a single HBU 110 is to be interrupted, the following considerations must be taken into account: first, to ensure that the rated load current of the MSW is not exceeded even for a moment during the interruption process, and second, to minimize the number of parallel connections n in order to keep the weight, volume, and cost of the h-DCCB as low as possible.

[0095] In the h-DCCB 140, these two requirements are established by ensuring the condition of the above (Equation 3). To prove this, the derivation process of (Equation 3) will be explained.

[0096] When n HBUs are connected in parallel to the h-DCCB 140 shown in FIG. 6, the load current component flowing through the MSW reaches its maximum when the commutation of n-1 HBUs is completed and the remaining HBU Ｋ At this time, the load current I ＬＤＣＣＢ is HBU Ｋ The current flows through one MSW and the semiconductor SW connections 14 of the n HBUs. In this state, the combined resistance R of the h-DCCB 140 is Therefore, HBU Ｋ The load current I flowing through the MSW ＬＭＳＷＫ teeth, This MSW load current component I ＬＭＳＷＫ From the first consideration, the rated breaking current of the HBU 110 is equal to the rated load current I of the MSW. ＬＭＳＷ must be lower, so expressing this statement as an inequality: Transforming this inequality into an inequality with n on the left side results in (Equation 3). There are multiple positive integers n that satisfy (Equation 3), but by adopting the smallest positive integer n, the second requirement (consideration) can be met.

[0097] In the high voltage, large current h-DCCB 140, high speed HBUs 110 are connected in parallel as a unit, and all HBUs 110 are shut off at the same time, so the shutoff speed (time) is as fast as when an HBU 110 is shut off alone.

[0098] <<Function>> The h-DCCB 140 is configured by connecting in parallel HBUs 110 (Figs. 2 to 4 and Fig. 6) that do not have a zero current generating means. Therefore, it can be said that it solves the problems that occurred with the conventional h-DCCB (Fig. 1) that required the addition of a zero current generating means: "e) increased volume and weight, f) difficulty in control due to the complicated interruption process, g) increased manufacturing costs due to the use of power semiconductors and large-capacity passive components, and h) loss of interruption time in some cases."

[0099] Furthermore, the h-DCCB140 is configured to connect in parallel an HBU that can open contacts quickly and arc-free to a small, mass-produced industrial MSW that can be used in high-voltage and low-voltage ranges, and therefore it can be said that it solves the problems that have been a concern with conventional h-DCCBs, namely, that custom-made high-speed MSWs "a) become huge, b) are expensive, c) take a long time to manufacture, and d) increase running costs."

[0100] (DC Circuit Breaker / Third Embodiment) <Configuration> Fig. 7 is a configuration diagram of an h-DCCB 150 according to a third embodiment. The h-DCCB 150 has a rated interruption voltage V ＤＣＣＢ This relates to a DC circuit breaker that has been expanded to the extra-high voltage range.

[0101] The h-DCCB 150 is a parallel element P １ｕ ~P ｎｕ (u is a predetermined integer), and m of these are connected in series so that the load current direction is the same. By doing so, the rated breaking voltage of the h-DCCB 140 is increased. As explained above with respect to the h-DCCB 140, one parallel element P １ｕ ~P ｎｕ In the h-DCCB 150, n HBUs 110 are connected in parallel to increase the rated breaking current. In other words, by using the structure shown in Figure 7, the h-DCCB 150 can realize a DC breaking device with any rated breaking voltage and any rated current.

[0102] parallel element P １ｕ ~P ｎｕThe number m of series connections must be a positive integer that satisfies (Equation 2). However, in order to prevent unnecessary increases in weight, volume, and cost of the h-DCCB 150, it is most desirable to set it to the smallest positive integer that satisfies (Equation 2). １ｕ ~P ｎｕ It is optimal that the number n of parallel HBUs 110 in m is the smallest positive integer that satisfies the above-mentioned (Equation 3). By determining m and n in this way, the most compact and economically rational h-DCCB is realized.

[0103] The SW controller 22 controls each HBU constituting the h-DCCB 150. iｊ (i=1 to n, j=1 to m) The internal MSW 12 and semiconductor SW connection body 14 are controlled in an integrated manner. iｊ When the SW controller 22 receives the cutoff command, the cutoff command is sent to each HBU according to a predetermined algorithm. iｊ The MSW driver circuit 15 and the gate driver circuit assembly 16 are controlled.

[0104] <<Operation>> The interruption process of the h-DCCB 150 is almost the same as that of the h-DCCBs 130 and 140, and therefore a description thereof will be omitted.

[0105] In the high voltage / extra high voltage / high current h-DCCB 150, high speed HBUs 110 are connected in series and parallel, and all HBUs 110 are shut off at the same time, so the shut-off speed (time) is as fast as when only one HBU 110 is used, regardless of the number of HBUs 110.

[0106] <Effects> The high voltage / extra high voltage / large current h-DCCB 150 is configured by connecting HBUs 110 (Figs. 2 to 4 and 7) without zero current generating means in series and parallel. Therefore, it can be said that it solves the problems that occurred with conventional DC circuit breakers 300a-300c (Fig. 1) that required the addition of zero current generating means: "e) increased volume and weight, f) difficulty in control due to a complicated breaking process, g) increased manufacturing costs due to the use of power semiconductors and large-capacity passive components, and h) loss of breaking time in some cases."

[0107] Furthermore, the h-DCCB150 is configured to connect in parallel an HBU that can open contacts quickly and arc-free with a small, mass-produced industrial MSW that can be used in high-voltage and low-voltage ranges, and therefore it can be said that it solves the problems that have been a concern with conventional h-DCCBs, namely, that custom-made high-speed MSWs "a) become huge, b) are expensive, c) take a long time to manufacture, and d) increase running costs."

[0108] (DC Circuit Breaker / Fourth Embodiment) <Configuration> FIGS. 8A and 8B are configuration diagrams of a series-type h-DCCB 160a and a series-parallel h-DCCB 160b, respectively, according to the fourth embodiment. FIG. 8C is a configuration diagram of a voltage balancer used in the h-DCCBs 160a and 160b. In h-DCCBs including a configuration in which HBUs are connected in series, such as the h-DCCBs 130 and 150, it is desirable to equalize the divided load voltages (transmission and distribution voltages) applied to each string element (FIG. 8A) or each parallel element (FIG. 8B) at the moment of circuit breaker and thereafter. To ensure this divided voltage equalization, the h-DCCBs 160a and 160b are configured to include a voltage balancer 30 connected in parallel to the string elements or parallel elements. Note that the SW controller 22 is omitted from FIGS. 8A and 8B.

[0109] The basic configuration of the voltage balancer 30 is a voltage balancing resistor (resistance value R ＢＬ ) 31 and the voltage balancing capacitance (capacitance value C ＢＬ ) 32 are connected in parallel, but in some cases, the voltage balancing resistors 31 or the voltage balancing capacitors 32 may be omitted. Needless to say, both the voltage balancing resistors 31 and the voltage balancing capacitors 32 must have high voltage resistance specifications.

[0110] Resistance value R of voltage balancing resistor 31 ＢＬ is 5MΩ≦R ＢＬ ≦100 MΩ, and the capacitance value C of the voltage balancing capacitor 32 ＢＬ , 10pF≦C ＢＬ The optimum value is selected appropriately within the range of ≦2000 pF.

[0111] <Effects> In addition to the effects of the h-DCCBs 130 and 150, the h-DCCB 160 can also achieve the effect of reliably equalizing the voltage division of the series elements or parallel elements after the load current is interrupted.

[0112] (DC Circuit Breaker / Fifth Embodiment) <Configuration> Figures 9A to 9C are configuration diagrams of h-DCCBs 170a, 170b, and 170c according to a fifth embodiment, each equipped with an energy absorber 24 in a different manner. The energy absorber 24 is placed in the energy absorption current path 23 and is, for example, an arrester or a varistor (MOV). The SW controller 22 is omitted from Figures 9A to 9C.

[0113] The h-DCCB 170a has an energy absorber 24 connected in parallel to each parallel element. The h-DCCB 170b has an energy absorber 24 connected in parallel to each of a plurality of equal-number of parallel elements connected in series. The h-DCCB 170c has energy absorbers 24 connected in parallel to both ends of the entire set of the plurality of parallel elements connected in series.

[0114] The HBUs 110, 120 and h-DCCBs 130-160 described above may be provided with energy absorbing current paths 23 with energy absorbers 24 arranged in a parallel connection manner as shown in Figures 9A-9C.

[0115] The energy absorber 24 suppresses the voltage surge that occurs immediately after the semiconductor SW connection body 14 is cut off in the final stage of the cutting process, and plays a role in dissipating the energy that has accumulated in the capacitance and inductance that occur in the transmission and distribution line.

[0116] <Effects> In addition to the effects of HBU 110 (or 120), h-DCCB 170a-170c can exert new effects by adding the new function of suppressing voltage surges that occur in the final stage of the interruption process and dissipating energy remaining in the transmission and distribution lines.

[0117] (Sixth embodiment of DC circuit breaker) <Configuration> Figure 10 is a configuration diagram of an h-DCCB 180 according to the sixth embodiment. The h-DCCB 180 is also an embodiment of an autonomous circuit breaker of the present invention. The HBUs 110, 120 and h-DCCBs 130-170 described above are configured so that the SW controller receives a circuit breaker command from the outside (power transmission and distribution system), but the h-DCCB 180 is equipped with an autonomous circuit breaker command transmitter 28 and generates a circuit breaker command itself. The example of Figure 10 will be described using an example where the autonomous circuit breaker command transmitter 28 is attached to the h-DCCB 150 (Figure 7).

[0118] An independent tripping command alarm generator 28 is provided at the connection between the output end of the h-DCCB 180 and the transmission / distribution line 2. The independent tripping command alarm generator 28 issues an independent tripping command 29' to the SW controller 22 via an independent tripping command signal line 29. It is also possible to configure the SW controller 22 in such a way that it is integrated into the independent tripping command alarm generator 28. The rest of the configuration of the h-DCCB 170 is the same as that of the h-DCCB 150, and therefore a description thereof will be omitted.

[0119] Upon receiving the external shutdown command 27 and / or the independent shutdown command 29', the SW controller 22 proceeds with the shutdown process according to a predetermined algorithm.

[0120] <<Operation>> The independent shutoff command alarm 28 constantly monitors the current value, rate of change, and trend of the load current (= transmission / distribution current), and when it determines that an abnormality indicating an accident has occurred, it continuously issues an independent shutoff command 29' while the abnormality is occurring. It is desirable that the independent shutoff command alarm 28 be set to issue an alarm with higher sensitivity than the external shutoff command alarm. If it is set to issue an alarm with higher sensitivity, a situation may arise in which the independent shutoff command 29' is issued earlier than the external shutoff command 27.

[0121] The SW controller 22 can carry out the shutdown process based on either the external shutdown command 27 or the autonomous shutdown command 29' (an "or" logic command), or it can carry out the shutdown process based on both commands (an "and" logic command).

[0122] The SW controller 22 can also perform a novel breaking process that switches between a single command ("or" logic command) and a dual command ("and" logic command) during the breaking process. For example, the breaking process can proceed based on an "or" logic command, and SW control can be performed to switch to a dual command ("and" logic command) or an external breaking command 27 (single) at the final stage of the bypass / breaking current path 13 commutation process (i.e., immediately before the semiconductor SW connection body breaking process).

[0123] <Effects> The h-DCCB180 is configured by adding an independent circuit breaker alarm 28 to the HBUs 110, 120 and h-DCCBs 130-170, and therefore it can be said that this solves the problems that with conventional technology, high-speed MSWs "a) become large, b) are expensive, c) take time to manufacture, and d) increase running costs," as well as the problems that the presence of a zero current generating means "d) increases the volume and weight, e) makes the circuit breaking process more complicated and difficult to control, f) increases manufacturing costs due to the use of power semiconductors and large-capacity passive components, and g) in some cases causes loss of circuit breaking time."

[0124] Furthermore, because the h-DCCB 180 has the capability to utilize both external tripping commands and autonomous tripping commands, it can perform a more advanced tripping process than the aforementioned HBUs 110, 120 and h-DCCBs 130-170. In particular, when the autonomous tripping command alarm 28 is set to high sensitivity, the autonomous tripping command 29' is issued earlier than the external tripping command 27, resulting in a characteristic in which the tripping of the h-DCCB is accelerated by the time calculated by subtracting the autonomous tripping command time from the external tripping command time. This characteristic means that a load current that suddenly increases due to a ground fault or the like can be tripped earlier, which has the effect of relaxing the rated tripping current specifications of the h-DCCB, ultimately resulting in the further effect of making the h-DCCB smaller, lighter, and less expensive.

[0125] (DC Circuit Breaker / Seventh Embodiment) <Configuration> Figure 11 is a configuration diagram of an h-DCCB 190 according to the seventh embodiment. Increasing the number of series-parallel HBUs 110 and 120 in order to increase the voltage and current of the aforementioned h-DCCBs 130-180 rapidly increases the number of on / off signal lines (MSWs and semiconductor SW connections) connecting the SW controller 22 and each HBU 110, hindering efforts to make the entire h-DCCB more compact. Furthermore, the wiring of the on / off signal lines becomes increasingly difficult. The h-DCCB 190 is an h-DCCB that alleviates these difficulties.

[0126] The key to resolving this issue is to separate the on / off signal generator 25 and on / off signal distributor 26 of the SW controller 22 in Figure 7 into a main distributor and a sub-distributor, respectively, and leave the on / off signal generator 25 as the main distributor in the SW controller 22, while separating the on / off signal distributor 26 as the sub-distributor from the SW controller 22 and moving it to a location near an appropriate HBU group. It is desirable for the HBU groups to be similar. The h-DCCB 190 shown in Figure 11 is an example of an application to the h-DCCB 150 (Figure 7).

[0127] In the h-DCCB 190, the on / off signal distribution unit 26 of the SW controller 22 is divided into m on / off signal distribution units (26-1, 26-2, ..., 26-m), which are separated from the on / off signal generation unit 25 and are connected to the corresponding parallel element P １ｕ ~P ｎｕ (u is a predetermined integer).

[0128] The MSW of the on / off signal generating unit 25 and the on / off signal output of the semiconductor SW connection body are connected to the input of each on / off signal distributing unit 26-k (k=1 to m). ｈｋ (h=1 to n) MSW drive interface 20, the semiconductor SW connection body on / off signal output each HBU ｈｋ (h=1 to n) are connected to the gate drive interface 21.

[0129] In FIG. 11, each similar HBU group in the column direction is divided into parallel elements P１ｕ ~P ｎｕ (u is a predetermined integer) and the on / off signal distribution unit is divided into m parts. Each similar HBU group in the row direction is divided into one unit of series element P ｖ１ ~P ｖｍ (v is a predetermined integer) to divide the on / off signal distributor into n parts.

[0130] The other configurations, functions, and effects are the same as those of the h-DCCB 150 (FIG. 7), so the explanation will be omitted.

[0131] <Effects> The h-DCCB 190 divides the on / off signal distribution section into the number of similarity HBU groups, and the divided distribution section elements are arranged in the vicinity of the similarity HBU groups. This allows for a significant reduction in the length of the signal lines connecting the output of the on / off signal distribution section 26 to the HBU's MSW drive interface 20 and gate drive interface 21, thereby achieving the unique effect of promoting the compactness of the h-DCCB.

[0132] (Modification) In the embodiment, the semiconductors SW17a and 17b are unipolar semiconductors. The semiconductors SW17a and 17b may be bipolar semiconductors. In this case, R ＴＯＮ That is, in a unipolar semiconductor, when a voltage is applied to the gate (=ON), a current can flow in both directions. Therefore, in either the first direction or the second direction in the power transmission / distribution line 2, all of the semiconductor SWs 17a and 17b of the semiconductor SW connection body 14 as a semiconductor switch section are turned ON, and the combined resistance R of the semiconductor SW connection body 14 is determined as follows. ＴＯＮ can be decided.

[0133] In contrast, in a bipolar semiconductor, even if a voltage is applied to the gate, the built-in pn diode blocks the flow of reverse current, so it is not possible to turn on all of the semiconductor SWs 17a, 17b of the SW connection body 14. Therefore, when bipolar semiconductors are used as the semiconductor SWs 17a, 17b, one of the semiconductor SWs 17a, 17b of the semiconductor SW connection body 14 is turned on and the other is turned off. However, in order to return the semiconductor SWs 17a, 17b from on to off after the MSW 12 is switched from on to off after commutation to the bypass / breaking current path 13 during DC interruption processing, a rectifying element (e.g., a freewheeling diode) is connected in parallel to each of the semiconductor SWs 17a, 17b in an anti-parallel relationship with the forward direction reversed to each other. Therefore, when bipolar semiconductors are used as the semiconductor switches 17a and 17b, the combined resistance R of the semiconductor switch connection body 14 is ＴＯＮ is defined as the combined resistance of the semiconductor SW connection 14 when one of the semiconductor SWs 17a and 17b is all on and the other is all off, respectively, and the rectifying elements connected in antiparallel to the other which is off are all conducting in the forward direction.

[0134] 2... DC transmission / distribution line, 11... steady-state current path, 12... MSW, 13... bypass / interrupt current path, 14... semiconductor SW connection body (semiconductor switch section), 14a... one-way semiconductor SW connection body (one-way semiconductor switch section), 14b... other-way semiconductor SW connection body (other-way semiconductor switch section), 15... MSW drive circuit, 16... gate drive circuit assembly, 16a... one-way gate drive circuit assembly, 16b... reverse direction gate drive circuit assembly, 17... self-extinguishing type semiconductor, 17a... first self-extinguishing type semiconductor, 17b... second self-extinguishing type semiconductor, 18, 18a, 18b... gate drive circuit, 19, 22... SW controller, 20... MSW drive interface, 21...gate drive interface, 23...energy absorption current path, 24...energy absorber, 25...on / off signal generation unit (main distribution unit), 26...on / off signal distribution unit (sub-distribution unit), 27...external shutdown command, 28...independent shutdown command alarm, 29...independent shutdown command signal line, 29'...independent shutdown command, 30...voltage balancer, 31...voltage balancing resistor, 32...voltage balancing capacitance, 110, 120...HBU (DC circuit breaker), 130, 140, 150, 160, 170, 190...h-DCCB (DC circuit breaker), 180...h-DCCB (independent shutdown device).

Claims

1. A semiconductor switch unit including a mechanical switch and a first self-extinguishing semiconductor switch connected in parallel to the mechanical switch and controlling current flow and current cutoff in a first direction from one end to the other end, the first self-extinguishing semiconductor switch being one or more first self-extinguishing semiconductor switches being connected in series or parallel to each other; ａｔｈ > I ＬＨＢＵ R ＴＯＮ A DC circuit breaker in which the following relationship is set: ａｔｈ is the arc starting voltage of the mechanical switch. ＬＨＢＵ is the rated breaking current set as the upper limit of the breaking current of the DC circuit breaker. ＴＯＮ is a combined resistance of the semiconductor switch unit when all of the first self-extinguishing type semiconductor switches in the semiconductor switch unit are on.

2. In the DC circuit breaker according to claim 1, the semiconductor switch section has second self-extinguishing semiconductor switches which are connected in series with the first self-extinguishing semiconductor switches and which control current flow and current interruption in a second direction opposite to the first direction, and R in (Equation 1) ＴＯＮ is defined as a combined resistance of the semiconductor switch unit when first self-arc-extinguishing type semiconductor switches and second self-arc-extinguishing type semiconductor switches in the semiconductor switch unit are all on, or when one and the other are all on and all off, respectively, and rectifying elements connected in anti-parallel to the other that is off are all conducting in the forward direction.

3. A DC circuit breaker comprising: a series connection section in which a plurality of the DC circuit breakers according to claim 1 or 2 are connected in series with each other; and a switch controller that controls the simultaneous on / off switching of all mechanical switches and the simultaneous on / off switching of all semiconductor switches included in the series connection section.

4. A DC circuit breaker comprising: a parallel connection section in which a plurality of the DC circuit breakers according to claim 1 or 2 are connected in parallel with each other; and a switch controller that controls the simultaneous on / off switching of all mechanical switches and the simultaneous on / off switching of all semiconductor switches included in the parallel connection section.

5. A DC circuit breaker comprising: a series-parallel section in which a plurality of parallel connection sections, each of which is formed by connecting a plurality of the DC circuit breakers according to claim 1 or 2 in parallel, are further connected in series to each other; and a switch controller for controlling the simultaneous on / off switching of all mechanical switches and the simultaneous on / off switching of all semiconductor switches included in the series-parallel section.

6. A DC circuit breaker arrangement comprising: a series-parallel section in which a plurality of parallel connection sections, each of which is formed by connecting one or more of the DC circuit breakers according to claim 1 or 2 in parallel, are further connected in series to each other; and a plurality of voltage balancers, each of which is connected in parallel to a corresponding one of the parallel connection sections.

7. A DC circuit breaker comprising: a series-parallel section in which a plurality of parallel connection sections, each of which is formed by connecting one or more of the DC circuit breakers according to claim 1 or 2 in parallel, are further connected in series with each other; and a plurality of energy absorbers, each of which is connected in parallel to one or more parallel connection sections successive in the series connection direction.

8. An independent circuit breaker comprising: the DC circuit breaker according to claim 5; and an independent circuit breaker command alarm device connected in series to the DC circuit breaker and disposed in a DC current path together with the DC circuit breaker, for outputting an independent circuit breaker command to the switch controller based on the DC current in the DC current path.

9. A DC circuit breaker as claimed in claim 5, wherein the switch controller comprises: a main distribution section which distributes and outputs a plurality of main drive signals generated based on an external circuit breaker command signal; and a plurality of sub-distribution sections, each of which is provided corresponding to a respective parallel connection section, which distribute and output a sub-drive signal generated based on the main drive signal from the main distribution section to all mechanical switches and semiconductor switches included in the corresponding parallel connection section.

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