Quantum circuits and decoders for color codes

Abstract

A quantum computing system (QCS) includes a set of physical qubits (PQs). A quantum error correction (QEC) code includes a first stabilizer that corresponds to a first basis and stabilizes a quantum state of a first subset of the set of PQs and a second stabilizer that corresponds to a second basis and stabilizes the quantum state. Implementing the QEC code includes operating a quantum circuit. Operating the quantum circuit encodes a first bit that corresponds to a first quantum parity and a second bit that corresponds to a second quantum parity in a first qubit-pair of the set of PQs. The quantum parities are associated with the quantum state. The first parity is associated with the second basis. The second parity is associated with the first basis. Operating the quantum circuit multiplexes measurements of the first parity and the second parity via basis multiplexing.

Description

QUANTUM CIRCUITS AND DECODERS FOR COLOR CODESPRIORITY

[0001] This application claims priority to U.S. Provisional Application No 63 / 601,971, entitled QUANTUM CIRCUITS AND DECODERS FOR COLOR CODES, filed on November 22, 2023, the contents of which of herein incorporated in their entirety.FIELD

[0002] The present disclosure relates generally to quantum computing and information processing systems, and more particularly to quantum circuits and decoders for color codes of quantum computing systems.BACKGROUND

[0003] Quantum computing is a computing method that takes advantage of quantum effects, such as superposition of basis states and entanglement to perform certain computations more efficiently than a classical digital computer. In contrast to a digital computer, which stores and manipulates information in the form of bits, e.g., a "T” or ”0." quantum computing systems can manipulate information using quantum bits (“qubits”). A qubit can refer to a quantum device that enables the superposition of multiple states, e.g., data in both the “0” and “1” state, and / or to the superposition of data, itself, in the multiple states. In accordance with conventional terminology, the superposition of a “0” and “1” state in a quantum system may be represented, e.g., as a |0) + b 11) The “0” and “1” states of a digital computer are analogous to the 10) and 11) basis states, respectively of a qubit.SUMMARY

[0004] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or can be learned from the description, or can be learned through practice of the embodiments.

[0005] One example aspect of the present disclosure is directed to a method for operating a quantum computing system (QCS). The QCS includes a set of physical qubits (PQs). The method includes implementing a quantum error correction (QEC) code. The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. The second stabilizer stabilizes the quantum state.The first stabilizer corresponds to a first basis of a set of qubit bases. The second stabilizer corresponds to a second basis of the set of qubit bases. Implementing the QEC code includes operating a quantum circuit. Operating the quantum circuit encodes a first bit and a second bit in a first qubit-pair of the set of PQs. The first bit corresponds to a first parity of a set of quantum parities. The set of quantum parities is associated with the quantum state of the first subset of PQs. The first parity is associated with the second basis. The second bit corresponds to a second parity of the set of quantum parities. The second parity is associated with the first basis. Operating the quantum circuit multiplexes measurements of the first parity and the second parity via basis multiplexing.

[0006] Another example aspect of the present disclosure is directed to a method for operating a quantum computing system (QCS). The QCS includes a set of physical qubits (PQs). The method includes implementing a quantum error correction (QEC) code. The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. The second stabilizer stabilizes the quantum state. The first stabilizer corresponds to a first basis of a set of qubit bases. The second stabilizer corresponds to a second basis of the set of qubit bases. Implementing the QEC code includes operating a quantum circuit that performs operations comprising iteratively folding the first stabilizer down from the first subset of PQs onto a first PQ of the first subset of PQs. Subsequent to folding down the first stabilizer, the first PQ encodes a first bit that corresponds to a first parity of a set of quantum parities of the quantum state. The first parity of the quantum state is associated with the second basis. The first PQ is then measured in the first basis. The operations further comprise iteratively folding the second stabilizer down from the first subset of PQs onto the first PQ. Subsequent to folding down the second stabilizer, the first PQ encodes a second bit that corresponds to a second parity of the set of quantum parities. The second parity of the quantum state is associated with the first basis. The first PQ is then measured in the second basis.

[0007] Other aspects of the present disclosure are directed to various systems, methods, apparatuses, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0008] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain the related principles.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Detailed discussion of embodiments directed to one of ordinary skill in the art is set forth in the specification, which refers to the appended figures, in which:

[0010] FIG. 1 depicts an example quantum computing system according to example embodiments of the present disclosure;

[0011] FIG. 2 shows various examples of transforming standard color code (CC) qubit layouts into the color code layouts of the embodiments;

[0012] FIG. 3 A shows some circuit constructions for the stabilizer measurement cycle for one hexagon shape within a color code;

[0013] FIG. 3B shows additional circuit constructions for the stabilizer measurement cycle for one hexagon shape within a color code;

[0014] FIGS. 3C-3G show a full-cycle of a superdense color code circuit, with inclined feedback, according to various embodiments;

[0015] FIG. 4A shows an inline folding circuit that may be employed in middle-out embodiments;

[0016] FIGS. 4B-4E show one cycle of a middle-out circuit over a full color code, according to various embodiments;

[0017] FIGS. 5A-5B show various representations of a pyramid code, according to various embodiments;

[0018] FIG. 6 shows a matching graph, according to various embodiments; and

[0019] FIG. 7 depicts a flow chart diagram of an example method for operating a quantum computing system, according to various embodiments.DETAILED DESCRIPTION

[0020] Example aspects of the present disclosure are directed to methods, architectures, and hardware configurations (e.g., quantum circuits) for implementing novel color codes, as well as a decoder for color codes. More particularly, the embodiments include at least two- flavors of novel color codes (and novel quantum circuits that implement the color codes): one inspired by superdense coding and the other based on a middle-out (or inline) stabilizerfolding strategy. In the superdense coding embodiments, for a single plaquette of the color code, two quantum parities (e.g., for two stabilizer types of the single plaquette) are encoded (as two classical bits), via superdense coding, in two ancilla (measurement) qubits of the single plaquette. Prior to encoding the two parities, the two ancilla qubits are prepared in amaximally-entangled state (e.g., a Bell state). Due to their entanglement, the two classical bits are distributed across the Bell pair (e.g.. the two ancilla qubits). The two classical bits (e.g., corresponding to the two quantum parities) may be recovered via measurements of each of the two ancilla qubits in the respective two bases that correspond to the two parities. Due to this parallelism of measuring the two parities (corresponding to separate qubit bases), the superdense coding embodiments may be said to multiplex the measurement of the two parities.

[0021] The middle-out (or inline) embodiments do not require ancilla qubits for the stabilizers. For the middle-out (or inline) embodiments, the color code state appears halfway between measurements. The color code may be said to have appeared when a set of data qubits (corresponding to a plaquette of the color code) encodes a quantum state within the codespace of the color code. Initially the color code appears with a first and second stabilizer for a single plaquette. The first stabilizer (corresponding to a first basis) is iteratively folded dow n from a set of data qubits (of a plaquette that shares the first stabilizer and a second stabilizer) to a single data qubit. After the fold-in operations of the first stabilizer, the single data qubit encodes a first parity (corresponding to the second basis). The color code may be said to have ‘'disappeared” (e.g., the set of data qubits may not encode the original quantum state that is w ithin the codespace of the color code). The single data qubit may be measured and reset in the first basis. The first stabilizer may be iteratively folded back to the set of data qubits, to return the state back to the color code. After the fold-out operations of the first stabilizer, the color code may be said to have ‘'appeared” (e.g., the set of data qubits encodes the original quantum state that is within the codespace of the color code). Afterwards, the second stabilizer may be similarly and iteratively folded dow n from the common set of data qubits to the single data qubit. The single qubit may then be measured in the second basis and then reset in the second basis. The iterative folding-in, measuring, resetting, folding-out, and then changing bases may be continued, with the color code appearing after each fold-out cycle is complete, and disappearing after each fold-in cycle is complete.

[0022] The embodiments also include a novel decoder for the color codes of the embodiments. The decoder of the embodiments is an update to a Mobius color code decoder. The various decoder embodiments may be implemented efficiently (e.g., less than exponential in both time and space). The quantum circuits of the embodiments (e.g., which implement the color codes of the embodiments) reduce the performance gap betw een color codes and surface codes. Under uniform depolarizing noise with a noise strength of 0. 1%, themiddle-out color code circuit achieves a teraquop footprint of 1250 qubits (vs 650 for the surface code decoded by a correlated variant of Py Matching).

[0023] Color codes are topological QEC codes, built out of a polygonal tiling of a 2D physical qubit (PQ) array. Each polygon (or plaquette) corresponds to (two) stabilizers. The first stabilizer of the polygon (or plaquette) corresponds to a first Pauli-basis (e.g., a Z-basis). The second stabilizer of the polygon (or plaquette) corresponds to a second Pauli-basis (e.g., a X-basis). That is, in contrast to surface codes, where each “square” tile (or plaquette) corresponds to a single Pauli-basis stabilizer (e g., one of an X-type stabilizer or a Z-type stabilizer), each “polygon” (or plaquette) of a color code corresponds to two Pauli-basis stabilizers (e.g., both an X-type stabilizer and a Z-type stabilizer). Note that the embodiments are not limited to just X-type and Z-type stabilizers. Employing stabilizers associated with any two of the three Pauli-ty pe operators is possible. For instance, other embodiments employ both X-type and Y -type stabilizers for each plaquette, while still other embodiments employ both Z-type and Y-type stabilizers for each plaquette. At least a portion of the utility of selecting a color code as a preferred QEC code is because color codes of the embodiments share features and connectivity requirements of a surface code, and also have some additional benefits. For example, like a surface code, the color codes of the embodiments can be executed on a planar 2D grid (or array) of qubits but, unlike a surface code, the color code of the embodiments may efficiently implement a transversal S gate.

[0024] Having more transversal gates available for a logical qubit (LQ) in a QEC code is a desired property (e.g., being able to efficiently implement a transversal gate). Furthermore, during a quantum computation that implements a color code of the embodiments, LQs spend a majority' of their time idling. Consequently, a primary factor in deciding between two QEC code types (e.g., deciding whether to implement a color code or a surface code) is how efficiently the code idles, e.g., how many physical qubits are needed to form a LQ in a sufficient quantum memory with sufficiently low logical error rates.

[0025] In terms of efficient idling, one difference between a surface code and the color codes of the embodiments is that a surface code uses weight-4 stabilizers (e.g., the plaquettes of surface have four vertices corresponding to four data qubits), while the color codes of the embodiments use weight-6 stabilizers (e.g., the plaquettes of the color codes of the embodiments have six vertices corresponding to six data qubits). The dow nside of larger stabilizers is that they are noisier (e.g., more data qubits and more logical operations to perform stabilizer measurements). That is. larger stabilizers require more data qubits and more logical operations to measure the quantum parities. Thus, larger stabilizers incur morenoise per cycle. The benefit of larger stabilizers is that they reveal richer information about the errors that occurred. In particular, basic errors in the color code produce three detection events (e.g., in color codes, three plaquettes that share a common data qubit are “triggered” or “highlighted” in the presence of a qubit error, instead of two plaquettes that are triggered in a surface code). Thus, the employment of a color code over a surface code renders qubit errors harder to hide. That is, in a color code, a single “bulk” error generates a detection event in three separate polygons (or plaquette) that share the data qubit that is affected by the error. When a detection event is generated for a polygon, it may be said that the error “highlights” or “triggers” the polygon. Thus, in a color code of the embodiments, a single error may highlight or trigger three polygons that share the data qubit. Due to the coloring scheme of a color code, each of the three highlighted polygons is a different color. Each “triggered” or “highlighted” plaquette generates a “detection event” for the plaquette.

[0026] In principle, having three detection events per error allows for a more accurate reconstruction of the errors. For surface codes, minimum weight matching using a Blossom algorithm (e.g., a Blossom decoder) provides an efficient way to find the most likely set of X- type errors that produces a given set of symptoms on the Z-type stabilizers. The combination of the color codes and the decoders of the embodiments of the color code may outperform implementations of the surface code.

[0027] The embodiments include two flavors of color code circuits and the quantum circuits that implement the two flavors of color codes. The first flavor of the color codes (and the quantum circuits that implement the color codes) of the embodiments employ superdense coding protocols to accumulate two (ancilla qubit) measurements at the same time (e.g., multiplexing the qubit bases rather than multiplexing the measurements in space (dedicating each ancilla qubit of a pair of ancilla qubits to measure (in parallel in space) the quantum parities in separate bases) or time (employing a single ancilla qubit and accumulating and measuring the quantum parities serially over time)). The superdense coding protocols may accumulate the two ancilla qubits via multiplexing the qubit bases of the two stabilizer ty pes. That is. for the superdense coding embodiments, a two-ancilla qubit system is prepared in a maximally-entangled state (e.g.. a Bell pair). Via the maximal entanglement inherent in a Bell state, each of the two quantum parities (each parity corresponding to a separate basis) is multiplexed (or distributed) across each ancilla qubit of the entangled qubit pair. That is, in some sense, via the superdense coding protocol, a first classical bit corresponding to a first quantum parity (e.g.. a phase-flip parity) is encoded in each of the two entangled qubits and a second classical bit corresponding to a second quantum parity (e.g., a bit-flip parity) isencoded in each of the two entangled qubits. As is typical in superdense coding, each of the two ancilla entangled-qubits may be measured in separate bases and "‘combined” to “recover” the two classical bits corresponding to the two quantum parities.

[0028] Briefly, one embodiment of the superdense coding embodiments includes a method for operating a quantum computing sy stem (QCS). The QCS includes a set of physical qubits (PQs). The method includes implementing a quantum error correction (QEC) code (e.g., a color code). The set of PQs may include a set of data qubits for a logical qubit (LQ) formed by the QEC code. The LQ may include a set of plaquettes (e.g., set of polygon tiles). Note that in superdense coding embodiments, the plaquettes (or polygons) may be hexagonal plaquettes (or tiles). The QEC code includes a set of stabilizers for the LQ. The set of stabilizers includes a first stabilizer and a second stabilizer. The first stabilizer and the second stabilizer may overlap on a first plaquette of the set of plaquettes (e.g., the two stabilizers may share a common set of data qubits). The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. The second stabilizer also stabilizes the quantum state of the first subset of PQs. For instance, the first subset of PQs may include the set of data qubits for the first plaquette. That is, each data qubit may be located at a vertex of the first plaquette. The set of data qubits is the first subset of PQs that is common to both the first stabilizer and the second stabilizer. The first stabilizer corresponds to a first basis (e.g., a Z- basis) of a set of qubit bases. The second stabilizer corresponds to a second basis (e.g., an X- basis) of the set of qubit bases. The set of qubit bases may include three Pauli bases (e.g., a Z-basis, an X-basis, and a Y-basis). The Z-basis may be referred to as a computational basis and the X-basis may be referred to as a Hadamard basis. As indicated above, the first basis may be the Z-basis and the second basis may be the X-basis. The first stabilizer may commute with the second stabilizer. Thus, the quantum state of the first set of PQs may be a simultaneous eigenstate of both the first stabilizer and the second stabilizer. Furthermore, in the absence of a qubit error, the eigenvalue of the quantum state, w ith respect to both the first stabilizer and the second stabilizer may be +1. Thus, in the absence of a qubit error, the quantum state of the first subset of PQs may be in the codespace of the QEC code. When a detectable qubit error occurs, the eigenvalue of the quantum state, with respect to both the first stabilizer and the second stabilizer may be -1 . Thus, when a detectable qubit error occurs, the quantum state may be not within the codespace of the QEC code. The second stabilizer (e.g., corresponding to the second basis (e.g., the X-basis) may be enabled to detect a first error type (e.g., Z-type or “phase-flip” errors). The first stabilizer (e.g., correspondingto the first basis (e.g., the Z-basis) may be enabled to detect a second error type (e.g.. X-type or “bit-flip” errors).

[0029] Implementing the QEC code includes operating a quantum circuit. Operating the quantum circuit encodes a first bit and a second bit in a first qubit-pair of the set of PQs. For instance, the first-qubit pair may include a first ancilla qubit (e.g., a first measure qubit) and a second ancilla qubit (e.g., a second measure qubit) of the first plaquette (or polygon). The first bit corresponds to a first parity of a set of quantum parities of the quantum state of the first subset of PQs. The first parity is associated with the second basis. The second bit corresponds to a second parity of the set of quantum parities. The second parity is associated with the first basis. For instance, the first parity of the set of quantum parities may be a bitflip (or an X-type) quantum parity. Thus, the first parity is associated with the second basis (e.g., the X-basis), e.g., a flip in the first parity' may be associated with a qubit error corresponding to a 7T-rotation around the axis of the second basis (e.g., a bit-flip or X-error). The second parity of the set of quantum parities may be a phase-flip (or Z-type) quantum parity. Thus, the second parity is associated with the first basis (e.g., the Z-basis), e.g.. a flip in the second parity may be associated with a qubit error corresponding to a 7r-rotation around the axis of the first basis (e.g., a phase-flip or Z-error). Operating the quantum circuit multiplexes measurements of the first parity and the second parity via basis multiplexing

[0030] Another example aspect method of the superdense coding embodiments is a method for implementing a QEC code (e.g.. a color code) circuit on a quantum computing system (QCS). The QCS includes a set of qubits arranged in a 2D grid. The method includes constructing a QEC code circuit. The QEC code circuit includes a set of stabilizers. At least a first pair of stabilizers from the set of stabilizers is an overlapping pair of stabilizers. The QEC code circuit may be employed to multiplex a set of measurements of the overlapping pair of stabilizers on a resource of the QCS.

[0031] The second flavor of the color code includes circuits that do not require ancilla qubits (e.g., measure qubits), but rather employ middle-out (or inline) techniques in a color code setting. Such "inline” or “middle-out” embodiments iteratively fold-in a first weight-6 stabilizer to a single data qubit. Once folded-in to a single data qubit, the data qubit encodes a first parity of the quantum state of the data qubits. After a measurement and a reset (both in the basis corresponding to the first stabilizer), the first stabilizer is iteratively folded-out to the data qubits. This fold-in, measure, reset, and then fold-out process is then performed for the second stabilizer in the second basis. Rather than the hexagonal plaquettes of thesuperdense coding embodiments, the plaquettes of the middle-out embodiments are rectangular in nature and have no ancilla qubits located in the interior of the rectangle.

[0032] Briefly, one embodiment of the middle-out embodiments includes a method for operating a quantum computing system (QCS). The QCS includes a set of physical qubits (PQs). The method includes implementing a quantum error correction (QEC) code (e.g., a color code). The set of PQs may include a set of data qubits for a logical qubit (LQ) formed by the QEC code. The LQ may include a set of plaquettes (e.g., set of polygon tiles). Note that in inline (or middle-out) embodiments, the plaquettes (or polygons) may be rectangular plaquettes (or tiles). The rectangular plaquettes include 6 data qubits and no ancilla (or measure) qubits. The QEC code includes a set of stabilizers for the LQ. The set of stabilizers includes a first stabilizer and a second stabilizer. The first stabilizer and the second stabilizer may overlap on a first plaquette of the set of plaquettes (e.g., the two stabilizers may share a common set of data qubits). The first stabilizer stabilizes a quantum state of a first subset of the set of PQs (e.g., the six data qubits of the rectangular plaquette). The second stabilizer also stabilizes the quantum state of the first subset of PQs. For instance, the first subset of PQs may include the set of data qubits for the first plaquette. The set of data qubits may be the first subset of PQs that is common to both the first stabilizer and the second stabilizer. The first stabilizer corresponds to a first basis (e.g., a Z-basis) of a set of qubit bases. The second stabilizer corresponds to a second basis (e.g., an X-basis) of the set of qubit bases. As indicated above, the first basis may be the Z-basis and the second basis may be the X-basis. The first stabilizer may commute with the second stabilizer. Thus, the quantum state of the first set of PQs may be a simultaneous eigenstate of both the first stabilizer and the second stabilizer. Furthermore, in the absence of a qubit error, the eigenvalue of the quantum state, with respect to both the first stabilizer and the second stabilizer may be + 1. Thus, in the absence of a qubit error, the quantum state of the first subset of PQs may be in the codespace of the QEC code. When a detectable qubit error occurs, the eigenvalue of the quantum state, with respect to both the first stabilizer and the second stabilizer may be -1. Thus, when a detectable qubit error occurs, the quantum state may not be within the codespace of the QEC code. The second stabilizer (e.g.. corresponding to the second basis (e.g., the X-basis) may be enabled to detect a first error type (e.g., Z-type or “phase-flip” errors). The first stabilizer (e.g., corresponding to the first basis (e.g., the Z- basis) may be enabled to detect a second error Npe (e.g., X-type or “bit-flip” errors).

[0033] Implementing the QEC code includes operating a quantum circuit that performs operations. The operations comprise iteratively folding the first stabilizer down from the firstsubset of PQs onto a first PQ of the first subset of PQs. Subsequent to folding down the first stabilizer, the first PQ encodes a first bit that corresponds to a first parity of a set of quantum parities of the quantum state. The first parity of the quantum state is associated with the second basis. The first PQ is then measured in the first basis. The first PQ is then reset in a first state (e.g., a ground state in the first basis, (e.g., |0))). The first stabilizer is then iteratively unfolded from the first PQ to the first subset of PQs. The first subset of PQs encodes the quantum state. The operations further include iteratively folding the second stabilizer down from the first subset of PQs onto the first PQ. Subsequent to folding down the second stabilizer, the first PQ encodes a second bit that corresponds to a second parity of the set of quantum parities. The second parity of the quantum state is associated with the first basis. The first PQ is then measured in the second basis. The first PQ is then reset in a first state (e.g., a ground state in the second basis, (e.g., |+))). The second stabilizer is then iteratively unfolded from the first PQ to the first subset of PQs. The first subset of PQs then encodes the quantum state.

[0034] Another example aspect of the inline embodiments is directed to a method for implementing a QEC code circuit on a quantum computing system (QCS). The QCS includes a set of qubits arranged in a 2D grid. The method includes constructing a QEC code circuit. The QEC code circuit includes a set of stabilizers. The set of stabilizers includes at least a first stabilizer. The first stabilizer has an original state. Each qubit of the first subset of qubits is a data qubit. The QEC code circuit may be employed to iteratively fold down that first stabilizer to a final state.

[0035] For the embodiments, the QEC code may be a color code. The first bit is a first classical bit. The second bit is a second classical bit. The set of PQs forms a first logical qubit (LQ) of the color code. The color code includes a set of plaquettes of the first LQ. The first subset of PQs forms a first plaquette of the set of plaquettes. Each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette. For superdense coding embodiments, the first qubit-pair includes a first ancilla qubit of a set of ancilla qubits of the first plaquette and a second ancilla qubit of the set of ancilla qubits of the first plaquette. The inline embodiments may not require the use of ancilla (or measure) qubits.

[0036] In superdense embodiments, the first plaquette may be a hexagonal plaquette. In inline embodiments, the first plaquette may be shaped as another polygon (e.g., a rectangular plaquette). Each data qubit of the set of data qubits is located at a separate vertex of a set of vertices of the (hexagonal or rectangular) plaquette. For the superdense coding embodiments, each ancilla qubit of the set of ancilla qubits is located in an interior of the hexagonalplaquete. The quantum circuit includes a set of multi-qubit gates (e.g.. CNOT gates). Each multi-qubit gate of the set of multi-qubit gates couples an ancilla qubit of the set of ancilla qubits to a separate data qubit of the set of data qubits or another ancilla qubit of the set of ancilla qubits. The set of ancilla qubits may be prepared in a Bell state.

[0037] Aspects of the present disclosure provide a number of technical effects and benefits. For instance, the quantum circuits of the embodiments reduce the performance gap between color codes and surface codes. The quantum circuits of the embodiments (e.g., which implement the color codes of the embodiments) reduce the performance gap between color codes and surface codes. Under uniform depolarizing noise with a noise strength of 0. 1%, the middle-out color code circuit achieves a teraquop footprint of 1250 qubits (vs 650 for the surface code decoded by a correlated variant of Py Matching).Quantum Computing Systems

[0038] FIG. 1 depicts an example quantum computing system 100. The system 100 is an example of a system of one or more classical computers and / or quantum computing devices in one or more locations, in which the systems, components, and techniques described below can be implemented. Those of ordinary skill in the art, using the disclosures provided herein, will understand that other quantum computing devices or systems can be used without deviating from the scope of the present disclosure.

[0039] The system 100 includes quantum hardware 102 in data communication with one or more classical processors 104. The classical processors 104 can be configured to execute computer-readable instructions stored in one or more memory' devices to perform operations, such as any of the operations described herein. The quantum hardware 102 includes components for performing quantum computation. For example, the quantum hardware 102 includes a quantum system 110, control device(s) 112, and readout device(s) 114 (e.g., readout resonator(s)). The quantum system 110 can include one or more multi-level quantum subsy stems, such as a register of qubits (e.g., qubits 120). In some implementations, the multi-level quantum subsystems can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, spin-based qubits, and the like. The superconducting qubits may be located in a cryostat to cool the qubits to superconducting temperatures (e.g., less than about 3 Kelvin). However, aspects of the present disclosure are not limited to superconducting qubits. In some examples, any suitable qubit structure may be used without deviating from the scope of the present disclosure, such as photonic qubits.trapped ion qubits, spin qubits, neutral atom qubits, quantum dot qubits, molecular qubits, or other qubits.

[0040] The type of multi-level quantum subsystems that the system 100 utilizes may vary. For example, in some cases it may be convenient to include one or more readout device(s) 114 attached to one or more superconducting qubits, e.g., transmon, flux, gmon, xmon, or other qubits. In other cases, ion traps, photonic devices or superconducting cavities (e.g.. with which states may be prepared without requiring qubits) may be used. Further examples of realizations of multi-level quantum subsystems include fluxmon qubits, silicon quantum dots or phosphorus impurity qubits.

[0041] Quantum circuits may be constructed and applied to the register of qubits included in the quantum system 110 via multiple control lines that are coupled to one or more control devices 112. Example control devices 112 that operate on the register of qubits can be used to implement quantum gates or quantum circuits having a plurality of quantum gates, e.g., Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T gates, multi-qubit quantum gates, coupler quantum gates, etc. The one or more control devices 112 may be configured to operate on the quantum system 110 through one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystems may be superconducting qubits and the control devices 112 may be configured to provide control pulses to control lines to generate magnetic fields to adjust the frequency of the qubits.

[0042] The quantum hardware 102 may further include readout devices 1 14 (e.g., readout resonators). Measurement results 108 obtained via measurement devices may be provided to the classical processors 104 for processing and analyzing. In some implementations, the quantum hardware 102 may include a quantum circuit and the control device(s) 112 and readout devices(s) 114 may implement one or more quantum logic gates that operate on the quantum system 102 through physical control parameters (e.g., microwave pulses) that are sent through wires included in the quantum hardware 102. Further examples of control devices include arbitrary waveform generators, wherein a DAC (digital to analog converter) creates the signal.

[0043] The readout device(s) 114 may be configured to perform quantum measurements on the quantum system 110 and send measurement results 108 to the classical processors 104. In addition, the quantum hardware 102 may be configured to receive data specifying physical control qubit parameter values 106 from the classical processors 104. The quantum hardware 102 may use the received physical control qubit parameter values 106 to update the action ofthe control device(s) 112 and readout devices(s) 114 on the quantum system 110. For example, the quantum hardware 102 may receive data specifying new values representing voltage strengths of one or more DACs included in the control devices 112 and may update the action of the DACs on the quantum system 110 accordingly. The classical processors 104 may be configured to initialize the quantum system 110 in an initial quantum state, e.g., bysending data to the quantum hardware 102 specifying an initial set of parameter values 106.

[0044] In some implementations, the readout device(s) 114 can take advantage of a difference in the impedance for the |0) and 11) states of an element of the quantum system, such as a qubit, to measure the state of the element (e.g., the qubit). For example, the resonance frequency of a readout resonator can take on different values when a qubit is in the state 10) or the state 11), due to the nonlinearity of the qubit. Therefore, a microwave pulse reflected from the readout device 114 carries an amplitude and phase shift that depend on the qubit state. In some implementations, a Purcell filter can be used in conjunction with the readout device(s) 114 to impede micro wave propagation at the qubit frequency.

[0045] In some embodiments, the quantum system 110 can include a plurality of qubits 120 arranged, for instance, in a two-dimensional grid 122. For clarity, the two-dimensional grid 122 depicted in FIG. 1 includes 4x4 qubits, however in some implementations the system 110 may include a smaller or a larger number of qubits. In some embodiments, the multiple qubits 120 can interact with each other through multiple qubit couplers, e.g., qubit coupler 124. The qubit couplers can define nearest neighbor interactions between the multiple qubits 120. In some implementations, the strengths of the multiple qubit couplers are tunable parameters. In some cases, the multiple qubit couplers included in the quantum computing system 100 may be couplers with a fixed coupling strength.

[0046] In some implementations, the multiple qubits 120 may include data qubits, such as qubit 126 and measurement qubits, such as qubit 128. A data qubit is a qubit that participates in a computation being performed by the system 100. A measurement qubit is a qubit that may be used to determine an outcome of a computation performed by the data qubit. That is, during a computation an unknown state of the data qubit is transferred to the measurement qubit using a suitable physical operation and measured via a suitable measurement operation performed on the measurement qubit.

[0047] In some implementations, each qubit in the multiple qubits 120 can be operated using respective operating frequencies, such as an idling frequency and / or an interaction frequency and / or readout frequency and / or reset frequency. The operating frequencies can vary from qubit to qubit. For instance, each qubit may idle at a different operating frequency.The operating frequencies for the qubits 120 can be chosen before a computation is performed.

[0048] FIG. 1 depicts one example quantum computing system that can be used to implement the methods and operations according to example aspects of the present disclosure. Other quantum computing systems can be used without deviating from the scope of the present disclosure.Color Codes of the Embodiments

[0049] As noted above, a color code is a type of a topological quantum error correcting (QEC) code. A color code may be built out of a polygonal tiling over a 2D qubit array, where each polygon corresponds to both a first stabilizer type (e.g.. aZ-basis stabilizer) and a second stabilizer ty pe (e.g., an X-basis stabilizer). A color code is a viable QEC code because it shares the qualities and connectivity requirements of a surface code, and also has some additional benefits. For example, like a surface code, a color code can be executed on a planar 2D grid of qubits but, unlike the surface code, the color code is enabled to implement a transversal S gate efficiently.

[0050] Although having more transversal gates is a desired property, it’s likely not the deciding factor when choosing between a color code and a surface code for fault tolerant quantum computation. During a quantum computation, logical qubits may spend a majority of their time idling. Consequently, one factor in deciding between two QEC code types is how efficiently each code type idles (e.g., how many physical qubits are required to implement a single logical qubit for a given code distance). Thus, the following discussion focuses on the number of physical qubits a QEC code requires to make a sufficient quantum memory.

[0051] In terms of efficient idling, one difference between the surface code and the color code is that the surface code uses weight-4 stabilizers while color codes of the embodiments use weight-6 stabilizers. The dow nside of larger stabilizers is that they are noisier. Larger stabilizers require more steps to measure and incur more noise per step. The benefit of larger stabilizers is that they reveal richer information about the errors that occurred. In particular, basic errors in the color code produce three detection events instead of two, making errors harder to hide (e.g., a color code may generate a greater number of detection events per error than a surface code). As discussed above, in a color code, a single ‘‘bulk"’ error generates a detection event in three separate polygons that share the data qubit that is affected by the error. When a detection event is generated for a polygon, it may be said that the error“highlights” or “triggers” the polygon. Thus, in a color code, a single error may highlight or trigger three polygons that share the data qubit. Due to the coloring of a color code, each of the three highlighted polygons is a different color.

[0052] Having three detection events per error may allow for a more accurate reconstruction of the errors. Unfortunately, decoding the observed detection events into likely errors has proven to be a difficult problem. For surface codes, minimum weight matching using the blossom algorithm provides an efficient way (e.g., polynomial in time) to find the most likely set of X-type errors that produces a given set of syndromes on the Z-type stabilizers. No polynomial time equivalent of the Blossom algorithm is known for the color code decoding problem. Thus, a color code may be capable of outperforming the surface code, but in practice it may underperform the surface code during a decoding phase.

[0053] A more pragmatic obstacle faced by researchers working on color codes is a lack of tooling. A researcher exploring the space of surface code circuits has multiple high performance open source decoders to choose between. A researcher who wishes to explore the space of color code circuits may have to write their own decoder, which can take significant time and effort. As such, the embodiments provide various color code circuits, as well as a color code decoder. More particularly, the embodiments include at least two color code circuit variants, referred to as: (1) superdense color code circuits and (2) middle-out color code circuits. Superdense color code circuits use superdense coding to accumulate two measurements at the same time. Middle-out color code circuits adapt no-ancilla middle-out techniques typically employed in surface codes for color codes. Thus, the embodiments may be bifurcated into at least two possible variants: (1) superdense embodiments and (2) middle- out (or inline) embodiments.

[0054] FIG. 2 shows various examples of transforming standard color code (CC) qubit layouts into the color code layouts of the embodiments. As discussed herein, the considered qubit layouts are 2D planar arrays of physical qubits. Also throughout, each shaded plaquette (e.g., a polygon or facet) in a logical qubit represents both a Z-basis stabilizer and an X-basis stabilizer over its vertices. Qubits on the vertices of plaquettes (or polygons) are data qubits; other qubits (located in the interior of a plaquette) are ancilla qubits (e.g.. measurement qubits). The three shadings (or hatchings) of the polygons represent a three-coloring of the polygons such that each X-error or Z-error on a data qubit will flip at most one polygon of each color (or hatching) (e g., a single X-error on a single data qubit may generate a detection event that “lights-up” or “triggers” a first hexagonal shape of a first color, a second hexagonal shape of a second color, and a single square shape of a third color, where the three shapesshare the data qubit at a single intersection point between the three shapes). The logical X (Z) observable is the product of X (Z) on all the data qubits. A common layout is a hexagonal tiling bounded by trapezoids (e.g., standard hex CC 200). Circuit constructions transform these layouts to meet various constraints, such as connectivity between ancilla qubits and data qubits. For example, to generate a middle-out circuit (e.g., based on the middle-out CC 230 or middle-out CC 250), spurs (e.g., weight-2 stabilizers resulting in an “oval’" shape or facet) are added along the boundaries of the logical qubit to avoid stalls during the measurement cycle.

[0055] More particularly, FIG. 2 shows a standard hex CC 200, which has a base width=l 1 physical qubits. Standard hex CC 200 is composed of hexagonal plaquettes (or shapes) with trapezoidal plaquettes (or shapes) on the boundaries of the logical qubit. Standard hex CC 200 may be transformed into a superdense coding layout (e.g., superdense CC 210) by fitting the ancilla qubits. Likewise, the standard hex CC 200 may be transformed into a spur CC 220 by adding spurs to the boundaries of the logical qubit. The spur CC 220 may be transformed into a middle-out CC 230 by transforming the hexagonal polygons to rectangular polygons. Likewise. FIG. 2, shows a standard oct CC 240 that is a {4,8,8} quantum error correction (QEC) code with a base width=l 1 physical qubits. Note that standard oct CC 240 is composed of octagonal and square shapes with trapezoidal shapes on the boundary' of the logical qubit. In a similar process of transforming superdense hex CC 200 into the middle-out CC 230, by adding spurs and transforming the octagonal shapes into rectangular shapes, the standard oct CC 240 may be transformed into the middle-out CC 250. In FIG. 2, the ancilla qubits are explicitly shown only in the superdense CC 210.Quantum Circuits for Superdense Coding Embodiments

[0056] Superdense coding is a quantum communication protocol that transmits two (classical) bits of information by sending one qubit and consuming one previously shared Bell pair. Superdense coding works because a Bell pair shared between Alice and Bob is stabilized by the +XAXBand +ZAZBstabilizers. The signs of both stabilizers can be negated by using either one of the involved qubits. For instance, Alice can negate +ZAZBby applying a bit flip XAor negate +XAXBby applying a phase flip ZA. Similarly, Bob can negate +ZAZBby applying a bit flip XBor negate +XAXBby applying a phase flip ZB. This allows two bits to be encoded into the Bell pair, from either side. Reuniting (and measuring) the Bell pair’s qubits allows both bits to be recovered.

[0057] Superdense coding's ability to accumulate both bits from both sides is interesting in the context of the color code, where pairs of stabilizers (e.g., X-type and Z-type stabilizers associated with the same polygon) overlap with each other. Some mechanism (e.g., multiplexing) is needed to multiplex the measurements of the two overlapping stabilizers onto the available resources. For example, they could be multiplexed by accumulating the two results onto separate ancilla qubits (e.g., space multiplexing via two ancilla qubits) or by performing one measurement on a single ancilla qubit followed by another measurement on the same ancilla qubit (e g., time multiplexing via a single ancilla qubit).

[0058] FIG. 3 A shows some circuit constructions for the stabilizer measurement cycle for one hexagon shape within a color code. More particularly, FIG. 3 A shows a naive space multiplexing circuit 300 for a hexagonal shape in a color code. FIG. 3A also shows a naive time multiplexing circuit 310 for a hexagonal shape in a color code. In FIGS. 3 A-3B and 4A, the shape of the facet as well as the qubit layout are shown to the left of the corresponding circuit. Also, in FIGS. 3A-3B and 4A, the maximum degrees of qubit connectivity , the average degree of qubit connectivity, and the ratios of CNOT / measurements are also shown. As noted above, the space multiplexing circuit 300 employs two ancilla qubits (e.g., a first ancilla qubit for the X-type stabilizer and a second ancilla qubit for the Z-type stabilizer).

[0059] Superdense coding enables multiplexing by basis: using controlled bit flips (e.g., CNOT (CX) gates) to accumulate one measurement result while using controlled phase flips (e.g.. CZ gates) to accumulate the other. Throughout, this type of multiplexing is referred to as "Bell multiplexing". FIG. 3B shows additional circuit constructions for the stabilizer measurement cycle for one hexagon shape within a color code. More particularly, FIG. 3B shows a Bell multiplexing circuit 320 that may be employed in a hexagon in a superdense color code.

[0060] Note that, when using Bell multiplexing, order of operations matters. It’s possible, by reordering the operations accumulating the two measurement results, to kickback CNOTs and other interactions onto the data qubits. A working ordering is as follows. As shown in the Bell multiplexing circuit 320, each hexagon contains two measurement ancilla qubits, each connected to three of the hexagon’s six data qubits. The two ancilla qubits are prepared into a Bell pair. Then all six data qubits control CNOTs targeting the closest measurement qubit, to accumulate the Z stabilizer measurement. Then all six data qubits are targeted by CNOTs controlled by the closest measurement qubit, to accumulate the X stabilizer measurement. Finally, a Bell basis measurement of the measurement qubits is performed. That is. one of the ancilla qubits is measured in the Z basis to determine the result of the Z stabilizermeasurement, and the other ancilla qubit is measured in the X basis to determine the result of the Z stabilizer measurement. This measures both of the hexagon's stabilizers, up to Pauli feedback controlled by the measurement results. The feedback operations are optimized away at circuit construction time by acting the feedback on the sets of measurements that are compared to produce detection events and observable measurements. FIG. 3B also shows a Bell flagging circuit 330 for the stabilizer measurement cycle for one hexagon shape within a color code.

[0061] FIGS. 3C-3G shows a full-cycle of a superdense color code circuit 340, with inclined feedback, according to various embodiments. The final circuit has flag measurements replaced by the second stabilizer measurements (e.g., see Bell flagging circuit 330 of FIG. 3B). Dropping the flags saves four layers of operations per cycle, but reduces the code distance of the circuit. More particularly, the full-cycle of the superdense color code circuit 340 includes detector slices of a contracting X basis detector (lighter shading) and a contracting Z basis detector (darker shading). During the measurement layer, a full detector slice is shown; revealing the color code state. The circuit is built by repeating this cycle.

[0062] Bell multiplexing circuit 320 and Bell flagging circuit 330 demonstrate various methods of operating a quantum computing system (QCS) that includes a set of physical qubits (PQs). The methods implemented by the Bell multiplexing circuit 320 and the Bell flagging circuits are superdense coding embodiments. The methods of the superdense coding embodiments include implementing a quantum error correction (QEC) code (e.g., a color code). The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. For instance, the first subset of PQs may include the set of six data qubits located at the vertices of the hexagonal plaquette shown in the plaquette diagrams of FIG. 3B. The second stabilizer also stabilizes the quantum state of the first subset of PQs. The first stabilizer corresponds to a first basis (e.g., aZ-basis) of a set of qubit bases. The second stabilizer corresponds to a second basis (e.g., an X-basis) of the set of qubit bases. Thus, each of the first stabilizer and the second stabilizer may be weight-6 stabilizers. For instance, the first stabilizer may include the product of six Pauli operators of a first type (e.g., L ' L' ' L ). The second stabilizer may include the product of six Pauli operators of a second type (e.g., XXXXXX).

[0063] Implementing the QEC code includes operating a quantum circuit (e.g., the Bell multiplexing circuit 320 of the Bell flagging circuit 330). The quantum circuit encodes a first bit and a second bit in a first qubit-pair of the set of PQs. For instance, the first qubit-pair may include the two ancilla qubits located in the interior of the hexagonal plaquette. The firstbit corresponds to a first parity of a set of quantum parities of the quantum state. The first parity’ is associated with the second basis. For instance, the first parity may be a bit-flip parity that corresponds to n -rotations about the X-basis. The second bit corresponds to a second parity of the set of quantum parities. The second parity is associated with the first basis. For instance, the second parity may be a phase-flip parity' that corresponds to it- rotations about the Z-basis. As shown in FIG. 3B, operating the quantum circuit multiplexes measurements of the first parity and the second parity via basis multiplexing.

[0064] The QEC code may be a color code. The first bit is a first classical bit. The second bit is a second classical bit. The set of PQs forms a first logical qubit (LQ) of the color code. The color code includes a set of plaquettes of the first LQ. The first subset of PQs forms a first plaquette of the set of plaquettes. Each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette. The first qubit-pair includes a first ancilla qubit of a set of ancilla qubits of the first plaquette and a second ancilla qubit of the set of ancilla qubits of the first plaquette.

[0065] The first plaquette is a hexagonal plaquette. Each data qubit of the set of data qubits is located at a separate vertex of a set of vertices of the hexagonal plaquette. Each ancilla qubit of the set of ancilla qubits is located in an interior of the hexagonal plaquette. The quantum circuit includes a set of multi-qubit gates (e.g., CNOT gates). As shown in FIG. 3B, each multi-qubit gate of the set of multi-qubit gates couples an ancilla qubit of the set of ancilla qubits to a separate data qubit of the set of data qubits or to another ancilla qubit of the set of ancilla qubits. The quantum circuit prepares the set of ancilla qubits in a Bell state.

[0066] As shown in the Bell multiplexing circuit 320 and the Bell flagging circuit 330, operating the quantum circuit further includes preparing the first qubit-pair in a maximally- entangled two-qubit state (e.g., a Bell state). The first bit and the second bit in the maximally-entangled tyvo-qubit pair are encoded via a superdense coding protocol. The superdense coding protocol multiplexes the first basis and the second basis. Multiplexing the first basis and the second basis includes employing controlled-bit flips to encode the first bit in the maximally-entangled two-qubit state and employing controlled-phase flips to encode the second bit in the maximally-entangled tyvo-qubit state.

[0067] As shown in the Bell multiplexing circuit 320 and the Bell flagging circuit 330, the superdense coding protocol includes subsequent to encoding the first bit and the second bit in the maximally -entangled two-qubit pair, performing a first measurement operation, in the first basis, on a first ancilla qubit of the maximally-entangled tyvo-qubit pair.Additionally, subsequent to encoding the first bit and the second bit in the maximally- entangled two-qubit pair, a second measurement operation, in the second basis, is performed on a second ancilla qubit of the maximally-entangled two-qubit pair.

[0068] As noted above, the maximally-entangled two-qubit pair may be a Bell state (e.g., As shown in the Bell multiplexing circuit 320 and the Bell flagging circuit 330, the superdense coding protocol further includes prior to preparing the Bell state, performing a first qubit-resetting operation on the first ancilla qubit. The first qubit resetting operation resets the first ancilla qubit in a first state of the first basis (e.g., |0)). Prior to preparing the Bell state, a second qubit-resetting operation is performed on the second ancilla qubit. The second qubit resetting operation resets the second ancilla qubit in a first state of the second basis (e.g.. |+)). Subsequent to performing the first qubit-resetting operation and the second qubit-resetting operation and prior to measuring the first ancilla qubit and the second ancilla qubit, a first controlled-NOT (CNOT) operation is performed. The first ancilla qubit is a control qubit of the first CNOT operation. The second ancilla qubit is the target qubit of the first CNOT operation. The first CNOT operation prepares the Bell state encoded in the first ancilla qubit and the second ancilla qubit. Subsequent to preparing the Bell state, a second CNOT operation is performed. A sixth data qubit of the first subset of PQs is a control qubit of the second CNOT operation. The first ancilla qubit is a target qubit of the second CNOT operation. Subsequent to preparing the Bell state, a third CNOT operation is performed. A first data qubit of the first subset of PQs is a control qubit of the third CNOT operation. The second ancilla qubit is a target qubit of the third CNOT operation. Subsequent to preparing the Bell state, a fourth CNOT operation is performed. A fifth data qubit of the first subset of PQs is a control qubit of the fourth CNOT operation. The first ancilla qubit is a target qubit of the fourth CNOT operation. Subsequent to preparing the Bell state, a fifth CNOT operation is performed. A second data qubit of the first subset of PQs is a control qubit of the fifth CNOT operation. The second ancilla qubit is a target qubit of the fifth CNOT operation. Subsequent to preparing the Bell state, a sixth CNOT operation is performed. A fourth data qubit of the first subset of PQs is a control qubit of the sixth CNOT operation. The first ancilla qubit is a target qubit of the sixth CNOT operation. Subsequent to preparing the Bell state, a seventh CNOT operation is performed. A third data qubit of the first subset of PQs is a control qubit of the seventh CNOT operation. The second ancilla qubit is a target qubit of the seventh CNOT operation.

[0069] As shown in the Bell multiplexing circuit 320 and the Bell flagging circuit 330, the superdense coding protocol further includes, subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing an eighth CNOT operation. The sixth data qubit is a target qubit of the eighth CNOT operation. The first ancilla qubit is a control qubit of the eighth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a ninth CNOT operation is performed. The first data qubit is a target qubit of the ninth CNOT operation. The second ancilla qubit is a control qubit of the ninth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a tenth CNOT operation is performed. The fifth data qubit is a target qubit of the tenth CNOT operation. The first ancilla qubit is a control qubit of the tenth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, an eleventh CNOT operation is performed. The second data qubit is a target qubit of the eleventh CNOT operation. The second ancilla qubit is a control qubit of the eleventh CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a twelfth CNOT operation is performed. The fourth data qubit is a target qubit of the twelfth CNOT operation. The first ancilla qubit is a control qubit of the twelfth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a thirteenth CNOT operation is performed. The third data qubit is a target qubit of the thirteenth CNOT operation. The second ancilla qubit is a control qubit of the thirteenth CNOT operation. Subsequent to performing the thirteenth CNOT operation, a fourteenth CNOT operation is performed. The second ancilla qubit is a control qubit of the fourteenth CNOT operation. The first ancilla qubit is a target qubit of the fourteenth CNOT operation.

[0070] As shown in the Bell multiplexing circuit 320 and the Bell flagging circuit 330. the superdense coding protocol further includes, subsequent to performing the fourteenth CNOT operation, performing the first measurement operation, in the first basis, of the first ancilla qubit. The first basis may be the Z-basis. Subsequent to performing the fourteenth CNOT operation, the second measurement operation is performed, in the second basis, of the second ancilla qubit. The second basis may be the X-basis.

[0071] As shown in the Bell flagging circuit 330, the superdense coding protocol further includes, subsequent to performing the sixth CNOT operation and the seventh CNOT operation and prior to performing the first measurement operation on the first ancilla qubit and the second measurement operation on the second ancilla qubit, performing a fifteenth CNOT operation. The second ancilla qubit is a control qubit of the fifteenth CNOToperation. The first ancilla qubit is a target qubit of the fifteenth CNOT operation. Subsequent to performing the fifteenth CNOT operation and prior to performing the eighth CNOT operation and the ninth CNOT operation, the first measurement operation is performed on the first basis, on the first ancilla qubit. The first basis is aZ-basis.Subsequent to performing the fifteenth CNOT operation and the seventh CNOT operation and prior to performing the eighth CNOT operation and the ninth CNOT operation, the second measurement operation is performed in the second basis and on the second ancilla qubit. The second basis is an X-basis. Subsequent to performing the first measurement operation on the first ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, a third qubit-resetting operation is performed on the first ancilla qubit. The third qubit resetting operation resets the first ancilla qubit in the first state of the first basis (e.g., 0)). Subsequent to performing the second measurement operation on the second ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, a fourth qubit-resetting operation is performed on the second ancilla qubit. The fourth qubit resetting operation resets the second ancilla qubit in the first state of the second basis (e.g., |+)). Subsequent to performing the third qubit-resetting operation on the first ancilla qubit and the fourth qubit-resetting operation on the second ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, a sixteenth CNOT operation is performed. The second ancilla qubit is a control qubit of the sixteenth CNOT operation. The first ancilla qubit is a target qubit of the sixteenth CNOT operation. The sixteenth CNOT operation prepares a second Bell state (e.g., |<?>+>) encoded in the first ancilla qubit and the second ancilla qubit. Subsequent to performing the fourteenth CNOT operation, a third measurement operation is performed in the first basis and on the first ancilla qubit. Subsequent to performing the fourteenth CNOT operation, a fourth measurement operation is performed on the second basis and on the second ancilla qubit.

[0072] In various embodiments, the first basis includes a first set of eigenstates (e.g., { |0), 11)}) of a first Pauli-operator (e.g., Z). The second basis includes a second set of eigenstates (e.g.. { |+), |— )}) of a second Pauli-operator (e.g.. X). The first parity and the first stabilizer correspond to the first Pauli-operator. The second parity and the second stabilizer correspond to the second Pauli-operator. The first stabilizer commutes with the second stabilizer. The quantum state is a simultaneous eigenstate of each of the first stabilizer and the second stabilizer. The simultaneous eigenstate has a common eigenvalue (e.g., +1) with respect to each of the first stabilizer and the second stabilizer.Middle-Out Color Code Circuits

[0073] Various surface code circuits may be constructed by starting from a surface code state in the middle of the cycle (halfway between two measurements), instead of the state at the end of the cycle (during the measurements). The resulting constructions work in an inline fashion, using no ancilla qubits, where stabilizers are folded down to single qubits to be measured and then unfolded back into their original form. Middle-out embodiments employ a similar idea to a color code.

[0074] FIG. 4A shows an inline folding circuit 400 that may be employed in middle-out embodiments. More particularly, the inline folding circuit 400 may be employed in a two- cycle middle-out circuit for a single hexagon in a color code of the embodiments. To fold a 6-body stabilizer down to a single qubit, initially, a first pair of CNOT gates is applied to two data qubits. The first pair of CNOTs fold the 6-body stabilizer into a 4-body stabilizer. Note that, because each of these CNOT gates runs along two hexagons, in a full color code, each CNOT gate is involved in folding two different stabilizers. A second pair of CNOT gates is used to fold the 4-body stabilizer into a 2-body stabilizer. The second pair of CNOTs are also folding two stabilizers instead of one, in a full circuit context. A final CNOT is used to fold the 2-body stabilizer into a 1-body stabilizer. (These final CNOTs aren’t folding two stabilizers at once.) The 1-body stabilizers can then be measured using normal measurement gates, and the CNOTs can be replayed in reversed order to unfold the stabilizers back into their original form. This process measures half of the stabilizers of the color code. As shown in the inline folding circuit 400, the same process then plays out again, but with the roles of the X and Z bases swapped, to measure the other half of the stabilizers.

[0075] FIGS. 4B-4E show one cycle of a middle-out circuit 410 over a full color code, according to various embodiments. More particularly, the one cycle of the middle-out circuit 410 includes detector slices of a contracting X basis detector (e.g., the stabilizer that is highlighted in lighter shading) and a contracting Z basis detector (e.g., the stabilizer that is highlighted in darker shading). At the midpoint 412 (as shown in FIG. 4C). a detector slice of all detectors being contracted by this cycle is shown, revealing half of the color code state. During the first half of the cycle of a middle-out circuit 410, the shown stabilizers are transforming from the five body operators of a pyramid code into the six body operators of a color code. During the second half of the cycle of a middle-out circuit 410, the shown stabilizers are contracting into single qubit operators that can be directly measured.

[0076] Because the middle-out circuit has no flag qubits, there are hook errors that expand into multiple data errors. These hook errors cut the code distance of the circuit in half. However, the middle-out circuit has benefits that make up for this cost. The full circuit is built by alternating between this cycle and its reverse.

[0077] A first benefit of the middle-out circuit is that, because it has no ancilla qubits, it can make a bigger color code given the same total number of qubits. In a color code circuit with two ancilla qubits per hexagon, half the qubits in the system are measurement qubits. Instead of spending 50% of its allocated qubits on mitigating hook errors with flags, the middle-out circuit builds a bigger color code. The middle-out circuit’s version of flag qubits is more color code. This recovers a factor of V2 of the factor 2 loss in code distance.

[0078] A second benefit of the middle-out circuit is its compactness. Detectors in the middle-out circuit are smaller and thus less noisy than detectors in previous color code circuits. For example, one way to quantify the size of a detector is to count how many layers of the circuit contain an error that can flip the detector. Detectors in the inline folding circuit 400 (e.g.. for middle-out embodiments) span 16 layers; 20% less than the other circuits show n in FIGS. 3A-3B. Another way to quantify how noisy detectors are is to count the number of CNOT gates per stabilizer measurement. The inline folding circuit 400 has 6 CNOTs per stabilizer measurement, which is 15% less than the other circuits shown in FIGS. 3A-3B (when not counting flag measurements as stabilizer measurements).

[0079] The third benefit of the middle-out circuit is its simpler connectivity: a hex grid with 3 neighbors per qubit instead of a square grid with 4 neighbors per qubit. This has no effect on performing simulations but can be a relevant factor for experimental implementations. For example, the degree of connectivity can affect crosstalk between qubits.

[0080] The inline folding circuit 400 of FIG. 4A demonstrates various methods of operating a quantum computing system (QCS) that includes a set of physical qubits (PQs). The methods implemented by the inline folding circuit 400 are middle-out (or inline) embodiments. The methods of the inline embodiments include implementing a quantum error correction (QEC) code (e.g., a color code). The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. The second stabilizer also stabilizes the quantum state. The first stabilizer corresponds to a first basis of a set of qubit bases. The second stabilizer corresponds to a second basis of the set of qubit bases. Implementing the QEC code includes operating a quantum circuit that performs operations. The operations of the quantum circuit includeiteratively folding the first stabilizer down from the first subset of PQs onto a first PQ of the first subset of PQs. The first PQ encodes a first bit that corresponds to a first parity of a set of quantum parities of the quantum state. The first parity of the quantum state is associated with the second basis. The first PQ is measured in the first basis. The second stabilizer is iteratively folded dow n from the first subset of PQs onto the first PQ. The first PQ encodes a second bit that corresponds to a second parity of the set of quantum parities. The second parity of the quantum state is associated with the first basis. The first PQ is measured in the second basis.

[0081] The QEC code may be a color code. The first bit is a first classical bit. The second bit is a second classical bit. The set of PQs forms a first logical qubit (LQ) of the color code. The color code includes a set of plaquettes of the first LQ. The first subset of PQs forms a first plaquette of the set of plaquettes. Each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette. The first plaquette has no ancilla qubits.

[0082] As shown by the inline folding circuit 400, iteratively folding the first stabilizer down onto the first PQ includes performing a first controlled-NOT (CNOT) operation on a fifth PQ of the subset of PQs and a third PQ of the subset of PQs. The fifth PQ is a control qubit of the first CNOT operation. The third PQ is a target qubit of the first CNOT operation. A second CNOT operation is performed on a sixth PQ of the subset of PQs and a fourth PQ of the subset of PQs. The sixth PQ is a control qubit of the second CNOT operation. The fourth PQ is a target qubit of the second CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a third CNOT operation is performed on the third PQ and the first PQ. The third PQ is a control qubit of the third CNOT operation. The first PQ is a target qubit of the third CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a fourth CNOT operation is performed on the fourth PQ and a second PQ of the first subset of PQs. The fourth PQ is a control qubit of the fourth CNOT operation. The second PQ is a target qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on the second PQ and the first PQ. The first PQ encodes the first bit. The first bit corresponds to the first parity of the quantum state. The first state corresponds to the first basis. The second PQ is a control qubit of the fifth CNOT operation. The first PQ is a target qubit of the fifth CNOT operation.

[0083] As shown by the inline folding circuit 400. iteratively folding the second stabilizer down onto the first PQ includes performing a first controlled-NOT (CNOT) operation on asixth PQ of the subset of PQs and a fourth PQ of the subset of PQs. The sixth PQ is a target qubit of the first CNOT operation. The fourth PQ is a control qubit of the first CNOT operation. A second CNOT operation is performed on a fifth PQ of the subset of PQs and a third PQ of the subset of PQs. The fifth PQ is a target qubit of the second CNOT operation. The third PQ is a control qubit of the second CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a third CNOT operation is performed on the fourth PQ and a second PQ of the first subset of PQs. The fourth PQ is a target qubit of the third CNOT operation. The second PQ is a control qubit of the third CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a fourth CNOT operation is performed on the third PQ and the first PQ. The third PQ is a target qubit of the fourth CNOT operation. The first PQ is a control qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on the second PQ and the first PQ. The first PQ encodes the second bit. The second bit corresponds to the second parity of the quantum state. The quantum state corresponds to the second basis. The second PQ is a target qubit of the fifth CNOT operation. The first PQ is a control qubit of the fifth CNOT operation.

[0084] As shown by the inline folding circuit 400, the operations of the quantum circuit further include subsequent to measuring the first PQ in the first basis and prior to folding the second stabilizer down, resetting the first PQ in a first state of the first basis (e.g., |0)). Subsequent to resetting the first PQ in the first state of the first basis and prior to folding the second stabilizer down, the first stabilizer is iteratively unfolded from the first PQ to the first subset of PQs. The first subset of PQs encodes the quantum state. Subsequent to measuring the first PQ in the second basis, the first PQ is reset in a first state of the second basis (e.g., |+)). Subsequent to resetting the first PQ in the first state of the second basis, the second stabilizer is iteratively unfolded from the first PQ to the first subset of PQs such that the first subset of PQs encodes the quantum state.

[0085] As shown by the inline folding circuit 400, iteratively unfolding the first stabilizer from the first PQ to the first subset of PQs includes performing a first controlled-NOT (CNOT) operation on a second PQ of the first subset of PQs and the first PQ. The second PQ is a control qubit of the first CNOT operation. The first PQ is a target qubit of the first CNOT operation. Subsequent to performing the first CNOT operation, a second CNOT operation is performed on a third PQ of the subset of PQs and the first PQ. The third PQ is a control qubit of the second CNOT operation. The first PQ is a target qubit of the second CNOT operation. Subsequent to performing the first CNOT operation, a third CNOToperation is performed on a fourth PQ of the first subset of PQs and the second PQ. The fourth PQ is a control qubit of the third CNOT operation. The second PQ is a target qubit of the third CNOT operation. Subsequent to performing the second CNOT operation and the third CNOT operation, a fourth CNOT operation is performed on a fifth PQ of the first subset of PQs and the third PQ. The fifth PQ is a control qubit of the fourth CNOT operation. The third PQ is a target qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on a sixth PQ of the first subset of PQs and the fourth PQ. The first subset of PQs encodes the quantum state. The sixth PQ is a control qubit of the fifth CNOT operation. The fourth PQ is a target qubit of the fifth CNOT operation.

[0086] As shown by the inline folding circuit 400. iteratively unfolding the second stabilizer from the first PQ to the first subset of PQs includes performing a first controlled- NOT (CNOT) operation on a second PQ of the first subset of PQs and the first PQ. The second PQ is a target qubit of the first CNOT operation. The first PQ is a control qubit of the first CNOT operation. Subsequent to performing the first CNOT operation, a second CNOT operation is performed on a fourth PQ of the subset of PQs and the second PQ. The fourth PQ is a target qubit of the second CNOT operation. The second PQ is a control qubit of the second CNOT operation. Subsequent to performing the first CNOT operation, a third CNOT operation is performed on a third PQ of the first subset of PQs and the first PQ. The third PQ is a target qubit of the third CNOT operation. The first PQ is a control qubit of the third CNOT operation. Subsequent to performing the second CNOT operation and the third CNOT operation, a fourth CNOT operation is performed on a sixth PQ of the first subset of PQs and the fourth PQ. The sixth PQ is a target qubit of the fourth CNOT operation. The fourth PQ is a control qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on a fifth PQ of the first subset of PQs and the third PQ. The first subset of PQs encodes the quantum state. The fifth PQ is a target qubit of the fifth CNOT operation. The third PQ is a control qubit of the fifth CNOT operation.Distance vs. Compactness

[0087] Circuit constructions for both superdense and middle-out embodiments may fail to achieve the full code distance of the standard color code. However, at physically plausible noise strengths, it’s often more important to be compact than to have the best possible code distance.

[0088] For example, consider a circuit that was made more compact at the cost of halving the code distance. In simulations, the more compact circuit had a better threshold, and performed better at a gate error rate of 0. 1 %, but performed worse for gate error rates of 0.01%. Code distance dominates in the limit of low noise. However, for realistic noise, other factors can be more important. For example, a less compact circuit will have a higher background detection fraction, which reduces the number of additional errors above expectation that are needed to create a logical error. The circuits of the embodiments outperform previous work at a noise strength of 0.1 % but are worse at a noise strength of 0.01%.Pyramid Codes

[0089] The term "‘cousins” (or '‘cousin codes”) may be applied to two (or mode) QEC codes that appear as intermediate states of the same fault tolerant circuit. Investigating cousin codes is a useful way to get new perspectives on old codes. Although cousins may look different, the fact that they can be implemented by the same circuit implies strong similarities. For example, because the color code has a transversal S gate, its cousins all have a constant-depth fault-tolerant S gate.

[0090] In a middle-out color code circuit (e.g., the inline folding circuit 400 of FIG. 4A), the color code state appears halfway through the measurement cycle. For instance, see the midpoint 412 (e.g.. as shown in FIG. 4C) of the one cycle of the middle-out circuit 410 of FIGS. 4B-4E. At the end of the measurement cycle, a different code appears; one made up of 5-body stabilizers. This 5-body code may be referred to as a “pyramid code", because the weight-5 stabilizers can be visualized as interlocking square-based pyramids. FIGS. 5A-5B show various representations of a pyramid code 500, according to various embodiments. More particularly, the “upper rows” in FIGS. 5A-5B show various 2D representations 510 of the pyramid code 500, while the “lower rows” in FIGS. 5A-5B shows various 3D representations 520 of the pyramid code 500. Both the 2D representations 510 and the 3D representations 520 include representations of all stabilizers 502, the X stabilizers 504. the Z stabilizers 506. three-colored X stabilizers 512 and three-colored Z stabilizers 516.

[0091] Because the pyramid code and the color code both appear as intermediate states of the middle-out circuit, they are cousins. Each stabilizer in the bulk is a five-body operator. Although the pyramid code 500 is defined on a 2D plane (e.g., see the 2D representations 510). the stabilizers may be easier conveyed by drawing them as interlocking square-based pyramids with qubits at the vertices of the pyramids (e.g., see 3D representations 520). Notethat this pyramid code 500 has different boundary conditions from the pyramid code that appears during the middle-out color code circuit (e.g.. see the one cycle of the middle-out circuit 410 of FIGS. 4B-4E).

[0092] An interesting property of the pyramid code 500 is that, in each basis, it alternates between color code-like columns of qubits (where errors cause three vertically-adjacent detection events) and surface-code-like columns of qubits (where errors cause two horizontally-adjacent detection events). In other words, in a pyramid code, the property that makes decoding color codes difficult is no longer 2D. It has been squeezed into ID stripes. This property' may provide for different methods for decoding color codes.Decoding Detection Events Generated in the Color Codes of the Embodiments

[0093] For decoding the color codes of the embodiments, the embodiments additionally include a novel decoder. More specifically, the embodiments include a Mobius decoder that is adapted to the color codes of the embodiments. The Mobius decoders of the embodiments are color code decoders that work by splitting the decoding problem into three parts: the not- red part, the not-green part, and the not-blue part. This splitting technique is similar to one used in restrict on decoders, except that the Mobius decoder of the embodiments join the three parts together at the boundaries of the color code. The benefit of spliting into parts is that the parts can be decoded by a minimum weight matching decoder, and the edges used in the matching can then be lifted into a full solution to the color code problem. The benefit of joining the parts at the boundaries is that it more accurately weighs the relative costs of matching detection events to a boundary' rather than matching a boundary' detection event to other detection events in the bulk (e.g., bulk detection events).

[0094] The task of implementing a Mobius decoder of the embodiments can be split into two main parts: (1) mapping color code errors into Mobius errors to produce the model used by the underlying matching decoder and (2) lifting the solution produced by the matching decoder into a full solution. Some decoders of the embodiments use Py Matching to solve the matching problems produced by mapping. The decoding tasks of mapping and lifting, as well as the requirements for these steps to work are detailed below.Mapping Color Code Errors to Mobius Errors

[0095] Embodiments map color code errors into Mobius errors by spliting each symptom into two parts, and then grouping the split symptoms into pairs. Each pair will be an edge in a Mobius matching graph used to configure the minimum weight matcher. There are four keytypes of errors that need to be mapped in this way: bulk errors, boundary errors, comer errors, and shift errors. The mapping of each of these errors into Mobius errors is shown below via example.

[0096] As discussed above, in a color code, a single “bulk” error generates a detection event in three separate polygons that share the data qubit that is affected by the error. When a detection event is generated for a polygon, it may be said that the error “highlights” or “triggers” the polygon. Thus, in a color code, a single error may highlight or trigger three polygons that share the data qubit. Due to the coloring of the shapes, facets, or polygons of a color code, each of the three highlighted polygons is a different color. Thus, a bulk error has one symptom of each color: a red symptom r, a green symptom g, and a blue symptom b. The error may be described as an instruction "errorty) r g b”, where p is the probability of the error and r g b are the symptoms (or syndromes). To map this error into a matchable error, the red symptom r is copied into the not-green subgraph and the not-blue subgraph of the matching problem (but not the not-red subgraph, since r is red). This splits r into two symptoms (i.e., not-green and not-blue). The following notation is adopted throughout: “r!G” and “r!B” (r is split into not-green (r!G) and non-blue(r!B) “. Similarly, g splits into “g!R” and “g!B” (g splits into not-red and not-blue). Likewise, b splits into “b!G” and “b!R” (b splits into not-green and not-red). Splitting the symptoms (or syndromes) produces a degree 6 error “error(p) r!B r!G g!R g!B b!R b!G”. This error can be decomposed into edges by grouping the symptoms by subgraph. This produces the composite error “error(p) g!R b!R ® r!G b!G © r!B g!B”, where “©” is used as a group separator. A decoder such as Pymatching can approximate this composite error as three independent edge-like error mechanisms “error(p) g!R b!R”, “error(p) r!G b!G”, and “error(p) r!B g!B”, in order to perform matching.

[0097] A boundary error (e.g., an error occurring on a boundary of the logical qubit) has two symptoms, each with a different color. Consider a boundary error “error(p) r g”, occurring at the red-green boundary of the color code. Splitting the symptoms produces the degree 4 error “error(p) r!B r!G g!R g!B”. The “r!B g!B” symptoms are paired together because they are from the same subgraph. This leaves the “r!G g!R” symptoms, which are paired together because they are all that’s left and boundary edges (degree 1 errors) may be avoided in the Mobius matching graph. Thus the color code error “error(p) r g” becomes the mobius matching error “error(p) r!B g!B © r!G g!R”. Note how the “r!G g!R” component is linking the not-red and not-green subgraphs at the red-green boundary.

[0098] A comer error has one symptom (e.g., a comer data qubit that is included in only a single polygon). Consider the comer error “error(p) r”, occurring at the red comer of a color code. It splits into the error “error(p) r!G r!B”. This error doesn’t require decomposing into groups, because it already corresponds to an edge. However, when testing, it was found that squaring the probability of comer errors improved the logical error rate. So “error(p) r” is mapped to the Mobius matching error “error(p*p) r!G r!B” instead of to “error(p) r!G r!B”. Manipulating the probabilities of other types of errors may not be as beneficial.

[0099] A shift error has two symptoms of the same color. For example, measurement errors usually correspond to shift errors. Consider the shift error "error(p) rl r2”. It splits into the error “error(p) rl!G rl !B r2!G r2!B”. These symptoms are grouped by subgraph, producing the Mobius matching error “error(p) rl!G r2!G © rl !B r2!B.”

[0100] Errors that are combinations of basic errors can also occur. For example, a Y error on a data qubit in the bulk will produce six symptoms: three that match an X error on that data qubit and three that match a Z error on that data qubit. The Y error can be mapped into a Mobius error by realizing it decomposes into these basic X and Z parts and producing a Mobius error equal to the combination of the Mobius errors of its parts.

[0101] The error mapping procedure can be somewhat expensive. However, it’s only performed once, when configuring the decoder. At runtime, when decoding a shot, the work required for mapping is minimal. The indexing of Mobius detection events can be arranged such that a color code detection event index k always splits into mobius detection events with indices 2k and 2k+l. So the mapping work done during a shot is just a straightforward doubling of the detection events.Lifting a Matching to a Full Solution

[0102] To lift a Mobius matching into a full solution, even under circuit noise, the embodiments employ a different conceptual strategy than in previous work. Throughout, this new strategy is referred to as “tour dragging”. Tour dragging moves detection events along Euler tours of the matching, merging detection events when they meet and potentially changing them at boundaries.

[0103] The solution to a Mobius matching problem is a set of edges forming paths between detection events. Consider the subgraph corresponding to just the edges included in the matching. This subgraph may be “flattened” by removing the information about which part of the Mobius matching problem the edge came from. For example, the edge “r!B g!B”and the edge “r!G g!R'’ both flatten into the edge “r g”. This flattened subgraph may be referred to as '’flattened matching’7graph (or subgraph).

[0104] In a flattened matching graph, all nodes are guaranteed to have an even degree. A valid matching requires that all unexcited nodes are adjacent to an even number of match edges (have even degree in the matching), and all excited nodes are adjacent to an odd number of match edges (have odd degree in the matching). Flattening unexcited nodes combines two even degree nodes, producing an even degree node. Flattening excited nodes combines two odd degree nodes, producing an even degree node.

[0105] Because all nodes in the flattened matching graph have an even degree, the flattened matching graph’s connected components have Euler tours. Each connected component may be solved separately, and each component may be solved by traveling around its Euler tour while dragging detection events.

[0106] When dragging a detection event around an Euler tour, the invariant that the detection event is nearby may be maintained. For the following discussion, it is assumed that an "‘agent” travels around the graph. During the tour, if the agent is standing on a detector of the same color as the detection event, the detection event will be on that detector. If the detector is a different color from the detection event, the detection event will be on an adjacent detector. When the tour reaches a detection event, the agent may grab that detection event. Anytime there is two detection events, they may be combined. If they have the same color, this cancels them out. If they have different colors, a bulk error is used to combine them into a single detection event of the remaining color. When reaching a boundary, the option of ignoring the boundary or using it to gain a detection event may be taken. This may be merged with what is being dragged. The overall goal is to find a set of actions that produces a self-consistent tour.

[0107] FIG. 6 shows a matching graph 600, according to various embodiments. Matching graph 600 is provided to show an example of the lifting process, as discussed above. In graph 600, there is a blue detection event “b” near a red-green boundary. A matcher module of the decoder has returned the matching shown in matching graph 600.

[0108] The matching in matching graph 600 has seven edges: b!G:rl !G, rl !G:b2!G, b2!G:r2!G, r2!G:g2!R, g2!R:b2!R, b2!R:gl !R, and gl !R:b!R. The edges flatten into the Euler tour b, rl, b2, r2, g2, b2, gl, [repeat]. Following the Euler tour, starting at b, the detection event is grabbed. Reaching rl , nothing happens because the detection event being dragged is still nearby and is a different color than rl (blue instead of red). Reaching b2, the detection event needs to be dragged from b to b2 because b2’s color matches the dragged detectionevent’s color. How to do this dragging will have been presolved while configuring the decoder; in this case it’s done by inserting ‘"error b2 gl rl” and “error b gl rl” into the set of predicted errors. Reaching g2, nothing happens because the dragged detection event is still nearby but has a different color. Crossing to r2, a complication occurs: the g2-to-r2 match edge has contributions from both a bulk error (which preserves net color) and a boundary error (which doesn’t). This means there is a choice: the dragged detection event can either be kept (the bulk case) or discharged (the boundary case). Some decoders of the embodiments work by tracking both possibilities forw ard, ultimately keeping only the one that was self- consistent at the end of the tour. For this example, the correct choice is to dump the blue excitation into the boundary. The way to dump the excitation into the boundary will have been pre-solved at configuration time; in this case it’s achieved by inserting “error b2 g2 r2” and “error b2 r2” into the set of predicted errors. For the rest of the Euler tour, since no detection event is being dragged, nothing of interest occurs. At the end of the tour, upon returning to b, it may be verified that a detection event is still not being dragged. This certifies that a valid solution was found.

[0109] Because of the branching choices available at boundaries, there can in principle be an exponentially large space of solutions for the lifting process to explore. However, at a given point in the tour there may be four possible states: dragging no excitation, dragging a red excitation, dragging a green excitation, or dragging a blue excitation. Therefore, a valid solution can be found in linear time by using dynamic programming. Some embodiments find a minimal solution instead of any solution. In some embodiments, all the options will be topologically equivalent. Also, the task of weighing topologically distinct solutions should already have been done by the matcher module, so it would be redundant to do it again. (Furthermore, in practice, complex cases are exponentially rare because forming large clusters requires many nearby errors).

[0110] Beware that there are a variety of comer cases that can occur while dragging detection events around the Euler tours. For example, a tour may form a “figure eight” shape and revisit a node. When this occurs on a node containing a detection event, a potential bug is for the decoder to pick up the same detection event twice. Another comer case is that, when crossing a shift error of a different color than the detection event being dragged, the decoder may know how to find a nearby shift error that matches the color of the detection event being dragged in order to keep it near the current location of the tour.Requirements and Assumptions of the Decoders of the Embodiments

[0111] The decoders of the embodiments may be configured using a stim detector error model, which is a representation of a Tanner graph that stim can derive from annotated circuits. There are four key requirements that a detector error model may meet for it to be decodable by decoders of the embodiments: annotated detectors, rainbow triplets, moveable excitations, and matchable-avoids-color.

[0112] The annotated detectors requirement is that detectors may be annotated with a basis and color. This is done via the coordinate data of the detector. The 4th coordinate of a detector may be set to 0 (basis=X, color=red), 1 (basis=X, color=green), 2 (basis=X, color=blue), 3 (basis=Z, color=red), 4 (basis=Z, color=green), or 5 (basis=Z, color=blue). For example, the detector error model instruction ”deteclor(0. 0, 0, 5) DIO” indicates that the detector with index 10 is a blue Z-basis detector.

[0113] The rainbow triplets requirement is that, when a basic bulk error has three symptoms, each symptom must have a different color. If an error with three symptoms repeats a color, a decoder may attempt to decompose it into other errors. This can succeed at boundaries, but may fail in the bulk. Using each color exactly once is important because it ensures bulk errors have neutral charge (r = g = b (mod 2)).

[0114] The moveable excitations requirement is that it should be possible to locally solve for how to drag excitations around the bulk. In practical terms, this means that it is possible to form shift errors by combining adjacent bulk errors.

[0115] The matchable-avoids-color property requires the matchable parts of a circuit to avoid using at least one of the three colors. For example, if performing lattice surgery between a color code and a surface code, the surface code part may only use one or two colors. To understand why this is required, suppose that, within the bulk of a matchable region, there were three detectors near each other with each being a different color. When a detector of the embodiments is given a shot with exactly these three detectors activated, the mapping step will produce a Mobius problem where the not-blue, not-red, and not-green subgraphs each get two of the split detection events. Py Matching will then, within each subgraph, match the pairs of detection events to each other. This is a problem because, in a matching problem with an odd number of detection events, at least one must be matched to the boundary'. But the solution found by PyMatching didn’t touch any boundaries, meaning the lifting step (via PyMatching) fails to find a full solution.

[0116] An example of a circuit that meets all these requirements (but isn’t a color code) is a circuit for a pyramid code (e.g., see FIG. 5). A pyramid code may not look like a colorcode, but its bulk errors use each color exactly once and they pair up into shift errors. Therefore, pyramid codes can be decoded via the decoders of the embodiments.Example Methods for Operating a Quantum Computing System

[0117] FIG. 7 depicts a flow chart diagram of an example method 700 for operating a quantum computing system (QCS), according to various embodiments. Method 700 may be implemented for both superdense coding embodiments and middle-out (or inline) embodiments. The QCS includes a set of physical qubits (PQs). Method 700 begins at block 702, where a quantum error correction (QEC) code is implemented. The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. The second stabilizer also stabilizes the quantum state. The first stabilizer corresponds to a first basis of a set of qubit bases. The second stabilizer corresponds to a second basis of the set of qubit bases. In block 704, the QEC code is implemented by operating a quantum circuit. The operations of the quantum circuit for superdense coding embodiments are provided via the lefthand path 710 of method 700. The operations of the quantum circuit for inline (or middle out) embodiments are provided via the righthand path 730 of method 700.

[0118] The superdense coding embodiments will be discussed first, by following the lefthand path 710 such that the operations of the quantum circuit of method 700 proceeds from block 704 to block 712. At block 712. a first qubit-pair of the set of PQs is prepared in a maximally-entangled state. At block 714, a first bit and a second bit are encoded in a first qubit-pair of the set of PQs. The first bit corresponds to a first parity of a set of quantum parities of the quantum state. The first parity is associated with the second basis. The second bit corresponds to a second parity of the set of quantum parities. The second parity’ is associated with the first basis. Operating the quantum circuit (e.g., at block 714) multiplexes measurements of the first parity and the second parity via basis multiplexing. At block 716, a first ancilla qubit of the first qubit pair is measured in the first basis. At block 718, a second ancilla qubit of the first qubit pair is measured in the second basis. At block 720, the first ancilla qubit is reset in the first basis. At block 722, the second ancilla qubit is reset in the second basis.

[0119] The middle-out (or inline) embodiments will now be discussed, by following the righthand path 730 such that the operations of the quantum circuit of method 700 proceeds from block 704 to block 732. At block 732. the first stabilizer is iteratively folded down from the first subset of PQs onto a first PQ of the first subset of PQs. The first PQ encodes a firstbit that corresponds to a first parity of a set of quantum parities of the quantum state. The first parity of the quantum state is associated with the second basis. At block 734, the first PQ is measured in the first basis. At block 736, the first PQ is reset in the first basis. At block 738, the first stabilizer is iteratively unfolded from the first PQ to the first subset of PQs. At block 740, the second stabilizer is iteratively folded down from the first subset of PQs onto the first PQ. The first PQ encodes a second bit that corresponds to a second parity of the set of quantum parities. The second parity of the quantum state is associated with the first basis. At block 742, the first PQ is measured in the second basis. At block 744, the first PQ is reset in the second basis. At block 746, the second stabilizer is iteratively unfolded from the first PQ to the subset of PQs.Additional Embodiments

[0120] A method of operating a quantum computing system (QCS) is disclosed. The QCS includes a set of physical qubits (PQs). The methods implemented by the Bell multiplexing circuit 320 and the Bell flagging circuits are superdense coding embodiments. The methods of the superdense coding embodiments include implementing a quantum error correction (QEC) code (e.g., a color code). The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. For instance, the first subset of PQs may include the set of six data qubits located at the vertices of the hexagonal plaquette. The second stabilizer also stabilizes the quantum state of the first subset of PQs. The first stabilizer corresponds to a first basis (e g., a Z-basis) of a set of qubit bases. The second stabilizer corresponds to a second basis (e.g., an X-basis) of the set of qubit bases. Thus, each of the first stabilizer and the second stabilizer may be weight-6 stabilizers. For instance, the first stabilizer may include the product of six Pauli operators of a first type (e.g., ZZZZZZ). The second stabilizer may include the product of six Pauli operators of a second type (e.g., XXXXXX).

[0121] Implementing the QEC code includes operating a quantum circuit. The quantum circuit encodes a first bit and a second bit in a first qubit-pair of the set of PQs. For instance, the first qubit-pair may include the two ancilla qubits located in the interior of the hexagonal plaquette. The first bit corresponds to a first parity of a set of quantum parities of the quantum state. The first parity7is associated with the second basis. For instance, the first parity may be a bit-flip parity' that corresponds to 7T-rotations about the X-basis. The second bit corresponds to a second parity of the set of quantum parities. The second parity’ is associated with the first basis. For instance, the second parity may be a phase-flip parity thatcorresponds to TT -rotations about the Z-basis. As shown in FIG. 3B, operating the quantum circuit multiplexes measurements of the first parity and the second parity via basis multiplexing.

[0122] The QEC code may be a color code. The first bit is a first classical bit. The second bit is a second classical bit. The set of PQs forms a first logical qubit (LQ) of the color code. The color code includes a set of plaquettes of the first LQ. The first subset of PQs forms a first plaquette of the set of plaquettes. Each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette. The first qubit-pair includes a first ancilla qubit of a set of ancilla qubits of the first plaquette and a second ancilla qubit of the set of ancilla qubits of the first plaquette.

[0123] The first plaquette is a hexagonal plaquette. Each data qubit of the set of data qubits is located at a separate vertex of a set of vertices of the hexagonal plaquette. Each ancilla qubit of the set of ancilla qubits is located in an interior of the hexagonal plaquette. The quantum circuit includes a set of multi-qubit gates (e.g., CNOT gates). Each multi-qubit gate of the set of multi-qubit gates couples an ancilla qubit of the set of ancilla qubits to a separate data qubit of the set of data qubits or to another ancilla qubit of the set of ancilla qubits. The quantum circuit prepares the set of ancilla qubits in a Bell state.

[0124] Operating the quantum circuit further includes preparing the first qubit-pair in a maximally -entangled two-qubit state (e.g., a Bell state). The first bit and the second bit in the maximally-entangled two-qubit pair are encoded via a superdense coding protocol. The superdense coding protocol multiplexes the first basis and the second basis. Multiplexing the first basis and the second basis includes employing controlled-bit flips to encode the first bit in the maximally-entangled two-qubit state and employing controlled-phase flips to encode the second bit in the maximally-entangled two-qubit state.

[0125] The superdense coding protocol includes subsequent to encoding the first bit and the second bit in the maximally-entangled two-qubit pair, performing a first measurement operation, in the first basis, on a first ancilla qubit of the maximally-entangled two-qubit pair. Additionally, subsequent to encoding the first bit and the second bit in the maximally- entangled two-qubit pair, a second measurement operation, in the second basis, is performed on a second ancilla qubit of the maximally-entangled two-qubit pair.

[0126] As noted above, the maximally-entangled two-qubit pair may be a Bell state (e.g., |<f+)). The superdense coding protocol further includes prior to preparing the Bell state, performing a first qubit-resetting operation on the first ancilla qubit. The first qubit resettingoperation resets the first ancilla qubit in a first state of the first basis (e.g., 10)). Prior to preparing the Bell state, a second qubit-resetting operation is performed on the second ancilla qubit. The second qubit resetting operation resets the second ancilla qubit in a first state of the second basis (e.g., |+)). Subsequent to performing the first qubit-resetting operation and the second qubit-resetting operation and prior to measuring the first ancilla qubit and the second ancilla qubit, a first controlled-NOT (CNOT) operation is performed. The first ancilla qubit is a control qubit of the first CNOT operation. The second ancilla qubit is the target qubit of the first CNOT operation. The first CNOT operation prepares the Bell state encoded in the first ancilla qubit and the second ancilla qubit. Subsequent to preparing the Bell state, a second CNOT operation is performed. A sixth data qubit of the first subset of PQs is a control qubit of the second CNOT operation. The first ancilla qubit is a target qubit of the second CNOT operation. Subsequent to preparing the Bell state, a third CNOT operation is performed. A first data qubit of the first subset of PQs is a control qubit of the third CNOT operation. The second ancilla qubit is a target qubit of the third CNOT operation. Subsequent to preparing the Bell state, a fourth CNOT operation is performed. A fifth data qubit of the first subset of PQs is a control qubit of the fourth CNOT operation. The first ancilla qubit is a target qubit of the fourth CNOT operation. Subsequent to preparing the Bell state, a fifth CNOT operation is performed. A second data qubit of the first subset of PQs is a control qubit of the fifth CNOT operation. The second ancilla qubit is a target qubit of the fifth CNOT operation. Subsequent to prepanng the Bell state, a sixth CNOT operation is performed. A fourth data qubit of the first subset of PQs is a control qubit of the sixth CNOT operation. The first ancilla qubit is a target qubit of the sixth CNOT operation. Subsequent to preparing the Bell state, a seventh CNOT operation is performed. A third data qubit of the first subset of PQs is a control qubit of the seventh CNOT operation. The second ancilla qubit is a target qubit of the seventh CNOT operation.

[0127] The superdense coding protocol further includes, subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing an eighth CNOT operation. The sixth data qubit is a target qubit of the eighth CNOT operation. The first ancilla qubit is a control qubit of the eighth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a ninth CNOT operation is performed. The first data qubit is a target qubit of the ninth CNOT operation. The second ancilla qubit is a control qubit of the ninth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a tenth CNOT operation is performed. The fifth data qubit is a target qubit of the tenth CNOT operation. The firstancilla qubit is a control qubit of the tenth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, an eleventh CNOT operation is performed. The second data qubit is a target qubit of the eleventh CNOT operation. The second ancilla qubit is a control qubit of the eleventh CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a twelfth CNOT operation is performed. The fourth data qubit is a target qubit of the twelfth CNOT operation. The first ancilla qubit is a control qubit of the twelfth CNOT operation. Subsequent to performing the sixth CNOT operation and the seventh CNOT operation, a thirteenth CNOT operation is performed. The third data qubit is a target qubit of the thirteenth CNOT operation. The second ancilla qubit is a control qubit of the thirteenth CNOT operation. Subsequent to performing the thirteenth CNOT operation, a fourteenth CNOT operation is performed. The second ancilla qubit is a control qubit of the fourteenth CNOT operation. The first ancilla qubit is a target qubit of the fourteenth CNOT operation.

[0128] The superdense coding protocol further includes, subsequent to performing the fourteenth CNOT operation, performing the first measurement operation, in the first basis, of the first ancilla qubit. The first basis may be Z-basis. Subsequent to performing the fourteenth CNOT operation, the second measurement operation is performed, in the second basis, of the second ancilla qubit. The second basis may be X-basis.

[0129] The superdense coding protocol further includes, subsequent to performing the sixth CNOT operation and the seventh CNOT operation and prior to performing the first measurement operation on the first ancilla qubit and the second measurement operation on the second ancilla qubit, performing a fifteenth CNOT operation. The second ancilla qubit is a control qubit of the fifteenth CNOT operation. The first ancilla qubit is a target qubit of the fifteenth CNOT operation. Subsequent to performing the fifteenth CNOT operation and prior to performing the eighth CNOT operation and the ninth CNOT operation, the first measurement operation is performed in the first basis, on the first ancilla qubit. The first basis is a Z-basis. Subsequent to performing the fifteenth CNOT operation and the seventh CNOT operation and prior to performing the eighth CNOT operation and the ninth CNOT operation, the second measurement operation is performed in the second basis and on the second ancilla qubit. The second basis is an X-basis. Subsequent to performing the first measurement operation on the first ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, a third qubit-resetting operation is performed on the first ancilla qubit. The third qubit resetting operation resets the first ancilla qubit in the first state of the first basis (e.g., 10)). Subsequent to performing the second measurementoperation on the second ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, a fourth qubit-resetting operation is performed on the second ancilla qubit. The fourth qubit resetting operation resets the second ancilla qubit in the first state of the second basis (e.g., | +)). Subsequent to performing the third qubit-resetting operation on the first ancilla qubit and the fourth qubit-resetting operation on the second ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, a sixteenth CNOT operation is performed. The second ancilla qubit is a control qubit of the sixteenth CNOT operation. The first ancilla qubit is a target qubit of the sixteenth CNOT operation. The sixteenth CNOT operation prepares a second Bell state (e.g., |<P+>) encoded in the first ancilla qubit and the second ancilla qubit. Subsequent to performing the fourteenth CNOT operation, a third measurement operation is performed in the first basis and on the first ancilla qubit. Subsequent to performing the fourteenth CNOT operation, a fourth measurement operation is in the second basis and on the second ancilla qubit.

[0130] In various embodiments, the first basis includes a first set of eigenstates (e.g., { |0), 11)}) of a first Pauli-operator (e.g., Z). The second basis includes a second set of eigenstates (e.g., { |+), |— )}) of a second Pauli-operator (e.g., X). The first parity and the first stabilizer correspond to the first Pauli-operator. The second parity and the second stabilizer correspond to the second Pauli-operator. The first stabilizer commutes with the second stabilizer. The quantum state is a simultaneous eigenstate of each of the first stabilizer and the second stabilizer. The simultaneous eigenstate has a common eigenvalue (e.g., +1) with respect to each of the first stabilizer and the second stabilizer.

[0131] Another method of the embodiments is a method of operating a quantum computing system (QCS) that includes a set of physical qubits (PQ). The method includes forming a logical qubit from the set of physical qubits. The logical qubit includes a first set of data qubits and a first set of ancilla qubits. The first set of data qubits is a first subset of the set of physical qubits. The first set of ancilla qubits is a second subset of the set of physical qubits. The method includes operating a quantum circuit on the logical qubit. The quantum circuit performs operations including generating a first entangled qubit pair from the first set of ancilla qubits. A superdense coding protocol is employed to encode a first classical bit and a second classical bit in the entangled qubit pair. The first classical bit corresponds to a first observable of a first operator. The first operator corresponds to the firstset of data qubits. The second classical bit corresponds to a second observable of a second operator. The second operator corresponds to the first set of data qubits.

[0132] The first operator is a first stabilizer of a quantum error correction (QEC) code. The first stabilizer stabilizes the first set of data qubits. The second operator is a second stabilizer of the QEC code. The second stabilizer also stabilizes the first set of data qubits. The first stabilizer commutes with the second stabilizer. The QEC code may be a topological color code.

[0133] The first stabilizer is formed by a product of a first Pauli-operator type operating on each data qubit of the first set of data qubits. The second stabilizer is formed by a product of a second Pauli-operator type operating on each data qubit of the first set of data qubits. The first Pauli-operator type anti-commutes with the second Pauli-operator type. The first Pauli-operator type is an X-operator. The second Pauli-operator type is a Z-operator. The set of physical qubits is arranged in a two-dimensional (2D) array.

[0134] Another method of the embodiments is a method for implementing a color code circuit on a quantum computing system (QCS). The QCS includes a set of qubits arranged in a 2D grid. The method includes constructing a color code circuit. The color code includes a set of stabilizers. At least a first pair of stabilizers from the set of stabilizers is an overlapping pair of stabilizers. The color code circuit is employed to multiplex a set of measurements of the overlapping pair of stabilizers on a resource of the QCS.

[0135] The resource of the QCS includes a first subset of the set of qubits. The first subset of qubits includes at least a first qubit and a second qubit, multiplexing the set of measurements includes accumulating a first measurement of the set of measurements on the first qubit and accumulating a second measurement of the set of measurements on the second qubit.

[0136] Multiplexing the set of measurements includes employing bit flips to accumulate a first measurement result of the set of measurements and controlled phase flips to accumulate a second measurement result of the set of measurements.

[0137] The color code is constructed via a polygonal tiling on the 2D grid of qubits. Each polygon tile corresponds to both an X-type and a Z-type stabilizer of the set of stabilizers.

[0138] Multiplexing the set of measurements includes employing superdense coding to accumulate a first measurement of the set of measurements at a first point in time and to accumulate a second measurement of the set of measurements at the first point in time.

[0139] Another method of the embodiments includes a method of operating a quantum computing system (QCS). The QCS includes a set of physical qubits (PQs). The methodincludes implementing a quantum error correction (QEC) code (e.g., a color code). The QEC code includes a first stabilizer and a second stabilizer. The first stabilizer stabilizes a quantum state of a first subset of the set of PQs. The second stabilizer stabilizes the quantum state. The first stabilizer corresponds to a first basis of a set of qubit bases. The second stabilizer corresponds to a second basis of the set of qubit bases. Implementing the QEC code includes operating a quantum circuit that performs operations. The operations of the quantum circuit include iteratively folding the first stabilizer down from the first subset of PQs onto a first PQ of the first subset of PQs. The first PQ encodes a first bit that corresponds to a first parity of a set of quantum parities of the quantum state. The first parity of the quantum state is associated with the second basis. The first PQ is measured in the first basis. The second stabilizer is iteratively folded down from the first subset of PQs onto the first PQ. The first PQ encodes a second bit that corresponds to a second parity of the set of quantum parities. The second parity of the quantum state is associated with the first basis. The first PQ is measured in the second basis.

[0140] The QEC code may be a color code. The first bit is a first classical bit. The second bit is a second classical bit. The set of PQs forms a first logical qubit (LQ) of the color code. The color code includes a set of plaquettes of the first LQ. The first subset of PQs forms a first plaquette of the set of plaquettes. Each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette. The first plaquette has no ancilla qubits.

[0141] Iteratively folding the first stabilizer down onto the first PQ includes performing a first controlled-NOT (CNOT) operation on a fifth PQ of the subset of PQs and a third PQ of the subset of PQs. The fifth PQ is a control qubit of the first CNOT operation. The third PQ is a target qubit of the first CNOT operation. A second CNOT operation is performed on a sixth PQ of the subset of PQs and a fourth PQ of the subset of PQs. The sixth PQ is a control qubit of the second CNOT operation. The fourth PQ is a target qubit of the second CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a third CNOT operation is performed on the third PQ and the first PQ. The third PQ is a control qubit of the third CNOT operation. The first PQ is a target qubit of the third CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a fourth CNOT operation is performed on the fourth PQ and a second PQ of the first subset of PQs. The fourth PQ is a control qubit of the fourth CNOT operation. The second PQ is a target qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performedon the second PQ and the first PQ. The first PQ encodes the first bit. The first bit corresponds to the first parity of the quantum state. The first state corresponds to the first basis. The second PQ is a control qubit of the fifth CNOT operation. The first PQ is a target qubit of the fifth CNOT operation.

[0142] Iteratively folding the second stabilizer down onto the first PQ includes performing a first controlled-NOT (CNOT) operation on a sixth PQ of the subset of PQs and a fourth PQ of the subset of PQs. The sixth PQ is a target qubit of the first CNOT operation. The fourth PQ is a control qubit of the first CNOT operation. A second CNOT operation is performed on a fifth PQ of the subset of PQs and a third PQ of the subset of PQs. The fifth PQ is a target qubit of the second CNOT operation. The third PQ is a control qubit of the second CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a third CNOT operation is performed on the fourth PQ and a second PQ of the first subset of PQs. The fourth PQ is a target qubit of the third CNOT operation. The second PQ is a control qubit of the third CNOT operation. Subsequent to performing the first CNOT operation and the second CNOT operation, a fourth CNOT operation is performed on the third PQ and the first PQ. The third PQ is a target qubit of the fourth CNOT operation. The first PQ is a control qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on the second PQ and the first PQ. The first PQ encodes the second bit. The second bit corresponds to the second parity of the quantum state. The quantum state corresponds to the second basis. The second PQ is a target qubit of the fifth CNOT operation. The first PQ is a control qubit of the fifth CNOT operation.

[0143] The operations of the quantum circuit further include subsequent to measuring the first PQ in the first basis and prior to folding the second stabilizer down, resetting the first PQ in a first state of the first basis (e.g., |0)). Subsequent to resetting the first PQ in the first state of the first basis and prior to folding the second stabilizer dow n, the first stabilizer is iteratively unfolded from the first PQ to the first subset of PQs. The first subset of PQs encodes the quantum state. Subsequent to measuring the first PQ in the second basis, the first PQ is reset in a first state of the second basis (e.g., |+)). Subsequent to resetting the first PQ in the first state of the second basis, the second stabilizer is iteratively unfolded from the first PQ to the first subset of PQs such that the first subset of PQs encodes the quantum state.

[0144] Iteratively unfolding the first stabilizer from the first PQ to the first subset of PQs includes performing a first controlled-NOT (CNOT) operation on a second PQ of the first subset of PQs and the first PQ. The second PQ is a control qubit of the first CNOT operation.The first PQ is a target qubit of the first CNOT operation. Subsequent to performing the first CNOT operation, a second CNOT operation is performed on a third PQ of the subset of PQs and the first PQ. The third PQ is a control qubit of the second CNOT operation. The first PQ is a target qubit of the second CNOT operation. Subsequent to performing the first CNOT operation, a third CNOT operation is performed on a fourth PQ of the first subset of PQs and the second PQ. The fourth PQ is a control qubit of the third CNOT operation. The second PQ is a target qubit of the third CNOT operation. Subsequent to performing the second CNOT operation and the third CNOT operation, a fourth CNOT operation is performed on a fifth PQ of the first subset of PQs and the third PQ. The fifth PQ is a control qubit of the fourth CNOT operation. The third PQ is a target qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on a sixth PQ of the first subset of PQs and the fourth PQ. The first subset of PQs encodes the quantum state. The sixth PQ is a control qubit of the fifth CNOT operation. The fourth PQ is a target qubit of the fifth CNOT operation.

[0145] Iteratively unfolding the second stabilizer from the first PQ to the first subset of PQs includes performing a first controlled-NOT (CNOT) operation on a second PQ of the first subset of PQs and the first PQ. The second PQ is a target qubit of the first CNOT operation. The first PQ is a control qubit of the first CNOT operation. Subsequent to performing the first CNOT operation, a second CNOT operation is performed on a fourth PQ of the subset of PQs and the second PQ. The fourth PQ is a target qubit of the second CNOT operation. The second PQ is a control qubit of the second CNOT operation. Subsequent to performing the first CNOT operation, a third CNOT operation is performed on a third PQ of the first subset of PQs and the first PQ. The third PQ is a target qubit of the third CNOT operation. The first PQ is a control qubit of the third CNOT operation. Subsequent to performing the second CNOT operation and the third CNOT operation, a fourth CNOT operation is performed on a sixth PQ of the first subset of PQs and the fourth PQ. The sixth PQ is a target qubit of the fourth CNOT operation. The fourth PQ is a control qubit of the fourth CNOT operation. Subsequent to performing the third CNOT operation and the fourth CNOT operation, a fifth CNOT operation is performed on a fifth PQ of the first subset of PQs and the third PQ. The first subset of PQs encodes the quantum state. The fifth PQ is a target qubit of the fifth CNOT operation. The third PQ is a control qubit of the fifth CNOT operation.

[0146] Another embodiment includes a method for implementing a color code circuit on a quantum computing system (QCS). The QCS includes a set of qubits arranged in a 2D grid.The method includes constructing a color code circuit. The color code includes a set of stabilizers. The set of stabilizers includes at least a first stabilizer. The first stabilizer has an original state corresponding to a first subset of the set of qubits. Each qubit of the first subset of qubits is a data qubit. The color code circuit is employed to iteratively fold down that first stabilizer to a final state that corresponds only to a first qubit of the first subset of qubits.

[0147] The method further includes performing a measurement of the first qubit. The color code circuit is employed to iteratively unfold the first stabilizer from the final state that corresponds only to the first qubit to the original state that corresponds to the first subset of qubits.

[0148] The first subset of qubits includes six qubits that correspond to a hexagon tile of the 2D grid.

[0149] Iteratively folding down the first subset of qubits includes employing the color code circuit to apply a first pair of CNOT gates to the original state of the first stabilizer. The first stabilizer is transformed from a six-body stabilizer to a four-body stabilizer.

[0150] Iteratively folding down the first subset of qubits further includes employing the color code circuit to apply a second pair of CNOT gates to the four-body stabilizer. The first stabilizer is transformed from a four-body stabilizer to a two-body stabilizer.

[0151] Another method of the embodiments is a method for operating a quantum computing system (QCS). The QCS includes a set of physical qubits (PQs) arranged in a 2D grid. The method includes implementing a color code circuit for a color code. The color code includes a set of stabilizers. The set of stabilizers includes at least a first pair of stabilizers. The first pair of stabilizers is associated with a first subset of the set of PQs. The first pair of stabilizers includes a first stabilizer and a second stabilizer. The first stabilizer corresponds to a first basis of a set of bases. The second stabilizer corresponds to a second basis of the set of qubit bases. The first pair of stabilizers is an overlapping pair of stabilizers that overlaps the first subset of PQs. The color code circuit is employed to correct PQ errors occurring during an execution of a quantum algorithm on the QCS.

[0152] In superdense coding embodiments, the first stabilizer and the second stabilizer include a pair of ancilla qubits. In such embodiments, employing the color code circuit to correct PQ errors includes employing the color code circuit to perform a set of measurements, via multiplexing the set of qubit bases, of the overlapping pair of stabilizers.

[0153] In inline (or middle-out) embodiments, the first pair of stabilizers does not include ancilla qubits. In such embodiments, employing the color code circuit to correct PQ errors includes employing the color code circuit to iteratively fold down the first stabilizer from thefirst subset of PQ to a first PQ of the first subset of PQs. The first PQ encodes a first parity value associated with the first basis. The first parity- value corresponds to a quantum state encoded by the first subset of PQs. The color code circuit is employed to iteratively fold down the second stabilizer from the first subset of PQs to the first PQ. The first PQ encodes a second parity value associated with the second basis and. The second parity- value corresponds to the quantum state encoded by the first subset of PQs.

[0154] Implementations of the digital, classical, and / or quantum subject matter and the digital functional operations and quantum operations described in this specification can be implemented in digital electronic circuitry-, suitable quantum circuitry- or, more generally, quantum computational systems, in tangibly-implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term “quantum computing systems” may include, but is not limited to, quantum computers / computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[0155] Implementations of the digital and / or quantum subject matter described in this specification can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible non-transitory storage medium for execution by, or to control the operation of, data processing apparatus. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory- device, one or more qubits / qubit structures, or a combination of one or more of them. Alternatively or in addition, the program instructions can be encoded on an artificially -generated propagated signal that is capable of encoding digital and / or quantum information (e.g., a machine-generated electrical, optical, or electromagnetic signal) that is generated to encode digital and / or quantum information for transmission to suitable receiver apparatus for execution by a data processing apparatus.

[0156] The terms quantum information and quantum data refer to information or data that is carried by. held, or stored in quantum systems, where the smallest non-trivial system is a qubit, i.e., a system that defines the unit of quantum information. It is understood that the term “qubit” encompasses all quantum systems that may be suitably approximated as a two- level system in the corresponding context. Such quantum systems may include multi-level systems, e.g., with two or more levels. By way of example, such systems can include atoms, electrons, photons, ions or superconducting qubits. In many implementations thecomputational basis states are identified with the ground and first excited states, however it is understood that other setups where the computational states are identified with higher level excited states (e.g., qubits) are possible.

[0157] The term ‘‘data processing apparatus” refers to digital and / or quantum data processing hardware and encompasses all kinds of apparatus, devices, and machines for processing digital and / or quantum data, including by way of example a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or multiple digital and quantum processors or computers, and combinations thereof. The apparatus can also be, or further include, special purpose logic circuitry', e.g., an FPGA (field programmable gate array), or an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus that is designed to simulate or produce information about a specific quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the capability to perform universal quantum computation. The apparatus can optionally include, in addition to hardware, code that creates an execution environment for digital and / or quantum computer programs, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[0158] A digital or classical computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or can be written in a quantum programming language, e.g., QCL. Quipper, Cirq, etc..

[0159] A digital and / or quantum computer program may, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data, e.g., one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple coordinated files, e.g., files that store one or more modules, sub-programs, or portions of code. A digital and / or quantum computer program can be deployed to be executed on one digital or one quantum computer or onmultiple digital and / or quantum computers that are located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that may transmit quantum data using quantum systems, e.g. qubits. Generally, a digital data communication network cannot transmit quantum data, however a quantum data communication network may transmit both quantum data and digital data.

[0160] The processes and logic flows described in this specification can be performed by one or more programmable digital and / or quantum computers, operating with one or more digital and / or quantum processors, as appropriate, executing one or more digital and / or quantum computer programs to perform functions by operating on input digital and quantum data and generating output. The processes and logic flows can also be performed by. and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA or an ASIC, or a quantum simulator, or by a combination of special purpose logic circuitry or quantum simulators and one or more programmed digital and / or quantum computers.

[0161] For a system of one or more digital and / or quantum computers or processors to be ■‘configured to” or '‘operable to” perform particular operations or actions means that the system has installed on it software, firmware, hardware, or a combination of them that in operation cause the system to perform the operations or actions. For one or more digital and / or quantum computer programs to be configured to perform particular operations or actions means that the one or more programs include instructions that, when executed by digital and / or quantum data processing apparatus, cause the apparatus to perform the operations or actions. A quantum computer may receive instructions from a digital computer that, when executed by the quantum computing apparatus, cause the apparatus to perform the operations or actions.

[0162] Digital and / or quantum computers suitable for the execution of a digital and / or quantum computer program can be based on general or special purpose digital and / or quantum microprocessors or both, or any other kind of central digital and / or quantum processing unit. Generally, a central digital and / or quantum processing unit will receive instructions and digital and / or quantum data from a read-only memory, or a random access memory, or quantum systems suitable for transmitting quantum data, e.g. photons, or combinations thereof.

[0163] Some example elements of a digital and / or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and thememory' can be supplemented by, or incorporated in, special purpose logic circuitry' or quantum simulators. Generally, a digital and / or quantum computer will also include, or be operatively coupled to receive digital and / or quantum data from or transfer digital and / or quantum data to, or both, one or more mass storage devices for storing digital and / or quantum data, e.g., magnetic, magneto-optical disks, or optical disks, or quantum systems suitable for storing quantum information. However, a digital and / or quantum computer need not have such devices.

[0164] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memory , media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memorydevices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, e.g., trapped atoms or electrons. It is understood that quantum memories are devices that can store quantum data for a long time with high fidelity and efficiency, e.g., light-matter interfaces where light is used for transmission and matter for storing and preserving the quantum features of quantum data such as superposition or quantum coherence.

[0165] Control of the various systems described in this specification, or portions of them, can be implemented in a digital and / or quantum computer program product that includes instructions that are stored on one or more tangible, non-transitory machine-readable storage media, and that are executable on one or more digital and / or quantum processing devices. The systems described in this specification, or portions of them, can each be implemented as an apparatus, method, or electronic system that may include one or more digital and / or quantum processing devices and memory to store executable instructions to perform the operations described in this specification.

[0166] While this specification contains many7specific implementation details, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features that are described in this specification in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable sub combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from thecombination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.

[0167] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0168] Particular implementations of the subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As one example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.

Claims

WHAT IS CLAIMED IS:

1. A method for operating a quantum computing system (QCS) that includes a set of physical qubits (PQs), the method comprising: implementing a quantum error correction (QEC) code that includes a first stabilizer that stabilizes a quantum state of a first subset of the set of PQs and a second stabilizer that stabilizes the quantum state, wherein the first stabilizer corresponds to a first basis of a set of qubit bases, the second stabilizer corresponds to a second basis of the set of qubit bases, and implementing the QEC code includes: operating a quantum circuit that encodes a first bit and a second bit in a first qubit-pair of the set of PQs, wherein the first bit corresponds to a first parity of a set of quantum parities of the quantum state, the first parity being associated with the second basis, the second bit corresponds to a second parity of the set of quantum parities, the second parity being associated with the first basis, and operating the quantum circuit to multiplex measurements of the first parity and the second parity via basis multiplexing.

2. The method of claim 1, wherein the QEC code is a color code, the first bit is a first classical bit, the second bit is a second classical bit, the set of PQs forms a first logical qubit (LQ) of the color code, the color code includes a set of plaquettes of the first LQ. the first subset of PQs forms a first plaquette of the set of plaquettes such that each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette, and the first qubit-pair includes a first ancilla qubit of a set of ancilla qubits of the first plaquette and a second ancilla qubit of the set of ancilla qubits of the first plaquette.

3. The method of claim 2, wherein the first plaquette is a hexagonal plaquette, each data qubit of the set of data qubits is located at a separate vertex of a set of vertices of the hexagonal plaquette, each ancilla qubit of the set of ancilla qubits is located in an interior of the hexagonal plaquette, the quantum circuit includes a set of multi-qubit gates, each multiqubit gate of the set of multi-qubit gates couples an ancilla qubit of the set of ancilla qubits to a separate data qubit of the set of data qubits or to another ancilla qubit of the set of ancilla qubits, and the quantum circuit prepares the set of ancilla qubits in a Bell state.

4. The method of claim 1, wherein operating the quantum circuit comprises: preparing the first qubit-pair in a maximally-entangled two-qubit state; and encoding the first bit and the second bit in the maximally-entangled two-qubit pair via a superdense coding protocol that multiplexes the first basis and the second basis, wherein multiplexing the first basis and the second basis includes: employing controlled-bit flips to encode the first bit in the maximally- entangled two-qubit state; and employing controlled-phase flips to encode the second bit in the maximally-entangled two-qubit state.

5. The method of claim 4. wherein the superdense coding protocol comprises: subsequent to encoding the first bit and the second bit in the maximally-entangled two-qubit pair, performing a first measurement operation, in the first basis, on a first ancilla qubit of the maximally-entangled two-qubit pair; and subsequent to encoding the first bit and the second bit in the maximally- entangled two-qubit pair, performing a second measurement operation, in the second basis, on a second ancilla qubit of the maximally-entangled two-qubit pair.

6. The method of claim 5, wherein the maximally-entangled tw o-qubit pair is a Bell state and the superdense coding protocol further comprises: prior to preparing the Bell state, performing a first qubit-resetting operation on the first ancilla qubit, w herein the first qubit resetting operation resets the first ancilla qubit in a first state of the first basis; prior to preparing the Bell state, performing a second qubit-resetting operation on the second ancilla qubit, wherein the second qubit resetting operation resets the second ancilla qubit in a first state of the second basis; subsequent to performing the first qubit-resetting operation and the second qubit-resetting operation and prior to measuring the first ancilla qubit and the second ancilla qubit, performing a first controlled-NOT (CNOT) operation, wherein the first ancilla qubit is a control qubit of the first CNOT operation, the second ancilla qubit is a target qubit of the first CNOT operation, and the first CNOT operation prepares the Bell state encoded in the first ancilla qubit and the second ancilla qubit; subsequent to preparing the Bell state, performing a second CNOT operation, w herein a sixth data qubit of the first subset of PQs is a control qubit of the secondCNOT operation and the first ancilla qubit is a target qubit of the second CNOT operation; subsequent to preparing the Bell state, performing a third CNOT operation, wherein a first data qubit of the first subset of PQs is a control qubit of the third CNOT operation and the second ancilla qubit is a target qubit of the third CNOT operation; subsequent to preparing the Bell state, performing a fourth CNOT operation, wherein a fifth data qubit of the first subset of PQs is a control qubit of the fourth CNOT operation and the first ancilla qubit is a target qubit of the fourth CNOT operation; subsequent to preparing the Bell state, performing a fifth CNOT operation, wherein a second data qubit of the first subset of PQs is a control qubit of the fifth CNOT operation and the second ancilla qubit is a target qubit of the fifth CNOT operation; subsequent to preparing the Bell state, performing a sixth CNOT operation, wherein a fourth data qubit of the first subset of PQs is a control qubit of the sixth CNOT operation and the first ancilla qubit is a target qubit of the sixth CNOT operation; and subsequent to preparing the Bell state, performing a seventh CNOT operation, wherein a third data qubit of the first subset of PQs is a control qubit of the seventh CNOT operation and the second ancilla qubit is a target qubit of the seventh CNOT operation.

7. The method of claim 6. wherein the superdense coding protocol further comprises: subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing an eighth CNOT operation, wherein the sixth data qubit is a target qubit of the eighth CNOT operation and the first ancilla qubit is a control qubit of the eighth CNOT operation; subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing a ninth CNOT operation, wherein the first data qubit is a target qubit of the ninth CNOT operation and the second ancilla qubit is a control qubit of the ninth CNOT operation; subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing a tenth CNOT operation, wherein the fifth data qubit is a targetqubit of the tenth CNOT operation and the first ancilla qubit is a control qubit of the tenth CNOT operation; subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing an eleventh CNOT operation, wherein the second data qubit is a target qubit of the eleventh CNOT operation and the second ancilla qubit is a control qubit of the eleventh CNOT operation; subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing a twelfth CNOT operation, wherein the fourth data qubit is a target qubit of the twelfth CNOT operation and the first ancilla qubit is a control qubit of the twelfth CNOT operation; subsequent to performing the sixth CNOT operation and the seventh CNOT operation, performing a thirteenth CNOT operation, wherein the third data qubit is a target qubit of the thirteenth CNOT operation and the second ancilla qubit is a control qubit of the thirteenth CNOT operation; and subsequent to performing the thirteenth CNOT operation, performing a fourteenth CNOT operation, wherein the second ancilla qubit is a control qubit of the fourteenth CNOT operation and the first ancilla qubit is a target qubit of the fourteenth CNOT operation.

8. The method of claim 7. wherein the superdense coding protocol further comprises: subsequent to performing the fourteenth CNOT operation, performing the first measurement operation, in the first basis, of the first ancilla qubit, wherein the first basis is a Z-basis; and subsequent to performing the fourteenth CNOT operation, performing the second measurement operation, in the second basis, of the second ancilla qubit, wherein the second basis is an X-basis.

9. The method of claim 7, wherein the superdense coding protocol further comprises: subsequent to performing the sixth CNOT operation and the seventh CNOT operation and prior to performing the first measurement operation on the first ancilla qubit and the second ancilla qubit on the second ancilla qubit, performing a fifteenth CNOT operation, wherein the second ancilla qubit is a control qubit of the fifteenth CNOT operation and the first ancilla qubit is a target qubit of the fifteenth CNOT operation;subsequent to performing the fifteenth CNOT operation and prior to performing the eighth CNOT operation and the ninth CNOT operation, performing the first measurement operation, in the first basis, of the first ancilla qubit, wherein the first basis is aZ-basis; subsequent to performing the fifteenth CNOT operation and the seventh CNOT operation and prior to performing the eighth CNOT operation and the ninth CNOT operation, performing the second measurement operation, in the second basis, of the second ancilla qubit, wherein the second basis is an X-basis; subsequent to performing the first measurement operation on the first ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, performing a third qubit-resetting operation on the first ancilla qubit, wherein the third qubit resetting operation resets the first ancilla qubit in the first state of the first basis; subsequent to performing the second measurement operation on the second ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, performing a fourth qubit-resetting operation on the second ancilla qubit, wherein the fourth qubit resetting operation resets the second ancilla qubit in the first state of the second basis; subsequent to performing the third qubit-resetting operation on the first ancilla qubit and the fourth qubit-resetting operation on the second ancilla qubit and prior to performing the eighth CNOT operation and the ninth CNOT operation, performing a sixteenth CNOT operation, wherein the second ancilla qubit is a control qubit of the sixteenth CNOT operation, the first ancilla qubit is a target qubit of the sixteenth CNOT operation, and the sixteenth CNOT operation prepares a second Bell state encoded in the first ancilla qubit and the second ancilla qubit; and subsequent to performing the fourteenth CNOT operation, performing a third measurement operation, in the first basis, on the first ancilla qubit; and subsequent to performing the fourteenth CNOT operation, performing a fourth measurement operation, in the second basis, on the second ancilla qubit.

10. The method of claim 1, wherein the first basis includes a first set of eigenstates of a first Pauli-operator, the second basis includes a second set of eigenstates of a second Pauli- operator, the first parity and the first stabilizer correspond to the first Pauli-operator, the second parity and the second stabilizer correspond to the second Pauli-operator, the firststabilizer commutes with the second stabilizer, the quantum state is an simultaneous eigenstate of each of the first stabilizer and the second stabilizer, and the simultaneous eigenstate has a common eigenvalue with respect to each of the first stabilizer and the second stabilizer.

11. A method for operating a quantum computing system (QCS) that includes a set of physical qubits (PQs) . the method comprising: implementing a quantum error correction (QEC) code that includes a first stabilizer that stabilizes a quantum state of a first subset of the set of PQs and a second stabilizer that stabilizes the quantum state, wherein the first stabilizer corresponds to a first basis of a set of qubit bases, the second stabilizer corresponds to a second basis of the set of qubit bases, and implementing the QEC code includes operating a quantum circuit that performs operations comprising: iteratively folding the first stabilizer down from the first subset of PQs onto a first PQ of the first subset of PQs. such that the first PQ encodes a first bit that corresponds to a first parity of a set of quantum parities of the quantum state, wherein the first parity of the quantum state is associated with the second basis; measuring the first PQ in the first basis; iteratively folding the second stabilizer down from the first subset of PQs onto the first PQ such that the first PQ encodes a second bit that corresponds to a second parity of the set of quantum parities, wherein the second parity of the quantum state is associated with the first basis; and measuring the first PQ in the second basis.

12. The method of claim 11, wherein the QEC code is a color code, the first bit is a first classical bit, the second bit is a second classical bit, the set of PQs forms a first logical qubit (LQ) of the color code, the color code includes a set of plaquettes of the first LQ. the first subset of PQs forms a first plaquette of the set of plaquettes such that each PQ of the first subset of PQs is a separate data qubit of a set of data qubits of the first plaquette, and the first plaquette has no ancilla qubits.

13. The method of claim 11, wherein iteratively folding the first stabilizer down onto the first PQ comprises:performing a first controlled-NOT (CNOT) operation on a fifth PQ of the subset of PQs and a third PQ of the subset of PQs, wherein the fifth PQ is a control qubit of the first CNOT operation and the third PQ is a target qubit of the first CNOT operation; performing a second CNOT operation on a sixth PQ of the subset of PQs and a fourth PQ of the subset of PQs, wherein the sixth PQ is a control qubit of the second CNOT operation and the fourth PQ is a target qubit of the second CNOT operation; subsequent to performing the first CNOT operation and the second CNOT operation, performing a third CNOT operation on the third PQ and the first PQ, wherein the third PQ is a control qubit of the third CNOT operation and the first PQ is a target qubit of the third CNOT operation; subsequent to performing the first CNOT operation and the second CNOT operation, performing a fourth CNOT operation on the fourth PQ and a second PQ of the first subset of PQs, wherein the fourth PQ is a control qubit of the fourth CNOT operation and the second PQ is a target qubit of the fourth CNOT operation; and subsequent to performing the third CNOT operation and the fourth CNOT operation, performing a fifth CNOT operation on the second PQ and the first PQ such that the first PQ encodes the first bit that corresponds to the first parity of the quantum state that corresponds to the first basis, wherein the second PQ is a control qubit of the fifth CNOT operation and the first PQ is a target qubit of the fifth CNOT operation.

14. The method of claim 11 , wherein iteratively folding the second stabilizer down onto the first PQ comprises: performing a first controlled-NOT (CNOT) operation on a sixth PQ of the subset of PQs and a fourth PQ of the subset of PQs, wherein the sixth PQ is a target qubit of the first CNOT operation and the fourth PQ is a control qubit of the first CNOT operation; performing a second CNOT operation on a fifth PQ of the subset of PQs and a third PQ of the subset of PQs, wherein the fifth PQ is a target qubit of the second CNOT operation and the third PQ is a control qubit of the second CNOT operation; subsequent to performing the first CNOT operation and the second CNOT operation, performing a third CNOT operation on the fourth PQ and a second PQ of the first subset of PQs, wherein the fourth PQ is a target qubit of the third CNOT operation and the second PQ is a control qubit of the third CNOT operation; subsequent to performing the first CNOT operation and the second CNOT operation, performing a fourth CNOT operation on the third PQ and the first PQ, wherein thethird PQ is a target qubit of the fourth CNOT operation and the first PQ is a control qubit of the fourth CNOT operation; and subsequent to performing the third CNOT operation and the fourth CNOT operation, performing a fifth CNOT operation on the second PQ and the first PQ such that the first PQ encodes the second bit that corresponds to the second panty of the quantum state that corresponds to the second basis, wherein the second PQ is a target qubit of the fifth CNOT operation and the first PQ is a control qubit of the fifth CNOT operation.

15. The method of claim 11, wherein the operations of the quantum circuit further comprise: subsequent to measuring the first PQ in the first basis and prior to folding the second stabilizer down, resetting the first PQ in a first state of the first basis; subsequent to resetting the first PQ in the first state of the first basis and prior to folding the second stabilizer down, iteratively unfolding the first stabilizer from the first PQ to the first subset of PQs such that the first subset of PQs encodes the quantum state; subsequent to measuring the first PQ in the second basis, resetting the first PQ in a first state of the second basis; and subsequent to resetting the first PQ in the first state of the second basis, iteratively unfolding the second stabilizer from the first PQ to the first subset of PQs such that the first subset of PQs encodes the quantum state.

16. The method of claim 15, wherein iteratively unfolding the first stabilizer from the first PQ to the first subset of PQs comprises: performing a first controlled-NOT (CNOT) operation on a second PQ of the first subset of PQs and the first PQ, wherein the second PQ is a control qubit of the first CNOT operation and the first PQ is a target qubit of the first CNOT operation; subsequent to performing the first CNOT operation, performing a second CNOT operation on a third PQ of the subset of PQs and the first PQ. wherein the third PQ is a control qubit of the second CNOT operation and the first PQ is a target qubit of the second CNOT operation; subsequent to performing the first CNOT operation, performing a third CNOT operation on a fourth PQ of the first subset of PQs and the second PQ, wherein the fourth PQis a control qubit of the third CNOT operation and the second PQ is a target qubit of the third CNOT operation; subsequent to performing the second CNOT operation and the third CNOT operation, performing a fourth CNOT operation on a fifth PQ of the first subset of PQs and the third PQ, wherein the fifth PQ is a control qubit of the fourth CNOT operation and the third PQ is a target qubit of the fourth CNOT operation; and subsequent to performing the third CNOT operation and the fourth CNOT operation, performing a fifth CNOT operation on a sixth PQ of the first subset of PQs and the fourth PQ such that thefirst subset of PQs encodes the quantum state, wherein the sixth PQ is a control qubit of the fifth CNOT operation and the fourth PQ is a target qubit of the fifth CNOT operation.

17. The method of claim 15, wherein iteratively unfolding the second stabilizer from the first PQ to the first subset of PQs comprises: performing a first controlled-NOT (CNOT) operation on a second PQ of the first subset of PQs and the first PQ, wherein the second PQ is a target qubit of the first CNOT operation and the first PQ is a control qubit of the first CNOT operation; subsequent to performing the first CNOT operation, performing a second CNOT operation on a fourth PQ of the subset of PQs and the second PQ. wherein the fourth PQ is a target qubit of the second CNOT operation and the second PQ is a control qubit of the second CNOT operation; subsequent to performing the first CNOT operation, performing a third CNOT operation on a third PQ of the first subset of PQs and the first PQ, wherein the third PQ is a target qubit of the third CNOT operation and the first PQ is a control qubit of the third CNOT operation; subsequent to performing the second CNOT operation and the third CNOT operation, performing a fourth CNOT operation on a sixth PQ of the first subset of PQs and the fourth PQ, wherein the sixth PQ is a target qubit of the fourth CNOT operation and the fourth PQ is a control qubit of the fourth CNOT operation; and subsequent to performing the third CNOT operation and the fourth CNOT operation, performing a fifth CNOT operation on a fifth PQ of the first subset of PQs and the third PQ such that the the first subset of PQs encodes the quantum state, wherein the fifth PQ is a target qubit of the fifth CNOT operation and the third PQ is a control qubit of the fifth CNOT operation.

18. A method for operating a quantum computing system (QCS) that includes a set of physical qubits (PQs) arranged in a 2D grid, the method comprising: implementing a color code circuit that includes a set of stabilizers, wherein the set of stabilizers includes at least a first pair of stabilizers, wherein the first pair of stabilizers is associated with a first subset of the set of PQs and includes a first stabilizer and a second stabilizer, the first stabilizer corresponds to a first basis of a set of bases, the second stabilizer corresponds to a second basis of the set of qubit bases, and the first pair of stabilizers is an overlapping pair of stabilizers that overlaps the first subset of PQs; and employing the color code circuit to correct PQ errors occurring during an execution of a quantum algorithm on the QCS.

19. The method of claim 18, wherein the first stabilizer and the second stabilizer includes a pair of ancilla qubits and employing the color code circuit to correct PQ errors comprises: employing the color code circuit to perform a set of measurements, via multiplexing the set of qubit bases, of the overlapping pair of stabilizers.

20. The method of claim 18, wherein the first pair of stabilizers does not include ancilla qubits and employing the color code circuit to correct PQ errors comprises: employing the color code circuit to iteratively fold down the first stabilizer from the first subset of PQs to a first PQ of the first subset of PQs such that the first PQ encodes a first parity value associated with the first basis and that corresponds to a quantum state encoded by the first subset of PQs; and employing the color code circuit to iteratively fold down the second stabilizer from the first subset of PQs to the first PQ such that the first PQ encodes a second parity value associated with the second basis and that corresponds to the quantum state encoded by the first subset of PQs.

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