Display panel and display apparatus

Abstract

A display panel and a display apparatus. The display panel comprises a first substrate (200) and a second substrate (100), wherein a spacer (202) and a liquid crystal layer are provided between the first substrate (200) and the second substrate (100); and the second substrate (100) comprises a base (101), a driving circuit layer, a passivation layer, a first electrode, a conductive portion (120) and a second electrode (121), the conductive portion (120) being electrically connected to a second portion (1191) of the first electrode and the second electrode (121), respectively.

Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] VR (Virtual Reality) technology is developing towards high PPI (Pixels Per Inch) and high brightness as the market demands. At the same time, the market also has high requirements for VR products such as color cast and crosstalk.

[0003] Therefore, a new LCD (Liquid-Crystal Display) VR design is urgently needed to solve the above problems. SUMMARY OF THE INVENTION

[0004] Embodiments of the present application provide a display panel and a display device to solve the technical problem in the related art that the overlapping area between two electrodes is large, resulting in light leakage from the overlapping part and poor optical quality.

[0005] To solve the above problems, the technical solutions provided by this application are as follows:

[0006] An embodiment of the present application provides a display panel, including a first substrate and a second substrate, wherein a liquid crystal layer and a spacer are provided between the first substrate and the second substrate, and the second substrate includes:

[0007] substrate;

[0008] A driving circuit layer, provided on the substrate, comprising at least one driving device;

[0009] a passivation layer, disposed on the driving circuit layer, wherein the passivation layer is provided with a first opening exposing an electrode of the at least one driving device;

[0010] a first electrode comprising a first portion and a second portion, wherein the first portion is located in the first opening and electrically connected to the electrode of the driving device, and the second portion is located on the passivation layer;

[0011] a conductive portion, disposed on the second portion of the first electrode, wherein an orthographic projection of the conductive portion on the passivation layer is located within the orthographic projection range of the spacer on the passivation layer, and the spacer is correspondingly disposed on the conductive portion to jointly support the first substrate;

[0012] a second electrode disposed on the passivation layer, wherein at least a portion of the second electrode covers the second portion and the conductive portion;

[0013] The conductive portion is electrically connected to the second portion of the first electrode and the second electrode respectively.

[0014] In a second aspect, an embodiment of the present application provides a display device, comprising a display panel as in any one of the embodiments of the first aspect and a housing, wherein the display panel is mounted on the housing. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0016] FIG1 is a schematic structural diagram of a second substrate in the related art of this application;

[0017] FIG2 is a schematic structural diagram of a second substrate in one embodiment of the present application;

[0018] FIG3 is a schematic top view of the second substrate in one embodiment of the present application. Modes for Carrying Out the Invention

[0019] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0020] In the related art, the display panel shown in Figure 1 includes a passivation layer, a first electrode 303, a connecting electrode 304 (i.e., a second electrode), a first support 301, and a second support 302. The passivation layer is provided with an opening, a portion of the first electrode 303 is located in the opening, and another portion of the first electrode 303 is located on the passivation layer. The first support 301 is located in the opening and on the first electrode 303, the second support 302 is located on the first support 301, and the connecting electrode 304 is located on the second support 302 and the other portion of the first electrode 303. It can be understood that in order to ensure a good electrical connection between the two electrodes, the overlapping area between the two electrodes needs to be set larger to increase the contact area. However, the overlapping area between the first electrode 303 and the connecting electrode 304 will affect the light output of the display panel, thereby resulting in a deterioration in the final optical quality.

[0021] The embodiments of the present application provide a display panel to solve the technical problem in the related art that the overlapping area between two electrodes is large, thereby reducing the light output of the overlapping part and causing poor optical quality.

[0022] The display panel includes a first substrate 200 and a second substrate 100. The first substrate 200 and the second substrate 100 are disposed opposite each other, with liquid crystal disposed between the first substrate 200 and the second substrate 100. A spacer 202 is also disposed between the first substrate 200 and the second substrate 100 to support the first substrate 200 and the second substrate 100.

[0023] The display panel can be used in a display device. The display device, as a device for displaying video or still images, can be not only a fixed terminal such as a television, a desktop computer, a monitor, and a billboard, but also a mobile terminal such as a mobile phone, a tablet computer, a mobile communication terminal, an electronic notepad, an e-book, a multimedia player, a navigator, and a laptop computer, and can also be a wearable electronic device such as a smart watch, smart glasses, a virtual reality device, and an augmented reality device.

[0024] As shown in FIG. 2 , the second substrate 100 includes a substrate 101 , a driving circuit layer, a passivation layer, a first electrode, a conductive portion 120 , and a second electrode 121 .

[0025] The driving circuit layer is located on the substrate 101 and includes a first transistor. The passivation layer is disposed on the driving circuit layer and has a first opening that exposes one of the drain or source electrodes of the first transistor. The first electrode includes a first portion 1192 and a second portion 1191. The first portion 1192 is located within the first opening and electrically connected to one of the drain or source electrodes of the first transistor, and the second portion 1191 is located on the passivation layer. The conductive portion 120 is disposed on the second portion 1191 of the first electrode. The orthographic projection of the conductive portion 120 on the passivation layer is located within the orthographic projection of the spacer 202 on the passivation layer. The conductive portion 120 and the spacer 202 jointly support the first substrate 200. The second electrode 121 is disposed on the passivation layer, and a portion of the second electrode 121 covers the second portion 1191 and the conductive portion 120. The conductive portion 120 is electrically connected to the second portion 1191 of the first electrode and the second electrode 121, respectively.

[0026] It can be understood that since the conductive part 120 is located on the second part 1191 of the first electrode, part of the second electrode 121 covers the second part 1191 and the conductive part 120. Therefore, the second electrode 121 can be connected to the first electrode through the conductive part 120. Compared with the situation in the related art where the second support cannot provide a conductive connection for the first electrode and the second electrode 121, the contact area between the first electrode and the second electrode 121 of the present application is increased, so that the overlapping part of the first electrode and the second electrode 121 can be reduced, thereby reducing the area affecting the light output of the second substrate 100 and ensuring the optical quality.

[0027] In this embodiment, a conductive portion 120 is provided on the second portion 1191 of the first electrode, and the conductive portion 120 covers the first opening, so that the first electrode and the second electrode 121 can be electrically connected through the conductive portion 120, thereby increasing the contact area between the first electrode and the second electrode 121, so that the overlapping portion of the first electrode and the second electrode 121 can be reduced, thereby reducing the area affecting the light emission of the second substrate 100, ensuring the optical quality, and improving the technical problem in the related art that the overlapping area between the two electrodes is large, thereby reducing the light emission of the overlapping part and causing the optical quality to deteriorate.

[0028] Exemplarily, the conductive portion 120 may cover the first opening.

[0029] In one embodiment, the display panel includes a light shielding portion, the first opening is located within the light shielding portion, and the second portion is located on the passivation layer and within the light shielding portion.

[0030] In one embodiment, the second substrate further includes a color resist layer and a first light-shielding layer, the color resist layer being arranged between the driving circuit layer and the passivation layer, the color resist layer including a plurality of color resists arranged at intervals, the first light-shielding layer being arranged on a side of the color resist layer close to the first substrate, the first light-shielding layer including a first light-shielding portion, at least a portion of an orthographic projection of the first light-shielding portion on the driving circuit layer being located between the orthographic projections of two adjacent color resists on the driving circuit layer.

[0031] In one embodiment, the at least one driving device includes a first transistor, the first transistor includes a first source and a first drain, the first source is electrically connected to the first electrode through the first opening, and the orthographic projection of the first drain on the substrate at least partially overlaps with the orthographic projection of the first light-shielding portion on the substrate.

[0032] In one embodiment, the driving circuit layer includes a first source-drain layer, the first source-drain layer includes the first drain and a first wiring portion, the first light-shielding layer also includes a second light-shielding portion, the third electrode also includes a second portion, and the second portion of the third electrode is electrically connected to the second light-shielding portion and the first wiring portion.

[0033] In one embodiment, the second substrate includes a display area and a non-display area arranged around the display area, and the at least one driving device further includes a second transistor; wherein the first transistor is an indium gallium zinc oxide transistor, the second transistor is a polysilicon transistor, the first transistor is located in the non-display area, and the second transistor is located in the display area.

[0034] In one embodiment, a second light shielding layer is provided on the first substrate, the second light shielding layer is located within the range of the light shielding portion, and the second light shielding layer is located on a side of the first substrate facing the second substrate;

[0035] The material of the first light-shielding layer includes metal, and the material of the second light-shielding layer includes at least one of light-shielding metal and light-shielding resin.

[0036] In one embodiment, the second substrate further includes a filling portion, wherein the filling portion is disposed in the first opening and located on the first portion of the first electrode, and the filling portion is supported by the conductive portion.

[0037] In one embodiment, the filling portion includes a black light-shielding material.

[0038] In one embodiment, the passivation layer includes a first passivation layer and a second passivation layer, the first passivation layer is located on the color resist layer, the first light-shielding layer is arranged on the first passivation layer, the second passivation layer is located on the first light-shielding layer, and the first opening is opened in the first passivation layer and the second passivation layer, wherein the first opening is located between two adjacent color resists.

[0039] As shown in FIG2 , in one embodiment, the second substrate 100 includes a substrate 101 , a first insulating layer, a driving circuit layer, a color resist layer 114 , a planarization layer, a passivation layer, a first electrode, a second electrode 121 , and a third electrode.

[0040] The substrate 101 may include a single layer of insulating material such as glass, quartz and polymer resin, or multiple layers of insulating material such as double layers of polymer resin. The substrate 101 may be a rigid substrate 101 or a flexible substrate 101. The substrate 101 carries a film layer disposed thereon.

[0041] In one embodiment, the substrate 101 includes a display area and a non-display area. The display area may be an area for providing sub-pixels for displaying an image. The non-display area may be an area containing a driving unit, such as a gate driving circuit, for providing driving signals to a pixel driving circuit for the sub-pixels, as well as some lines connecting the driving unit, such as power lines. No sub-pixels may be provided in the non-display area. The non-display area may be provided on at least one side of the display area. The non-display area may at least partially surround the display area.

[0042] The display area can have various shapes. For example, the display area can be provided in various shapes, such as a closed polygon including straight edges, a circle including curved edges, an ellipse, etc., and a semicircle including straight edges and curved edges, a semi-ellipse, etc. When the display area includes a plurality of areas, each area can also be provided in various shapes, such as a closed polygon including straight edges and a circle including curved edges, an ellipse, etc. In an embodiment of the present disclosure, as an example, a case is described in which the display area is provided as an area having a quadrilateral shape including straight edges. The non-display area can be set on at least one side of the display area. The non-display area can at least partially surround the periphery of the display area.

[0043] In one embodiment, the driving circuit layer includes an active portion, a gate layer, a first gate insulating layer 104, a second gate insulating layer 105, a third gate insulating layer 107, a first source and drain layer, a second source and drain layer, a first interlayer insulating layer 109, a second interlayer insulating layer 111, a third interlayer insulating layer 113 and a first source 112.

[0044] The active portion may include polycrystalline silicon or an oxide semiconductor. The oxide semiconductor may include any one of an oxide based on titanium (Ti), hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), germanium (Ge), zinc (Zn), gallium (Ga), tin (Sn), or indium (In), or a composite oxide thereof.

[0045] The active portion may include a semiconductor pattern. Each semiconductor pattern may include: a channel region overlapping the gate electrode in the thickness direction; and source and drain regions located on one side and the other side of the channel region, respectively. The source and drain regions are conductive regions that may have higher conductivity and lower resistance than the channel region. An oxide semiconductor layer is formed using physical vapor deposition, and the oxide semiconductor layer is patterned to form the active layer.

[0046] In this embodiment, the active portion includes a first active portion 106 and a second active portion 103 . The second active portion 103 is located on the substrate 101 .

[0047] The first gate insulating layer 104 is located on the second active portion 103. The gate layer is located on the first gate insulating layer 104 and includes a first gate 1052 and a second gate 1051. The second gate insulating layer 105 is located on the gate layer, the first active portion 106 is located on the second gate insulating layer 105, and the third gate insulating layer 107 is located on the first active portion 106. The second source and drain electrode layer is located on the third gate insulating layer 107 and includes a second drain electrode 1081, a second source electrode 1082, and a second wiring portion 1083. The second drain electrode 1081 and the second source electrode 1082 are electrically connected to the second active portion 103 through openings.

[0048] The gate insulating layer (the first gate insulating layer 104, the second gate insulating layer 105, and the third gate insulating layer 107) may include a silicon compound, a metal oxide, or the like. For example, the gate insulating layer may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, or the like. These substances may be used alone or in combination.

[0049] The gate electrodes (the first gate electrode 1052 and the second gate electrode 1051) can be formed of a low-resistance material. The gate electrodes can include one or more metals selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu), but are not limited thereto.

[0050] The first interlayer insulating layer 109 is located on the second source-drain layer, and the first source-drain layer is located on the first interlayer insulating layer 109. The first source-drain layer includes a first drain 1112 and a first wiring portion 1111. The first drain 1112 is electrically connected to the first active portion 106 via an opening. The orthographic projection of the first wiring portion 1111 on the substrate 101 is located within the orthographic projection of the first active portion 106 on the substrate 101. The second interlayer insulating layer 111 is located on the first source-drain layer, and the first source 112 is located on the second interlayer insulating layer 111. The first source 112 is electrically connected to the first active portion 106 via a second opening. The second opening sequentially penetrates the second interlayer insulating layer 111, the first interlayer insulating layer 109, and the third gate insulating layer 107. The third interlayer insulating layer 113 is located on the first source electrode 112 . It can be understood that a portion of the third interlayer insulating layer 113 is filled in the second opening and is located on the first source electrode 112 .

[0051] As shown in Figure 3, the second substrate 100 also includes a first data line Data1 and a second data line Data2. The first data line can be located in the first source and drain layer and electrically connected to the first drain 1112. The second data line can be located in the second source and drain layer and electrically connected to the second drain 1081.

[0052] The interlayer insulating layers (the first interlayer insulating layer 109, the second interlayer insulating layer, and the third interlayer insulating layer 113) may include silicon compounds, metal oxides, and the like. For example, the interlayer insulating layers may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, and the like. These substances may be used alone or in combination.

[0053] The source / drain layer (the first source / drain electrode layer, the second source / drain electrode layer) may include one or more metals selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The source / drain layer may be a single layer or a multilayer film. For example, the source / drain layer may be formed into a stacked structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, or Ti / Cu.

[0054] It can be understood that the first gate 1052, the first active portion 106, the first drain 1112, and the first source 112 can constitute the first transistor, wherein the first source 112 can serve as the drain of the first transistor. The second gate 1051, the second active portion 103, the second drain 1081, and the second source 1082 can constitute the second transistor.

[0055] In some embodiments, the material of the first active portion 106 may be IGZO (indium gallium zinc oxide), and the material of the second active portion 103 may be polysilicon. It is understood that the first transistor and the second transistor may form an LTPO structure. The first transistor may serve as a drive transistor in a pixel, and the second transistor may serve as a control transistor in the pixel. In some embodiments, the first transistor may be located in the display area of ​​the second substrate 100, and the second transistor may be located in the non-display area of ​​the second substrate 100.

[0056] The color resist layer 114 is located on the third interlayer insulating layer 113 and includes a plurality of color resists spaced apart from each other. The color resists include a first color resist 1141 (R), a second color resist 1142 (G), and a third color resist (B). In this embodiment, a portion of the second color resist 1142 is filled in the second opening.

[0057] The planarization layer includes a first planarization layer 115. The planarization layer is generally thicker and is used to provide a flat surface for the deposition of other film layers. The planarization layer may include an inorganic insulating material or an organic insulating material such as polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenyleneether resin, polyphenylenesulfide resin or benzocyclobutene (BCB). The planarization layer may also include a photosensitive material, but is not limited thereto.

[0058] In this embodiment, the first planar layer 115 is located on the color resist layer 114. The passivation layer includes a first passivation layer 116, a second passivation layer 118, and a third passivation layer 122. The first passivation layer 116 is located on the first planar layer 115, and the second passivation layer 118 is located on the first passivation layer 116.

[0059] The passivation layer may include inorganic insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, and zinc oxide. The passivation layer may be formed in the display area and not formed in at least a portion of the non-display area.

[0060] In one embodiment, the first opening is located between two adjacent color resists, and the first opening sequentially penetrates the second passivation layer 118, the first passivation layer 116, the first planarization layer 115, and the third interlayer insulating layer 113. The first electrode includes a first portion 1192 and a second portion 1191. The first portion 1192 is located within the first opening and electrically connected to the first source electrode 112 of the first transistor, and the second portion 1191 is located on the second passivation layer 118.

[0061] In one embodiment, the second substrate 100 further includes a filling portion 203. The conductive portion 120 is disposed on the second portion 1191 of the first electrode and covers the first opening. The filling portion 203 is supported by the conductive portion 120. The second electrode 121 is disposed on the second passivation layer 118, and the third passivation layer 122 is located on the second electrode 121. Part of the second electrode 121 covers the second portion 1191 of the first electrode and the conductive portion 120. The conductive portion 120 is electrically connected to the second portion 1191 of the first electrode and the second electrode 121, respectively.

[0062] In one embodiment, the filler portion 203 is made of a black light-shielding material, including but not limited to Cr, Mo, W, WMo, MoOx, etc., and the thickness of the filler portion 203 can be 10-200 nm. By making the filler portion 203 black, the filler portion 203 can fill the first opening, improving light efficiency, and also provide light shielding, reducing color shift and light leakage on the second substrate 100.

[0063] In one embodiment, the second substrate 100 further includes a light-shielding layer located between the first passivation layer 116 and the second passivation layer 118, the light-shielding layer including a first light-shielding portion 1172 and a second light-shielding portion 1171, and at least a portion of the orthographic projection of the first light-shielding portion 1172 on the driving circuit layer is located between the orthographic projections of two adjacent color blocks on the driving circuit layer.

[0064] Illustratively, the orthographic projection of the first drain electrode 1112 on the substrate 101 at least partially overlaps with the orthographic projection of the first light shielding portion 1172 on the substrate 101 .

[0065] In one embodiment, the second substrate 100 further includes a third electrode, which is located on the third passivation layer 122 and includes a first portion 1231 and a second portion 1232. The orthographic projection of the first portion 1231 of the third electrode on the driving circuit layer is located within the orthographic projection of the conductive portion 120 on the driving circuit layer. The second portion 1232 of the third electrode passes through the passivation layer and is electrically connected to the second light shielding portion 1171 and the first routing portion 1111.

[0066] A second light-shielding layer is provided on the first substrate 200, and is located on the side of the first substrate 200 facing the second substrate 100. The second light-shielding layer includes a third light-shielding portion 201, which is positioned directly opposite the conductive portion 120. The spacer 202 is provided between the third light-shielding portion 201 and the first portion 1231 of the third electrode. The spacer 202 and the conductive portion 120 can support the first substrate 200. Exemplarily, the material of the first light-shielding layer includes a light-shielding metal, and the material of the second light-shielding layer includes at least one of a light-shielding metal and a light-shielding resin.

[0067] In a second aspect, an embodiment of the present application provides a display device, which includes a display panel and a housing as in any one of the embodiments of the first aspect, wherein the display panel is mounted on the housing.

[0068] In summary, although the present application has been disclosed as above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims.

Claims

1. A display panel, comprising a first substrate and a second substrate, wherein a liquid crystal layer and a spacer are disposed between the first substrate and the second substrate, wherein: The second substrate comprises: substrate; A driving circuit layer, disposed on a side of the substrate facing the first base plate, comprising at least one driving device; A passivation layer is disposed on the driving circuit layer, and the passivation layer is provided with a first opening for exposing an electrode of the at least one driving device; a first electrode, comprising a first portion and a second portion, wherein the first portion is located in the first opening and is electrically connected to the electrode of the driving device; A conductive portion is disposed on the second portion of the first electrode, and an orthographic projection of the conductive portion on the passivation layer is located within the orthographic projection range of the spacer on the passivation layer, and the spacer is correspondingly disposed on the conductive portion to jointly support the first substrate; a second electrode, disposed on the passivation layer, wherein at least a portion of the second electrode covers the second portion and the conductive portion; The conductive portion is electrically connected to the second portion of the first electrode and the second electrode respectively.

2. The display panel according to claim 1, wherein: The display panel includes a light shielding portion, the first opening is located within the range of the light shielding portion, and the second portion is located on the passivation layer and within the range of the light shielding portion.

3. The display panel according to claim 2, wherein: The second substrate also includes a color resist layer and a first light-shielding layer, the color resist layer is arranged between the driving circuit layer and the passivation layer, the color resist layer includes a plurality of color resists arranged at intervals, the first light-shielding layer is arranged on a side of the color resist layer close to the first substrate, the first light-shielding layer includes a first light-shielding portion, and at least a portion of the orthographic projection of the first light-shielding portion on the driving circuit layer is located between the orthographic projections of two adjacent color resists on the driving circuit layer.

4. The display panel according to claim 3, wherein: The at least one driving device includes a first transistor, the first transistor includes a first source and a first drain, the first source is electrically connected to the first electrode through the first opening, and the orthographic projection of the first drain on the substrate at least partially overlaps with the orthographic projection of the first shading portion on the substrate.

5. The display panel according to claim 4, wherein: The driving circuit layer includes a first source-drain layer, the first source-drain layer includes the first drain and a first wiring portion, the first light-shielding layer also includes a second light-shielding portion, the second substrate also includes a third electrode, the third electrode is located on the second electrode, the third electrode also includes a second portion, and the second portion of the third electrode is electrically connected to the second light-shielding portion and the first wiring portion.

6. The display panel according to claim 4, wherein: The second substrate includes a display area and a non-display area arranged around the display area, and the at least one driving device further includes a second transistor; The first transistor is an indium gallium zinc oxide transistor, the second transistor is a polysilicon transistor, the first transistor is located in the non-display area, and the second transistor is located in the display area.

7. The display panel according to claim 3, wherein: A second light shielding layer is provided on the first substrate, the second light shielding layer is located within the range of the light shielding portion, and the second light shielding layer is located on a side of the first substrate facing the second substrate; The material of the first light-shielding layer includes metal, and the material of the second light-shielding layer includes at least one of light-shielding metal and light-shielding resin.

8. The display panel according to claim 1, wherein: The second substrate further includes a filling portion, which is disposed in the first opening and located on the first portion of the first electrode, and is supported by the conductive portion.

9. The display panel according to claim 8, wherein: The filling portion includes a black light shielding material.

10. The display panel according to claim 1, wherein: The conductive portion covers the first opening.

11. A display device, comprising a display panel and a housing, wherein the display panel is mounted on the housing, the display panel comprises a first substrate and a second substrate, a liquid crystal layer and a spacer are provided between the first substrate and the second substrate, and the second substrate comprises: substrate; A driving circuit layer, disposed on a side of the substrate facing the first base plate, comprising at least one driving device; A passivation layer is disposed on the driving circuit layer, and the passivation layer is provided with a first opening for exposing an electrode of the at least one driving device; a first electrode, comprising a first portion and a second portion, wherein the first portion is located in the first opening and is electrically connected to the electrode of the driving device; A conductive portion is disposed on the second portion of the first electrode, and an orthographic projection of the conductive portion on the passivation layer is located within the orthographic projection range of the spacer on the passivation layer, and the spacer is correspondingly disposed on the conductive portion to jointly support the first substrate; a second electrode, disposed on the passivation layer, wherein at least a portion of the second electrode covers the second portion and the conductive portion; The conductive portion is electrically connected to the second portion of the first electrode and the second electrode respectively.

12. The display device according to claim 11, wherein: The display panel includes a light shielding portion, the first opening is located within the range of the light shielding portion, and the second portion is located on the passivation layer and within the range of the light shielding portion.

13. The display device according to claim 12, wherein: The second substrate also includes a color resist layer and a first light-shielding layer, the color resist layer is arranged between the driving circuit layer and the passivation layer, the color resist layer includes a plurality of color resists arranged at intervals, the first light-shielding layer is arranged on a side of the color resist layer close to the first substrate, the first light-shielding layer includes a first light-shielding portion, and at least a portion of the orthographic projection of the first light-shielding portion on the driving circuit layer is located between the orthographic projections of two adjacent color resists on the driving circuit layer.

14. The display device according to claim 13, wherein: The at least one driving device includes a first transistor, the first transistor includes a first source and a first drain, the first source is electrically connected to the first electrode through the first opening, and the orthographic projection of the first drain on the substrate at least partially overlaps with the orthographic projection of the first shading portion on the substrate.

15. The display device according to claim 14, wherein: The driving circuit layer includes a first source-drain layer, the first source-drain layer includes the first drain and a first wiring portion, the first light-shielding layer also includes a second light-shielding portion, the second substrate also includes a third electrode, the third electrode is located on the second electrode, the third electrode also includes a second portion, and the second portion of the third electrode is electrically connected to the second light-shielding portion and the first wiring portion.

16. The display device according to claim 14, wherein: The second substrate includes a display area and a non-display area arranged around the display area, and the at least one driving device further includes a second transistor; The first transistor is an indium gallium zinc oxide transistor, the second transistor is a polysilicon transistor, the first transistor is located in the non-display area, and the second transistor is located in the display area.

17. The display device according to claim 13, wherein: A second light shielding layer is provided on the first substrate, the second light shielding layer is located within the range of the light shielding portion, and the second light shielding layer is located on a side of the first substrate facing the second substrate; The material of the first light-shielding layer includes metal, and the material of the second light-shielding layer includes at least one of light-shielding metal and light-shielding resin.

18. The display device according to claim 11, wherein: The second substrate further includes a filling portion, which is disposed in the first opening and located on the first portion of the first electrode, and is supported by the conductive portion.

19. The display device according to claim 18, wherein: The filling portion includes a black light shielding material.

20. The display device according to claim 11, wherein: The conductive portion covers the first opening.

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