Blind detection method and device for synchronization block, storage medium, and electronic device

By performing time-frequency domain segmentation and power value calculation on multiple channel estimation sequences of the synchronization block, the blind inspection process of the synchronization block is simplified, the problem of high blind inspection complexity in the prior art is solved, and a more efficient blind inspection effect is achieved.

WO2025112808A1PCT designated stage expired Publication Date: 2025-06-05SHANGHAI CYGNUS SEMICON CO LTD
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Patent Information

Application Number
PCT/CN2024/118585
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-11-29
Filing Date
2024-09-12
Publication Date
2025-06-05

AI Technical Summary

Technical Problem

In the prior art, the blind inspection of synchronous blocks is relatively complex and difficult to effectively solve.

Method used

By obtaining multiple channel estimation sequences of the synchronization block to be blindly inspected, each channel estimation sequence corresponds to a candidate pilot sequence, and performing time-frequency domain segmentation, determining the average power value of each segmentation result, and finally determining the blind detection result of the synchronization block based on the channel estimation sequence with the largest power value.

Benefits of technology

The blind inspection process of synchronous blocks is simplified, the algorithm complexity and hardware implementation overhead are reduced, and the efficiency of blind inspection is improved.

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Abstract

Embodiments of the present application provide a blind detection method and device for a synchronization block, a storage medium, and an electronic device. The method comprises: acquiring a plurality of channel estimation sequences of a synchronization block to be subjected to blind detection, wherein each channel estimation sequence corresponds to a candidate pilot sequence and comprises a plurality of channel estimation values distributed in a time-frequency domain; performing time-frequency domain segmentation on the channel estimation values comprised in each channel estimation sequence to obtain a plurality of segmentation results, wherein each segmentation result comprises the plurality of channel estimation values; determining an average power value corresponding to each of the plurality of segmentation results corresponding to each channel estimation sequence to obtain a plurality of intermediate power values; determining the mean value of the plurality of intermediate power values corresponding to each channel estimation sequence as a power value of the channel estimation sequence; and determining a blind detection result of said synchronization block on the basis of the candidate pilot frequency sequence corresponding to the channel estimation sequence having the maximum power value. The present application solves the problem of high blind detection complexity of synchronization blocks.
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Description

Blind detection method, device, storage medium and electronic device for synchronization block

[0001] This application claims priority to the Chinese patent application filed with the Patent Office of China on November 29, 2023, with application number 2023116209158 and invention name “Blind detection method, device, storage medium and electronic device for synchronization block”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of communications, and specifically, to a blind detection method, device, storage medium, and electronic device for synchronization blocks. Background Art

[0003] The Physical Broadcast Channel (PBCH) is mainly used to carry the Master Information Block (MIB). The terminal UE needs to perform blind detection on the Synchronization Signal Block (SSB) during the initial cell search and the neighboring cell measurement scenario of the unknown Synchronization Signal Block (SSB) index (ISSB). The main purpose of blind detection is to obtain the correct ISSB, thereby providing accurate MIB information for the subsequent access process. The related technology has the disadvantages of complex algorithms, difficulty in verification and comparison, and high overhead in hardware implementation.

[0004] There is currently no effective solution to the above problems.

[0005] Summary of the Invention

[0006] The embodiments of the present application provide a blind detection method, device, storage medium and electronic device for a synchronization block, so as to at least solve the problem of high complexity of blind detection of SSB in related technologies.

[0007] According to one embodiment of the present application, a blind detection method for a synchronization block is provided, comprising: obtaining multiple channel estimation sequences of the synchronization block to be blind detected, wherein each of the channel estimation sequences corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain; performing time-frequency domain segmentation on the channel estimation values ​​included in each of the channel estimation sequences to obtain multiple segmentation results, wherein each of the segmentation results includes multiple channel estimation values; determining the average power value corresponding to each of the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values; determining the average of the multiple intermediate power values ​​corresponding to each of the channel estimation sequences as the power value of the channel estimation sequence; and determining the blind detection result of the synchronization block based on the candidate pilot sequence corresponding to the channel estimation sequence having the largest power value.

[0008] In an exemplary embodiment, the channel estimation values ​​included in each of the channel estimation sequences are segmented in the time-frequency domain to obtain a plurality of segmentation results, including: determining the frequency domain segmentation size according to the channel quality; segmenting the channel estimation sequence in the frequency domain according to the frequency domain segmentation size to obtain the plurality of segmentation results, wherein the channel quality includes time deviation and time delay spread, and the larger the time deviation and the time delay spread, the finer the frequency domain segmentation; and / or determining the time domain segmentation size according to the channel quality; segmenting the channel estimation sequence in the time domain according to the time domain segmentation size to obtain the plurality of segmentation results, wherein the channel quality includes frequency deviation and Doppler spread, and the larger the frequency deviation and the Doppler spread, the finer the frequency domain segmentation.

[0009] In an exemplary embodiment, the average power value corresponding to each of the multiple segmentation results corresponding to each of the channel estimation sequences is determined to obtain multiple intermediate power values, including: performing mean processing on the multiple channel estimation values ​​in each of the segmentation results to obtain a mean processing result; and determining the intermediate power value corresponding to the segmentation result based on the mean processing result of each of the segmentation results.

[0010] In an exemplary embodiment, the candidate pilot sequence includes a PBCH-DMRS sequence, and obtaining multiple channel estimation sequences of the synchronization block to be blindly detected includes: obtaining multiple scrambling code initial values ​​corresponding to multiple candidate indexes, wherein the candidate indexes correspond one-to-one to the scrambling code initial values; generating multiple PBCH-DMRS sequences through the multiple candidate indexes and the multiple scrambling code initial values; performing LS channel estimation and DC subcarrier processing on each of the PBCH-DMRS sequences to obtain a channel estimation sequence corresponding to each of the PBCH-DMRS sequences; determining the blind detection result of the synchronization block according to the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value, including: determining the blind detection result of the synchronization block according to the candidate index corresponding to the channel estimation sequence with the largest power value.

[0011] According to another embodiment of the present application, a blind detection device for a synchronization block is provided, comprising: an acquisition module, configured to acquire multiple channel estimation sequences of the synchronization block to be blind detected, wherein each of the channel estimation sequences corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain; a segmentation module, configured to segment the channel estimation values ​​included in each of the channel estimation sequences in the time-frequency domain to obtain multiple segmentation results, wherein each of the segmentation results includes multiple channel estimation values; a first determination module, configured to determine the average power value corresponding to each of the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values; a second determination module, configured to determine the average of the multiple intermediate power values ​​corresponding to each of the channel estimation sequences as the power value of the channel estimation sequence; and a third determination module, configured to determine the blind detection result of the synchronization block based on the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value.

[0012] In an exemplary embodiment, the segmentation module includes: a first segmentation unit, configured to determine the frequency domain segmentation size according to the channel quality; performing frequency domain segmentation on the channel estimation sequence according to the frequency domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes time deviation and delay spread, and the larger the time deviation and the delay spread, the finer the frequency domain segmentation; a second segmentation unit, configured to determine the time domain segmentation size according to the channel quality; performing time domain segmentation on the channel estimation sequence according to the time domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes: frequency deviation and Doppler spread, and the larger the frequency deviation and the Doppler spread, the finer the frequency domain segmentation.

[0013] In an exemplary embodiment, the first determination module includes: a first processing unit, configured to perform mean processing on multiple channel estimation values ​​in each of the segmentation results to obtain a mean processing result; and a first determination unit, configured to determine the intermediate power value corresponding to the segmentation result based on the mean processing result of each of the segmentation results.

[0014] In an exemplary embodiment, the candidate pilot sequence includes a PBCH-DMRS sequence, and the acquisition module includes: an acquisition unit, configured to obtain multiple scrambling code initial values ​​corresponding to multiple candidate indexes, wherein the candidate indexes correspond one-to-one to the scrambling code initial values; a generation unit, configured to generate multiple PBCH-DMRS sequences through the multiple candidate indexes and the multiple scrambling code initial values; a second processing unit, configured to perform LS channel estimation and DC subcarrier processing on each of the PBCH-DMRS sequences to obtain a channel estimation sequence corresponding to each of the PBCH-DMRS sequences; the third determination module includes: a second determination unit, configured to determine the blind detection result of the synchronization block based on the candidate index corresponding to the channel estimation sequence with the largest power value.

[0015] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when run.

[0016] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any one of the above method embodiments.

[0017] Through the present application, multiple channel estimation sequences of the synchronization block to be blind detected are obtained, each channel estimation sequence corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain; the channel estimation values ​​included in each of the channel estimation sequences are segmented in the time-frequency domain to obtain multiple segmentation results, each segmentation result includes multiple channel estimation values; the average power value corresponding to each of the multiple segmentation results corresponding to each channel estimation sequence is determined to obtain multiple intermediate power values; the average of the multiple intermediate power values ​​corresponding to each channel estimation sequence is determined as the power value of the channel estimation sequence; and the blind detection result of the synchronization block is determined based on the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value. Therefore, the problem of high complexity in blind detection of synchronization blocks in the related art can be solved, and the complexity of blind detection of SSB can be simplified. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] FIG1 is a hardware structure block diagram of a mobile terminal of a blind detection method for synchronization blocks according to an embodiment of the present application;

[0019] FIG2 is a flow chart of a blind detection method for a synchronization block according to an embodiment of the present application;

[0020] FIG3 is a schematic diagram of segmentation according to an embodiment of the present application;

[0021] FIG4 is a structural block diagram of a blind detection device for a synchronization block according to an embodiment of the present application. DETAILED DESCRIPTION

[0022] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0023] It should be noted that the terms "first", "second", etc. in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0024] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking operation on a mobile terminal as an example, FIG1 is a hardware structure block diagram of a mobile terminal of a blind detection method of a synchronization block in an embodiment of the present application. As shown in FIG1 , the mobile terminal may include one or more (only one is shown in FIG1 ) processors 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the mobile terminal may also include a transmission device 106 and an input and output device 108 for communication functions. It will be understood by those skilled in the art that the structure shown in FIG1 is only for illustration, and it does not limit the structure of the mobile terminal. For example, the mobile terminal may also include more or fewer components than those shown in FIG1 , or have a configuration different from that shown in FIG1 .

[0025] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the blind detection method of the synchronization block in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above-mentioned method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories can be connected to the mobile terminal via a network. Examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network and a combination thereof.

[0026] The transmission device 106 is used to receive or send data via a network. A specific example of the aforementioned network may include a wireless network provided by the mobile terminal's communications provider. In one embodiment, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In one embodiment, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0027] In this embodiment, a blind detection method for a synchronization block running on the mobile terminal is provided. FIG2 is a flow chart of the blind detection method for a synchronization block according to an embodiment of the present application. As shown in FIG2 , the process includes the following steps:

[0028] Step S202: Acquire multiple channel estimation sequences of the synchronization block to be blindly detected, wherein each of the channel estimation sequences corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain;

[0029] The candidate pilot sequence includes a PBCH-DMRS sequence, obtaining multiple scrambling code initial values ​​corresponding to multiple candidate indexes, wherein the candidate indexes correspond to the scrambling code initial values ​​one-to-one; generating multiple PBCH-DMRS sequences using the multiple candidate indexes and the multiple scrambling code initial values; performing LS channel estimation and DC subcarrier processing on each of the PBCH-DMRS sequences to obtain a channel estimation sequence corresponding to each of the PBCH-DMRS sequences;

[0030] Step S204, performing time-frequency domain segmentation on the channel estimation values ​​included in each of the channel estimation sequences to obtain a plurality of segmentation results, wherein each of the segmentation results includes a plurality of channel estimation values;

[0031] Specifically, the frequency domain segmentation size may be determined according to the channel quality; the channel estimation sequence is frequency-domain segmented according to the frequency domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes time offset and delay spread, and the larger the time offset and the delay spread, the finer the frequency domain segmentation; and / or,

[0032] Determine the time domain segmentation size according to the channel quality; perform time domain segmentation on the channel estimation sequence according to the time domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes: frequency deviation and Doppler spread, and the larger the frequency deviation and the Doppler spread, the finer the frequency domain segmentation.

[0033] Step S206, determining an average power value corresponding to each of the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values;

[0034] Specifically, a mean processing is performed on a plurality of channel estimation values ​​in each segmentation result to obtain a mean processing result; and based on the mean processing result of each segmentation result, an intermediate power value corresponding to the segmentation result is determined.

[0035] Step S208: determining an average of the multiple intermediate power values ​​corresponding to each channel estimation sequence as the power value of the channel estimation sequence;

[0036] Step S210: Determine a blind detection result of the synchronization block according to a candidate pilot sequence corresponding to the channel estimation sequence with the largest power value.

[0037] The blind detection result of the synchronization block may be determined according to the candidate index corresponding to the channel estimation sequence with the largest power value.

[0038] The execution entity of the above steps may be a base station, a terminal, etc., but is not limited thereto.

[0039] For each issb to be blind-checked and its corresponding scrambling code initial value (if blind-check is not required, there is only one issb and scrambling code initial value configured at this time, otherwise L Max ), generate local PBCH-DMRS sequence) according to LS channel estimation (least squares algorithm) and DC subcarrier processing, obtain the corresponding LS channel estimation value Where i represents the issb number to be blindly detected; r represents the index of the receiving antenna; l represents the index of the three symbols of SSB, N DMRS,symb =3, that is, the number of PBCH symbols in each SSB; n is the index of the PBCH-DMRS subcarrier, N DMRS,SC =60, which is the number of DMRS subcarriers on a single PBCH symbol.

[0040] The calculated LS value is divided into multiple parts in the time-frequency domain as shown in Figure 3. The division method is not limited to the two schemes shown in Figure 3. The division size of the frequency domain and the time domain can be controlled according to the channel quality. The channel quality includes but is not limited to: time-frequency offset, Doppler spread, and delay spread parameters. The larger the time offset and delay spread, the finer the frequency domain division. The larger the frequency offset and Doppler spread, the finer the time domain division.

[0041] Sum and average the LS values ​​within the nth segment:

[0042] Calculate the power of the above summed and averaged results, and add and average the power values ​​of all the segments to get the final highway result:

[0043] Compare the power values ​​of multiple issb's, and the issb with the largest P value is the correct issb.

[0044] The index corresponding to the channel estimation sequence with the largest power value among the power values ​​is determined as the index of the synchronization block to be blindly detected.

[0045] This application uses the received PBCH-DMRS to perform a limited number of channel estimations to calculate the corresponding hLs. Based on hLs, simple addition and fewer multiplications are performed to quickly obtain the correct issb during initial cell search and neighboring cell measurement. The algorithm is concise, the process is clear, the hardware resource overhead is greatly reduced, and it is easy to implement in hardware.

[0046] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the relevant technology, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the method described in each embodiment of the present application.

[0047] In this embodiment, a blind detection device for a synchronization block is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the details that have been described will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0048] Figure 4 is a structural block diagram of a blind detection device for a synchronization block according to an embodiment of the present application. As shown in Figure 4, the device includes: an acquisition module 42, configured to acquire multiple channel estimation sequences of the synchronization block to be blind detected, wherein each of the channel estimation sequences corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain; a segmentation module 44, configured to perform time-frequency domain segmentation on the channel estimation values ​​included in each of the channel estimation sequences to obtain multiple segmentation results, wherein each of the segmentation results includes multiple channel estimation values; a first determination module 46, configured to determine the average power value corresponding to each of the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values; a second determination module 48, configured to determine the average of the multiple intermediate power values ​​corresponding to each of the channel estimation sequences as the power value of the channel estimation sequence; a third determination module 410, configured to determine the blind detection result of the synchronization block based on the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value.

[0049] In an exemplary embodiment, the segmentation module includes: a first segmentation unit, configured to determine the frequency domain segmentation size according to the channel quality; performing frequency domain segmentation on the channel estimation sequence according to the frequency domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes time deviation and delay spread, and the larger the time deviation and the delay spread, the finer the frequency domain segmentation; a second segmentation unit, configured to determine the time domain segmentation size according to the channel quality; performing time domain segmentation on the channel estimation sequence according to the time domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes: frequency deviation and Doppler spread, and the larger the frequency deviation and the Doppler spread, the finer the frequency domain segmentation.

[0050] In an exemplary embodiment, the first determination module includes: a first processing unit, configured to perform mean processing on multiple channel estimation values ​​in each of the segmentation results to obtain a mean processing result; and a first determination unit, configured to determine the intermediate power value corresponding to the segmentation result based on the mean processing result of each of the segmentation results.

[0051] In an exemplary embodiment, the candidate pilot sequence includes a PBCH-DMRS sequence, and the acquisition module includes: an acquisition unit, configured to obtain multiple scrambling code initial values ​​corresponding to multiple candidate indexes, wherein the candidate indexes correspond one-to-one to the scrambling code initial values; a generation unit, configured to generate multiple PBCH-DMRS sequences through the multiple candidate indexes and the multiple scrambling code initial values; a second processing unit, configured to perform LS channel estimation and DC subcarrier processing on each of the PBCH-DMRS sequences to obtain a channel estimation sequence corresponding to each of the PBCH-DMRS sequences; the third determination module includes: a second determination unit, configured to determine the blind detection result of the synchronization block based on the candidate index corresponding to the channel estimation sequence with the largest power value.

[0052] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0053] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above method embodiments when run.

[0054] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0055] An embodiment of the present application further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0056] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0057] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0058] Obviously, those skilled in the art should understand that the modules or steps of the present application described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0059] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A blind detection method for a synchronization block, comprising: Acquire multiple channel estimation sequences of synchronization blocks to be blindly detected, wherein each of the channel estimation sequences corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain; Segmenting the channel estimation values ​​included in each of the channel estimation sequences in the time and frequency domains to obtain a plurality of segmentation results, wherein each of the segmentation results includes a plurality of channel estimation values; Determine an average power value corresponding to each segmentation result among the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values; Determine an average of the plurality of intermediate power values ​​corresponding to each of the channel estimation sequences as a power value of the channel estimation sequence; The blind detection result of the synchronization block is determined according to the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value.

2. The method according to claim 1, wherein: The channel estimation values ​​included in each of the channel estimation sequences are segmented in the time and frequency domains to obtain a plurality of segmentation results, including: Determine the frequency domain segmentation size according to the channel quality; perform frequency domain segmentation on the channel estimation sequence according to the frequency domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes time deviation and delay spread, and the larger the time deviation and the delay spread, the finer the frequency domain segmentation; and / or, Determine the time domain segmentation size according to the channel quality; perform time domain segmentation on the channel estimation sequence according to the time domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes: frequency deviation and Doppler spread, and the larger the frequency deviation and the Doppler spread, the finer the frequency domain segmentation.

3. The method according to claim 1, wherein: Determining an average power value corresponding to each segmentation result in the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values ​​includes: Performing mean processing on multiple channel estimation values ​​in each of the segmentation results to obtain a mean processing result; According to the mean processing result of each of the segmentation results, an intermediate power value corresponding to the segmentation result is determined.

4. The method according to claim 1, wherein: The candidate pilot sequence includes a PBCH-DMRS sequence, and obtaining multiple channel estimation sequences of synchronization blocks to be blindly detected includes: Acquire multiple scrambling code initial values ​​corresponding to multiple candidate indexes, wherein the candidate indexes correspond to the scrambling code initial values ​​one by one; Generate multiple PBCH-DMRS sequences using the multiple candidate indexes and the multiple scrambling code initial values; For each of the PBCH-DMRS sequences, perform LS channel estimation and DC subcarrier processing to obtain a channel estimation sequence corresponding to each of the PBCH-DMRS sequences; The blind detection result of the synchronization block is determined according to the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value. Results include: The blind detection result of the synchronization block is determined according to the candidate index corresponding to the channel estimation sequence with the largest power value.

5. A blind detection device for a synchronization block, comprising: An acquisition module, configured to acquire multiple channel estimation sequences of a synchronization block to be blindly detected, wherein each of the channel estimation sequences corresponds to a candidate pilot sequence and includes multiple channel estimation values ​​distributed in the time-frequency domain; a segmentation module, configured to segment the channel estimation values ​​included in each of the channel estimation sequences in the time and frequency domains to obtain a plurality of segmentation results, wherein each of the segmentation results includes a plurality of channel estimation values; A first determination module is configured to determine an average power value corresponding to each segmentation result of the multiple segmentation results corresponding to each of the channel estimation sequences to obtain multiple intermediate power values; A second determining module is configured to determine an average of the multiple intermediate power values ​​corresponding to each of the channel estimation sequences as a power value of the channel estimation sequence; The third determination module is configured to determine the blind detection result of the synchronization block according to the candidate pilot sequence corresponding to the channel estimation sequence with the largest power value.

6. The device according to claim 5, wherein: The segmentation module comprises: A first segmentation unit is configured to determine a frequency domain segmentation size according to a channel quality; perform frequency domain segmentation on the channel estimation sequence according to the frequency domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes a time offset and a delay spread, and the greater the time offset and the delay spread, the finer the frequency domain segmentation; The second segmentation unit is configured to determine the time domain segmentation size according to the channel quality; perform time domain segmentation on the channel estimation sequence according to the time domain segmentation size to obtain the multiple segmentation results, wherein the channel quality includes: frequency deviation and Doppler spread, and the larger the frequency deviation and the Doppler spread, the finer the frequency domain segmentation.

7. The device according to claim 5, wherein: The first determining module includes: A first processing unit is configured to perform mean processing on a plurality of channel estimation values ​​in each of the segmentation results to obtain a mean processing result; The first determining unit is configured to determine the intermediate power value corresponding to the segmentation result according to the mean processing result of each segmentation result.

8. The device according to claim 5, wherein: The candidate pilot sequence includes a PBCH-DMRS sequence, and the acquisition module includes: an acquiring unit, configured to acquire a plurality of scrambling code initial values ​​corresponding to a plurality of candidate indexes, wherein the candidate indexes correspond to the scrambling code initial values ​​in a one-to-one manner; A generating unit, configured to generate a plurality of PBCH-DMRS sequences by using the plurality of candidate indexes and the plurality of scrambling code initial values; A second processing unit is configured to perform LS channel estimation and DC subcarrier processing for each of the PBCH-DMRS sequences to obtain a channel estimation sequence corresponding to each of the PBCH-DMRS sequences; The third determination module includes: a second determination unit, configured to determine the blind detection result of the synchronization block according to the candidate index corresponding to the channel estimation sequence with the largest power value.

9. A computer-readable storage medium having a computer program stored therein, wherein: When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 4 are implemented.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in any one of claims 1 to 4 when executing the computer program.

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