Discharge device for discharging a high-voltage circuit and method for discharging a high-voltage circuit

Abstract

The present invention relates to a discharge device (1) for discharging a high-voltage circuit with an inverter output stage (2) which has at least one half-bridge (3a, 3b, 3c) which comprises serially connected semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) with associated driver circuits (6a, 7a, 6b, 7b, 6c, 7c), and with a processor (12) which is connected via an interface to the driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2), wherein each semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) has a control input (8a, 9a, 8b, 9b, 8c, 9c) which is designed to receive a driver signal from an associated driver circuit (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2), wherein the driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2) each contain a safety logic (10a, 11a, 10b, 11b, 10c, 11c) which is designed to receive a configuration signal from the processor (12) of the discharge device (1) via the interface, which configuration signal configures the driver signal to be emitted by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) in order to discharge the high-voltage circuit.

Description

[0001] Description

[0002] title

[0003] Discharge device for discharging a high-voltage circuit and a method for discharging a high-voltage circuit

[0004] The present invention relates to a discharge device for discharging a high-voltage circuit and a method for discharging a high-voltage circuit.

[0005] State of the art

[0006] Electric and hybrid vehicles often have power electronic circuit components in the drive system between the traction battery and the electric motor, which are typically designed as voltage source converters. A DC link serves as a coupling element between the traction battery and an inverter, which can be controlled to transfer electrical power from the DC link to the electric motor.

[0007] DE10 2011 089 316 A1 describes a control device for semiconductor switches of an inverter and a method for controlling an inverter. A sequence of drive signal pulses is generated such that the semiconductor switch is not fully conductive during a pulse length.

[0008] Inverters can be designed as a full-bridge circuit with a number of bridge branches, each with two semiconductor switches. The semiconductor switches of the bridge branches connected to a first output terminal of the DC link can each be referred to as high-side (HS) switches, and the semiconductor switches of the bridge branches connected to the second output terminal of the DC link can each be referred to as low-side (LS) switches. Semiconductor switches can be, for example, IGBT modules (insulated gate bipolar transistors) with an antiparallel diode or MOSFETs (metal oxide field effect transistors). Control systems that generate switching signals for the semiconductor switches are conventionally used to control the inverter. In the event of a fault, various requirements are placed on the control systems for safety reasons.For example, it may be necessary to safely short-circuit the motor windings of an electrical machine connected to the inverter in the event of a fault. This can be accomplished by closing all high-side (HS) switches and opening all low-side (LS) switches (or vice versa), which is also referred to as an "active short circuit."

[0009] Furthermore, in the event of a fault, it is necessary to quickly and reliably discharge a high-voltage circuit, such as a DC link, which may have a high electrical voltage. Rapid discharge of the high-voltage circuit must occur within a maximum rapid discharge time of several seconds to ensure electrical operational safety.

[0010] In conventional devices, the discharge of high-voltage circuits is carried out via a discharge resistor (so-called bleeding resistor) or via the inverter output stage. Discharge via the inverter output stage is achieved by permanently switching on one or more low-side (LS) switches and clocking a high-side (HS) switch with a special gate control. The current flow from the connection contacts of the DC link or high-voltage circuit leads to power conversion in the semiconductor switches of the inverter output stage. The discharge current is highly sensitive to the pulse width of the clock pulses applied to the control inputs of the semiconductor switches. Therefore, the pulse width of the clock pulses has previously been generated via programmable logic on the low-voltage side.To ensure that the discharge occurs within the desired discharge time without thermally damaging the inverter output stage, the control of the trigger pulses must also track the current operating point. The trigger pulses of a driver signal, which are applied to the control inputs of one or more semiconductor switches (so-called triggers), are correspondingly short and are carried out with a low gate current so that the power loss of the inverter output stage can be dissipated.

[0011] The active discharge of a high-current circuit using a conventional priming method is achieved by switching on the miniature circuit breaker and priming the corresponding high-voltage switch of the half-bridge. A change of priming to the miniature circuit breaker is not provided. Following a short circuit in the HV inverter output stage (e.g., a B6 bridge), especially following a short circuit in a semiconductor switch contained therein, active discharge of the high-voltage circuit by priming the affected semiconductor switch is no longer possible. Otherwise, a half-bridge short circuit or a short circuit in the electric motor connected as a load via the inverter output stage would occur. Active discharge of the high-voltage circuit using the connected HV inverter output stage is therefore not available, or only available to a limited extent, with a conventional discharge device when certain faults occur.

[0012] Disclosure of the invention

[0013] The present invention provides a discharge device according to claim 1, a drive system according to claim 11 and a method according to claim 12.

[0014] Preferred further training is the subject of the subclaims.

[0015] According to one aspect, the present invention provides a discharge device for discharging a high-voltage circuit, comprising an inverter output stage having at least one half-bridge comprising serially connected semiconductor switches with associated driver circuits, and comprising a processor connected via an interface to the driver circuits of the inverter output stage, wherein each semiconductor switch has a control input configured to receive a driver signal from an associated driver circuit of the inverter output stage, wherein the driver circuits of the inverter output stage each include a safety logic configured to receive a configuration signal from the processor of the discharge device via the interface.which configures the drive signal to be output by the driver circuit to the corresponding control input of the semiconductor switch for discharging the high-voltage circuit.

[0016] According to a further aspect, the invention provides a method for discharging a high-voltage circuit comprising the steps:

[0017] Providing configuration signals for the configuration of driver circuits of an inverter output stage by a processor, wherein a safety logic of a driver circuit receives a configuration signal from the processor via an interface, which configures the driver signal to be output by the driver circuit to an associated control input of a semiconductor switch of a half-bridge of the inverter output stage for discharging the high-voltage circuit; and outputting the configured driver signal by the driver circuit to the associated control input of the semiconductor switch as soon as the safety logic of the driver circuit receives a request to discharge the high-voltage circuit from the processor via the interface.

[0018] According to a further aspect, the invention provides a drive system for an n-phase electrical machine, where n > 1, with an inverter output stage having at least one half-bridge comprising serially connected semiconductor switches with associated driver circuits, wherein the inverter output stage is supplied with electrical energy from an intermediate circuit capacitor of a high-voltage circuit and is designed to generate an n-phase supply voltage for the electrical machine, and wherein the inverter output stage has a processor connected via an interface to the driver circuits of the inverter output stage, wherein each semiconductor switch has a control input designed to receive a driver signal from an associated driver circuit of the inverter output stage, wherein the driver circuits of the inverter output stage each include a safety logic,which is designed to receive a configuration signal from the processor of the discharge device via the interface, which configures the drive signal to be output by the driver circuit to the associated control input of the semiconductor switch for discharging the high-voltage circuit.

[0019] Advantages of the invention

[0020] A basic idea of ​​the invention is that the driver signals applied to the semiconductor switches of the inverter output stage to discharge the high-voltage circuit can be configured and can thus flexibly handle various types of errors that occur.

[0021] An advantage of the present invention is that after a short circuit in the inverter output stage, especially in a high-side (HS) semiconductor switch, an active discharge can be performed by triggering the low-side (LS) semiconductor switch. Active discharge is thus available without restriction in most fault situations. The trigger pulses or discharge pulses of a driver signal are not applied exclusively to the HS (high-side) semiconductor switches, but can also be applied to the LS (low-side) semiconductor switches.

[0022] A further advantage of the discharge device according to the invention is that the availability of the active discharge is increased and a large proportion of the fault cases of the inverter and its inverter output stage can be covered.

[0023] According to one embodiment of the discharge device, each half-bridge of the inverter output stage has two semiconductor switches connected in series with each other, which are designed to supply a phase current for a connected electrical load at a connection node during normal operation of the inverter output stage. According to one embodiment of the discharge device, the half-bridges of the inverter output stage are connected in parallel between a positive terminal and a negative terminal of the high-voltage circuit.

[0024] According to one embodiment of the discharge device, the interface between the processor and the safety logic of a driver circuit has a communication interface which is provided so that the processor requests an active discharge of the high-voltage circuit from the safety logic of the driver circuit by emitting a suitable driver signal to the control input of the associated semiconductor switch.

[0025] This allows the security logic to respond quickly to a corresponding request from the processor.

[0026] According to one embodiment of the discharge device, the interface between the processor and the safety logic of a driver circuit has a control line for applying a static signal level by the processor, which determines the driver signal to be output by the driver circuit to the associated control input of the semiconductor switch for discharging the high-voltage circuit.

[0027] This offers the advantage that an existing control line can be used without any changes to the circuitry.

[0028] According to one embodiment of the discharge device, a first signal level applied by the processor to the control line of the interface defines a first driver signal to be output by the driver circuit to the associated control input of the semiconductor switch for discharging the high-voltage circuit, by which the semiconductor switch is permanently switched on. According to one embodiment of the discharge device, a second signal level applied by the processor to the control line of the interface defines a second driver signal to be output by the driver circuit to the associated control input of the semiconductor switch for discharging the high-voltage circuit, by which second driver signal the semiconductor switch is temporarily switched on.

[0029] According to one embodiment of the discharge device, the communication interface of the interface is designed to adjust signal parameters of the driver signal to be output by the driver circuit to the control input of the semiconductor switch as a function of detected operating parameters.

[0030] This offers the advantage that the discharge device can be dynamically adapted to the current operating conditions and influencing factors.

[0031] According to one embodiment of the discharge device, the operating parameters include a detected electrical voltage of the high-voltage circuit and a detected temperature of the inverter output stage.

[0032] The current voltage of the high-voltage circuit and the temperature of the inverter output stage are relevant influencing factors for the discharge of the high-voltage circuit required in the event of a fault or when certain operating conditions occur.

[0033] According to one embodiment of the discharge device, the second drive signal comprises drive signal pulses with an adjustable pulse duration as signal parameters.

[0034] This allows the conductivity of the semiconductor switch to be flexibly influenced depending on the pulse length or pulse duration of the driver signal pulses. Further features and advantages of embodiments of the invention will become apparent from the following description with reference to the accompanying drawings.

[0035] Short description of the drawings

[0036] The present invention is explained in more detail below with reference to the exemplary embodiments shown in the schematic figures of the drawing.

[0037] They show:

[0038] Fig.1 is a schematic block diagram of a discharge device for discharging a high-voltage circuit;

[0039] Fig.2 is a simple flow diagram illustrating an embodiment of the discharge method according to the invention.

[0040] In the figures, the same reference symbols denote the same or functionally identical elements.

[0041] The discharge device 1, shown schematically in Fig. 1, serves to discharge a high-voltage circuit or high-voltage current circuit. The discharge device 1 has an inverter output stage 2. The inverter output stage 2 forms part of an inverter. The inverter output stage 2 has at least one half-bridge, which comprises serially connected semiconductor switches with associated driver circuits. As shown in Fig. 1, the inverter output stage 2 in one possible embodiment comprises three half-bridges 3a, 3b, 3c, wherein each half-bridge of the inverter output stage 2 comprises two serially connected semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c. The number of half-bridges can vary in different embodiments. In one possible embodiment, the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c are formed by transistors, in particular field-effect transistors, or IGBTs.The discharge device 1 further comprises a processor 12 which is connected via an interface to the associated driver circuits 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2. Each of the six semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c has a control input 8a, 9a, 8b, 9b, 8c, 9c which is designed to receive a driver signal TS from an associated driver circuit 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2.The driver circuits 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2 each contain a safety logic 10a, 11a, 10b, 11b, 10c, 11c integrated therein, which is designed to receive a configuration signal KS from the processor 12 of the discharge device 1 via the interface, which configuration signal KS configures the driver signal TS to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the associated control input 8a, 9a, 8b, 9b, 8c, 9c of the corresponding semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c for discharging the high-voltage circuit. The configuration signal KS provided by the processor 12 can comprise configuration data stored in a configuration register or configuration memory of the driver circuit 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2 are stored.In one embodiment of the discharge device 1, each half-bridge 3a, 3b, 3c of the inverter output stage 2 has two semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c connected in series with one another, which are designed to supply a sinusoidal phase current Iph for an electrical load connected thereto at a connection node 13a, 13b, 13c during normal operation of the inverter output stage 2. The connection nodes 13a, 13b, 13c are connected via lines 21a, 21b, 21c to output terminals 22a, 22b, 22c of the inverter output stage 2. The connected electrical load can comprise an inductive load, in particular a winding of an electric motor. The half-bridges 3a, 3b, 3c of the inverter output stage 2 are connected in parallel between a positive terminal T+ and a negative terminal T- of the high-voltage circuit.HS - semiconductor switches 4a, 4b, 4c are connected to the positive terminal T+ and the LS semiconductor switches 5a, 5b, 5c are connected to the negative terminal T- of the high-voltage circuit to be discharged.

[0042] In one embodiment of the discharge device 1, the interface between the processor 12 and the safety logic 10a, 11a, 10b, 11b, 10c, 11c of a driver circuit 6a, 7a, 6b, 7b, 6c, 7c has a communication interface 14, 15 which is provided so that the processor 12 requests an active discharge of the high-voltage circuit from the safety logic 10a, 11a, 10b, 11b, 10c, 11c of the driver circuit 6a, 7a, 6b, 7b, 6c, 7c by outputting a suitable driver signal TS to the control input 8a, 9a, 8b, 9b, 8c, 9c of the associated semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c.

[0043] In one embodiment of the discharge device, the interface between the processor 12 and the safety logic 10a, 11a, 10b, 11b, 10c, 11c of a driver circuit 6a, 7a, 6b, 7b, 6c, 7c has a PWM control line 16, 17 for applying a static signal level by the processor 12, which determines the driver signal TS to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the associated control input 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c for discharging the high-voltage circuit.

[0044] In one embodiment of the discharge device 1, a first signal level applied by the processor 12 to the PWM control line 16, 17 of the interface defines a first driver signal TS1 to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the associated control input 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c for discharging the high-voltage circuit, by means of which the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c is permanently switched on.

[0045] In one embodiment of the discharge device 1, a second signal level applied by the processor 12 to the control line 16, 17 of the interface defines a second driver signal TS2 to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the associated control input 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c for discharging the high-voltage circuit, by means of which the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c is temporarily switched on.

[0046] In one embodiment of the discharge device 1, the communication interface 14, 15 of the interface is designed to adjust signal parameters of the driver signal to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the control input 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c as a function of detected operating parameters.

[0047] In one embodiment of the discharge device 1, the second driver signal TS2 comprises driver signal pulses with an adjustable pulse duration as signal parameters. The processor 12 requests an active discharge of the high-voltage circuit via the communication interface 14, 15 (e.g., a UART). In addition, the processor 12 preferably defines the side (HS / LS) on which the starting pulses or discharge pulses are applied to the control inputs 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c, via a static signal on the PWM control signal lines. The processor 12 preferably sets the pulse width parameter for the active discharge via the communication interface 14, 15. In addition, the processor 12 can adapt the gate current Ig parameter to the current operating point via the communication interface 14, 15 depending on the electrical voltage U and the temperature T of the inverter output stage 2.The control of the discharge pulses in a short time interval (e.g., 100 ps) with regard to pulse duration and gate current Ig is handled by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c. Depending on the configuration of the discharge device 1, discharge pulses are not applied exclusively to the control inputs 8a, 8b, 8c of the HS (high-side) semiconductor switches 4a, 4b, 4c, but can also be applied to the control inputs 9a, 9b, 9c of the LS (low-side) semiconductor switches 5a, 5b, 5c. This increases the availability of the active discharge, and various fault scenarios in the HV output stage or the high-voltage circuit can be reliably covered.

[0048] Using a static level at the control signal inputs (gate driver PWM inputs), the low-voltage (LV) processor 12 defines which side (LS or HS) of the semiconductor switches of the inverter output stage 2 is permanently switched on and which side of the inverter output stage 2 executes the activation pulses required to discharge the high-voltage circuit. For example, the PWM input = high is interpreted by the respective driver circuit 6a, 7a, 6b, 7b, 6c, 7c as a signal for permanent switching on, whereas the PWM input = low is interpreted by the respective driver circuit 6a, 7a, 6b, 7b, 6c, 7c as a signal for emitting activation pulses.

[0049] In certain operating modes of the inverter, it may be necessary to rapidly discharge its DC link. With the help of the control of the discharge device 1, which includes the processor 12, the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c of half-bridges 3a, 3b, 3c within the inverter output stage 2 can be selectively clocked. In this case, the respective semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c is controlled in a pulsed operation, wherein control pulses are fed into the control input of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c, the duration or pulse length of which is so short that the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c is not yet fully switched to conductive state, but is briefly in a transition state between the blocking state and the conducting state.During this time, energy from an intermediate circuit capacitor of the DC link can be converted into heat when a current flows through the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c, thus reducing the electrical voltage in the DC link in a short time. This enables, in particular, the setting of rapid discharge mode in an inverter controlled in this way. If necessary or if a fault occurs, a rapid discharge of an intermediate circuit capacitor of the DC link or other high-voltage circuit feeding the inverter can be achieved within an adjustable or programmable discharge time. This discharge time may be, for example, a few seconds.

[0050] With regard to the circuit implementation of the discharge device 1, one advantage is that the already existing components of the inverter can be used for discharging without the need to install additional circuits or discharge elements, such as switchable resistors or the like.

[0051] To implement the discharge operating mode, the control circuit can be designed to generate the second driver signal TS2 as a sequence of driver signal pulses with a predetermined and adjustable pulse length, so that the controlled semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c is not fully conductive during the pulse duration of a driver signal pulse. The driver signal pulses each have a pulse length or pulse duration. The pulse length can be short with respect to the control duration in a normal control operation of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c. The pulse length can depend on the physical parameters of the semiconductor switch.

[0052] 4a, 5a, 4b, 5b, 4c, 5c as well as the circuit implementation of the driver circuit 6a, 7a, 6b, 7b, 6c, 7c.

[0053] According to a further aspect, the invention provides a drive system for an n-phase electrical machine, where n > 1, with an inverter output stage 2 which has at least one half-bridge 3a, 3b, 3c, each of which comprises two series-connected semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c with associated driver circuits 6a, 7a, 6b, 7b, 6c, 7c.

[0054] The inverter output stage 2 is supplied with electrical energy from an intermediate circuit capacitor of a high-voltage circuit and is designed to generate an n-phase supply voltage for the electric machine. The inverter output stage 2 forms part of a discharge device 1 of an inverter of the drive system. This discharge device 1 has a processor 12, which is connected via an interface to the driver circuits 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2. Each semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c of the inverter output stage 2 has a control input 8a, 9a, 8b, 9b, 8c, 9c, which is designed to receive a driver signal TS from an associated driver circuit 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2. The driver circuits 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2 of the drive system each contain a safety logic

[0055] 10a, 11a, 10b, 11b, 10c, 11c, which is designed to receive a configuration signal KS from the processor 12 of the discharge device 1 via the interface, which configuration signal KS preconfigures the driver signal TS to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the associated control input 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c for discharging the high-voltage circuit. The n-phase electrical machine forms an electric motor that can be installed in a vehicle. The n-phase electric motor of the drive system generally has three current phase connections, which are connected to the output connections 22a, 22b, 22c of the inverter output stage 2.

[0056] Fig. 2 shows a simple flow diagram illustrating a possible embodiment of the method according to the invention.

[0057] The method for discharging a high-voltage circuit, in particular a DC intermediate circuit, essentially comprises two main steps S1, S2.

[0058] In a first step S1, configuration signals for the configuration of driver circuits 6a, 7a, 6b, 7b, 6c, 7c of the inverter output stage 2 are provided by a processor 12. In this case, a safety logic 10a, 11a, 10b, 11b, 10c, 11c of a driver circuit 6a, 7a, 6b, 7b, 6c, 7c receives a configuration signal KS via an interface from the processor 12, which configures the driver signal TS to be output by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to an associated control input 8a, 9a, 8b, 9b, 8c, 9c of a semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c of a half-bridge 3a, 3b, 3c of the inverter output stage 2 for discharging the high-voltage circuit.

[0059] In a second step S2, the correspondingly configured driver signal TS is applied by the driver circuit 6a, 7a, 6b, 7b, 6c, 7c to the associated control input 8a, 9a, 8b, 9b, 8c, 9c of the semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c as soon as the safety logic 10a, 11a, 10b, 11b, 10c, 11c of the driver circuit

[0060] 6a, 7a, 6b, 7b, 6c, 7c receives a request to discharge the high-voltage circuit from the processor 12 via the interface.

[0061] Although the present invention has been fully described above with reference to the preferred embodiments, it is not limited thereto but can be modified in many ways.

Claims

Patent claims 1. Discharge device (1) for discharging a high-voltage circuit with an inverter output stage (2) which has at least one half-bridge (3a, 3b, 3c) which comprise serially connected semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) with associated driver circuits (6a, 7a, 6b, 7b, 6c, 7c), and with a processor (12) which is connected via an interface to the driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2), wherein each semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) has a control input (8a, 9a, 8b, 9b, 8c, 9c) which is designed to receive a driver signal from an associated driver circuit (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2), wherein the driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2) each include a safety logic (10a, 11a, 10b, 11b, 10c, 11c) which is designed to receive a configuration signal from the processor (12) of the discharge device (1) via the interface, which configuration signal is transmitted by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) configured to deliver the drive signal for discharging the high voltage circuit.

2. Discharge device according to claim 1, wherein each half-bridge (3a, 3b, 3c) of the inverter output stage (2) has two semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) connected in series with one another, which are designed to supply a phase current for an electrical load connected thereto at a connection node (13a, 13b, 13c) during normal operation of the inverter output stage (2).

3. Discharge device according to claim 1 or 2, wherein the half-bridges (3a, 3b, 3c) of the inverter output stage (2) are connected in parallel to one another between a positive terminal (T+) and a negative terminal (T-) of the high-voltage circuit.

4. Discharge device according to one of the preceding claims 1 to 3, wherein the interface between the processor and the safety logic (10a, 11a, 10b, 11b, 10c, 11c) of a driver circuit has a communication interface (14, 15) which is provided for the processor (12) to be communicated with the safety logic (10a, 11a, 10b, 11b, 10c, 11c) of the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) requests an active discharge of the high-voltage circuit by outputting a suitable driver signal to the control input (8a, 9a, 8b, 9b, 8c, 9c) of the associated semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c).

5. Discharge device according to one of the preceding claims 1 to 4, wherein the interface between the processor (1) and the safety logic (10a, 11a, 10b, 11b, 10c, 11c) of a driver circuit has a control line (16, 17) for applying a static signal level by the processor (12), which determines the driver signal to be output by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) for discharging the high-voltage circuit.

6. Discharge device according to claim 5, wherein a first signal level applied by the processor (12) to the control line (16, 17) of the interface defines a first drive signal to be output by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) for discharging the high-voltage circuit, by means of which the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) is permanently switched on.

7. Discharge device according to claim 5 or 6, wherein a second signal level applied by the processor (12) to the control line (16, 17) of the interface is a signal level applied by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) to discharge the high-voltage circuit, by means of which the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) is switched on temporarily.

8. Discharge device according to one of the preceding claims 4 to 7, wherein the communication interface of the interface is designed to adjust signal parameters of the driver signal to be output by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) as a function of detected operating parameters.

9. Discharge device according to claim 8, wherein the operating parameters comprise a detected electrical voltage of the high-voltage circuit and a detected temperature (T) of the inverter output stage (2).

10. Discharge device according to claim 8 or 9, wherein the second drive signal comprises drive signal pulses with an adjustable pulse duration as signal parameters. 11 . Drive system for an n-phase electrical machine, where n > 1, with: an inverter output stage (2) which has at least one half-bridge (3a, 3b, 3c) which comprises series-connected semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) with associated driver circuits (6a, 7a, 6b, 7b, 6c, 7c), wherein the inverter output stage (2) is fed with electrical energy from an intermediate circuit capacitor of a high-voltage circuit and is designed to generate an n-phase supply voltage for the electrical machine, and wherein the inverter output stage (2) has a processor (12) which is connected via an interface to the driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2), wherein each semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) a control input (8a, 9a, 8b, 9b, 8c, 9c) which is designed to receive a driver signal from an associated driver circuit (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2), wherein the driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of the inverter output stage (2) each contain a safety logic (10a, 11a, 10b, 11b, 10c, 11c) which is designed to receive a configuration signal from the processor (12) of the discharge device (1) via the interface, which configuration signal configures the driver signal to be output by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) for discharging the high-voltage circuit.

12. A method for discharging a high-voltage circuit comprising the steps of: Providing (S1) configuration signals for the configuration of driver circuits (6a, 7a, 6b, 7b, 6c, 7c) of an inverter output stage (2) by a processor (12), wherein a safety logic (10a, 11a, 10b, 11b, 10c, 11c) of a driver circuit (6a, 7a, 6b, 7b, 6c, 7c) receives a configuration signal from the processor (12) via an interface, which signal is transmitted by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to an associated control input (8a, 9a, 8b, 9b, 8c, 9c) of a semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) of a half-bridge (3a, 3b, 3c) of the inverter The driver signal to be output by the output stage (2) is configured to discharge the high-voltage circuit; and Output (S2) of the configured driver signal by the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) to the associated control input (8a, 9a, 8b, 9b, 8c, 9c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) as soon as the safety logic (10a, 11a, 10b, 11b, 10c, 11c) of the driver circuit (6a, 7a, 6b, 7b, 6c, 7c) receives a request to discharge the high-voltage circuit from the processor (12) via the interface

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