Display panel and display terminal

Abstract

The present application discloses a display panel and a display terminal. The display panel comprises a substrate and driving devices. Each driving device comprises an active portion, a gate, a gate insulating layer, a source, and a drain. A groove runs through a first contact portion, a channel portion, and a second contact portion of the active portion; the gate at least comprises a first gate portion disposed in the groove, and the projection of the first gate portion on the inner wall of the groove at least covers the projection of the channel portion on the inner wall of the groove; the gate insulating layer is at least disposed between the gate electrode and the channel portion; and the source is electrically connected to the first contact portion, and the drain is electrically connected to the second contact portion.

Description

Display panel and display terminal

[0001] This application claims priority to Chinese patent application No. 202311669534.9 filed on December 5, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of display technology, and in particular to a display panel and a display terminal. Background Art

[0003] SOG technology (system on glass) integrates gate driver circuits, source driver circuits, timing controllers, and other chip circuits onto a glass substrate. This improves the integration density of display panels, reduces chip reliance, and lowers costs. Implementing SOG technology requires increasing the maximum operating frequency and current density of driver devices. These requirements require driver devices with shorter channel lengths, higher mobility, and smaller size.

[0004] Existing driver devices are limited by manufacturing processes and are difficult to achieve the above requirements. Therefore, there is an urgent need for a new driver device with short channel, small size and high on-state current performance. Summary of the Invention

[0005] The present application provides a display panel and a display terminal. By optimizing the structure of the driver device, a short-channel, small-volume driver device can be manufactured under the existing manufacturing process, thereby improving the electrical properties of the driver device, thereby facilitating the integration of chip circuits in the display panel.

[0006] To solve the above technical problems, the technical solutions provided by this application are as follows:

[0007] The present application provides a display panel, comprising:

[0008] a substrate, on which a plurality of driving devices are arranged;

[0009] The driving device includes:

[0010] an active portion disposed on the substrate, the active portion comprising a first contact portion, a channel portion, and a second contact portion that are stacked, the active portion having a trench that passes through the first contact portion, the channel portion, and the second contact portion, the first contact portion being disposed on a side of the channel portion close to the substrate, and the second contact portion being disposed on a side of the channel portion away from the substrate;

[0011] a gate, comprising at least a first gate portion, wherein the first gate portion is disposed in the trench, and a projection of the first gate portion on an inner wall of the trench at least covers a projection of the channel portion on the inner wall of the trench;

[0012] a gate insulating layer, provided at least between the gate and the channel portion;

[0013] a source electrode and a drain electrode, wherein the source electrode is electrically connected to the first contact portion, and the drain electrode is electrically connected to the second contact portion;

[0014] a first metal trace electrically connected to the gate of the driving device;

[0015] The second metal wiring is electrically connected to the source or the drain of the driving device.

[0016] The present application further provides a display terminal, the display terminal including a display panel, the display panel including:

[0017] a substrate, on which a plurality of driving devices are arranged;

[0018] The driving device includes:

[0019] an active portion disposed on the substrate, the active portion comprising a first contact portion, a channel portion, and a second contact portion that are stacked, the active portion having a trench that passes through the first contact portion, the channel portion, and the second contact portion, the first contact portion being disposed on a side of the channel portion close to the substrate, and the second contact portion being disposed on a side of the channel portion away from the substrate;

[0020] a gate, comprising at least a first gate portion, wherein the first gate portion is disposed in the trench, and a projection of the first gate portion on an inner wall of the trench at least covers a projection of the channel portion on the inner wall of the trench;

[0021] a gate insulating layer, provided at least between the gate and the channel portion;

[0022] a source electrode and a drain electrode, wherein the source electrode is electrically connected to the first contact portion, and the drain electrode is electrically connected to the second contact portion;

[0023] a first metal trace electrically connected to the gate of the driving device;

[0024] The second metal wiring is electrically connected to the source or the drain of the driving device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] FIG1a is a schematic diagram of a partial top view of a display panel in the related art;

[0026] FIG1b is a schematic cross-sectional structure diagram of the AA section in FIG1a;

[0027] FIG1c is a schematic cross-sectional structure diagram of the BB section in FIG1a;

[0028] FIG2 a is a schematic diagram of a partial top view of the structure of a first display panel provided in an embodiment of the present application;

[0029] FIG2b is a schematic cross-sectional structure diagram of the CC section in FIG2a;

[0030] FIG2c is a schematic cross-sectional structure diagram of the DD section in FIG2a;

[0031] FIG3 a is a schematic diagram of a partial top view of the structure of a second display panel provided in an embodiment of the present application;

[0032] FIG3 b is a schematic cross-sectional structure diagram of a second EE cross section in FIG3 a ;

[0033] FIG3c is a schematic cross-sectional structure diagram of the second FF cross section in FIG3a;

[0034] FIG4 a is a schematic cross-sectional structure diagram of a third EE cross section in FIG3 a ;

[0035] FIG4b is a schematic cross-sectional structure diagram of the third FF cross section in FIG3a;

[0036] FIG5a is a schematic cross-sectional structure diagram of a fourth EE cross section in FIG3a;

[0037] FIG5b is a schematic cross-sectional structure diagram of the fourth FF cross section in FIG3a;

[0038] 6a to 6c are flowcharts of a manufacturing process of a first display panel provided by an embodiment of the present application. Modes for Carrying Out the Invention

[0039] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0040] In related technologies, display panels include multiple driver devices, which can be used in pixel architecture, gate drive circuits, and other applications. SOG technology places higher demands on driver devices. Implementing SOG requires improving the integration level, maximum operating frequency, and current density of existing driver devices. These requirements all require driver devices with shorter channel lengths, higher mobility, and smaller size.

[0041] As shown in Figures 1a to 1c, Figure 1a is a schematic diagram of a partial top view of a display panel in the related art; Figure 1b is a schematic diagram of the cross-sectional structure of section AA in Figure 1a; and Figure 1c is a schematic diagram of the cross-sectional structure of section BB in Figure 1a. The active layer of the driver device in the related art is linear. The active layer ACT includes a channel S1 and doped portions S2 located at either end of the channel S1. The two doped portions S2 are electrically connected to the source or drain of the source / drain layer SD, respectively. As shown in Figure 1b, the channel length L1 refers to the distance between the two doped portions S2, that is, the distance the current flows between the two doped portions S2. As shown in Figure 1c, the channel width W1 refers to the dimension of the channel S1 along a direction perpendicular to the channel length L1. Due to the accuracy of the patterning process, the channel length L1 is generally greater than 2 microns. Increasing the channel width W1 requires a larger area.

[0042] In response to the above technical problems, this application proposes the following solutions.

[0043] Referring to Figures 2a to 5b, the present application provides a display panel, which includes a substrate 11, a first metal trace 60, and a second metal trace. A plurality of driving devices are provided on the substrate 11, and the driving devices include an active portion 20, a gate insulating layer 40, and a gate 50. The active portion 20 is provided on the substrate 11, and the active portion 20 includes a stacked first contact portion 21, a channel portion 22, and a second contact portion 23. The first contact portion 21 is provided on a side of the channel portion 22 close to the substrate 11, and the second contact portion 23 is provided on a side of the channel portion 22 away from the substrate 11. The active portion 20 is provided with a groove 30. 30 passes through the first contact portion 21, the channel portion 22 and the second contact portion 23; the gate 50 includes at least a first gate portion 51, the first gate portion 51 is arranged in the groove 30, and the projection of the first gate portion 51 on the inner wall of the groove 30 at least covers the projection of the channel portion 22 on the inner wall of the groove 30; the gate insulation layer 40 is at least arranged between the gate 50 and the channel portion 22; the source 70 is electrically connected to the first contact portion 21, the drain 80 is electrically connected to the second contact portion 23, the first metal trace 60 is electrically connected to the gate 50 of the driving device, and the second metal trace is electrically connected to the source 70 or the drain 80 of the driving device.

[0044] In this embodiment, the surface of substrate 11 serves as a support surface for various film layers. The surface of substrate 11 is parallel to the display surface of the display panel. Substrate 11 can be a flexible substrate or a rigid substrate. The flexible substrate can be made of a material such as colorless polyimide (PI), polycarbonate (PC), polynorbornene (PNB), and polyethylene terephthalate (PET). The rigid substrate can be made of a material such as glass.

[0045] In this embodiment, the active portion 20 includes a first contact portion 21, a channel portion 22, and a second contact portion 23 stacked in sequence. Through the above arrangement, the thickness of the channel portion 22 can be used as the channel length. The thickness of the channel portion 22 refers to the dimension of the channel portion 22 in a direction perpendicular to the plane of the substrate 11. Because the process accuracy of the thickness dimension of the channel portion 22 during the fabrication of the channel portion 22 is greater than the process accuracy of the dimension of the channel portion 22 in a direction parallel to the plane of the substrate 11, a driver device with a smaller channel length can be fabricated.

[0046] The channel portion 22 may be made of polycrystalline silicon. The first contact portion 21 and the second contact portion 23 may be formed by ion doping the polycrystalline silicon. Doping improves the conductivity of the first contact portion 21 and the second contact portion 23, enabling ohmic contact with the source 70 and drain 80 of the driver device. The doped ions may be, but are not limited to, phosphorus ions, boron ions, and the like. The doping method may be light or heavy, and this application is not limited thereto.

[0047] It should be noted that the polysilicon in the channel portion 22 can be formed from amorphous silicon through an excimer laser annealing (ELA) process. After the excimer laser annealing process, the amorphous silicon melts and recrystallizes, achieving a grain-free channel 22 perpendicular to the plane of the substrate 11. This results in a single crystal grain along the channel length, with a grain size of approximately 0.3 microns. This creates a short channel and improves the electrical performance of the driver device.

[0048] In this embodiment, the active portion 20 is provided with a groove 30, which passes through the first contact portion 21, the channel portion 22, and the second contact portion 23. It should be noted that the groove 30 can be provided in the middle area of ​​the three-layer stack of the active portion 20, that is, the groove 30 forms a hole on the active portion 20, and the groove 30 is located inside the active portion 20. The groove 30 can also be provided in the edge area of ​​the three-layer stack of the active portion 20, that is, the groove 30 partially overlaps with the active portion 20. When the groove 30 is located inside the active portion 20, the circumference of the groove 30 can be used as the channel width, which can further increase the width-to-length ratio of the channel. The width-to-length ratio of the channel is the ratio of the channel width to the channel length. The on-state current of the driver device is proportional to the width-to-length ratio of the channel. Therefore, the on-state current of the driver device can be further improved, thereby improving the electrical properties of the driver device.

[0049] It should be understood that the shape of the active portion 20 can be set as needed. For example, the shape of the orthographic projection of the active portion 20 on the substrate 11 can be circular, rectangular, fan-shaped, etc. Correspondingly, the shape of the groove 30 can also be set to adapt to the shape of the active portion 20. For example, the contour line of the groove 30 is evenly spaced from the contour line of the active portion 20, but is not limited to this. The shape of the groove 30 can be selected to have a larger perimeter under the same area, thereby increasing the width-to-length ratio of the channel, which is the ratio of the channel width to the channel length.

[0050] Optionally, the shape of the orthographic projection of the groove 30 on the substrate 11 is circular, rectangular, or fan-shaped.

[0051] In some embodiments, the angle between the inner wall of the trench 30 and the substrate 11 is a right angle or an obtuse angle. The angle of the obtuse angle can be adjusted according to the patterning process. When the angle between the inner wall of the trench 30 and the substrate 11 is a right angle, the size of the driver device can be reduced. When the angle between the inner wall of the trench 30 and the substrate 11 is an obtuse angle, it is easier for the gate 50 to cover the inner wall of the trench 30, preventing the gate 50 from breaking.

[0052] In this embodiment, a gate insulating layer 40 is disposed between the gate 50 and the channel portion 22. The gate insulating layer 40 may be formed of, but is not limited to, a stack of one or more layers of materials such as silicon nitride, silicon oxide, or silicon oxynitride. The gate insulating layer 40 can separate the gate 50 from the channel portion 22, thereby providing insulation between the gate 50 and the channel portion 22.

[0053] Through the above-mentioned setting, the circumference of the groove 30 is used as the channel width, which can increase the channel width without increasing the volume of the driving device, thereby manufacturing a short channel and small volume driving device under the existing manufacturing process, improving the electrical properties of the driving device, and thus helping to integrate chip circuits in the display panel.

[0054] In this embodiment, the gate 50 at least includes a first gate portion 51 . The first gate portion 51 is disposed in the trench 30 , and the first gate portion 51 is at least disposed corresponding to the channel portion 22 .

[0055] The gate 50 is a conductive material and may be formed of any one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof, but is not limited thereto.

[0056] In this embodiment, the source electrode 70 and the drain electrode 80 are made of a conductive material. The source electrode 70 and the drain electrode 80 can be formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or alloys thereof, but are not limited thereto.

[0057] In this embodiment, the driving device may be a thin film transistor or the like.

[0058] In this embodiment, the first metal trace 60 is electrically connected to the gate electrode. The first metal trace 60 can be provided in the same layer as the gate electrode or in a different layer.

[0059] In this embodiment, the second metal trace is electrically connected to the source 70 or the drain 80. The second metal trace can be provided in the same layer as the source 70 or in a different layer, or the second metal trace can be provided in the same layer as the drain 80 or in a different layer.

[0060] In the display panel of the present application, as shown in Figures 2a to 5b, the gate 50 also includes a second gate portion 52 located at one end of the first gate portion 51, and a third gate portion 53 located at the other end opposite to the first gate portion 51; the second gate portion 52 is located in the groove 30 and is electrically connected to the first gate portion 51; the third gate portion 53 is located at the outer edge of the opening of the groove 30 and is electrically connected to the first gate portion 51.

[0061] In this embodiment, the gate 50 includes a first gate portion 51, a second gate portion 52, and a third gate portion 53 that are connected. In other words, the gate 50 continuously covers the bottom and inner wall of the trench 30 and extends to the outer edge of the opening of the trench 30. The first gate portion 51, the second gate portion 52, and the third gate portion 53 can be formed by the same patterning process.

[0062] In the display panel of the present application, as shown in FIG. 2 a to FIG. 3 c , the first metal trace 60 is disposed on the substrate 11 and located on a side of the active portion 20 close to the substrate 11 . The first metal trace 60 is electrically connected to the second gate portion 52 .

[0063] In this embodiment, as shown in Figures 2a to 2c, Figure 2a is a schematic diagram of a partial top view of the first display panel provided in an embodiment of the present application, Figure 2b is a schematic diagram of the cross-sectional structure of the CC section in Figure 2a, and Figure 2c is a schematic diagram of the cross-sectional structure of the DD section in Figure 2a. The orthographic projection of the first contact portion 21 on the substrate 11 coincides with the orthographic projection of the second contact portion 23 on the substrate 11, and the active portion 20 can be manufactured using the same patterning process, thereby simplifying the manufacturing process of the display panel. The first contact portion 21 and the second contact portion 23 have substantially the same shape, and the sidewalls of the first contact portion 21 and the second contact portion 23 are flush.

[0064] In this embodiment, as shown in Figures 3a to 3c, Figure 3a is a partial top view of the second display panel provided in an embodiment of the present application, Figure 3b is a cross-sectional structural diagram of the second EE section in Figure 3a, and Figure 3c is a cross-sectional structural diagram of the second FF section in Figure 3a. The difference between the second display panel and the first display panel is that the projected area of ​​the second contact portion 23 is smaller than the projected area of ​​the first contact portion 21. The display panel includes a first metal trace 60, which is disposed on the substrate 11 and is located on the side of the active portion 20 close to the substrate 11. The groove 30 exposes the first metal trace 60, and the first metal trace 60 is electrically connected to the first gate portion 51.

[0065] In this embodiment, the first metal trace 60 is electrically connected to the second gate portion 52. With the above arrangement, the connection between the first metal trace 60 and the gate 50 does not occupy additional wiring space, thereby reducing the size of the driver device.

[0066] In this embodiment, a buffer layer 12 is further provided between the substrate 11 and the active portion 20 , and the trench 30 penetrates the buffer layer 12 to expose the first metal trace 60 .

[0067] In the display panel of the present application, as shown in FIG. 4 a and FIG. 4 b , the first metal trace 60 is disposed on the gate insulating layer 40 and located on a side of the active portion 20 away from the substrate 11 . The first metal trace 60 is electrically connected to the third gate portion 53 .

[0068] In this embodiment, as shown in Figures 4a and 4b, Figure 4a is a schematic cross-sectional structural diagram of the third type of EE cross-section in Figure 3a, and Figure 4b is a schematic cross-sectional structural diagram of the third type of FF cross-section in Figure 3a. A first metal trace 60 is electrically connected to the third gate portion 53. By arranging the first metal trace 60 and the third gate portion 53 on the same layer in this embodiment, the first metal trace 60 and the third gate portion 53 can be manufactured using the same photomask, thereby simplifying the display panel manufacturing process.

[0069] In the display panel of the present application, as shown in FIG. 5 a and FIG. 5 b , the first metal trace 60 is disposed on a side of the driving device away from the substrate 11 , and the first metal trace 60 is electrically connected to the third gate portion 53 through a via.

[0070] In this embodiment, as shown in Figures 5a and 5b, Figure 5a is a schematic cross-sectional structural diagram of the fourth EE cross-section in Figure 3a, and Figure 5b is a schematic cross-sectional structural diagram of the fourth FF cross-section in Figure 3a. A first metal trace 60 is disposed on the same layer as the source 70 and drain 80, and the first metal trace 60 is electrically connected to the third gate portion 53 through a via. By disposing the first metal trace 60, source 70, and drain 80 on the same layer, the first metal trace 60, source 70, and drain 80 can be manufactured using the same photomask, simplifying the display panel manufacturing process.

[0071] In all embodiments of the present application, the source electrode 70 and the drain electrode 80 are located on the same side of the driving device, and the source electrode 70 and the drain electrode 80 are electrically connected to the active portion 20 through vias.

[0072] Optionally, in some embodiments, the source electrode 70 and the drain electrode 80 may be disposed on a side of the active portion 20 close to the substrate 11. The source electrode 70 may be electrically connected to the first contact portion 21 through a via, and the drain electrode 80 may be electrically connected to the second contact portion 23 through a via. The orthographic projection of the second contact portion 23 on the substrate 11 covers the orthographic projection of the first contact portion 21 on the substrate 11, and the orthographic projection area of ​​the second contact portion 23 is larger than the orthographic projection area of ​​the first contact portion 21.

[0073] Alternatively, in other embodiments, the source electrode 70 and the drain electrode 80 may be disposed on a side of the active portion 20 facing away from the substrate 11. The source electrode 70 may be electrically connected to the first contact portion 21 through a via, and the drain electrode 80 may be electrically connected to the second contact portion 23 through a via. The orthographic projection of the first contact portion 21 on the substrate 11 covers the orthographic projection of the second contact portion 23 on the substrate 11, and the orthographic projection area of ​​the first contact portion 21 is larger than the orthographic projection area of ​​the second contact portion 23.

[0074] In the display panel of the present application, the gate insulating layer 40 is closed in the trench 30 , and the gate 50 is located in the insulator formed by the gate insulating layer 40 in the trench 30 .

[0075] In this embodiment, the gate insulating layer 40 is disposed in a closed manner within the trench 30. That is, the gate insulating layer 40 includes a continuous first insulating portion 41, a second insulating portion 42, and a third insulating portion 43. The first insulating portion 41 and the second insulating portion 42 are disposed between the gate 50 and the channel portion 22. The first insulating portion 41 corresponds to the first gate portion 51, and the second insulating portion 42 corresponds to the third gate portion 53. The first insulating portion 41 covers the inner wall of the trench 30. The second insulating portion 42 covers the surface of the active portion 20 facing away from the substrate 11. The third insulating portion 43 is disposed within the trench 30 and covers the bottom surface of the trench 30.

[0076] In the display panel of the present application, the source electrode 70 and the drain electrode 80 are located on different sides of the driving device, and the source electrode 70 and the drain electrode 80 are electrically connected to the active portion 20 through vias.

[0077] In some embodiments, the source 70 is disposed on a side of the active portion 20 close to the substrate 11 , and the drain 80 is disposed on a side of the active portion 20 away from the substrate 11 .

[0078] In some embodiments, the source 70 is disposed on a side of the active portion 20 facing away from the substrate 11 , and the drain 80 is disposed on a side of the active portion 20 close to the substrate 11 .

[0079] It should be understood that when the source electrode 70 and the drain electrode 80 are located on different sides of the driver device, the shapes of the first contact portion 21 and the second contact portion 23 can be substantially the same, and the sidewalls of the first contact portion 21 and the second contact portion 23 can be flush. In other words, the orthographic projection of the first contact portion 21 on the substrate 11 and the orthographic projection of the second contact portion 23 on the substrate 11 substantially coincide with each other, and the active portion 20 can be manufactured using the same patterning process, thereby simplifying the manufacturing process of the display panel.

[0080] Furthermore, the orthographic projections of the source electrode 70 and the drain electrode 80 on the substrate 11 can be located within the orthographic projection of the first contact portion 21 on the substrate 11 , thereby reducing the volume of the driving device.

[0081] In the display panel of the present application, the gate insulating layer 40 is provided with an opening at the bottom of the trench 30 , and the opening of the gate insulating layer 40 is located on the second gate portion 52 of the gate 50 .

[0082] In some embodiments, the gate insulating layer 40 includes a continuous first insulating portion 41 and a second insulating portion 42. The first insulating portion 41 and the second insulating portion 42 are disposed between the gate 50 and the channel portion 22. The first insulating portion 41 is disposed corresponding to the first gate portion 51, and the second insulating portion 42 is disposed corresponding to the third gate portion 53. The first insulating portion 41 covers the inner wall of the trench 30. The second insulating portion 42 covers the surface of the active portion 20 facing away from the substrate 11.

[0083] The gate insulating layer 40 is opened at the bottom of the trench 30 , which means that the gate insulating layer 40 does not cover the bottom surface of the trench 30 .

[0084] In some embodiments, an interlayer insulating layer 90 may be provided on the side of the driver device facing away from the substrate 11. The interlayer insulating layer 90 is an insulating film layer. The interlayer insulating layer 90 may be made of a stack of one or more layers of materials such as silicon nitride, silicon oxide, or silicon oxynitride, but is not limited thereto.

[0085] In the present application, the metal layer may be formed by physical vapor deposition (PVD), and the semiconductor layer may be formed by chemical vapor deposition (CVD).

[0086] As shown in FIG. 6 a to FIG. 6 c , the manufacturing process of the display panel of the present application will be described below by taking the first display panel as an example.

[0087] In step S10 , a substrate 11 is provided, and a first metal trace 60 and a source electrode 70 are formed on the substrate 11 by a patterning process.

[0088] In step S20 , a buffer layer 12 is formed on the first metal trace 60 and the source electrode 70 . The buffer layer 12 is patterned to form vias, and the vias are arranged opposite to the source electrode 70 .

[0089] In step S30 , a stacked first contact portion 21 , a channel portion 22 , and a second contact portion 23 are formed on the buffer layer 12 . The first contact portion 21 fills the via hole and is electrically connected to the source electrode 70 .

[0090] Optionally, the orthographic projections of the first contact portion 21 , the channel portion 22 , and the second contact portion 23 on the substrate 11 all overlap, so that the active portion 20 can be patterned using one mask, simplifying the manufacturing process of the display panel.

[0091] In step S40 , a trench 30 is formed on the active portion 20 . The trench 30 sequentially passes through the second contact portion 23 , the channel portion 22 , and the first contact portion 21 , and exposes the first metal trace 60 .

[0092] In step S50 , a gate insulating layer 40 is formed on the active portion 20 . The first insulating portion 41 of the gate insulating layer 40 is located in the trench 30 and covers the inner wall of the trench 30 . The gate insulating layer 40 exposes the first metal trace 60 .

[0093] In step S60, a gate 50 is formed on the gate insulating layer 40. The first gate portion 51 of the gate 50 is located in the trench 30 and covers the first insulating portion 41. The first gate portion 51 is electrically connected to the first metal trace 60. The third gate portion 53 of the gate 50 is formed at the edge of the trench 30 and is continuous with the first gate portion 51.

[0094] In step S70 , an interlayer insulating layer 90 is formed on the gate 50 , and a via hole is formed on the interlayer insulating layer 90 by a patterning process. The via hole is arranged corresponding to the second contact portion 23 , and the second contact portion 23 is exposed through the via hole.

[0095] It should be noted that the via hole is spaced apart from the third gate portion 53 .

[0096] In step S80 , a drain electrode 80 is formed on the interlayer insulating layer 90 . The drain electrode 80 fills the via hole to achieve electrical connection with the second contact portion 23 .

[0097] In the present application, the patterning process includes steps such as coating photoresist, exposure, development, etching, and stripping photoresist. The desired pattern can be formed on the film layer through the patterning process.

[0098] The manufacturing processes of the second display panel, the third display panel, and the fourth display panel are similar to this and will not be repeated here.

[0099] The present application also provides a display terminal, which includes the above-mentioned display panel.

[0100] In this embodiment, the display terminal may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator.

[0101] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0102] The above is a detailed introduction to a display panel and a display terminal provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, comprising: A substrate, on which a plurality of driving devices are arranged; The driving device comprises: An active portion is arranged on the substrate, the active portion comprises a first contact portion, a channel portion, and a second contact portion which are stacked, the active portion is provided with a groove, the groove runs through the first contact portion, the channel portion, and the second contact portion, the first contact portion is arranged on a side of the channel portion close to the substrate, and the second contact portion is arranged on a side of the channel portion away from the substrate; a gate, comprising at least a first gate portion, wherein the first gate portion is disposed in the groove, and a projection of the first gate portion on an inner wall of the groove at least covers a projection of the channel portion on the inner wall of the groove; A gate insulating layer, at least disposed between the gate and the channel portion; a source electrode and a drain electrode, the source electrode is electrically connected to the first contact portion, and the drain electrode is electrically connected to the second contact portion; A first metal wiring electrically connected to the gate of the driving device; A second metal wiring is electrically connected to the source or the drain of the driving device.

2. The display panel according to claim 1, wherein: The gate further includes a second gate portion located at one end of the first gate portion, and a third gate portion located at the other end opposite to the first gate portion; The second gate portion is located in the trench and is electrically connected to the first gate portion; The third gate portion is located at an outer edge of the opening of the trench and is electrically connected to the first gate portion.

3. The display panel according to claim 2, wherein: The first metal wiring is disposed on the substrate and is located on a side of the active portion close to the substrate, and the first metal wiring is electrically connected to the second gate portion.

4. The display panel according to claim 2, wherein: The first metal wiring is arranged on a side of the driving device away from the substrate, and the first metal wiring is electrically connected to the third gate portion through a via.

5. The display panel according to claim 2, wherein: The first metal wiring is disposed on the gate insulating layer and is located on a side of the active portion away from the substrate, and the first metal wiring is electrically connected to the third gate portion.

6. The display panel according to any one of claims 3 to 5, wherein: The source electrode and the drain electrode are located on the same side of the driving device, and the source electrode and the drain electrode are electrically connected to the active portion through via holes.

7. The display panel according to claim 6, wherein: The gate insulating layer is closed in the groove, and the gate is located in an insulator formed by the gate insulating layer in the groove.

8. The display panel according to any one of claims 3 to 5, wherein: The source electrode and the drain electrode are located at different sides of the driving device, and the source electrode and the drain electrode are electrically connected to the active part through via holes.

9. The display panel according to claim 8, wherein: The gate insulating layer is provided with an opening at the bottom of the trench, and the opening of the gate insulating layer is located on the second gate portion of the gate.

10. The display panel according to claim 1, wherein: The angle between the inner wall of the groove and the substrate is a right angle or an obtuse angle.

11. The display panel according to claim 1, wherein: The orthographic projection of the groove on the substrate may be in the shape of a circle, a rectangle, or a sector.

12. A display terminal, comprising a display panel, wherein the display panel comprises: A substrate, on which a plurality of driving devices are arranged; The driving device comprises: An active portion is arranged on the substrate, the active portion comprises a first contact portion, a channel portion, and a second contact portion which are stacked, the active portion is provided with a groove, the groove runs through the first contact portion, the channel portion, and the second contact portion, the first contact portion is arranged on a side of the channel portion close to the substrate, and the second contact portion is arranged on a side of the channel portion away from the substrate; a gate, comprising at least a first gate portion, wherein the first gate portion is disposed in the groove, and a projection of the first gate portion on an inner wall of the groove at least covers a projection of the channel portion on the inner wall of the groove; A gate insulating layer, at least disposed between the gate and the channel portion; a source electrode and a drain electrode, the source electrode is electrically connected to the first contact portion, and the drain electrode is electrically connected to the second contact portion; A first metal wiring electrically connected to the gate of the driving device; A second metal wiring is electrically connected to the source or the drain of the driving device.

13. The display terminal according to claim 12, wherein: The gate further includes a second gate portion located at one end of the first gate portion, and a third gate portion located at the other end opposite to the first gate portion; The second gate portion is located in the trench and is electrically connected to the first gate portion; The third gate portion is located at an outer edge of the opening of the trench and is electrically connected to the first gate portion.

14. The display terminal according to claim 13, wherein: The first metal wiring is disposed on the substrate and is located on a side of the active portion close to the substrate, and the first metal wiring is electrically connected to the second gate portion.

15. The display terminal according to claim 13, wherein: The first metal wiring is arranged on a side of the driving device away from the substrate, and the first metal wiring is electrically connected to the third gate portion through a via.

16. The display terminal according to claim 13, wherein: The first metal wiring is disposed on the gate insulating layer and is located on a side of the active portion away from the substrate, and the first metal wiring is electrically connected to the third gate portion.

17. The display terminal according to any one of claims 14 to 16, wherein: The source electrode and the drain electrode are located on the same side of the driving device, and the source electrode and the drain electrode are electrically connected to the active portion through via holes.

18. The display terminal according to claim 17, wherein: The gate insulating layer is closed in the groove, and the gate is located in an insulator formed by the gate insulating layer in the groove.

19. The display terminal according to any one of claims 14 to 16, wherein: The source electrode and the drain electrode are located at different sides of the driving device, and the source electrode and the drain electrode are electrically connected to the active part through via holes.

20. The display terminal according to claim 19, wherein: The gate insulating layer is provided with an opening at the bottom of the trench, and the opening of the gate insulating layer is located on the second gate portion of the gate.

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