Method for dicing semiconductor wafer and method for manufacturing semiconductor device

Abstract

This method for dicing a semiconductor wafer comprises a preparation step for preparing a laminate in which an adhesive layer is disposed on a main surface of a semiconductor wafer and a back grinding tape is disposed on the adhesive layer, a dicing tape placement step for disposing a dicing tape on the back grinding tape of the laminate, and a dicing step for dicing the semiconductor wafer disposed on the back grinding tape and separating the semiconductor wafer into a plurality of semiconductor chips. In the dicing step, the laminate is cut from the semiconductor-wafer side to a region between the adhesive layer and the dicing tape.

Description

Semiconductor wafer dicing method and semiconductor device manufacturing method

[0001] The present disclosure relates to a semiconductor wafer dicing method and a semiconductor device manufacturing method.

[0002] A method described in Patent Document 1 below is known as a technology in this field. This document describes face-down dicing as a second embodiment. In face-down dicing, a laminate is prepared, which includes a semiconductor wafer, an insulating adhesive layer formed on the main surface of the semiconductor wafer, and a back-grinding tape attached to the insulating adhesive layer. A dicing tape is attached to the back-grinding tape side of the laminate, and the semiconductor wafer and the back-grinding tape are diced together with the back-grinding tape using a dicing blade. This separates the semiconductor wafer into multiple semiconductor chips. The semiconductor chips are then pushed up from the dicing tape side to pick them up from the dicing tape, yielding laminated chips with an insulating adhesive layer formed on the semiconductor chips.

[0003] Japanese Patent Application Laid-Open No. 2006-49482

[0004] In the method described in Patent Document 1, dicing is performed with the insulating adhesive layer disposed between the semiconductor wafer and the backgrinding tape, thereby preventing contamination of the insulating adhesive layer by water or cutting debris. Furthermore, since the backgrinding tape is disposed between the dicing tape and the semiconductor wafer, cracking of the semiconductor chip when it is pushed up from the dicing tape side is prevented. Furthermore, the backgrinding tape can be peeled off from the semiconductor chip by picking up the semiconductor chip, thereby shortening the process.

[0005] However, in the method described in Patent Document 1, the semiconductor wafer is diced together with the backgrind tape, so the cutting edge of the dicing blade is positioned within the dicing tape. As a result, the dicing blade wraps around the dicing tape, making it more likely to produce burrs.

[0006] Therefore, an object of the present disclosure is to provide a semiconductor wafer dicing method and a semiconductor device manufacturing method that can suppress the generation of burrs.

[0007] [1] A semiconductor wafer dicing method according to the present disclosure includes a preparation step of preparing a laminate having an adhesive layer disposed on a main surface of a semiconductor wafer and a backgrind tape disposed on the adhesive layer, a dicing tape disposing step of disposing a dicing tape on the backgrind tape of the laminate, and a dicing step of dicing the semiconductor wafer disposed on the backgrind tape to separate it into a plurality of semiconductor chips. In the dicing step, the laminate is cut from the semiconductor wafer side to the region between the adhesive layer and the dicing tape.

[0008] This semiconductor wafer dicing method involves preparing a laminate having an adhesive layer disposed on a main surface of a semiconductor wafer and a backgrind tape disposed on the adhesive layer, disposing a dicing tape on the backgrind tape of the laminate, and dicing the semiconductor wafer disposed on the backgrind tape to singulate the semiconductor wafer into multiple semiconductor chips. This prevents contamination of the adhesive layer by water or cutting debris, prevents cracking of the semiconductor chip when the semiconductor chip is pushed up from the dicing tape side, and shortens the process for peeling the backgrind tape from the semiconductor chip. Furthermore, when dicing the semiconductor wafer, the laminate is cut from the semiconductor wafer side to the region between the adhesive layer and the dicing tape, allowing the semiconductor wafer to be diced without cutting the dicing tape. This prevents the dicing tape from being caught in the dicing blade, thereby preventing burrs from being generated. Furthermore, because the backgrind tape is not completely singulated, the backgrind tape can be easily peeled off when picking up the semiconductor chips.

[0009] [2] In the semiconductor wafer dicing method described in [1] above, the backgrinding tape may have a base layer and an adhesive layer disposed on the base layer. In the preparation step, the backgrinding tape may be disposed on the adhesive layer so that the adhesive layer faces the adhesive layer. In the dicing step, the laminate may be cut from the semiconductor wafer side to the region between the adhesive layer and the base layer of the backgrinding tape. Burrs may be generated not only by the dicing blade wrapping around the dicing tape but also by the dicing blade wrapping around the base layer of the backgrinding tape. Therefore, in this semiconductor wafer dicing method, when dicing the semiconductor wafer, the laminate is cut from the semiconductor wafer side to the region between the adhesive layer and the base layer of the backgrinding tape. This allows the semiconductor wafer to be diced without cutting into the base layer of the backgrinding tape. This further reduces the generation of burrs and makes it easier to peel the backgrinding tape when picking up semiconductor chips.

[0010] [3] In the semiconductor wafer dicing method described in [1] above, the backgrinding tape may have a base layer and an adhesive layer disposed on the base layer, and in the preparation step, the backgrinding tape may be disposed on the adhesive layer so that the adhesive layer is disposed on the adhesive layer side, and in the dicing step, the laminate may be cut from the semiconductor wafer side to a region between the adhesive layer of the backgrinding tape and the dicing tape. In this semiconductor wafer dicing method, when dicing the semiconductor wafer, the laminate is cut from the semiconductor wafer side to a region between the adhesive layer of the backgrinding tape and the dicing tape, thereby enabling more reliable dicing of the semiconductor wafer.

[0011] [4] In the semiconductor wafer dicing method according to any one of [1] to [3] above, the semiconductor wafer may be provided with protruding electrodes protruding from the main surface. In this semiconductor wafer dicing method, since the semiconductor wafer is provided with the protruding electrodes, the semiconductor chips separated by the dicing step can be easily bonded to the bonding object.

[0012] [5] A method for manufacturing a semiconductor device according to the present disclosure includes, after the semiconductor wafer dicing method described in any one of [1] to [4] above, a pick-up step of picking up a semiconductor chip, and after the pick-up step, a bonding step of bonding the semiconductor chip. In this method for manufacturing a semiconductor device, by performing the pick-up step and the bonding step after the dicing step, a semiconductor device including semiconductor chips in which burrs are suppressed can be obtained.

[0013] According to the present disclosure, the occurrence of burrs can be suppressed.

[0014] 11A is a schematic cross-sectional view illustrating a semiconductor wafer dicing method and a semiconductor device manufacturing method according to an embodiment; FIG. 11B is a schematic cross-sectional view illustrating an enlarged view of a portion of the semiconductor wafer shown in FIG. 1; FIG. 12A is a schematic cross-sectional view illustrating a semiconductor wafer dicing method and a semiconductor device manufacturing method according to an embodiment; FIG. 12B is a schematic cross-sectional view illustrating a semiconductor wafer dicing method and a semiconductor device manufacturing method according to an embodiment; FIG. 12B is a schematic cross-sectional view illustrating a semiconductor wafer dicing method and a semiconductor device manufacturing method according to an embodiment; Fig. 13(a) is a schematic cross-sectional view showing a state before dicing in Example 1, and Fig. 13(b) is a schematic partially enlarged cross-sectional view showing a state after dicing in Example 1. Fig. 14(a) is a schematic cross-sectional view showing a state before dicing in Example 2, and Fig. 14(b) is a schematic partially enlarged cross-sectional view showing a state after dicing in Example 2.

[0015] Hereinafter, the present embodiment will be described in detail with reference to the drawings. In the following description, the same or corresponding parts will be denoted by the same reference numerals, and duplicated explanations will be omitted. Furthermore, the dimensional ratios in the drawings are not limited to those shown in the drawings.

[0016] (Preparation Step) First, a preparation step is carried out to prepare a laminate in which an adhesive layer is disposed on the main surface of a semiconductor wafer and a backgrind tape is disposed on the adhesive layer.

[0017] As shown in FIG. 1, in the preparation step, a semiconductor wafer 10 and a backgrinding tape F1 with an adhesive layer are prepared.

[0018] The semiconductor wafer 10 has a main surface S1, which is a circuit surface on which circuits are formed by a semiconductor process, and a back surface S2, which is the surface opposite to the main surface S1. The semiconductor wafer 10 is provided with a plurality of protruding electrodes 18 that protrude from the main surface S1 of the semiconductor wafer 10. Note that the thickness of the semiconductor wafer 10 at this time is in a state before back-grinding, and is, for example, 550 μm to 750 μm.

[0019] As shown in FIG. 2, the protruding electrodes 18 are configured to include, for example, wiring or bumps 18a arranged on the main surface S1 of the semiconductor wafer 10, and solder 18b arranged on the wiring or bumps 18a.

[0020] As shown in FIG. 1 , the adhesive layer-attached backgrinding tape F1 includes a backgrinding tape BT and a film-like adhesive layer 11 formed on the backgrinding tape BT. The backgrinding tape BT includes a base layer BTa and a pressure-sensitive adhesive layer BTb formed on the base layer BTa. The adhesive layer 11 is an insulating adhesive layer (insulating adhesive layer) and is generally referred to as an "NCF (Non-Conductive Film)" or the like. The adhesive layer 11 is attached to the pressure-sensitive adhesive layer BTb of the backgrinding tape BT. The adhesive layer-attached backgrinding tape F1 may include a release tape (not shown) attached to the surface of the adhesive layer 11 opposite the backgrinding tape BT.

[0021] Then, with the adhesive layer 11 side facing the main surface S1, the backgrind tape F1 with the adhesive layer is attached to the main surface S1 of the semiconductor wafer 10. That is, the adhesive layer 11 and the backgrind tape BT are placed on the main surface S1 of the semiconductor wafer 10. The backgrind tape F1 with the adhesive layer can be attached to the semiconductor wafer 10 using, for example, a laminating roll. Note that if the backgrind tape F1 with the adhesive layer has the release tape described above, the release tape is peeled off and the backgrind tape F1 with the adhesive layer is attached to the main surface S1 of the semiconductor wafer 10.

[0022] At this time, the base layer BTa of the backgrind tape BT is pressed with a predetermined pressure, so that the adhesive layer 11 fills in the spaces between the protruding electrodes 18. As a result, as shown in Fig. 3, an adhesive layer 12 is formed on the main surface S1 so as to embed the protruding electrodes 18. The adhesive layer 12 is an adhesive layer having insulating properties (insulating adhesive layer) like the adhesive layer 11.

[0023] Next, as shown in FIG. 4 , while applying pressure to the backgrinding tape BT, the semiconductor wafer 10 is ground from the back surface S2 side using a backgrinding device (backgrinder) 13 to thin the thickness of the semiconductor wafer 10. At this time, the semiconductor wafer 10 is ground so that the thickness of the semiconductor wafer 10 is, for example, approximately 50 μm to 550 μm. Here, because the backgrinding tape BT is disposed on the main surface S1 side of the semiconductor wafer 10, pressure can be applied uniformly. As a result, the back surface S2 of the semiconductor wafer 10 can be flattened by grinding. Furthermore, the backgrinding tape BT can suppress damage to the semiconductor wafer 10 during backgrinding. This results in a laminate R1 consisting of the thinned semiconductor wafer 10, the adhesive layer 12 disposed on the main surface S1 of the semiconductor wafer 10, and the backgrinding tape BT disposed on the adhesive layer 12 on the side opposite the semiconductor wafer 10.

[0024] (Dicing Tape Placement Step) Next, a dicing tape placement step is performed in which a dicing tape is placed on the backgrind tape of the laminate.

[0025] As shown in FIG. 5 , in the dicing tape placement process, with the adhesive layer 12 and backgrinding tape BT still positioned on the main surface S1 of the semiconductor wafer 10, the dicing tape DT is attached to the backgrinding tape BT side of the laminate R1 and the lower edge 14a of the dicing frame 14. The dicing tape DT has a base layer DTa and an adhesive layer DTb disposed on the base layer DTa. The adhesive layer DTb of the dicing tape DT is then attached to the surface of the base layer BTa opposite the adhesive layer BTb and to the lower edge 14a of the dicing frame 14. The dicing frame 14 is an annular metal member used as a fixing jig for the semiconductor wafer 10 during dicing. The dicing frame 14 has an inner diameter larger than the outer diameter of the semiconductor wafer 10 and is placed on the dicing tape DT to surround the semiconductor wafer 10.

[0026] (Dicing Step) Next, a dicing step is carried out in which the semiconductor wafer placed on the backgrind tape is diced into a plurality of individual semiconductor chips.

[0027] 6, in the dicing process, the semiconductor wafer 10 placed on the backgrind tape BT is diced from the backside S2 side by a dicing blade DB (so-called face-down dicing) with the backside S2 of the semiconductor wafer 10 facing upward, into a plurality of semiconductor chips 15. At this time, the semiconductor wafer 10 is diced so that the size of the semiconductor chips 15 is, for example, about 0.5 mm x 0.5 mm.

[0028] When dicing the semiconductor wafer 10, the laminate R1 is cut from the semiconductor wafer 10 side to the region between the adhesive layer 12 and the dicing tape DT. In other words, the cutting tip of the dicing blade DB cutting into the laminate R1 is positioned in the region between the adhesive layer 12 and the dicing tape DT, i.e., within the backgrinding tape BT, so that the dicing blade DB does not reach the dicing tape DT. In this embodiment, the laminate R1 is cut from the semiconductor wafer 10 side to the region between the adhesive layer 12 and the base layer BTa of the backgrinding tape BT. In other words, the cutting tip of the dicing blade DB cutting into the laminate R1 is positioned in the region between the adhesive layer 12 and the base layer BTa of the backgrinding tape BT, i.e., within the pressure-sensitive adhesive layer BTb of the backgrinding tape BT, so that the dicing blade DB does not reach the base layer BTa of the dicing tape DT. This results in the semiconductor wafer 10 and the adhesive layer 12 being singulated. In the dicing process, the dicing blade DB does not reach the dicing tape DT, so the backgrind tape BT is not completely divided into individual pieces.

[0029] (Pickup Step) Next, a pick-up step is performed to pick up the semiconductor chip.

[0030] 7, in the pick-up step, the adhesive layer 12 that has been divided into individual pieces in the dicing step is peeled off from the backgrinding tape BT. At this time, if the pressure-sensitive adhesive layer BTb of the backgrinding tape BT is radiation-curable, the adhesive strength of the pressure-sensitive adhesive layer BTb can be reduced by irradiation with radiation (e.g., ultraviolet light) prior to peeling.

[0031] Next, although details are omitted, the adhesive strength of the adhesive layer BTb of the backgrind tape BT is reduced by irradiation with ultraviolet light or the like, and then the semiconductor chip 15 is pushed up from below the dicing tape DT by a push-up jig 16, and the semiconductor chip 15 is picked up by a pickup tool 17. This results in a laminated chip R2 in which the individualized adhesive layer 12 is attached to the main surface S1 of the semiconductor chip 15.

[0032] (Bonding Step) Next, a bonding step for bonding a semiconductor chip is performed.

[0033] As shown in Figure 8, in the bonding process, the laminated chip R2 picked up in the pick-up process is mounted on a bonding object 19 such as a mounting substrate. Here, for example, the laminated chip R2 is heated and pressed onto the bonding object 19 to connect the protruding electrodes 18 (solder 18b) of the semiconductor chip 15 to the electrodes 19a of the bonding object 19. As a result, the protruding electrodes 18 of the semiconductor chip 15 and the electrodes 19a of the bonding object 19 are electrically connected by metal bonding. Furthermore, the protruding electrodes 18 of the semiconductor chip 15 and the electrodes 19a of the bonding object 19 are sealed with the adhesive layer 12, thereby isolating them from the external environment. This results in a semiconductor device including the semiconductor chip 15.

[0034] As described above, in the semiconductor wafer dicing method and semiconductor device manufacturing method according to this embodiment, a laminate R1 is prepared in which an adhesive layer 12 is disposed on the main surface S1 of a semiconductor wafer 10 and a backgrind tape BT is disposed on the adhesive layer 12. A dicing tape DT is then disposed on the backgrind tape BT of the laminate R1, and the semiconductor wafer 10 disposed on the backgrind tape BT is diced to separate the semiconductor wafer 10 into a plurality of semiconductor chips 15. This prevents contamination of the adhesive layer 12 by water or cutting debris, prevents cracking of the semiconductor chip 15 when the semiconductor chip 15 is pushed up from the dicing tape DT side, and shortens the process for peeling the backgrind tape BT from the semiconductor chip 15. Furthermore, when dicing the semiconductor wafer 10, the laminate R1 is cut from the semiconductor wafer 10 side to the region between the adhesive layer 12 and the dicing tape DT, allowing the semiconductor wafer 10 to be diced without cutting the dicing tape DT. This prevents the dicing tape DT from getting caught in the dicing blade DB, thereby suppressing the generation of burrs. Moreover, since the backgrind tape BT is not completely divided into individual pieces, the backgrind tape BT can be easily peeled off when picking up the semiconductor chips 15.

[0035] Here, burrs may occur not only when the dicing blade DB wraps around the dicing tape DT, but also when the dicing blade DB wraps around the base layer BTa of the backgrind tape BT. Therefore, in this semiconductor wafer dicing method and semiconductor device manufacturing method, when dicing the semiconductor wafer 10, the laminate R1 is cut from the semiconductor wafer 10 side to the region between the adhesive layer 12 and the base layer BTa of the backgrind tape BT, so the semiconductor wafer 10 can be diced without cutting into the base layer BTa of the backgrind tape BT. This further suppresses the generation of burrs and makes it easier to peel off the backgrind tape BT when picking up the semiconductor chip 15.

[0036] Furthermore, in this semiconductor wafer dicing method and semiconductor device manufacturing method, since protruding electrodes 18 are provided on the semiconductor wafer 10, the semiconductor chips 15 that have been separated by the dicing process can be easily bonded to the bonding object 19.

[0037] Furthermore, in this semiconductor wafer dicing method and semiconductor device manufacturing method, by performing a pick-up process and a bonding process after the dicing process, it is possible to obtain a semiconductor device including a semiconductor chip 15 in which the generation of burrs is suppressed.

[0038] The above describes a semiconductor wafer dicing method and a semiconductor device manufacturing method according to one embodiment of the present disclosure, but the present disclosure is not limited to the above-described embodiment and can be modified as appropriate within the scope of the spirit thereof.

[0039] For example, the tip of the cut in the laminate R1 during the dicing process may be located at any position in the area between the adhesive layer 12 and the dicing tape DT, and may be located in the area between the pressure-sensitive adhesive layer BTb of the backgrind tape BT and the dicing tape DT, as in the modified example shown in Figures 9 and 10.

[0040] 9, in the dicing process of the modified example, the laminate R1 is cut from the semiconductor wafer 10 side to the region between the adhesive layer BTb of the backgrind tape BT and the dicing tape DT. In other words, when dicing the semiconductor wafer 10, the cutting tip of the dicing blade DB cutting into the laminate R1 is positioned in the region between the adhesive layer BTb of the backgrind tape BT and the dicing tape DT, i.e., within the base layer BTa of the backgrind tape BT, so that the dicing blade DB does not reach the dicing tape DT. This results in the semiconductor wafer 10 and the adhesive layer 12 being separated into individual pieces.

[0041] In this way, in the modified semiconductor wafer dicing method and semiconductor device manufacturing method, when dicing the semiconductor wafer 10, the laminate R1 is cut from the semiconductor wafer 10 side to the area between the adhesive layer BTb of the backgrind tape BT and the dicing tape DT, so that the semiconductor wafer 10 can be diced more reliably.

[0042] Next, examples of the present disclosure will be described, although the present disclosure is not limited to the examples described below.

[0043] <Preparation of film adhesive> 1. Raw materials (a) Epoxy resin - Multifunctional solid epoxy resin having a triphenolmethane skeleton (EP1032H60, manufactured by Mitsubishi Chemical Corporation, weight average molecular weight: 800 to 2000) - Bisphenol F type liquid epoxy resin (YL983U, manufactured by Mitsubishi Chemical Corporation, molecular weight: approximately 336) - Flexible semi-solid epoxy resin (YX7110B80, manufactured by Mitsubishi Chemical Corporation, weight average molecular weight: 1000 to 5000) (b) Hardener - 2,4-Diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct (2MAOK-PW, manufactured by Shikoku Chemicals Co., Ltd.) (c) Polymer component - Phenoxy resin (FX-293, manufactured by Nippon Steel Chemical & Material Co., Ltd., Tg: approximately 160°C, weight average molecular weight: 40,000 to 50,000) (d) Fluxing agent Glutaric acid (manufactured by Tokyo Chemical Industry Co., Ltd., melting point: about 98°C) (e) Filler Inorganic filler Silica filler (SE2030, manufactured by Admatechs Co., Ltd., average particle size: 500 nm) Epoxy silane surface-treated silica filler (SE2030, manufactured by Admatechs Co., Ltd., average particle size: about 500 nm) Methacrylic surface-treated nano silica filler (YA050C, manufactured by Admatechs Co., Ltd., average particle size: about 50 nm) Organic filler Resin filler (EXL-2655, manufactured by Dow Chemical Japan, core-shell type organic fine particles)

[0044] 2. Preparation of Film-Like Adhesive A resin varnish containing each raw material in the ratio (parts by mass) shown in Table 1 was applied to a substrate film, and the coating was dried to prepare a film-like adhesive (thickness: 20 μm).

[0045]

[0046] <Preparation of Backgrind Tape> 1. Synthesis of Varnish An acrylic copolymer was obtained by solution polymerization using 2-ethylhexyl acrylate and methyl methacrylate as the main monomers and hydroxyethyl acrylate and acrylic acid as the functional group monomers. The weight-average molecular weight of this synthesized acrylic copolymer was 400,000 and the glass transition temperature was -38°C. 100 parts by mass of this acrylic copolymer was blended with 10 parts by mass of a multifunctional isocyanate crosslinker (manufactured by Nippon Polyurethane Industry Co., Ltd., product name "Coronate HL") to prepare a pressure-sensitive adhesive varnish.

[0047] 2. Preparation of Backgrind Tape The above-mentioned adhesive varnish was applied to a 25 μm thick polyethylene terephthalate (PET) substrate (manufactured by Unitika Ltd., product name "EMBLED S25") using an applicator while adjusting the gap so that the adhesive layer would have a thickness of 30 μm after drying, and then dried at 80° C. for 5 minutes. This yielded a backgrind tape with a pressure-sensitive adhesive layer formed on the substrate.

[0048] <Preparation of dicing tape> 1. Synthesis of acrylic resin 2-ethylhexyl acrylate (EHA), 2-hydroxyethyl acrylate (HEA), and methyl methacrylate (MMA) were prepared as monomers constituting the monomer units. These monomers were mixed to a copolymerization ratio of EHA / HEA / MMA = 79 parts by mass / 20 parts by mass / 1 part by mass, and an acrylic resin was obtained by solution radical polymerization using ethyl acetate as a solvent and 0.08 parts by mass of azobisisobutyronitrile (AIBN) as an initiator.

[0049] Next, 0.05 parts by mass of hydroquinone monomethyl ether was used as a polymerization inhibitor, and 13.8 parts by mass of 2-methacryloyloxyethyl isocyanate (trade name: Karenz MOI, manufactured by Resonac Corporation, molecular weight: 155.2) was reacted with the resulting acrylic resin to obtain a UV-reactive acrylic resin having a carbon-carbon double bond. The synthesized acrylic resin may be an acrylic resin having a (meth)acryloyl group and a hydroxyl group. The weight-average molecular weight (standard polystyrene equivalent) of the synthesized acrylic resin was measured by GPC. SD-8022 / DP-8020 / RI-8020 manufactured by Tosoh Corporation were used for the GPC measurement. Gelpack GL-A150-S / GL-A160-S manufactured by Resonac Corporation were used as columns. Tetrahydrofuran was used as the eluent. The weight-average molecular weight of the synthesized acrylic resin was 800,000. The hydroxyl value and acid value of the synthesized acrylic resin, measured in accordance with the method described in JIS K 0070:1992, were 33.5 mgKOH / g and 6.5 mgKOH / g, respectively.

[0050] 2. Synthesis of UV-Curable Adhesive To 100 parts by mass of the acrylic resin synthesized above in terms of solid content, 3.0 parts by mass of an α-hydroxyalkylphenone photopolymerization initiator (trade name: Omnirad 184, manufactured by IGM Resins B.V.), 0.6 parts by mass of an acylphosphine oxide photopolymerization initiator (trade name: Omnirad 819, manufactured by IGM Resins B.V.), and 4.1 parts by mass of a TDI (toluene diisocyanate) polyisocyanate crosslinking agent (trade name: Coronate L-45E, manufactured by Tosoh Corporation) as a crosslinking agent were blended in a ratio of 100 parts by mass in terms of solid content, diluted with ethyl acetate, and stirred to prepare a solution of UV-curable adhesive.

[0051] 3. Preparation of Substrate Film A substrate film was obtained by adjusting the thickness ratio of polypropylene / vinyl acetate polymer / polypropylene to 1 / 8 / 1 and the thickness to 100 μm using an extruder.

[0052] 4. Dicing Tape Preparation The ultraviolet-curable adhesive solution prepared above was applied to a polyethylene terephthalate film (thickness: 38 μm) with one side subjected to a release treatment so that the dried thickness was 10 μm, and then dried at 80 ° C for 3 minutes to prepare an adhesive layer on the polyethylene terephthalate film. Then, the substrate film prepared above with one side subjected to corona discharge treatment was bonded to the adhesive layer. The bonded laminate was subjected to aging treatment in a thermostatic chamber at 23 ° C for 96 hours to obtain a dicing tape having a substrate film and an adhesive layer provided on the substrate film.

[0053] (Comparative Example 1) An adhesive layer and back-grinding tape were laminated onto the main surface of a 12-inch silicon wafer. The adhesive layer and back-grinding tape were laminated using a vacuum laminator "CV-300" manufactured by Nikko Materials Co., Ltd. Next, the back surface of the silicon wafer was ground to a thickness of 50 μm. The silicon wafer was ground using a back grinder "DGP8761" manufactured by Disco Corporation. Next, the silicon wafer laminated with the adhesive layer and back-grinding tape was diced into quarter-sized pieces. The dicing was performed using a dicing saw "DFD6361" manufactured by Disco Corporation.

[0054] 11(a), dicing tape DT was attached to the back surface S2 of the silicon wafer 10A and the lower edge 14a of the dicing frame 14, and the silicon wafer 10A, adhesive layer 12, and back-grinding tape BT were laminated in this order on the dicing tape DT, and the back-grinding tape BT was peeled off from the adhesive layer 12. The dicing tape DT was attached using a DM-300-H made by JCM Corporation under conditions of 40°C and 5 mm / s.

[0055] Next, as shown in FIG. 11(b), the silicon wafer 10A was diced into 5 mm square (5 mm x 5 mm) silicon chips 15A. Dicing was performed using a dicing saw "DFD6361" manufactured by Disco Corporation under the following conditions: dicing blade rotation speed: 50,000 rpm, dicing blade movement speed: 50 mm / s, blade cooler: 1 L / min, shower: 0.8 L / min, and spray: 0.8 L / min. The cutting depth of the dicing blade was set to a depth of 20 μm below the top surface of the base layer DTa of the dicing tape DT (on the opposite side of the silicon wafer 10A), and the cutting tip of the dicing blade was positioned within the base layer DTa of the dicing tape DT.

[0056] The surface of the adhesive layer 12 after dicing was then observed under a microscope to evaluate burrs and contamination. The microscope observation was performed using a measuring microscope "STM7-DP27" manufactured by Evident Co., Ltd. In the burr evaluation, a case where no burrs were observed was rated A, and a case where burrs were observed was rated B. In the contamination evaluation, a case where no contamination of the adhesive layer 12 due to water wetting or cutting debris was observed was rated A, and a case where contamination of the adhesive layer 12 due to water wetting or cutting debris was observed was rated B. The evaluation results are shown in Table 2.

[0057] Next, the silicon chip 15A was picked up from the dicing tape DT to obtain a laminated chip in which the individualized adhesive layer 12 was attached to the main surface S1 of the silicon chip 15A. The pick-up was performed using DB-800HSD manufactured by Fosford Technology Co., Ltd.

[0058] The side surface of the laminated chip was then observed under a microscope to evaluate the presence of burrs. The observation was performed using a measuring microscope "STM7-DP27" manufactured by Evident Co., Ltd. In the burr evaluation, a case where no burrs were observed was given an A rating, and a case where burrs were observed was given an B rating.

[0059] (Comparative Example 2) An adhesive layer and back-grinding tape were laminated onto the main surface of a 12-inch silicon wafer. The adhesive layer and back-grinding tape were laminated using a vacuum laminator "CV-300" manufactured by Nikko Materials Co., Ltd. Next, the back surface of the silicon wafer was ground to a thickness of 50 μm. The silicon wafer was ground using a back grinder "DGP8761" manufactured by Disco Corporation. Next, the silicon wafer laminated with the adhesive layer and back-grinding tape was diced into quarter-sized pieces. The dicing was performed using a dicing saw "DFD6361" manufactured by Disco Corporation.

[0060] 12(a), dicing tape DT was attached to the surface of the backgrind tape BT opposite the silicon wafer 10A and to the lower edge 14a of the dicing frame 14, leaving the backgrind tape BT, adhesive layer 12, and silicon wafer 10A stacked in this order on the dicing tape DT. The dicing tape DT was attached using a DM-300-H made by JCM Corporation under conditions of 40°C and 5 mm / s.

[0061] Next, as shown in FIG. 12(b), the silicon wafer 10A was diced into 5 mm square (5 mm x 5 mm) silicon chips 15A. Dicing was performed using a dicing saw "DFD6361" manufactured by Disco Corporation under the following conditions: dicing blade rotation speed: 50,000 rpm, dicing blade movement speed: 50 mm / s, blade cooler: 1 L / min, shower: 0.8 L / min, and spray: 0.8 L / min. The cutting depth of the dicing blade was set to a depth of 20 μm below the top surface of the base layer DTa of the dicing tape DT (on the opposite side of the silicon wafer 10A), and the cutting tip of the dicing blade was positioned within the base layer DTa of the dicing tape DT.

[0062] The surface of the silicon chip 15A after dicing was then observed under a microscope to evaluate burrs and contamination. The microscope observation was performed using a measuring microscope "STM7-DP27" manufactured by Evident Co., Ltd. In the burr evaluation, a case where no burrs were observed was rated A, and a case where burrs were observed was rated B. In the contamination evaluation, a case where no contamination of the adhesive layer 12 due to water wetting or cutting debris was observed was rated A, and a case where contamination of the adhesive layer 12 due to water wetting or cutting debris was observed was rated B. The evaluation results are shown in Table 2.

[0063] Next, the silicon chip 15A was picked up from the dicing tape DT to obtain a laminated chip in which the individualized adhesive layer 12 was attached to the main surface S1 of the silicon chip 15A. The pick-up was performed using DB-800HSD manufactured by Fosford Technology Co., Ltd.

[0064] The side surface of the laminated chip was then observed under a microscope to evaluate the presence of burrs. The observation was performed using a measuring microscope "STM7-DP27" manufactured by Evident Co., Ltd. In the burr evaluation, a case where no burrs were observed was given an A rating, and a case where burrs were observed was given an B rating.

[0065] (Example 1) As shown in Figures 13(a) and 13(b), the cutting depth of the dicing blade was set to a depth of 10 μm below the top surface of the base layer BTa of the backgrind tape BT (opposite the silicon wafer 10A), and the cutting tip of the dicing blade was positioned within the base layer BTa of the backgrind tape BT, under the same conditions as in Comparative Example 2. Then, as in Comparative Example 2, the surface of the silicon chip 15A after dicing was observed under a microscope, and burr and contamination evaluations were performed. In addition, the side of the stacked chip was observed under a microscope, and burr evaluations were performed. The evaluation results are shown in Table 2.

[0066] (Example 2) As shown in Figures 14(a) and 14(b), the cutting depth of the dicing blade was set to a depth of 20 μm below the top surface of the adhesive layer BTb of the backgrinding tape BT (opposite the silicon wafer 10A), and the cutting tip of the dicing blade was positioned within the adhesive layer BTb of the backgrinding tape BT. The conditions were the same as those of Comparative Example 2. Then, as in Comparative Example 2, the surface of the silicon chip 15A after dicing was observed under a microscope, and burr and contamination evaluations were performed. The side of the stacked chip was also observed under a microscope, and burr evaluations were performed. The evaluation results are shown in Table 2.

[0067]

[0068] (Evaluation) As shown in Table 2, in Comparative Example 1, in which dicing was performed with the adhesive layer 12 placed on the top surface, the contamination evaluation after dicing was B, while in Comparative Example 2 and Examples 1 and 2, in which dicing was performed with the adhesive layer 12 placed between the silicon wafer 10A and the backgrinding tape BT, the contamination evaluation after dicing was A.

[0069] In addition, in Comparative Examples 1 and 2, in which the dicing blade cut into the dicing tape DT, the burr evaluations after dicing and after pick-up were both B, whereas in Examples 1 and 2, in which the dicing blade did not cut into the dicing tape DT and the cutting tip of the dicing blade was positioned within the backgrind tape BT, the burr evaluations after dicing and after pick-up were both A.

[0070] 10...semiconductor wafer, 10A...silicon wafer, 11...adhesive layer, 12...adhesive layer, 13...back grinding device, 14...dicing frame, 14a...lower edge, 15...semiconductor chip, 15A...silicon chip, 16...push-up jig, 17...pickup tool, 18...protruding electrode, 18a...wiring or bump, 18b...solder, 19...bonding object, 19a...electrode, BT...backgrinding tape, BTa...base layer, BTb...adhesive layer, DB...dicing blade, DT...dicing tape, DTa...base layer, DTb...adhesive layer, F1...backgrinding tape with adhesive layer, R1...laminated body, R2...laminated chip, S1...main surface, S2...back surface.

Claims

1. A method for dicing a semiconductor wafer, comprising: a preparation step of preparing a laminate having an adhesive layer disposed on a main surface of a semiconductor wafer and a backgrind tape disposed on the adhesive layer; a dicing tape placement step of placing a dicing tape on the backgrind tape of the laminate; and a dicing step of dicing the semiconductor wafer disposed on the backgrind tape to separate it into a plurality of semiconductor chips, wherein in the dicing step, the laminate is cut from the semiconductor wafer side to the area between the adhesive layer and the dicing tape.

2. A method for dicing a semiconductor wafer as described in claim 1, wherein the backgrind tape has a base layer and an adhesive layer disposed on the base layer, and in the preparation step, the backgrind tape is disposed on the adhesive layer so that the adhesive layer is disposed on the adhesive layer side, and in the dicing step, the laminate is cut from the semiconductor wafer side to the area between the adhesive layer and the base layer of the backgrind tape.

3. The method for dicing a semiconductor wafer as described in claim 1, wherein the backgrind tape has a base layer and an adhesive layer disposed on the base layer, and in the preparation step, the backgrind tape is disposed on the adhesive layer so that the adhesive layer is disposed on the adhesive layer side, and in the dicing step, the laminate is cut from the semiconductor wafer side to the area between the adhesive layer of the backgrind tape and the dicing tape.

4. The semiconductor wafer dicing method according to any one of claims 1 to 3, wherein the semiconductor wafer is provided with protruding electrodes protruding from the main surface.

5. A method for manufacturing a semiconductor device, comprising: a pick-up step of picking up the semiconductor chip after the semiconductor wafer dicing method according to any one of claims 1 to 4; and a bonding step of bonding the semiconductor chip after the pick-up step.

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