Wafer-based solar cell, and method for manufacturing a wafer-based solar cell

By reducing the area coverage of opening regions in the passivation layer and enhancing the density of current contact areas with specialized microstructures and additional separating layers, the wafer solar cell achieves improved contact resistance and reduced recombination, thereby enhancing efficiency.

WO2025124655A1PCT designated stage expired Publication Date: 2025-06-19HANWHA Q CELLS GMBH
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Patent Information

Application Number
PCT/DE2024/101061
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-15
Filing Date
2024-12-10
Publication Date
2025-06-19

AI Technical Summary

Technical Problem

Existing wafer solar cells face challenges with high contact resistance and increased recombination activity due to the need for extensive opening areas in the passivation layers, which compromise efficiency.

Method used

The solution involves a wafer solar cell design where the opening regions in the passivation layer cover less than 25% of the electrode area, with a high density of current contact areas formed through a specialized microstructure, including the use of metal crystallites and metal-silicon alloys, and additional separating layers to optimize contact resistance and reduce recombination.

Benefits of technology

This approach results in improved contact resistance and reduced recombination activity, leading to increased efficiency of the wafer solar cell without significant increases in the area of recombination centers.

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Abstract

The invention relates to a wafer-based solar cell comprising a semiconductor wafer (1) that is made of semiconductor material and has a semiconductor wafer surface, at least one p-doped region (2), and at least one n-doped region (3), wherein the p-doped region (2) and / or the n-doped region (3) are each electrically contacted, via opening regions (8) and current contact regions (5) located therein, with a metal electrode structure (4) attached to the semiconductor wafer surface, and each metal electrode structure (4) covers an electrode coverage area on the semiconductor wafer surface. According to the invention, the opening regions (8) occupy less than 25%, preferably less than 15%, and particularly preferably less than 10% of the electrode coverage area, and the current contact regions (5) are formed with an area density of 1000 to 50,000, preferably 3000 to 30,000, and particularly preferably 5000 to 15,000 current contact regions (5) per square millimetre of electrode coverage area. The invention also relates to a method for manufacturing such a wafer-based solar cell.
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Description

[0001] Wafer solar cell and method for producing a wafer solar cell

[0002] The present invention relates to a wafer solar cell and a method for producing such a wafer solar cell. Within the meaning of the present invention, a wafer solar cell refers to all solar cells produced using a semiconductor wafer, wherein the semiconductor wafer used forms the structural framework of the solar cell. This means that a substrate material in addition to the semiconductor wafer is not required. Such a wafer solar cell with a semiconductor wafer made of semiconductor material has a semiconductor wafer surface and at least one p-doped region and at least one n-doped region, wherein the p-doped region and / or the n-doped region are each electrically contacted with a metal electrode structure applied to the semiconductor wafer surface via current contact regions, and each metal electrode structure covers an electrode covering area on the semiconductor wafer surface.

[0003] The metal electrode structure is important for discharging charge carriers from the wafer solar cell in the form of an electric current flow. Typically, the semiconductor wafer surfaces of a wafer solar cell are passivated by dielectric passivation layers. To dissipate charge carriers from the semiconductor wafer, the metal electrode structures of both polarities must penetrate the electrically non-conductive dielectric passivation layers at least in some areas. To do this, the passivation layer is removed in some areas, creating openings. In these openings, electrical contact is established between the semiconductor surfaces and the metal electrode structures via so-called current contact areas. The current contact areas typically do not occupy the same area as the openings.

[0004] To create the openings and current contact areas, metal pastes are printed onto the passivation layers using a screen printing process, for example. In a subsequent annealing step, the metal pastes etch or burn through the dielectric passivation layer, at least in some areas. Within the openings in the passivation layer thus created, electrical metal-semiconductor contacts are formed in the form of the aforementioned current contact areas. These current contact areas are crucial for the electrical contact resistance between the metal electrode structure and the doped semiconductor wafer surfaces of the wafer solar cell. This contact resistance should be as low as possible.Therefore, the compositions of the metal pastes, for example, regarding their glass frits that etch the passivation layers and / or the subsequent annealing step, are adapted so that comparatively large areas of the passivation layer are etched away, increasing the chance of obtaining highly electrically conductive metal-semiconductor contacts in the form of current contact areas. However, the open areas of the passivation layers represent recombination centers for the charge carriers separated in the semiconductor wafer, so that the increased, undesirable recombination reduces the efficiency of the wafer solar cell. Typically, a compromise must therefore be made between the declining efficiency due to increased recombination and the area-based open portion of the passivation layers, which influences the recombination centers and the contact resistance.This compromise often requires that the passivation layers have an opening degree in the form of opening areas with a coverage of less than 50% of the electrode coverage area below the metal electrode structure.

[0005] Excessive contact resistance and the degree of contact recombination activity are the main causes of poor efficiency in wafer solar cells after the metal electrode structure has been applied. A so-called LECO (Laser Enhanced Contact Optimization) process allows for a well-controllable and localized improvement in the contact resistance of the wafer solar cell after the metal electrode structure has been applied and fired. Such a process is described, for example, in DE 10 2016 009 560 A1. In this process, the wafer solar cell is electrically contacted on its front and back sides at the respective metal electrode structure, which is formed as a contact grid on the front side. A wafer solar cell is then locally illuminated under reverse voltage. The local illumination is generated, for example, by a laser, with the wafer solar cell being scanned by the laser to process the entire surface of the wafer solar cell.The resulting current flows from a laser-illuminated operating point to the contacts of the wafer solar cell. A portion of the voltage drops through the solar cell contacts due to resistance. A point near the contact thus experiences different effective process parameters than a point far from the contact. The applied reverse voltage, which has a significant impact on the quality of the process, is thus distributed inhomogeneously across the wafer solar cell. The contact resistance can be subsequently improved in this way by creating more current contact areas without increasing the density of recombination centers.

[0006] There remains a need for a wafer solar cell with improved contact resistance and a method for producing the same.

[0007] It is an object of the invention to provide a wafer solar cell and a method for producing a wafer solar cell, wherein the wafer solar cell has an improved contact resistance to increase the efficiency of the wafer solar cell.

[0008] According to the invention, this object is achieved by a wafer solar cell having the features of claim 1 and by a manufacturing method having the features of claim 7. Advantageous further developments and modifications are specified in the subclaims.

[0009] The wafer solar cell exhibits improved contact resistance and, consequently, an improved fill factor. The process for producing this wafer solar cell results in a wafer solar cell with improved contact resistance without a significant increase in the recombination rate at the electrode surface.

[0010] According to the invention, it is provided that the opening regions occupy less than 25%, preferably less than 15% and particularly preferably less than 10% of the electrode covering area and that the current contact regions are formed with a surface density of 1000 to 50,000, preferably 3000 to 30,000 and particularly preferably 5000 to 15,000 current contact regions per square millimeter of electrode covering area.

[0011] It has been found that, given the low area coverage of the opening regions, the claimed special microstructure of the current contact regions, namely the sum of a large number of microscopic current contact regions, leads to an advantageous combination of comparatively low contact resistance with low recombination activity. This combination results in increased efficiency of the wafer solar cell. The area coverage of the current contact regions is preferably less than 1%, even more preferably less than 0.2%, based on the electrode coverage area.

[0012] Preferably, the individual current contact areas have an area of ​​less than 3pm 2 , preferably less than 1.5pm 2 and especially preferably less than 0.5pm 2and for a large portion of the electrical contact areas, the electrical contact areas are arranged at a distance from one another. In this case, a large portion is understood to mean a proportion of more than 50%.

[0013] The wafer solar cell is advantageously designed such that the opening regions consist of many spaced-apart individual regions, the majority of which are arranged within polygonally adjacent, pyramid-shaped semiconductor structures, and the pyramid-shaped semiconductor structures have polygonally arranged edges with lengths in the range of more than one micrometer. Furthermore, the wafer solar cell is preferably characterized in that only one opening region is arranged within the majority of the pyramid-shaped semiconductor structures. A majority is understood to mean a proportion of more than 50%.

[0014] In an advantageous development of the wafer solar cell, the opening regions within the pyramid-shaped semiconductor structures occupy smaller areas, preferably areas of less than 50% and particularly preferably of less than 25%, compared to the areas covered by these pyramid-shaped semiconductor structures.

[0015] The pyramid-shaped semiconductor structures form three-dimensional surfaces. Therefore, the wafer solar cell is advantageously designed such that the opening regions are predominantly located in the region of the tips of the pyramid-shaped semiconductor structures, which, in their three-dimensional topology, are spatially closest to the semiconductor material to be electrically contacted.

[0016] The semiconductor wafer material is preferably silicon. The p-doped region and the n-doped region can be arranged on the same side of the wafer solar cell or on opposite sides. The wafer solar cell has a front side, which represents a sun-facing side, and a back side, which represents a sun-facing side. The metal electrode structure on the front side is preferably formed as a plurality of electrode fingers with or without a busbar, or as a contact grid. The metal electrode structure on the back side can be formed as a plurality of electrode fingers with or without a busbar, as a contact grid, or over the entire surface.

[0017] In a preferred embodiment, the wafer solar cell has a passivation layer between the metal electrode structure and the semiconductor material in regions around the opening areas. The passivation layer is typically composed of materials selected from the group consisting of: AlOx (aluminum oxide), SiNx (silicon nitride), SiOxNy (silicon oxynitride), SiOx (silicon oxide), and / or poly-Si (polycrystalline silicon). The passivation layer can consist of a single one of these materials, but is preferably constructed as a layer stack combination of a plurality of these materials. The passivation layer, whether as a single layer or as a layer stack, preferably has a total layer thickness of 70 to 200 nm. The dielectric passivation layer reduces the recombination activity of the electrical charge carriers separated in the semiconductor material.

[0018] The wafer solar cell preferably has an additional separating layer between the metal electrode structure and the semiconductor material in regions around the opening regions on the passivation layer. The additional separating layer is preferably selected from the group consisting of: transparent, electrically conductive oxides, such as indium tin oxide, tungsten-doped indium oxide, aluminum-doped zinc oxide, zinc-doped indium oxide, and non-electrically conductive oxides selected from the group consisting of: nickel oxide, titanium oxide, and magnesium fluoride. This additional separating layer has a layer thickness of less than 80 nm, preferably less than 40 nm, and particularly preferably less than 20 nm. During the manufacturing process of the wafer solar cell, the metal electrode structure is applied to this additional separating layer.The additional barrier of the separation layer also contributes to the fact that the opening areas only take up a small proportion of the electrode covering surface and initially a wafer solar cell with a comparatively high specific contact resistance is created.

[0019] In a further preferred embodiment, the current contact regions located in the opening areas comprise metal crystallites and / or metal-silicon alloys that border the metal electrode structure or protrude into it. These enable improved contact resistance. These advantageous structures are formed, for example, by a combination of the structural features described above and the manufacturing process steps explained in more detail below. The wafer solar cell is preferably a PERC (Passivated Emitter Rear Contact), a TopCon (Tunnel Oxide Passivated Contact) solar cell, or an IBC (Interdigitated Back Contact) solar cell.

[0020] The invention also relates to a method for producing a wafer solar cell having the preceding structural features, wherein the following method steps are used:

[0021] - Providing a semiconductor wafer made of semiconductor material having a semiconductor wafer surface and at least one p-doped region and at least one n-doped region with at least one pn junction and a passivation layer deposited on the semiconductor surface,

[0022] - Applying a metal electrode structure to the passivation layer so that the metal electrode structure covers an electrode covering area on the semiconductor wafer surface,

[0023] - Heating the semiconductor wafer in a first thermal treatment step in a first temperature window of 500 to 850 degrees Celsius, such that the metal electrode structure is electrically contacted with the semiconductor material via opening regions of the passivation layer, which occupy less than 25%, preferably less than 15% and particularly preferably less than 10% of the electrode covering area, and via current contact regions located in these opening regions, and such that the resulting wafer solar cell has an efficiency of less than 18% with an average specific contact resistance (i.e. contact resistance averaged over the surface of the wafer solar cell) of more than 10 mOhm cm 2 , preferably more than 20 mOhmcm 2 , particularly preferably more than 50 mOhmcm 2 has.

[0024] - Carrying out a further treatment step for thermal and / or electrical contact resistance optimization such that the current contact regions are formed within the opening regions with an areal density of 1,000 to 50,000, preferably 3,000 to 8,000, and particularly preferably 4,000 to 6,000 current contact regions per square millimeter of electrode covering area. Because the opening regions occupy less than 25%, preferably less than 20%, and particularly preferably less than 15% of the electrode covering area, the passivation layers on the front and / or back are damaged only in comparatively few areas. As a result, the passivation properties of the passivation layer, which are beneficial to the efficiency of the wafer solar cell, are retained to a comparatively greater extent.

[0025] The first and second treatment steps can be applied if only one or both of the front and back sides of the semiconductor wafer material provided with the metal electrode structure has or have the features described above. The wafer solar cell produced is preferably bifacial.

[0026] The metal electrode structure is preferably applied by spray printing or screen printing a metal paste. This paste contains, for example, Ni, Cu, Ag, Al, Si, and / or their alloys.

[0027] Preferably, the passivation layer is produced in the form of a monolithic layer or a layer stack on the provided semiconductor wafer in such a way that a comparatively high contact resistance is achieved with a high passivation quality. This can be achieved by adding an additional separating layer and / or by making the passivation layer thicker than usual.

[0028] In a preferred embodiment, the passivation layer is formed with a layer thickness of more than 50 nm, preferably in the range of 70 to 200 nm. Alternatively or additionally, an additional separating layer with a layer thickness of less than 40 nm, preferably less than 30 nm, is provided on the passivation layer. This additional separating layer is located on the side of the passivation layer facing away from the semiconductor wafer material. The further treatment step is preferably carried out as a single step or as a combination of steps selected from the group consisting of:

[0029] - LECO step (Laser Enhanced Contact Optimization),

[0030] - tempering step,

[0031] - Laser heating step and

[0032] - photonic sintering.

[0033] The individual or combined step further ensures that the contact resistance is sufficiently low for the wafer solar cell. This creates additional current contact areas within the openings without significantly increasing the surface area of ​​the openings.

[0034] A LECO step means that the wafer solar cell is electrically contacted on both sides - i.e. front and back - a reverse voltage is applied and at the same time a light source or point light source such as a laser beam scans a surface of the wafer solar cell and heats it locally. At least one of the electrical front and back contacts is not full-surface or movable, e.g. alternating with another contact, so that illumination of this side with the point light source is possible. The electrical contacts are connected to a voltage source and preferably a voltage is applied in the reverse direction that is lower than the breakdown voltage of the wafer solar cell. The light source is then guided over one or both of the front and back sides of the wafer solar cell so that they are locally illuminated.

[0035] In particular, bifacial wafer solar cells can be illuminated and processed from both sides. Preferably, the front side of the wafer solar cell, which is the side facing the sun, has a lower degree of metallization than the back side, which is the side facing away from the sun. On the front side, optical and electrical losses balance each other out at a lower degree of metallization, since shading should be as minimal as possible on the sun-facing side of the solar cell. On the back side, however, optical losses play a secondary role, so the optimum shifts towards a higher degree of metallization and a larger contact area, e.g., through more and / or wider contact fingers. By increasing the number of fingers, the paths in the wafer solar cell for the generated charge carriers also become shorter. If the wafer solar cell is illuminated from the back, the front side, with the higher resistance, is on the full-surface contact.The resistance in the full-surface contact is very low. As described, the backside has a lower resistance, resulting in lower voltage losses / voltage drops from the contact point to the operating point, i.e., the illuminated point. The process thus has a more homogeneous effect across the entire wafer solar cell.

[0036] A tempering step is understood to mean heating to a temperature in a range of 500 °C to 850 °C in a furnace.

[0037] A laser heating step is understood to mean heating to a temperature in a range of 500 °C to 850 °C using a laser

[0038] Photonic sintering is the process of sintering, i.e. combining materials below their typical melting point to form a solid, using pulsed laser light with local heating.

[0039] In a further preferred embodiment, the further treatment step comprises a LECO step, in which the wafer solar cell is irradiated with a laser from its rear side facing away from the sun or the front side facing the sun. It may be advantageous to couple the laser radiation via the side of the wafer solar cell that scatters the light less. This is, for example, the surface with low roughness, which is, for example, chemically etched or mechanically polished.

[0040] Typically, this is the back of the wafer solar cell. Penetrating light acts only locally and generates a current over a smaller area. The resulting local current flow also acts over a smaller area and can be better controlled. Preferably, the next treatment step includes a LECO step, in which the wafer solar cell is irradiated with a power density of 200 to 1,500,000 W / cm 2irradiated. In a preferred embodiment, the further treatment step comprises a LECO step, in which an applied reverse voltage of 1 to 40 V is applied, opposite to the forward direction of the solar cell, and a local current of 0.5 to 20 A flows. This local current can be achieved, for example, by suitable light sources such as lasers with specific wavelengths. Light sources, preferably lasers, with the power density described above are advantageous.

[0041] Further advantages and features of the invention are explained using preferred embodiments described below. The figures are not drawn to scale, but are purely schematic and exemplary.

[0042] They show:

[0043] Fig. 1 is a cross-sectional view of a wafer solar cell according to the prior art; Fig. 2 is a cross-sectional view of a wafer solar cell according to the invention;

[0044] Fig. 3 is a cross-sectional view of another wafer solar cell according to the invention;

[0045] Fig. 4 is a flow chart of a manufacturing method according to the invention;

[0046] Fig. 5 is a micrograph of a wafer solar cell subjected to several steps of the process shown in Fig. 4; and

[0047] Fig. 6 is another microscope image of a wafer solar cell subjected to the process shown in Fig. 4.

[0048] Fig. 1 shows a cross-sectional view of a wafer solar cell according to the prior art. The wafer solar cell has a semiconductor wafer 1 with a semiconductor wafer surface comprising a front side and a back side. An n-doped region 3 is formed in the front side, while a p-doped region 2 is formed in the back side. A passivation layer 6 is applied to both the n-doped region 3 and the p-doped region 2. A metal electrode structure 4 in the form of finger electrodes is arranged on each of the passivation layers 6. The metal electrode structure 4 covers an electrode covering surface when viewed from the front or back side. The metal electrode structures 4 are each electrically connected to the n- or p-doped regions 3, 2 via current contact regions 5, which are located within opening regions 8 of the passivation layer 6.The opening regions 8 of the passivation layer 6 in this wafer solar cell occupy significantly more than 50% of the electrode coverage area because the metal electrode structures 4 have formed opening regions 8 almost entirely through the passivation layers 6 during the manufacturing process. The spatial arrangement of the n-doped region 3 and the p-doped region 2 can be the reverse of the arrangement shown in Figure 1.

[0049] Fig. 2 shows a cross-sectional view of a wafer solar cell 1 according to the invention. The wafer solar cell 1 shown in Fig. 2 corresponds to the wafer solar cell shown in Fig. 1 with the difference that the opening regions 8 of the passivation layer 6 take up less than 25% of the electrode covering area and, viewed microscopically, form an areal density of current contact regions 5 in the range from 1000 to 10,000, preferably from 3000 to 8000 and particularly preferably from 4000 to 6000 current contact regions 5 per square millimeter of electrode covering area.

[0050] Fig. 3 shows a cross-sectional view of another wafer solar cell according to the invention. The wafer solar cell 1 shown in Fig. 3 corresponds to the wafer solar cell shown in Fig. 1, with the difference that an additional separating layer 7 is arranged between the passivation layer 6 and the metal electrode structure 4. The additional separating layer 7 supports the desired, low surface coverage of the opening regions 8 of the passivation layer 6 in the previously described microscopic structure during the manufacturing process. Fig. 4 shows a flow diagram of a method according to the invention.The manufacturing method comprises the following steps: First, a step 21 takes place in the form of providing a semiconductor wafer made of semiconductor material, comprising a semiconductor wafer surface and at least one p-doped region and at least one n-doped region with at least one pn junction and a passivation layer deposited on the semiconductor surface. Step 21 is followed by a step 22 in the form of applying a metal electrode structure to the passivation layer by means of a screen printing step. After application, the metal electrode structure covers an electrode covering area on the semiconductor wafer surface.Step 22 is followed by a step 23 in the form of heating the semiconductor wafer in a first thermal treatment step in a first temperature window of 500 to 850 degrees, such that the opening regions 8 take up less than 25% or preferably less than 15% or even more preferably less than 10% of the electrode covering area and the metal electrode structure is electrically contacted with the semiconductor material via some current contact regions 5 which are located within opening regions 8 and such that the resulting wafer solar cell has an efficiency of less than 18% with a specific contact resistance averaged over the surface of the wafer solar cell of more than 10 mOhmcm. 2 , preferably more than 20 mOhmcm 2 or particularly preferably more than 50 mOhmcm 2Step 23 is followed by a step 24 in the form of carrying out a further treatment step for thermal and / or electrical contact resistance optimization, wherein, in addition to the already existing ones, further current contact regions 5 are formed with an area density of 1,000 to 50,000 or 3,000 to 30,000 or 5,000 to 15,000 current contact regions per square millimeter of electrode covering area.

[0051] Fig. 5 shows a microscope image of a top view of the passivation layer of a wafer solar cell beneath its metal electrode structure. This wafer solar cell was subjected to several steps of the process shown in Fig. 4. The wafer solar cell shown has undergone steps 21, 22, and 23 of the process shown in Fig. 4, but not step 24. In the microscope image shown, the metal electrode structure of the wafer solar cell has been removed. The passivation layer 6 has a plurality of small opening regions 8 that are formed only at the tips of pyramid-shaped semiconductor structures of the semiconductor wafer material covered by the passivation layer 6. The passivation layer 6 is thus missing at the pyramid tips of these pyramid-shaped semiconductor structures.In a few of the opening areas 8, electrical contact areas 5 have formed, through which the current flows between the semiconductor material and the metal electrode structure. However, the density and quality of these electrical contact areas are so low and of such poor quality that a specific contact resistance of more than 10 mOhmcm is required. 2 , preferably more than 20 mOhmcm 2 , particularly preferably more than 50 mOhmcm 2 averaged over the surface of the wafer solar cell. In the region of the side surfaces of the pyramid-shaped semiconductor structures, ie in the predominantly areal areas on the semiconductor wafer surface, the passivation layer 6 is intact.

[0052] Fig. 6 shows a microscope image of a plan view of the passivation layer of a wafer solar cell beneath its metal electrode structure. The wafer solar cell has undergone steps 21, 22, 23, and 24 of the method shown in Fig. 4. In the microscope image shown, the metal electrode structure of the wafer solar cell has once again been removed. As can be seen from a comparison with the microscope image taken at the same scale in Fig. 5, the areal density of opening regions 8 in the passivation layer 6 in the pyramid-shaped semiconductor structures is essentially unchanged despite the further method step 24. However, additional current contact regions 5 created by the further method step 24 are present in the opening regions 8.This explains at the microscopic level that, with a consistently high proportion of the covering area covered by the passivation layer 6, the average specific contact resistance of the wafer solar cell decreases due to the increased number of current contact areas 5 in already existing opening areas 8. List of reference symbols:.

[0053] 1 semiconductor wafer

[0054] 2 p-doped region

[0055] 3 n -doped region

[0056] 4 Metal electrode structure

[0057] 5 power contact areas

[0058] 6 Passivation layer

[0059] 7 Separating layer

[0060] 8 opening areas

[0061] 21 first procedural step

[0062] 22 second procedural step

[0063] 23 third procedural step

[0064] 24 fourth procedural step

Claims

Patent claims:

1. Wafer solar cell with a semiconductor wafer (1) made of semiconductor material having a semiconductor wafer surface and at least one p-doped region (2) and at least one n-doped region (3), wherein the p-doped region (2) and / or the n-doped region (3) are each electrically contacted with a metal electrode structure (4) applied to the semiconductor wafer surface via opening regions (8) and current contact regions (5) located therein, and each metal electrode structure (4) covers an electrode covering area on the semiconductor wafer surface, characterized in that the opening regions (8) occupy less than 25%, preferably less than 15% and particularly preferably less than 10% of the electrode covering area and wherein the current contact regions (5) are provided with an areal density of 1000 to 50,000, preferably 3000 to 30,000 and particularly preferably 5000 to 15,000 current contact areas (5) per square millimeter of electrode covering area.

2. Wafer solar cell according to claim 1, characterized in that the individual current contact areas (5) have an area of less than 3pm 2 , preferably less than 1.5pm 2 and especially preferably less than 0.5pm 2 and for a majority of the current contact areas (5) it applies that the current contact areas (5) are arranged at a distance from one another.

3. Wafer solar cell according to claim 1 or 2, characterized in that the opening regions (8) consist of many spaced-apart individual regions, the majority of which are arranged within polygonally adjacent pyramid-shaped semiconductor structures, and pyramid-shaped semiconductor structures have polygonally arranged edges with lengths in the range of more than one micrometer.

4. Wafer solar cell according to claim 3, characterized in that only one opening region (8) is arranged within the majority of the pyramid-shaped semiconductor structures.

5. Wafer solar cell according to claim 4, characterized in that the opening regions (8) within the pyramid-shaped semiconductor structures occupy smaller areas, preferably areas of less than 50% and particularly preferably of less than 25%, compared to the areas covered by these pyramid-shaped semiconductor structures.

6. Wafer solar cell according to claim 4 or 5, characterized in that the opening regions (8) are predominantly arranged in the region of the tips of the pyramid-shaped semiconductor structures which, viewed in their three-dimensional topology, are spatially closest to the semiconductor material to be electrically contacted.

7. Wafer solar cell according to one of the preceding claims 1, characterized in that the wafer solar cell has a passivation layer (6) between the metal electrode structure (4) and the semiconductor material in regions around the opening regions (8).

8. Wafer solar cell according to claim 7, characterized in that the wafer solar cell has an additional separating layer (7) between the metal electrode structure (4) and the semiconductor material in regions around the opening regions (8) on the passivation layer (6).

9. Wafer solar cell according to claim 8, characterized in that the additional separating layer (7) is selected from the group consisting of: transparent, electrically conductive oxides, such as indium tin oxide, tungsten-doped indium oxide, aluminum-doped zinc oxide, zinc-doped indium oxide, and non-electrically conductive oxides selected from the group consisting of: nickel oxide, titanium oxide and magnesium fluoride.

10. Wafer solar cell according to claim 8 or 9, characterized in that the additional separating layer (7) has a layer thickness of less than 80 nm, preferably less than 40 nm and particularly preferably less than 20 nm.

11. Wafer solar cell according to one of the preceding claims, characterized in that the current contact regions (5) located in opening regions (8) comprise metal crystallites and / or metal-silicon alloys which border on the metal electrode structure (4) or protrude into it.

12. Method for producing a wafer solar cell with the following steps - Providing a semiconductor wafer (1) made of semiconductor material having a semiconductor wafer surface and at least one p-doped region (2) and at least one n-doped region (3) with at least one pn junction and a passivation layer (6) deposited on the semiconductor surface, - applying a metal electrode structure (4) to the passivation layer (6) so that the metal electrode structure (4) covers an electrode covering surface on the semiconductor wafer surface, - Heating the semiconductor wafer in a first thermal treatment step in a first temperature window of 500 to 850 degrees, such that the metal electrode structure (4) is electrically contacted with the semiconductor material via opening regions (8) of the passivation layer, which occupy less than 25%, preferably less than 15% and particularly preferably less than 10% of the electrode covering area, and via current contact regions (5) located in these opening regions, and that the resulting wafer solar cell has an efficiency of less than 18% with an average specific contact resistance of more than 10 mOhmcm 2 , preferably more than 20 mOhmcm 2 , particularly preferably more than 50 mOhmcm 2 has, - Carrying out a further treatment step for thermal and / or electrical contact resistance optimization such that within the opening areas (8) the current contact areas (5) are provided with a surface density of 1000 to 50,000, preferably 3000 to 30,000 and particularly preferably 5000 to 15000 current contact areas (5) per square millimeter of electrode covering surface are formed.

13. The method according to claim 12, characterized in that the passivation layer (6) is formed with a layer thickness of more than 50 nm and / or an additional separating layer (7) with a layer thickness of less than 40 nm, preferably less than 30 nm, is provided on the passivation layer (6).

14. The method according to claim 12 or 13, characterized in that the further treatment step is selected as a single step or as a combination of steps from the group consisting of: - LECO step - Laser Enhanced Contact Optimization, - tempering step, - Laser heating step and - photonic sintering.

15. The method according to any one of claims 12 to 14, characterized in that the further treatment step comprises a LECO step in which the wafer solar cell is treated with a power density of 200 to 1,500,000 W / cm 2 is irradiated.

16. The method according to any one of claims 12 to 15, characterized in that the further treatment step comprises a LECO step in which an applied reverse voltage is 1 to 40 V opposite to the forward direction and a local current of 0.5 to 20 A flows.

Citation Information

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