Base structure for quantum devices and manufacturing method

Abstract

The invention relates to a structure (Strc) capable of forming a quantum device, comprising: a silicon carrier substrate (Car); a first layer (Si-L1) of silicon isotope 28Si; a layer (Ox) of silicon oxide; a second layer (Si-L2) of silicon isotope 28Si, wherein the structure is formed by the carrier substrate (Car), the first layer (Si-L1) of silicon isotope 28Si, the layer (Ox) of silicon oxide, and the second layer (Si-L1) of silicon isotope 28Si, stacked in this order, wherein the first layer (SiL1) and the second layer (Si-L2) of silicon isotope 28Si are each made up of at least 99.92% of silicon isotope 28Si.

Description

Basic structure of quantum devices and fabrication process TECHNICAL FIELD OF THE INVENTION

[0001] The invention relates to materials and structures capable of forming a basis for electronic devices whose operating principle is based on the manipulation of quantum objects, in particular qubits. TECHNOLOGICAL BACKGROUND

[0002] Silicon is recognized as a promising material for electronic devices based on the manipulation of electron spin, which represents their magnetic moment. In particular, information can be stored and manipulated by acting on electron spin, rather than by using their electric charge as in conventional electronics. Electron spin can also be used as a qubit medium to implement quantum information theory, by exploiting superpositions of spin states with a well-defined phase. Reference may be made to documents EP 3 975 072 A1 and US 2023 / 0026518.

[0003] The duration of phase retention, and therefore of information retention, is defined by the coherence duration. Long coherence durations are required so that operations on qubits can be performed or quantum information can be stored before a read operation, during which the qubit loses coherence and the information is lost.

[0004] US 2004 / 0169225 A1 and US 2006 / 0091393 A1 propose wafers of semiconductor material comprising layers of isotopically enriched silicon having a higher thermal conductivity than natural silicon.

[0005] The document by Mazzocchi V et al. titled “99.992% 28Si CVD-grown epilayer on 300 mm substrates for large scale integration of silicon spin qubits”, ARXIV.ORG, Cornell University Library, 201 Olin Library Cornell University Ithaca, NY 14853, July 13, 2018 XP081248026 and the document by Mazzocchi V et al. titled “99.992% 28Si CVD-grown epilayer on 300 mm substrates for large scale integration of silicon spin qubits”, Journal of crystal growth, vol. 509, pages 1-7, XP085581554, ISSN: 022-0248, DOI: 10.1016 / J.CRYSGRO.2018.12.010 describe the epitaxial growth of silicon isotope 28 layers with a purity greater than 99.992% on 300 mm natural silicon substrates for quantum applications.

[0006] The document by CC LO et al. titled “Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon” describes an example of application of 28 If with the manufacture of FinFETS transistors.

[0007] Silicon has three stable isotopes: 28 If, 29 If and 30 Si, which make up approximately 92.2%, 4.7% and 3.1% of natural silicon, respectively. One of the mechanisms that causes spin state decoherence is the presence of isotopes 29 If silicon, whose nuclear magnetic moment is not zero. It is therefore preferable to eliminate as much as possible the proportion of 29 If in silicon serving as the basis for qubit manipulation devices. The isotope 30 If should also be eliminated: although the isotope 30 If it has no spin, it causes variations in the bond lengths between atoms and therefore in the local environment of the qubits. It is necessary to maximize the homogeneity of the local environment so that the qubits have characteristics as close as possible to each other.

[0008] One solution is to use isotope-enriched silicon 28 Si. Schneider et al. (E. Schneider and J. England, “Isotopically Enriched Layers for Quantum Computers Formed by 28Si Implantation and Layer Exchange,” ACS Appl. Mater. Interfaces 2023, 15, 21609−21617) propose a technique for enriching silicon isotope layers 28 If based on ion implantation of ions 28 Si in an aluminum layer grown on a silicon substrate without native oxide followed by crystallization by layer exchange: this results in a high-purity 28Si layer in contact on the silicon substrate. Schneider also explains that defects at the interfaces of the device layers require high-quality dielectrics and / or techniques to distance the qubits from the interfaces and the noise they cause, depending on the geometry of the qubits placement, close or far from the interfaces.

[0009] Spin qubit manipulation devices can be made using silicon as a base and the semiconductor industry's standard CMOS (Complementary Metal Oxide Semiconductor) or FDSOI (Fully Depleted Silicon On Insulator) manufacturing processes. FDSOI technology allows, in particular, to control the location of the qubits, far from the interfaces between the silicon and the gate dielectric or the buried oxide (BOX) layer.

[0010] However, SOI (Silicon On Insulator) type substrates with a thin layer of the isotope 28 If quantum-grade silicon does not exist commercially. Here, "quantum-grade" means layers of 28 If pure enough to bring the spin coherence of electrons to durations sufficient to carry out operations on qubits, with a purity in 28 If greater than 99.92%.

[0011] There is thus a need for silicon wafers suitable for use as substrates for the manufacture of devices for manipulating electron spin qubits, capable of maintaining the isotopic purity of layers of 28 If and to allow the manipulation of qubits at chosen locations, compatible with the type of device envisaged.

[0012] There is also a need for SOI type substrates, Silicon On Insulator in English terminology, comprising a thin layer of 28 If on a substrate, an electrically insulating layer is interposed between the 28Si layer and the substrate. It is advantageous if the thin layer and the electrically insulating layer (also called "BOX" for Buried Oxide) are sufficiently thin to be able to form so-called FD-SOI or Fully Depleted SOI transistors in English terminology.

[0013] Furthermore, considering that quantum applications require working at very low temperatures, for example below 3 K or of the order of 10 mK, while employing control electronics that are physically as close as possible to the supports of the manipulated quantum quantities, the integration on the same substrate of FD-SOI transistors and quantum quantity manipulation devices is advantageous: FD-SOI transistors can have a low threshold voltage and operate while limiting the energy dissipation in their support, thus limiting the heating problems of these quantum quantity manipulation devices.

[0014] The applicant's objective is to provide a structure and a method for manufacturing a semiconductor support capable of forming a basis for obtaining devices for manipulating quantum objects, and in particular qubits formed from electron spins.

[0015] To achieve this goal, one aspect of the invention is a structure capable of forming a quantum device, comprising: a silicon-carrying substrate; a first isotope layer 28 Si of silicon; a layer of silicon oxide; a second layer of isotope 28 If silicon, the structure being formed by the carrier substrate, the first layer of isotope 28 Si silicon, silicon oxide layer, and the second isotope layer 28 Si of silicon, stacked in this order, in which the first layer (Si-L1) and the second layer (Si-L2) of isotope 28 If silicon is each made up of at least 99.92% of the isotope 28 If silicon.

[0016] A first advantage of the structure is to provide an adequate basis for the development of quantum devices using technologies already well mastered in the field of semiconductors.

[0017] A second advantage of the structure is that it guarantees the reliability of the devices obtained thanks to the presence of a bilayer of 28 If and of 28 SiO2 acting as a barrier to unwanted elements contained in the support substrate, such as isotopes 29 If and 30 If silicon, or even carbon, oxygen or nitrogen atoms. It would indeed be extremely difficult and expensive to produce silicon substrates purely formed from the isotope 28 If silicon. The available substrates are therefore formed from natural silicon, containing at least the three isotopes 28 If, 29 if and 30 If silicon, as well as impurities such as carbon, oxygen, and nitrogen.

[0018] A third advantage of the structure is that it can be obtained by known methods, adapted to the needs of quantum devices, which accelerates the technological maturity of the manufacturing process involved and reduces the necessary investments in time and equipment.

[0019] According to additional non-limiting characteristics of the support according to the invention, considered individually or according to any technically feasible combination:

[0020] - the second isotope layer 28 If silicon can comprise less than 800 ppm of isotope 29 If silicon;

[0021] - the first isotope layer 28 If silicon can comprise less than 800 ppm of isotope 29 If silicon;

[0022] - the second isotope layer 28If silicon can have a thickness between 10 and 60 nm, the silicon oxide layer can have a thickness between 10 and 50 nm, preferably between 15 and 30 nm, and the first layer of isotope 28 If silicon can have a thickness greater than 30 nm, preferably between 30 nm and 250 nm; and

[0023] - the second isotope layer 28 If silicon can have a thickness of between 120 and 200 Å, preferably between 140 and 180 Å, the silicon oxide layer can have a thickness of between 120 and 280 Å, preferably between 160 and 240 Å, and the first isotope layer 28 If silicon can have a thickness greater than 200 nm, preferably between 200 nm and 420 nm.

[0024] The invention extends to a method of manufacturing a structure according to the invention, comprising the steps of: forming a first layer of isotope28 Si of silicon on a first substrate; form a second layer of isotope 28 Si silicon on a second substrate; oxidizing the second silicon layer over a portion of its thickness to form an oxide layer; assembling the first substrate and the second substrate by contacting the first silicon layer to the oxide layer, the first substrate, the first silicon layer, the oxide layer and the second silicon layer being stacked in this order, wherein the first layer (Si-L1) and the second layer (Si-L2) of isotope 28 If silicon is each made up of at least 99.92% of the isotope 28 If silicon.

[0025] According to additional non-limiting characteristics of the structure according to the invention, considered individually or according to any technically feasible combination:

[0026] - the method according to the invention may further comprise a step of forming a weakening plane of the second layer by implanting ions of a light species in a non-oxidized part of the second layer after the oxidation step over a part of its thickness; and a step of fracturing the second layer at the weakening plane and removing the donor substrate after the assembly step; and

[0027] - the second isotope layer 28 Silicon can have a thickness between 300 nm and 600 nm before the oxidation step. BRIEF DESCRIPTION OF THE FIGURES

[0028] Other characteristics and advantages of the invention will emerge from the detailed description of the invention which follows with reference to the appended figures in which:

[0029] Illustrates a manufacturing method according to the invention;

[0030] Illustrates a structure obtained by means of the process of the; and

[0031] This is a diagram summarizing the manufacturing process of Figures 1 and 2. DETAILED DESCRIPTION OF THE INVENTION

[0032] Method of implementation

[0033] A particular embodiment of the present invention is described by means of Figures 1 to 3 and the associated description below.

[0034] Illustrates a Strc structure formed from a carrier substrate Car, a barrier layer Si-L1, a dielectric layer Ox, and a device layer Si-L2, stacked in this order, each of these elements preferably being in direct contact with the immediately adjacent element or elements.

[0035] The Si-L1 barrier layer, the Ox oxide layer and the Si-L2 device layer are layers formed from the isotope 28 If silicon. The Si-L1 and Si-L2 layers in particular have a purity in 28Si of at least 99.92%, for example between 99.92% and 99.995%. Thus, the silicon layers Si-L1 and Si-L2 comprise less than 800 ppm of isotope 29 If silicon.

[0036] Such a structure can be used to form quantum devices on its surface, thanks to the characteristics of the Si-L2 layer of the device: thanks to its purity in 28 If, the spin coherence duration of the electrons in this layer is sufficient to perform operations on qubits associated with these electrons. Integrated into a quantum device, the Si-L2 layer therefore represents a good support for qubits.

[0037] In addition, the Si-L1 barrier layer and the Ox oxide layer prevent, or at least limit, the migration of impurities, and in particular of atoms of the isotope 29Si from the supporting substrate Car to the Si-L2 layer of the device. Without a barrier layer, the impurity diffusion phenomenon would increase the concentrations in 29 If, 30 Si or other dopants, at levels incompatible with the quantum quality necessary for the proper functioning of quantum devices. Thus leading to a reduction in coherence times and causing these devices to operate in a manner similar to devices formed within conventional substrates for FD-SOI transistors.

[0038] Illustrates in (A) the formation of the Si-L1 layer on the carrier substrate Car, during a step 310 Car. In this example, the carrier substrate Car is made of a monocrystalline silicon wafer, but any other substrate conventionally used in the semiconductor industry could be used. The Si-L1 barrier layer is grown, for example by epitaxy, on one side of the carrier substrate Car.

[0039] Illustrates in (B) the formation of the Si-L2 layer on the donor substrate Don, during a step 310 Don . In this example, the donor substrate Don consists of a monocrystalline silicon wafer, but any other substrate conventionally used in the semiconductor industry could be used. The Si-L2 device layer is grown, for example by epitaxy, on one side of the donor substrate Don.

[0040] The Si-L1 and Si-L2 layers are grown to have silicon isotope 28 purities of between 99.920% and 99.995%. Thus, the maximum concentrations of silicon isotope 29 in these layers are, at least initially, between 800 and 50 ppm, concentrations low enough to allow the fabrication of quantum devices based on the spin of electrons on the Si-L2 layer of the device. Such compositions of the Si-L1 and Si-L2 layers can be achieved by employing, in a conventional epitaxial growth process, silane gas of a purity corresponding to that of the layers in 28 If, as a precursor gas of silicon layers.

[0041] Illustrates in (C) a partial oxidation, over a certain depth, of the Si-L2 layer to form an Ox layer of silicon oxide SiO2, during a step 320 Donoxidation. This operation can be carried out conventionally by applying a heat treatment under an oxygen atmosphere, during a step 320 Don oxidation. The Ox layer is preferably formed by thermal oxidation so as to ensure a good quality interface between the oxide layer formed and the Si-L2 layer on the one hand and the Si-L1 layer on the other hand, after bonding. Naturally, it is a silicon oxide formed from oxygen and the isotope 28If silicon from the Si-L2 layer. The Si-L2 layer is only oxidized to a certain thickness, strictly less than its thickness and depending on the thickness targeted for the Ox layer. Furthermore, the Ox layer can also be formed by HDP-CVD type deposition (HDP-CVD for High Density Plasma CVD), which is carried out at a relatively low temperature compared to thermal oxidation, which advantageously limits the thermal budget imposed on the Si-L2 layer, and therefore limits the diffusion of other Si isotopes in the layer intended to contain the quantum object manipulation devices.

[0042] Also illustrated in (C) is an implantation of light species such as hydrogen, helium, or a combination of such species in the non-oxidized part of the Si-L2 layer through the oxide layer Ox, so as to form a weakening plane Frg in the thickness of the non-oxidized part of the Si-L2 layer, during a step 330 Don .

[0043] Following the formation of the embrittlement plane Frg, the donor substrate Don is turned over and the oxide layer Ox is brought into intimate contact with the Si-L1 layer of the carrier substrate Car and is assembled there, for example by molecular bonding or any other assembly technique by bringing into direct contact surfaces of elements to be assembled, so as to obtain the structure illustrated in (D) of the, during a step 340.

[0044] Illustrates in (E) the fracture of the Si-L2 layer of the device at the level of the embrittlement plane Frg obtained by ion implantation, so that the donor substrate Don and a Si-L2 part El is removed from the structure illustrated in (C) while a portion of the Si-L2 device layer remains attached thereto, during a removal fracture step 350. This fracture can be obtained by heat treatment, possibly assisted by mechanical stress to initiate the fracture, according to conventional layer transfer techniques well known in the field of microelectronics, such as the so-called "Smart Cut" process. Following the assembly and fracture of the donor substrate, a heat treatment can be applied so as to consolidate the assembly and repair the assembled layers.

[0045] An alternative to the formation of a weakening plane and the fracture of the Si-L2 layer at this plane may consist of thinning the donor substrate Don after its assembly, for example by etching, grinding and / or chemical mechanical polishing (CMP). This thinning may be used to completely remove the second substrate Don, and possibly part of the Si-L2 layer to achieve the desired thickness for this layer.

[0046] A step 360 of finishing the surface of the Si-L2 layer follows step 350, by one or more mechanical and / or chemical attacks of thinning the Si-L2 layer to a desired thickness and polishing its accessible face. At the end of this step, the Strct structure illustrated by is obtained.

[0047] The thicknesses of the Ox and Si-L1 layers can be chosen so as to guarantee an adequate level of barrier effect to avoid contamination of the Si-L2 layer of the device by, in particular, 29 Si, while limiting the thickness of the Ox oxide layer, for example for applications based on FD-SOI technology which requires a thin Ox layer. Thus, the inventors were able to determine by computer simulation sets of thicknesses for the Si-L1, Ox and Si-L2 layers, making it possible to guarantee a certain level of purity of the Si-L2 layer while advantageously minimizing the thickness of the Si-L1 layer for a given thickness of the Ox layer, chosen for its compatibility with conventional processes of FD-SOI technology.

[0048] Table Tab1 shows such thickness sets for two purity levels, 99.9% and 99.99% of 28If for the Si-L2 layer. The numerical simulations were calculated considering that the Si-L1 layer has a purity level of 99.99% of 28 Si. These calculations take into account, in particular, a thermal budget corresponding to that of the realization of Strc substrates and the conventional fabrication of an FD-SOI transistor, which is the highest thermal budget undergone by the layers, which includes the steps of manufacturing CMOS transistors and qubit devices formed in the Si-L2 layer.Si-L2 thickness (after transfer)Ox thicknessSi-L1 thickness for a 99.9% Si-L2 layerSi-L1 thickness for a 99.99% Si-L2 layer16 nm50 nm30 nm250 nm16nm20 nm200 nm420 nm

[0049] Tab. 1

[0050] It should be noted that before steps 320, 350 and 360 of oxidation, fracturing and finishing of the Si-L2 layer, the latter may have a thickness of the order of 400 nm, preferably between 300 nm and 600 nm, so as to guarantee that after these steps it is possible to obtain a Si-L2 layer of approximately 16 nm with the desired purity in 28 If.

[0051] The thicknesses typically used in FD-SOI type technologies are between 10 and 60 nm for the active layer, which here corresponds to the Si-L2 layer of the device, and between 10 and 50 nm for the Ox oxide layer, often around 20 nm thick.

[0052] The invention is not limited to the embodiment described above and variations may be made thereto without departing from the scope of the invention as defined by the claims.

Claims

Structure (Strc) suitable for forming a quantum device, comprising:- a carrier substrate (Car) of silicon;- a first layer (Si-L1) of isotope 28 Si of silicon; - a layer (Ox) of silicon oxide; - a second layer (Si-L2) of isotope 28 Si of silicon, the structure being formed by the carrier substrate (Car), the first layer (Si-L1) of isotope 28 Si of silicon, the layer (Ox) of silicon oxide, and the second layer (Si-L2) of isotope 28 Si of silicon, stacked in this order, in which the first layer (Si-L1) and the second layer (Si-L2) of isotope 28 If silicon is each made up of at least 99.92% of the isotope 28 If silicon. Structure (Strc) for forming a quantum device according to claim 1, in which the second layer (Si-L2) of isotope 28 If silicon contains less than 800 ppm of the isotope 29 If silicon. Structure (Strc) for forming a quantum device according to any one of claims 1 to 2, in which the first layer (Si-L1) of isotope 28 If silicon contains less than 800 ppm of the isotope 29 If silicon. Structure (Strc) for forming a quantum device according to any one of claims 1 to 3, in which the second layer (Si-L2) of isotope 28 If silicon has a thickness between 10 and 60 nm, the layer (Ox) of silicon oxide has a thickness between 10 and 50 nm, preferably between 15 and 30 nm, and the first layer (Si-L1) of isotope 28 If silicon has a thickness greater than 30 nm, preferably between 30 nm and 250 nm. Structure (Strc) for forming a quantum device according to any one of claims 1 to 4, in which the second layer (Si-L2) of isotope 28If silicon has a thickness between 120 and 200 Å, preferably between 140 and 180 Å, the layer (Ox) of silicon oxide has a thickness between 120 and 280 Å, preferably between 160 and 240 Å, and the first layer (Si-L1) of isotope 28 If silicon has a thickness greater than 200 nm, preferably between 200 nm and 420 nm. A method (300) of manufacturing a structure according to any one of claims 1 to 5, comprising the steps of:- forming (310 Car ) a first layer of isotope 28 If silicon on a first substrate (Car);- form (310 Don ) a second layer of isotope 28 If silicon on a second substrate (Don);- oxidize (320 Don) the second silicon layer over a portion of its thickness to form an oxide layer (Ox);- assembling (340) the first substrate (Car) and the second substrate (Don) by bringing the first silicon layer (Si-L1) into contact with the oxide layer (Ox), the first substrate (Car), the first silicon layer (Si-L1), the oxide layer (Ox) and the second silicon layer (Si-L2) being stacked in this order, in which the first layer (Si-L1) and the second layer (Si-L2) of isotope 28 If silicon is each made up of at least 99.92% of the isotope 28 If silicon. The method according to claim 6, further comprising:- a step (330Don) of forming a weakening plane of the second layer (Si-L2) by implanting ions of a light species in a non-oxidized part of the second layer (Si-L2) after step (320D on) oxidation over part of its thickness; and- a step (350) of a fracture of the second layer (Si-L2) at the level of the plane of embrittlement and withdrawal of the donor substrate (Don) after the assembly step (340). The method of claim 6 or 7, wherein the second isotope layer 28 If silicon has a thickness between 300 nm and 600 nm before the step (320 Don ) of oxidation.

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