Systems and methods for energy recovery and resonant HV switching with voltage balancing

Abstract

A modular resonant switch system and an energy recovery system are described. Each component of the energy recovery system includes primary and secondary inductors, a primary switch, and additional passive elements. The energy recovery system recovers radio frequency (RF) energy by applying a resonant method in which the RF energy is transferred from the primary inductor to the secondary inductor, rectified, and fed back to an input source. Moreover, the modular resonant switch system includes a high-voltage modular resonant switch with or without energy recovery. By replacing the primary and secondary inductors with an inductor and a diode, the energy recovery system is transformed into the high voltage modular resonant switch. The high voltage modular resonant switch is implemented with relatively low voltage switches coupled in series. Also, voltage balancing is achieved across multiple switches within components of the high voltage modular resonant switch.

Description

SYSTEMS AND METHODS FOR ENERGY RECOVERY AND RESONANT HV SWITCHING WITH VOLTAGE BALANCINGField

[0001] The present embodiments relate to systems and methods for energy recovery and resonant high voltage (HV) switching with voltage balancing.Background

[0002] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

[0003] In a plasma system, one or more radio frequency (RF) generators are coupled via an impedance matching circuit to a plasma chamber. The RF generators supply RF signals to the impedance matching circuit. The impedance matching circuit balances an impedance of a load coupled to an output of the impedance matching circuit with an impedance of a source coupled to an input of the impedance matching circuit to output a modified signal. The modified signal is provided to the plasma chamber to process a substrate within the plasma chamber. However, it is difficult to operate the RF generators in an efficient manner. Also, it is important to protect the plasma system while operating the plasma system.Summary

[0004] Embodiments of the disclosure provide systems, apparatus, methods and computer programs for energy recovery and resonant high voltage (HV) switching with voltage balancing. It should be appreciated that the present embodiments can be implemented in numerous ways, e.g., a process, an apparatus, a system, a device, or a method on a computer readable medium. Several embodiments are described below.

[0005] In an embodiment, a multilevel modular flyback (MMF) recovers energy from a high-voltage energized bus and feeds it an input direct current (DC) source. By controlling a time at which an MMF switch turns off, e.g., opens, an amount of energy that can be recovered from a plasma chamber is controlled. Multiple flyback components of the MMF are connected in an input series and output parallel configuration, with balancing capacitors and resistors. The balancing capacitors are optimized for on-time variability among the different flyback components. When combined with a primary inductance of a flyback component, acapacitor of the flyback component forms a resonant network that restricts voltage rise or voltage fall across the flyback components, keeping voltages across the flyback components almost equal to a steady-state voltage.

[0006] In an embodiment, the MMF achieves voltage balancing across each of the flyback components even if there is switching on / off time variability. For example, even with 50% variation in timing at which the MMF switches are turned on or off, the MMF switches successfully balance the voltage across each of the flyback components. This enables high voltage (HV) switching with low voltage (LV) switches.

[0007] In one embodiment, due to intrinsic voltage balancing capability in an MMF, it can be used as a switch. With voltage balancing capability in case of on-time variability, a high voltage switch is implemented by connecting many MMF components in series. Due to intrinsic voltage balancing capability, the MMF is implemented as a switch with an optional energy recovery through secondary inductors of the flyback components.

[0008] In an embodiment, an MMF is a modular resonance switch (MRS) in which a flyback transformer is replaced with an inductor. Voltage balancing is achieved in the MRS.

[0009] In one embodiment, a magnetic energy recovery system is described. The system includes a first circuit having a primary inductor, a secondary inductor electromagnetically coupled to the primary inductor, and a diode. The system also includes a switch coupled in parallel to the diode to form a parallel circuit. The parallel circuit is coupled in series with the primary inductor. The switch operates to facilitate storage, within the primary inductor, radio frequency energy recovered from a plasma chamber. Also, the switch operates to facilitate a transfer of the radio frequency energy from the primary inductor via the secondary inductor to an energy storage circuit.

[0010] In an embodiment, a switch system is provided. The switch system includes a first circuit having a primary inductor, a secondary inductor electromagnetically coupled to the primary inductor, and a diode. The switch system includes a switch coupled in parallel to the diode to form a parallel circuit. The parallel circuit is coupled in series with the primary inductor. The switch operates to facilitate storage, within the primary inductor, radio frequency energy received from a voltage source. Also, the switch operates to facilitate a transfer of radio frequency energy from the primary inductor to a load and a transfer of radio frequency energy from the primary inductor via the secondary inductor to an energy storage circuit.

[0011] In one embodiment, a switch system is provided. The switch system includes a first circuit having an inductor, a diode, and a switch coupled in parallel to the diode to form a parallel circuit. The parallel circuit is coupled in series with the inductor. The switch operatesto facilitate storage of radio frequency energy within the inductor. Also, the switch operates to facilitate a transfer of radio frequency energy from the inductor to a load.

[0012] Some advantages of the herein described systems and methods include recovering energy from the plasma chamber by using the MMF. Additional advantages of the herein described systems and methods include using the MMF as a switch in addition to using the MMF for energy recovery. Further advantages of the herein described systems and methods include using the MRS as a switch. Also, the MMF includes multiple components, and each component includes a switch. Voltages across the switches of the components of the MMF is balanced independent of times at which the switches open or close. This protects the switches of the MMF from failure.

[0013] Similarly, the MRS includes multiple components, and each component includes a switch. Voltage across the switches of the components of the MRS is balanced independent of times at which the switches open or close. This protects the switches of the MRS from failure.

[0014] Other aspects will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The embodiments may best be understood by reference to the following description taken in conjunction with the accompanying drawings.

[0016] Figure 1 is a diagram of an embodiment of a system to illustrate a magnetic energy recovery circuit, which is sometimes referred to herein as a modular multilevel flyback (MMF).

[0017] Figure 2 is a diagram of an embodiment of a controller to illustrate operation of the system of Figure 1.

[0018] Figure 3 illustrates an embodiment of a graph and an embodiment of another graph to illustrate that although multiple switches have different turn on times or different turn off times or a combination thereof, there is a substantially constant voltage drop across each of multiple components to achieve voltage balancing across the components.

[0019] Figure 4 is a diagram of an embodiment of a system to illustrate a high voltage (HV) switch system.

[0020] Figure 5A is a diagram of an embodiment of a system to illustrate use of the MMF as an HV switch.

[0021] Figure 5B is a diagram of an embodiment of a modular resonance switch (MRS) to enable or disable a transfer of an RF signal from one node to another.DETAILED DESCRIPTION

[0022] The following embodiments describe systems and methods for energy recovery and resonant high voltage (HV) switching with voltage balancing. It will be apparent that the present embodiments may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present embodiments.

[0023] Figure 1 is a diagram of an embodiment of a system 100 to illustrate a magnetic energy recovery circuit, which is sometimes referred to herein as a modular multilevel flyback (MMF) 102. The system 100 includes a radio frequency (RF) charger circuit 104, a charging diode 106, a resonant inductor 108, a plasma chamber 110, the MMF 102, a diode 112, an iron flux compensator (IFC) 114, a diode 103, and an IFC diode 105. Examples of the plasma chamber 110 include a capacitively coupled plasma chamber and an inductively coupled plasma chamber.

[0024] As an example, the IFC 114 includes a pulser that is coupled to a circuit. The circuit includes a resistor-inductor-diode (RLD) circuit. The RLD circuit includes a resistor, or an inductor, and a diode. The resistor and inductor are coupled to each other in series to form a series circuit and the series circuit is coupled in parallel to the diode to form the RLD circuit. To illustrate, the pulser is a nanopulser.

[0025] The RF charger circuit 104 includes a direct current (DC) voltage source Vdc, a capacitor 116, and a high-voltage (HV) charger 118. As an example, the HV charger 118 includes a combination of two or more power supplies, such as voltage power supplies or DC power supplies, that convert, such as step up or step down, a DC voltage from one amount to another amount. To illustrate, a voltage that is applied at an input of the HV charger 118 is increased or decreased to output another voltage at an output of the HV charger 118.

[0026] The capacitor 116 is sometimes referred to herein as an energy storage circuit. The capacitor 116 is coupled in parallel to the DC voltage source Vdc and to the HV charger 118. The output of the HV charger 118 is coupled to the charging diode 106, which is coupled via a point 117 to the IFC diode 105 and to the resonant inductor 108. The resonant inductor 108 is coupled via a point 120 to the plasma chamber 110 and to the diode 112. For example, the resonant inductor 108 is coupled to an electrode of the plasma chamber 110. To illustrate, the resonant inductor 108 is coupled to a lower electrode of the plasma chamber 110 or an upper electrode of the plasma chamber 110 or an RF coil of the plasma chamber 110. To illustrate, when the resonant inductor 108 is coupled to the lower electrode, the upper electrode is coupled to a ground potential. As another illustration, when the resonant inductor 108 is coupled to the upper electrode or the RF coil, the lower electrode is coupled to a ground potential. As yetanother illustration, when the resonant inductor 108 is coupled to the upper electrode of the RF coil, the lower electrode is coupled to one or more RF generators via an impedance matching circuit. The lower electrode is embedded within an electrostatic chuck (ESC) to which the resonant inductor 108 is coupled. The diode 112 is coupled to the MMF 102, which is coupled to the diode 103. The diode 103 is coupled via a point 122 to the DC voltage source Vdc, the capacitor 116, and the HV charger 118. The IFC diode 105 is coupled to the ion flux compensator 114.

[0027] The MMF 102 includes a component 124, a component 126, and a component 128. Each component 124, 126, and 128 has the same structure. For example, each component 124, 126, and 128 includes a diode DI, another diode D2, an inductor LI, another inductor L2, a capacitor Cl, and a resistor Rl. To illustrate, each inductor LI has the same inductance, each inductor L2 has the same inductance, each capacitor Cl has the same capacitance, and each resistor Rl has the same resistance. To further illustrate, the inductor LI of the component 124 has an inductance equal to an inductance of the inductor LI of the component 126 and the capacitor Cl of the component 124 has a capacitance equal to a capacitance of the capacitor Cl of the component 126. Also, each component 124, 126, and 128 includes a switch. To illustrate, the component 124 includes a switch SW1, the component 126 includes a switch SW2, and the component 128 includes a switch SWn, where n is a positive integer. Each switch SW1, SW2, and SWn is a low voltage switch. For example, each switch SW1, SW2, and SWn is turned on or off when a low amount of voltage is applied across the switch.

[0028] The diodes DI of the components 124, 126, and 128 are coupled with each other. For example, the diode DI of the component 124 is coupled via a point 130 to the diode DI of the component 126 and to the diode DI of the component 128. The point 130 is an output of the component 124. As another example, the diode DI of the component 126 is coupled via a point 131 to the diode DI of the component 128 and to the diode 103. The point 131 is an output of the component 126 and is coupled to the point 130. For example, the point 131 is coupled to the point 130 directly, such as, without an electronic circuit, such as a diode or an inductor or a resistor or a capacitor, between the two points 130 and 131. The diode 103 is coupled to a point 133, which is an output of the component 128. The point 133 is coupled to the point 131. For example, the point 133 is coupled to the point 131 directly, such as, without the electronic circuit, such as a diode or an inductor or a resistor or a capacitor, between the two points 131 and 133.

[0029] Also, the diode DI is coupled in series to the inductor L2, which is proximate to the inductor LI. The inductor LI is placed proximate to the inductor L2 to be electromagnetically coupled, such as in electromagnetic communication with, the inductor L2.The inductors LI and L2 form a transformer. The inductor LI is sometimes referred to herein as a primary inductor of the transformer and the inductor L2 is sometimes referred to herein as a secondary inductor of the transformer. The diode DI is coupled in series to the inductor L2 to form a secondary circuit. The inductor LI is coupled in series with a parallel circuit having the diode D2 and a switch. For example, the inductor LI of the component 124 is coupled to the parallel circuit that includes the diode D2 of the component 124 and the switch SW1 of the component 124. The diode D2 of the component 124 and the switch SW1 of the component 124 are coupled in parallel with each other to form the parallel circuit. As another example, the inductor LI of the component 126 is coupled in series with the parallel circuit that includes the diode D2 of the component 126 and the switch SW2 of the component 124. The diode D2 of the component 126 and the switch SW2 of the component 126 are coupled in parallel with each other to form the parallel circuit. As yet another example, the inductor LI of the component 128 is coupled in series with the parallel circuit that includes the diode D2 of the component 128 and the switch SWn of the component 128. The diode D2 of the component 128 and the switch SWn of the component 128 are coupled in parallel with each other to form the parallel circuit.

[0030] The parallel circuit that includes the diode D2 and the switch is coupled in series with the inductor LI to form a series circuit. The series circuit is coupled in parallel to the resistor R1 and the capacitor Cl to form a primary circuit.

[0031] The primary circuit of the component 124 is coupled to the diode 112 at one end and is coupled to the primary circuit of the component 126 at an opposite end. For example, the inductor LI of the component 124 is coupled to the diode 112, and the diode D2 of the component 124 and the switch SW 1 are coupled to the inductor LI of the component 126.

[0032] An end of the primary circuit of the component 126 is coupled to the end of the primary circuit of the component 124 and an opposite end of the primary circuit of the component 126 is coupled to an end of the primary circuit of the component 128. For example, the diode D2 of the component 126 and the switch SW2 are coupled to the inductor LI of the component 128. An opposite end of the primary circuit of the component 128 is coupled to a reference potential, such as a ground potential. For example, the diode D2 of the component 128 and the switch SWn are coupled to the reference potential. The inductor L2 is coupled to the ground potential. For example, the inductor L2 of each component 124, 126, and 128 is coupled to the reference potential.

[0033] In an embodiment, the diode 103 is not included within the system 100.

[0034] In one embodiment, a component is sometimes referred to herein as a circuit.

[0035] Figure 2 is a diagram of an embodiment of a controller 200 to illustrate operation of the system 100 of Figure 1. The controller 200 includes a processor 202 and amemory device 204. Examples of the controller 200 include a computer, such as a desktop computer or a laptop computer or a smart phone or a tablet. Examples of the processor 202 include a microprocessor, a central processing unit, an application specific integrated circuit (ASIC), and a programmable logic device (PLD). An example of the memory device 204 includes a random access memory (RAM) or a read-only memory (ROM) or a combination thereof.

[0036] The processor 202 is coupled to the memory device 204. Also, the processor 202 is coupled via a connection system 206 to the RF charger circuit 104 (Figure 1). For example, the processor 202 is coupled via a connection of the connection system 206 to the DC voltage source Vdc and via multiple connections of the connection system 206 to the HV charger 118. To illustrate, each power supply of the HV charger 118 includes an enable input and the processor 202 is coupled to the enable inputs of the power supplies of the HV charger 118. As an example, a connection includes one or more cables.

[0037] Moreover, the processor 202 is coupled to the IFC 114 via a connection system 208. For example, the processor 202 is coupled to the pulser of the IFC 114 via a connection.

[0038] The processor 202 is coupled to each of the switches SW1 through SWn via a respective connection. For example, the processor 202 is coupled to the switch SW1 via a connection CN1, the switch SW2 via a connection CN2, and the switch SWn via a connection CNn.

[0039] In operation, the RF charger circuit 104, the MMF 102, and the IFC 114 (Figure 1) are controlled repeatedly by the processor 202 for multiple cycles. During each cycle of control, the RF charger circuit 104 is controlled for the fixed amount of dwell time. For example, the processor 202 includes a clock source that measures time to determine whether the fixed amount of dwell time is achieved.

[0040] The processor 202 generates and sends one or more control signals 210 via the connection system 206 to the RF charger circuit 104 to control the RF charger circuit 104 for the fixed amount of dwell time. For example, the processor 202 generates and sends a control signal to the DC voltage source Vdc to control an amount of voltage of a voltage signal 132 generated by the DC voltage source Vdc or generates and sends one or more enable signals to enable one or more of the power supplies of the HV charger 118 to modify, such as increase, an amount of voltage of a voltage signal 134 output from the HV charger 118 or a combination thereof. A voltage amount of the voltage signal 132 generated by the DC voltage source Vdc is modified, such as increased, by the HV charger 118 to achieve an amount of voltage of the voltage signal 134 output from the HV charger 118 of the RF charger circuit 104. As anotherexample, the processor 202 generates and sends a control signal to the DC voltage source Vdc to control a voltage amount output from the DC voltage source Vdc or generates and sends one or more disable signals to disable one or more of the power supplies of the HV charger 118 to modify, such as decrease, an amount of voltage of the voltage signal 134 output from the HV charger 118 or a combination thereof. The voltage amount of the voltage signal 134 increases with an increase in a number of the power supplies that are enabled and decreases with a decrease in the number of the power supplies that are disabled. The modification of the amount of voltage of the voltage signal 132 output from the DC voltage source Vdc modifies the amount of voltage of the voltage signal 134.

[0041] The voltage signal 134 is output from the HV charger 118 and is sent via the charger diode 106, the point 107, the resonant inductor 108, and the point 120 to the electrode of the plasma chamber 110 to charge a plasma load, such as the plasma chamber 110. The charger diode 106 is forward biased when the plasma chamber 110 is being charged. When one or more process gases, such as an oxygen containing gas or a fluorine containing gas or a combination thereof, are supplied to the plasma chamber 110 in conjunction with the supply of the voltage signal 134, plasma is generated or stricken within the plasma chamber 110. The plasma is used to process a substrate, such as a semiconductor wafer, placed on top of the ESC within the plasma chamber 110.

[0042] After the plasma load is charged during the fixed amount of dwell time, the charging diode 106 becomes reverse biased from being forward biased and the RF charger circuit 104 stops charging the plasma load. Also, after the fixed amount of dwell time, to operate the components 124, 126, and 128, the processor 202 generates and sends a set 212 of control signals via the connections CN1, CN2, and CNn to the switches SW1, SW2, and SWn to perform magnetic energy recovery of RF energy from the plasma chamber 110. For example, upon determining, based on measurement of the time by the clock source, that the fixed amount of dwell time is achieved, the processor 202 generates the set 212 of control signals and sends the set 212 via the connections CN1, CN2, and CNn to the switches SW1, SW2, and SWn. To illustrate, the processor 202 generates an on signal and sends the on signal via the connection CN1 to the switch SW1 to turn on the switch SW1, generates an on signal and sends the on signal via the connection CN2 to the switch SW2 to turn on the switch SW2, and generates an on signal and sends the on signal via the connection CNn to the switch SWn to turn on the switch SWn. An example of turning on a switch is to close the switch. When the switches SW1 through SWn are turned on, each diode D2 of the components 124, 126, and 128 acts as a short circuit and the RF energy 136 from the plasma chamber 110 is recovered via the diode 112 and thepoint 120 by the MMF 102. During energy recovery, diode 112 is forward biased to transfer the RF energy 136 from the plasma chamber 110 to the capacitor 116 via the MMF 102.

[0043] When the switch SW1 is closed, a portion of the RF energy 136 is stored in the inductor LI of the component 124. When the switches SW1 and SW2 are closed, a portion of the RF energy 136 is recovered from the plasma chamber 110 via the point 120 and the inductor LI of the component 124 to the inductor LI of the component 126 for storage within the inductor LI of the component 126. Also, when the switches SW1, SW2, and SWn are closed, a portion of the RF energy 136 is recovered from the plasma chamber 110 via the point 120, the inductor LI of the component 124 and the inductor LI of the component 126 to the inductor LI of the component 128 for storage within the inductor LI of the component 128.

[0044] The processor 202 controls the switches SW1, SW2, and SWn to open after being closed. For example, the processor 202 controls the switches SW1, SW2, and SWn to open within a predetermined range from a time at which the control signal 212 is sent to the switches SW1, SW2, and SWn. To control the switches SW1, SW2, and SWn to open, the processor 202 generates and sends another set 214 of control signals via the connections CN1, CN2, and CNn to the switches SW1, SW2, and SWn. For example, the processor 202 generates an off signal and sends the off signal via the connection CN1 to the switch SW1 to turn off the switch SW1, generates an off signal and sends the off signal via the connection CN2 to the switch SW2 to turn off the switch SW2, and generates an off signal and sends the off signal via the connection CNn to the switch SWn to turn off the switch SWn. An example of turning of a switch is to open the switch.

[0045] When the switches SW1 through SWn are turned off, e.g., open, each diode D2 of the components 124, 126, and 128 is forward biased and the RF energy 136 stored within the inductors LI of the components 124, 126, and 128 is sent from the inductors via the diode 103 to the RF charger circuit 104. For example, the portion of the RF energy 136 stored within the inductor LI of the component 124 is electromagnetically transferred from the inductor LI to the inductor L2 of the component 124, and is transferred from the inductor L2 of the component 126 via the diode DI of the component 124, the point 130, the point 131, the point 133, the diode 103, and the point 122 to the capacitor 116. The diode DI of the component 124 and the diode 103 are forward biased when the portion of the RF energy stored within the inductor LI of the component 124 is being transferred to the capacitor 116. The portion of the RF energy 136 stored within the inductor LI of the component 124 is transferred to the capacitor 116 to be stored in the capacitor 116.

[0046] Similarly, in the example, the portion of the RF energy 136 stored within the inductor LI of the component 126 is electromagnetically coupled from the inductor LI to theinductor L2 of the component 126, and is transferred from the inductor L2 of the component 126 via the diode DI of the component 126, the point 131, the point 133, the diode 103, and the point 122 to the capacitor 116. The diode DI of the component 126 and the diode 103 are forward biased when the portion of the RF energy stored within the inductor LI of the component 126 is being transferred to the capacitor 116. The portion of the RF energy 136 stored within the inductor LI of the component 126 is transferred to the capacitor 116 to be stored in the capacitor 116.

[0047] In the example, the portion of the RF energy 136 received from the inductor L2 of the component 126 is increased by the portion of the RF energy 136 received from the inductor L2 of the component 124 to output increased energy at the point 131, and the increased energy is transferred from the point 131 via the point 133 to the capacitor 116. To illustrate, the portion of the RF energy 136 received from the inductor L2 of the component 124 is added to the portion of the RF energy 136 received from the inductor L2 of the component 126 to output the increased energy.

[0048] Also, in the example, the portion of the RF energy 136 stored within the inductor LI of the component 128 is electromagnetically coupled from the inductor LI to the inductor L2 of the component 128, and is transferred via the diode DI of the component 128, the point 133, the diode 103, and the point 122 to the capacitor 116. The diode DI of the component 128 and the diode 103 are forward biased when the portion of the RF energy stored within the inductor LI of the component 128 is being transferred to the capacitor 116. The portion of the RF energy 136 stored within the inductor LI of the component 128 is transferred to the capacitor 116 to be stored in the capacitor 116. During the transfer of the RF energy from the plasma chamber 110 to the capacitor 116 via the MMF 102, the charging diode 106 remains reverse biased.

[0049] In the example, the portion of the RF energy 136 received from the inductor L2 of the component 128 is increased by the portion of the RF energy 136 received from the inductor L2 of the component 124 and the portion of the RF energy 136 received from the inductor L2 of the component 126 to output increased energy at the point 133, and the increased energy is transferred from the point 133 to the capacitor 116. To illustrate, the portion of the RF energy 136 received from the inductor L2 of the component 124 and the portion of the RF energy 136 received from the inductor L2 of the component 126 are added to the portion of the RF energy 136 received from the inductor L2 of the component 128 to output the increased energy. The magnetic energy recovery occurs during the cycle in which the RF charger circuit 104, the MMF 102, and the IFC 114 are controlled by the processor 202.

[0050] Once the RF energy 136 is stored in the capacitor 116, the diode 112 becomes reverse biased from being forward biased. When the diode 112 is reverse biased, the diode 112 acts as an open circuit and the RF energy 136 is no longer transferred from the plasma chamber 110 to the capacitor 116 via the MMF 102 to be recovered by the capacitor 116.

[0051] The processor 202 determines that the diode 112 is reverse biased and determines to operate the IFC 114 to control flux of ions of plasma within the plasma chamber 110. For example, a voltage and current sensor (not shown) is coupled to the point 120 and to the processor 202 to provide a measurement of a voltage at the point 120 to the processor 202. Upon receiving the measurement, the processor 202 determines that the measurement is less than a predetermined threshold to further determine that the diode 112 is reverse biased. The ion flux is controlled to achieve ion flux compensation. The ion flux compensation occurs during the cycle in which the RF charger circuit 104, the MMF 102, and the IFC 114 are controlled by the processor 202.

[0052] The processor 202 sends a control signal 216 via the connection system 208 to the IFC 114 to control the ion flux. The control signal 216 indicates an amount of current to the output from the pulser of the IFC 114. Upon receiving the control signal 216, the pulser of the IFC 114 outputs a current signal having the amount of current. The current signal is sent from the pulser via the RLD circuit of the IFC 114, the IFC diode 105, the point 107, the resonant inductor 108, and the point 120 to the electrode of the plasma chamber 110. When the current signal is received by the electrode of the plasma chamber 110, the ion flux within the plasma chamber 110 is controlled, such as tuned. The ion flux is tuned to increase or decrease the ion flux. A consecutive occurrence of the charging of the plasma load, the discharging of the plasma load to energize the capacitor 116, and the ion flux compensation completes the cycle of control of the RF charger circuit 104, the MMF, and the IFC 114 by the processor 202.

[0053] The processor 202 determines, based on the clock source, whether a predetermined time period of completion of the cycle has occurred since the generation of the one or more control signals 210. Upon determining that the predetermined time period of completion of the cycle has occurred, the processor 202 repeats another cycle of control of the RF charger circuit 104, the MMF, and the IFC 114. In this manner, multiple cycles of control of the RF charger circuit 104, the MMF, and the IFC 114 are executed by the processor 202.

[0054] During a next cycle of control of the RF charger circuit 104, the MMF, and the IFC 114, the RF energy stored within the capacitor 116 is used during the fixed amount of dwell time. For example, the RF energy stored within the capacitor 116 generates a voltage across the capacitor 116. The voltage generated across the capacitor 116 is provided in the form of a voltage signal that is supplied to the HV charger 118. The HV charger 118 modifies, such asincreases or decreases, the voltage of the voltage signal received from the capacitor 116 to output a voltage signal, which is supplied to the plasma chamber 110 via the charger diode 106, the resonant inductor LI, and the point 120.

[0055] In one embodiment, the MMF 102 includes any number of components, such as two components or four components or 10 components that are coupled to each other.

[0056] Figure 3 illustrates an embodiment of a graph 300 and an embodiment of a graph 302 to illustrate that although the switches SW1, SW2 and SWn can have different turn on times or different turn off times or a combination thereof, there is a substantially constant voltage drop across each of the components 224, 226, and 228 to achieve voltage balancing across the each of the components 224, 226, and 228. The graph 300 plots a voltage on a y-axis and a time t on an x-axis. Also, the graph 302 plots a voltage on a y-axis and the time t on an x- axis. The x-axis of both the graphs 300 and 302 is the same.

[0057] The graph 300 includes a plot 304 of turning on an off switch SW1, a plot 306 of turning on and off of the switch SW2, and a plot 308 of turning on and off of the switch SWn. As illustrated in the graph 300, the switch SW1 turns on at a time tl the switch SW1 receives one of the set 212 (Figure 2) of control signals, the switch SW2 turns on at a time t2 the switch SW2 receives another one of the set 212 of control signals, and the switch SWn turns on at a time tn the switch SWn receives yet another one of the set 212 of control signals. It should be noted that the time t2 is different from the time tl in that the time t2 occurs after the time tl and the time tn is different from the time t2 in that the time tn occurs after the time t2. As such, the switches SW1, SW2 and SWn turn on at different times.

[0058] A voltage drop VI across the component 124 occurs when the switch SW1 turns on. Similarly, a voltage drop V2 across the component 126 occurs when the switch SW2 turns on and a voltage drop Vn across the component 128 occurs when the switch SWn turns on. It should be noted that the voltage drops VI, V2, and Vn are substantially constant. For example, the voltage drops VI, V2, and Vn are substantially equal, such as equal or within a predetermined range from each other. The substantially constant voltage drops are achieved by coupling the capacitors Cl or combinations of the capacitors Cl and the resistors R1 of the components 124, 126, and 128 in parallel to multiple series circuits of the components 124, 126, and 128. Each of the series circuits of the components 124, 126, and 128 includes a parallel circuit that includes the diode D2 and a switch coupled in series with the inductor LI. For example, the series circuit of the component 124 includes a parallel circuit coupled in series with the inductor LI of the component 124. The parallel circuit of the component 124 includes the diode D2 of the component 124 and the switch SW1. As another example, the series circuit of the component 126 includes a parallel circuit coupled in series with the inductor LI of thecomponent 126. The parallel circuit of the component 126 includes the diode D2 of the component 126 and the switch SW2. As yet another example, the series circuit of the component 128 includes a parallel circuit coupled in series with the inductor LI of the component 128. The parallel circuit of the component 128 includes the diode D2 of the component 128 and the switch SWn.

[0059] When the switches SW1, SW2, and SWn are open, the capacitors Cl and inductors LI or the capacitors Cl, the resistors Rl, and the inductors LI of the components 124, 126, and 128 maintain a substantially constant voltage, such as a constant voltage or an equal voltage or a voltage within a predetermined range, across the switches SW1, SW2, and SWn of the components 124, 126, and 128. For example, when the switch SW1 is open, the capacitor Cl and inductor LI of the component 124 maintains, such as sustains or holds constant, a first voltage across the switch SW1 and the voltage is substantially constant compared to a second voltage and a third voltage. The second voltage is maintained by the capacitor Cl and inductor LI of the component 126 when the switch SW2 is open. In the example, the third voltage is maintained by the capacitor Cl and inductor LI of the component 128 when the switch SWn is open. To illustrate, each of the second voltage and the third voltage is within the predetermined range of 10% from the first voltage.

[0060] Regardless of the times at which the switches SW1, SW2, and SWn turn on, e.g., close, from being turned off, because the substantially constant voltage is maintained across the switches SW1, SW2, and SWn, a substantially constant voltage drop is achieved across the switches SW1, SW2, and SWn is achieved. For example, a voltage drop VI across the switch SW1 when the switch SW1 is turned on is substantially constant compared to a voltage drop V2 across the switch SW2 when the switch SW2 is turned on. Also, a voltage drop Vn across the switch SWn when the switch SWn is turned on is substantially constant compared to each of the voltage drops VI and V2. An example of two voltage drops that are substantially constant with respect to each other are reductions in voltages that are within a 10% range from each other. To illustrate, the voltage drop Vn is 10% from a value of the voltage drop VI and from a value of the voltage drop V2. All of the voltages across the switches SW1, SW2, and SWn drop, such as reduce, to a predetermined voltage, such as 0 volts, within a predetermined amount of time, such as within a time period between 0 and 0.1 microsecond, to achieve the substantially constant voltage drop. The voltages drop from the substantially constant voltage across the switches SW1, SW2, and SWn to achieve the voltage balancing. Voltage drops VI, V2, and Vn across the components 124, 126, and 128 are balanced, such as substantially constant, independent of times at which the switches SW1, SW2, and SW2 turn on, e.g., close.

[0061] Similarly, a first voltage rise across the component 124 occurs when the switch SW1 turns off. Similarly, a second voltage rise across the component 126 occurs when the switch SW2 turns off and a third voltage rise across the component 128 occurs when the switch SWn turns off. It should be noted that the first through third voltage rises are substantially constant. For example, the first through third voltage rises are substantially equal, such as equal or within a predetermined range from each other. The substantially constant voltage rises are achieved by coupling the capacitors Cl or the combinations of the capacitors Cl and the resistors R1 of the components 124, 126, and 128 in parallel to multiple series circuits of the components 124, 126, and 128. Each of the series circuits includes a parallel circuit that includes the diode D2 and a switch coupled in series with the inductor LI.

[0062] When the switches SW1, SW2, and SWn are closed, the capacitors Cl and inductors LI or the capacitors Cl, the resistors Rl, and the inductors LI of the components 124, 126, and 128 maintain a substantially constant voltage, such as a constant voltage or an equal voltage or a voltage within a predetermined range, across the switches SW1, SW2, and SWn of the components 124, 126, and 128. For example, when the switch SW1 is closed, the capacitor Cl and inductor LI of the component 124 maintains, such as sustains or holds constant, a fourth voltage across the switch SW1 and the voltage is substantially constant compared to a fifth voltage and a sixth voltage. The fifth voltage is maintained by the capacitor Cl and inductor LI of the component 126 when the switch SW2 is closed. In the example, the sixth voltage is maintained by the capacitor Cl and inductor LI of the component 128 when the switch SWn is closed. To illustrate, each of the fifth voltage and the sixth voltage is within the predetermined range of 10% from the fourth voltage.

[0063] Regardless of the times at which the switches SW1, SW2, and SWn turn off, e.g., open, from being turned on, because the substantially constant voltage is maintained across the switches SW1, SW2, and SWn, a substantially constant voltage rise across the switches SW1, SW2, and SWn is achieved. For example, the first voltage rise across the switch SW1 when the switch SW1 is turned off is substantially constant compared to the second voltage rise across the switch SW2 when the switch SW2 is turned off. Also, the third voltage rise across the switch SWn when the switch SWn is turned off is substantially constant compared to each of the first and second voltage rises. An example of two voltage rises that are substantially constant with respect to each other are increase in voltages that are within a 10% range from each other. To illustrate, the third voltage rise is 10% from a value of the first voltage rise and from a value of the second voltage rise. All of the voltages across the switches SW1, SW2, and SWn rise, such as increase, to a preset voltage, such as 4.5 kilovolts, within a predetermined amount of time, such as within a time period between 0 and 0.1 microsecond, to achieve the substantiallyconstant voltage rise. The voltages rise from the substantially constant voltage across the switches SW1, SW2, and SWn to achieve the voltage balancing. The first through third voltage rises across the components 124, 126, and 128 are balanced, such as substantially constant, independent of times at which the switches SW1, SW2, and SW2 turn off, e.g., open.

[0064] A substantially constant voltage, such as 0 volts or 4.5 kilovolts, is maintained across the switches SW1, SW2, and SWn by the capacitors Cl and inductors LI of the components 124, 126, and 128 or a combination of the capacitors Cl, the inductors LI, and the resistors R1 of the components 124, 126, and 128. For example, a voltage across the switch SW1 is within a predetermined range, such as 10%, from a voltage across the switch SW2 and a voltage across the switch SWn.

[0065] Figure 4 is a diagram of an embodiment of a system 400 to illustrate an HV switch system 402. The system 400 includes an HV power supply 404, the HV switch system 402, an energy storage circuit 406, and a plasma load 408. An example of the HV power supply 404 is the RF charger circuit 104 (Figure 1) and an example of the plasma load 408 is the plasma chamber 110 (Figure 1). The energy storage circuit 406 includes a capacitor 410.

[0066] The HV power supply 404 is coupled in series to a node A of the HV switch system 402. A node B of the switch system 402 is coupled to a parallel circuit of the capacitor 410 and the plasma load 408. When the HV switch system 402 is closed, such as on, an RF signal 412 supplied from the HV power supply 404 is sent via the HV switch system 402 to the plasma load 408 to provide RF energy to the plasma load 408. On the other hand, when the HV switch system 402 is open, such as off, the RF signal 412 supplied from the HV power supply 404 is not sent via the HV switch system 402 to the plasma load 408 and RF energy is not provided to the plasma load 408.

[0067] Figure 5A is a diagram of an embodiment of a system 500 to illustrate use of the MMF 102 as an HV switch. The system 500 includes an MMF switch 502 and a DC power supply 504. An example of the DC power supply 504 is the RF charger circuit 104 (Figure 1). The MMF switch 502 is an example of the HV switch system 402 (Figure 4).

[0068] The MMF switch 502 includes components 506, 508, and 510. The components 506, 508, and 510 have the same structure as that of the components 124, 126, and 128 except that the components 506, 508, and 510 include diodes D3. For example, the component 506 has the same structure as that of the component 124 except that the component 506 includes the diode D3, the component 508 has the same structure as that of the component 126 except that the component 508 includes the diode D3, and the component 510 has the same structure as that of the component 128 except that the component 510 includes the diode D3. In the example, the component 506 includes the series circuit in which the inductor LI is coupledin series with a parallel circuit having the switch SW1 and the diode D2. The diode D3 of the component 506 is coupled in series with the series circuit of the component 506 to form another series circuit, which is coupled in parallel to the capacitor Cl and the resistor R1 of the component 506 to form a parallel circuit between points 512 and 514 of the component 506. In the example, the component 508 includes the series circuit in which the inductor LI is coupled in series with a parallel circuit having the switch SW2 and the diode D2. The diode D3 of the component 508 is coupled in series with the series circuit of the component 508 to form another series circuit, which is coupled in parallel to the capacitor Cl and the resistor R1 of the component 508 to form a parallel circuit between points 516 and 518 of the component 508. Further, in the example, the component 510 includes the series circuit in which the inductor LI is coupled in series with a parallel circuit having the switch SW2 and the diode D2. The diode D3 of the component 510 is coupled in series with the series circuit of the component 508 to form another series circuit, which is coupled in parallel to the capacitor Cl and the resistor R1 of the component 510 to form a parallel circuit between points 520 and 522 of the component 510. The diodes DI of the components 506, 508, and 510 are coupled via the point 130, which is coupled to the DC supply 504. The node A of the MMF switch 102 is coupled to the point 512. Also, the node B of the MMF switch 102 is coupled to the point 522.

[0069] The component 506 is connected in series with the component 508, which is connected in series with the component 510. For example, the point 514 of the component 506 is connected in series to the point 516 of the component 508, and the point 518 of the component 508 is connected in series to the point 520 of the component 510.

[0070] Upon receiving the RF signal 412 at the point 512 from the HV power supply 404, when the switches SW1 through SWn are closed under control of the processor 202 (Figure 2), some RF energy of the RF signal 412 is transferred via the point 512, the diode D3 of the component 506, the inductor LI of the component 506, the switch SW1, the point 514, the point 516, the diode D3 of the component 508, the inductor LI of the component 508, the switch SW2, the point 518, the point 520, the diode D3 of the component 510, the inductor LI of the component 510, the switch SWn, and the point 522 to the node B. Some of the RF energy of the RF signal 412 is supplied from the node B to the plasma load 408 (Figure 4). Also, when the switches SW 1 through SWn are closed, the diodes D3 are forward biased and the diodes D2 act as short circuits.

[0071] Moreover, during a time period in which the switches SW1 through SW3 of the components 506 through 510 are closed, some RF energy of the RF signal 412 is stored within the inductors LI of the components 506 through 510 in the same manner in which the RF energy 136 (Figure 1) is stored in the inductors LI of the components 124 through 128. Forexample, when the switches SW1 through SW3 of the components 506 through 510 are closed, some RF energy of the RF signal 412 received from the node A via the point 512 and the diode D3 of the component 506, is stored within the inductor LI of the component 506. Some RF energy of the RF signal 412 is transferred from the inductor LI of the component 506 via the switch SW1 of the component 506, the point 514, the point 516, and the diode D3 of the component 508, to the inductor LI of the component 508 for storage within the inductor LI of the component 508. Also, some RF energy of the RF signal 412 is transferred from the inductor LI of the component 508 via the switch SW2 of the component 508, the point 518, the point 520, and the diode D3 of the component 510, to the inductor LI of the component 510 for storage within the inductor LI of the component 510.

[0072] On the other hand, when the switches SW1, SW2, and SWn are open under control of the processor 202, RF energy of the RF signal 412 stored within the inductor LI of the component 506 is not transferred from the inductor LI of the component 506 to the point 514, RF energy of the RF signal 412 stored within the inductor LI of the component 508 is not transferred from the inductor LI of the component 508 to the point 518, and RF energy of the RF signal 412 stored within the inductor LI of the component 510 is not transferred from the inductor LI of the component 510 to the point 522. As such, no RF energy of the RF signal 412 is transferred from the node A to the node B when the switches SW1, SW2, and SWn are open.

[0073] Rather, during a time period in which the switch SW1 is open, some RF energy of the RF signal 412 stored in the inductor LI of the component 506 is electromagnetically coupled from the inductor LI to the inductor L2 the component 506. The RF energy is then transferred from the inductor L2 of the component 506 via the diode DI, which is forward biased, and the points 130, 131, and 133 to the DC supply 504. Also, during a time period in which the switch SW2 is open, some RF energy of the RF signal 412 stored in the inductor LI of the component 508 is electromagnetically coupled from the inductor LI of the component 508 to the inductor L2 of the component 508. The RF energy is then transferred from the inductor L2 of the component 508 via the diode DI, which is forward biased, and the points 131 and 133 to the DC supply 504. Moreover, during a time period in which the switch SWn is open, some RF energy of the RF signal 412 stored in the inductor LI of the component 510 is electromagnetically coupled from the inductor LI of the component 510 to the inductor L2 the component 510. The RF energy is then transferred from the inductor L2 of the component 510 via the diode DI, which is forward biased, and the point 133 to the DC supply 504. When the DC supply 504 receives some RF energy of the RF signal 412, a capacitor, such as the capacitor 116 (Figure 1), of the DC supply 504 stores the RF energy.

[0074] It should be noted that voltage balancing is achieved across the components 506, 508, and 510 in the same manner in which the voltage balancing is achieved across the components 124, 126, and 128. For example, independent of times at which the switches SW1 through SWn turn on or off, a voltage drop or a voltage rise across each of the switches SW1 through SWn and therefore across each of the components 506, 508, and 510 is substantially constant. By combining operations of the switches SW 1 through SWn, each of which operates based on a low voltage, and by coupling the components 506, 508, and 510, the MMF switch 502 operates as an HV switch.

[0075] In one embodiment, the MMF switch 502 includes any number of components, such as four components or six components for 10 components.

[0076] Figure 5B is a diagram of an embodiment of a modular resonance switch (MRS) 550 to enable or disable a transfer of the RF signal 412 from the node A to the node B. The MRS 550 is an example of the switch system 402 (Figure 4). The MRS 550 includes a component 552, a component 554, and a component 556.

[0077] The components 552, 554, and 556 have the same structure as that of the components 506, 508, and 510 (Figure 5A) except that each component 552, 554, and 556 excludes the diode DI, the inductor L2, and the diode D3. For example, the component 552 has the same structure as that of the component 506 except that the component 552 excludes the diode DI and the inductor L2, the component 554 has the same structure as that of the component 508 except that the component 554 excludes the diode DI and the inductor L2, and the component 556 has the same structure as that of the component 510 except that the component 558 excludes the diode DI and the inductor L2. In the example, the component 552 includes the diode D3, the inductor LI, the switch SW1, the diode D2, the capacitor Cl, and the resistor Rl. A parallel circuit of the switch SW1 and the diode D2 is in series with the inductor LI and the diode D3 to form a series circuit. The series circuit of the component 552 is in parallel with the capacitor Cl and the resistor Rl to form a parallel circuit between a point 558 of the component 552 and a point 560 of the component 552. Similarly, in the example, the component 554 includes the diode D3, the inductor LI, the switch SW2, the diode D2, the capacitor Cl, and the resistor RL A parallel circuit of the switch SW2 and the diode D2 is in series with the inductor LI and the diode D3 to form a series circuit. The series circuit of the component 554 is in parallel with the capacitor Cl and the resistor Rl to form a parallel circuit between a point 562 of the component 554 and a point 564 of the component 554. Also, in the example, the component 556 includes the diode D3, the inductor LI, the switch SWn, the diode D2, the capacitor Cl, and the resistor RL A parallel circuit of the switch SWn and the diode D2 is in series with the inductor LI and the diode D3 to form a series circuit. The series circuit ofthe component 556 is in parallel with the capacitor Cl and the resistor R1 to form a parallel circuit between a point 566 of the component 552 and a point 568 of the component 556.

[0078] The node A is coupled to the point 558. The point 558 is coupled to the point 560 via the capacitor Cl of the component 552, the point 560 is coupled to the point 562, the point 562 is coupled to the point 564 via the capacitor Cl of the component 554, the point 564 is coupled to the point 566, and the point 566 is coupled to the point 568 via the capacitor Cl of the component 556. The point 568 is coupled to the node B.

[0079] The component 552 is connected in series with the component 554, which is connected in series with the component 556. For example, the point 560 is connected in series to the point 562, and the point 564 is connected in series to the point 566.

[0080] When the switches SW1, SW2, and SWn are closed under control of the processor 202 (Figure 2), RF energy of the RF signal 412 is transferred from the node A via the point 558, the inductor LI of the component 552, the switch SW1, the point 560, the point 562, the inductor LI of the component 554, the switch SW2, the point 564, the point 566, the inductor LI of the component 556, the switch SWn, and the point 568 to the node B. Also, when the switches SW1, SW2, and SWn are closed, the diodes D2 of the components 552, 554, and 556 acts like short circuits.

[0081] Also, when the switches SW1, SW2, and SWn are closed, RF energy of the RF signal 412 stored in the inductor LI of the component 552 is transferred from the inductor LI of the component 552, via the switch SW1 and the points 560 and 562 to the inductor LI of the component 554. The RF energy received via the point 562 by the inductor LI of the component 554 is combined, such as added, with RF energy stored within the inductor LI of the component 554 to output combined RF energy and the combined RF energy is transferred from the inductor LI of the component 554 via the switch SW2 and the points 564 and 566 to the inductor LI of the component 556. The RF energy received via the point 566 by the inductor LI of the component 556 is combined, such as added, with RF energy stored within the inductor LI of the component 556 to output additional combined RF energy and the additional combined RF energy is transferred from the inductor LI of the component 556 via the switch SWn and the point 568 to the node B.

[0082] On the other hand, when one or more of the switches SW1, SW2, and SWn is open under control of the processor 202 (Figure 2), the RF energy of the RF signal 412 is not transferred from the node A via the point 558, the inductor LI of the component 552, the switch SW1, the point 560, the point 562, the inductor LI of the component 554, the switch SW2, the point 564, the point 566, the inductor LI of the component 556, the switch SWn, and the point 568 to the node B. Also, when the switches SW1, SW2, and SWn are open, the diodes D2 of thecomponents 552, 554, and 556 are forward biased, and RF energy of the RF signal 412 is stored via the point 558 in the inductor LI of the component 552. In addition, when the switches SW1, SW2, and SWn are open, RF energy of the RF signal 412 is stored in the inductor LI of the component 554 via the point 558, the parallel circuit of the capacitor Cl and the resistor R1 of the component 552, and the points 560 and 562. Also, when the switches SW1, SW2, and SWn are open, RF energy of the RF signal 412 is stored in the inductor LI of the component 556 via the point 558, the parallel circuit of the capacitor Cl and the resistor R1 of the component 552, the points 560 and 562, the parallel circuit of the capacitor Cl and the resistor R1 of the component 554, and the points 564 and 566.

[0083] It should be noted that voltage balancing is achieved across the components 552, 554, and 556 in the same manner in which the voltage balancing is achieved across the components 124, 126, and 128 (Figure 1). For example, independent of times at which the switches SW1 through SWn turn on or off, a voltage drop or a voltage rise across each of the switches SW1 through SWn and therefore across each of the components 552, 554, and 556 is substantially constant. By combining operations of the switches SW1 through SWn, each of which operates based on a low voltage, and by coupling the components 552, 554, and 556, the MRS 550 operates as an HV switch.

[0084] In an embodiment, the MRS 550 includes any number of components, such as four components or six components for 10 components.

[0085] It should be noted that although the above embodiments are described with reference to RF energy, the embodiments equally applicable to RF power. For example, instead of the RF energy 136, RF power is received from the plasma chamber 110 by the diode 112 via the point 120 (Figure 1).

[0086] In an embodiment, a point is sometimes referred to herein as a node.

[0087] Embodiments described herein may be practiced with various computer system configurations including hand-held hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers and the like. The embodiments can also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a network.

[0088] In some embodiments, a controller, described herein, is a part of a system, which may be part of the above-described examples. Such systems include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems are integrated with electronics for controlling their operationbefore, during, and after processing of a semiconductor wafer or substrate. The electronics is referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, is programmed to control any of the processes disclosed herein, including the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks coupled to or interfaced with a system.

[0089] Broadly speaking, in a variety of embodiments, the controller is defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs, PLDs, and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). The program instructions are instructions communicated to the controller in the form of various individual settings (or program files), defining the parameters, the factors, the variables, etc., for carrying out a particular process on or for a semiconductor wafer or to a system. The program instructions are, in some embodiments, a part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0090] The controller, in some embodiments, is a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller is in a “cloud” or all or a part of a fab host computer, which allows for remote access of the wafer processing. The computer enables remote access to the system to monitor current progress of fabrication operations, examines a history of past fabrication operations, examines trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.

[0091] In some embodiments, a remote computer (e.g. a server) provides process recipes to a system over a network, which includes a local network or the Internet. The remote computer includes a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify the parameters, factors, and / or variables for each of the processing steps to be performed during one or moreoperations. It should be understood that the parameters, factors, and / or variables are specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller is distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes includes one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0092] Without limitation, in various embodiments, example systems to which the methods are applied include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that is associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0093] It is further noted that in some embodiments, the above-described operations apply to several types of plasma reactor chambers, e.g., a plasma chamber including an inductively coupled plasma (ICP) reactor, a capacitively coupled plasma (CCP) reactor, a transformer coupled plasma reactor, conductor tools, dielectric tools, a plasma chamber including an electron cyclotron resonance (ECR) reactor, etc. For example, one or more RF generators are coupled to an inductor within the ICP reactor. Examples of a shape of the inductor include a solenoid, a dome-shaped coil, a flat-shaped coil, etc.

[0094] As noted above, depending on the process step or steps to be performed by the tool, the host computer communicates with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

[0095] With the above embodiments in mind, it should be understood that some of the embodiments employ various computer-implemented operations involving data stored in computer systems. These operations are those physically manipulating physical quantities. Any of the operations described herein that form part of the embodiments are useful machine operations.

[0096] Some of the embodiments also relate to a hardware unit or an apparatus for performing these operations. The apparatus is specially constructed for a special purpose computer. When defined as a special purpose computer, the computer performs other processing, program execution or routines that are not part of the special purpose, while still being capable of operating for the special purpose.

[0097] In some embodiments, the operations may be processed by a computer selectively activated or configured by one or more computer programs stored in a computer memory, cache, or obtained over the computer network. When data is obtained over the computer network, the data may be processed by other computers on the computer network, e.g., a cloud of computing resources.

[0098] One or more embodiments can also be fabricated as computer-readable code on a non-transitory computer-readable medium. The non-transitory computer-readable medium is any data storage hardware unit, e.g., a memory device, etc., that stores data, which is thereafter be read by a computer system. Examples of the non-transitory computer-readable medium include hard drives, network attached storage (NAS), read-only memory (ROM), random access memory (RAM), compact disc-ROMs (CD-ROMs), CD-recordables (CD-Rs), CD-rewritables (CD-RWs), magnetic tapes and other optical and non-optical data storage hardware units. In some embodiments, the non-transitory computer-readable medium includes a computer-readable tangible medium distributed over a network-coupled computer system so that the computer- readable code is stored and executed in a distributed fashion.

[0099] Although the method operations above were described in a specific order, it should be understood that in various embodiments, other housekeeping operations are performed in between operations, or the method operations are adjusted so that they occur at slightly different times, or are distributed in a system which allows the occurrence of the method operations at various intervals, or are performed in a different order than that described above.

[0100] It should further be noted that in an embodiment, one or more features from any embodiment described above are combined with one or more features of any other embodiment without departing from a scope described in various embodiments described in the present disclosure.

[0101] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

Claims

IN THE CLAIMS1. A magnetic energy recovery system comprising: a first circuit having: a primary inductor; a secondary inductor electromagnetically coupled to the primary inductor; a diode; a switch coupled in parallel to the diode to form a parallel circuit, wherein the parallel circuit is coupled in series with the primary inductor, wherein the switch is configured to operate to facilitate storage, within the primary inductor, radio frequency energy recovered from a plasma chamber, wherein the switch is configured to operate to facilitate a transfer of the radio frequency energy from the primary inductor via the secondary inductor to an energy storage circuit.

2. The magnetic energy recovery system of claim 1, wherein the first circuit has a first output, wherein the magnetic energy recovery system comprises: a second circuit having a second output, wherein the second output is coupled to the first output to increase an amount of the radio frequency energy transferred from the first circuit to the energy storage circuit.

3. The magnetic energy recovery system of claim 1, comprising: a second circuit having: a primary inductor; a secondary inductor configured to be electromagnetically coupled to the primary inductor of the second circuit; a diode; a switch coupled in parallel to the diode of the second circuit to form a parallel circuit, wherein the parallel circuit of the second circuit is coupled in series with the primary inductor of the second circuit, wherein the switch of the second circuit is configured to operate to facilitate storage, within the primary inductor of the second circuit, radio frequency energy recovered from the plasma chamber, wherein the switch is configured to operate to facilitate a transfer of the radio frequency energy from the primary inductor of the second circuit via the secondary inductor of the second circuit to the energy storage circuit.

4. The magnetic energy recovery system of claim 3, wherein the capacitor and the first inductor of the first circuit are configured to maintain a voltage across the switch of the first circuit, wherein the capacitor and the first inductor of the second circuit are configured to maintain a voltage across the switch of the second circuit, wherein the voltage across the switch of the first circuit is within a predetermined range from the voltage across the switch of the second circuit, wherein the switch of the first circuit is configured to turn on at a first time and the switch of the second circuit is configured to turn on at a second time different from the first time, wherein when the switches of the first and second circuits are turned on, the voltages across the switches of the first and second circuits reduce to a predetermined voltage within a predetermined amount of time to achieve voltage balancing between the first and second circuits.

5. The magnetic energy recovery system of claim 3, wherein the first circuit includes a diode, wherein the secondary inductor of the first circuit is coupled in series with the diode.

6. The magnetic energy recovery system of claim 5, wherein the second circuit includes a diode, wherein the secondary inductor of the second circuit is coupled in series with the diode of the second circuit.

7. The magnetic energy recovery system of claim 6, wherein the diode of the first circuit is coupled to the diode of the second circuit.

8. The magnetic energy recovery system of claim 7, wherein the diode of the second circuit is configured to be coupled to a radio frequency charger circuit.

9. The magnetic energy recovery system of claim 1, wherein the first circuit is configured to operate after a dwell time during which radio frequency power is provided to a plasma chamber.

10. The magnetic energy recovery system of claim 1, wherein the primary and secondary inductors form a transformer.

11. The magnetic energy recovery system of claim 1, wherein the parallel circuit is coupled in series with the primary inductor to form a series circuit.

12. The magnetic energy recovery system of claim 7, wherein the series circuit is coupled in parallel to a capacitor.

13. The magnetic energy recovery system of claim 12, wherein the series circuit is coupled in parallel to a resistor.

14. A switch system comprising: a first circuit having: a primary inductor;a secondary inductor electromagnetically coupled to the primary inductor; a diode; a switch coupled in parallel to the diode to form a parallel circuit, wherein the parallel circuit is coupled in series with the primary inductor, wherein the switch is configured to operate to facilitate storage, within the primary inductor, radio frequency energy received from a voltage source, wherein the switch is configured to operate to facilitate a transfer of radio frequency energy from the primary inductor to a load and a transfer of radio frequency energy from the primary inductor via the secondary inductor to an energy storage circuit.

15. The switch system of claim 14, comprising: a second circuit coupled to the first circuit, wherein the second circuit includes: a primary inductor; a secondary inductor configured to be electromagnetically coupled to the primary inductor of the second circuit; a diode; a switch coupled in parallel to the diode of the second circuit to form a parallel circuit, wherein the parallel circuit of the second circuit is coupled in series with the primary inductor of the second circuit, wherein the switch of the second circuit is configured to operate to facilitate storage, within the primary inductor of the second circuit, radio frequency energy received from the voltage source, wherein the switch of the second circuit is configured to operate to facilitate a transfer of radio frequency energy from the primary inductor of the second circuit to the load and a transfer of radio frequency energy from the primary inductor of the second circuit via the secondary inductor of the second circuit to the energy storage circuit.

16. The switch system of claim 15, wherein the first circuit includes a diode, wherein the secondary inductor of the first circuit is coupled in series with the diode.

17. The switch system of claim 16, wherein the second circuit includes a diode, wherein the secondary inductor of the second circuit is coupled in series with the diode of the second circuit.

18. The switch system of claim 17, wherein the diode of the first circuit is coupled to the diode of the second circuit.

19. A switch system comprising: a first circuit having:an inductor; a first diode; a second diode; a switch coupled in parallel to the first diode to form a parallel circuit, wherein the parallel circuit is coupled in series with the inductor and the second diode, wherein the switch is configured to operate to facilitate storage of radio frequency energy within the inductor, and wherein the switch is configured to operate to facilitate a transfer of radio frequency energy from the inductor to a load.

20. The system of claim 19, comprising: a second circuit coupled to the first circuit, wherein the second circuit includes: an inductor; a first diode; a second diode; a switch coupled in parallel to the first diode of the second circuit to form a parallel circuit, wherein the parallel circuit of the second circuit is coupled in series with the inductor of the second circuit and the second diode of the second circuit, wherein the switch of the second circuit is configured to operate to facilitate storage of radio frequency energy within the inductor of the second circuit, and wherein the switch of the second circuit is configured to operate to facilitate a transfer of radio frequency energy from the inductor of the second circuit to the load.

Images