Package structure and power conversion device

By providing the first bonding member in the package structure, the parasitic inductance between the common cathode diode chips is reduced, and the electromagnetic compatibility oscillation problem caused by the common cathode diode in the power conversion device is solved, and the performance and reliability of the device are improved.

WO2025130925A1PCT designated stage expired Publication Date: 2025-06-26HUAWEI TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/140316
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-22
Filing Date
2024-12-18
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

The common cathode diode has a potential jump due to frequent conduction and shutdown in the power conversion device, causing electromagnetic compatibility (EMC) oscillation problems.

Method used

A package structure is designed, by providing a first bonding member in the package structure, the second electrodes of the first diode chip and the second diode chip are connected by bonding, reducing parasitic inductance, thereby suppressing voltage oscillation.

Benefits of technology

It effectively eliminates the electromagnetic compatibility oscillation problem in the package structure, improves the performance of the power conversion device, and ensures the safety and reliability of the package structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a package structure and a power conversion device. The package structure comprises: a lead frame, a first diode chip, a second diode chip, a first bonding member, and a plastic package, wherein the first diode chip and the second diode chip are each provided with a first electrode and a second electrode; the first electrode of the first diode chip and the first electrode of the second diode chip are both welded to the surface of the lead frame; the first electrode of the first diode chip and the first electrode of the second diode chip are electrically connected by means of the lead frame. The second electrode of the first diode chip and the second electrode of the second diode chip are bonded and connected by means of the first bonding member; the plastic package wraps the first diode chip, the second diode chip, and the first bonding member. The present application reduces parasitic inductance between the second electrode of the first diode chip and the second electrode of the second diode chip, thereby inhibiting the amplitude of voltage oscillation between the second electrode of the first diode chip and the second electrode of the second diode chip, and eliminating the electromagnetic compatibility oscillation problem.
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Description

Packaging structure and power conversion device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of the People's Republic of China on December 22, 2023, with application number 202311779185.6 and application name "A packaging structure and power conversion device", the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of power conversion technology, and in particular to a packaging structure and a power conversion device. Background Art

[0004] Common-cathode diodes are commonly used in power converters and are typically electrically connected to switching devices. During power converter operation, the frequent on-and-off switching of the switching devices can cause potential jumps across the common-cathode diodes, leading to electromagnetic compatibility (EMC) oscillation issues. Summary of the Invention

[0005] The embodiments of the present application provide a packaging structure and a power conversion device to eliminate the electromagnetic compatibility oscillation problem of the packaging structure.

[0006] In a first aspect, an embodiment of the present application provides a packaging structure, and the packaging structure provided by the embodiment of the present application may include: a lead frame, a first diode chip, a second diode chip, a first bonding part, and a plastic package. The first diode chip and the second diode chip are both located on the lead frame. The first diode chip and the second diode chip both have a first electrode and a second electrode. In the embodiment of the present application, the first electrode is the anode of the diode chip, and the second electrode is the cathode of the diode chip; or, the first electrode is the cathode of the diode chip, and the second electrode is the anode of the diode chip. The first electrode of the first diode chip and the first electrode of the second diode chip are both welded to the surface of the lead frame. The lead frame includes a conductive material. For example, the lead frame may include metal materials such as copper, iron, and aluminum. The first electrode of the first diode chip is electrically connected to the first electrode of the second diode chip through the lead frame. The second electrode of the first diode chip is bonded to the second electrode of the second diode chip through the first bonding part. The plastic package wraps the first diode chip, the second diode chip, and the first bonding part.

[0007] In the packaging structure provided in the embodiment of the present application, the first electrode of the first diode chip is electrically connected to the first electrode of the second diode chip through a lead frame, and the first electrode can be the cathode or anode of the diode. Therefore, the packaging structure provided in the embodiment of the present application can be a common cathode diode packaging structure, or it can also be a common anode diode packaging structure. In the embodiment of the present application, by setting a first bonding part in the packaging structure, the second electrode of the first diode chip and the second electrode of the second diode chip can be bonded and connected through the first bonding part. In this way, the parasitic inductance between the second electrodes of the first diode chip and the second diode chip can be reduced, thereby suppressing the amplitude of the voltage oscillation between the second electrodes of the first diode chip and the second diode chip, and eliminating the electromagnetic compatibility oscillation problem. In addition, the second electrode of the first diode chip and the second electrode of the second diode chip are bonded and connected through the first bonding part, which will not affect the connection relationship between the first diode chip and the second diode chip and other components, and will not affect the overall performance of the packaging structure.

[0008] In addition, the plastic package wraps the first diode chip, the second diode chip and the first bonding piece, and the package can play a role in protecting and fixing each component. The first bonding piece is encapsulated inside the plastic package, so that the first bonding piece is not exposed to the outside of the package structure, and electrical safety and reliability problems are not caused, thereby ensuring that the safety and reliability of the package structure are high. The first bonding piece in the embodiment of the present application can be a bonding wire, a strip structure or a sheet structure, etc. For example, the strip structure can be an aluminum ribbon (ribbon), and the sheet structure can be a copper sheet (clip). For example, the first bonding piece can include metal materials such as copper, aluminum, gold, and silver, or the first bonding piece can also include other conductive materials. During the manufacturing process, the first bonding piece can be made by a bonding process or other processes, which is easy to be compatible with the manufacturing process of other components in the package structure. For example, the first bonding wire can be made during the wire bond process in the front of line (FOL) packaging process. The feasibility and stability of the manufacturing process are high, and the manufacturing cost is low, with high manufacturability and supplyability.

[0009] In an embodiment of the present application, a first diode chip and a second diode chip are provided in the packaging structure, and the first diode chip and the second diode chip are arranged in parallel. That is, two diode chips arranged in parallel are provided in the packaging structure. In a specific implementation, more diode chips arranged in parallel can be provided in the packaging structure. Alternatively, other electronic components can be provided in the packaging structure, and can be arranged according to actual needs. The packaging structure in the embodiment of the present application can adopt a transistor outline (TO) shell, or the packaging structure can also adopt other packaging forms.

[0010] In an embodiment of the present application, the first electrode of the first diode chip may be located on the lower surface of the first diode chip, and the second electrode of the first diode chip may be located on the upper surface of the first diode chip. The first electrode of the second diode chip may be located on the lower surface of the second diode chip, and the second electrode of the second diode chip may be located on the upper surface of the second diode chip. Wherein, the upper surface of the first diode chip (or the second diode chip) is the surface of the first diode chip (or the second diode chip) facing away from the lead frame, and the lower surface is the surface of the first diode chip (or the second diode chip) close to the lead frame. In an embodiment of the present application, the first electrode and the second electrode of the first diode chip (or the second diode chip) are respectively arranged on the lower surface and the upper surface, which is convenient for achieving electrical connection with other components. Moreover, the first electrodes of the first diode chip and the second diode chip are located on the surface of the same side, and the second electrodes are located on the surface of the same side, which is convenient for electrically connecting the first electrodes of the first diode chip and the second diode chip, and electrically connecting the second electrodes of the first diode chip and the second diode chip. Since the lead frame in the embodiment of the present application includes a conductive material, when the first diode chip and the second diode chip are mounted to the corresponding positions on the surface of the lead frame, the electrical connection of the first electrodes of the first diode chip and the second diode chip can be achieved. By overlapping the first bonding component on the upper surfaces of the first diode chip and the second diode chip, electrical connection between the second electrodes of the first diode chip and the second diode chip can be achieved through the first bonding component.

[0011] Of course, in some cases, the first electrode and the second electrode of the first diode chip (or the second diode chip) can also be set on the surface of the same side. For example, the first electrode and the second electrode of the first diode chip (or the second diode chip) can be set at different positions on the upper surface, and electrical connection with other components can also be achieved. It can be set according to the spatial layout of the packaging structure.

[0012] In some embodiments of the present application, the second electrodes of the first diode chip and the second diode chip can be electrically connected to different pins, respectively. The lead frame can include: a separately arranged carrier board, a first pin, and a second pin. The first diode chip and the second diode chip are positioned on the carrier board, which can provide support and heat dissipation. The first electrode of the first diode chip and the first electrode of the second diode chip are both soldered to the surface of the carrier board. The second electrode of the first diode chip is electrically connected to the first pin, and the second electrode of the second diode chip is electrically connected to the second pin. The first pin and the second pin can serve as signal connections, and the package structure can be electrically connected to other components via the first and second pins. In a specific implementation, a portion of the first pin is encapsulated by the plastic encapsulation, while another portion is exposed outside the plastic encapsulation. A portion of the second pin is encapsulated by the plastic encapsulation, while another portion is exposed outside the plastic encapsulation. For example, if the first and second pins are elongated, the plastic encapsulation can encapsulate most of the first and second pins, leaving the ends of the first and second pins exposed, facilitating electrical connection of the package structure to other components via the first and second pins. Of course, in some cases, the plastic encapsulation can completely encapsulate the first and second pins, and other connecting components can be used to lead the first and second pins out.

[0013] In one possible implementation, the packaging structure in the embodiment of the present application may further include: a second bonding member and a third bonding member, wherein the plastic encapsulation body encapsulates the second and third bonding members. The second electrode of the first diode chip is bonded to the first pin via the second bonding member, and the second electrode of the second diode chip is bonded to the second pin via the third bonding member. In a specific implementation, the widths of the first, second, and third bonding members may be substantially the same. For example, the first, second, and third bonding members may all be bonding wires. During the manufacturing process, high-purity metal bonding wires may be used to manufacture the first, second, and third bonding wires. For example, bonding wires made of metal materials such as copper, aluminum, gold, and silver may be used. Of course, in some cases, other conductive materials may also be used to manufacture the first, second, and third bonding wires. During the manufacturing process, the first bonding wire may be manufactured using a wire bonding process. To improve manufacturing efficiency, the first, second, and third bonding wires may be manufactured using the same bonding process.

[0014] In another possible implementation, the width of the first bonding element may be greater than the widths of the second and third bonding elements. For example, the first bonding element may be a strip structure, such as an aluminum ribbon, and the second and third bonding elements may be bonding wires.

[0015] Of course, in some cases, other bonding methods may also be used to manufacture the first bonding component, which is not limited here.

[0016] In another possible implementation, the packaging structure in the embodiment of the present application may further include: a second bonding member, wherein the plastic package wraps the second bonding member. The first bonding member is bonded to the second electrode of the first diode chip, the second electrode of the second diode chip, and the first pin, and the second bonding member is bonded to the second electrode of the first diode chip, the second electrode of the second diode chip, and the second pin. In a specific implementation, when the second electrodes of the first diode chip and the second diode chip are both located on the upper surface, the first bonding member can be overlapped on the upper surfaces of the first diode chip, the second diode chip, and the first pin, and the second bonding member can be overlapped on the upper surfaces of the first diode chip, the second diode chip, and the second pin.

[0017] The first bonding part can be a folded-line integral structure, and the first bonding part can be bent on the upper surface of the first diode chip. The second bonding part can be a folded-line integral structure, and the second bonding part can be bent on the upper surface of the second diode chip. During the manufacturing process, a bonding process can be used to manufacture the first bonding part. During the bonding process, three solder joints (respectively, a first solder joint, a second solder joint, and a third solder joint) can be set. The first solder joint can be located on the upper surface of the second diode chip, the second solder joint can be located on the upper surface of the first diode chip, and the third solder joint can be located on the upper surface of the first pin. The first bonding part can be bent at the second solder joint, but the first bonding part is not broken, so that the same first bonding part is overlapped with the upper surfaces of the first diode chip, the second diode chip and the first pin, thereby obtaining a folded-line integral first bonding part. Similarly, the second bonding part can be manufactured in a similar manner, which will not be repeated here.

[0018] In another possible implementation, the first bonding component can be bonded to the second electrode of the first diode chip, the second electrode of the second diode chip, the first pin, and the second pin. The first bonding component can be an integrated structure in the shape of a folded line, and the first bonding component can be bent on the upper surface of the first diode chip and the upper surface of the second diode chip. In a specific implementation, when the second electrodes of the first diode chip and the second diode chip are both located on the upper surface, the first bonding component can be overlapped on the upper surfaces of the first diode chip, the second diode chip, the first pin, and the second pin. For example, the first bonding component can be a sheet-like structure, and the prepared folded-line first bonding component can be bonded to the upper surfaces of the first diode chip, the second diode chip, the first pin, and the second pin. Alternatively, the first bonding component may also be a bonding wire. During the bonding process, four solder joints may be provided on the surfaces of the first diode chip, the second diode chip, the first pin, and the second pin, respectively, and the bonding wire may be bent at the second solder joint and the third solder joint without breaking the bonding wire, so as to enable the same bonding wire to be overlapped with the upper surfaces of the first diode chip, the second diode chip, the first pin, and the second pin, thereby obtaining a first bonding component in the shape of a broken line and as an integral unit.

[0019] In other embodiments of the present application, the second electrodes of the first diode chip and the second diode chip can be electrically connected to the same pin. The lead frame may include: a separately arranged carrier board and a first pin, the first electrode of the first diode chip and the first electrode of the second diode chip are both welded to the surface of the carrier board, and the carrier board can play a role of support, heat dissipation, etc. The second electrode of the first diode chip and the second electrode of the second diode chip are both electrically connected to the first pin. The first pin can play a role of signal connection, and the packaging structure can be electrically connected to other components through the first pin. In a specific implementation, a portion of the first pin is wrapped by the plastic package, and the other portion is exposed outside the plastic package. For example, when the first pin is in the shape of a long strip, the plastic package can wrap most of the first pin, leaving the end of the first pin exposed, so that the packaging structure can be electrically connected to other components through the first pin. Of course, in some cases, the plastic package can also completely wrap the first pin, and other connecting components can be used to lead out the first pin.

[0020] In one possible implementation, the packaging structure in the embodiment of the present application may further include: a second bonding member and a third bonding member, wherein the plastic encapsulation body encapsulates the second and third bonding members. The second electrode of the first diode chip is bonded to the first pin via the second bonding member, and the second electrode of the second diode chip is bonded to the first pin via the third bonding member. In a specific implementation, the widths of the first, second, and third bonding members may be substantially the same. For example, the first, second, and third bonding members may all be bonding wires. During the manufacturing process, high-purity metal bonding wires may be used to manufacture the first, second, and third bonding wires. For example, bonding wires made of metal materials such as copper, aluminum, gold, and silver may be used. Of course, in some cases, other conductive materials may also be used to manufacture the first, second, and third bonding wires. During the manufacturing process, the first bonding wire may be manufactured using a wire bonding process. To improve manufacturing efficiency, the first, second, and third bonding wires may be manufactured using the same bonding process. Of course, in some cases, other bonding methods can also be used to make the first bonding part, and the width of the first bonding part can also be greater than or less than the width of the second bonding part (or third bonding part). It can be set according to actual needs and is not limited here.

[0021] In another possible implementation, the first bonding member is bonded to the second electrode of the first diode chip, the second electrode of the second diode chip, and the first pin, and the first bonding member is a folded-line integrated structure, and the first bonding member can be bent on the upper surface of the first diode chip and the upper surface of the second diode chip. In a specific implementation, when the second electrodes of the first diode chip and the second diode chip are both located on the upper surface, the first bonding member can be overlapped on the upper surfaces of the first diode chip, the second diode chip, and the first pin. For example, the first bonding member can be a sheet-like structure, and the prepared folded-line first bonding member can be bonded to the upper surfaces of the first diode chip, the second diode chip, and the first pin. Alternatively, the first bonding member can also be a bonding wire. During the bonding process, a solder joint can be set on the surface of the first diode chip and the second diode chip respectively, and two solder joints can be set on the surface of the first pin, and the bonding wire can be bent at the second and third solder joints, but the bonding wire is not broken, so that the same bonding wire is overlapped to the upper surfaces of the first diode chip, the second diode chip, and the first pin, thereby obtaining a folded-line integrated first bonding member.

[0022] The above describes several ways to electrically connect the second electrodes of the first diode chip and the second diode chip through the first bonding component. In specific implementation, the various connectors in the packaging structure may also have other implementation methods, which will not be listed one by one here.

[0023] In the second aspect, the embodiment of the present application further provides a power conversion device. The power conversion device in the embodiment of the present application can be a charging pile, household photovoltaic equipment, power station, energy storage equipment, inverter and other devices. The power conversion device in the embodiment of the present application may include: any packaging structure and switching device in the above-mentioned first aspect. Since a first bonding component is provided in the above-mentioned packaging structure in the embodiment of the present application, the second electrode of the first diode chip and the second electrode of the second diode chip can be bonded and connected through the first bonding component, thereby reducing the parasitic inductance between the second electrodes of the first diode chip and the second diode chip, thereby suppressing the amplitude of the voltage oscillation between the second electrodes of the first diode chip and the second diode chip, and eliminating the electromagnetic compatibility oscillation problem. Therefore, the power conversion device including the above-mentioned packaging structure will not be interfered by the electromagnetic compatibility oscillation, and the performance of the power conversion device is better. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] FIG1 is a schematic diagram of an equivalent circuit of a common cathode diode;

[0025] FIG2 is a schematic diagram of a top view of a packaging structure provided in an embodiment of the present application;

[0026] FIG3 is a schematic cross-sectional view of the dashed line AA′ in FIG2 ;

[0027] FIG4 is a schematic diagram of an equivalent circuit of the packaging structure shown in FIG2 ;

[0028] FIG5 is another schematic top view of the packaging structure provided in an embodiment of the present application;

[0029] FIG6 is another schematic top view of the packaging structure provided in an embodiment of the present application;

[0030] FIG7 is another schematic top view of the packaging structure provided in an embodiment of the present application;

[0031] FIG8 is another schematic top view of the packaging structure provided in an embodiment of the present application;

[0032] FIG9 is another schematic top view of the packaging structure provided in an embodiment of the present application.

[0033] Figure markings: 11-lead frame; 111-carrier board; 112-first pin; 113-second pin; 121-first diode chip; 122-second diode chip; 131-first bonding part; 132-second bonding part; 133-third bonding part; 14-plastic package; Q1-cathode pin; Q2, Q3-anode pins; L1, L2, L3-parasitic inductance; C1, C2-parasitic capacitance; P1-first electrode; P2-second electrode. DETAILED DESCRIPTION

[0034] In the related art, a common cathode diode is a commonly used device in a power conversion device. FIG1 is a schematic diagram of an equivalent circuit of a common cathode diode. As shown in FIG1 , a common cathode diode generally has three pins, namely a cathode pin Q1 and two anode pins Q2 and Q3. The common cathode diode is generally electrically connected to a switching device. During the operation of the power conversion device, the frequent on and off of the switching device will cause the potential at both ends of the common cathode diode to jump, causing the common cathode diode to generate parasitic inductance (such as L1, L2 and L3 in FIG1 ) and parasitic capacitance (such as C1 and C2 in FIG1 ). The parasitic inductance of the two anode pins Q2 and Q3 will resonate with the parasitic capacitance, thereby generating high-frequency voltage oscillations at the two anode pins Q2 and Q3, forming an interference source and causing electromagnetic compatibility (EMC) oscillation problems.

[0035] Based on this, in order to eliminate the electromagnetic compatibility oscillation problem of the common cathode diode, the embodiment of the present application provides a packaging structure and a power conversion device. The packaging structure provided in the embodiment of the present application can be a common cathode diode packaging structure or a common anode diode packaging structure, or the packaging structure provided in the embodiment of the present application can also be other packaging structures including common cathode (or common anode) diodes, which are not limited here. The packaging structure in the embodiment of the present application can be applied to power conversion devices such as charging piles, household photovoltaic equipment, power stations, energy storage equipment, inverters, etc. Of course, in some cases, the packaging structure in the embodiment of the present application can also be applied to other power conversion devices or other electronic devices.

[0036] In order to make the purpose, technical solutions and advantages of this application clearer, this application will be further described in detail below with reference to the accompanying drawings.

[0037] It should be noted that the same reference numerals in the drawings of this application represent the same or similar structures, and thus their repeated description will be omitted. The words expressing positions and directions described in this application are all explained using the drawings as examples, but they can be modified as needed, and such modifications are included in the scope of protection of this application. The drawings of this application are only for illustrating relative positional relationships and do not represent true proportions.

[0038] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0039] FIG2 is a schematic diagram of a top view of the package structure provided in an embodiment of the present application, FIG3 is a schematic diagram of a cross-section at the dashed line AA′ in FIG2 , and FIG4 is a schematic diagram of an equivalent circuit of the package structure shown in FIG2 . In combination with FIG2 to FIG4 , the package structure provided in an embodiment of the present application may include: a lead frame 11, a first diode chip 121, a second diode chip 122, a first bonding member 131, and a plastic package 14. The first diode chip 121 and the second diode chip 122 are both located on the lead frame 11. The first diode chip 121 and the second diode chip 122 each have a first electrode P1 and a second electrode P2. In the embodiment of the present application, the first electrode P1 is the anode of the diode chip, and the second electrode P2 is the cathode of the diode chip; alternatively, the first electrode P1 is the cathode of the diode chip, and the second electrode P2 is the anode of the diode chip. The first electrode P1 of the first diode chip 121 and the first electrode P1 of the second diode chip 122 are both welded to the surface of the lead frame 11. The lead frame 11 includes a conductive material. For example, the lead frame 11 may include a metal material such as copper, iron, or aluminum. The first electrode P1 of the first diode chip 121 and the first electrode P1 of the second diode chip 122 are electrically connected through the lead frame 11. The second electrode P2 of the first diode chip 121 and the second electrode P2 of the second diode chip 122 are bonded to each other via a first bonding member 131. The plastic package 14 encapsulates the first diode chip 121, the second diode chip 122, and the first bonding member 131.

[0040] In the packaging structure provided in the embodiment of the present application, the first electrode P1 of the first diode chip 121 and the first electrode P1 of the second diode chip 122 are electrically connected through the lead frame 11. The first electrode P1 can be the cathode or anode of the diode. Therefore, the packaging structure provided in the embodiment of the present application can be a common cathode diode packaging structure, or it can also be a common anode diode packaging structure. In the embodiment of the present application, by providing a first bonding member 131 in the packaging structure, the second electrode P2 of the first diode chip 121 and the second electrode P2 of the second diode chip 122 can be bonded together through the first bonding member 131. In this way, the parasitic inductance between the second electrode P2 of the first diode chip 121 and the second diode chip 122 can be reduced, thereby suppressing the amplitude of the voltage oscillation between the second electrode P2 of the first diode chip 121 and the second diode chip 122, eliminating the electromagnetic compatibility oscillation problem. In addition, the second electrode P2 of the first diode chip 121 and the second electrode P2 of the second diode chip 122 are bonded together through the first bonding member 131, which will not affect the connection relationship between the first diode chip 121 and the second diode chip 122 and other components, and will not affect the overall performance of the packaging structure.

[0041] In addition, the plastic package 14 wraps the first diode chip 121, the second diode chip 122 and the first bonding member 131, and the package 14 can protect and fix the various components. Encapsulating the first bonding member 131 inside the plastic package 14 can avoid the first bonding member 131 being exposed to the outside of the packaging structure, and will not cause electrical safety and reliability problems, thereby ensuring that the safety and reliability of the packaging structure are high. The first bonding member 131 in the embodiment of the present application can be a bonding wire, a strip structure or a sheet structure, etc. For example, the strip structure can be an aluminum ribbon (ribbon), and the sheet structure can be a copper sheet (clip). For example, the first bonding member 131 can include metal materials such as copper, aluminum, gold, silver, etc., or the first bonding member 131 can also include other conductive materials. During the manufacturing process, the first bonding part 131 can be manufactured by a bonding process or other processes, which is easily compatible with the manufacturing processes of other components in the packaging structure. For example, the first bonding wire 131 can be manufactured during the wire bond process in the front of line (FOL) packaging process. The feasibility and stability of the manufacturing process are high, the manufacturing cost is low, and it has high manufacturability and supplyability.

[0042] In the embodiment of the present application, a first diode chip 121 and a second diode chip 122 are provided in the packaging structure, and the first diode chip 121 and the second diode chip 122 are arranged in parallel. That is, two diode chips arranged in parallel are provided in the packaging structure. In a specific implementation, more diode chips arranged in parallel can be provided in the packaging structure. Alternatively, other electronic components can be provided in the packaging structure, and can be arranged according to actual needs. The packaging structure in the embodiment of the present application can adopt a transistor outline (TO) shell, or the packaging structure can also adopt other packaging forms.

[0043] As shown in Figures 2 and 3, in the embodiment of the present application, the first electrode P1 of the first diode chip 121 can be located on the lower surface of the first diode chip 121, and the second electrode P2 of the first diode chip 121 can be located on the upper surface of the first diode chip 121. The first electrode P1 of the second diode chip 122 can be located on the lower surface of the second diode chip 122, and the second electrode P2 of the second diode chip 122 can be located on the upper surface of the second diode chip 122. The upper surface of the first diode chip 121 (or the second diode chip 122) is the surface of the first diode chip 121 (or the second diode chip 122) facing away from the lead frame 11, and the lower surface is the surface of the first diode chip 121 (or the second diode chip 122) facing the lead frame 11. In other words, the description of "upper surface" and "lower surface" here is consistent with the orientation of the view shown in Figure 3. In the implementation of the present application, the first electrode P1 and the second electrode P2 of the first diode chip 121 (or the second diode chip 122) are respectively arranged on the lower surface and the upper surface to facilitate electrical connection with other components. Furthermore, the first electrodes P1 of the first diode chip 121 and the second diode chip 122 are located on the same surface, and the second electrodes P2 are located on the same surface, making it easier to electrically connect the first electrodes P1 of the first diode chip 121 and the second diode chip 122, and to electrically connect the second electrodes P2 of the first diode chip 121 and the second diode chip 122. Since the lead frame 11 in the embodiment of the present application includes a conductive material, when the first diode chip 121 and the second diode chip 122 are installed at corresponding positions on the surface of the lead frame 11, the electrical connection between the first electrodes P1 of the first diode chip 121 and the second diode chip 122 can be achieved. By overlapping the first bonding member 131 on the upper surfaces of the first diode chip 121 and the second diode chip 122, the electrical connection between the second electrodes P2 of the first diode chip 121 and the second diode chip 122 can be achieved through the first bonding member 131.

[0044] Of course, in some cases, the first electrode P1 and the second electrode P2 of the first diode chip 121 (or the second diode chip 122) can also be set on the surface of the same side. For example, the first electrode P1 and the second electrode P2 of the first diode chip 121 (or the second diode chip 122) can be set at different positions on the upper surface, and electrical connection with other components can also be achieved. It can be set according to the spatial layout of the packaging structure.

[0045] In some embodiments of the present application, the second electrodes of the first diode chip and the second diode chip can be electrically connected to different pins, respectively. As shown in Figures 2 and 3, the lead frame 11 may include: a discretely arranged carrier 111, a first pin 112, and a second pin 113. The first diode chip 121 and the second diode chip 122 are located on the carrier 111, and the carrier 111 can play a supporting, heat dissipating and other roles. The first electrode P1 of the first diode chip 121 and the first electrode P1 of the second diode chip 122 are both soldered to the surface of the carrier 111, the second electrode P2 of the first diode chip 121 is electrically connected to the first pin 112, and the second electrode P2 of the second diode chip 122 is electrically connected to the second pin 113. The first pin 112 and the second pin 113 can play a role in signal connection, and the packaging structure can be electrically connected to other components through the first pin 112 and the second pin 113. In a specific implementation, a portion of the first pin 112 is encapsulated by the plastic encapsulation body 14, while another portion is exposed outside the plastic encapsulation body 14. A portion of the second pin 113 is encapsulated by the plastic encapsulation body 14, while another portion is exposed outside the plastic encapsulation body 14. For example, when the first pin 112 and the second pin 113 are in the shape of long strips, the plastic encapsulation body 14 can encapsulate most of the first pin 112 and the second pin 113, leaving the ends of the first pin 112 and the second pin 113 exposed, thereby facilitating electrical connection of the package structure to other components via the first pin 112 and the second pin 113. Of course, in some cases, the plastic encapsulation body 14 can also completely encapsulate the first pin 112 and the second pin 113, and other connecting components can be used to lead the first pin 112 and the second pin 113 out.

[0046] In one possible implementation, as shown in FIG2 , the packaging structure in the embodiment of the present application may further include: a second bonding member 132 and a third bonding member 133, with the plastic package 14 encapsulating the second bonding member 132 and the third bonding member 133. The second electrode P2 of the first diode chip 121 is bonded to the first pin 112 via the second bonding member 132, and the second electrode P2 of the second diode chip 122 is bonded to the second pin 113 via the third bonding member 133. In a specific implementation, the widths of the first bonding member 131, the second bonding member 132, and the third bonding member 133 may be substantially the same. For example, the first bonding member 131, the second bonding member 132, and the third bonding member 133 may all be bonding wires. During the manufacturing process, a high-purity metal bonding wire may be used to manufacture the first bonding wire 131, the second bonding wire 132, and the third bonding wire 133. For example, bonding wires made of metal materials such as copper, aluminum, gold, and silver may be used. Of course, in some cases, other conductive materials may be used to make the first bonding wire 131, the second bonding wire 132, and the third bonding wire 133. During the manufacturing process, the first bonding wire 131 may be manufactured using a wire bonding process. To improve manufacturing efficiency, the first bonding wire 131, the second bonding wire 132, and the third bonding wire 133 may be manufactured using the same bonding process.

[0047] FIG5 is another schematic top view of the package structure provided in an embodiment of the present application. As shown in FIG5 , the width of the first bonding member 131 can be greater than the widths of the second bonding member 132 and the third bonding member 133. For example, the first bonding member 131 can be a strip structure, such as an aluminum ribbon, and the second bonding member 132 and the third bonding member 133 can be bonding wires.

[0048] Of course, in some cases, other bonding methods may also be used to manufacture the first bonding component 131, which is not limited here.

[0049] In another possible implementation, as shown in FIG6 , FIG6 is another schematic diagram of a top view of the packaging structure provided in an embodiment of the present application. The packaging structure in the embodiment of the present application may further include: a second bonding member 132, and the plastic package 14 wraps the second bonding member 132. The first bonding member 131 is bonded to the second electrode P2 of the first diode chip 121, the second electrode P2 of the second diode chip 122, and the first pin 112, and the second bonding member 132 is bonded to the second electrode P2 of the first diode chip 121, the second electrode P2 of the second diode chip 122, and the second pin 113. In a specific implementation, when the second electrodes P2 of the first diode chip 121 and the second diode chip 122 are both located on the upper surface, the first bonding member 131 can be overlapped on the upper surfaces of the first diode chip 121, the second diode chip 122, and the first pin 112, and the second bonding member 132 can be overlapped on the upper surfaces of the first diode chip 121, the second diode chip 122, and the second pin 113.

[0050] Continuing with reference to FIG6 , the first bonding member 131 can be a folded-line integral structure, and the first bonding member 131 can be bent on the upper surface of the first diode chip 121. The second bonding member 132 can be a folded-line integral structure, and the second bonding member 132 can be bent on the upper surface of the second diode chip 122. During the manufacturing process, the first bonding member 131 can be manufactured using a bonding process. During the bonding process, three solder joints (respectively, a first solder joint, a second solder joint, and a third solder joint) can be set. The first solder joint can be located on the upper surface of the second diode chip 122, the second solder joint can be located on the upper surface of the first diode chip 121, and the third solder joint can be located on the upper surface of the first pin 112. The first bonding member 131 can be bent at the second solder joint without breaking the first bonding member 131, so that the same first bonding member 131 can be overlapped with the upper surfaces of the first diode chip 121, the second diode chip 122, and the first pin 112, thereby obtaining a folded-line integral first bonding member 131. Similarly, the second bonding element 132 can be manufactured in a similar manner, which will not be described in detail here.

[0051] In another possible implementation, as shown in FIG7 , FIG7 is another schematic diagram of a top view of the packaging structure provided in an embodiment of the present application, wherein the first bonding member 131 can be bonded to the second electrode P2 of the first diode chip 121, the second electrode P2 of the second diode chip 122, the first pin 112, and the second pin 113. The first bonding member 131 can be a folded-line integrated structure, and the first bonding member 131 can be bent on the upper surface of the first diode chip 121 and the upper surface of the second diode chip 122. In a specific implementation, when the second electrodes P2 of the first diode chip 121 and the second diode chip 122 are both located on the upper surface, the first bonding member 131 can be overlapped on the upper surfaces of the first diode chip 121, the second diode chip 122, the first pin 112, and the second pin 113. For example, the first bonding member 131 can be a sheet-like structure, and the prepared folded-line first bonding member 131 can be bonded to the upper surfaces of the first diode chip 121, the second diode chip 122, the first pin 112, and the second pin 113. Alternatively, the first bonding part 131 may also be a bonding wire. During the bonding process, four solder joints may be provided on the surfaces of the first diode chip 121, the second diode chip 122, the first pin 112, and the second pin 113, respectively, and the bonding wire may be bent at the second solder joint and the third solder joint without breaking the bonding wire, so as to enable the same bonding wire to be overlapped with the upper surfaces of the first diode chip 121, the second diode chip 122, the first pin 112, and the second pin 113, thereby obtaining a first bonding part 131 in the shape of a broken line.

[0052] In other embodiments of the present application, the second electrodes of the first diode chip and the second diode chip can be electrically connected to the same pin. FIG8 is a schematic top view of another package structure provided in an embodiment of the present application. As shown in FIG8 , the lead frame 11 may include: a separately disposed carrier 111 and a first pin 112. The first electrode P1 of the first diode chip 121 and the first electrode P1 of the second diode chip 122 are both soldered to the surface of the carrier 111. The carrier 111 can provide support and heat dissipation. The second electrode P2 of the first diode chip 121 and the second electrode P2 of the second diode chip 122 are both electrically connected to the first pin 112. The first pin 112 can function as a signal connection, and the package structure can be electrically connected to other components through the first pin 112. In a specific implementation, a portion of the first pin 112 is encapsulated by the plastic package 14, while another portion is exposed outside the plastic package 14. For example, if the first pin 112 is elongated, the plastic package 14 can encapsulate most of the first pin 112, leaving the end of the first pin 112 exposed, facilitating electrical connection of the package structure to other components via the first pin 112. Of course, in some cases, the plastic package 14 may completely wrap the first pin 112 , and other connecting components may be used to lead the first pin 112 out.

[0053] In one possible implementation, as shown in FIG8 , the packaging structure in the embodiment of the present application may further include: a second bonding member 132 and a third bonding member 133, with the plastic package 14 encapsulating the second bonding member 132 and the third bonding member 133. The second electrode P2 of the first diode chip 121 is bonded to the first pin 112 via the second bonding member 132, and the second electrode P2 of the second diode chip 122 is bonded to the first pin 112 via the third bonding member 133. In a specific implementation, the widths of the first bonding member 131, the second bonding member 132, and the third bonding member 133 may be substantially the same. For example, the first bonding member 131, the second bonding member 132, and the third bonding member 133 may all be bonding wires. During the manufacturing process, the first bonding wire 131, the second bonding wire 132, and the third bonding wire 133 may be made of a relatively high-purity metal bonding wire. For example, bonding wires made of metal materials such as copper, aluminum, gold, and silver may be used. Of course, in some cases, other conductive materials can also be used to make the first bonding wire 131, the second bonding wire 132, and the third bonding wire 133. During the manufacturing process, the first bonding wire 131 can be made using a wire bonding process. In order to improve the manufacturing efficiency, the first bonding wire 131, the second bonding wire 132, and the third bonding wire 133 can be made using the same bonding process. Of course, in some cases, other bonding methods can also be used to make the first bonding part 131. The width of the first bonding part 131 can also be greater than or less than the width of the second bonding part 132 (or the third bonding part 133). It can be set according to actual needs and is not limited here.

[0054] In another possible implementation, as shown in FIG9 , FIG9 is another schematic diagram of a top view of the packaging structure provided in an embodiment of the present application, wherein the first bonding member 131 is bonded to the second electrode P2 of the first diode chip 121, the second electrode P2 of the second diode chip 122, and the first pin 112. The first bonding member 131 is a folded-line integrated structure, and the first bonding member 131 can be bent on the upper surface of the first diode chip 121 and the upper surface of the second diode chip 122, respectively. In a specific implementation, when the second electrodes P2 of the first diode chip 121 and the second diode chip 122 are both located on the upper surface, the first bonding member 131 can be overlapped on the upper surfaces of the first diode chip 121, the second diode chip 122, and the first pin 112. For example, the first bonding member 131 can be a sheet-like structure, and the prepared folded-line first bonding member 131 can be bonded to the upper surfaces of the first diode chip 121, the second diode chip 122, and the first pin 112. Alternatively, the first bonding component 131 may also be a bonding wire. During the bonding process, a solder joint may be set on the surface of the first diode chip 121 and the second diode chip 122 respectively, two solder joints may be set on the surface of the first pin 112, and the bonding wire may be bent at the second and third solder joints without breaking the bonding wire, so as to achieve the same bonding wire being connected to the upper surfaces of the first diode chip 121, the second diode chip 122 and the first pin 112, thereby obtaining a first bonding component 131 in the shape of a broken line.

[0055] The above, in combination with the accompanying drawings, introduces several ways to electrically connect the second electrodes of the first diode chip and the second diode chip through the first bonding component. In specific implementation, the various connectors in the packaging structure may also have other implementation methods, which will not be given examples one by one this time.

[0056] Based on the same technical concept, the embodiment of the present application also provides a power conversion device. The power conversion device in the embodiment of the present application can be a charging pile, household photovoltaic equipment, power station, energy storage equipment, inverter and other devices. The power conversion device in the embodiment of the present application may include: any of the above-mentioned packaging structures and switching devices. Since a first bonding component is provided in the above-mentioned packaging structure in the embodiment of the present application, the second electrode of the first diode chip and the second electrode of the second diode chip can be bonded and connected through the first bonding component, thereby reducing the parasitic inductance between the second electrodes of the first diode chip and the second diode chip, thereby suppressing the amplitude of the voltage oscillation between the second electrodes of the first diode chip and the second diode chip, and eliminating the electromagnetic compatibility oscillation problem. Therefore, the power conversion device including the above-mentioned packaging structure will not be interfered with by the electromagnetic compatibility oscillation, and the performance of the power conversion device is better.

[0057] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0058] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application also intends to include such modifications and variations.

Claims

1. A packaging structure, characterized in that: include: a lead frame, the lead frame comprising a conductive material; A first diode chip and a second diode chip, wherein the first diode chip and the second diode chip each have a first electrode and a second electrode, the first electrode of the first diode chip and the first electrode of the second diode chip are both welded to the surface of the lead frame, and the first electrode of the first diode chip is electrically connected to the first electrode of the second diode chip through the lead frame; a first bonding component, wherein the second electrode of the first diode chip and the second electrode of the second diode chip are bonded and connected via the first bonding component; A plastic package body, wherein the plastic package body encapsulates the first diode chip, the second diode chip and the first bonding component.

2. The packaging structure according to claim 1, characterized in that: The lead frame comprises: a carrier board, a first pin and a second pin which are separately arranged; The first electrode of the first diode chip is located on the lower surface of the first diode chip, and the second electrode of the first diode chip is located on the upper surface of the first diode chip; The first electrode of the second diode chip is located on the lower surface of the second diode chip, and the second electrode of the second diode chip is located on the upper surface of the second diode chip; The first electrode of the first diode chip and the first electrode of the second diode chip are both welded to the surface of the carrier; The second electrode of the first diode chip is electrically connected to the first pin, and the second electrode of the second diode chip is electrically connected to the second pin; A portion of the first pin is wrapped by the plastic package, and another portion is exposed outside the plastic package; A portion of the second pin is wrapped by the plastic package, and another portion is exposed outside the plastic package.

3. The packaging structure according to claim 2, characterized in that: The first bonding component is bonded to the second electrode of the first diode chip, the second electrode of the second diode chip, the first pin, and the second pin; The first bonding component is in a fold line shape, and the first bonding component is bent on the upper surface of the first diode chip and the upper surface of the second diode chip respectively.

4. The packaging structure according to claim 2, characterized in that: Also includes: A second bonding component, wherein the plastic package body wraps the second bonding component; The first bonding component is bonded to the second electrode of the first diode chip, the second electrode of the second diode chip, and the first pin; The second bonding element electrically connects the second electrode of the first diode chip, the second electrode of the second diode chip, and the second lead.

5. The packaging structure according to claim 4, characterized in that: The first bonding piece is in a fold line shape, and the first bonding piece is bent on the upper surface of the first diode chip; the second bonding piece is in a fold line shape, and the second bonding piece is bent on the upper surface of the second diode chip.

6. The packaging structure according to claim 2, characterized in that: Also includes: A second bonding member and a third bonding member, wherein the plastic package wraps the second bonding member and the third bonding member; The second electrode of the first diode chip is bonded to the first pin through the second bonding component, and the second electrode of the second diode chip is bonded to the second pin through the third bonding component.

7. The packaging structure according to claim 1, characterized in that: The lead frame comprises: a carrier board and a first lead that are separately arranged; The first electrode of the first diode chip is located on the lower surface of the first diode chip, and the second electrode of the first diode chip is located on the upper surface of the first diode chip; The first electrode of the second diode chip is located on the lower surface of the second diode chip, and the second electrode of the second diode chip is located on the upper surface of the second diode chip; The first electrode of the first diode chip and the first electrode of the second diode chip are both welded to the surface of the carrier; The second electrode of the first diode chip and the second electrode of the second diode chip are both electrically connected to the first pin; A portion of the first pin is wrapped by the plastic package, and another portion is exposed outside the plastic package.

8. The packaging structure according to claim 7, characterized in that: The first bonding component is bonded to the second electrode of the first diode chip, the second electrode of the second diode chip and the first pin. The first bonding component is in a fold line shape and is bent on the upper surface of the first diode chip and the upper surface of the second diode chip respectively.

9. The packaging structure according to any one of claims 1 to 8, characterized in that: The first bonding wire is a bonding wire, a strip structure or a sheet structure.

10. A power conversion device, characterized in that: include: The packaging structure and switch device according to any one of claims 1 to 9.

Citation Information

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