Power conversion device

The power conversion device addresses the issue of wiring board warping and conductor spacing by using a semiconductor package with strategically connected conductors and terminals, resulting in improved efficiency and reliability.

WO2025134518A1PCT designated stage expired Publication Date: 2025-06-26HITACHI LTD +1
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
PCT/JP2024/037624
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-19
Filing Date
2024-10-22
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

Existing power conversion devices face challenges in suppressing warping of the wiring board and maintaining an optimal distance between conductors, which affects efficiency and reliability.

Method used

The power conversion device incorporates a semiconductor package with a semiconductor element connected to first and second conductors, which are sealed and connected to the wiring board through terminals and connection conductors. This configuration allows for balanced stress distribution and increased distance between conductors, thereby suppressing warping of the wiring board.

Benefits of technology

The solution effectively suppresses warping of the wiring board, improves the reliability of terminal connections, and increases the distance between conductors, leading to enhanced efficiency and reliability of the power conversion device.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2024037624_26062025_PF_FP_ABST
    Figure JP2024037624_26062025_PF_FP_ABST
Patent Text Reader

Abstract

This power conversion device comprises: a semiconductor package (10) in which a semiconductor element (1) constituting an upper arm or a lower arm of an upper-lower arm circuit is incorporated; and a wiring board (50) on which the semiconductor package is mounted and which has a plurality of wiring layers electrically connected to the semiconductor package. The semiconductor element has a first main electrode, and a second main electrode on the surface opposite to the first main electrode. The semiconductor package has: a first conductor (11) that is connected to the first main electrode of the semiconductor element and to the high potential side of the upper-lower arm circuit; and a second conductor (12) that is connected to the second main electrode of the semiconductor element and to the low potential side of the upper-lower arm circuit; and a sealing member (14) that seals the first conductor, the second conductor, and the semiconductor element. The first conductor is connected to a first surface of the wiring board via a first terminal (16) that protrudes from the sealing member. The second conductor: has an exposure surface (12E), which is exposed from the sealing member, formed on the surface opposite to the side where the semiconductor element is joined; and further comprises a connection conductor (18) that electrically connects a second surface, which is the surface opposite to the first surface in the wiring board, and the exposure surface of the second conductor.
Need to check novelty before this filing date? Find Prior Art

Description

Power Conversion Device

[0001] The present invention relates to a power conversion device.

[0002] Power conversion devices are used in various industrial fields, and high efficiency and miniaturization are required. Patent Document 1 discloses a semiconductor device including one or more power elements having main terminals on upper and lower surfaces, first and second conductors that are connected to the main terminals on the upper and lower surfaces of the power elements, respectively, and that pass a main current and that face each other with a predetermined gap between them, a drive IC that controls the power elements, an interposer that connects the drive IC and the power elements, and a signal terminal connected to the drive IC, wherein the interposer has a gate wiring pattern that is connected to the gate terminal of the power element and is configured to be inserted and disposed in the gap between the first conductor and the second conductor.

[0003] Japanese Patent Application Publication No. 2018-160501

[0004] The invention described in Patent Document 1 leaves room for further consideration in terms of measures to prevent warpage of the wiring board.

[0005] a first terminal protruding from the sealing member and connected to a first surface of the wiring board; a second terminal protruding from the sealing member and connected to a second surface of the wiring board; a first terminal protruding from the sealing member and connected to a first surface of the wiring board; a second terminal protruding from the sealing member and connected to a second surface of the wiring board; a first terminal protruding from the sealing member and connected to a second surface of the wiring board; a second terminal protruding from the sealing member and connected to a second surface of the wiring board; a second terminal protruding from the sealing member and connected to a second surface of the wiring board;

[0006] According to the present invention, it is possible to suppress warping of the wiring board and increase the distance between conductors.

[0007] Electrical circuit diagram of the power conversion device Cross-sectional view of the upper arm element circuit and the lower arm element circuit Plan view of the upper arm element circuit and the lower arm element circuit Bottom view of the upper arm element circuit and the lower arm element circuit Cross-sectional view of the upper arm element circuit and the lower arm element circuit in Modification 1 Plan view of the upper arm element circuit and the lower arm element circuit in Modification 2

[0008] -Embodiment- Hereinafter, an embodiment of a force conversion device will be described with reference to Figs.

[0009] FIG. 1 is an electrical circuit diagram of a power conversion device 100. The power conversion device 100 includes a U-phase circuit 100U that processes the U phase, a V-phase circuit 100V that processes the V phase, and a W-phase circuit 100W that processes the W phase. Because the configuration of each phase circuit is identical, only the U-phase circuit 100U will be described here. The U-phase circuit 100U includes four pairs of upper and lower arms, each of which has a semiconductor device 1. The U-phase circuit 100U includes a positive wiring 71 at the top of the illustration, an AC wiring 72 at the center of the illustration, a negative wiring 73 at the bottom of the illustration, and a ceramic capacitor 75 at the left of the illustration. The two boxes shown inside the V-phase circuit 100V represent an upper arm element circuit 1U and a lower arm element circuit 1D. The structures of the upper arm element circuit 1U and the lower arm element circuit 1D will be described below.

[0010] 2 is a cross-sectional view of the upper arm element circuit 1U and the lower arm element circuit 1D. From FIG. 2 onward, mutually orthogonal X, Y, and Z axes are shown to clarify the correlation between the drawings. In FIG. 2, the positive side of the X axis is the right side of the illustration, the positive side of the Y axis is the back side of the illustration, and the positive side of the Z axis is the top side of the illustration. Note that hereinafter, the Z axis direction may be referred to as the "first direction," and the X axis direction may be referred to as the "second direction."

[0011] The power conversion device 100 includes a flat wiring substrate 50 sandwiched between heat dissipation members 500 on the top and bottom. The heat dissipation members 500 may be heat dissipation fins, or may have a cooling medium flowing through them. The heat dissipation members 500 include an upper heat dissipation member 500U and a lower heat dissipation member 500D. The wiring substrate 50 is a multilayer substrate having multiple wiring layers. A first main circuit wiring 61 is formed on the first layer of the wiring substrate 50. A second main circuit wiring 62 is formed on the fourth layer, i.e., the lowest layer, of the wiring substrate 50. In the case of the upper arm element circuit 1U shown in FIG. 2, the first main circuit wiring 61 corresponds to the positive electrode wiring 71, and the second main circuit wiring 62 corresponds to the AC wiring 72. In the case of the lower arm element circuit 1D shown in FIG. 2, the first main circuit wiring 61 corresponds to the AC wiring 72, and the second main circuit wiring 62 corresponds to the negative electrode wiring 73.

[0012] The surface of the wiring board 50 on the positive side of the Z axis is called a first surface 51, and the surface of the wiring board 50 on the negative side of the Z axis is called a second surface 52. The wiring board 50 has a through hole 50T penetrating in the Z axis direction, and a semiconductor package 10 is disposed in the through hole 50T. The semiconductor package 10 includes a semiconductor element 1, a first conductor 11, a second conductor 12, a semiconductor element bonding member 13, a sealing member 14, a signal terminal 17, and a first terminal 16.

[0013] The semiconductor element 1 is flat and has a first main electrode 1M on the positive side of the Z axis and a second main electrode 1S on the negative side of the Z axis. The first main electrode 1M is connected to the first conductor 11 via a semiconductor element bonding member 13. The second main electrode 1S is connected to the second conductor 12 via the semiconductor element bonding member 13. In other words, the semiconductor element 1 is in contact with the first conductor 11 at its top, with the second conductor 12 at its bottom, and is surrounded by a sealing member 14 on its sides.

[0014] The first conductor 11 is electrically connected to the first terminal 16. The surface of the first conductor 11 on the positive side of the Z axis is exposed from the sealing member 14, and this exposed surface contacts the upper heat dissipation member 500U via the semiconductor package joint member 23. Therefore, when the movement of heat generated by the semiconductor element 1 is followed toward the positive side of the Z axis, the heat travels from the semiconductor element 1 toward the positive side of the Z axis, passes through the semiconductor element joint member 13, the first conductor 11, and the semiconductor package joint member 23, and reaches the upper heat dissipation member 500U.

[0015] The second conductor 12 has a second conductor exposed surface 12E, which is the surface on the negative Z-axis side, exposed from the sealing member 14 and contacts the connecting conductor 18 via the semiconductor package joining member 23. The connecting conductor 18 connects the left and right wiring boards 50 on either side of the through hole 50T via the terminal connection portion 40. The connecting conductor 18 contacts the lower heat dissipation member 500D via the semiconductor package joining member 23. Therefore, when the movement of heat generated by the semiconductor element 1 is followed toward the negative Z-axis side, the heat travels from the semiconductor element 1 toward the negative Z-axis side, passing through the semiconductor element joining member 13, the second conductor 12, the semiconductor package joining member 23, the connecting conductor 18, and the semiconductor package joining member 23, and then reaches the lower heat dissipation member 500D.

[0016] One end of the first terminal 16 is connected to the first conductor 11, and the other end is connected to the first main circuit wiring 61 via the terminal connection portion 40. Since the first conductor 11 is surrounded by the sealing member 14, the first terminal 16 connected to the first conductor 11 is also partially covered by the sealing member 14, and the other end protruding from the sealing member 14 is connected to the first main circuit wiring 61. One end of the signal terminal 17 is connected to the signal electrode of the semiconductor element 1 by wire bonding, and the other end is connected to the first main circuit wiring 61 of the wiring board 50.

[0017] The wiring board 50 includes interlayer connectors (not shown) that electrically connect different layers. The interlayer connectors are, for example, through-hole vias that penetrate multiple layers in the thickness direction of the wiring board 50. Providing multiple interlayer connectors increases the cross-sectional area of ​​current flowing in the cross-sectional direction of the wiring board 50. This reduces electrical resistance and reduces heat generation in the wiring. Furthermore, the interlayer connectors improve the heat transfer in the Z-axis direction of the wiring board 50, thereby suppressing increases in wiring temperature. The semiconductor element bonding members 13, the semiconductor package bonding members 23, and the terminal connecting members 40 are made of solder or the like. In this embodiment, there are multiple semiconductor element bonding members 13, multiple semiconductor package bonding members 23, and multiple terminal connecting members 40. The same reference numerals are used to indicate that the components are made of the same material, and do not indicate that the components are physically integrated.

[0018] 2 shows that the first terminal 16, the signal terminal 17, and the connecting conductor 18 are connected to the wiring board 50 at a single point. However, in reality, as will be described later, they also exist in the Y-axis direction and are connected to the wiring board 50 at multiple positions. Furthermore, the positions where the first terminal 16 and the connecting conductor 18 contact the wiring board 50 are the same not only in the X-axis coordinate but also in the Y-axis coordinate in the depth direction, with only the Z-axis coordinate differing. Similarly, the positions where the signal terminal 17 and the connecting conductor 18 contact the wiring board 50 are the same not only in the X-axis coordinate but also in the Y-axis coordinate in the depth direction, with only the Z-axis coordinate differing.

[0019] FIG. 3 is a plan view of the upper arm element circuit 1U and the lower arm element circuit 1D. However, in FIG. 3, the heat dissipation member 500 and the semiconductor package joint member 23 are removed from the configuration shown in FIG. There are four first terminals 16 and four signal terminals 17, each extending in the X-axis direction and connected to the wiring board 50. Each of the first terminals 16 and the signal terminals 17 has a parallel, linear shape, which can also be called a "comb-like" shape. The first terminals 16 and the signal terminals 17 contact the wiring board 50 at multiple positions, specifically, at four points each, thereby reducing stress generated in each of the first terminals 16 and the signal terminals 17. Furthermore, the first terminals 16 connect the first conductor 11 and the wiring board 50 in a linear manner, thereby reducing inductance.

[0020] FIG. 4 is a bottom view of the upper arm element circuit 1U and the lower arm element circuit 1D. However, in FIG. 3, the heat dissipation member 500 and the semiconductor package joint member 23 are removed from the configuration shown in FIG. 2 . FIG. 4 is viewed from the opposite perspective to FIG. 3 . The connecting conductor 18 branches into four branches on both the positive and negative sides of the X axis relative to the semiconductor element 1, and each branch is connected to the second main circuit wiring 62 of the wiring board 50. On the positive side of the X axis relative to the semiconductor element 1, when the connecting conductor 18 moves from its contact position with the wiring board 50 toward the positive side of the Z axis, the first terminal 16 contacts the wiring board 50. Providing connections above and below the wiring board 50 shortens the current path. Furthermore, since the number of magnetic field tolerances increases with the number of terminals, inductance can be significantly reduced. Furthermore, the first terminal 16 and the connecting conductor 18 sandwich the wiring board 50 at the same position on the X and Y coordinates, deformation of the wiring board 50, specifically, warping of the wiring board 50, can be prevented.

[0021] On the negative X-axis side of semiconductor element 1, when connecting conductor 18 moves from a position where it contacts wiring board 50 to the positive Z-axis side, signal terminal 17 comes into contact with wiring board 50. Signal terminal 17 and connecting conductor 18 sandwich wiring board 50 at the same position in the X and Y coordinates, and therefore deformation of wiring board 50, specifically warping of wiring board 50, can be prevented.

[0022] The above-described embodiment provides the following advantageous effects. (1) The power conversion device 100 includes a semiconductor package 10 incorporating a semiconductor element 1 constituting an upper arm element circuit 1U or a lower arm element circuit 1D, and a wiring board 50 on which the semiconductor package 10 is mounted and which has a plurality of wiring layers electrically connected to the semiconductor package 10. The semiconductor package 10 includes a first conductor 11 connected to a first main electrode 1M of the semiconductor element 1 and the high-potential side of the upper and lower arm circuits, a second conductor 12 connected to a second main electrode 1S of the semiconductor element 1 and the low-potential side of the upper and lower arm circuits, and a sealing member 14 that seals the first conductor 11, the second conductor 12, and the semiconductor element 1. The first conductor 11 is connected to a first main circuit wiring 61 on a first surface 51 of the wiring board 50 via a first terminal 16 protruding from the sealing member 14. The second conductor 12 has a second conductor exposed surface 12E, which is an exposed surface exposed from the sealing member 14, on the surface opposite the positive side of the Z axis (i.e., the negative side of the Z axis) where the semiconductor element 1 is bonded. The power conversion device 100 includes a connecting conductor 18 that electrically connects the second surface 52, which is the surface of the wiring substrate 50 opposite the first surface 51, to the second conductor exposed surface 12E. Therefore, by forming the terminals separately on the top and bottom of the substrate, deformation due to temperature changes is balanced between the top and bottom of the substrate, thereby suppressing warping of the wiring substrate 50. Since warping of the wiring substrate 50 is suppressed, the reliability of the terminal connection portion 40 connecting the first terminal 16 and the first main circuit wiring 61 and the terminal connection portion 40 connecting the connecting conductor 18 and the second main circuit wiring 62 is improved. However, improved reliability here means that the terminals are less likely to be subjected to heavy loads or break. Furthermore, by forming the terminals separately on the top and bottom of the substrate, the distance between the first conductor 11 and the second conductor 12 can be increased.

[0023] (2) The semiconductor package 10 is disposed in a through hole 50T that penetrates the wiring substrate 50 in the Z-axis direction. The connection conductor 18 has connection portions with the second surface 52 of the wiring substrate 50 on both sides of the semiconductor package 10 in the X-axis direction. Therefore, by providing connection portions on both sides of the semiconductor package 10 in the X-axis direction and on both sides of the Z-axis direction, deformation above and below the wiring substrate 50 due to temperature changes is balanced, and warping of the wiring substrate 50 can be suppressed.

[0024] (3) The semiconductor package 10 has the signal terminal 17 connected to the first surface 51 of the wiring substrate 50 on the opposite side of the first terminal 16 in the X-axis direction. Therefore, the distance between the first terminal 16 and the signal terminal 17 can be increased.

[0025] (4) The first terminal 16, the connecting conductor 18, and the signal terminal 17 are each connected to the wiring board 50 via multiple paths. This allows for multiple current paths to be distributed, reducing the amount of heat generated. Furthermore, since the connections to the wiring board 50 are distributed across multiple locations, stress per terminal can be reduced. Furthermore, since the number of magnetic force linkages increases as the number of terminals increases, inductance can be significantly reduced.

[0026] (5) The first terminal 16, the connecting conductor 18, and the signal terminal 17 are each formed in a comb-like shape and connected to the wiring board 50. This shortens the current path and reduces inductance.

[0027] (6) The first terminals 16 and the signal terminals 17 are connected to the wiring board 50 at positions where they overlap the terminals of the connecting conductors 18 in the Z-axis direction. Therefore, the wiring board 50 is sandwiched in the Z-axis direction, so deformation due to temperature changes is balanced, and warping of the wiring board 50 can be suppressed.

[0028] (7) The wiring board 50 includes the first main circuit wiring 61 connected to the first terminal 16, the signal wiring 63 connected to the signal terminal 17, and the second main circuit wiring 62 connected to the connecting conductor 18. This allows the components of the power conversion device 100 to be integrated.

[0029] (Variation 1) FIG. 5 is a cross-sectional view of an upper arm element circuit 1U and a lower arm element circuit 1D in a variation. Reference numerals common to those in FIG. 2 are omitted in FIG. 5. The difference from the cross-sectional view of the embodiment shown in FIG. 2 is that the first terminal 16, the signal terminal 17, and the connecting conductor 18 each have a bent terminal bend portion 90. The terminal bend portion 90 changes the position of each terminal in the Z-axis direction. The first terminal 16 has a first terminal bend portion 90-16 with a height H1 in the Z-axis direction. The signal terminal 17 has a signal terminal bend portion 90-17 with a height H2 in the Z-axis direction. The connecting conductor 18 has a first connecting conductor bend portion 90-1 with a height H3 in the Z-axis direction and a second connecting conductor bend portion 90-2 with a height H4 in the Z-axis direction.

[0030] It is desirable that heights H1 and H2 are equal, and that heights H3 and H4 are equal. However, H1 and H3 do not have to be equal. Also, all of the heights H1 to H4 may be different. In this modification, the terminal bending portion 90 reduces the rigidity of each terminal, thereby reducing stress in the terminal connection portion 40.

[0031] Modification 1 provides the following advantageous effects: (8) The first terminals 16, the signal terminals 17, and the connecting conductors 18 each have a terminal bend 90 formed by bending the terminal vertically. Therefore, the terminal bend 90 reduces the rigidity of each terminal, thereby reducing stress in the terminal connection portion 40.

[0032] (Modification 2) Fig. 6 is a plan view of an upper arm element circuit 1U and a lower arm element circuit 1D in Modification 2. Fig. 6 corresponds to Fig. 3 in the embodiment. In the above-described embodiment, the first terminals 16, the signal terminals 17, and the connecting conductors 18 are each comb-shaped, but any other configuration may be used as long as there are multiple paths. For example, the semiconductor package 10 and the wiring board 50 may be connected at an angle rather than along the shortest distance, or the terminals may be bent.

[0033] The above-described embodiments and modifications may be combined with each other. Although various embodiments and modifications have been described above, the present invention is not limited to these. Other embodiments conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention.

[0034] 1: Semiconductor element 1D: Lower arm element circuit 1M: First main electrode 1S: Second main electrode 1U: Upper arm element circuit 10: Semiconductor package 11: First conductor 12: Second conductor 14: Sealing member 16: First terminal 17: Signal terminal 18: Connection conductor 50: Wiring board 50T: Through hole 90: Terminal bending portion 100: Power conversion device

Claims

1. A power conversion device comprising: a semiconductor package incorporating a semiconductor element which constitutes an upper arm or a lower arm of an upper and lower arm circuit; and a wiring board on which the semiconductor package is mounted and having a plurality of wiring layers electrically connected to the semiconductor package, wherein the semiconductor element has a first main electrode and a second main electrode on a surface opposite to the first main electrode, the semiconductor package comprising: a first conductor connected to the first main electrode of the semiconductor element and to a high potential side of the upper and lower arm circuits, a second conductor connected to the second main electrode of the semiconductor element and to a low potential side of the upper and lower arm circuits, and a sealing member which seals the first conductor, the second conductor, and the semiconductor element, wherein the first conductor is connected to a first surface of the wiring board via a first terminal protruding from the sealing member, and the second conductor has an exposed surface exposed from the sealing member on a surface opposite to a side to which the semiconductor element is joined, and further comprising a connecting conductor which electrically connects a second surface of the wiring board which is the surface opposite to the first surface and the exposed surface of the second conductor.

2. A power conversion device as described in claim 1, wherein the semiconductor package is disposed in a through hole penetrating the wiring board in a first direction, and the connecting conductor has a connection portion with the second surface of the wiring board on both sides of the semiconductor package in a second direction perpendicular to the first direction.

3. A power conversion device as described in claim 1, wherein the semiconductor package is disposed in a through hole penetrating the wiring board in a first direction, and the semiconductor package further comprises a signal terminal connected to the first surface of the wiring board on the opposite side to the first terminal in a second direction perpendicular to the first direction.

4. A power conversion device according to claim 3, wherein each of the first terminal, the connection conductor, and the signal terminal is connected to the wiring board by a plurality of paths.

5. A power conversion device according to claim 4, wherein each of the first terminal, the connection conductor and the signal terminal is formed as a comb-teeth-shaped terminal and is connected to the wiring board.

6. A power conversion device according to claim 4, wherein each of the first terminal and the signal terminal is connected to the wiring board at a position where it overlaps a terminal of the connection conductor in the first direction.

7. A power conversion device according to claim 3, wherein the first terminal, the signal terminal and the connecting conductor have terminal bending portions that change the position of each terminal in the first direction.

8. A power conversion device as described in claim 7, wherein the distance in the first direction formed by the terminal bend portion at the first terminal is equal to the distance in the first direction formed by the terminal bend portion at the signal terminal, the connecting conductor has a first connecting conductor bend portion which is the first of the terminal bend portions, and a second connecting conductor bend portion which is the second of the terminal bend portions, on both sides of the semiconductor package in a second direction perpendicular to the first direction, and the distance in the first direction formed by the first connecting conductor bend portion is equal to the distance in the first direction formed by the second connecting conductor bend portion.

Citation Information

Patent Citations

  • Semiconductor device

    JP2018160501A

  • Semiconductor device, power semiconductor module, and power conversion device equipped with power semiconductor module

    WO2011040153A1

  • Semiconductor device and electronic device

    WO2021005916A1

  • Semiconductor device

    WO2023149144A1