High-k dielectric film, ink for high-k dielectric film, and high-k dielectric film production method

Abstract

A high-k dielectric film production method is provided. The high-k dielectric film production method comprises the steps of: preparing an ink comprising an oxide ceramic nanopowder, graphene oxide, and a polymer binder; coating the prepared ink onto a substrate; and light-sintering the ink coated on the substrate by using white light so as to form a ceramic layer on the substrate, wherein the oxide ceramic may undergo a phase transition from cubic to tetragonal through the light-sintering.

Description

HIGH-K dielectric film, ink for HIGH-K dielectric film, and method for manufacturing HIGH-K dielectric film

[0001] The present invention relates to a HIGH-K dielectric film, an ink for a HIGH-K dielectric film, and a method for manufacturing a HIGH-K dielectric film, and more specifically, to a HIGH-K dielectric film, an ink for a HIGH-K dielectric film, and a method for manufacturing a HIGH-K dielectric film having a high dielectric constant through suppression of microcracks.

[0002]

[0003] The need for compact and high-performance electronic components is rapidly increasing as electronic products become more multifunctional and lighter, thinner, and simpler. Furthermore, the use of electronic components requiring high reliability for electrical and industrial applications, such as automobiles and network equipment, is also increasing significantly.

[0004] Competition in technological development of passive components such as inductors, capacitors, and resistors (LCR) to meet market demands is accelerating, and in particular, MLCC (Multi-Layer Ceramic Capacitor), which is a general-purpose passive component with a continuously increasing use and volume, can be said to be a representative field where technological competition among competitors is most fierce.

[0005] Typically, ceramic parts are manufactured by high-temperature sintering of mixed raw material powders at temperatures above 1000°C.

[0006] However, when sintering ceramic oxide nanoparticles through a high-temperature sintering method and using them to manufacture various electronic devices, there is a problem of cracks occurring after sintering due to the inherent brittle nature of the ceramic.

[0007] Additionally, cracks may occur after sintering due to differences in shrinkage behavior between the internal electrode and the dielectric.

[0008] To solve this problem, adding nickel to ceramic materials can reduce the frequency of crack occurrence, but this has limitations in that it does not solve the inherent problem of brittle materials.

[0009] Furthermore, high-temperature sintering methods require temperatures exceeding 1000°C and a sintering time of more than 10 hours. Consequently, high-temperature sintering methods pose the problem of requiring significant energy and time for component manufacturing.

[0010]

[0011] The technical problem to be solved by the present invention is to provide a HIGH-K dielectric film, ink for a HIGH-K dielectric film, and a method for manufacturing a HIGH-K dielectric film having a high dielectric constant through suppression of microcracks.

[0012] The technical problems to be solved by the present invention are not limited to those described above.

[0013] To solve the above technical problem, the present invention provides a HIGH-K dielectric film.

[0014] According to one embodiment, the HIGH-K dielectric film comprises: a substrate; and a ceramic layer formed on the substrate, the ceramic layer comprising a ceramic oxide, wherein the ceramic oxide may have a tetragonal lattice structure.

[0015] According to one embodiment, the ceramic layer may further include graphene oxide having a higher light absorption coefficient than the ceramic oxide.

[0016] According to one embodiment, the particle diameter of the ceramic oxide may be 80 nm to 100 nm, and the particle diameter of the graphene oxide may be 10 nm to 100 nm.

[0017] According to one embodiment, the mass ratio of the graphene oxide to the ceramic oxide may be 0.6 wt% to 20 wt%.

[0018] Meanwhile, the present invention provides an ink for a HIGH-K dielectric film.

[0019] According to one embodiment, the ink for the HIGH-K dielectric film comprises: a ceramic oxide nanopowder; and a polymer binder, wherein the ceramic oxide may have a tetragonal lattice structure.

[0020] According to one embodiment, the ceramic oxide may further include graphene oxide having a higher light absorption coefficient than the ceramic oxide.

[0021] Meanwhile, the present invention provides a method for manufacturing a HIGH-K dielectric film.

[0022] According to one embodiment, the method for manufacturing the HIGH-K dielectric film includes the steps of: preparing an ink including a ceramic oxide nanopowder, graphene oxide, and a polymer binder; coating the prepared ink on a substrate; and photosintering the ink coated on the substrate using white light so that a ceramic layer is formed on the substrate, wherein the ceramic oxide can undergo a phase transition from a cubic to a tetragonal system through the photosintering.

[0023] In one embodiment, the light absorption of the graphene oxide may be higher than that of the ceramic oxide nanopowder during the photosintering.

[0024] According to one embodiment, the particle diameter of the ceramic oxide may be 80 nm to 100 nm, and the particle diameter of the graphene oxide may be 10 nm to 100 nm.

[0025] According to one embodiment, the mass ratio of the graphene oxide to the ceramic oxide may be 0.6 wt% to 20 wt%.

[0026] According to one embodiment, in the step of coating the prepared ink on the substrate, the prepared ink may be coated on the substrate by any one method selected from bar coating, slot die coating, inkjet printing, spray coating, spin-coating, doctor blading, drop-coating, and dip-coating.

[0027] According to one embodiment, the method further includes a step of drying ink coated on the substrate, wherein the step of drying ink coated on the substrate uses one or more of a hot plate, an oven, and an IR (Infrared) lamp to dry ink coated on the substrate, wherein the power of the IR lamp may be 100 to 1000 W / cm2, and the irradiation time may be 1 to 120 seconds.

[0028] According to one embodiment, in the photosintering step, white light is irradiated to the ink using a xenon flash lamp, and the power of the xenon lamp may be 100 to 3600 J / cm2, and the irradiation time may be 1 to 120 seconds.

[0029]

[0030] According to an embodiment of the present invention, a substrate; and a ceramic layer formed on the substrate and made of a ceramic oxide, wherein the ceramic oxide may have a tetragonal lattice structure.

[0031] Accordingly, a HIGH-K dielectric film, an ink for a HIGH-K dielectric film, and a method for manufacturing a HIGH-K dielectric film having a high dielectric constant through suppression of microcracks can be provided.

[0032] In addition, according to an embodiment of the present invention, a HIGH-K dielectric film having a high dielectric constant can be easily and quickly manufactured through low-temperature and rapid sintering.

[0033] For example, according to an embodiment of the present invention, a HIGH-K dielectric film can be mass-produced through a white light sintering process that can be linked to an R2R (Roll to Roll) process.

[0034] In this way, the HIGH-K dielectric film manufactured according to an embodiment of the present invention can be used as a dielectric material for various electronic devices such as MLCC (Multilayer ceramic capacitor), single capacitor, and transistor.

[0035]

[0036] FIG. 1 is a cross-sectional schematic diagram showing a HIGH-K dielectric film according to one embodiment of the present invention.

[0037] FIG. 2 is a flowchart illustrating a method for manufacturing a HIGH-K dielectric film according to an embodiment of the present invention.

[0038] Figure 3 is a reference diagram for explaining step S110 of Figure 2.

[0039] Figure 4 is an exemplary diagram for explaining step S120 of Figure 2.

[0040] Figure 5 is a process schematic diagram for explaining step S130 of Figure 2.

[0041] Figure 6 is an XRD graph of ceramic layers manufactured according to Example 1, Example 2, Comparative Example 1, and Comparative Example 2.

[0042] Figure 7 is a graph showing the change in capacitance according to frequency of a ceramic layer manufactured according to Example 1.

[0043] Figure 8 is a graph showing the change in capacitance according to frequency of a ceramic layer manufactured according to Example 2.

[0044] Figure 9 is a graph showing the change in capacitance according to frequency of a ceramic layer manufactured according to Comparative Example 1.

[0045] Figure 10 is a graph showing the change in capacitance according to frequency of a ceramic layer manufactured according to Comparative Example 2.

[0046] Figure 11 is a photograph taken with an electron microscope of a ceramic layer manufactured according to Example 1-1.

[0047] Figure 12 is a photograph taken with an electron microscope of a ceramic layer manufactured according to Example 1-2.

[0048] Figure 13 is a photograph taken with an electron microscope of a ceramic layer manufactured according to Comparative Example 2-1.

[0049] Figure 14 is an XRD graph of ceramic layers manufactured according to Example 2-1 and Comparative Example 2-1.

[0050] Figure 15 is a graph showing the change in capacitance according to frequency of ceramic layers manufactured according to Example 1-1, Example 1-2, and Comparative Example 2-1.

[0051] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. However, the technical concept of the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided to ensure that the disclosed content is thorough and complete and to sufficiently convey the spirit of the present invention to those skilled in the art.

[0052] In this specification, when a component is referred to as being on another component, it means that it can be formed directly on the other component, or a third component may be interposed between them. Furthermore, in the drawings, shapes and sizes are exaggerated for the purpose of effectively explaining the technical contents.

[0053] Additionally, although terms such as first, second, and third have been used to describe various components in various embodiments of this specification, these components should not be limited by these terms. These terms are only used to distinguish one component from another. Thus, what is referred to as a first component in one embodiment may be referred to as a second component in another embodiment. Each embodiment described and illustrated herein also includes its complementary embodiments. Additionally, the term "and / or" has been used herein to mean including at least one of the components listed before and after.

[0054] In the specification, singular expressions include plural expressions unless the context clearly dictates otherwise. In addition, terms such as "comprise" or "have" are intended to specify the presence of a feature, number, step, component, or combination thereof described in the specification, and should not be construed as excluding the presence or addition of one or more other features, numbers, steps, components, or combinations thereof. In addition, the term "connection" is used in the present specification to mean both indirectly connecting multiple components and directly connecting them.

[0055] In addition, when describing the present invention below, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the gist of the present invention, the detailed description will be omitted.

[0056]

[0057] FIG. 1 is a cross-sectional schematic diagram showing a HIGH-K dielectric film according to one embodiment of the present invention.

[0058]

[0059] As illustrated in FIG. 1, a HIGH-K dielectric film (100) according to an embodiment of the present invention may include a substrate (110) and a ceramic layer (120).

[0060]

[0061] The above substrate (110) provides a base surface for forming a ceramic layer (120). According to one embodiment of the present invention, the substrate (110) may be made of silicon (Si).

[0062]

[0063] The above ceramic layer (120) can be formed on the above substrate (110). The above ceramic layer (120) can be quickly formed on the above substrate (110) through low-temperature rapid sintering, which will be described in more detail below.

[0064] According to one embodiment of the present invention, this ceramic layer (120) may be made of ceramic oxide.

[0065] At this time, the ceramic oxide may have a tetragonal lattice structure. According to one embodiment of the present invention, the ceramic oxide may undergo a phase transition from a cubic to a tetragonal system during light sintering for low-temperature rapid sintering.

[0066] That is, when the ceramic oxide is light-sintered, a cubic lattice structure in which the lattice parameters a, b, and c are all the same can be changed into a tetragonal lattice structure in which the lattice parameters a and b are the same but c has a different value.

[0067] Through this, the ceramic oxide can have a high capacitance. For example, the ceramic oxide can have a capacitance of 1.01×10 at 1 kHz. -9 Capacitance, 2.45×10 at 5 kHz -10 Capacitance and 1.44×10 at 10 kHz -10 It can have capacitance.

[0068] In particular, the capacitance of the ceramic oxide at 1 kHz is approximately 10 times higher than the capacitance of the ceramic oxide having a cubic lattice structure at 1 kHz.

[0069] Accordingly, ceramic oxides having a tetragonal lattice structure can have a high dielectric constant (HIGH-K).

[0070] According to one embodiment of the present invention, the ceramic oxide having a tetragonal lattice structure by undergoing a phase transition from a cubic field by photosintering may be composed of BaTiO3.

[0071] According to one embodiment of the present invention, the ceramic oxide made of BaTiO3 may have an average particle size of 10.437 nm, a lattice constant a and b of 4.005, and a lattice constant c of 4.008, and a tetragonal lattice structure.

[0072] Meanwhile, according to one embodiment of the present invention, the ceramic layer (120) may further include graphene oxide having a higher light absorption coefficient than the ceramic oxide made of BaTiO3.

[0073] Here, the light absorption refers to absorption of white light applied during photosintering. Accordingly, the ceramic layer (120) is based on a ceramic oxide composed of white BaTiO3, and may further include black graphene oxide having a high light absorption coefficient for white light.

[0074] In this way, when black graphene oxide is added to a ceramic oxide composed of white BaTiO3, the efficiency of photosintering under white light irradiation can be further improved.

[0075] According to one embodiment of the present invention, such graphene oxide can alleviate the brittleness of a ceramic oxide made of BaTiO3 and suppress the occurrence of microcracks.

[0076] In addition, the graphene oxide can promote the phase transition of the ceramic oxide, thereby further improving the dielectric constant of the ceramic layer (120).

[0077] For example, the ceramic oxide made of the BaTiO3 and the ceramic layer (120) including the graphene oxide has a density of 5.07×10 at 1 kHz. -9 Capacitance, 1.11×10 at 5 kHz -10 Capacitance and 5.15×10 at 10 kHz -10 It can have capacitance.

[0078] In this way, when graphene oxide is added to the ceramic oxide composed of BaTiO3, it can have a capacitance that is approximately 5 times higher at 1 kHz than a ceramic layer (120) composed only of BaTiO3.

[0079] Accordingly, the ceramic layer (120) made of BaTiO3 having a tetragonal lattice structure and including graphene oxide can have a higher dielectric constant (HIGH-K).

[0080] According to one embodiment of the present invention, a ceramic layer (120) having a tetragonal lattice structure and made of BaTiO3 including graphene oxide may have a tetragonal lattice structure with an average particle size of 10.0049 nm, lattice constants a and b of 3.994, and lattice constant c of 4.000.

[0081] Here, the lattice constant c can further increase in variation due to the graphene oxide during the phase transition by photosintering.

[0082] That is, when the ceramic oxide composed of only BaTiO3 undergoes a phase transition from the cubic to the tetragonal system by light sintering, the lattice constants a and b are 4.005, and the lattice constant c is 4.008, and the difference between the lattice constants a, b, and c is 3, whereas when the ceramic oxide with graphene oxide added to BaTiO3 undergoes a phase transition from the cubic to the tetragonal system by light sintering, the lattice constants a and b are 3.994, and the lattice constant c is 4.000, and the difference between the lattice constants a, b, and c is 6.

[0083] In this way, when graphene oxide is added to BaTiO3, the rate of change in the lattice constant c during the phase transition can be twice as high as when graphene oxide is not added.

[0084] Accordingly, the ceramic layer (120) including graphene oxide can have high capacitance and high dielectric constant (HIGH-K).

[0085] At this time, according to one embodiment of the present invention, the particle diameter of the graphene oxide may be 10% to 125% of the particle diameter of the ceramic oxide made of BaTiO3.

[0086] Here, if the particle diameter of the graphene oxide is less than 10% of the particle diameter of the ceramic oxide made of BaTiO3, the rate of change of the lattice constant c is small when the phase transition is made from the cubic system to the tetragonal system by photo-sintering, so it may be difficult to expect high capacitance and high dielectric constant (HIGH-K).

[0087] In addition, if the particle diameter of the graphene oxide exceeds 125% of the particle diameter of the ceramic oxide made of BaTiO3, sintering of the ceramic oxide made of BaTiO3 may be hindered during light sintering.

[0088] Accordingly, according to one embodiment of the present invention, the particle diameter of the ceramic oxide may be 80 nm to 100 nm. In relation to this, the particle diameter of the graphene oxide may be 10 nm to 100 nm.

[0089] Additionally, according to one embodiment of the present invention, the mass ratio of the graphene oxide to the ceramic oxide made of BaTiO3 may be 0.6 wt% to 20 wt%.

[0090] Here, if the mass ratio of the graphene oxide is less than 0.6 wt% compared to the ceramic oxide made of BaTiO3, it is difficult to expect an improvement in sintering efficiency through graphene oxide having a high light absorption coefficient for white light during photo-sintering, and since the rate of change in the lattice constant c is small during the phase transition from the cubic to the tetragonal system by photo-sintering, it may be difficult to expect high capacitance and high dielectric constant (HIGH-K).

[0091] In addition, if the mass ratio of the graphene oxide exceeds 20 wt% compared to the ceramic oxide made of BaTiO3, the electrical properties of the graphene oxide may be expressed and the dielectric constant may decrease.

[0092] Accordingly, according to one embodiment of the present invention, the ceramic oxide may be included in the ceramic layer (120) in an amount of 5 g to 15 g. In this regard, the graphene oxide may be included in the ceramic layer (120) in an amount of more than 0 g and less than or equal to 1 g.

[0093]

[0094] In this way, the HIGH-K dielectric film (100) according to one embodiment of the present invention has a tetragonal lattice structure and includes a ceramic layer (120) made of BaTiO3, which includes graphene oxide having a high light absorption coefficient, so that brittleness can be alleviated and the occurrence of microcracks can be suppressed, and it can have high capacitance and high dielectric constant (HIGH-K).

[0095] Accordingly, the HIGH-K dielectric film (100) according to one embodiment of the present invention can be used as a dielectric material for various electronic devices such as MLCC (Multilayer ceramic capacitor), single capacitor, and transistor.

[0096]

[0097] Hereinafter, a method for manufacturing a HIGH-K dielectric film according to an embodiment of the present invention will be described with reference to FIGS. 2 to 5.

[0098]

[0099] FIG. 2 is a flowchart illustrating a method for manufacturing a HIGH-K dielectric film according to an embodiment of the present invention, FIG. 3 is a reference diagram for explaining step S110 of FIG. 2, FIG. 4 is an exemplary diagram for explaining step S120 of FIG. 2, and FIG. 5 is a process schematic diagram for explaining step S130 of FIG. 2.

[0100]

[0101] Referring to FIG. 2, a method for manufacturing a HIGH-K dielectric film according to an embodiment of the present invention may include steps S110, S120, and S130.

[0102]

[0103] S110 stage

[0104] Referring to FIGS. 2 and 3, step S110 is a step of preparing ink to be formed into a ceramic layer (120 in FIG. 5).

[0105] To this end, in the above step S110, a mixed solution of ink (121 in Fig. 4) can be prepared by mixing ceramic oxide, graphene oxide, and a polymer binder in a solvent.

[0106] Here, the ceramic oxide may have a tetragonal lattice structure. According to one embodiment of the present invention, the ceramic oxide may undergo a phase transition from a cubic to a tetragonal system during light sintering for low-temperature rapid sintering, which is performed as a subsequent process.

[0107] That is, when the ceramic oxide is light-sintered through the S130 step, which is a subsequent process, a cubic lattice structure in which lattice constants a, b, and c are all the same can be changed into a tetragonal lattice structure in which lattice constants a and b are the same but c has a different value.

[0108] Through this, the ceramic oxide can have high capacitance and high dielectric constant (HIGH-K).

[0109] According to one embodiment of the present invention, the ceramic oxide having a tetragonal lattice structure by undergoing a phase transition from a cubic field by photosintering may be composed of BaTiO3.

[0110] Additionally, the graphene oxide may have a higher light absorption coefficient than a ceramic oxide made of BaTiO3.

[0111] For example, while the ceramic oxide made of BaTiO3 may be white, the graphene oxide may be black in contrast.

[0112] In this way, when black graphene oxide is added to a ceramic oxide composed of white BaTiO3, the efficiency of photosintering under white light irradiation can be further improved.

[0113] Additionally, these graphene oxides can alleviate the brittleness of ceramic oxides made of BaTiO3 and suppress the occurrence of microcracks.

[0114] And the above graphene oxide can further improve the dielectric constant of the ceramic oxide.

[0115] For example, when the graphene oxide is added to the ceramic oxide made of the BaTiO3, the ceramic layer (120 in Fig. 5) formed through photo-sintering has a density of 5.07×10 at 1 kHz. -9 Capacitance, 1.11×10 at 5 kHz -10 Capacitance and 5.15×10 at 10 kHz -10 It can have capacitance.

[0116] At this time, according to one embodiment of the present invention, the particle diameter of the graphene oxide may be 10% to 125% of the particle diameter of the ceramic oxide made of BaTiO3.

[0117] For example, the particle diameter of the ceramic oxide may be 80 nm to 100 nm. In relation to this, the particle diameter of the graphene oxide may be 10 nm to 100 nm.

[0118] Additionally, according to one embodiment of the present invention, the mass ratio of the graphene oxide to the ceramic oxide made of BaTiO3 may be 0.6 wt% to 20 wt%.

[0119] For example, the ceramic oxide may be included in the ceramic layer (120) in an amount of 5 g to 15 g. In this regard, the graphene oxide may be included in the ceramic layer (120) in an amount of more than 0 g and less than or equal to 1 g.

[0120] Meanwhile, the polymer binder may be selected from a group of polymer materials including polyvinyl pyrrolidone (PVP), polyvinyl alcohol (PVA), polyvinyl butyral (PVB), acrylonitrile butadiene-styrene (ABS), ethyl cellulose (EC), polyethylene glycol (PEG), polymethyl methacrylate (PMMA), and dextran resin.

[0121] According to one embodiment of the present invention, polyvinylpyrrolidone (PVP) may be used as the polymer binder. In this case, when 10 g of ceramic oxide nanopowder made of BaTiO3 is mixed into a solvent, 0.15 g of polyvinylpyrrolidone (PVP) may be mixed into the solvent.

[0122] In addition, at least one of ethylene glycol, diethylene glycol, triethylene glycol, polyethylene glycol, propylene glycol, dipropylene glycol, hexylene glycol, glycerin, isopropyl alcohol, 2-methoxy ethanol, pentyl alcohol, hexyl alcohol, butyl alcohol, octyl alcohol, formamide, methyl ethyl ketone, ethyl alcohol, methyl alcohol, and acetone may be used as the solvent.

[0123] In the above step S110, α-terpineol can be further mixed. When 10 g of ceramic oxide nanopowder composed of BaTiO3 is mixed into the solvent, 4 g of α-terpineol can be mixed.

[0124] In the above step S110, ceramic oxide nanopowder made of BaTiO3, graphene oxide, polyvinylpyrrolidone (PVP), and α-terpineol are mixed in a set ratio and then roll milled to manufacture a ceramic oxide-based ink made of BaTiO3 (121 in Fig. 4).

[0125]

[0126] S120 stage

[0127] Referring to FIGS. 2 and 4, the step S120 is a step of coating the ink (121) prepared through the step S110 onto the substrate (110).

[0128] To this end, in the step S120, the prepared ink (121) may be coated on the substrate (110) using any one method selected from bar coating, slot die coating, inkjet printing, spray coating, spin-coating, doctor blading, drop-coating, and dip-coating.

[0129] At this time, a silicon (Si) substrate may be used as the substrate (110) that provides the base surface on which the ink (121) is coated.

[0130]

[0131] Meanwhile, although not shown, the method for manufacturing a HIGH-K dielectric film according to an embodiment of the present invention may further include a step of drying the ink (121) coated on the substrate (110) before performing the step S130.

[0132] In the step of drying the ink (121) coated on the substrate (110), the ink (121) coated on the substrate (110) can be dried using one or more of a hot plate, an oven, and an IR (Infrared) lamp.

[0133] At this time, in the step of drying the ink (121) coated on the substrate (110), the power of the IR lamp can be controlled to 100 to 1000 W / ㎠, and the light irradiation time can be controlled to 1 to 120 seconds.

[0134]

[0135] Step S130

[0136] Referring to FIGS. 2 and 5, step S130 is a step of photosintering ink (121) coated on a substrate (110) using white light. Through this, step S130 can form a ceramic layer (120) on the substrate (110).

[0137] To this end, in the above step S130, extreme white light from a light source (10) can be irradiated onto ink (121) coated on a substrate (110).

[0138] For example, the light source (10) may be a xenon flash lamp. Accordingly, the step S130 may irradiate the ink (121) with extreme white light using the xenon flash lamp.

[0139] At this time, in the above step S130, the power of the xenon lamp can be controlled to 100 to 3600 J / ㎠, and the white light irradiation time can be controlled to 1 to 120 seconds.

[0140] In addition, in the step S130, the pulse width of the extreme white light irradiated from the xenon lamp can be controlled to 0.01 to 100 ms. At this time, the pulse gap of the extreme white light can be controlled to 0.01 to 10 ms. However, this is only an example, and it goes without saying that the pulse width and pulse gap can be controlled in various ranges depending on the process conditions.

[0141] Through this sintering, the ceramic oxide mixed in the ink (121) can undergo a phase transition from the cubic system to the tetragonal system.

[0142] Accordingly, the ceramic layer (120) formed on the substrate (110) through photosintering has a tetragonal lattice structure.

[0143] In this way, when the above step S130 is completed, a HIGH-K dielectric film (100 in FIG. 1) with a ceramic layer (120) formed on the substrate (110) can be manufactured.

[0144] A method for manufacturing a HIGH-K dielectric film according to one embodiment of the present invention can easily and quickly manufacture a HIGH-K dielectric film (100) having a high dielectric constant through rapid sintering performed at low temperature or room temperature.

[0145] For example, a method for manufacturing a HIGH-K dielectric film according to an embodiment of the present invention can be linked to an R2R (Roll to Roll) process by performing a white light sintering process capable of low-temperature rapid sintering, and through this, a HIGH-K dielectric film (100) can be mass-produced.

[0146] A HIGH-K dielectric film (100) manufactured through a HIGH-K dielectric film manufacturing method according to one embodiment of the present invention can have high capacitance.

[0147] For example, a HIGH-K dielectric film (100) manufactured through a HIGH-K dielectric film manufacturing method according to an embodiment of the present invention has a dielectric constant of 5.07×10 at 1 kHz. -9 Capacitance, 1.11×10 at 5 kHz -10 Capacitance and 5.15×10 at 10 kHz -10 It can have capacitance.

[0148] In this way, the HIGH-K dielectric film (100) manufactured through the HIGH-K dielectric film manufacturing method according to one embodiment of the present invention can have high capacitance and high dielectric constant (HIGH-K).

[0149] Accordingly, the HIGH-K dielectric film (100) manufactured through the HIGH-K dielectric film manufacturing method according to one embodiment of the present invention can be used as a dielectric material for various electronic devices such as MLCC (Multilayer ceramic capacitor), single capacitor, transistor, etc.

[0150]

[0151] Example 1

[0152] After mixing BaTiO3 nanopowder and graphene oxide to prepare ink, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through photosintering by irradiating the ink with intense pulsed light (IPL).

[0153]

[0154] Example 2

[0155] After manufacturing ink using BaTiO3 nanopowder, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through photosintering by irradiating the ink with ultraviolet white light.

[0156]

[0157] Comparative Example 1

[0158] After mixing BaTiO3 nanopowder and graphene oxide to prepare ink, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through high-temperature sintering by annealing the ink in a N2 atmosphere.

[0159]

[0160] Comparative Example 2

[0161] After manufacturing ink using BaTiO3 nanopowder, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through high-temperature sintering by annealing the ink in a N2 atmosphere.

[0162]

[0163] Figure 6 is an XRD graph of ceramic layers manufactured according to Example 1, Example 2, Comparative Example 1, and Comparative Example 2.

[0164] Referring to Figure 6, in the case of Example 1, it was confirmed that the cubic peak appearing around 31.3° was slightly reduced.

[0165]

[0166] Note Average particle size (Scherrer equation) Lattice parameter a = bc Example 1 10.049 nm 3.99 4.000 Comparative example 19.58 10 nm 4.00 7 4.007 Example 2 10.437 nm 4.00 5 4.008 Comparative example 2 11.209 nm 4.00 9 4.009

[0167] Referring to Table 1 above, in the case of Example 1, it was confirmed that through photo-sintering, the average particle size was 10.0049 nm, and the lattice constants a and b were 3.994, and the lattice constant c was 4.000, resulting in a tetragonal lattice structure. That is, in the case of Example 1, it was confirmed that a phase transition occurred from the cubic system to the tetragonal system through photo-sintering.

[0168] In the case of Example 2, it was confirmed through optical sintering that it had a tetragonal lattice structure with an average particle size of 10.437 nm, lattice constants a and b of 4.005, and lattice constant c of 4.008. That is, it was confirmed that Example 2 also underwent a phase transition from a cubic system to a tetragonal system through optical sintering, similar to Example 1.

[0169] On the other hand, in the case of Comparative Example 1, it was confirmed that the material had a cubic lattice structure with an average particle size of 9.5810 nm and lattice constants a, b, and c all being 4.007 through high-temperature sintering. That is, in the case of Comparative Example 1, it was confirmed that no phase transition occurred through high-temperature sintering.

[0170] In the case of Comparative Example 2, it was confirmed that the material had a cubic lattice structure with an average particle size of 11.209 nm and lattice constants a, b, and c all being 4.009 through high-temperature sintering. In other words, it was confirmed that, like Comparative Example 1, no phase transition occurred through high-temperature sintering in Comparative Example 2.

[0171]

[0172] FIG. 7 is a graph showing the capacitance change according to frequency of a ceramic layer manufactured according to Example 1, FIG. 8 is a graph showing the capacitance change according to frequency of a ceramic layer manufactured according to Example 2, FIG. 9 is a graph showing the capacitance change according to frequency of a ceramic layer manufactured according to Comparative Example 1, and FIG. 10 is a graph showing the capacitance change according to frequency of a ceramic layer manufactured according to Comparative Example 2.

[0173]

[0174] Note 1㎑5㎑10㎑Example 15.07×10 -9 1.11×10 -9 5.15×10 -10 Example 21.01×10 -9 2.45×10 -10 1.44×10 -10 Comparative example 11.88×10 -10 2.88×10 -10 1.87×10 -10 Comparative example 24.95×10 -10 3.97×10 -10 2.82×10 -10

[0175] Referring to FIGS. 7 to 10 and Table 2 above, it was confirmed that Examples 1 and 2, in which a ceramic layer was formed through light sintering, had higher capacitance at all frequencies than Comparative Examples 1 and 2, in which a ceramic layer was formed through high-temperature sintering.

[0176] In particular, Example 1, which mixed graphene oxide, was confirmed to have the highest capacitance.

[0177] Thus, it can be inferred that the reason why Examples 1 and 2, in which the ceramic layer was formed through optical sintering, have higher capacitance at all frequencies than Comparative Examples 1 and 2, in which the ceramic layer was formed through high-temperature sintering, is because the change in crystal structure from cubic to tetragonal through optical sintering affected the capacitance.

[0178]

[0179] Example 1-1

[0180] After mixing 10 g of BaTiO3 nanopowder and 0.3 g of graphene oxide to prepare ink, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through photosintering by irradiating the ink with ultraviolet white light. At this time, 400 shots (#400) of white light were irradiated, and the power at this time was controlled to 3600 J / cm2.

[0181]

[0182] Example 1-2

[0183] After mixing 10 g of BaTiO3 nanopowder and 0.1 g of graphene oxide to prepare ink, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through photosintering by irradiating the ink with ultraviolet white light. At this time, the ultraviolet white light was irradiated 400 shots (#400), and the power at this time was controlled to 3600 J / cm2.

[0184]

[0185] Example 2-1

[0186] After manufacturing ink using 10 g of BaTiO3 nanopowder, the ink was coated on a substrate, and a ceramic layer was formed on the substrate through photosintering by irradiating the ink with ultraviolet white light. At this time, ultraviolet white light was irradiated 400 shots (#400), and the power at this time was controlled to 3600 J / cm2.

[0187]

[0188] Comparative Example 2-1

[0189] After preparing ink using 10 g of BaTiO3 nanopowder, the ink was coated on a substrate, and then a ceramic layer was formed on the substrate through high-temperature sintering of the ink at 1100°C for 4 hours.

[0190]

[0191] Fig. 11 is a photograph taken with an electron microscope of a ceramic layer manufactured according to Example 1-1, Fig. 12 is a photograph taken with an electron microscope of a ceramic layer manufactured according to Example 1-2, and Fig. 13 is a photograph taken with an electron microscope of a ceramic layer manufactured according to Comparative Example 2-1.

[0192]

[0193] Referring to FIGS. 11 to 13, it was confirmed that the ceramic layer manufactured through Example 1-2, in which 10 g of BaTiO3 nanopowder and 0.1 g of graphene oxide were mixed to manufacture ink, the ink was coated on a substrate, and then the ink was irradiated with ultraviolet white light, showed the best sintering progress.

[0194]

[0195] Figure 14 is an XRD graph of ceramic layers manufactured according to Example 2-1 and Comparative Example 2-1.

[0196] That is, Fig. 14 shows the BaTiO3 nanopowder according to light sintering and high-temperature sintering without adding graphene oxide. This is the result of analyzing the crystallinity using XRD.

[0197] Referring to Fig. 14, the XRD peak of BaTiO3 was confirmed to have a relatively greater intensity of the peak in Comparative Example 2-1, in which ink was prepared using 10 g of BaTiO3 nanopowder, the ink was coated on a substrate, and a ceramic layer was formed on the substrate through high-temperature sintering of the ink at 1100°C for 4 hours, than in Example 2-1, which was light-sintered. Here, base represents the BaTiO3 film before sintering.

[0198]

[0199] Figure 15 is a graph showing the change in capacitance according to frequency of ceramic layers manufactured according to Example 1-1, Example 1-2, and Comparative Example 2-1.

[0200] Referring to Fig. 15, Example 1-1, in which ink was prepared by mixing 10 g of BaTiO3 nanopowder and 0.3 g of graphene oxide, the ink was coated on a substrate, and a ceramic layer was formed on the substrate through photosintering by irradiating the ink with ultraviolet white light at a power of 3600 J / cm2 for 400 shots (#400), was confirmed to have the highest capacitance.

[0201]

[0202] While the present invention has been described in detail using preferred embodiments, the scope of the present invention is not limited to the specific embodiments described above, and should be interpreted in accordance with the appended claims. Furthermore, those skilled in the art will appreciate that numerous modifications and variations are possible without departing from the scope of the present invention.

Claims

1. Description; and A ceramic layer formed on the above-mentioned substrate and comprising a ceramic oxide; The above ceramic oxide is a HIGH-K dielectric film having a tetragonal lattice structure.

2. In paragraph 1, The ceramic layer is a HIGH-K dielectric film further comprising graphene oxide having a higher light absorption coefficient than the ceramic oxide.

3. In paragraph 2, A HIGH-K dielectric film, wherein the particle diameter of the ceramic oxide is 80 nm to 100 nm, and the particle diameter of the graphene oxide is 10 nm to 100 nm.

4. In paragraph 2, A HIGH-K dielectric film having a mass ratio of the graphene oxide to the ceramic oxide of 0.6 wt% to 20 wt%.

5. Ceramic oxide nano powder; and A polymer binder; including: The above ceramic oxide ink for a HIGH-K dielectric film has a tetragonal lattice structure.

6. In paragraph 5, An ink for a HIGH-K dielectric film further comprising graphene oxide having a higher light absorption coefficient than the above ceramic oxide.

7. A step of preparing an ink including ceramic oxide nanopowder, graphene oxide, and a polymer binder; A step of coating the prepared ink on a substrate; and A step of sintering ink coated on the substrate using white light so that a ceramic layer is formed on the substrate; A method for manufacturing a HIGH-K dielectric film, wherein the ceramic oxide undergoes a phase transition from a cubic to a tetragonal system through the above-described light sintering.

8. In paragraph 7, A method for manufacturing a HIGH-K dielectric film, wherein the light absorption of the graphene oxide is higher than that of the ceramic oxide nano powder during the above-mentioned photosintering.

9. In paragraph 7, A method for manufacturing a HIGH-K dielectric film, wherein the particle diameter of the ceramic oxide is 80 nm to 100 nm, and the particle diameter of the graphene oxide is 10 nm to 100 nm.

10. In paragraph 7, A method for manufacturing a HIGH-K dielectric film, wherein the mass ratio of the graphene oxide to the ceramic oxide is 0.6 wt% to 20 wt%.

11. In paragraph 7, A method for manufacturing a HIGH-K dielectric film, wherein in the step of coating the prepared ink on a substrate, the prepared ink is coated on the substrate by any one method selected from bar coating, slot die coating, inkjet printing, spray coating, spin coating, doctor blading, drop coating, and dip coating.

12. In paragraph 7, Further comprising a step of drying the ink coated on the above substrate, In the step of drying the ink coated on the substrate, the ink coated on the substrate is dried using one or more of a hot plate, an oven, and an IR (Infrared) lamp. A method for manufacturing a HIGH-K dielectric film, wherein the power of the IR lamp is 100 to 1000 W / ㎠ and the irradiation time is 1 to 120 seconds.

13. In paragraph 7, In the above-mentioned photosintering step, white light is irradiated to the ink using a xenon flash lamp. A method for manufacturing a HIGH-K dielectric film, wherein the power of the above xenon lamp is 100 to 3600 J / cm2 and the irradiation time is 1 to 120 seconds.

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