Flexible circuit board, cof module, and electronic device comprising same

Abstract

This flexible circuit board includes: a substrate; a conductive pattern on the substrate; and a protective layer on the conductive pattern. The conductive pattern includes a first circuit pattern connected to the circuit board, a second circuit pattern connected to a display panel, and a plurality of outermost patterns. The outermost patterns include at least one of a circuit pattern and a dummy pattern. The substrate includes a first direction in which the display panel and the circuit board face each other and a second direction perpendicular to the first direction. The plurality of outermost patterns include a first outermost pattern and a second outermost pattern which are arranged in the outermost portion in the second direction. The protective layer includes a first end which is one end in the first direction. The first outermost pattern includes a first protruding portion, the second outermost pattern includes a third protruding portion, and the first end overlaps the first protruding portion and the third protruding portion.

Description

Flexible circuit boards, COF modules and electronic devices including the same

[0001] The present invention relates to a flexible circuit board, a COF module and an electronic device including the same.

[0002] Recently, various electronic products are becoming thinner and smaller. Consequently, there is a growing demand for high-density semiconductor chips to be mounted within the narrow spaces of these electronic products.

[0003] A COF (Chip-On-Film) comprises a substrate and a chip on the substrate. The substrate is flexible, meaning the COF is a flexible circuit board. Accordingly, the COF is applicable to flexible displays. For example, the COF can be applied to various wearable electronic devices. Furthermore, the COF has a fine pitch, meaning that the COF is applicable to high-resolution displays.

[0004] The chip includes a semiconductor chip. For example, the chip may be an integrated circuit (IC) chip or a large scale integrated circuit (LSI) chip.

[0005] The chip is connected to an external circuit board and display panel via a circuit pattern. For example, pads are arranged at one end and the other end of the circuit pattern, respectively. One pad is electrically connected to a terminal of the chip. The other pad is connected to a terminal of the circuit board and the display panel. Accordingly, the chip, the circuit board, and the display panel are electrically connected via the COF. As a result, a signal is transmitted to the display panel via the circuit pattern.

[0006] A protective layer is disposed on the circuit pattern. The protective layer is disposed on an area excluding the area where the pad portion is disposed.

[0007] The above protective layer is formed by a squeegee process. During the process, variations in the protective layer may occur. Specifically, the protective layer may not be positioned at the desired location, but instead may be positioned at an undesired location. Accordingly, the protective layer may not be positioned on some wiring portions of the circuit pattern. Furthermore, the protective layer may be positioned on some pad portions of the circuit pattern.

[0008] Therefore, a new structure of flexible circuit board, COF module and electronic device including the same that can solve the above problems are required.

[0009] As a patent related to the above flexible circuit board, Korean registered patent KR10-0618898 (2006.09.01) is disclosed.

[0010] The present invention provides a flexible circuit board having improved reliability and a COF module including the same.

[0011] A flexible circuit board according to an embodiment comprises: a substrate; a conductive pattern on the substrate; and a protective layer on the conductive pattern, wherein the conductive pattern comprises a first circuit pattern connected to a circuit board; a second circuit pattern connected to a display panel; and a plurality of outermost patterns, wherein the outermost patterns comprise at least one of a circuit pattern and a dummy pattern, wherein the substrate comprises a first direction in which the display panel and the circuit board face each other and a second direction perpendicular to the first direction, wherein the plurality of outermost patterns comprise a first outermost pattern and a second outermost pattern arranged at the outermost portion in the second direction, wherein the protective layer comprises a first end which is one end in the first direction, wherein the first outermost pattern comprises a first protrusion, and wherein the second outermost pattern comprises a third protrusion, wherein the first end overlaps the first protrusion and the third protrusion.

[0012] In addition, the first circuit pattern includes a first pad portion connected to the chip, a second pad portion, and a first wiring portion connecting the first pad portion and the second pad portion, the second circuit pattern includes a third pad portion, a fourth pad portion, and a second wiring portion connecting the third pad portion and the fourth pad portion, the first outermost pattern includes a fifth pad portion, a sixth pad portion, and a 3-1 wiring portion connecting the fifth pad portion and the sixth pad portion, and the second outermost pattern includes a seventh pad portion, an eighth pad portion, and a 3-2 wiring portion connecting the seventh pad portion and the eighth pad portion.

[0013] In addition, the protective layer further includes a second end which is the other end in the first direction, the first outermost pattern includes a second protrusion, the second outermost pattern includes a fourth protrusion, the first protrusion and the second protrusion face each other in the first direction, the third protrusion and the fourth protrusion face each other in the first direction, and the second end overlaps the second protrusion and the fourth protrusion.

[0014] In addition, the first protrusion includes a first-first protrusion, a first-second protrusion, and a first-third protrusion, the second protrusion includes a second-first protrusion, a second-second protrusion, and a second-third protrusion, the third protrusion includes a third-first protrusion, a third-second protrusion, and a third-third protrusion, and the fourth protrusion includes a fourth-first protrusion, a fourth-second protrusion, and a fourth-third protrusion.

[0015] In addition, the 1-1 protrusion is connected to the 5th pad portion, the 1-2 protrusion is connected to the 3-1 wiring portion, the 1-3 protrusion is arranged between the 1-1 protrusion and the 1-2 protrusion, the distance between the 1-1 protrusion and the 1-3 protrusion and the distance between the 1-2 protrusion and the 1-3 protrusion are 50 μm to 150 μm, and the first end overlaps the 1-3 protrusion.

[0016] In addition, the 3-1 protrusion is connected to the 7th pad portion, the 3-2 protrusion is connected to the 3-2 wiring portion, the 3-3 protrusion is disposed between the 3-1 protrusion and the 3-2 protrusion, the distance between the 3-1 protrusion and the 3-3 protrusion and the distance between the 3-2 protrusion and the 3-3 protrusion are 50 μm to 150 μm, and the first end overlaps the 3-3 protrusion.

[0017] In addition, the 2-1 protrusion is connected to the 6th pad portion, the 2-2 protrusion is connected to the 3-1 wiring portion, the 2-3 protrusion is disposed between the 2-1 protrusion and the 2-2 protrusion, the distance between the 2-1 protrusion and the 2-3 protrusion and the distance between the 2-2 protrusion and the 2-3 protrusion are 50 µm to 150 µm, and the second end overlaps the 2-3 protrusion.

[0018] In addition, the 4-1 protrusion is connected to the 8th pad portion, the 4-2 protrusion is connected to the 3-2 wiring portion, the 4-3 protrusion is disposed between the 4-1 protrusion and the 4-2 protrusion, the distance between the 4-1 protrusion and the 4-3 protrusion and the distance between the 4-2 protrusion and the 4-3 protrusion are 50 µm to 150 µm, and the second end overlaps the 4-3 protrusion.

[0019] Additionally, the first circuit pattern includes an outermost pattern, the second circuit pattern includes an outermost pattern, the outermost pattern of the first circuit pattern includes a fifth protrusion, the outermost pattern of the second circuit pattern includes a sixth protrusion, the fifth protrusion includes a 5-1 protrusion, a 5-2 protrusion, and a 5-3 protrusion, and the sixth protrusion includes a 6-1 protrusion, a 6-2 protrusion, and a 6-3 protrusion.

[0020] In addition, the 5-1 protrusion is connected to the first pad portion, the 5-2 protrusion is connected to the first wiring portion, the 5-3 protrusion is disposed between the 5-1 protrusion and the 5-2 protrusion, the 6-1 protrusion is connected to the third pad portion, the 6-2 protrusion is connected to the second wiring portion, and the 6-3 protrusion is disposed between the 6-1 protrusion and the 6-2 protrusion.

[0021] Additionally, the protective layer includes a third end adjacent to the first pad portion and a fourth end adjacent to the third pad portion, the third end overlapping the 5-3 protrusion, and the fourth end overlapping the 6-3 protrusion.

[0022] Additionally, the substrate includes a first surface and a second surface opposite to the first surface, the first circuit pattern is disposed on the first surface, and the second circuit pattern is disposed on the first surface and the second surface.

[0023] A flexible circuit board according to an embodiment includes a first outermost pattern and a second outermost pattern.

[0024] The first outermost pattern and the second outermost pattern each include a plurality of protrusions. The first and second ends of the protective layer are aligned by the protrusions. That is, whether the first and second ends are aligned can be confirmed by at least one of the protrusions.

[0025] Additionally, when the alignment of the first end and the second end of the protective layer is misaligned, the position of the protective layer can be adjusted by the protrusions. That is, the positions of the first end and the second end can be adjusted by at least one of the protrusions.

[0026] Accordingly, the flexible circuit board according to the embodiment can align the protective layer without a separate alignment pattern. Furthermore, if the alignment of the protective layer is misaligned, the position of the protective layer can be easily adjusted through the protrusion.

[0027] Accordingly, since the protective layer is placed at a desired location, the protective layer can be prevented from being placed on the wiring portion or the protective layer can be prevented from being placed on the pad portion.

[0028] Therefore, the flexible circuit board according to the embodiment can have improved reliability.

[0029] Additionally, the flexible circuit board includes an outermost pattern. The outermost pattern is defined as a pattern that includes an area closest to the cutting line.

[0030] On the first surface, an outermost pattern including at least one of the circuit pattern and the dummy pattern is arranged. On the second surface, an outermost pattern including at least one of the circuit pattern and the dummy pattern is arranged.

[0031] The first protective layer and the second protective layer are disposed on the outermost pattern on the first surface and the second surface.

[0032] The distance between the end of the first protective layer and the cutting line may be different from the distance between the second protective layer and the cutting line. Accordingly, the distance between the end of the first protective layer and the end of the second protective layer varies.

[0033] The embodiment controls the distance between the end of the first protective layer and the end of the second protective layer within a set range.

[0034] Accordingly, the circuit pattern on the first side or the second side can be prevented from being exposed to the outside of the protective layer. Accordingly, the flexible circuit board according to the embodiment has improved reliability.

[0035] Figure 1 is a top view of a flexible circuit board according to the first embodiment.

[0036] Figure 2 is an enlarged view of area A of Figure 1.

[0037] Figure 3 is an enlarged view of area B of Figure 1.

[0038] Figure 4 is an enlarged view of area C of Figure 1.

[0039] Figure 5 is an enlarged view of area D of Figure 1.

[0040] Figure 6 is an enlarged view of area E of Figure 1.

[0041] Figure 7 is an enlarged view of area F of Figure 1.

[0042] Figure 8 is an enlarged view of area G of Figure 1.

[0043] Figure 9 is an enlarged view of area H of Figure 1.

[0044] Figures 10 and 11 are cross-sectional views taken along the AA' area of ​​Figure 1.

[0045] Figure 12 is a top view of a flexible circuit board according to the second embodiment.

[0046] Fig. 13 is a bottom view of a flexible circuit board according to the second embodiment.

[0047] Figure 14 is a drawing showing an enlarged view of area A of Figure 12.

[0048] Figure 15 is a drawing showing an enlarged view of area B of Figure 12.

[0049] Figure 16 is a drawing showing an enlarged view of area C of Figure 13.

[0050] Figure 17 is a drawing showing an enlarged view of area D of Figure 13.

[0051] Figure 18 is a drawing to explain problems caused by differences in the area of ​​the protective layer.

[0052] Figures 19 to 21 are cross-sectional views taken along the AA' area of ​​Figure 12.

[0053] Figures 22 and 23 are cross-sectional views taken along the BB' area of ​​Figure 12.

[0054] Fig. 24 is a drawing for explaining the connection of the COF module and other members according to the first embodiment.

[0055] Fig. 25 is a drawing for explaining the connection of a COF module and other members according to the second embodiment.

[0056] FIGS. 26 to 28 are drawings of electronic devices including flexible circuit boards according to embodiments.

[0057] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. However, the technical concept of the present invention is not limited to the described embodiments, but may be implemented in various different forms. Within the scope of the technical concept of the present invention, one or more of the components of the embodiments may be selectively combined or substituted for use.

[0058] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0059] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as “and (and) at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C.

[0060] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components, and are not intended to limit the nature, order, or sequence of the components.

[0061] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0062] Additionally, when it is described as being formed or disposed "above or below" each component, above or below includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or disposed between the two components.

[0063] Additionally, when expressed as “upper or lower,” it can include the meaning of not only the upward direction but also the downward direction based on one component.

[0064] In the following description, the first direction (1D) is the direction in which the display panel and the circuit board face each other. In addition, the second direction (2D) is the direction perpendicular to the first direction (1D).

[0065]

[0066] Below, with reference to the drawings, a flexible circuit board and a COF module including the same according to an embodiment are described.

[0067] Referring to FIG. 1, a flexible circuit board (1000) according to an embodiment includes a substrate (100), a conductive pattern, and a protective layer (300).

[0068] The above-mentioned substrate (100) includes a first surface (1S) and a second surface (2S) opposite to the first surface (1S). The conductive pattern and the protective layer (300) are arranged on the first surface (1S).

[0069] The substrate (100) includes a cutting line (CL). The flexible circuit board (1000) is cut along the cutting line (CL). For example, the conductive pattern, the protective layer, and the chip are placed on the substrate (100). Thereafter, the substrate (100) is cut along the cutting line (CL). Accordingly, a COF module is manufactured. Accordingly, the edge of the COF module becomes the cutting line (CL).

[0070] The above-mentioned substrate (100) includes an effective area (AA) and an ineffective area (UA). In detail, the first surface (1S) includes the effective area (AA) and the ineffective area (UA).

[0071] The above valid area (AA) and the non-valid area (UA) are separated by the cutting line (CL). The valid area (AA) is an area inside the cutting line (CL). In addition, the non-valid area (UA) is an area outside the cutting line (CL).

[0072] The conductive pattern, the protective layer, and the chip are arranged on the effective area (AA). In addition, a dummy pattern and a sprocket hole (SH) are arranged on the ineffective area (UA). The dummy pattern increases the strength of the substrate (100). In addition, the flexible circuit board (1000) is rolled or unrolled in a roll-to-roll manner by the sprocket hole (SH).

[0073] The above substrate (100) includes a chip mounting area (CHA). The chip mounting area (CHA) is disposed on the first surface (1S). The chip mounting area (CHA) is disposed on the effective area (AA). The chip (CH) is disposed on the chip mounting area (CHA). In addition, the pad portions of the conductive pattern are disposed inside the chip mounting area (CHA). In addition, the protective layer (300) is not disposed on the chip mounting area (CHA).

[0074] The substrate (100) includes a flexible material. For example, the substrate (100) may include polyimide (PI). However, the embodiment is not limited thereto. The substrate (100) may include a polymer material including polyethylene terephthalate (PET) or polyethylene naphthalate (PEN). Accordingly, the flexible circuit board can be applied to various electronic devices, including curved display devices.

[0075] The substrate (100) may have a thickness of 20 μm to 100 μm. For example, the substrate (100) may have a thickness of 25 μm to 50 μm. For example, the substrate (100) may have a thickness of 30 μm to 40 μm. When the thickness of the substrate (100) exceeds 100 μm, the overall thickness of the flexible circuit board increases. As a result, the flexible characteristics of the flexible circuit board may be reduced. In addition, when the thickness of the substrate (100) is less than 20 μm, the substrate (100) may be damaged by heat and pressure applied to the substrate when the chip is mounted on the flexible circuit board.

[0076] The conductive pattern and the protective layer (300) are disposed on the substrate (100). In detail, the conductive pattern and the protective layer (300) are disposed on the first surface (1S). In detail, the conductive pattern and the protective layer (300) are disposed on at least one of the effective area (AA) and the non-effective area (UA).

[0077] The above conductive pattern includes a circuit pattern. The circuit pattern includes a first circuit pattern (210) and a second circuit pattern (220).

[0078] Referring to Fig. 1, the first circuit pattern (210) includes a first wiring portion (211), a first pad portion (212a), and a second pad portion (212b). The first wiring portion (211), the first pad portion (212a), and the second pad portion (212b) may include the same material. In addition, the first wiring portion (211), the first pad portion (212a), and the second pad portion (212b) may be formed integrally.

[0079] The first pad portion (212a) is positioned within the chip mounting area (CHA). Accordingly, the first pad portion (212a) is connected to the terminal of the chip. As a result, the first circuit pattern (210) and the chip are connected.

[0080] The second pad portion (212b) is positioned outside the chip mounting area (CHA). The second pad portion (212b) is connected to the pad portion of the circuit board (3000). As a result, the first circuit pattern (210) and the circuit board (3000) are connected.

[0081] The first wiring portion (211) is arranged between the first pad portion (212a) and the second pad portion (212b). The first wiring portion (211) connects the first pad portion (212a) and the second pad portion (212b). Accordingly, the chip (CH) and the circuit board (3000) are connected. Accordingly, a signal generated from the chip (CH) is transmitted to the circuit board (3000).

[0082] The first circuit pattern (210) may further include a test pad portion. Specifically, a first test pad portion (TP1) is arranged in the non-effective area (UA). The first wiring portion (211), the first pad portion (212a), the second pad portion (212b), and the first test pad portion (TP1) may be formed integrally.

[0083] Before connecting the circuit board and the second pad portion (212b), the first circuit pattern (210) can be tested by the first test pad portion (TP1). For example, whether the first circuit pattern is open or shorted can be checked through the first test pad portion (TP1).

[0084] The second circuit pattern (220) includes a second wiring portion (221), a third pad portion (222a), and a fourth pad portion (222b). The second wiring portion (221), the third pad portion (222a), and the fourth pad portion (222b) may include the same material. In addition, the second wiring portion (221), the third pad portion (222a), and the fourth pad portion (222b) may be formed integrally.

[0085] The third pad portion (222a) is positioned within the chip mounting area (CHA). Accordingly, the third pad portion (222a) is connected to the terminal of the chip. As a result, the second circuit pattern (220) and the chip (CH) are connected.

[0086] The fourth pad portion (222b) is positioned outside the chip mounting area (CHA). The fourth pad portion (222b) is connected to the pad portion of the external display panel (4000). As a result, the second circuit pattern (220) and the display panel (4000) are connected.

[0087] The second wiring portion (221) is arranged between the third pad portion (222a) and the fourth pad portion (222b). The second wiring portion (221) connects the third pad portion (222a) and the fourth pad portion (222b). Accordingly, the chip (CH) and the display panel (4000) are connected. Accordingly, a signal generated from the chip (CH) is transmitted to the display panel (4000).

[0088] The second circuit pattern (220) may further include a test pad portion. In detail, a second test pad portion (TP2) is arranged in the non-effective area (UA). The second test pad portion (TP2) is arranged outside the cutting line (CL). The second test pad portion (TP2) is arranged on the non-effective area (UA). The second wiring portion (221), the third pad portion (222a), the fourth pad portion (222b), and the second test pad portion (TP2) may be formed integrally.

[0089] Before connecting the circuit board and the fourth pad portion (222b), the second circuit pattern (220) can be tested by the second test pad portion (TP2). For example, whether the second circuit pattern is open or shorted can be checked through the second test pad portion (TP2).

[0090] The protective layer (300) is disposed on the effective area of ​​the first surface (1S). The protective layer (300) is disposed on the first surface (1S). Accordingly, the protective layer (300) is disposed on the first circuit pattern (210) and the second circuit pattern (220). The protective layer (300) is disposed on the first wiring portion (211), the second wiring portion (221), and the third wiring portion (231). The protective layer (300) is not disposed on the first pad portion (212a), the second pad portion (212b), the third pad portion (222a), and the fourth pad portion (222b). In addition, the protective layer (300) is not disposed on the chip mounting area (CHA).

[0091] The conductive pattern includes an outermost pattern (231, 232). The outermost pattern may include a first outermost pattern (231) and a second outermost pattern (232).

[0092] The first outermost pattern (231) may be arranged on the left outermost side of the flexible circuit board (1000). The second outermost pattern (232) may be arranged on the right outermost side of the flexible circuit board (1000).

[0093] The first outermost pattern (231) and the second outermost pattern (232) may be circuit patterns. In detail, the first outermost pattern (231) and the second outermost pattern (232) may be circuit patterns through which signals or currents move.

[0094] Alternatively, the first outermost pattern (231) and the second outermost pattern (232) may be dummy patterns. In detail, the first outermost pattern (231) and the second outermost pattern (232) may be dummy patterns through which no signal or current flows.

[0095] Alternatively, one of the first outermost pattern (231) and the second outermost pattern (232) may be a circuit pattern, and the other outermost pattern may be a dummy pattern.

[0096] When the first outermost pattern (231) and the second outermost pattern (232) are circuit patterns, the first outermost pattern (231) and the second outermost pattern (231) may each include a wiring portion and a pad portion.

[0097] Hereinafter, it will be described as an example that the first outermost pattern (231) and the second outermost pattern (232) are circuit patterns.

[0098] The first outermost pattern (231) and the second outermost pattern (232) are arranged at the outermost side in the second direction (2D). The first outermost pattern (231) may include a third-first wiring portion (231a), a fifth pad portion (231b), and a sixth pad portion (231c). In addition, the second outermost pattern (232) may include a third-second wiring portion (232a), a seventh pad portion (232b), and an eighth pad portion (232c).

[0099] In Fig. 1, the fifth pad portion (231b) and the seventh pad portion (232b) are connected to the circuit board, and the sixth pad portion (231c) and the eighth pad portion (232c) are connected to the display panel.

[0100] However, the embodiment is not limited thereto. At least one of the first outermost pattern (231) and the second outermost pattern (231) may further include an additional pad portion connected to the chip.

[0101] Below, Fig. 1 is described as an example.

[0102] The protective layer (300) includes ends facing each other in the first direction (1D). Specifically, the protective layer (300) includes a first end (E1) adjacent to the second pad portion (212b) and a second end (E2) adjacent to the fourth pad portion (222b).

[0103] The first end (E1) may be one end of the protective layer (300) in the first direction (1D). In addition, the second end (E2) may be the other end of the protective layer (300) in the first direction (1D).

[0104] The first end (E1) and the second end (E2) of the protective layer (300) are aligned by the outermost patterns (231, 232).

[0105] Referring to FIGS. 2 to 5, the first outermost pattern includes a first protrusion (P1-1) and a second protrusion (P1-2).

[0106] The first protrusion (P1-1) includes a plurality of protrusions. In detail, the first protrusion (P1-1) includes a first-first protrusion (P1-1a), a first-second protrusion (P1-1b), and a first-third protrusion (P1-1c).

[0107] The above 1-1 protrusion (P1-1a), the 1-2 protrusion (P1-1b), and the 1-3 protrusion (P1-1c) are each connected to different parts.

[0108] The first-first protrusion (P1-1a) is connected to the fifth pad portion (231b). The first-second protrusion (P1-1b) is connected to the third-first wiring portion (231a). The first-third protrusion (P1-1c) is connected to the third-first wiring portion (231a) and the fifth pad portion (231b).

[0109] Accordingly, the first-third protrusion (P1-1c) is disposed between the first-first protrusion (P1-1a) and the first-second protrusion (P1-1b). The first-third protrusion (P1-1c) may be disposed at the center between the first-first protrusion (P1-1a) and the first-second protrusion (P1-1b). Accordingly, the distance (D1-1a) between the first-first protrusion (P1-1a) and the first-third protrusion (P1-1c) may be equal to or similar to the distance (D1-1b) between the first-second protrusion (P1-1b) and the first-third protrusion (P1-1c).

[0110] For example, the distance (D1-1a) and the distance (D1-1b) may be 50 µm to 150 µm, 70 µm to 130 µm, or 90 µm to 110 µm.

[0111] The second protrusion (P1-2) includes a plurality of protrusions. Specifically, the second protrusion (P1-2) includes a second-first protrusion (P1-2a), a second-second protrusion (P1-2b), and a second-third protrusion (P1-2c).

[0112] The above 2-1 protrusion (P1-2a), the 2-2 protrusion (P1-2b), and the 2-3 protrusion (P1-2c) are each connected to different parts.

[0113] The above 2-1 protrusion (P1-2a) is connected to the 6th pad portion (231c). The above 2-2 protrusion (P1-2b) is connected to the 3-1 wiring portion (231a). The above 2-3 protrusion (P1-2c) is connected to the 3-1 wiring portion (231a) and the 6th pad portion (231c).

[0114] Accordingly, the 2-3 protrusion (P1-2c) is disposed between the 2-1 protrusion (P1-2a) and the 2-2 protrusion (P1-2b). The 2-3 protrusion (P1-2c) may be disposed at the center between the 2-1 protrusion (P1-2a) and the 2-2 protrusion (P1-2b). Accordingly, the distance (D1-2a) between the 2-1 protrusion (P1-2a) and the 2-3 protrusion (P1-2c) may be equal to or similar to the distance (D1-2b) between the 1-2 protrusion (P1-1b) and the 1-3 protrusion (P1-1c).

[0115] For example, the distance (D1-2a) and the distance (D1-2b) may be 50 µm to 150 µm, 70 µm to 130 µm, or 90 µm to 110 µm.

[0116] The second outermost pattern includes a third protrusion (P2-1) and a fourth protrusion (P2-2).

[0117] The third protrusion (P2-1) includes a plurality of protrusions. Specifically, the third protrusion (P2-1) includes a third-first protrusion (P2-1a), a third-second protrusion (P2-1b), and a third-third protrusion (P2-1c).

[0118] The above 3-1 protrusion (P2-1a), the 3-2 protrusion (P2-1b), and the 3-3 protrusion (P2-1c) are each connected to different parts.

[0119] The third-first protrusion (P2-1a) is connected to the seventh pad portion (232b). The third-second protrusion (P2-1b) is connected to the third-second wiring portion (232a). The third-third protrusion (P2-1c) is connected to the third-second wiring portion (232a) and the seventh pad portion (232b).

[0120] Accordingly, the third-third protrusion (P2-1c) is disposed between the third-first protrusion (P2-1a) and the third-second protrusion (P2-1b). The third-third protrusion (P2-1c) may be disposed at the center between the third-first protrusion (P2-1a) and the third-second protrusion (P2-1b). Accordingly, the distance (D2-1a) between the third-first protrusion (P2-1a) and the third-third protrusion (P2-1c) may be equal to or similar to the distance (D2-1b) between the third-second protrusion (P2-1b) and the third-third protrusion (P2-1c).

[0121] For example, the distance (D2-1a) and the distance (D2-1b) may be 50 µm to 150 µm, 70 µm to 130 µm, or 90 µm to 110 µm.

[0122] The third protrusion (P2-1) faces the first protrusion (P1-1) in the second direction. In detail, the first-first protrusion (P1-1a) and the third-first protrusion (P2-1a) overlap in the second direction (2D), the first-second protrusion (P1-1b) and the third-second protrusion (P2-1b) overlap in the second direction (2D), and the first-third protrusion (P1-1c) and the third-third protrusion (P2-1c) overlap in the second direction (2D).

[0123] The fourth protrusion (P2-2) includes a plurality of protrusions. Specifically, the fourth protrusion (P2-2) includes a fourth-first protrusion (P2-2a), a fourth-second protrusion (P2-2b), and a fourth-third protrusion (P2-2c).

[0124] The above 4-1 protrusion (P2-2a), the 4-2 protrusion (P2-2b), and the 4-3 protrusion (P2-2c) are each connected to different parts.

[0125] The 4-1 protrusion (P2-2a) is connected to the 8th pad portion (232c). The 4-2 protrusion (P1-2b) is connected to the 3-2 wiring portion (232a). The 4-3 protrusion (P2-2c) is connected to the 3-2 wiring portion (232a) and the 8th pad portion (232c).

[0126] Accordingly, the 4-3 protrusion (P2-2c) is disposed between the 4-1 protrusion (P2-2a) and the 4-2 protrusion (P2-2b). The 4-3 protrusion (P2-2c) may be disposed at the center between the 4-1 protrusion (P2-2a) and the 4-2 protrusion (P2-2b). Accordingly, the distance (D2-2a) between the 4-1 protrusion (P2-2a) and the 4-3 protrusion (P2-2c) may be equal to or similar to the distance (D2-2b) between the 3-2 protrusion (P2-1b) and the 3-3 protrusion (P2-1c).

[0127] For example, the distance (D2-2a) and the distance (D2-2b) may be 50 µm to 150 µm, 70 µm to 130 µm, or 90 µm to 110 µm.

[0128] The fourth protrusion (P2-2) faces the second protrusion (P1-2) in the second direction. In detail, the second-first protrusion (P1-2a) and the fourth-first protrusion (P2-2a) overlap in the second direction (2D), the second-second protrusion (P1-2b) and the fourth-second protrusion (P2-2b) overlap in the second direction (2D), and the second-third protrusion (P1-2c) and the fourth-third protrusion (P2-2c) overlap in the second direction (2D).

[0129] The ends of the above protective layer (300) are aligned by the above protrusions.

[0130] In detail, the first end (E1) is aligned by the first protrusion (P1-1) and the third protrusion (P2-1). The first end (E1) is aligned to overlap with the first-third protrusion (P1-1c) and the third-third protrusion (P2-1c). If the first end (E1) overlaps with both the first-third protrusion (P1-1c) and the third-third protrusion (P2-1c), the first end (E1) is determined to be aligned.

[0131] If the first end (E1) does not overlap with at least one of the first-third protrusion (P1-1c) and the third-third protrusion (P2-1c), the first end (E1) is determined to be unaligned.

[0132] In this case, the alignment of the first end (E1) is adjusted by the first-first protrusion (P1-1a), the first-second protrusion (P1-1b), the third-first protrusion (P2-1a), and the third-second protrusion (P2-1b).

[0133] For example, if the first end (E1) is located between the first-first protrusion (P1-1a) and the first-third protrusion (P1-1c) and between the third-first protrusion (P2-1a) and the third-third protrusion (P1-1c), the first end (E1) is tilted downward, so the position of the first end (E1) is adjusted upward.

[0134] Alternatively, if the first end (E1) is located between the first-second protrusion (P1-1b) and the first-third protrusion (P1-1c) and between the third-second protrusion (P2-1b) and the third-third protrusion (P2-1c), the first end (E1) is tilted upward, and therefore the position of the first end (E1) is adjusted downward.

[0135] That is, the alignment of the protective layer can be confirmed by the 1-3 protrusion (P1-1c) and the 3-3 protrusion (P2-1c), and the alignment position of the protective layer can be adjusted by the 1-1 protrusion (P1-1a), the 1-2 protrusion (P1-1b), the 3-1 protrusion (P2-1a), and the 3-2 protrusion (P2-1b).

[0136]

[0137] The second end (E2) is aligned by the second protrusion (P1-2) and the fourth protrusion (P2-2). The second end (E2) is aligned to overlap with the second-third protrusion (P1-2c) and the fourth-third protrusion (P2-2c). If the second end (E2) overlaps with both the second-third protrusion (P1-2c) and the fourth-third protrusion (P2-2c), the second end (E2) is determined to be aligned.

[0138] If the second end (E2) does not overlap with at least one of the second-third protrusion (P1-2c) and the fourth-third protrusion (P2-2c), the second end (E2) is determined to be unaligned.

[0139] In this case, the alignment of the second end (E2) is adjusted by the second-first protrusion (P1-2a), the second-second protrusion (P1-2b), the fourth-first protrusion (P2-2a), and the fourth-second protrusion (P2-2b).

[0140] For example, if the second end (E2) is located between the second-first protrusion (P1-2a) and the second-third protrusion (P1-2c) and between the fourth-first protrusion (P2-2a) and the fourth-third protrusion (P1-2c), the second end (E2) is tilted upward, so the position of the second end (E2) is adjusted downward.

[0141] Alternatively, if the second end (E2) is located between the second-second protrusion (P1-2b) and the second-third protrusion (P1-2c) and between the fourth-second protrusion (P2-2b) and the fourth-third protrusion (P2-2c), the second end (E2) is tilted downward, and therefore the position of the second end (E2) is adjusted upward.

[0142] That is, the alignment of the protective layer can be confirmed by the 2-3 protrusion (P1-2c) and the 4-3 protrusion (P2-2c), and the alignment position of the protective layer can be adjusted by the 2-1 protrusion (P1-2a), the 2-2 protrusion (P1-2b), the 4-1 protrusion (P2-2a), and the 4-2 protrusion (P2-2b).

[0143]

[0144] A flexible circuit board according to an embodiment includes a first outermost pattern and a second outermost pattern.

[0145] The first outermost pattern and the second outermost pattern each include a plurality of protrusions. The first and second ends of the protective layer are aligned by the protrusions. That is, whether the first and second ends are aligned can be confirmed by at least one of the protrusions.

[0146] Additionally, when the alignment of the first end and the second end of the protective layer is misaligned, the position of the protective layer can be adjusted by the protrusions. That is, the positions of the first end and the second end can be adjusted by at least one of the protrusions.

[0147] Accordingly, the flexible circuit board according to the embodiment can align the protective layer without a separate alignment pattern. Furthermore, if the alignment of the protective layer is misaligned, the position of the protective layer can be easily adjusted through the protrusion of the protective layer.

[0148] Accordingly, since the protective layer is placed at a desired location, the protective layer can be prevented from being placed on the wiring portion or the protective layer can be prevented from being placed on the pad portion.

[0149] Therefore, the flexible circuit board according to the embodiment can have improved reliability.

[0150]

[0151] Referring to FIGS. 6 and 7, the first circuit pattern (210) includes an outermost pattern (210a). The outermost pattern (210a) is arranged on the outermost left and right sides of the first circuit pattern (210).

[0152] The outermost pattern (210a) of the first circuit pattern (210) includes a fifth protrusion (P3-1).

[0153] The fifth protrusion (P3-1) includes a plurality of protrusions. In detail, the fifth protrusion (P1-1) includes a fifth-first protrusion (P3-1a), a fifth-second protrusion (P3-1b), and a fifth-third protrusion (P3-1c).

[0154] The above 5-1 protrusion (P3-1a), the 5-2 protrusion (P3-1b), and the 5-3 protrusion (P3-1c) are each connected to different parts.

[0155] The above 5-1 protrusion (P3-1a) is connected to the first pad portion (212a). The above 5-2 protrusion (P3-1b) is connected to the first wiring portion (211). The above 5-3 protrusion (P3-1c) is connected to the first wiring portion (211) and the first pad portion (212a).

[0156] Accordingly, the 5-3rd protrusion (P3-1c) is disposed between the 5-1st protrusion (P3-1a) and the 5-2nd protrusion (P3-1b). The 5-3rd protrusion (P3-1c) may be disposed at the center between the 5-1st protrusion (P3-1a) and the 5-2nd protrusion (P3-1b). Accordingly, the distance (D3-1a) between the 5-1st protrusion (P3-1a) and the 5-3rd protrusion (P3-1c) may be the same as or similar to the distance (D3-1b) between the 5-2nd protrusion (P3-1b) and the 5-3rd protrusion (P3-1c).

[0157] For example, the distance (D3-1a) and the distance (D3-1b) may be 50 µm to 150 µm, 70 µm to 130 µm, or 90 µm to 110 µm.

[0158] The outermost pattern (220a) of the second circuit pattern (220) includes a sixth protrusion (P3-2).

[0159] The sixth protrusion (P3-2) includes a plurality of protrusions. In detail, the sixth protrusion (P3-2) includes a 6-1 protrusion (P3-2a), a 6-2 protrusion (P3-2b), and a 6-3 protrusion (P3-2c).

[0160] The above 6-1 protrusion (P3-2a), the 6-2 protrusion (P3-2b), and the 6-3 protrusion (P3-2c) are each connected to different parts.

[0161] The above 6-1 protrusion (P3-2a) is connected to the third pad portion (222a). The above 6-2 protrusion (P3-2b) is connected to the second wiring portion (221). The above 6-3 protrusion (P3-2c) is connected to the second wiring portion (221) and the third pad portion (222a).

[0162] Accordingly, the 6-3 protrusion (P3-2c) is disposed between the 6-1 protrusion (P3-2a) and the 6-2 protrusion (P3-2b). The 6-3 protrusion (P3-2c) may be disposed at the center between the 6-1 protrusion (P3-2a) and the 6-2 protrusion (P3-2b). Accordingly, the distance (D3-2a) between the 6-1 protrusion (P3-2a) and the 6-3 protrusion (P3-2c) may be equal to or similar to the distance (D3-2b) between the 5-2 protrusion (P3-1b) and the 5-3 protrusion (P3-1c).

[0163] For example, the distance (D3-2a) and the distance (D3-2b) may be 50 µm to 150 µm, 70 µm to 130 µm, or 90 µm to 110 µm.

[0164]

[0165] The above protective layer (300) includes a third end (E3) adjacent to the first pad portion (212a) and a fourth end (E4) adjacent to the third pad portion (222a).

[0166] The third end (E3) and the fourth end (E4) of the protective layer (300) are aligned by the outermost patterns (210a, 220a).

[0167] In detail, the third end (E1) is aligned by the fifth protrusion (P1-1). The third end (E3) is aligned so as to overlap with the 5-3 protrusion (P1-1c). If the third end (E3) overlaps with all of the 5-3 protrusions (P3-1c), the third end (E3) is determined to be aligned.

[0168] If the third end (E3) does not overlap with at least one of the 5-3 protrusions (P1-1c), the third end (E3) is determined to be unaligned.

[0169] In this case, the alignment of the third end (E3) is adjusted by the 5-1 protrusion (P1-1a) and the 5-2 protrusion (P1-1b).

[0170] For example, if the third end (E3) is located between the 5-1 protrusion (P3-1a) and the 5-3 protrusion (P3-1c), the first end (E1) is tilted upward, so the position of the third end (E3) is adjusted downward.

[0171] Alternatively, if the third end (E3) is located between the 5-2 protrusion (P3-1b) and the 5-3 protrusion (P1-1c), the third end (E3) is tilted downward, so the position of the third end (E3) is adjusted upward.

[0172] That is, the alignment of the protective layer can be confirmed by the 5-3 protrusion (P1-1c), and the alignment position of the protective layer can be adjusted by the 5-1 protrusion (P1-1a) and the 5-2 protrusion (P1-1b).

[0173]

[0174] The fourth end (E4) is aligned by the sixth protrusion (P3-2). The fourth end (E4) is aligned so as to overlap with the 6-3 protrusion (P3-2c). If the fourth end (E4) overlaps with all of the 6-3 protrusions (P3-2c), the fourth end (E4) is determined to be aligned.

[0175] If the fourth end (E4) does not overlap with at least one of the 6-3 protrusions (P1-2c), the fourth end (E4) is determined to be unaligned.

[0176] In this case, the alignment of the fourth end (E4) is adjusted by the 6-1 protrusion (P3-2a) and the 6-2 protrusion (P3-2b).

[0177] For example, if the fourth end (E4) is located between the 6-1 protrusion (P3-2a) and the 6-3 protrusion (P3-2c), the first end (E1) is tilted downward, so the position of the fourth end (E4) is adjusted upward.

[0178] Alternatively, if the fourth end (E4) is located between the 6-2 protrusion (P3-2b) and the 6-3 protrusion (P3-2c), the fourth end (E4) is tilted upward, so the position of the fourth end (E4) is adjusted in the downward direction.

[0179] That is, the alignment of the protective layer can be confirmed by the 6-3 protrusion (P3-2c), and the alignment position of the protective layer can be adjusted by the 6-1 protrusion (P1-2a) and the 6-2 protrusion (P1-2b).

[0180]

[0181] Referring to FIGS. 10 and 11, the circuit pattern is formed in a multilayer structure. FIGS. 10 and 11 are described focusing on the first circuit pattern. The following description applies equally to the second and third circuit patterns.

[0182] Referring to Fig. 10, the first circuit pattern is formed in multiple layers. In detail, the first wiring portion (211), the first pad portion (212a), and the second pad portion (212b) include a buffer layer (205), a metal layer (201), and a bonding layer (203).

[0183] The buffer layer (205) may include multiple layers. Specifically, the buffer layer (205) includes a first buffer layer (205a) and a second buffer layer (205b). The first buffer layer (205a) is disposed on the substrate (100). The second buffer layer (205b) is disposed on the first buffer layer (205a).

[0184] The first buffer layer (205a) includes a material having good adhesion to the substrate (100). For example, the first buffer layer (205a) may include nickel (Ni). In addition, the second buffer layer (205b) includes a material having good adhesion to the circuit pattern. For example, the second buffer layer (205b) may include chromium (Cr).

[0185] The above buffer layer (205) may have a thin film thickness in nanometer units. For example, the above buffer layer (205) may have a thickness of 20 nm or less.

[0186] The adhesion between the substrate (100) and the circuit pattern is improved by the buffer layer (205).

[0187] The metal layer (201) is disposed on the buffer layer (205). Specifically, the metal layer (201) is disposed on the second buffer layer (205b). The metal layer (201) includes a metal material. For example, the metal layer (201) may include copper (Cu).

[0188] The above metal layer (201) can be formed by electroplating using the buffer layer as a seed layer. That is, the above metal layer (201) can be a plating layer.

[0189] The thickness of the above metal layer (201) may be 10 µm to 30 µm.

[0190] The above bonding layer (203) is placed on the above metal layer (201).

[0191] The above bonding layer (203) is arranged on the side and upper surface of the metal layer (201). For example, the bonding layer (203) may be arranged to surround the metal layer (201).

[0192] The above bonding layer (203) includes a metal. For example, the bonding layer (203) may include tin (Sn). The bonding layer (203) is formed by a plating process. In detail, the bonding layer (203) may be a plating layer.

[0193] The thickness of the above bonding layer (203) may be 0.3 µm to 0.7 µm. The tin content may increase as it extends from the lower surface to the upper surface of the above bonding layer (203).

[0194] That is, the bonding layer (203) is in contact with the metal layer (201). Therefore, the tin content increases from the lower surface of the bonding layer (203) toward the upper surface. In addition, the copper content decreases from the lower surface of the bonding layer (203) toward the upper surface.

[0195] Accordingly, pure tin may remain in a thickness range of 0.1 µm to 0.3 µm from the upper surface of the bonding layer (203).

[0196] The pad portion can be easily bonded to the terminals of the chip, the circuit board, and the display panel by the bonding layer (203). For example, when heat and pressure are applied to the pad portion, the upper surface of the bonding layer melts. Pure tin remains on the upper surface of the bonding layer. Therefore, the pad portion can be easily bonded to the terminals of the chip, the circuit board, and the display panel.

[0197]

[0198] Referring to Fig. 11, the metal layer (201) may include a first metal layer (201a) and a second metal layer (201b). The first metal layer (201a) is disposed on the buffer layer (205). The second metal layer (201b) is disposed on the first metal layer (201a). The second metal layer (201b) may be formed by electroplating using the first metal layer (201a) as a seed layer. That is, the second metal layer (201b) may be a plating layer.

[0199] The thickness of the first metal layer (201a) may be smaller than the thickness of the second metal layer (201b).

[0200] For example, the thickness of the first metal layer (201a) may be 0.7 µm to 2 µm, and the thickness of the second metal layer (201b) may be 6 µm to 25 µm.

[0201] The first metal layer (201a) and the second metal layer (201b) may include the same metal material. For example, the first metal layer (201a) and the second metal layer (201b) may include copper (Cu).

[0202] The above bonding layer (203) may include a first bonding layer (203a) and a second bonding layer (203b).

[0203] The first bonding layer (203a) is disposed on the metal layer (201). In detail, the first bonding layer (203a) is disposed on the second wiring portion (221), the third pad portion (222a), and the fourth pad portion (222b).

[0204] The second bonding layer (203b) is disposed on the first bonding layer (203a). In detail, the second bonding layer (203b) is disposed on the third pad portion (222a) and the fourth pad portion (222b).

[0205] Accordingly, the second wiring portion (221) includes the buffer layer (205), the metal layer (201), and the first bonding layer (203a). In addition, the third pad portion (222a) and the fourth pad portion (222b) include the buffer layer (205), the metal layer (201), the first bonding layer (203a), and the second bonding layer (203b).

[0206] Accordingly, the layer structure of the second wiring portion (221) is different from the layer structures of the first pad portion (212a) and the second pad portion (212b).

[0207] The first bonding layer (203a) and the second bonding layer (203b) contain metal. In detail, the first bonding layer (203a) and the second bonding layer (203b) may contain tin (Sn).

[0208] The first bonding layer (203a) and the second bonding layer (203b) are arranged with different thicknesses. Specifically, the thickness of the second bonding layer (203b) is greater than the thickness of the first bonding layer (203a).

[0209] For example, the first bonding layer (203a) has a thickness of 0.02 μm to 0.06 μm. In addition, the second bonding layer (203b) has a thickness of 0.2 μm to 0.6 μm.

[0210] Accordingly, the thickness of the first wiring portion (211) is reduced. The flexible circuit board includes a bending area (BA) that is bent in one area. The wiring portion is arranged on the bending area (BA). Accordingly, the thickness of the bonding layer on the wiring portion is formed to be small. Accordingly, when the flexible circuit board is bent, cracks can be prevented from forming in the first wiring portion (211).

[0211] The thickness of the circuit pattern may be greater than 8 μm to 25 μm. Specifically, the thickness of the circuit pattern may be 9 μm to 20 μm. Specifically, the thickness of the circuit pattern may be 10 μm to 15 μm.

[0212] If the thickness of the circuit pattern is less than 8 μm, the resistance of the circuit pattern may increase. Furthermore, when a high current flows through the display panel, the circuit pattern may be damaged. If the thickness of the circuit pattern exceeds 25 μm, it becomes difficult to implement a fine pattern.

[0213]

[0214] Hereinafter, a flexible circuit board, a COF module, and an electronic device including the same according to an embodiment will be described with reference to the drawings.

[0215] Hereinafter, a flexible circuit board according to a second embodiment will be described. In the description of the flexible circuit board of the second embodiment, descriptions that are substantially the same as those of the first embodiment will be omitted. The flexible circuit board of the first embodiment is a single-sided flexible circuit board having a structure in which circuit patterns are arranged on only one side of the substrate (100). In contrast, the flexible circuit board of the second embodiment may be a double-sided flexible circuit board having a structure in which circuit patterns are arranged on both sides of the substrate (100).

[0216]

[0217] FIG. 12 is a top view of a flexible circuit board according to a second embodiment, FIG. 13 is a bottom view of a flexible circuit board according to the second embodiment, FIG. 14 is a drawing showing an enlarged view of area A of FIG. 12, FIG. 15 is a drawing showing an enlarged view of area B of FIG. 12, FIG. 16 is a drawing showing an enlarged view of area C of FIG. 13, FIG. 17 is a drawing showing an enlarged view of area D of FIG. 13, and FIG. 18 is a drawing for explaining a problem due to a difference in the area of ​​a protective layer, and FIGS. 19 to 21 are cross-sectional views taken along area AA' of FIG. 12, and FIGS. 22 and 23 are cross-sectional views taken along area BB' of FIG. 12.

[0218] Referring to FIGS. 12 to 17, a flexible circuit board (1000) according to an embodiment includes a substrate (100), a circuit pattern, and a protective layer.

[0219] The substrate (100) includes a first surface (1S) and a second surface (2S) opposite to the first surface (1S). A circuit pattern and a protective layer are disposed on the first surface (1S) and the second surface (2S).

[0220] The substrate (100) includes a cutting line (CL). The substrate (100) may include an effective area (AA) and an ineffective area (UA). The substrate (100) includes a chip mounting area (CHA).

[0221] The circuit pattern may include a first circuit pattern (210), a second circuit pattern (220), and a third circuit pattern (230). The protective layer may include a first protective layer (310) and a second protective layer (320).

[0222] Referring to FIGS. 12 and 14, a first circuit pattern (210) is disposed on a first surface (1S). The first circuit pattern (210) includes a first wiring portion (211), a first pad portion (212a), and a second pad portion (212b). The first wiring portion (211), the first pad portion (212a), and the second pad portion (212b) may include the same material. The first wiring portion (211), the first pad portion (212a), and the second pad portion (212b) may be formed integrally.

[0223] The first pad portion (212a) is positioned within the chip mounting area (CHA). Accordingly, the first pad portion (212a) is connected to the terminal of the chip. As a result, the first circuit pattern (210) and the chip are connected.

[0224] The second pad portion (212b) is positioned outside the chip mounting area (CHA). The second pad portion (212b) is connected to a terminal of an external circuit board. As a result, the first circuit pattern (210) and the circuit board are connected.

[0225] The second pad portion (212b) may be a first test pad portion. Specifically, the first circuit board may be tested before connecting the circuit board and the second pad portion (212b). For example, the second pad portion (212b) may be used to check whether the first circuit pattern is open or shorted.

[0226] The first wiring section (211) is positioned between the first pad section (212a) and the second pad section (212b). The first wiring section (211) connects the first pad section (212a) and the second pad section (212b). Accordingly, the chip and the circuit board are connected. Accordingly, signals generated from the chip are transmitted to the circuit board.

[0227] A first protective layer (310) is disposed on the first circuit pattern (210). The first protective layer (310) is disposed on the first wiring portion (211). The first protective layer (310) is not disposed on the first pad portion (212a) and the second pad portion (212b).

[0228] Referring to FIGS. 12, 13, 15, and 16, a second circuit pattern (220) is disposed on the first surface (1S) and the second surface (2S). The second circuit pattern (220) includes a second wiring portion (221a, 221b), a third pad portion (222a), a fourth pad portion (222b), and a first via (V1). The second wiring portion (221a, 221b), the third pad portion (222a), and the fourth pad portion (222b) may include the same material. In addition, the second wiring portion (221a, 221b), the third pad portion (222a), and the fourth pad portion (222b) may be formed integrally.

[0229] A first protective layer (310) and a second protective layer (320) are disposed on the second wiring portion (221a, 221b). The first protective layer (310) and the second protective layer (320) are not disposed on the third pad portion (222a) and the fourth pad portion (222b).

[0230] The third pad portion (222a) is positioned on the first surface (1S). The third pad portion (222a) is positioned within the chip mounting area (CHA). Accordingly, the third pad portion (222a) is connected to the terminal of the chip. As a result, the second circuit pattern (220) and the chip are connected.

[0231] The fourth pad portion (222b) is positioned on the second surface (2S). The fourth pad portion (222b) is connected to a terminal of an external display panel. As a result, the second circuit pattern (220) and the display panel are connected.

[0232] The second wiring section includes a second-first wiring section (221a) and a second-second wiring section (221b). The second-first wiring section (221a) is disposed on the first surface (1S). The second-second wiring section (221b) is disposed on the second surface (2S). The second wiring sections (221a, 221b) connect the third pad section (222a) and the fourth pad section (222b). Specifically, the second-first wiring section (221a) is connected to the third pad section (222a). The second-second wiring section (221b) is connected to the fourth pad section (222b).

[0233] Accordingly, the chip and the display panel are connected. Therefore, signals generated from the chip are transmitted to the display panel.

[0234] A first protective layer (310) and a second protective layer (320) are disposed on the second circuit pattern (220). Specifically, the first protective layer (310) is disposed on the second circuit pattern (220) on the first surface (1S). The second protective layer (320) is disposed on the second circuit pattern (220) on the second surface (2S). The first protective layer (310) and the second protective layer (320) are not disposed on the third pad portion (222a) and the fourth pad portion (222b).

[0235] The 2-1 wiring portion (221a) and the 2-2 wiring portion (221b) are connected. The 2-1 wiring portion (221a) and the 2-2 wiring portion (221b) are connected through a first via (V1). The first via (V1) penetrates the first surface (1S) and the second surface (2S). Accordingly, the first via (V1) is arranged on the first surface (1S) and the second surface (2S). The first via (V1) on the first surface (1S) and the first via (V1) on the second surface (2S) are arranged at positions corresponding to each other.

[0236] The first via (V1) includes a first via land (VL1) and a first via hole (VH1). The first via hole (VH1) is formed inside the first via land (VL1). The first via land (VL1) includes the same material as the second wiring portions (221a, 221b). A conductive material is disposed in the first via hole (VH1). Accordingly, the second-first wiring portion (221a) and the second-second wiring portion (221b) are electrically connected.

[0237] The second circuit pattern (220) may include a second test pad portion (TP2). The second test pad portion (TP2) may be disposed on the second surface (2S). The second test pad portion (TP2) may be disposed in an unactive area (UA). A second protective layer (320) is not disposed on the second test pad portion (TP2). The second test pad portion (TP2) may be connected to the 2-2 wiring portion (221b). In detail, the second test pad portion (TP2) and the 2-2 wiring portion (221b) may be formed integrally.

[0238] Before connecting the display panel and the fourth pad portion (222b), the second circuit pattern (220) can be tested. For example, whether the second circuit pattern is open or shorted can be checked through the second test pad portion (TP2).

[0239] Referring to FIGS. 12, 13, 14, and 17, a third circuit pattern (230) is disposed on the first surface (1S) and the second surface (2S). The third circuit pattern (230) includes a third wiring portion (231), a fifth pad portion (232a), a sixth pad portion (232b), and a second via (V2). The third wiring portion (231), the fifth pad portion (232a), and the sixth pad portion (232b) may include the same material. In addition, the third wiring portion (231), the fifth pad portion (232a), and the sixth pad portion (232b) may be formed integrally.

[0240] The fifth pad portion (232a) is positioned on the first surface (1S). The fifth pad portion (232a) is positioned within the chip mounting area (CHA). Accordingly, the fifth pad portion (232a) is connected to the terminal of the chip. As a result, the third circuit pattern (230) and the chip are connected.

[0241] The sixth pad portion (232b) is positioned on the second surface (2S). The sixth pad portion (232b) is connected to a terminal of the display panel. Thus, the third circuit pattern (230) and the display panel are connected.

[0242] The third wiring section (231) connects the fifth pad section (232a) and the sixth pad section (232b). Accordingly, the chip and the display panel are connected. Accordingly, signals generated from the chip are transmitted to the display panel.

[0243] A second protective layer (320) is disposed on the third circuit pattern (230). The second protective layer (320) is disposed on the third circuit pattern (230) on the second surface (2S). The second protective layer (320) is not disposed on the sixth pad portion (232b).

[0244] The fifth pad portion (232a) and the third wiring portion (231) are connected. In detail, the fifth pad portion (232a) and the third wiring portion (231) are connected through the second via (V2). The second via (V2) penetrates the first surface (1S) and the second surface (2S). Accordingly, the second via (V2) is arranged on the first surface (1S) and the second surface (2S). The second via (V2) on the first surface (1S) and the second via (V2) on the second surface (2S) are arranged at positions corresponding to each other.

[0245] The second via (V2) includes a second via land (VL2) and a second via hole (VH2). The second via land (VL2) includes the same material as the third wiring portion (231). The second via hole (VH2) is formed inside the second via land (VL2). A conductive material is disposed in the second via hole (VH2). Accordingly, the fifth pad portion (232a) and the third wiring portion (231) are electrically connected.

[0246] The third circuit pattern (230) may include a third test pad portion (TP3). The third test pad portion (TP3) may be disposed on the second surface (2S). The third test pad portion (TP3) may be disposed on an unactive area (UA). In addition, the second protective layer (320) is not disposed on the third test pad portion (TP3). The third test pad portion (TP3) may be connected to the third wiring portion (231). In detail, the third test pad portion (TP3) may be formed integrally with the third wiring portion (231).

[0247] Before connecting the display panel and the sixth pad portion (232b), the third circuit pattern (230) can be tested. For example, whether the third circuit pattern is open or shorted can be checked through the third test pad portion (TP3).

[0248] Although not shown in the drawing, the circuit pattern may further include additional circuit patterns. For example, the circuit pattern may further include a power supply pattern. The power gap pattern may be connected to terminals of the circuit board and terminals of the display panel. This allows power to be transmitted to the circuit board and the display panel.

[0249] The flexible circuit board (1000) may further include a dummy pattern (240). The dummy pattern (240) may be positioned on an active area (AA) and an unactive area (UA). The dummy pattern on the unactive area (UA) increases the strength of the substrate (100). The dummy pattern (240) on the active area (AA) improves the uniformity of the circuit pattern. In detail, the width, thickness, and spacing of the circuit pattern may be made uniform by the dummy pattern (240).

[0250] The dummy pattern (240) is not a pattern through which a signal moves. The dummy pattern (240) is not connected to the terminals of the circuit board and the terminals of the display panel.

[0251] The protective layer includes a first protective layer (310) and a second protective layer (320). The first protective layer is disposed on the first surface (1S). The second protective layer (320) is disposed on the second surface (2S).

[0252] The first protective layer (310) is disposed on the circuit pattern on the first surface (1S). Specifically, the first protective layer (310) is disposed on the first circuit pattern (210) and the second circuit pattern (220) on the first surface (1S). The second protective layer (320) is disposed on the second circuit pattern (220) and the third circuit pattern (230) on the second surface (2S).

[0253] The first protective layer (310) and the second protective layer (320) are sequentially placed. For example, after placing one protective layer, it can be flipped over and another protective layer can be placed on the other side.

[0254] The first protective layer (310) and the second protective layer (320) may be arranged in different areas. Therefore, the substrate may be bent when forming the protective layer. Accordingly, the circuit pattern may be exposed to the outside of the protective layer.

[0255] The protective layer (310, 320) is applied in a first direction (1D). Pad portions are arranged in a second direction (2D) of the flexible circuit board. Accordingly, when the protective layer (310, 320) is applied in the second direction, a defect in the pad portion may occur due to a process error. A wiring portion or a dummy pattern is arranged in the first direction (1D) of the flexible circuit board. Accordingly, process freedom is secured in the first direction (1D) of the flexible circuit board. Therefore, the protective layer (310, 320) is applied in the first direction.

[0256] Referring to Fig. 18, a first protective layer (310) and a second protective layer (320) are disposed on the substrate (100). The first protective layer (310) is disposed on the first surface (1S). The second protective layer (320) is disposed on the second surface (2S).

[0257] The protective layers (310, 320) are sequentially arranged. For example, after forming the first protective layer (310) on the first surface (1S), the second protective layer (320) is formed on the second surface (2S).

[0258] The first protective layer (310) is formed with a first width (W1). The first width (W1) is the width in the first direction (1D). The second protective layer (320) is formed with a second width (W2). The second width (W2) is the width in the second direction (2D).

[0259] When the second width (W2) is greater than the first width (W1), the substrate (100) may warp. Specifically, when the second width (W2) is greater than the first width (W1), the second protective layer (320) is also disposed on the first surface (1S) where the first protective layer (310) is not disposed. When the difference (d) between the ends of the first protective layer (310) and the second protective layer (320) increases, the substrate (100) warps due to the pressure generated when forming the second protective layer (320). Accordingly, a part of the outermost circuit pattern disposed at the point where the application of the second protective layer (320) ends may be exposed to the outside of the second protective layer (320). Therefore, corrosion of the circuit pattern may occur, which may reduce the reliability of the flexible circuit board.

[0260] Accordingly, the embodiment controls the sizes of the first protective layer (310) and the second protective layer (320). Accordingly, the reliability of the flexible circuit board is secured.

[0261] Referring to FIGS. 12 and 13, the flexible circuit board includes an outermost pattern. The outermost pattern is a pattern having a minimum distance from the cutting line (CL). Specifically, the outermost pattern is a pattern including an area having a minimum distance from the cutting line (CL).

[0262] The outermost pattern can be a circuit pattern or a dummy pattern. For example, the outermost pattern can be a circuit pattern.

[0263] Referring to Fig. 12, the outermost pattern on the first surface (1S) may be the outermost pattern of the second circuit pattern.

[0264] The dummy pattern (240) is positioned outside the outermost pattern of the second circuit pattern. However, the minimum distance between the outermost pattern of the second circuit pattern and the cutting line (CL) is smaller than the minimum distance between the dummy pattern (240) and the cutting line (CL).

[0265] In detail, the distance between the outermost pattern of the second circuit pattern and the cutting line (CL) may vary depending on the location. That is, there may be multiple distances between the outermost pattern of the second circuit pattern and the cutting line (CL). For example, the distance between the outermost pattern of the second circuit pattern and the cutting line (CL) may include a first-first distance (md1-1) and a first-second distance (md1-2). The first-first distance (md1-1) is smaller than the first-second distance (md1-2). Therefore, the minimum distance between the outermost pattern of the second circuit pattern and the cutting line (CL) is the first-first distance (md1-1).

[0266] The first-first distance (md1-1) is smaller than the second distance (md2) between the dummy pattern (240) and the cutting line (CL). In addition, the first-second distance (md1-2) may be larger than, smaller than, or equal to the second distance (md2).

[0267] Therefore, in the case of Fig. 12, the outermost pattern on the first surface (1S) can be the outermost pattern of the second circuit pattern.

[0268] Referring to Fig. 13, the outermost pattern on the second surface (2S) may be the outermost pattern of the second circuit pattern.

[0269] The outermost pattern of the third circuit pattern is positioned on the outside, similar to the outermost pattern of the second circuit pattern. However, the minimum distance between the outermost pattern of the second circuit pattern and the cutting line (CL) is smaller than the minimum distance between the outermost pattern of the third circuit pattern and the cutting line (CL).

[0270] In detail, the distance between the outermost pattern of the second and third circuit patterns and the cutting line (CL) may vary depending on the position. That is, there may be multiple distances between the outermost pattern of the second and third circuit patterns and the cutting line (CL). For example, the distance between the outermost pattern of the second circuit pattern and the cutting line (CL) may include the first distance (md1). The distance between the outermost pattern of the third circuit pattern and the cutting line (CL) may include the third-first distance (md3-1) and the third-second distance (md3-2). The third-first distance (md3-1) is smaller than the third-second distance (md3-2). Therefore, the minimum distance between the outermost pattern of the third circuit pattern and the cutting line (CL) becomes the third-first distance (md1-1).

[0271] The first distance (md1) is smaller than the third-first distance (md3-1). In addition, the first distance (md1) is smaller than the second distance (md2) between the dummy pattern (240) and the cutting line (CL).

[0272] Therefore, in the case of Fig. 13, the outermost pattern on the second surface (2S) can be the outermost pattern of the second circuit pattern.

[0273] However, the embodiment is not limited thereto. Another circuit pattern or another dummy pattern may be placed on an area where the outermost pattern of the second circuit pattern and the cutting line (CL) have a minimum distance (md1, md1-1). In this case, the outermost pattern of the flexible circuit board may be another circuit pattern or another dummy pattern.

[0274] For example, the outermost pattern on the first side (1S) may be the outermost pattern of at least one circuit pattern among the first circuit pattern and the second circuit pattern, and the outermost pattern on the second side (2S) may be the outermost pattern of at least one circuit pattern among the second circuit pattern and the third circuit pattern.

[0275] Alternatively, the outermost pattern on the first side (1S) may be the outermost pattern of at least one circuit pattern among the first circuit pattern and the second circuit pattern, and the outermost pattern on the second side (2S) may be a dummy pattern.

[0276] Alternatively, the outermost pattern on the first side (1S) may be a dummy pattern, and the outermost pattern on the second side (2S) may be the outermost pattern of at least one circuit pattern among the second circuit pattern and the third circuit pattern.

[0277] In the following, for convenience of explanation, it is explained as an example that the outermost pattern on the first side (1S) is the outermost pattern of the second circuit pattern, and the outermost pattern on the second side (2S) is the outermost pattern of the second circuit pattern or the outermost pattern of the dummy pattern.

[0278] Referring to FIGS. 19 to 21, the first protective layer (310) and the second protective layer (320) are applied in the first direction.

[0279] The first protective layer (310) on the area where the outermost pattern on the first surface has a 1-1 distance and the second protective layer (320) on the area where the outermost pattern on the second surface has a first distance are arranged with different widths. In detail, the end of the first protective layer (310) formed by applying the first protective layer (310) and the end of the second protective layer (320) formed by applying the second protective layer (320) are misaligned in the thickness direction of the substrate (100).

[0280] Accordingly, the distance between the first protective layer (310) and the cutting line (CL) and the distance between the second protective layer (320) and the cutting line (CL) are different. Specifically, the distance between the first protective layer (310) and the cutting line (CL) and the distance between the second protective layer (320) and the cutting line (CL) are different.

[0281] Referring to Fig. 19, the 2-1 wiring portion (221a), which is the outermost pattern on the first surface (1S), and the 2-2 wiring portion (221b), which is the outermost pattern on the second surface (2S), overlap in the thickness direction of the substrate (100).

[0282] Alternatively, referring to FIG. 20, the 2-1 wiring portion (221a), which is the outermost pattern on the first surface (1S), and the 2-2 wiring portion (221b), which is the outermost pattern on the second surface (2S), partially overlap in the thickness direction of the substrate (100).

[0283] Alternatively, referring to FIG. 21, the 2-1 wiring portion (221a), which is the outermost pattern on the first surface (1S), and the 2-2 wiring portion (221b), which is the outermost pattern on the second surface (2S), are partially misaligned in the thickness direction of the substrate (100). A dummy pattern (240) is arranged between the 2-2 wiring portion (221b), which is the outermost pattern on the second surface (2S), and the cutting line (CL). The 2-1 wiring portion (221a), which is the outermost pattern on the first surface (1S), and the dummy pattern (240) overlap completely or partially in the thickness direction of the substrate (100). Therefore, the difference between the ends of the first protective layer (310) and the second protective layer (320) can be reduced by the dummy pattern.

[0284] Accordingly, the first protective layer (310) is placed while covering the 2-1 wiring portion (221a), which is the outermost pattern on the first surface (1S). In addition, the second protective layer (320) is placed while covering the 2-2 wiring portion (221b), which is the outermost pattern on the second surface (2S), or the dummy pattern (240).

[0285] However, due to an error during the process, the ends of the first protective layer (310) and the second protective layer (320) may be misaligned in the thickness direction of the substrate (100). The first protective layer (310) and the second protective layer each have a first peak (P1) and a second peak (P2). The first peak (P1) and the second peak (P2) may be regions where the thickness of the protective layers is the greatest. Alternatively, the first peak (P1) and the second peak (P2) may be regions where the thickness of the protective layers begins to decrease.

[0286] Since the ends of the first protective layer (310) and the second protective layer (320) are misaligned in the thickness direction of the substrate (100), the first peak (P1) and the second peak (P2) are also misaligned in the thickness direction of the substrate (100).

[0287] One end of the first protective layer (310) and one end of the second protective layer (320) may be misaligned by a first distance (d1).

[0288] The first distance (d1) has a set range. The first distance may be less than or equal to the width of the wiring portion of the circuit pattern. The first distance may be less than or equal to the width of the pad portion of the circuit pattern. The first distance is smaller than the spacing between the wiring portions of the circuit pattern. The first distance may be less than or equal to the spacing between the pad portions of the circuit pattern. The first distance may be less than or equal to the pitch of the wiring portions of the circuit pattern. The first distance may be less than or equal to the pitch of the pad portions of the circuit pattern.

[0289] For example, the first distance (d1) has a set size. Specifically, the first distance (d1) may be 60 μm or less, 30 μm or less, or 15 μm or less. If the first distance (d1) exceeds 60 μm, the edge of the substrate may be bent due to the difference in area between the first protective layer (310) and the second protective layer (320). Therefore, the protective layer may not completely cover the outermost circuit pattern disposed on the first surface or the second surface of the pair. Accordingly, the outermost circuit pattern disposed on the first surface or the second surface of the pair may be exposed to the outside of the protective layer. As a result, corrosion of the circuit pattern may occur, which may reduce the reliability of the flexible circuit board.

[0290] The distance between the protective layers arranged on the outermost pattern and the distance between the protective layers arranged on patterns other than the outermost pattern may differ. Specifically, the distance between the ends of the protective layers on the first region may differ from the distance between the ends of the protective layers on the second region.

[0291] Referring to FIGS. 12, 22, and 23, a dummy pattern (240) may be placed on the first side and the second side. The dummy pattern (240) may not be the outermost pattern on the first side and the second side.

[0292] The dummy pattern (240) includes a first dummy pattern (241) and a second dummy pattern (242). The first dummy pattern (241) is disposed on the first surface (1S). The second dummy pattern (242) is disposed on the second surface (2S).

[0293] The first dummy pattern (241) may include a plurality of dummy patterns spaced apart from each other. In addition, the first dummy pattern (241) includes an outermost first dummy pattern (241a) that is closest to the cutting line (CL) among the dummy patterns.

[0294] The second dummy pattern (242) may include a plurality of dummy patterns spaced apart from each other. In addition, the second dummy pattern (242) includes an outermost second dummy pattern (242a) that is closest to the cutting line (CL) among the dummy patterns.

[0295] However, the outermost first dummy pattern (241a) and the outermost second dummy pattern (241b) are not the outermost patterns of the flexible circuit board.

[0296] Referring to FIG. 22, the outermost first dummy pattern (241a) on the first surface (1S) and the outermost second dummy pattern (242a) on the second surface (2S) may overlap completely or partially in the thickness direction of the substrate (100).

[0297] Alternatively, referring to FIG. 23, the outermost first dummy pattern (241a) on the first surface (1S) and the outermost second dummy pattern (242a) on the second surface (2S) may be misaligned in the thickness direction of the substrate (100).

[0298] Even if the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are misaligned, the outermost dummy patterns can be completely covered by the protective layer (310, 320). That is, since the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are not the outermost patterns of the flexible circuit board, they are arranged at a sufficient distance from the ends of the protective layers. Accordingly, the substrate (100) does not bend in the area where the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are arranged. Therefore, even if the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are misaligned, the outermost dummy patterns are not exposed to the outside of the protective layer (310, 320).

[0299] The first protective layer (310) is arranged to cover the outermost first dummy pattern (241a) on the first surface (1S). In addition, the second protective layer (320) is arranged to cover the outermost second dummy pattern (242a) on the second surface (2S).

[0300] However, due to an error during the process, the ends of the first protective layer (310) and the ends of the second protective layer (320) may be misaligned in the thickness direction of the substrate (100). In detail, the ends of the first protective layer (310) and the ends of the second protective layer (320) may be misaligned by a second distance (d2).

[0301] The first distance (d1) and the second distance (d2) may be different. The first distance (d1) is smaller than the second distance (d2). For example, the second distance (d2) may be greater than 60 μm, greater than or equal to 70 μm, or greater than or equal to 80 μm.

[0302] As previously explained, the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are not the outermost patterns of the flexible circuit board. Therefore, the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are not positioned in an area where the substrate is bent due to an increase in the second distance (d2). Therefore, even if the second distance (d2) increases, the outermost first dummy pattern (241a) and the outermost second dummy pattern (242a) are not exposed to the outside of the protective layers.

[0303] Additionally, process efficiency can be improved because the degree of freedom of tolerance at the ends of the protective layers in areas other than the outermost pattern is increased.

[0304]

[0305] FIG. 24 is a drawing for explaining the connection of a COF module and other members according to the first embodiment, FIG. 25 is a drawing for explaining the connection of a COF module and other members according to the second embodiment, and FIGS. 26 to 28 are drawings for an electronic device including a flexible circuit board according to the embodiment.

[0306] Referring to FIG. 24, one end of the COF module (2000) is connected to the display panel (4000), and the other end is connected to the circuit board (3000). For example, the display panel (4000) and the circuit board (3000) are disposed on one surface of the COF module (2000). However, the embodiment is not limited thereto. The display panel (4000) and the circuit board (3000) may be disposed on different surfaces of the COF module (2000). In this case, the COF module (2000) may have circuit patterns disposed on each of both surfaces. For example, the COF module (2000) may include a first circuit pattern and a second circuit pattern disposed on a second surface, and a second circuit pattern and a third circuit pattern disposed on the first surface. The second circuit patterns may be connected to each other through vias.

[0307] Since the COF module (2000) includes a flexible substrate, it has a rigid shape and a bent shape between the display panel (3000) and the circuit board (4000). That is, the COF module (2000) may include a bending area (BA).

[0308] The COF module (2000) connects the display panel (4000) and the circuit board (3000), which are arranged opposite each other, in a curved manner. Therefore, the thickness of the electronic device is reduced. Furthermore, the design freedom of the electronic device is enhanced. Furthermore, the COF module (2000) prevents wiring from breaking even when in a curved configuration. Consequently, the reliability of the electronic device is enhanced.

[0309] Referring to Figure 25, a chip (CH) is mounted on the flexible circuit board. Subsequently, it is cut along the cutting line (CL). Thus, a COF module is manufactured.

[0310] The COF module (2000) can transmit an electrical signal by connecting a display panel (4000) and a circuit board (3000). One end of the COF module (2000) is connected to the display panel (4000). The other end of the COF module (2000) is connected to the circuit board (3000). For example, the display panel (4000) is disposed on one surface of the COF module (2000). In addition, the circuit board (3000) is disposed on the other surface of the COF module (2000).

[0311] The COF module (2000) includes a flexible substrate. Accordingly, it can have both a rigid form and a bent form between the display panel (3000) and the circuit board (4000). For example, the COF module (2000) includes a bending area (BA) and can be bent.

[0312] The COF module (2000) can be connected in a curved manner between the display panel (4000) and the circuit board (3000), which are arranged opposite each other. Therefore, the thickness of the electronic device is reduced. Furthermore, the design freedom of the electronic device is enhanced. Furthermore, the COF module (2000) does not cause wiring to break even when in a curved manner. Consequently, the reliability of the electronic device is enhanced.

[0313]

[0314] Since the above COF module is flexible, it can be applied to various electronic devices.

[0315] Referring to Fig. 26, the COF module can be applied to a flexible touch window. Accordingly, a touch device device including the same can be a flexible touch device device.

[0316] Referring to FIG. 27, the COF module can be applied to various wearable touch devices including curved displays. Accordingly, the wearable touch device can be slimmed down or made lighter.

[0317] Referring to FIG. 28, the COF module can be applied to various electronic devices having a display portion, such as a TV, monitor, or laptop.

[0318]

[0319] The features, structures, effects, etc. described in the above-described embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by those skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be construed as falling within the scope of the present invention.

[0320] In addition, although the above description focuses on embodiments, these are merely examples and do not limit the present invention. Those skilled in the art to which the present invention pertains will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the present embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the present invention defined in the appended claims.

Claims

1. Description; The conductive pattern described above; and Including a protective layer on the above conductive pattern, The conductive pattern includes a first circuit pattern connected to a circuit board; a second circuit pattern connected to a display panel; and a plurality of outermost patterns, The above outermost patterns include at least one of a circuit pattern and a dummy pattern, The above description includes a first direction in which the display panel and the circuit board face each other and a second direction perpendicular to the first direction, The above plurality of outermost patterns include a first outermost pattern and a second outermost pattern arranged at the outermost side in the second direction, The above protective layer includes a first end which is one end in the first direction, The first outermost pattern includes a first protrusion, The second outermost pattern includes a third protrusion, A flexible circuit board wherein the first end overlaps the first protrusion and the third protrusion.

2. In paragraph 1, The first circuit pattern includes a first pad portion connected to the chip, a second pad portion, and a first wiring portion connecting the first pad portion and the second pad portion, The second circuit pattern includes a third pad portion, a fourth pad portion, and a second wiring portion connecting the third pad portion and the fourth pad portion, The first outermost pattern includes a fifth pad portion, a sixth pad portion, and a 3-1 wiring portion connecting the fifth pad portion and the sixth pad portion, A flexible circuit board, wherein the second outermost pattern includes a seventh pad portion, an eighth pad portion, and a 3-2 wiring portion connecting the seventh pad portion and the eighth pad portion.

3. In paragraph 2, The above protective layer further includes a second end, which is the other end in the first direction, The first outermost pattern includes a second protrusion, The second outermost pattern includes a fourth protrusion, The first protrusion and the second protrusion face each other in the first direction, The third protrusion and the fourth protrusion face each other in the first direction, A flexible circuit board in which the second end overlaps the second protrusion and the fourth protrusion.

4. In paragraph 3, The above first protrusion includes a first-1 protrusion, a first-2 protrusion and a first-3 protrusion, The above second protrusion includes a second-1 protrusion, a second-2 protrusion and a second-3 protrusion, The third protrusion includes a third-1 protrusion, a third-2 protrusion, and a third-3 protrusion, The fourth protrusion is a flexible circuit board including a fourth protrusion, a fourth-second protrusion, and a fourth-third protrusion.

5. In paragraph 4, The above 1-1 protrusion is connected to the above 5th pad portion, The above 1-2 protrusions are connected to the 3-1 wiring section, The above 1-3 protrusion is positioned between the 1-1 protrusion and the 1-2 protrusion, The distance between the first protrusion and the first-3 protrusion and the distance between the first-2 protrusion and the first-3 protrusion are 50 μm to 150 μm, A flexible circuit board in which the first end overlaps the first-3 protrusions.

6. In paragraph 4, The above 3-1 protrusion is connected to the above 7th pad portion, The above 3-2 protrusion is connected to the above 3-2 wiring section, The above 3-3 protrusion is positioned between the 3-1 protrusion and the 3-2 protrusion, The distance between the 3-1 protrusion and the 3-3 protrusion and the distance between the 3-2 protrusion and the 3-3 protrusion are 50 μm to 150 μm, A flexible circuit board in which the first end overlaps the third-third protrusion.

7. In paragraph 4, The above 2-1 protrusion is connected to the above 6th pad portion, The above 2-2 protrusion is connected to the above 3-1 wiring section, The above 2-3 protrusion is positioned between the 2-1 protrusion and the 2-2 protrusion, The distance between the 2-1 protrusion and the 2-3 protrusion and the distance between the 2-2 protrusion and the 2-3 protrusion are 50 μm to 150 μm, A flexible circuit board having the second end overlapping the second-third protrusion.

8. In paragraph 4, The above 4-1 protrusion is connected to the above 8th pad portion, The above 4-2 protrusion is connected to the above 3-2 wiring section, The above 4-3 protrusion is positioned between the 4-1 protrusion and the 4-2 protrusion, The distance between the 4-1 protrusion and the 4-3 protrusion and the distance between the 4-2 protrusion and the 4-3 protrusion are 50 μm to 150 μm, The second end of the flexible circuit board overlaps with the 4-3 protrusion.

9. In paragraph 2, The above first circuit pattern includes an outermost pattern, The above second circuit pattern includes an outermost pattern, The outermost pattern of the first circuit pattern includes a fifth protrusion, The outermost pattern of the second circuit pattern includes a sixth protrusion, The fifth protrusion includes a fifth-first protrusion, a fifth-second protrusion, and a fifth-third protrusion, The above sixth protrusion is a flexible circuit board including a 6-1 protrusion, a 6-2 protrusion, and a 6-3 protrusion.

10. In paragraph 9, The above 5-1 protrusion is connected to the above 1st pad portion, The above 5-2 protrusion is connected to the first wiring section, The above 5-3 protrusion is positioned between the 5-1 protrusion and the 5-2 protrusion, The above 6-1 protrusion is connected to the third pad portion, The above 6-2 protrusion is connected to the second wiring section, A flexible circuit board wherein the above-mentioned 6-3 protrusion is positioned between the above-mentioned 6-1 protrusion and the above-mentioned 6-2 protrusion.

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