Circuit board and semiconductor package comprising same

Abstract

A circuit board according to an embodiment includes: a build-up layer; a pad arranged on the build-up layer; and a bonding part including a first part arranged on the pad and having a first width in the horizontal direction and a second part arranged on the first part and having a second width different from the first width in the horizontal direction, wherein a central axis of the first part in the horizontal direction and a central axis of the second part in the horizontal direction are misaligned with each other.

Description

Circuit boards and semiconductor packages including the same

[0001] The embodiment relates to a circuit board and a semiconductor package board including the same.

[0002] As the performance of electrical and electronic products continues to improve, technologies are being proposed and researched to accommodate a greater number of semiconductor devices on a limited-size semiconductor package substrate. However, conventional semiconductor packages typically consist of a single semiconductor device, limiting their ability to achieve desired performance.

[0003] Accordingly, semiconductor packages that utilize multiple substrates to arrange multiple semiconductor devices have recently been developed. These semiconductor packages have a structure in which multiple semiconductor devices are connected to each other horizontally and / or vertically on the substrate. Accordingly, these semiconductor packages have the advantage of efficiently utilizing the mounting area of ​​the semiconductor devices and enabling high-speed signal transmission through short signal transmission paths between the semiconductor devices.

[0004] In addition, semiconductor packages applied to products that provide the Internet of Things (IoT), autonomous vehicles, and high-performance servers are expanding their concept to semiconductor chiplets as the number of semiconductor elements and / or the size of each semiconductor element increases in line with the trend toward high integration, or as the functional parts of semiconductor elements are divided.

[0005] Meanwhile, as the number of semiconductor devices and / or semiconductor chiplets mounted on a semiconductor package increases, the area of ​​the semiconductor package is increasing. Furthermore, as the area of ​​the semiconductor package increases, the circuit board tends to warp more. If the circuit board warps significantly, the semiconductor devices may not be stably attached to the circuit board. For example, the circuit board may have bonding portions that are connected to the terminals of the semiconductor devices. In this case, if the circuit board warps significantly in a specific direction, a height difference may occur between the plurality of bonding portions, which may prevent the semiconductor devices from being stably attached.

[0006] In addition, the bonding portion may need to have a certain height or more in order to improve the injection characteristics of the molding layer injected between the circuit board and the semiconductor element while maintaining a vertical distance between the semiconductor element and the circuit board above a certain level. The bonding portion may be formed using a dry film disposed on the circuit board. However, the dry film has a limited thickness, and thus, there is a problem that it is difficult to easily manufacture a bonding portion above a certain level. In addition, even if the thickness of the dry film corresponds to the height that the bonding portion should have, it may be difficult to form an opening in the dry film corresponding to the bonding portion. Furthermore, when the thickness of the dry film increases, the degree of light refraction generated during the process of exposing the dry film increases, and thus the exposure resolution of the dry film may deteriorate. Therefore, even if the conventional technology provides a bonding portion having a certain height or more, the width of the bonding portion in the horizontal direction increases due to the deterioration of the exposure resolution, and thus, it may be difficult to provide a bonding portion having a fine pitch.

[0007] Therefore, a method is required to provide a bonding portion having a certain height and fine pitch while preventing the circuit board from being significantly warped in a specific direction.

[0008] The embodiment provides a circuit board of a novel structure and a semiconductor package including the same.

[0009] Additionally, the embodiment provides a circuit board and a semiconductor package including the same that can prevent the circuit board from being significantly bent in a specific direction.

[0010] In addition, the embodiment provides a circuit board having a plurality of bonding portions with fine pitches and a semiconductor package including the same.

[0011] In addition, the embodiment provides a circuit board and a semiconductor package including the same that can solve the problem of electrical short circuit between adjacent electrodes that occurs due to diffusion of the connection portion.

[0012] The technical tasks to be achieved in the proposed embodiment are not limited to the technical tasks mentioned above, and other technical tasks not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the proposed embodiment belongs from the description below.

[0013] A circuit board according to an embodiment includes a build-up layer; a pad disposed on the build-up layer; and a bonding portion including a first portion disposed on the pad and having a first width in a horizontal direction, and a second portion disposed on the first portion and having a second width different from the first width in the horizontal direction, wherein a horizontal central axis of the first portion and a horizontal central axis of the second portion are misaligned with each other.

[0014] In addition, the side surface of the bonding portion has a step, and the horizontal distance of the step is not uniform along the circumferential direction of the upper or lower surface of the bonding portion.

[0015] In addition, the bonding portion includes a plurality of bonding portions in which the misalignment directions of the horizontal central axes of the second portion are different from each other based on the horizontal central axis of the first portion.

[0016] In addition, the misalignment direction of the horizontal central axis of the first part with respect to the horizontal central axis of the second part of each of the plurality of bonding parts is either a direction away from the horizontal central axis of the build-up layer or a direction toward the horizontal central axis of the build-up layer.

[0017] In addition, the bonding portion includes a plurality of bonding portions in which the horizontal central axis of the first portion and the horizontal central axis of the second portion are misaligned to different degrees.

[0018] Additionally, as the plurality of bonding portions move away from the horizontal central axis of the build-up layer, the degree of misalignment between the horizontal central axis of the first portion and the horizontal central axis of the second portion increases or decreases.

[0019] In addition, the plurality of bonding portions include a first bonding portion located on a first side of the horizontal central axis of the build-up layer and a second bonding portion located on a second side opposite to the first side, and the misaligned direction of the first bonding portion is opposite to the misaligned direction of the second bonding portion.

[0020] In addition, the misaligned direction of the first bonding portion is a direction toward the first side from the horizontal central axis of the build-up layer, and the misaligned direction of the second bonding portion is a direction toward the second side from the horizontal central axis of the build-up layer.

[0021] In addition, the misaligned direction of the first bonding portion is a direction toward the horizontal central axis of the build-up layer from the first side, and the misaligned direction of the second bonding portion is a direction toward the horizontal central axis of the build-up layer from the second side.

[0022] In addition, the bonding portion is provided in a plurality of pieces, and the horizontal width of the second part of at least one bonding portion among the plurality of bonding portions is different from the horizontal width of the second part of at least one other bonding portion.

[0023] In addition, the circuit board further includes a connecting member embedded in the build-up layer, and the bonding portion has a first bonding portion that overlaps the connecting member along a vertical direction and a second bonding portion that does not overlap the connecting member along a vertical direction.

[0024] Additionally, the horizontal widths of the second portions of each of the first and second bonding portions are different from each other.

[0025] Additionally, the horizontal widths of the first portions of each of the first and second bonding portions are the same.

[0026] Meanwhile, a circuit board according to an embodiment includes a build-up layer; first and second pads disposed on the build-up layer and spaced apart from each other in a horizontal direction; and a first bonding portion disposed on the first pad; and a second bonding portion disposed on the second pad, wherein the first bonding portion includes a first portion disposed on the first pad and a second portion disposed on the first portion, and the second bonding portion includes a third portion disposed on the second pad and a fourth portion disposed on the third portion, wherein a horizontal central axis of the third portion and a horizontal central axis of the second portion are misaligned from each other, and at least one of a direction and a degree of misalignment of the horizontal central axis of the second portion with respect to the horizontal central axis of the first portion is different from a direction and a degree of misalignment of the horizontal central axis of the fourth portion with respect to the horizontal central axis of the third portion.

[0027] In addition, the misaligned direction of each of the first bonding portion and the second bonding portion is the direction in which each of the first bonding portion and the second bonding portion is located based on the horizontal central axis of the build-up layer, and the misaligned degree of each of the first bonding portion and the second bonding portion increases or decreases in proportion to the distance of each of the first bonding portion and the second bonding portion from the horizontal central axis of the build-up layer.

[0028] Meanwhile, a semiconductor package according to an embodiment includes a build-up layer; a pad disposed on the build-up layer; a bonding portion disposed on the pad; a connection member disposed on the bonding portion; and a semiconductor element disposed on the connection member, wherein the connection member is provided to surround a side surface of the bonding portion, and a horizontal width of the connection member in a portion surrounding the bonding portion is different along the perimeter of the upper surface of the bonding portion.

[0029] In addition, the bonding portion includes a first portion disposed on the pad and having a first width in a horizontal direction, and a second portion disposed on the first portion and having a second width different from the first width in the horizontal direction, wherein the horizontal central axis of the first portion and the horizontal central axis of the second portion are misaligned with each other, and the connecting member is provided to surround a side surface of the second portion of the bonding portion.

[0030] Additionally, the connecting member does not overlap the first portion of the bonding portion along the horizontal direction.

[0031] In addition, the bonding portion includes first and second bonding portions in which the direction and degree of misalignment of the horizontal central axis of the second portion with respect to the horizontal central axis of the first portion are different from each other.

[0032] Additionally, the semiconductor package further includes a connecting member embedded within the build-up layer, and the semiconductor element includes a first semiconductor element overlapping at least a portion of the connecting member along a vertical direction, and a second semiconductor element overlapping at least another portion of the connecting member along a vertical direction.

[0033] The circuit board of the embodiment may include a build-up layer, a pad portion disposed on the build-up layer, and a bonding portion disposed on the pad portion. The bonding portion may include a first portion having a first width in a horizontal direction on the pad portion, and a second portion having a second width smaller than the first width in a horizontal direction on the first portion.

[0034] Through this, the embodiment can make the bonding portion have a height greater than a certain level on the pad portion, and further, can make the pitch between a plurality of bonding portions spaced apart along the horizontal direction fine.

[0035] Specifically, the bonding portion must be arranged at a certain height on the pad portion. At this time, the bonding portion may be arranged by forming an opening by exposing and developing the dry film and then filling the above-described opening with a metal material. As the height of the bonding portion increases, the thickness of the dry film also increases, which may result in a decrease in the exposure resolution of the dry film. For example, when performing the exposure process by irradiating light on the upper surface of the dry film, sufficient light may not be transmitted to the area adjacent to the lower surface of the dry film, and thus a portion of the dry film may not be exposed and developed. Furthermore, as the thickness of the dry film increases, the problem of resolution deterioration due to light refraction may become greater. Therefore, in the prior art, there is a limit to reducing the width of the bonding portion in the horizontal direction, and further, there is a limit to reducing the pitch between a plurality of bonding portions.

[0036] In contrast, the embodiment forms a bonding portion using a plurality of dry films stacked along a vertical direction. For example, when the bonding portion has a height of 200 μm, in the prior art, the bonding portion is arranged using a 200 μm dry film, but in the embodiment, the bonding portion is arranged after stacking two layers of 100 μm dry films. Through this, the embodiment can solve the problem of reduced exposure resolution due to light refraction that occurs depending on the thickness of the dry film, and thereby reduce the horizontal width of the bonding portion. Furthermore, in the present invention, the horizontal width of the second part of the bonding portion is made narrower than the horizontal width of the first part of the bonding portion, so that the pitch between adjacent bonding portions is maintained while the separation distance between adjacent bonding portions can be increased, and thus the problem of a circuit short that occurs when adjacent bonding portions are electrically connected to each other can be solved.

[0037] In addition, the first and second portions of the bonding portion of the embodiment may have their central axes misaligned in the horizontal direction. For example, the central axis of the first portion of the bonding portion in the horizontal direction may be misaligned with the central axis of the second portion in the horizontal direction. Accordingly, the side surface of the bonding portion may have a step due to the difference in the horizontal width of the first portion and the horizontal width of the second portion, and the horizontal distance of the step may not be uniform along the circumferential direction of the upper or lower surface of the bonding portion due to the misalignment of the horizontal central axis of the first portion and the horizontal central axis of the second portion. For example, the first side surface of the first portion and the first side surface of the second portion on one side of the bonding portion may have a first horizontal distance along the horizontal direction, and the second side surface of the first portion and the second side surface of the second portion on the other side of the bonding portion may have a second horizontal distance different from the first horizontal distance along the horizontal direction. Through this, the embodiment can prevent the circuit board from being significantly bent in a specific direction due to a misalignment of the horizontal central axis of the first part of the bonding portion and the horizontal central axis of the second part, and further, can selectively increase or / and decrease the separation distance between the plurality of bonding portions while maintaining the pitch between the plurality of bonding portions according to the characteristics that the plurality of bonding portions should have, thereby minimizing signal transmission loss while minimizing signal interference, and thereby improving communication characteristics.

[0038] By way of example, the embodiment can cause the central axis of the second portion of the bonding portion to be misaligned with the central axis of the first portion of the bonding portion in a specific direction and a specific distance based on the direction in which the circuit board is bent, thereby preventing the circuit board from being bent in a specific direction and avoiding excessive stress applied to the circuit board. Accordingly, the mechanical reliability and / or electrical reliability of the circuit board can be improved. In addition, the embodiment can alleviate the warpage of the circuit board, thereby allowing the semiconductor element to be stably attached on the circuit board. In this case, when the circuit board is bent in a specific direction, a height difference may occur between the plurality of bonding portions provided on the circuit board, and the terminals of the semiconductor element may not be stably bonded on the plurality of bonding portions. In contrast, the embodiment can alleviate the overall warpage of the circuit board by causing the horizontal central axes of the first portion and the second portion of the bonding portion to be misaligned with each other, thereby allowing the semiconductor element to be stably attached on the circuit board. Therefore, the embodiment can enable the semiconductor element to operate stably, thereby improving product reliability. Furthermore, the embodiment can enable a product such as a server to which a semiconductor package is applied to operate stably.

[0039] In addition, a connection portion may be arranged on the above-described bonding portion, and a semiconductor element may be arranged on the connection portion. At this time, the step between the side surfaces of the first portion and the second portion of the bonding portion has different horizontal distances along the circumferential direction of the upper surface and / or the lower surface of the bonding portion, and accordingly, the connection portion may be provided with different widths along the circumferential direction of the bonding portion in a region that horizontally overlaps with the second portion of the bonding portion. In addition, the connection portion may not contact the side surface of the first portion through the step between the first portion and the second portion of the bonding portion. For example, the above-described step may prevent the connection portion from overflowing the side surface of the first portion of the bonding portion, and thereby enable the volume of the connection portion to be easily adjusted. In addition, as the connection portion and the bonding portion come into contact, an intermetallic compound (IMC) may be formed. The above-described step can prevent the connection portion and the circuit layer provided in the build-up layer from being connected, and can prevent the interface between different components of the build-up layer from being separated or the electrical characteristics from being deteriorated due to the formation of the intermetallic compound.

[0040] FIG. 1a is a cross-sectional view illustrating a circuit board according to the first embodiment.

[0041] FIG. 1b is a cross-sectional view illustrating a circuit board according to the second embodiment.

[0042] Figures 2a and 2b are cross-sectional views showing a bonding portion according to the first embodiment.

[0043] Fig. 3a is a cross-sectional view showing a bonding portion according to the second embodiment.

[0044] Fig. 3b is a cross-sectional view showing a bonding portion according to the third embodiment.

[0045] Fig. 4 is a plan view showing a bonding portion according to the fourth embodiment.

[0046] Fig. 5 is a cross-sectional view showing a bonding portion according to the fifth embodiment.

[0047] Fig. 6 is a plan view showing a bonding portion according to the sixth embodiment.

[0048] Figure 7 is a cross-sectional view showing a circuit board according to the third embodiment.

[0049] Figure 8 is a drawing showing a circuit board according to the fourth embodiment.

[0050] Fig. 9 is a drawing showing a semiconductor package according to the first embodiment.

[0051] Fig. 10 is a drawing showing a semiconductor package according to the second embodiment.

[0052] Figures 11a to 11g are cross-sectional views showing a method for manufacturing a circuit board according to one embodiment in process order.

[0053] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.

[0054] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0055] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by those of ordinary skill in the technical field to which the present invention pertains, unless explicitly and specifically defined and described, and commonly used terms, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology. In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention.

[0056] In this specification, singular forms may also include plural forms unless specifically stated otherwise in the phrase, and when it is described as “A and / or at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C. In addition, when describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0057] These terms are only intended to distinguish the component from other components, and are not intended to limit the nature, order, or sequence of the component by the term. In addition, when a component is described as being "connected," "coupled," or "connected" to another component, it may include not only cases where the component is directly connected, coupled, or connected to the other component, but also cases where the component is "connected," "coupled," or "connected" by another component between the component and the other component.

[0058] Additionally, when described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Furthermore, when expressed as "above" or "below", it may include the meaning of the downward direction as well as the upward direction based on one component.

[0059] The terminology used in this application is only used to describe specific embodiments and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, it should be understood that the terms "comprise" or "have" indicate the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0060] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0061]

[0062] Hereinafter, embodiments will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or corresponding components are given the same reference numbers, and redundant descriptions thereof will be omitted.

[0063]

[0064] Before describing the embodiment, an electronic device (not shown) to which the semiconductor package of the embodiment is applied will be briefly described. The electronic device may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive device, etc. However, the electronic device is not limited thereto, and it goes without saying that the electronic device may be any other electronic device that processes data.

[0065] An electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to a semiconductor package of the embodiment. Furthermore, the semiconductor package includes a circuit board, a semiconductor chip, a bonding portion for electrically connecting the semiconductor element and the circuit board, a resin portion for filling the space between the semiconductor element and the circuit board, and a molding portion for entirely enclosing the semiconductor element.

[0066] Semiconductor devices may include active and / or passive components and may have various functions. Active devices may be in the form of integrated circuits (ICs) in which hundreds to millions of transistors are integrated into a single semiconductor device, and may be, for example, logic chips, memory chips, etc. For example, the logic chip may be an application processor (AP) device including at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, an encryption processor, a microprocessor, a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), etc., or a set of devices including a specific combination of the above. The memory chip may be a stacked memory such as HBM. In addition, the memory chip may include a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), or a flash memory.

[0067] The semiconductor package of the embodiment may be any one of a CSP (Chip Scale Package), an FC-CSP (Flip Chip-Chip Scale Package), an FC-BGA (Flip Chip Ball Grid Array), a POP (Package On Package), and a SIP (System In Package), but is not limited thereto.

[0068]

[0069] FIG. 1A is a cross-sectional view illustrating a circuit board according to a first embodiment, FIG. 1B is a cross-sectional view illustrating a circuit board according to a second embodiment, FIGS. 2A and 2B are cross-sectional views illustrating a bonding portion according to the first embodiment, FIG. 3A is a cross-sectional view illustrating a bonding portion according to the second embodiment, FIG. 3B is a cross-sectional view illustrating a bonding portion according to the third embodiment, FIG. 4 is a plan view illustrating a bonding portion according to the fourth embodiment, FIG. 5 is a cross-sectional view illustrating a bonding portion according to the fifth embodiment, FIG. 6 is a plan view illustrating a bonding portion according to the sixth embodiment, FIG. 7 is a cross-sectional view illustrating a circuit board according to the third embodiment, FIG. 8 is a diagram illustrating a circuit board according to the fourth embodiment, FIG. 9 is a diagram illustrating a semiconductor package according to the first embodiment, and FIG. 10 is a diagram illustrating a semiconductor package according to the second embodiment.

[0070] Hereinafter, a circuit board and a semiconductor package including the same according to an embodiment will be specifically described with reference to FIGS. 1a to 10.

[0071] Referring to FIG. 1A, the circuit board (100) includes a core layer (101) and build-up layers (102, 103). The build-up layers (102, 103) include a first build-up layer (102) disposed on one surface of the core layer (101) and a second build-up layer (103) disposed on the other surface of the core layer (101).

[0072] Here, the meaning of being arranged on one side and the other side should not be understood as being limited to a configuration that is in direct contact with the one side and the other side, but should also be understood as having other configurations between the one side and the first build-up layer (102) and between the other side and the second build-up layer (103).

[0073] The core layer (101) may include a core insulating layer (141). The core insulating layer (141) is composed of a resin such as epoxy resin or BT (bismaleimide triazine) and a reinforcing material such as glass fiber, and has the function of improving the rigidity of the circuit board (100).

[0074] As the number of terminals of semiconductor devices arranged on a recent circuit board (100) increases, wiring becomes more complex, and accordingly, the thickness of the first and second build-up layers (102, 103) is increasing. Accordingly, the core insulating layer (141) of the core layer (101) of the present embodiment may have a thickness of 120 μm to 1200 μm in order to improve the overall rigidity of the circuit board (100) and prevent excessive signal loss. A via hole penetrating one surface and the other surface may be formed in the core insulating layer (141). The via hole of the core insulating layer (141) may be formed using a mechanical drilling process or a CO2 laser, etc. When a via hole of the core insulating layer (141) is formed using a mechanical drill, the inclination of the inner wall of the via hole may be perpendicular to one surface and / or the other surface of the core insulating layer (141), and when a via hole of the core insulating layer (141) is formed using a CO2 laser, the inner wall of the via hole may have a plurality of concave portions and / or convex portions alternately stacked along the vertical direction. Here, the concave portion may mean a concave region that is concave in a direction away from the horizontal center of the via hole provided in the core insulating layer (141), and the convex portion may mean a region that protrudes and / or is convex toward the horizontal center of the via hole provided in the core insulating layer (141). In addition, the concave portions and the convex portions may be alternately provided on the inner wall forming the via hole of the core insulating layer (141) along the vertical direction. Here, "alternately provided" may mean that a convex portion is provided between multiple concave portions, or that a concave portion is provided between multiple convex portions. In the case of via holes formed using a mechanical drilling process, the path for transmitting electrical signals may be shortened, which may be advantageous for electrical properties, but may also increase the process cost.In addition, when forming concave and convex portions on the inner wall of a via hole using a CO2 laser, the thickness of the core via electrode (142) provided on the inner wall of the via hole can be increased in a subsequent process, which has the advantage of lowering the impedance and lowering the process cost. Accordingly, the processing method of the via hole provided on the core layer (101) can be freely and selectively used depending on the application field of the semiconductor package.

[0075] A core via electrode (142) may be placed within the via hole of the core insulating layer (141). The core via electrode (142) functions to electrically connect the first build-up layer (102) and the second build-up layer (103). Therefore, it is desirable for the core via electrode (142) to densely fill the via hole for resistance or heat dissipation. However, when the thickness of the core insulating layer (141) becomes thick as described above, it may become difficult for the core via electrode (142) to densely fill the via hole. For example, when attempting to fill the via hole provided in the thick core insulating layer (141) as described above according to the plating process, a void may occur within the core via electrode (142). The void expands due to heat generated during the operation of the semiconductor package, which becomes a factor that lowers the mechanical reliability of the circuit board. Accordingly, a core via electrode (142) having a predetermined thickness is arranged on the inner wall of the via hole of the core insulating layer (141). The thickness of the core via electrode (142) refers to the thickness in the horizontal direction perpendicular thereto, not the thickness in the vertical direction in which the first build-up layer (102), the core insulating layer (141), and the second build-up layer (103) are laminated. The thickness of the core via electrode (142) may be arranged to have a thickness of 5 μm to 20 μm in order to prevent a voltage drop that occurs as the thickness of the core insulating layer (141) increases and to prevent the occurrence of voids. The inner side of the core via electrode (142) is difficult to densely fill with metal through a process such as plating, resulting in the formation of empty spaces. The empty spaces may cause a problem in that it is difficult to evenly arrange the first build-up layer (102) when laminating the first build-up layer (102).

[0076] The insulating member (143) may be placed on the inner side of the core via electrode (142), thereby ensuring the flatness of the core layer (101). For example, the insulating member (143) may be placed in a via hole of the core insulating layer (141), and the core via electrode (142) may surround a side of the insulating member (143) and be placed between the inner wall of the via hole and the outer surface of the insulating member (143).

[0077] The upper surface of the insulating member (143) may be on the same plane as the upper surface of the core insulating layer (141), or may be disposed closer to the first build-up layer (102) in the vertical direction than the upper surface of the core insulating layer (141). The lower surface of the insulating member (143) may be on the same plane as the lower surface of the core insulating layer (141), or may be disposed closer to the second build-up layer (103) in the vertical direction than the lower surface of the core insulating layer (141). This can be freely designed to solve the flatness when laminating the first build-up layer (102) and the second build-up layer (103), or to secure the flatness of the sixth circuit layer (116) and / or the seventh circuit layer (122) to be described later.

[0078] A first build-up layer (102) is arranged on one side of the core layer (101). The first build-up layer (102) includes a plurality of insulating layers (106, 107, 108, 109, 110), a plurality of circuit layers (116, 117, 118, 119, 120, 121), and a first protective layer (104).

[0079] The plurality of circuit layers (116, 117, 118, 119, 120, 121) of the first build-up layer (102) may include a first circuit layer (116) that is farthest from the core layer (101) in the vertical direction, a second circuit layer (117) that is closer to the core layer (101) in the vertical direction than the first circuit layer (116), a third circuit layer (118) that is closer to the core layer (101) in the vertical direction than the second circuit layer (117), a fourth circuit layer (119) that is closer to the core layer (101) in the vertical direction than the third circuit layer (118), a fifth circuit layer (120) that is closer to the core layer (101) in the vertical direction than the fourth circuit layer (119), and a sixth circuit layer (121) that is closer to the core layer (101) in the vertical direction than the fifth circuit layer (120).

[0080] The first to sixth circuit layers (116, 117, 118, 119, 120, 121) may function to electrically connect with semiconductor elements arranged on a circuit board (100). Each of the first to sixth circuit layers (116, 117, 118, 119, 120, 121) may be freely designed in consideration of impedance. In addition, via electrodes (131, 132, 133, 134, 135) may be arranged to connect each of the first to sixth circuit layers (116, 117, 118, 119, 120, 121). For example, a first via electrode (131) is disposed between a first circuit layer (116) and a second circuit layer (117), a second via electrode (132) is disposed between a second circuit layer (117) and a third circuit layer (118), a third via electrode (133) is disposed between a third circuit layer (118) and a fourth circuit layer (119), a fourth via electrode (134) is disposed between a fourth circuit layer (119) and a fifth circuit layer (120), and a fifth via electrode (135) is disposed between a fifth circuit layer (120) and a sixth circuit layer (121), thereby electrically connecting the first to sixth circuit layers (116, 117, 118, 119, 120, 121).

[0081] The first to fifth via electrodes (131, 132, 133, 134, 135) can be formed simultaneously in the process of arranging the first to fifth circuit layers (116, 117, 118, 119, 120). For example, in the process of arranging the fifth circuit layer (120) on the sixth circuit layer (121), a through hole can be formed in the fifth insulating layer (110) to expose a portion of the sixth circuit layer (121), and through this, the fifth circuit layer (120) can be arranged together with the fifth via electrode (135) filling the through hole of the fifth insulating layer (110). Therefore, the fifth via electrode (135) can be distinguished as a protrusion of the fifth circuit layer (120). Likewise, each of the first to fourth via electrodes (131, 132, 133, 134) is separated by a protrusion of the first to fourth circuit layers (116, 117, 118, 119) and can be connected to another circuit layer disposed below each circuit layer.

[0082] The sixth circuit layer (121) may be in contact with one surface of the core layer (101). In this case, a part of the sixth circuit layer (121) may be arranged to cover the above-described insulating member (142). That is, the lower surface of the sixth circuit layer (121) may include a first portion in contact with the upper surface of the core via electrode (141), a second portion in contact with the upper surface of the insulating member (142), and a third portion in contact with the upper surface of the core layer (101).

[0083] The plurality of insulating layers (106, 107, 108, 109, 110) of the first build-up layer (102) may include a first insulating layer (106) that is farthest from the core layer (101) in a direction perpendicular to the core layer (101), a second insulating layer (107) that is closer to the core layer (101) in a direction perpendicular to the core layer (101) than the first insulating layer (106), a third insulating layer (108) that is closer to the core layer (101) in a direction perpendicular to the core layer (101) than the second insulating layer (107), a fourth insulating layer (109) that is closer to the core layer (101) in a direction perpendicular to the core layer (101) than the third insulating layer (108), and a fifth insulating layer (110) that is closer to the core layer (101) in a direction perpendicular to the core layer (101) than the fourth insulating layer (109).

[0084] The first to fifth insulating layers (106, 107, 108, 109, 110) are arranged to vertically insulate the first to sixth circuit layers (116, 117, 118, 119, 120, 121) described above. For example, the first to sixth insulating layers (106, 107, 108, 109, 110) may be formed using a thermosetting insulating material containing an inorganic filler in a resin, and Ajinomoto Build-up Film (ABF) of Ajinomoto Co., Ltd. may be used. However, the embodiment is not limited thereto, and a photo-curable insulating material (Photo Imageable Dielectric, PID) for forming a fine pattern may be used.

[0085] The first protective layer (104) can protect the first circuit layer (116) from external moisture or contaminants. In addition, when semiconductor elements are arranged on the circuit board (100) using a material such as solder, the first protective layer (104) functions to prevent short circuits between solders due to its low wettability with the solder. The first protective layer (104) can be formed using a photocurable insulating material, and for example, a solder resist can be used.

[0086] A second build-up layer (103) is arranged on the other side of the core layer (101). The second build-up layer (103) includes a plurality of insulating layers (111, 112, 113, 114, 115), a plurality of circuit layers (122, 123, 124, 125, 126, 127), and a second protective layer (127).

[0087] The plurality of circuit layers (122, 123, 124, 125, 126, 127) of the second build-up layer (103) may include a seventh circuit layer (122) that is most adjacent to the core layer (101) in the vertical direction, an eighth circuit layer (123) arranged under the seventh circuit layer (116), a ninth circuit layer (124) arranged under the eighth circuit layer (123), a tenth circuit layer (125) arranged under the ninth circuit layer, an eleventh circuit layer (126) arranged under the tenth circuit layer (125), and a twelfth circuit layer (127) arranged under the eleventh circuit layer (126). The seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127) may electrically connect a main board (not shown) of an electronic device and semiconductor elements arranged on a circuit board (100). Each of the seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127) may be freely designed in consideration of impedance.

[0088] Additionally, via electrodes (136, 137, 138, 139, 140) may be arranged to connect each of the seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127). The sixth via electrode (136) is disposed between the seventh circuit layer (122) and the eighth circuit layer (123), the seventh via electrode (137) is disposed between the eighth circuit layer (123) and the ninth circuit layer (124), the eighth via electrode (138) is disposed between the ninth circuit layer (124) and the tenth circuit layer (125), the ninth via electrode (139) is disposed between the tenth circuit layer (125) and the eleventh circuit layer (126), and the tenth via electrode (140) is disposed between the eleventh circuit layer (126) and the twelfth circuit layer (127), thereby electrically connecting the seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127).

[0089] As described above for the first to fifth via electrodes (131, 132, 133, 134, 135) of the first build-up layer (102), the arrangement of the sixth to tenth via electrodes (136, 137, 138, 139, 140) can be performed simultaneously in the process of arranging the eighth to twelfth circuit layers (123, 124, 125, 126, 127). Therefore, as described above, the seventh via electrode (137) can be distinguished as a protrusion of the ninth circuit layer (124). However, since the 8th to 12th circuit layers (123, 124, 125, 126, 127) are laminated in a different direction from the first build-up layer (102), the inclination direction of each via electrode (131, 132, 133, 134, 135) of the first build-up layer (102) may have a direction opposite to the inclination direction of each via electrode (136, 137, 138, 139, 140) of the second build-up layer (103). For example, each via electrode (131, 132, 133, 134, 135) of the first build-up layer (102) may have a slope that becomes narrower toward the core layer (101), and each via electrode (136, 137, 138, 139, 140) of the second build-up layer (103) may also have a slope that becomes narrower toward the core layer (101). For example, the slope of each via electrode (131, 132, 133, 134, 135) of the first build-up layer (102) may be symmetrical with respect to the slope of each via electrode (136, 137, 138, 139, 140) of the second build-up layer (103) with respect to the core layer (101).

[0090] The seventh circuit layer (122) may be in contact with the other surface of the core layer (101). In this case, a part of the seventh circuit layer (122) may be arranged to cover the above-described insulating member (142). That is, the lower surface of the seventh circuit layer (122) may include a first portion in contact with the lower surface of the core via electrode (141), a second portion in contact with the lower surface of the insulating member (142), and a third portion in contact with the lower surface of the core layer (101).

[0091] The plurality of insulating layers (111, 112, 113, 114, 115) of the second build-up layer (103) may include a sixth insulating layer (111) that is most adjacent to the core layer (101) in the vertical direction, a seventh insulating layer (112) arranged under the sixth insulating layer (111), an eighth insulating layer (113) arranged under the seventh insulating layer (112), a ninth insulating layer (114) arranged under the eighth insulating layer (113), and a tenth insulating layer (115) arranged under the ninth insulating layer (114). The 6th to 10th insulating layers (111, 112, 113, 114, 115) are arranged to vertically insulate the 7th to 12th circuit layers (122, 123, 124, 125, 126, 127) described above. In addition, as an example, the 6th to 10th insulating layers (111, 112, 113, 114, 115) may be formed using a thermosetting insulating material containing an inorganic filler in a resin, and Ajinomoto Build-up Film (ABF) of Ajinomoto Co., Ltd. may be used. However, the embodiment is not limited thereto, and a photo-curable insulating material (Photo Imageable Dielectric, PID) for forming a fine pattern may be used.

[0092] The second protective layer (105) can protect the 12th circuit layer (127) from external moisture or contaminants. In addition, when semiconductor elements are arranged on the circuit board (100) using a material such as solder, the second protective layer (105) functions to prevent short circuits between solders due to its low wettability with the solder. The second protective layer (105) can be formed using a photocurable insulating material, and for example, a solder resist can be used.

[0093] In addition, each via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140) of the first build-up layer (102) and the second build-up layer (103) may have a structure in which at least a portion thereof overlaps with each other along the vertical direction. Through this, problems of voltage drop and / or signal loss can be solved, and the degree of freedom for wiring design can be increased. However, when a load is applied to each vertically overlapping via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140) by the load applied to the circuit board (100) when a semiconductor element is mounted on the circuit board (100), there may be a problem that cracks occur at the interface between each via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140) and each circuit layer (116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127), and for this purpose, the bonding portion (146) described below may be formed at each via. It may have a structure that does not vertically overlap with the electrodes (131,132,133,134,135,136,137,138,139,140).

[0094] A bonding portion (146) is disposed on the first build-up layer (102). The bonding portion (146) may be disposed on the first circuit layer (116) exposed from the first protective layer (104). For example, the first circuit layer (116) has a pad portion that overlaps with an opening of the first protective layer (104) in a vertical direction, and the bonding portion (146) may be disposed on the pad portion of the first circuit layer (116). As the density of terminals of semiconductor devices increases, a problem of solder short-circuiting between adjacent pad portions may occur with conventional solder bonding. Therefore, in order to reduce the amount of solder used as the density of terminals of semiconductor devices increases, the semiconductor devices and the circuit board may be bonded to each other through a thermal compression bonding method. When using thermal compression bonding, the circuit board may include a bonding portion (146) protruding on the first protective layer (104). The bonding portion (146) may have a protrusion protruding on the first protective layer (104) and a penetration portion penetrating the first protective layer (104) to contact a pad portion of the first circuit layer (116).

[0095] When bonding a circuit board (100) and a semiconductor element using a thermal compression bonding method, a crack may occur in the penetration portion of the bonding portion (146) due to the load generated thereby. Therefore, cracks can be prevented by placing a material having a higher elastic modulus than the elastic modulus of the first circuit layer (116) in the penetration portion of the bonding portion (146) adjacent to the first circuit layer (116). This material may be nickel (Ni), but a copper layer having a low grain density can be placed by electroless plating.

[0096] The bonding portion (146) can be arranged to penetrate the first protective layer (104) on the first circuit layer (116) by filling an opening provided in the dry film with a conductive material. The bonding portion (146) can include a first portion (144) and a second portion (145) having different widths in the horizontal direction along the vertical direction.

[0097] The first portion (144) of the bonding portion (146) may be disposed on the pad portion of the first circuit layer (116). The horizontal width of the first portion (144) may be greater than the horizontal width of the pad portion of the first circuit layer (116). In addition, referring to FIG. 1A, the horizontal width of the first portion (144) may be greater than the horizontal width of the opening provided in the first protective layer (104). In this case, the horizontal width of the first portion (144) may be greater than the horizontal width of the opening of the first protective layer (104), and thereby, the inner wall of the opening of the first protective layer (104) and the outer surface of the first portion (144) may be spaced apart from each other without contacting each other. In addition, referring to FIG. 1B, the horizontal width of the first portion (144) may be the same as the horizontal width of the opening of the first protective layer (104), through which the inner wall of the opening of the first protective layer (104) and the outer surface of the first portion (144) may be in contact with each other. In this case, the first portion (144) of the bonding portion (146) may be supported by the first protective layer (104) and provided with a certain height on the pad portion of the first circuit layer (116).

[0098] The second part (145) of the bonding part (146) may be provided with a certain height on the first part (144). At this time, the horizontal width of the second part (145) may be different from the horizontal width of the first part (144). Preferably, the horizontal width of the second part (145) may be smaller than the horizontal width of the first part (144). Accordingly, the bonding part (146) may be provided with a step on the outer surface of the second part (145) and the outer surface of the first part (144).

[0099] Through this, the embodiment can make the bonding portion (146) have a height greater than a certain level, and further, can make the pitch between a plurality of bonding portions (146) spaced apart along the horizontal direction fine.

[0100] The bonding portion (146) must be positioned at a certain height on the pad portion of the first circuit layer (116). The height of the bonding portion (146) may refer to the vertical distance between the upper surface of the bonding portion (146) and the lower surface of the bonding portion (146). The bonding portion (146) may be positioned by forming an opening by exposing and developing a dry film and then filling the above-described opening with a metal material. At this time, as the height of the bonding portion (146) increases, the thickness of the dry film also increases, and thus the exposure resolution of the dry film may deteriorate. For example, when performing the exposure process by irradiating light on the upper surface of the dry film, sufficient light may not be transmitted to an area adjacent to the lower surface of the dry film, and thus a portion of the dry film may not be exposed and developed. Furthermore, as the thickness of the dry film increases, the problem of resolution deterioration due to light refraction may become greater. Therefore, in the prior art, there is a limit to reducing the width of the bonding portion (146) in the horizontal direction, and further, there is a limit to reducing the pitch between multiple bonding portions (146).

[0101] In contrast, the embodiment forms a bonding portion (146) using a plurality of dry films. For example, when the bonding portion (146) has a height of 200 μm, in the prior art, the bonding portion is arranged using a 200 μm dry film, but in the embodiment, the bonding portion is arranged after laminating two layers of 100 μm dry films. Through this, the embodiment can solve the problem of reduced exposure resolution due to light refraction that occurs depending on the thickness of the dry film, and through this, the horizontal width of the bonding portion (146) can be reduced. Furthermore, in the present invention, by making the horizontal width of the second part (145) of the bonding part (146) narrower than the horizontal width of the first part (144) of the bonding part (146), the pitch between adjacent bonding parts (146) can be maintained while increasing the spacing between adjacent bonding parts (146), and thus, the circuit short problem that occurs when adjacent bonding parts (146) are electrically connected to each other can be solved.

[0102] The first part (144) and the second part (145) of the bonding portion (146) may have their central axes misaligned in the horizontal direction. For example, the central axis of the first part (144) of the bonding portion (146) in the horizontal direction may be misaligned with the central axis of the second part (145) in the horizontal direction. Accordingly, the side surface of the bonding portion (146) may have a step due to the difference between the horizontal width of the first part (144) and the horizontal width of the second part (145), and as the horizontal central axis of the first part (144) and the horizontal central axis of the second part (145) are misaligned, the horizontal distance of the step described above may not be uniform along the circumferential direction of the upper or lower surface of the bonding portion (146). For example, the first side of the first portion (144) and the first side of the second portion (145) on one side of the bonding portion (146) may have a first horizontal distance along the horizontal direction, and the second side of the first portion (144) and the second side of the second portion (145) on the other side of the bonding portion (146) may have a second horizontal distance different from the first horizontal distance along the horizontal direction. Through this, the embodiment can prevent the circuit board from being significantly warped in a specific direction due to a misalignment of the horizontal central axis of the first portion (144) of the bonding portion (146) and the horizontal central axis of the second portion (145), and further, can selectively increase and / or decrease the separation distance between the plurality of bonding portions while maintaining the pitch between the plurality of bonding portions according to the characteristics that the plurality of bonding portions should have, thereby minimizing signal interference and minimizing signal transmission loss, thereby improving communication characteristics.

[0103] The bonding portion (146) may include a plurality of bonding portions whose horizontal central axes of the second portion (145) are misaligned in different directions with respect to the horizontal central axis of the first portion (144). In addition, the misaligned direction described above may be determined by considering the direction in which the circuit board is bent, or may be determined by considering the condition that the separation distance between them must be increased or decreased according to the characteristics of the plurality of bonding portions.

[0104] For example, the misaligned direction of each of the plurality of bonding portions may be a direction away from the horizontal central axis of the first build-up layer (102), or conversely, may be a direction toward the horizontal central axis of the first build-up layer (102). For example, the plurality of bonding portions may include a first bonding portion located on a first side of the horizontal central axis of the first build-up layer (102) and a second bonding portion located on a second side opposite to the first side, and the misaligned direction of the first bonding portion may be an opposite direction to the misaligned direction of the second bonding portion. For example, the misaligned direction of the first bonding portion may be a direction toward the first side from the horizontal central axis of the first build-up layer (102), and the misaligned direction of the second bonding portion may be a direction toward the second side from the horizontal central axis of the first build-up layer (102). As another example, the misaligned direction of the first bonding portion may be a direction toward the horizontal central axis of the first build-up layer (102) or a direction toward the second side described above, and the misaligned direction of the second bonding portion may be a direction toward the horizontal central axis of the first build-up layer (102) or a direction toward the first side described above. This may be in consideration of the direction in which the circuit board (100) is bent, and by utilizing the misaligned direction of each of the plurality of bonding portions, it is possible to alleviate the circuit board (100) from being bent in a specific direction, and further, it is possible to prevent the circuit board from being bent in a specific direction.

[0105] Furthermore, the degree of misalignment between the horizontal central axis of the first portion (144) of each of the plurality of bonding portions and the horizontal central axis of the second portion (145) may be different. This may be in consideration of the direction in which the circuit board (100) is bent, and by utilizing the misaligned direction of each of the plurality of bonding portions, it is possible to alleviate the circuit board (100) from being bent in a specific direction, and further, to prevent the circuit board from being bent in a specific direction.

[0106]

[0107] The structure of the circuit board (100) described above is only an example for explaining the present invention, and the technical idea of ​​the present invention is not limited to the laminated structure of the present embodiment.

[0108] The circuit board (100) may warp depending on the heat and / or pressure applied during the process, the thickness of each insulating layer, the thickness of each protective layer, and the density or thickness of the circuit layer. Warp may be caused by warping in the smile direction (∪) and warping in the cry direction (∩), and warping in these two directions may be applied in combination. Warping in the smile direction means that the upper and / or lower surface of the circuit board (100) is warped concavely so that the center is lower than the edge of the circuit board (100), and may also be referred to as a concave direction. In addition, warping in the cry direction means that the upper and / or lower surface of the circuit board (100) is warped convexly so that the center is higher than the edge of the circuit board (100), in a direction opposite to the warping in the smile direction, and may also be referred to as a convex direction.

[0109] The warpage of the circuit board (100) may be a factor that prevents the semiconductor elements placed on the first protective layer (104) from being uniformly bonded to the entire circuit board (100) by solder bonding, etc., thereby reducing the reliability of the semiconductor package. To solve this problem, the embodiment includes a bonding portion (146) including a first portion (144) and a second portion (145) having different widths in the horizontal direction, and further, the central axes of the first portion (144) and the second portion (145) in the horizontal direction are misaligned from each other, and further, a plurality of bonding portions having different misaligned directions and / or misaligned degrees are provided.

[0110] That is, when the bonding portion (146) is arranged without considering the direction in which the circuit board is bent, the horizontal central axes of the first portion (144) and the second portion (145) may coincide (or be aligned) with each other. In contrast, the embodiment may provide the first portion (144) and the second portion (145) with a step in consideration of the direction in which the circuit board (100) is bent, and further, the horizontal central axes of the first portion (144) and the second portion (145) may be misaligned with each other.

[0111] According to the embodiments of (a) and (b) of FIG. 2A, the circuit board includes a build-up layer (200) and bonding portions (260, 270). The build-up layer (200) may include an insulating layer (210), a first circuit layer (220, 225), a second circuit layer (230), a via electrode (240), and a protective layer (250). For example, the build-up layer (200) may correspond to the first build-up layer (102) illustrated in FIGS. 1A and 1B, the first circuit layer (220, 225) may correspond to the first circuit layer (116) and the second circuit layer (117) illustrated in FIGS. 1A and 1B, the via electrode (240) may correspond to the first via electrode (131) illustrated in FIGS. 1A and 1B, the insulating layer (210) may correspond to the first insulating layer (106) illustrated in FIGS. 1A and 1B, and the protective layer (250) may correspond to the first protective layer (104) illustrated in FIGS. 1A and 1B.

[0112] The first circuit layer (220, 225) of the build-up layer (200) may have a plurality of pad portions spaced apart along the horizontal direction. For example, the first circuit layer (220, 225) may have a first pad portion (220) and a second pad portion (225) spaced apart along the horizontal direction.

[0113] The bonding portion (260, 270) may include a first bonding portion (260) positioned on the first pad portion (220) and a second bonding portion (270) positioned on the second pad portion (225).

[0114] In addition, the first bonding portion (260) may include a first portion (261) disposed on the first pad portion (220) and having a first width in the horizontal direction, and a second portion (262) disposed on the first portion (261) and having a second width smaller than the first width in the horizontal direction. In addition, the central axis (X1) of the first portion (261) of the first bonding portion (260) in the horizontal direction and the central axis (X2) of the second portion (262) of the first bonding portion (260) in the horizontal direction may be misaligned with each other. That is, the outer surface of the first portion (261) of the first bonding portion (260) and the outer surface of the second portion (262) may have a step.

[0115] At this time, the horizontal central axis (X1) of the first part (261) of the first bonding part (260) may not be aligned with the horizontal central axis (X2) of the second part (262) of the first bonding part (260) and may be spaced apart from it in the horizontal direction. That is, the horizontal central axis (X1) of the first part (261) of the first bonding part (260) and the horizontal central axis (X2) of the second part (262) of the first bonding part (260) may be misaligned with each other. Here, when the upper surface of the first part (261) of the first bonding part (260) has a circular or elliptical shape, the horizontal central axis (X1) of the first part (261) of the first bonding part (260) may mean the intersection point where the major axis and the minor axis of the upper surface of the first part (261) meet. Alternatively, when the upper surface of the first part (261) of the first bonding part (260) has a square shape, the horizontal central axis (X1) of the first part (261) may mean a point where a line segment connecting two vertices facing each other on the upper surface of the first part (261) of the first bonding part (260) meets. Correspondingly, the horizontal central axis (X2) of the second part (262) of the first bonding part (260) may mean an intersection where the major axis and the minor axis meet, or a point where two line segments connecting two vertices facing each other meet.

[0116] The horizontal central axis (X1) of the first part (261) of the first bonding portion (260) and the horizontal central axis (X2) of the second part (262) of the first bonding portion (260) are misaligned with each other, and may have a horizontal separation distance (W3) as an example. For example, the horizontal central axis (X2) of the second part (262) of the first bonding portion (260) may be shifted horizontally by a horizontal separation distance (W3) based on the horizontal central axes (X1) of the first part (144) and the second part (145) of the first bonding portion (260). Here, shifting may mean that the central axis (X2) of the second part (262) of the first bonding part (260) and the central axis (X1) of the first part (261) of the first bonding part (260) are not aligned along the vertical direction but are misaligned. For example, the shift described above may mean that the horizontal distance from the horizontal central axis (X0) of the build-up layer (200) to the central axis (X2) of the second part (262) of the first bonding portion (260) and the horizontal distance from the horizontal central axis (X0) of the build-up layer (200) to the central axis (X1) of the first part (261) of the first bonding portion (260) are applied differently from each other, and for example, the horizontal distance from the horizontal central axis (X0) of the build-up layer (200) to the central axis (X2) of the second part (262) of the first bonding portion (260) may mean that it is smaller or larger than the horizontal distance from the horizontal central axis (X0) of the build-up layer (200) to the central axis (X1) of the first part (261) of the first bonding portion (260). In addition, the shift described above means that the horizontal central axis (X1) of the first part (261) of the first bonding part (260) and the central axis (X2) of the second part (262) of the first bonding part (260) are not aligned with each other and are misaligned. For the convenience of explanation, the terms “shift” and / or “misalignment” will be used in the description in the above-described meanings below.

[0117] The circuit board (100) can be prevented from being bent in a specific direction depending on the direction and distance in which the central axis (X2) of the second part (262) of the first bonding part (260) is shifted based on the central axis (X1) of the first part (261) of the first bonding part (260). At this time, depending on the direction and distance in which the central axis (X2) of the second part (262) of the first bonding part (260) is shifted based on the central axis (X1) of the first part (261) of the first bonding part (260), warping of the circuit board (100) in a specific direction may occur, and the meaning of the above-described alleviation may mean that the central axes of the first part (261) and the second part (262) of the first bonding part (260) are misaligned with each other so that warping of the circuit board occurs in the opposite direction based on the direction in which the circuit board (100) is bent before the above-described misalignment is applied.

[0118] By making the central axis (X2) of the second portion (262) of the first bonding portion (260) misaligned with the central axis (X1) of the first portion (261) of the first bonding portion (260) based on the direction in which the circuit board (100) is bent, the circuit board (100) can be prevented from being bent in a specific direction, excessive stress applied to the circuit board can be avoided, and mechanical reliability and / or electrical reliability of the circuit board can be improved accordingly. In addition, the embodiment can alleviate the warpage of the circuit board so that a semiconductor element can be stably attached on the circuit board. At this time, when the circuit board is bent in a specific direction, a height deviation may occur between a plurality of bonding portions provided on the circuit board, and terminals of the semiconductor element may not be stably bonded on the plurality of bonding portions. In contrast, the embodiment can alleviate the overall warpage of the circuit board through the misalignment between the central axes (X1, X2) of the first part (261) and the second part (262) of the first bonding part (260), and can stably attach the semiconductor element on the circuit board. Therefore, the embodiment can improve the reliability of the product by enabling the semiconductor element to operate stably. Furthermore, the embodiment can enable the stable operation of a product such as a server to which a semiconductor package is applied.

[0119] In addition, as the horizontal central axis (X2) of the second part (262) of the first bonding part (260) is misaligned with respect to the horizontal central axis (X1) of the first part (261) of the first bonding part (260), the horizontal distances of the steps on the outer surfaces of the first part (261) and the second part (262) of the first bonding part (260) may have different horizontal distances along the circumferential direction of the upper surface and / or lower surface of the first bonding part (260).

[0120] That is, based on the vertical cross-section of the first bonding portion (260), the step between the outer surface of the first part (261) and the outer surface of the second part (262) on one side of the first bonding portion (260) may have a first horizontal distance (W1), and the step between the outer surface of the first part (261) and the outer surface of the second part (262) on the other side opposite to the one side may have a second horizontal distance (W2) different from the first horizontal distance (W1). Furthermore, the steps provided on the outer surfaces of the first part (261) and the second part (262) of the first bonding portion (260) may not be uniform along the circumferential direction of the upper surface and / or lower surface of the first bonding portion (260).

[0121] At this time, the first horizontal distance (W1) and the second horizontal distance (W2) can be determined according to the misalignment direction and misalignment degree between the respective central axes (X1, X2) of the first part (261) and the second part (262) of the first bonding part (260). Here, the misalignment direction can mean the direction in which the horizontal central axis (X2) of the second part (262) of the first bonding part (260) is located based on the horizontal central axis (X1) of the first part (261) of the bonding part (260), and the misalignment degree can mean the horizontal distance between the horizontal central axis (X1) of the first part (261) of the bonding part (260) and the horizontal central axis (X2) of the second part (262) of the first bonding part (260). In addition, the embodiment can alleviate the overall warpage of the circuit board (100) by aligning the horizontal central axis (X2) of the second part (262) of the first bonding part (260) with respect to the horizontal central axis (X1) of the first part (261) of the bonding part (260).

[0122] At this time, Fig. 2a illustrates that the horizontal central axis (X2) of the second part (262) of the first bonding part (260) is misaligned in the first horizontal direction based on the horizontal central axis (X1) of the first part (261) of the first bonding part (260), and Fig. 2b illustrates the second bonding part that is misaligned in the second horizontal direction opposite to the first horizontal direction.

[0123] Referring to (a) and (b) of FIG. 2B, the second bonding portion (270) may include a first portion (271) disposed on the second pad portion (225), and a second portion (272) disposed on the first portion (271). In addition, the first portion (271) and the second portion (272) of the second bonding portion (270) may have different widths in the horizontal direction, and further, the horizontal central axis (X3) of the first portion (271) and the horizontal central axis (X4) of the second portion (272) may not be aligned but may be spaced apart in the horizontal direction. The horizontal central axis (X3) of the first portion (271) of the second bonding portion (270) and the horizontal central axis (X4) of the second portion (272) of the second bonding portion (270) may be misaligned with each other.

[0124] The horizontal central axis (X3) of the first part (271) of the second bonding portion (270) and the horizontal central axis (X4) of the second part (272) of the second bonding portion (270) are misaligned with each other, and may have a horizontal separation distance (W6) as an example. For example, the horizontal separation distance (X4) of the second part (272) of the second bonding portion (270) may be misaligned with respect to the horizontal separation distance (W6) with respect to the central axis (X3) of the first part (271) of the second bonding portion (270).

[0125] And, depending on the direction and distance in which the central axis (X4) of the second part (272) of the second bonding part (270) moves or deviates from the central axis (X3) of the first part (271) of the second bonding part (270), the circuit board (100) can be alleviated from being bent in a specific direction.

[0126] At this time, depending on the direction and distance in which the central axis (X4) of the second part (272) of the second bonding part (270) is misaligned with respect to the central axis (X3) of the first part (271) of the second bonding part (270), warping of the circuit board (100) in a specific direction may occur, and the meaning of the above-described alleviation may mean that the central axes of the first part (271) and the second part (272) of the second bonding part (270) are misaligned with respect to the direction in which the circuit board (100) is bent before the above-described misalignment is applied so that warping of the circuit board occurs in the opposite direction.

[0127] By making the central axis (X4) of the second portion (272) of the second bonding portion (270) misaligned with the central axis (X3) of the first portion (271) of the second bonding portion (270) based on the direction in which the circuit board (100) is bent, the circuit board (100) can be prevented from being bent in a specific direction, excessive stress applied to the circuit board can be avoided, and mechanical reliability and / or electrical reliability of the circuit board can be improved accordingly. In addition, the embodiment can alleviate warpage of the circuit board so that a semiconductor element can be stably attached on the circuit board. At this time, when the circuit board is bent in a specific direction, a height deviation may occur between a plurality of bonding portions provided on the circuit board, and terminals of the semiconductor element may not be stably bonded on the plurality of bonding portions. In contrast, the embodiment can alleviate the overall warpage of the circuit board through the misalignment between the central axes (X3, X4) of the first part (271) and the second part (272) of the second bonding part (270), and can enable the semiconductor element to be stably attached on the circuit board. Therefore, the embodiment can enable the semiconductor element to operate stably, thereby improving product reliability. Furthermore, the embodiment can enable the stable operation of products such as servers to which the semiconductor package is applied.

[0128] In addition, since the horizontal central axis (X4) of the second part (272) of the second bonding part (270) is misaligned with respect to the horizontal central axis (X3) of the first part (271) of the second bonding part (270), the horizontal distance of the step on the outer surface of the first part (271) and the second part (272) of the second bonding part (270) may have different horizontal distances along the circumferential direction of the upper surface and / or lower surface of the seventh bonding part (270).

[0129] That is, based on the vertical cross-section of the second bonding portion (270), the step between the outer surface of the first portion (271) and the outer surface of the second portion (272) on one side of the second bonding portion (270) may have a third horizontal distance (W4), and the step between the outer surface of the first portion (271) and the outer surface of the second portion (272) on the other side opposite to the one side may have a fourth horizontal distance (W5) different from the third horizontal distance (W4). Furthermore, the steps provided on the outer surfaces of the first portion (271) and the second portion (272) of the second bonding portion (270) may not be uniform along the circumferential direction of the upper surface and / or lower surface of the second bonding portion (270).

[0130] At this time, the third horizontal distance (W4) and the fourth horizontal distance (W5) can be determined according to the misalignment direction and misalignment degree between the respective central axes (X3, X4) of the first part (271) and the second part (272) of the second bonding part (270). Here, the misalignment direction can mean the direction in which the horizontal central axis (X4) of the second part (272) of the second bonding part (270) is located with respect to the horizontal central axis (X3) of the first part (271) of the second bonding part (270), and the misalignment degree can mean the horizontal distance between the horizontal central axis (X3) of the first part (271) of the second bonding part (270) and the horizontal central axis (X2) of the second part (272) of the second bonding part (270). And, the embodiment can alleviate the overall warpage of the circuit board (100) by aligning the horizontal central axis (X2) of the second part (272) of the second bonding part (270) with respect to the horizontal central axis (X3) of the first part (271) of the second bonding part (270).

[0131] Meanwhile, the circuit board of the embodiment may be provided with only the first bonding portion (260) described above, may be provided with only the second bonding portion (270), or may be provided with both the first bonding portion (260) and the second bonding portion (270). Furthermore, the embodiment may be provided with both the first bonding portion (260) and the second bonding portion (270) based on the position at which each bonding portion is arranged.

[0132] According to the embodiment of FIG. 3a, the circuit board may have a build-up layer (300) and a plurality of bonding portions (360, 370) arranged on the build-up layer (300). The plurality of bonding portions (360, 370) may be positioned in different directions with respect to a central axis (X0) in the horizontal direction of the build-up layer (300). The central axis (X0) of the build-up layer (300) may mean a point where two line segments connecting two vertices facing each other with respect to a plane of the build-up layer (300) meet.

[0133] The build-up layer (300) may include an insulating layer (310), a first circuit layer (320), a second circuit layer (330), a via electrode (340), and a protective layer (350). The first circuit layer (320) may include a plurality of pad portions spaced apart horizontally on the insulating layer (310).

[0134] The plurality of bonding portions (360, 370) may include a first bonding portion (360) located on one side with respect to the central axis (X0) of the build-up layer (300), and a second bonding portion (370) located on the other side opposite to the one side with respect to the central axis (X0) of the build-up layer (300).

[0135] The first bonding portion (360) may include a first portion (361) disposed on the first pad portion of the first circuit layer (320) and a second portion (362) disposed on the first portion (361). In addition, the horizontal width of the first portion (361) of the first bonding portion (360) is larger than the horizontal width of the second portion (362), and the horizontal central axis of the first portion (361) of the first bonding portion (360) and the horizontal central axis of the second portion (362) may be misaligned.

[0136] The second bonding portion (370) may include a first portion (371) disposed on the second pad portion of the first circuit layer (320) and a second portion (372) disposed on the first portion (371). In addition, the horizontal width of the first portion (371) of the second bonding portion (370) is larger than the horizontal width of the second portion (372), and the horizontal central axis of the first portion (371) of the second bonding portion (370) and the horizontal central axis of the second portion (372) may be misaligned.

[0137] At this time, the misalignment direction of the horizontal central axes of the first part (361) and the second part (362) of the first bonding part (360) may be different from the misalignment direction of the horizontal central axes of the first part (371) and the second part (372) of the second bonding part (370).

[0138] That is, the central axis of the second part (362) of the first bonding part (360) may be misaligned (misalignment 1) in the first horizontal direction with respect to the central axis of the first part (361). For example, the central axis of the second part (362) of the first bonding part (360) may be misaligned (misalignment 1) in a direction away from the horizontal central axis (X0) of the build-up layer (300) with respect to the central axis of the first part (361).

[0139] The central axis of the second part (372) of the second bonding part (370) may be misaligned (misalignment 2) in a second horizontal direction opposite to the first horizontal direction described above with respect to the central axis of the first part (371). For example, the central axis of the second part (372) of the second bonding part (370) may be misaligned (misalignment 2) in a direction away from the horizontal central axis (X0) of the build-up layer (300) with respect to the central axis of the first part (371).

[0140] That is, the horizontal central axis of each of the second parts (362, 372) of the plurality of bonding parts (360, 370) can be shifted away from the horizontal central axis (X0) of the build-up layer (300) with respect to the horizontal central axis of the first part (361, 371), thereby further alleviating the bending of the circuit board in a specific direction.

[0141] In addition, according to the embodiment of FIG. 3b, the circuit board may have a build-up layer (300) and a plurality of bonding portions (380, 390) arranged on the build-up layer (300). The plurality of bonding portions (380, 390) may be positioned in different directions with respect to a central axis (X0) in the horizontal direction of the build-up layer (300). The central axis (X0) of the build-up layer (300) may mean a point where two line segments connecting two vertices facing each other with respect to the plane of the build-up layer (300) meet.

[0142] The build-up layer (300) may include an insulating layer (310), a first circuit layer (320), a second circuit layer (330), a via electrode (340), and a protective layer (350). The first circuit layer (320) may include a plurality of pad portions spaced apart horizontally on the insulating layer (310).

[0143] The plurality of bonding portions (380, 390) may include a first bonding portion (380) located on one side with respect to the central axis (X0) of the build-up layer (300), and a second bonding portion (390) located on the other side opposite to the one side with respect to the central axis (X0) of the build-up layer (300).

[0144] The first bonding portion (380) may include a first portion (381) disposed on the first pad portion of the first circuit layer (320) and a second portion (382) disposed on the first portion (381). In addition, the horizontal width of the first portion (381) of the first bonding portion (380) is larger than the horizontal width of the second portion (382), and the horizontal central axis of the first portion (381) of the first bonding portion (380) and the horizontal central axis of the second portion (382) may be misaligned.

[0145] The second bonding portion (390) may include a first portion (391) disposed on the second pad portion of the first circuit layer (320) and a second portion (392) disposed on the first portion (391). In addition, the horizontal width of the first portion (391) of the second bonding portion (390) is larger than the horizontal width of the second portion (392), and the horizontal central axis of the first portion (391) of the second bonding portion (390) and the horizontal central axis of the second portion (392) may be misaligned.

[0146] At this time, the misalignment direction of the horizontal central axes of the first part (381) and the second part (382) of the first bonding part (380) may be different from the misalignment direction of the horizontal central axes of the first part (391) and the second part (392) of the second bonding part (390).

[0147] That is, the central axis of the second part (382) of the first bonding part (380) may be misaligned (misalignment 2) in the second horizontal direction with respect to the central axis of the first part (381). For example, the central axis of the second part (382) of the first bonding part (380) may be misaligned (misalignment 2) in the direction toward the horizontal central axis (X0) of the build-up layer (300) or toward the second bonding part (390) with respect to the central axis of the first part (381).

[0148] The central axis of the second part (392) of the second bonding part (390) may be misaligned (misalignment 1) in a first horizontal direction opposite to the second horizontal direction described above with respect to the central axis of the first part (391). For example, the central axis of the second part (392) of the second bonding part (390) may be misaligned (misalignment 1) in a direction toward the horizontal central axis (X0) of the build-up layer (300) or toward the first bonding part (380) with respect to the central axis of the first part (391).

[0149] That is, the horizontal central axis of each of the second parts (382, 392) of the plurality of bonding parts (380, 390) can be misaligned in the direction toward the horizontal central axis (X0) of the build-up layer (300) based on the horizontal central axis of the first part (381, 391), thereby further alleviating the bending of the circuit board in a specific direction.

[0150] For example, when the circuit board (100) is bent in a first direction (for example, a crying direction), the circuit board may have a plurality of bonding portions (360, 370) as shown in FIG. 3A, and accordingly, the central axis of the second portion (362) of the first bonding portion (360) is misaligned (misalignment 1) in the first horizontal direction with respect to the central axis of the first portion (361), and the central axis of the second portion (372) of the second bonding portion (370) is misaligned (misalignment 2) in the second horizontal direction from the horizontal central axis (X0) of the build-up layer (300) with respect to the central axis of the first portion (371), so that the overall bending of the circuit board can be further alleviated.

[0151] Conversely, when the circuit board (100) is bent in the second direction (for example, the smile direction), the circuit board may have a plurality of bonding portions (380, 390) as shown in FIG. 3b, and accordingly, the central axis of the second portion (382) of the first bonding portion (380) is misaligned (misalignment 2) in the second horizontal direction with respect to the central axis of the first portion (381), and the central axis of the second portion (392) of the second bonding portion (390) is misaligned (misalignment 1) in the first horizontal direction from the horizontal central axis (X0) of the build-up layer (300) with respect to the central axis of the first portion (391), so that the overall warpage of the circuit board can be further alleviated.

[0152] Meanwhile, the circuit board may have a plurality of bonding portions arranged in different directions based on the central axis (X0) of the build-up layer, and the misaligned directions of the first and second portions of each of the plurality of bonding portions may be different from each other.

[0153] That is, according to the embodiment of FIG. 4, the build-up (401) includes a plurality of first parts (402, 404, 406, 408, 410, 412, 414, 416) and a plurality of second parts (403, 405, 407, 409, 411, 413, 415, 417) located in different horizontal directions based on the horizontal central axis (X0) of the build-up layer (401). Each of the plurality of second parts (403, 405, 407, 409, 411, 413, 415, 417) may be misaligned in different directions with respect to the horizontal central axis of each of the first parts (402, 404, 406, 408, 410, 412, 414, 416), and for example, may be misaligned in the direction toward the horizontal central axis (X0) of the build-up layer (300).

[0154] For example, a first bonding portion having a first portion (402) and a second portion (403) is arranged on the left side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (403) of the first bonding portion may be misaligned (misalignment 1) in a first horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (402).

[0155] In addition, a second bonding portion having a first portion (404) and a second portion (405) is arranged on the right side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (405) of the second bonding portion may be misaligned (misalignment 2) in a second horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (404).

[0156] In addition, a third bonding portion having a first portion (406) and a second portion (407) is arranged on the rear side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (407) of the third bonding portion may be misaligned (misalignment 3) in a third horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (406).

[0157] In addition, a fourth bonding portion having a first portion (408) and a second portion (409) is arranged in front of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (409) of the fourth bonding portion may be misaligned (misalignment 4) in a fourth horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (408).

[0158] In addition, a fifth bonding portion including a first portion (410) and a second portion (411) is arranged on the left-rear side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (411) of the fifth bonding portion may be misaligned (misalignment 5) in a fifth horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) based on the horizontal central axis of the first portion (410).

[0159] In addition, a sixth bonding portion having a first portion (412) and a second portion (413) is arranged on the right-rear side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (413) of the sixth bonding portion may be misaligned (misaligned 6) in a sixth horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (412).

[0160] In addition, a seventh bonding portion having a first portion (414) and a second portion (415) is arranged on the left-front side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (415) of the seventh bonding portion may be misaligned (misaligned 7) in a seventh horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (414).

[0161] In addition, an eighth bonding portion having a first portion (416) and a second portion (417) is arranged on the right-front side of the horizontal central axis (X0) of the build-up layer (401). The horizontal central axis of the second portion (417) of the eighth bonding portion may be misaligned (misalignment 7) in the eighth horizontal direction toward the horizontal central axis (X0) of the build-up layer (401) with respect to the horizontal central axis of the first portion (416).

[0162] At this time, the embodiment of FIG. 4 shows one embodiment according to the bending direction of the circuit board, and each bonding portion illustrated in FIG. 4 may be provided with a misaligned structure in the opposite direction according to the bending direction of the circuit board.

[0163] In addition, according to the embodiment of FIG. 5, the plurality of bonding portions (560, 570) may have the same misaligned direction on one side of the horizontal central axis (X0) of the build-up layer (500). At this time, the plurality of bonding portions (560, 570) may be misaligned with different degrees of misalignment based on the distance from the horizontal central axis (X0) of the build-up layer (500).

[0164] For example, the build-up layer (500) may include an insulating layer (510), a first circuit layer (520), a second circuit layer (530), a via electrode (540), and a protective layer (550). The first circuit layer (520) may include a plurality of pad portions spaced apart horizontally on the insulating layer (510).

[0165] The plurality of bonding portions (560, 570) may include a first bonding portion (560) provided with a first separation distance on one side (e.g., left) with respect to the central axis (X0) of the build-up layer (500), and a second bonding portion (570) provided with a second separation distance smaller than the first separation distance on the aforementioned side (e.g., left) with respect to the central axis (X0) of the build-up layer (500).

[0166] At this time, a plurality of bonding portions (560, 570) arranged in the same direction based on the central axis (X0) of the build-up layer (500) may have the same misaligned direction. For example, the horizontal central axis of the second part (562) of the first bonding portion (560) may be misaligned in a direction away from the central axis (X0) of the build-up layer (500) based on the horizontal central axis of the first part (561). In addition, the horizontal central axis of the second part (572) of the second bonding portion (570) may be misaligned in a direction away from the central axis (X0) of the build-up layer (500) based on the horizontal central axis of the first part (571).

[0167] The horizontal central axis of the second part (562) of the first bonding part (560) may be misaligned (misalignment 1-1) in a direction away from the central axis (X0) of the build-up layer (500) with respect to the horizontal central axis of the first part (561). In addition, the horizontal central axis of the second part (572) of the second bonding part (570) may be misaligned (misalignment 1-2) in a direction away from the central axis (X0) of the build-up layer (500) with respect to the horizontal central axis of the first part (571).

[0168] At this time, the first misalignment distance (W7) may be greater than the second misalignment distance (W8), thereby more efficiently improving the bending of the circuit board in a specific direction, and thereby further improving the mechanical reliability and / or electrical reliability of the circuit board and semiconductor package. However, depending on the direction in which the circuit board is bent, the misalignment direction of each of the plurality of bonding portions (560, 570) may vary, and further, the misalignment distance may also vary.

[0169] In the above-described embodiment, the misalignment direction and misalignment distance of the plurality of bonding portions can be determined based on the position at which the bonding portions are arranged based on the horizontal central axis (X0) of the build-up layer.

[0170] Alternatively, the plurality of bonding portions may have different misaligned directions and misaligned distances, regardless of the horizontal central axis (X0) of the build-up layer. For example, the plurality of bonding portions may be grouped into a plurality of groups corresponding to terminals connected to semiconductor elements, and the bonding portions grouped into the same group may have a structure in which they are misaligned in the direction facing each other.

[0171] According to the embodiment of FIG. 6, the circuit board may have a build-up layer (600) and a plurality of bonding portions (621, 622, 631, 632, 641, 642, 651, 652, 661, 662, 671, 672) arranged on the build-up layer (600). The plurality of bonding portions (621, 622, 631, 632, 641, 642, 651, 652, 661, 662, 671, 672) may be grouped into a plurality of groups according to the arrangement position and / or the type of terminal of the semiconductor element to be connected. For example, a plurality of bonding portions (621, 622, 631, 632, 641, 642, 651, 652, 661, 662, 671, 672) may be grouped into the same group, but the present invention is not limited thereto.

[0172] For example, the first bonding portion (621) and the second bonding portion (622) may be grouped into a first group (620), and the second portions of each of the first bonding portion (621) and the second bonding portion (622) may have a structure that is misaligned in the direction facing each other.

[0173] For example, the third bonding portion (631) and the fourth bonding portion (632) may be grouped into a second group (630), and the second portions of each of the third bonding portion (631) and the fourth bonding portion (632) may have a structure that is misaligned in the direction facing each other.

[0174] For example, the fifth bonding portion (641) and the sixth bonding portion (642) may be grouped into a third group (640), and the second portions of each of the fifth bonding portion (641) and the sixth bonding portion (642) may have a structure that is misaligned in the direction facing each other.

[0175] For example, the seventh bonding portion (651) and the eighth bonding portion (652) may be grouped into a fourth group (650), and the second portions of each of the seventh bonding portion (651) and the eighth bonding portion (652) may have a structure that is misaligned in the direction facing each other.

[0176] For example, the ninth bonding portion (661) and the tenth bonding portion (662) may be grouped into a fifth group (660), and the second portions of each of the ninth bonding portion (661) and the tenth bonding portion (662) may have a structure that is misaligned in the direction facing each other.

[0177] For example, the 11th bonding portion (671) and the 12th bonding portion (672) may be grouped into a 6th group (670), and the second portions of each of the 11th bonding portion (671) and the 12th bonding portion (672) may have a structure that is misaligned in the direction facing each other.

[0178] Through this, the separation distance between the second parts of the multiple bonding parts can be selectively increased while maintaining the pitch between the multiple bonding parts according to the characteristics that each bonding part should have, thereby minimizing signal interference caused thereby, and also the separation distance between the second parts of the multiple bonding parts can be reduced to improve communication characteristics accordingly.

[0179]

[0180] According to the embodiment of FIG. 7, the circuit board includes a laminated structure (710) that is laminated along a vertical direction. The laminated structure (710) may include a core layer (711), a first build-up layer (712), and a second build-up layer (713) that are laminated along the vertical direction. In addition, the circuit board may further include at least one connecting member (720) embedded in the laminated structure (710). At this time, the basic structure of the laminated structure (710) illustrated in FIG. 7 corresponds to the structure of the circuit board illustrated in FIG. 1A or 1B, and a detailed description thereof is omitted. The connecting member (720) may function to electrically connect a plurality of semiconductor elements.

[0181] Recently, as the number of signals that semiconductor devices must process increases, the size of semiconductor devices is trending toward larger areas. However, this larger area of ​​semiconductor devices has become a problem that lowers the yield of semiconductor devices. Therefore, there is a trend to divide the pattern size or functional part of semiconductor devices, place chiplets on a circuit board, and embed a connecting member (720) that has the function of electrically connecting them within the circuit board. However, the connecting member (720) is not limited thereto, and can also connect semiconductor devices with other functions, such as memory. In addition, it is advantageous for preventing signal loss to embed the connecting member (720) in the first build-up layer (712) described with reference to FIG. 1A or FIG. 1B in the laminated structure (710). That is, the connecting member (720) electrically connects a plurality of semiconductor devices arranged on the circuit board, and thus, reducing the signal transmission distance while being adjacent to the plurality of semiconductor devices can be advantageous for reducing signal transmission loss. Accordingly, the connecting member (720) can be placed on top of the first build-up layer (712) of the circuit board. As an example, the connecting member (720) according to the present invention is described as being placed on top of the first build-up layer (712).

[0182] At this time, the first build-up layer (712) may include a first insulating layer (712-1) and a second insulating layer (712-2), and the first insulating layer (712-1) and the second insulating layer (712-2) may have a through hole (712C), and the through hole (712C) of the first insulating layer (712-1) and the second insulating layer (712-2) may form a cavity.

[0183] The connecting member (720) can be placed in the cavity described above, and the connecting member (720) can be embedded in the third insulating layer (712-3) of the first build-up layer (712). The connecting member (720) is placed on the upper surface of the core layer (711) that vertically overlaps the cavity, and the third insulating layer (712-3) of the first build-up layer (712) can be provided to surround the side of the connecting member (720) embedded in the cavity while filling the cavity. At this time, a dummy pattern can be provided on the upper surface of the core layer (711) to ensure the flatness of the connecting member (720) while ensuring that the connecting member (720) is stably placed.

[0184] In the past, only the second insulating layer (712-2) had a through hole and the connecting member (720) was embedded in the third insulating layer (712-3), or only the first insulating layer (712-1) had a through hole and the connecting member (720) was embedded in the second insulating layer (712-2). However, in this case, the flatness of the upper surface of the third insulating layer (712-3) may deteriorate. In addition, when the thickness of the connecting member (720) is thicker than the thickness of the first insulating layer (712-1) and / or the thickness of the second insulating layer (712-2), the flatness of the upper surface of the third insulating layer (712-3) may deteriorate further. Therefore, it is necessary to improve the flatness of the third insulating layer (712-3) and further the flatness of the upper surface of the first build-up layer (712) by reducing the difference between the thickness of the connecting member (720) and the depth of the cavity.

[0185] At this time, in order to reduce the difference between the depth of the cavity and the thickness of the connecting member (720), it is advantageous to form the cavity across the first insulating layer (712-1) and the second insulating layer (712-2). At this time, the through hole of the second insulating layer (712-2) can be formed to have a second inclination angle higher than the first inclination angle of the inner wall forming the through hole of the first insulating layer (712-1). In this way, in order to increase the positional alignment of the connecting member (720) and prevent the occurrence of voids when filling the cavity with the third insulating layer (712-3), the inclination angle of the inner wall forming the through hole of the first insulating layer (712-1) and the inclination angle of the inner wall forming the through hole of the second insulating layer (712-2) can be arranged differently from each other.

[0186] In addition, the inclination angle of the inner wall forming the through hole of the first insulating layer (712-1) is shown to have a gentler inclination angle than the inclination angle of the inner wall forming the through hole of the second insulating layer (712-2), but is not limited thereto, and the inclination angle of the inner wall forming the through hole of the second insulating layer (712-2) may have a gentler inclination angle than the inclination angle of the inner wall forming the through hole of the first insulating layer (712-1).

[0187] Additionally, when embedding a connecting member (720), a metal member (not shown) may be placed around the cavity to improve the alignment of its position. This can improve the alignment of the position, thereby improving the alignment of the via electrode and circuit layer placed in a subsequent process.

[0188] In addition, the via electrodes provided in the first build-up layer (712) may have different widths depending on their positions. For example, the first build-up layer (712) may include a first via electrode (712-4) that vertically overlaps with the connecting member (720), and a second via electrode (712-5) that horizontally overlaps with the first via electrode (712-4) and does not vertically overlap with the connecting member (720). The above-described first via electrode (712-4) may be directly connected to a pad portion (721) provided on the upper surface of the connecting member (720). At this time, the pad portion (721) may have a width smaller than the width of the circuit layer (1218) embedded in the lower surface of the first insulating layer (1211). Therefore, the horizontal width of the first via electrode (712-4) may be smaller than the horizontal width of the second via electrode (712-5).

[0189] Additionally, the circuit board has bonding portions (730, 740) arranged on the first build-up layer (712). The bonding portions (730, 740) may have different widths depending on their positions. For example, the bonding portions (730, 740) may have a first bonding portion (730) that vertically overlaps the connecting member (720), and a second bonding portion (740) that horizontally overlaps the first bonding portion (730) and does not vertically overlap the connecting member (720).

[0190] The first bonding portion (730) may be arranged between the pad portion (721) of the connecting member (720) and the terminal of the semiconductor element. Accordingly, the first bonding portion (730) may require a relatively fine width and pitch. The second bonding portion (740) may not vertically overlap with the connecting member (720) and may be connected to a terminal of the semiconductor element having a relatively large width compared to the first bonding portion (730). Therefore, the first bonding portion (730) and the second bonding portion (740) of the embodiment may have different widths. For example, the horizontal width of the first portion (731) of the first bonding portion (730) may be smaller than the horizontal width of the first portion (741) of the second bonding portion (740). In addition, the horizontal width of the second portion (732) of the first bonding portion (730) may be smaller than the horizontal width of the second portion (742) of the second bonding portion (740). That is, the circuit board of the embodiment has a plurality of bonding portions, and the width of the first portion of at least one of the plurality of bonding portions may be different from the width of the first portion of at least one other bonding portion, and the width of the second portion of at least one of the plurality of bonding portions may be different from the width of the second portion of at least one other bonding portion.

[0191] Accordingly, the embodiment can improve circuit density according to the required characteristics of each bonding portion by making the horizontal width of the first bonding portion (730) different from the horizontal width of the second bonding portion (740), and further, can more stably electrically connect the semiconductor element and the connecting member. Accordingly, the embodiment can enable the semiconductor element to operate stably, and thus can improve the operational reliability of the semiconductor package.

[0192] However, the embodiment is not limited thereto, and the width of the first part (731) of the first bonding part (730) may be the same as the width of the first part (741) of the second bonding part (740), and the widths of the second part (732) of the first bonding part (730) and the second part (742) of the second bonding part (740) may be different from each other. When the width of the first part (731) of the first bonding part (730) is made the same as the width of the first part (741) of the second bonding part (740), the sizes of the through holes of the protective layer provided in the first build-up layer (712) can all be made the same, and accordingly, the deviation of the plating current caused by the difference in the size of the through holes of the protective layer and the height deviation between the first bonding part (730) and the second bonding part (740) due to this can be minimized, and through this, the semiconductor element can be more stably installed on the first bonding part (730) and the second bonding part (740).

[0193]

[0194] According to the embodiment of FIG. 8, the circuit board may include a build-up layer (810). The build-up layer (810) may include an insulating layer (811) formed as a plurality of layers stacked along a vertical direction, a circuit layer (812) disposed on each surface of the plurality of insulating layers (811), and a via electrode (813) electrically connecting the circuit layers (812) disposed on different layers along the vertical direction. At this time, the circuit board of FIG. 8 may have a difference in the structure of the build-up layer (810) compared to the circuit board of the previous embodiment. That is, the insulating layer (811) in the circuit board of FIG. 8 has a structure that is stacked only in one direction based on the insulating layer disposed at the uppermost side, unlike the insulating layer of the previous embodiment, and accordingly, may not have a core layer and may have a structure that is stacked in one direction along a vertical direction based on the bonding portion. Additionally, a connecting member (820) may be embedded in the build-up layer (810), and a connecting member (830) may be arranged between the pad portion (821) of the connecting member (820) and the uppermost pad portion of the build-up layer (810).

[0195] That is, the circuit boards of FIGS. 1A and 1B may be core boards, and the circuit board of FIG. 8 may be coreless boards. Accordingly, the uppermost and lowermost wiring layers provided in the circuit boards of FIGS. 1A and 1B may be provided so as to protrude above and below the insulating layer, respectively. In contrast, one of the uppermost and lowermost wiring layers provided in the circuit board of FIG. 8 may have a structure in which it is embedded within the insulating layer (811) of the build-up layer (810). For example, the circuit board may have an ETS (Embedded Trace Substrate) structure.

[0196] In addition, a bonding portion (840, 850) may be arranged on the build-up layer (810) of the circuit board, and the bonding portion (840, 850) may include a first bonding portion (840) that overlaps vertically with a connecting member (820), and a second bonding portion (850) that overlaps horizontally with the first bonding portion (840) and does not overlap vertically with the connecting member (820).

[0197]

[0198] According to the embodiment of FIG. 9, semiconductor elements (930, 940) may be arranged on the circuit board of the embodiment and provided as a semiconductor package.

[0199] For example, semiconductor elements (930, 940) may be arranged on the circuit board illustrated in FIG. 7. That is, the semiconductor package may include a build-up insulating layer (910) in which a connecting member is embedded, and a bonding portion (920) arranged on the build-up insulating layer (910). In addition, the bonding portion (920) may include a first portion (921) having a first width in a horizontal direction, and a second portion (922) having a second width smaller than the first width in a horizontal direction and arranged on the first portion (921). At this time, as described with reference to FIG. 7, the bonding portion (920) may include a first bonding portion that vertically overlaps with the connecting member, and a second bonding portion that does not vertically overlap with the connecting member, and the horizontal widths of the first bonding portion and the second bonding portion may be different from each other.

[0200] A connection portion (940) may be arranged on the bonding portion (920), and semiconductor elements (930, 940) may be arranged on the connection portion (940). At this time, the connection portion (940) may be arranged on the second portion (922) of the bonding portion (920), and the semiconductor elements (930, 940) may be attached to the connection portion (940). The connection portion (940) may be provided to surround a side surface of the second portion (922) of the bonding portion (920). For example, the connection portion (940) may be in contact with a side surface of the second portion (922) of the bonding portion (920). In addition, the connection portion (940) may be in contact with an upper surface of the first portion (921) provided by a step between the first portion (921) and the second portion (922) of the bonding portion (920). At this time, the step of the bonding portion (920) has different horizontal distances along the circumferential direction of the upper and / or lower surfaces of the bonding portion (920), and accordingly, the connecting portion (940) can be provided with different widths along the circumferential direction of the bonding portion (920) in an area that horizontally overlaps with the second portion (922) of the bonding portion (920). In addition, the connecting portion (940) may not contact the side surface of the first portion (921) through the step between the first portion (921) and the second portion (922) of the bonding portion (920). For example, the step described above can prevent the connecting portion (940) from overflowing to the side surface of the first portion (921) of the bonding portion (920), and thereby enable the volume of the connecting portion (940) to be easily adjusted. In addition, an intermetallic compound (IMC) may be formed when the connection portion (940) and the bonding portion (920) come into contact. The above-described step can prevent the circuit layer provided in the build-up layer (910) and the connection portion (940) from being connected, and can prevent the interface between different components of the build-up layer (910) from being separated or the electrical characteristics from being deteriorated due to the formation of the intermetallic compound.

[0201] The circuit board according to FIG. 9 described above is used as a semiconductor package board of a semiconductor package, and thus can electrically connect a semiconductor element and a main board.

[0202] In addition, the circuit board described above can be used as an interposer provided between the semiconductor package substrate and the semiconductor elements of the semiconductor package. Referring to the embodiment of FIG. 10, the semiconductor package can include an interposer (1000), a first bonding member (1010), a plurality of semiconductor elements (1020, 1030), a second bonding member (1040), and a semiconductor package substrate (1050).

[0203] The interposer (1000) may include a circuit board described with reference to the previous drawings. That is, as the terminal density of semiconductor devices increases, the wiring becomes more complex, and accordingly, the thickness of the circuit board increases. However, as the thickness increases, the yield of the circuit board may decrease. Therefore, the circuit board may be divided into an interposer (1000) and a semiconductor package board (1050) and used. The circuit board described above may be used as a semiconductor package board as in the embodiment of FIG. 9, and further, may be used as an interposer (1000) as in the embodiment of FIG. 10.

[0204] Semiconductor elements (1020, 1030) are arranged on the interposer (1000). The semiconductor elements (1020, 1030) may be provided in multiple numbers on the interposer (1000) while being spaced apart from each other in the horizontal direction, but the present invention is not limited thereto. For example, the semiconductor elements (1020, 1030) may be arranged to be stacked not only in the horizontal direction but also in the vertical direction on the interposer (1000). A connecting member for electrically connecting the semiconductor elements (1020, 1030) is arranged on the interposer (1000).

[0205] A first bonding member (1010) may be provided between the interposer (1000) and the semiconductor elements (1020, 1030). The first bonding member (1010) may be placed on a bonding portion provided in the interposer (1000), through which the semiconductor elements (1020, 1030) may be attached to the interposer (1000) by a thermocompression bonding method. At this time, the semiconductor elements (1020, 1030) may be provided with terminals (1025, 1035), and the terminals (1025, 1035) may be electrically connected to the bonding portion and circuit layer of the interposer (1000) through the first bonding member (1010).

[0206] A semiconductor package substrate (1750) is placed on the lower surface of the interposer (1000). The semiconductor package substrate (1000) can electrically connect the main board of an electronic device and the interposer (1700).

[0207] At this time, a second bonding member (1040) may be placed between the interposer (1000) and the semiconductor package substrate (1050), through which the interposer (1000) and the semiconductor package substrate (1050) may be electrically bonded.

[0208]

[0209] Below, a method for manufacturing a circuit board according to an embodiment will be described in process order.

[0210] Figures 11a to 11g are cross-sectional views showing a method for manufacturing a circuit board according to one embodiment in process order.

[0211] Referring to FIG. 11A, an embodiment prepares a core member that serves as a basis for manufacturing a circuit board, and may manufacture a core layer (1110) using the core member. The core layer (1110) may include a core insulating layer and a core via electrode, and may include an insulating member penetrating the core via electrode. In addition, when manufacturing the core layer (1110), the embodiment may manufacture a portion of the circuit layer of the first build-up layer and the second build-up layer together with the core via electrode.

[0212] Next, referring to FIG. 11b, the embodiment may proceed with a process of manufacturing a first build-up layer (1120) and a second build-up layer (1130) on the upper and lower portions of the core layer (1110), respectively.

[0213] Next, referring to FIG. 11c, a process of laminating a first dry film (DF1) on a first build-up layer (1120) may be performed. At this time, the first dry film (DF1) may be provided to entirely cover the pad portions of the circuit layer provided on the uppermost portion of the first build-up layer (1120), and a process of forming a first opening (OP1) that overlaps the pad portions along a vertical direction by exposing and developing the first dry film (DF1) may be performed. At this time, the first opening (OP1) may have a first width along a horizontal direction.

[0214] Next, referring to FIG. 11D, the embodiment may perform a process of laminating a second dry film (DF2) on a first dry film (DF1). Thereafter, the embodiment may perform a process of exposing and developing the second dry film (DF2) to form a second opening (OP2) that overlaps the first opening (OP1) of the first dry film (DF1) along a vertical direction. At this time, the first opening (OP2) may have a second width different from the first width along a horizontal direction. Preferably, the second opening (OP2) may have a width smaller than the horizontal width of the first opening (OP1). Furthermore, the embodiment may form the second opening (OP2) such that the horizontal central axis of the first opening (OP1) and the horizontal central axis of the second opening (OP2) are misaligned.

[0215] Next, referring to FIG. 11E, the embodiment may perform a process of forming a bonding portion (1140) by filling a first opening (OP1) of a first dry film (DF1) and a second opening (OP2) of a second dry film (DF2) with a conductive material. At this time, the bonding portion (1140) may include a first portion corresponding to the first opening (OP1) of the first dry film (DF1) and a second portion corresponding to the second opening (OP2) of the second dry film (DF2), and the horizontal widths of the first portion and the second portion may be different from each other, and further, the horizontal central axis of the first portion and the horizontal central axis of the second portion may be misaligned from each other.

[0216] Next, referring to FIG. 11f, the embodiment can proceed with a process of removing the first dry film (DF1) and the second dry film (DF2).

[0217] Next, referring to FIG. 11g, the embodiment may proceed with a process of forming a protective layer of the first build-up layer (1120) and a protective layer of the second build-up layer (1130), respectively.

[0218]

[0219] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor chips from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor chips. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability with each other.

[0220] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor chip controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuit between terminals, or electrical open of the terminal supplying the semiconductor chip, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

[0221] The features, structures, effects, etc. described in the embodiments above are included in at least one embodiment, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be interpreted as being included within the scope of the embodiments.

[0222] Although the above has been described focusing on embodiments, these are merely examples and are not intended to limit the embodiments. Those skilled in the art to which the embodiments pertain will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the embodiments set forth in the appended claims.

Claims

1. Build-up layer; a pad placed on the above build-up layer; and A bonding portion including a first portion arranged on the pad and having a first width in a horizontal direction, and a second portion arranged on the first portion and having a second width different from the first width in the horizontal direction, The horizontal central axis of the first part and the horizontal central axis of the second part are misaligned with each other. Circuit board.

2. In paragraph 1, The side of the above bonding portion has a step, The horizontal distance of the above step is not uniform along the circumferential direction of the upper or lower surface of the above bonding portion. Circuit board.

3. In paragraph 1 or 2, The above bonding portion includes a plurality of bonding portions in which the misalignment directions of the horizontal central axes of the second portion are different based on the horizontal central axis of the first portion. Circuit board.

4. In paragraph 3, The misalignment direction of the horizontal central axis of the first part with respect to the horizontal central axis of the second part of each of the plurality of bonding parts is either a direction away from the horizontal central axis of the build-up layer or a direction toward the horizontal central axis of the build-up layer. Circuit board.

5. In paragraph 1 or 2, The above bonding portion includes a plurality of bonding portions in which the horizontal central axis of the first portion and the horizontal central axis of the second portion are misaligned to different degrees. Circuit board.

6. In paragraph 4, The degree of misalignment between the horizontal central axis of the first portion and the horizontal central axis of the second portion increases or decreases as the plurality of bonding portions move away from the horizontal central axis of the build-up layer. Circuit board.

7. In paragraph 6, The above plurality of bonding portions include a first bonding portion located on a first side of the horizontal central axis of the build-up layer and a second bonding portion located on a second side opposite to the first side, The misaligned direction of the above first bonding portion is the opposite direction to the misaligned direction of the above second bonding portion. Circuit board.

8. In paragraph 6, The misaligned direction of the above first bonding portion is a direction toward the first side from the horizontal central axis of the build-up layer, The misaligned direction of the second bonding portion is a direction toward the second side from the horizontal central axis of the build-up layer. Circuit board.

9. In paragraph 6, The misaligned direction of the above first bonding portion is a direction toward the horizontal central axis of the build-up layer on the first side, The misaligned direction of the second bonding portion is a direction toward the horizontal central axis of the build-up layer on the second side. Circuit board.

10. In paragraph 1, The above bonding portion is provided in multiple pieces, The horizontal width of the second part of at least one of the above bonding parts is different from the horizontal width of the second part of at least one other bonding part. Circuit board.

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