Data modulation method and apparatus

Abstract

The present disclosure relates to a data modulation method. The data modulation method comprises the steps of: determining data that is a target of data transmission; generating a sync pulse at a first position, which is synchronized with a system clock, and a data pulse at a second position according to the determined data; and performing modulation by using the sync pulse and the data pulse.

Description

Data tampering method and device

[0001] The present disclosure relates to a data modulation method and device, and more particularly, to a data modulation method and device using pulse width, frequency and time difference modulation.

[0002] Typically, data transmission and reception involves modulation and demodulation, which transform the data format. Meanwhile, during the modulation process, improving the modulation order is crucial to improving data transmission speeds. Hybrid modulation techniques are being utilized to achieve this. Examples include 4-PAM (pulse amplitude modulation), 4-PPM (pulse position modulation), and 8-PSK (phase shift keying). However, these modulation techniques suffer from limitations such as high power consumption and system complexity.

[0003] The present invention is derived from research conducted as part of the ICT Convergence Industry Innovation Technology Development Project of the Ministry of Science and ICT (Project Unique Number: 1711193657, Project Number: 2017-0-00418-007, Project Management Agency: Information and Communications Technology Planning and Evaluation Institute, Research Project Title: Research on Time-Domain Artificial Intelligence Radar SoC (System On a Chip) Design Using Ultra-High-Speed ​​Sampling Technique, Project Performing Agency: Yonsei University Industry-Academic Cooperation Foundation, Research Period: 2023.01.01 - 2023.12.31).

[0004] Meanwhile, the Korean government, which provided the task, has no property interest in any aspect of the present invention.

[0005] The present disclosure provides a data modulation method for solving the above-described problems, a computer program stored in a computer-readable medium, a computer-readable medium storing the computer program, and a device (system).

[0006] In various embodiments of the present disclosure, a computing device can effectively improve the modulation order while operating at low power by orthogonally adding time difference modulation, pulse width modulation, and frequency modulation methods.

[0007] In various embodiments of the present disclosure, when time difference modulation, pulse width modulation, and frequency modulation are applied simultaneously, there is an advantage in that a high data transmission rate of 3.2 Gbps can be obtained at a clock of about 200 MHz, assuming that the total modulation order is 16 bits.

[0008] Embodiments of the present disclosure will be described below with reference to the accompanying drawings, wherein like reference numerals represent similar elements, but are not limited thereto.

[0009] FIG. 1 is a functional block diagram showing the internal configuration of a computing device according to one embodiment of the present disclosure.

[0010] FIG. 2 is an image showing an example of a sync pulse and a data pulse according to one embodiment of the present disclosure.

[0011] FIG. 3 is a graph showing an example of pulse width modulation performed according to one embodiment of the present disclosure.

[0012] FIG. 4 is a graph showing an example of frequency modulation performed according to one embodiment of the present disclosure.

[0013] FIG. 5 is a graph showing an example in which time difference modulation, pulse width modulation, and frequency modulation are performed simultaneously according to one embodiment of the present disclosure.

[0014] FIG. 6 is a flowchart illustrating an example of a data modulation method according to one embodiment of the present disclosure.

[0015] FIG. 7 is a block diagram showing a hardware configuration of a computing device according to one embodiment of the present disclosure.

[0016] The present disclosure can be implemented in various ways, including a method, a device (system), a computer program stored on a computer-readable medium, or a computer-readable medium having a computer program stored thereon.

[0017] According to one embodiment of the present disclosure, a data modulation method performed by at least one processor includes a step of determining data to be a target of data transmission, a step of generating a sync pulse at a first position synchronized with a system clock and a data pulse at a second position according to the determined data, and a step of performing modulation using the sync pulse and the data pulse.

[0018] According to one embodiment of the present disclosure, the step of generating a sync pulse at a first position synchronized with a system clock and a data pulse at a second position according to determined data includes the step of generating a first digital pulse based on a clock signal of the system clock and generating a second digital pulse based on an output of a DTC when data is determined, and the step of generating a sync pulse using the first digital pulse and generating a data pulse using the second digital pulse.

[0019] According to one embodiment of the present disclosure, the step of generating a first digital pulse based on a clock signal of a system clock and generating a second digital pulse based on an output of a DTC includes the step of generating a second digital pulse spaced apart from the first digital pulse using a delay time output by the DTC based on data.

[0020] According to one embodiment of the present disclosure, the step of generating a sync pulse at a first position synchronized with a system clock and a data pulse at a second position according to determined data includes the step of determining a guard time for maintaining a minimum time difference between the sync pulse and the data pulse, and the step of generating a data pulse at the second position such that a time difference greater than or equal to the guard time is maintained at the first position.

[0021] According to one embodiment of the present disclosure, the step of performing modulation using a sync pulse and a data pulse includes the step of performing modulation for a time difference between a first position of the sync pulse and a second position of the data pulse.

[0022] According to one embodiment of the present disclosure, the step of performing modulation using a sync pulse and a data pulse includes the step of performing pulse width modulation that changes a pulse width of at least some of the sync pulse and the data pulse.

[0023] According to one embodiment of the present disclosure, the step of performing modulation using a sync pulse and a data pulse includes the step of performing frequency modulation that changes a center frequency of at least some of the sync pulse and the data pulse.

[0024] According to one embodiment of the present disclosure, the step of performing frequency modulation includes the step of performing frequency modulation by changing a center frequency of a gated ring oscillator.

[0025] According to one embodiment of the present disclosure, the step of generating a data pulse at a third position according to the determined data is further included. The step of performing modulation using the sync pulse and the data pulse includes the step of performing time difference modulation, pulse width modulation, and frequency modulation using the sync pulse, the data pulse at the second position, and the data pulse at the third position.

[0026] A computer program stored in a computer-readable recording medium is provided for executing a method according to one embodiment of the present disclosure on a computer.

[0027] A computing device according to one embodiment of the present disclosure comprises a communication module, a memory, and at least one processor connected to the memory and configured to execute at least one computer-readable program contained in the memory. The at least one program comprises instructions for determining data to be transmitted, generating a sync pulse at a first position synchronized with a system clock and a data pulse at a second position according to the determined data, and performing modulation using the sync pulse and the data pulse.

[0028] Hereinafter, specific details for implementing the present disclosure will be described in detail with reference to the attached drawings. However, in the following description, specific descriptions of widely known functions or configurations will be omitted if they may unnecessarily obscure the gist of the present disclosure.

[0029] In the attached drawings, identical or corresponding components are assigned the same reference numerals. Furthermore, in the description of the embodiments below, duplicate descriptions of identical or corresponding components may be omitted. However, even if a description of a component is omitted, it is not intended that such component is not included in any embodiment.

[0030] The advantages and features of the disclosed embodiments, and the methods for achieving them, will become clearer with reference to the embodiments described below, along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various different forms. These embodiments are provided solely to ensure the completeness of the present invention and to fully inform those skilled in the art of the scope of the invention.

[0031] The terms used in this specification will be briefly explained, followed by a detailed description of the disclosed embodiments. The terms used in this specification have been selected from widely used, current terms, taking into account the functions of the present invention. However, these terms may vary depending on the intentions of engineers working in the relevant fields, precedents, the emergence of new technologies, etc. Furthermore, in certain cases, terms may be arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the relevant description of the invention. Therefore, the terms used in this specification should not be defined simply based on their names, but rather based on their meanings and the overall content of the present disclosure.

[0032] In this specification, singular expressions include plural expressions unless the context clearly indicates otherwise. Furthermore, plural expressions include singular expressions unless the context clearly indicates otherwise. When a part of the specification is said to include a component, this does not exclude other components, but rather implies that other components may be included, unless otherwise specifically stated.

[0033] In this disclosure, terms such as “comprise,” “comprising,” and the like may indicate the presence of features, steps, operations, elements, and / or components, but such terms do not exclude the addition of one or more other features, steps, operations, elements, components, and / or combinations thereof.

[0034] In this disclosure, when a particular component is referred to as being "coupled," "combined," "connected," or "reacting" with any other component, the particular component may be directly coupled, combined, and / or connected to, or reacting with, the other component, but is not limited thereto. For example, one or more intermediate components may exist between the particular component and the other component. Furthermore, "and / or" in the present disclosure may include each of one or more of the listed items, or a combination of at least some of one or more of the listed items.

[0035] In this disclosure, terms such as "first," "second," etc. are used to distinguish specific components from other components, and the components described by these terms are not limited. For example, the "first" component may be an element of the same or similar form as the "second" component.

[0036]

[0037] FIG. 1 is a functional block diagram illustrating an internal configuration of a computing device (100) according to one embodiment of the present disclosure. According to one embodiment, the computing device (100) may include any device for performing data modulation, for example, an IR-UWB (impulse-radio ultra-wideband) transmitter. As illustrated, the computing device (100) may include a pulse generator (102), a modulator (104), a digital to time converter (DTC) (106), a gated ring oscillator (108), and the like.

[0038] According to one embodiment, the computing device (100) can determine data to be transmitted. The data may be composed of multiple bits and may be modulated based on at least one time period and transmitted to a receiver. When the data is determined, the pulse generator (102) can generate an impulse signal corresponding to the determined data.

[0039] According to one embodiment, the pulse generation unit (102) can generate one sync pulse and one data pulse corresponding to one clock period. For example, the pulse generation unit (102) can generate a sync pulse at a first position synchronized with a system clock and a data pulse at a second position according to determined data. Here, the position of the pulse can indicate a position according to a time interval. In this case, a minimum time interval can be formed between the sync pulse at the first position and the data pulse at the second position.

[0040] Additionally or alternatively, the pulse generation unit (102) may generate one sync pulse and two data pulses corresponding to one clock cycle. For example, the pulse generation unit (102) may generate a sync pulse at a first position synchronized with the system clock, a data pulse at a second position according to determined data, and a data pulse at a third position.

[0041] According to one embodiment, the pulse generation unit (102) may generate a first digital pulse based on a clock signal of a system clock (e.g., a reference clock), and may generate a second digital pulse based on an output of the DTC (106). For example, the DTC (106) may control a time delay using a digital code, and may generate a delay according to transmission data as an output. That is, the second digital pulse may be generated by reflecting a time delay according to data.

[0042] The pulse generation unit (102) can generate a sync pulse synchronized with the system clock based on the first digital pulse, and can generate a data pulse having a predetermined time difference from the sync pulse based on the second digital pulse. For example, the pulse generation unit (102) can determine a guard time to maintain a minimum time difference between the sync pulse and the data pulse, and can generate a data pulse at the second position so that a time difference greater than the guard time is maintained at the first position. The sync pulse and data pulse generated in this way can be provided to the modulator (104) for data modulation.

[0043] The modulator (104) can perform modulation using the sync pulse and data pulse generated by the pulse generator (102). For example, the modulator (104) can perform time difference modulation on the time difference between the first position of the sync pulse and the second position of the data pulse (e.g., the time difference between the rising edge of the sync pulse and the rising edge of the data pulse). In this way, when time difference modulation is performed, the modulation order increases, so that the data transmission speed can be effectively improved.

[0044] Additionally or alternatively, the modulator (104) may perform pulse width modulation to change the pulse width of at least some of the sync pulses and the data pulses. Additionally or alternatively, the modulator (104) may perform frequency modulation to change the center frequency of at least some of the sync pulses and the data pulses. For example, the modulator (104) may perform frequency modulation by changing the center frequency of the gated ring oscillator (108).

[0045] According to one embodiment, the modulator (104) can improve the modulation order by orthogonally adding at least some modulation methods among time difference modulation, pulse width modulation, and frequency modulation. That is, the modulator (104) can improve data transmission efficiency by combining multiple modulation methods without increasing the modulation order of a single modulation method.

[0046] In Fig. 1, each functional configuration included in the computing device (100) has been separately described, but this is only to help understanding the invention, and two or more functions may be performed in one computing device. In addition, although Fig. 1 mainly describes the case of using one data pulse, two data pulses may be generated and used by a process similar to that described above. For example, two delay times may be output by the DTC, and data pulses at positions corresponding to each delay time may be generated. With this configuration, the computing device (100) can effectively improve the modulation order while operating at low power by orthogonally adding time difference modulation, pulse width modulation, and frequency modulation methods.

[0047]

[0048] FIG. 2 is an image (200) illustrating examples of sync pulses and data pulses according to one embodiment of the present disclosure. Image (200) illustrates an example in which the number of bits of data to be modulated is 5. As described above, when data to be transmitted is determined, corresponding sync pulses and data pulses can be generated. Furthermore, time difference modulation, pulse width modulation, frequency modulation, and the like can be performed based on the generated sync pulses and data pulses.

[0049] In the illustrated example, a first sync pulse and a first data pulse may be generated in response to data '00000', and a second sync pulse and a second data pulse may be generated in response to data '11111'. Here, the positions of the first sync pulse and the second sync pulse are fixed to be synchronized with the clock signal regardless of the data, and the positions of the first data pulse and the second data pulse may be changed differently so as to have a certain distance from the rising edge of each sync pulse depending on the data.

[0050] According to one embodiment, to represent the time difference between the sync pulse and the data pulse, if the data bit is M, the required delay period is can be determined. In the example of Fig. 2, since the data bit is 5, the delay period is can be determined. In this case, the time difference between the sync pulse and the data pulse can be calculated by the following mathematical expression 1.

[0051]

[0052]

[0053]

[0054] Here, represents the time difference, indicates guard time, may represent a unit delay time. In addition, the guard time may represent the minimum time interval required to maintain a minimum time difference between a sync pulse and a data pulse and to prevent the receiver from recognizing the sync pulse and the data pulse as one pulse.

[0055]

[0056] FIG. 3 is a graph (300) illustrating an example of pulse width modulation performed according to one embodiment of the present disclosure. In the illustrated example, the graph (300) may visually display each pulse according to data over time.

[0057] In one embodiment, 2-bit pulse width modulation may be performed for each pulse to enable a total of 4-bit modulation, but is not limited thereto. For example, pulse width modulation may be performed for a first sync pulse (Sync1) and a first data pulse (Data1) corresponding to data '0000', pulse width modulation may be performed for a second sync pulse (Sync2) and a second data pulse (Data2) corresponding to data '1101', and pulse width modulation may be performed for a third sync pulse (Sync3) and a third data pulse (Data3) corresponding to data '1011'.

[0058] When only pulse width modulation is performed, the positions of the sync pulse and data pulse are fixed, and the pulse widths can be changed. For example, modulation can be performed such that the pulse width corresponding to data '11' is changed to be wider than the pulse width corresponding to data '00'. With this configuration, when pulse width modulation is performed on the sync pulse and data pulse, the transmitter can be configured with only simple hardware, and modulation can be performed with low power.

[0059]

[0060] FIG. 4 is a graph (400) illustrating an example of frequency modulation performed according to one embodiment of the present disclosure. In the illustrated example, the graph (400) may visually display each pulse according to data over time.

[0061] In one embodiment, 4-bit frequency modulation may be performed for each pulse to enable a total of 8-bit modulation, but is not limited thereto. For example, frequency modulation may be performed for the first sync pulse (Sync1) and the first data pulse (Data1) in response to data '00000000', frequency modulation may be performed for the second sync pulse (Sync2) and the second data pulse (Data2) in response to data '11110000', and frequency modulation may be performed for the third sync pulse (Sync3) and the third data pulse (Data3) in response to data '100001111'.

[0062] According to one embodiment, frequency modulation can be performed by changing the center frequency of a gated ring oscillator. Here, the gated ring oscillator can represent an electronic circuit that generates a signal of a repetitive or periodic frequency. For example, the gated ring oscillator can be connected to any capacitor for center frequency adjustment, and the center frequency can be changed by controlling a switch connected to the capacitor on / off. In the illustrated example, the center frequency of the first data pulse is changed by the gated ring oscillator. is changed to , and the center frequency of the second sync pulse is can be changed to

[0063]

[0064] FIG. 5 is a graph (500) illustrating an example in which time difference modulation, pulse width modulation, and frequency modulation are simultaneously performed according to one embodiment of the present disclosure. In the illustrated example, the graph (500) may visually display each pulse according to data over time.

[0065] As described above, time difference modulation, pulse width modulation, and frequency modulation can be performed orthogonally and simultaneously. For example, time difference modulation can change the time difference between the sync pulse and the data pulse, pulse width modulation can change the width of the sync pulse and / or the data pulse, and frequency modulation can change the center frequency of the sync pulse and / or the data pulse.

[0066] In one embodiment, when time difference modulation, pulse width modulation, and frequency modulation are orthogonally added, the total modulation order may be, but is not limited to, 16 bits. For example, the widths of sync pulses (first sync pulse, second sync pulse, third sync pulse, etc.) and data pulses (first data pulse, second data pulse, third data pulse, etc.) may be determined according to 4 bits of data (DATA_PWM), the center frequencies of the sync pulses and data pulses may be determined according to 8 bits of data (DATA_FSK), and the time difference between the sync pulses and data pulses may be determined according to 4 bits of data (DATA_D-MPPM).

[0067] Although FIGS. 3 to 5 illustrate that one sync pulse and one data pulse are generated in response to one symbol, the present invention is not limited thereto. For example, one sync pulse and multiple data pulses may be generated in response to one symbol. With this configuration, when time difference modulation, pulse width modulation, and frequency modulation are simultaneously applied, assuming a total modulation order of 16 bits, there is an advantage in that a high data transmission speed of 3.2 Gbps can be achieved at a clock of approximately 200 MHz.

[0068]

[0069] FIG. 6 is a flowchart illustrating an example of a data modulation method (600) according to one embodiment of the present disclosure. The data modulation method (600) may be performed by a processor (e.g., at least one processor of a computing device). The data modulation method (600) may be initiated by the processor determining data to be the target of data transmission (S610).

[0070] The processor can generate a sync pulse at a first position synchronized with the system clock and a data pulse at a second position according to determined data (S620). When data is determined, a first digital pulse can be generated based on a clock signal of the system clock, a second digital pulse can be generated based on an output of the DTC, a sync pulse can be generated using the first digital pulse, and a data pulse can be generated using the second digital pulse. For example, the processor can generate a second digital pulse spaced apart from the first digital pulse using a delay time output by the DTC based on the data. At this time, the processor can determine a guard time to maintain a minimum time difference between the sync pulse and the data pulse, and generate a data pulse at the second position so that a time difference greater than the guard time is maintained at the first position.

[0071] The processor may perform modulation using the sync pulse and the data pulse (S630). For example, the processor may perform pulse width modulation that changes the pulse width of at least some of the sync pulse and the data pulse. Additionally or alternatively, the processor may perform frequency modulation that changes the center frequency of at least some of the sync pulse and the data pulse. Additionally or alternatively, the processor may perform modulation based on the time difference between the first position of the sync pulse and the second position of the data pulse.

[0072] Additionally or alternatively, the processor may further generate a data pulse at a third location based on the determined data. Furthermore, the processor may perform time difference modulation, pulse width modulation, and frequency modulation using the sync pulse at the first location, the data pulse at the second location, and the data pulse at the third location.

[0073]

[0074] FIG. 7 is a block diagram illustrating a hardware configuration of a computing device (100) according to one embodiment of the present disclosure. The computing device (100) may include a memory (710), a processor (720), a communication module (730), and an input / output interface (740). As illustrated in FIG. 7, the computing device (100) may be configured to communicate information and / or data via a network using the communication module (730).

[0075] The memory (710) may include any non-transitory computer-readable recording medium. According to one embodiment, the memory (710) may include a non-volatile mass storage device such as a random access memory (RAM), a read only memory (ROM), a disk drive, a solid state drive (SSD), a flash memory, etc. As another example, a non-volatile mass storage device such as a ROM, an SSD, a flash memory, a disk drive, etc. may be included in the computing device (100) as a separate permanent storage device distinct from the memory. In addition, an operating system and at least one program code may be stored in the memory (710).

[0076] These software components may be loaded from a computer-readable recording medium separate from the memory (710). This separate computer-readable recording medium may include a recording medium directly connectable to the computing device (100), for example, a computer-readable recording medium such as a floppy drive, a disk, a tape, a DVD / CD-ROM drive, a memory card, etc. As another example, the software components may be loaded into the memory (710) via a communication module (730) other than a computer-readable recording medium. For example, at least one program may be loaded into the memory (710) based on a computer program that is installed by files provided by developers or a file distribution system that distributes installation files of applications via the communication module (730).

[0077] The processor (720) may be configured to process instructions of a computer program by performing basic arithmetic, logic, and input / output operations. The instructions may be provided to another user terminal (not shown) or another external system via the memory (710) or the communication module (730).

[0078] The communication module (730) may provide a configuration or function for a user terminal (not shown) and a computing device (100) to communicate with each other via a network, and may provide a configuration or function for the computing device (100) to communicate with an external system (e.g., a separate cloud system, etc.). For example, control signals, commands, data, etc. provided under the control of the processor (720) of the computing device (100) may be transmitted to the user terminal and / or the external system via the communication module (730) and the network via the communication module of the user terminal and / or the external system.

[0079] In addition, the input / output interface (740) of the computing device (100) may be a means for interfacing with a device (not shown) for input or output that is connected to the computing device (100) or that the computing device (100) may include. In FIG. 7, the input / output interface (740) is illustrated as an element configured separately from the processor (720), but is not limited thereto, and the input / output interface (740) may be configured to be included in the processor (720). The computing device (100) may include more components than those illustrated in FIG. 7. However, there is no need to explicitly illustrate most of the conventional components.

[0080] The processor (720) of the computing device (100) may be configured to manage, process and / or store information and / or data received from multiple user terminals and / or multiple external systems.

[0081]

[0082] The above-described methods and / or various embodiments may be realized by digital electronic circuits, computer hardware, firmware, software, and / or a combination thereof. Various embodiments of the present disclosure may be implemented as a computer program that is executed by a data processing device, for example, one or more programmable processors and / or one or more computing devices, or stored on a computer-readable recording medium and / or a computer-readable recording medium. The above-described computer program may be written in any form of programming language, including a compiled language or an interpreted language, and may be distributed in any form, such as a standalone program, a module, a subroutine, etc. The computer program may be distributed through a single computing device, multiple computing devices connected through the same network, and / or multiple computing devices distributed to be connected through multiple different networks.

[0083] The methods and / or various embodiments described above may be performed by one or more processors configured to execute one or more computer programs that process, store, and / or manage any function, function, etc. by operating on the basis of input data or generating output data. For example, the methods and / or various embodiments of the present disclosure may be performed by special purpose logic circuits such as Field Programmable Gate Arrays (FPGAs) or Application Specific Integrated Circuits (ASICs), and an apparatus and / or system for performing the methods and / or embodiments of the present disclosure may be implemented as special purpose logic circuits such as FPGAs or ASICs.

[0084] The one or more processors executing the computer program may include a general-purpose or special-purpose microprocessor and / or one or more processors of any type of digital computing device. The processor may receive instructions and / or data from each of read-only memory and random-access memory, or may receive instructions and / or data from the read-only memory and the random-access memory. In the present invention, components of a computing device performing the methods and / or embodiments may include one or more processors for executing instructions, and one or more memory devices for storing instructions and / or data.

[0085] According to one embodiment, the computing device can transmit and receive data to and from one or more mass storage devices for storing data. For example, the computing device can receive and / or transfer data from a magnetic disc or an optical disc. A computer-readable storage medium suitable for storing instructions and / or data associated with a computer program may include, but is not limited to, any form of non-volatile memory, including semiconductor memory devices such as Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable PROM (EEPROM), flash memory devices, and the like. For example, the computer-readable storage medium may include a magnetic disk such as an internal hard disk or a removable disk, a magneto-optical disk, a CD-ROM, and a DVD-ROM disk.

[0086] To provide interaction with a user, a computing device may include, but is not limited to, a display device (e.g., a cathode ray tube (CRT), a liquid crystal display (LCD), etc.) for providing or displaying information to the user, and a pointing device (e.g., a keyboard, a mouse, a trackball, etc.) for allowing the user to provide input and / or commands to the computing device. That is, the computing device may further include any other types of devices for providing interaction with the user. For example, the computing device may provide any form of sensory feedback to the user, including visual feedback, auditory feedback, and / or tactile feedback, for interaction with the user. In this regard, the user may provide input to the computing device through various gestures, such as visual, vocal, or motion.

[0087] In the present invention, various embodiments may be implemented in a computing system that includes backend components (e.g., a data server), middleware components (e.g., an application server), and / or front-end components. In this case, the components may be interconnected via any form or medium of digital data communication, such as a communications network. For example, the communications network may include a Local Area Network (LAN), a Wide Area Network (WAN), etc.

[0088] A computing device based on the exemplary embodiments described herein may be implemented using hardware and / or software configured to interact with a user, including a user device, a user interface (UI) device, a user terminal, or a client device. For example, the computing device may include a portable computing device, such as a laptop computer. Additionally or alternatively, the computing device may include, but is not limited to, Personal Digital Assistants (PDAs), tablet PCs, game consoles, wearable devices, Internet of Things (IoT) devices, virtual reality (VR) devices, augmented reality (AR) devices, and the like. The computing device may further include other types of devices configured to interact with a user. Furthermore, the computing device may include a portable communication device (e.g., a mobile phone, a smart phone, a cordless cellular phone, etc.) suitable for wireless communication over a network, such as a mobile communication network. The computing device may be configured to communicate wirelessly with a network server using wireless communication technologies and / or protocols, such as Radio Frequency (RF), Microwave Frequency (MWF), and / or Infrared Ray Frequency (IRF).

[0089] The various embodiments of the present invention, including specific structural and functional details, are exemplary. Therefore, the embodiments of the present disclosure are not limited to those described above and may be implemented in various other forms. Furthermore, the terminology used herein is intended to describe certain embodiments and is not intended to limit the embodiments. For example, singular terms and the above may be interpreted to include plural forms, unless the context clearly dictates otherwise.

[0090] In the present invention, unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by those of ordinary skill in the art to which they pertain. Furthermore, commonly used terms, such as terms defined in dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology.

[0091] While the present invention has been described in connection with certain embodiments herein, various modifications and variations can be made without departing from the scope of the present disclosure, which would be apparent to those skilled in the art. Furthermore, such modifications and variations are intended to fall within the scope of the claims appended to this specification.

Claims

1. A method of data modulation performed by at least one processor, A step for determining data to be the target of data transmission; A step of generating a sync pulse of a first position synchronized with a system clock and a data pulse of a second position according to the determined data; and A step of performing modulation using the above sync pulse and the above data pulse; A method of data tampering comprising:

2. In paragraph 1, The step of generating a sync pulse of a first position synchronized with the above system clock and a data pulse of a second position according to the determined data is: When the above data is determined, a step of generating a first digital pulse based on a clock signal of the system clock and generating a second digital pulse based on an output of a DTC (digital to time converter); and A step of generating the sync pulse using the first digital pulse and generating the data pulse using the second digital pulse; A method of data tampering comprising:

3. In paragraph 2, The step of generating a first digital pulse based on the clock signal of the above system clock and generating a second digital pulse based on the output of the DTC is as follows. A step of generating the second digital pulse spaced apart from the first digital pulse by using the delay time output by the DTC based on the above data; A method of data tampering comprising:

4. In paragraph 1, The step of generating a sync pulse of a first position synchronized with the above system clock and a data pulse of a second position according to the determined data is: A step of determining a guard time for maintaining a minimum time difference between the sync pulse and the data pulse; and A step of generating a data pulse at the second position such that a time difference greater than the guard time is maintained at the first position; A method of data tampering comprising:

5. In paragraph 1, The step of performing modulation using the above sync pulse and the above data pulse is: A step of performing modulation on the time difference between the first position of the sync pulse and the second position of the data pulse; A method of data tampering comprising:

6. In paragraph 1, The step of performing modulation using the above sync pulse and the above data pulse is: A step of performing pulse width modulation for changing the pulse width of at least some of the sync pulse and the data pulse; A method of data tampering comprising:

7. In paragraph 1, The step of performing modulation using the above sync pulse and the above data pulse is: A step of performing frequency modulation for changing the center frequency of at least some of the sync pulse and the data pulse; A method of data tampering comprising:

8. In paragraph 7, The step of performing the above frequency modulation is: A step of performing frequency modulation by changing the center frequency of a gated ring oscillator; A method of data tampering comprising:

9. In paragraph 1, A step of generating a data pulse of a third position according to the above-determined data; Including more, The step of performing modulation using the above sync pulse and the above data pulse is: A step of performing time difference modulation, pulse width modulation and frequency modulation using the sync pulse, the data pulse of the second position and the data pulse of the third position; A method of data tampering comprising:

10. A non-transitory computer-readable recording medium having recorded thereon a program for executing the data modification method described in Article 1.

11. As a computing device, Communication module; memory; and At least one processor connected to said memory and configured to execute at least one computer-readable program contained in said memory Including, At least one of the above programs, Determine the data to be transmitted, Generate a sync pulse of a first position synchronized with the system clock and a data pulse of a second position according to the determined data, A computing device comprising instructions for performing modulation using the sync pulse and the data pulse.

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