Micro-nanoscale additive manufacturing method and patterning method

Abstract

A micro-nanoscale additive manufacturing method, and a patterning method. The additive manufacturing method uses an electric field to control directional movement of a charged dispersed phase in a gas. The charged dispersed phase passes through hollow channels in a hollow pattern layer on a substrate, and moves and builds up on the substrate, forming a printed pattern having a smaller feature size than that of the hollow channels. The substrate is an insulating substrate, the electric field strength value at the printing position is controlled to be not lower than 15000 V / cm, and the electric field strength direction is a positive direction or a negative direction.

Description

A micro-nanoscale additive manufacturing method and patterning method Technical Field

[0001] The present invention relates to a micro-nanoscale additive manufacturing method and a patterning method. Background Art

[0002] Micro-nano fabrication technology is widely used in industries such as integrated circuits and micro-electromechanical devices. Currently, the mainstream micro-nano fabrication technology uses a planar manufacturing method based on patterning technology. The processing accuracy or minimum feature size is determined by the patterning technology used during the processing.

[0003] Existing patterning technologies include photolithography, nanoimprinting, and directed self-assembly. Among them, photolithography is the most widely used and is currently the only technology that can achieve high-resolution and large-area patterning through multiple exposures. Compared to photolithography, nanoimprinting requires simpler equipment, but is limited by mold processing difficulty, mold life, and contact processing. Directed self-assembly can process patterns smaller than 10nm by multiplying the density, but this method still has many problems in terms of defect control, the types of patterns that can be processed, orientation guidance, and processing time.

[0004] Chinese patent CN113478809B discloses a method for additive manufacturing of micro-nanostructures. This method uses an electric field to manipulate the directional migration of a charged dispersed phase in a gas, causing the charged dispersed phase to stack on a substrate to form the desired micro-nanostructure. A hollow pattern layer is provided on the substrate, and during migration, the charged dispersed phase migrates through the pores in the hollow pattern layer onto the substrate. The hollow pattern layer is made of a dielectric material selected from silicon nitride, silicon oxide, or photoresist. This method enables low-cost, high-purity, multi-material, ultra-high-resolution, ultra-fast, and one-time large-area printing of micro-nanostructures, addressing challenges such as the limited variety of printable materials, low printing resolution, slow printing speed, and array-based printing at the micro-nanoscale. However, this method can only be performed on conductive substrates and cannot be printed on insulating substrates. Furthermore, the printed pattern, formed by stacking nanoparticles, has pores, resulting in poor mechanical and electrical properties of the structure without post-processing. Furthermore, due to the effects of diffusion and charge repulsion, the pattern printed by this method has unclear edges and low sidewall verticality.

[0005] Therefore, developing micro-nanoscale additive manufacturing methods and patterning methods to overcome the above problems has become a crucial link.

[0006] Summary of the Invention

[0007] The present invention aims to overcome the shortcomings of existing electric field-based additive manufacturing methods for micro-nano structures, which are unsuitable for printing on insulating substrates, have unclear pattern edges, and low sidewall verticality, and to provide new micro-nanoscale additive manufacturing methods and patterning methods. The micro-nanoscale additive manufacturing methods of the present invention not only achieve low cost, high throughput, high precision, small feature size, high density, low defects, simple operation, and applicability to multi-material and multi-type pattern processing, but also enable printing on insulating substrates. The micro-nanoscale patterning methods of the present invention can further ensure that the edges of the manufactured patterns are clear and the sidewalls have high verticality.

[0008] The present invention provides the following technical solutions to solve the above problems.

[0009] On the one hand, the present invention provides a micro-nanoscale additive manufacturing method, which controls the directional migration of the charged dispersed phase in the gas through the action of an electric field, passes through the hollow channels in the hollow pattern layer on the substrate, migrates and stacks to the substrate, and forms a printed pattern with a characteristic size smaller than the characteristic size of the hollow channels; wherein, the substrate is an insulating substrate, and the electric field strength value at the printing position is controlled to be not less than 15000V / cm, wherein the direction of the electric field strength is positive or negative.

[0010] The additive manufacturing method of the present invention uses the convergence of electric field lines to form a printed pattern with a smaller feature size based on the existing hollowed-out pattern layer. Specifically, the spatial electric field required for printing is constructed by combining an applied electric field with the local electric field formed on the surface of the hollowed-out pattern layer, and the antagonistic balance between the two. This causes the electric field lines to converge at the center of the hollowed-out channel, resulting in a converged area much smaller than the size of the hollowed-out channel, thus producing a printed pattern with a significantly reduced feature size.

[0011] The electric field effect is generated by applying an external electric field, the intensity of the external electric field may be no less than 1 V / cm, preferably 1 to 10,000 V / cm, wherein the direction of the electric field intensity is positive or negative.

[0012] In existing additive manufacturing methods for micro-nano structures based on electric field effects, a conductive substrate must be used and connected to an external circuit so that the charges carried by the charged dispersed phase during the printing process are conducted away through the substrate. Otherwise, like charges will repel each other, resulting in failure to print. The inventors unexpectedly discovered in their research that when the substrate is an insulating and non-conductive substrate, by simply controlling the electric field strength at the printing position to be no less than 15,000 V / cm, where the direction of the electric field strength is positive or negative, the printed structure can be made to undergo corona discharge during the printing process, causing the charges accumulated on the structure to be discharged into the gas. In addition, the charges on the structure exhibit polarization under the action of the electric field, forcibly distributing the charges to the two ends of the structure. The upper end can attract charged nanoparticles of opposite charges, thereby successfully printing the pattern.

[0013] The printing position refers to the location on the substrate where printing begins after the electric field lines finally converge. The electric field lines begin to converge as they pass through the hole, and the intensity of the electric field line convergence remains constant until it reaches the substrate. The electric field strength at the printing position is preferably between 15,000 and 30,000 V / cm, for example, 20,000 V / cm or 25,000 V / cm, with the direction of the electric field strength being positive or negative. The electric field strength at the printing position is achieved by adjusting the external electric field strength to achieve the desired intensity.

[0014] The insulating substrate may be any insulating substrate suitable for the field of micro-nano processing, preferably a silicon dioxide substrate, a glass substrate or a plastic substrate.

[0015] The gas is a multiphase fluid with a gaseous continuous phase and a solid and / or liquid dispersed phase. The gas can be any suitable carrier gas, such as one or more of nitrogen, an inert gas, oxygen, hydrogen, sulfur hexafluoride, uranium hexafluoride, tungsten hexafluoride, and chlorine. The gas is preferably used at a rate of 0.1 to 100 L / min.

[0016] The charged dispersed phase is a charged liquid and / or solid substance dispersed in the gas. The material of the charged dispersed phase is any material suitable for printing in the art and can be selected from one or more of inorganic, organic, and composite materials, preferably a conductive or semiconductor material. The conductive material is preferably a metallic material, such as a single metal or an alloy. The metallic element in the metallic material is selected from one or more of magnesium, aluminum, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, copper, zinc, gallium, germanium, yttrium, zirconium, niobium, molybdenum, technetium, ruthenium, rhodium, palladium, silver, cadmium, indium, tin, antimony, hafnium, tantalum, tungsten, rhenium, iridium, platinum, gold, lead, and bismuth. The conductive material can also be a single non-metallic element or a compound formed by a single non-metallic element and a metal. The non-metallic element can be selected from one or more of boron, carbon, nitrogen, oxygen, silicon, and arsenic. The organic material is preferably a polymer or biomolecular material. The size of the charged dispersed phase is preferably 0.1 nm to 10 μm.

[0017] The charged dispersed phase can be produced using discharge plasma technology, atomization, or electrospraying. When the printed pattern material is conductive or semiconductive, such as a metal or semiconductor material, the charged dispersed phase can be produced using a discharge plasma method. When the dispersed phase material is a solution, the charged dispersed phase can be produced using atomization or electrospraying.

[0018] The hollow pattern layer can be any conventional hollow pattern layer in the art, such as a mask with a hollow pattern, or a hollow pattern layer produced by conventional methods, such as photolithography. The hollow pattern layer can be made of a dielectric material, such as silicon nitride, silicon oxide, or photoresist, or a conductive layer, such as a metal material.

[0019] The spacing between the hollow pattern layer and the substrate is greater than or equal to 0, and can generally be 0 to 50 microns. When the spacing is greater than 0, the hollow pattern layer is separated from the substrate, such as when a mask with a hollow pattern is suspended above the substrate. When the spacing is equal to 0, the hollow pattern layer is in contact with the substrate.

[0020] Optionally, the distance between the hollow pattern layer and the substrate can be adjusted to control the electric potential of the hollow pattern layer and the distribution of the spatial electric field to control the shape and size of the printed structure.

[0021] The graphics of the hollow pattern and the printed pattern formed on the basis thereof may be various simple patterns or complex patterns. The simple pattern may be a dot, a straight line or an arc. The complex pattern may be a cross line, a broken line, a dot matrix, a square matrix, a polygon, or a combination of one or more of the above patterns and the simple pattern. The characteristic size of the hollow pattern is preferably 1 to 100 times the characteristic size of the printed pattern, more preferably 1 to 20 times, and even more preferably 2 to 20 times, such as 4 times, 5 times, 6 times, 10 times or 16 times. The characteristic size of the printed pattern may be 0.1 nm to 10 μm, preferably 0.1 nm to 1000 nm, such as 1000 nm, 800 nm, 400 nm, 300 nm or 200 nm.

[0022] In another aspect, the present invention provides a micro-nanoscale patterning method comprising: transferring a printed pattern on a substrate to a substrate;

[0023] The printed pattern is produced by the following additive manufacturing method: by controlling the directional migration of the charged dispersed phase in the gas through the action of an electric field, the charged dispersed phase passes through the hollow channels in the hollow pattern layer on the substrate, migrates and stacks onto the substrate, and forms a printed pattern with a characteristic size smaller than the characteristic size of the hollow channels;

[0024] The substrate is a conductive substrate or an insulating substrate; when the substrate is a conductive substrate, the substrate is connected to an external circuit; when the substrate is an insulating substrate, the electric field strength value of the printing position is controlled to be no less than 15000 V / cm, wherein the direction of the electric field strength is a positive direction or a negative direction;

[0025] The transfer is performed in any of the following ways:

[0026] (1) etching the substrate not covered by the printed pattern on the substrate having only the printed pattern, and then removing the printed pattern; and

[0027] (2) On the substrate having the hollow pattern layer and the printed pattern, etching the substrate not covered by the hollow pattern layer and the printed pattern, and then removing the hollow pattern layer and the printed pattern.

[0028] The conductive substrate is preferably a silicon substrate, a silicon nitride substrate or a silicon carbide substrate, more preferably a silicon substrate. The insulating substrate is preferably a silicon dioxide substrate, a glass substrate or a plastic substrate.

[0029] When the substrate is an insulating substrate, the electric field intensity value at the printing position is preferably 15,000 to 30,000 V / cm, wherein the direction of the electric field intensity is positive or negative.

[0030] Except for the above-mentioned substrate type and electric field strength at the printing position, the specific steps and other conditions of the additive manufacturing method are as described in the first aspect.

[0031] In the transfer method (1), before the etching, the step of removing the hollow pattern layer may be further included to obtain a substrate having only the printed pattern. In the transfer method (2), it is preferred to remove the hollow pattern layer first and then remove the printed pattern.

[0032] The etching may be selective or non-selective, preferably reactive ion beam selective etching. The specific etching method and conditions may be selected according to conventional techniques in the art. The ratio of the etching depth to the characteristic dimension of the printed pattern is preferably 1 to 10, more preferably 1 to 4, for example 1, 2, or 4.

[0033] Among them, the removal of the hollow pattern layer can be carried out according to conventional methods and conditions in the field, and can be selected according to the material of the hollow pattern layer. For example: when the material of the hollow pattern layer is photoresist, it is removed by plasma bombardment or solvent dissolution; when the hollow pattern layer is a mask, the mask is moved by a nano-scale moving stage to keep it away from the substrate with the printed pattern.

[0034] The removal of the printed pattern can be carried out in accordance with conventional methods and conditions in the art, and can be selected according to the material of the printed pattern. For example, when the material of the printed pattern is metal, a metal etching solution is used for removal. Specifically, when the material of the printed pattern is gold, a potassium iodide solution is used for removal.

[0035] Wherein, before the transfer, a step of using the additive manufacturing method to obtain the printing pattern may also be included.

[0036] The patterning method of the present invention can form a pattern with an area of ​​not less than 8mm in a single pass. 2 .

[0037] On the basis of conforming to the common sense in this field, the above-mentioned preferred conditions can be arbitrarily combined to obtain the preferred embodiments of the present invention.

[0038] The positive progress effect of the present invention is:

[0039] (1) The micro-nanoscale additive manufacturing method of the present invention can print patterns on an insulating substrate simply by controlling the electric field intensity at the printing position.

[0040] (2) The micro-nanoscale patterning method of the present invention can construct a highly etch-resistant pattern, which not only greatly reduces the feature size and doubles the pattern density, but also makes the edges of the manufactured pattern clear and the sidewall verticality high.

[0041] (3) The method of the present invention has low cost, high precision, high throughput, few defects, simple operation, and convenient processing. It is suitable for multi-material and multi-type pattern processing, can achieve patterning over a large area at one time, and has the advantages of fast speed and high efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figures 1a-1b are schematic diagrams of electric field line convergence of the additive manufacturing methods according to embodiments 1-12 and 13-14 of the present invention, respectively; Figure 1c is a schematic flow chart of the pattern transfer method according to the present invention, wherein method one corresponds to embodiments 1-5 and 13-14, and method two corresponds to embodiments 6-12.

[0043] 2a-2d show SEM electron microscope images of the sample after the straight line pattern is patterned according to Example 1 of the present invention.

[0044] 3a-3d show SEM electron microscope images of the sample after the arc pattern is patterned according to Example 2 of the present invention.

[0045] FIG4 shows a SEM electron microscope photograph of a sample after patterning the arc+straight line combination pattern according to Example 3 of the present invention.

[0046] 5a-5d show SEM electron microscope images of the sample after the broken line pattern is patterned according to Example 4 of the present invention.

[0047] 6a-6b show SEM electron microscope images of the sample after the grid line pattern is patterned according to Example 5 of the present invention.

[0048] 7a-7b show SEM electron microscope images of the sample after patterning the circular dot pattern according to Example 6 of the present invention.

[0049] 8a-8d show SEM electron microscope images of the sample patterned with a square lattice pattern according to Example 7 of the present invention.

[0050] 9a-9d show SEM electron microscope images of the sample after the arc pattern is patterned according to Example 8 of the present invention.

[0051] 10a-10d show SEM electron microscope images of the sample after the broken line pattern is patterned according to Example 9 of the present invention.

[0052] 11a-11c show SEM electron microscope images of the sample after the triangular outline pattern is patterned according to Example 10 of the present invention.

[0053] 12a-12c show SEM electron microscope images of the sample after the grid line pattern is patterned according to Example 11 of the present invention.

[0054] 13a-13b show SEM electron microscope photos of the sample after patterning the arc+straight line combination pattern according to Example 12 of the present invention.

[0055] 14a-d show SEM electron microscope images of the pattern printed according to the method in Example 8 of the present invention and the pattern after transfer.

[0056] Figures 15a-b show SEM electron microscope photos of the pattern printed according to the additive manufacturing method in Example 1 of the present invention; Figures 15c-d are SEM electron microscope photos of the pattern after transfer according to the patterning methods in Examples 8 and 10, respectively.

[0057] 16a-b show SEM electron microscope images of the printed pattern according to Example 13 of the present invention.

[0058] 17a-b show SEM electron microscope images of the printed pattern according to Example 14 of the present invention. DETAILED DESCRIPTION

[0059] The following describes specific embodiments of the present invention. However, those skilled in the art will appreciate that these are merely illustrative and that various changes or modifications may be made to these embodiments without departing from the principles and spirit of the present invention. Therefore, the scope of protection of the present invention is defined by the appended claims. The accompanying drawings are merely illustrative of the present invention and are not intended to limit the scope of the present invention.

[0060] Example 1

[0061] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0062] (2) Expose a linear pattern with a feature size (line width) of 2 μm, then develop for 45 seconds to remove the photoresist in the exposed area;

[0063] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5×10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm, so as to print a stack of linear patterns with a characteristic size (line width) of 200 nm on a linear pattern with a characteristic size of 2 μm;

[0064] (4) using a plasma cleaning machine to remove the photoresist on the substrate surface by oxygen plasma bombardment, the power of the plasma cleaning machine is 50 W, and the use time is 20 minutes;

[0065] (5) Selectively etch the substrate using a reactive ion beam to a depth of 800 nm;

[0066] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a linear pattern.

[0067] Example 2

[0068] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0069] (2) Expose a circular arc pattern with a feature size of 2 μm, where the inner diameter of the arc is 12 μm and the outer diameter is 14 μm, and then develop for 45 seconds to remove the photoresist in the exposed area;

[0070] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm to print a stack of circular arc patterns with a characteristic size of 2 μm to form a circular arc pattern with a characteristic size of 200 nm;

[0071] (4) using a plasma cleaning machine to remove the photoresist on the substrate surface by oxygen plasma bombardment, the power of the plasma cleaning machine is 50 W, and the time is 20 minutes;

[0072] (5) Selectively etch the substrate using reactive ion beam to a depth of 800 nm;

[0073] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a patterned arc pattern.

[0074] Example 3

[0075] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0076] (2) Expose a combined pattern of arcs and straight lines with a feature size of 2 μm, where the inner diameter of the arc is 12 μm and the outer diameter is 14 μm, and then develop for 45 seconds to remove the photoresist in the exposed area;

[0077] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and a printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a gas flow rate of 3 L / min and an external electric field strength of 200 V / cm, so as to print a stack on a combination pattern of arcs and straight lines with a characteristic size of 2 μm to form a combination pattern of arcs and straight lines with a characteristic size of 200 nm;

[0078] (4) using a plasma cleaning machine to remove the photoresist on the substrate surface by oxygen plasma bombardment, the power of the plasma cleaning machine is 50 W, and the time is 20 minutes;

[0079] (5) Selectively etch the substrate using reactive ion beam to a depth of 800 nm;

[0080] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a pattern of a combination of arc and straight line.

[0081] Example 4

[0082] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0083] (2) Expose a line pattern with a feature size (line width) of 2 μm, then develop for 45 seconds to remove the photoresist in the exposed area;

[0084] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3, an Au charged dispersed phase with an average size of 5 nm, and a printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm, so as to print a stack on a zigzag pattern with a characteristic size of 2 μm to form a zigzag pattern with a characteristic size of 200 nm;

[0085] (4) using a plasma cleaning machine to remove the photoresist on the substrate surface by oxygen plasma bombardment, the power of the plasma cleaning machine is 50 W, and the time is 20 minutes;

[0086] (5) Selectively etch the substrate using reactive ion beam to a depth of 800 nm;

[0087] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 minutes, removing the printed pattern, and obtaining a sample with a broken line pattern.

[0088] Example 5

[0089] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0090] (2) Expose a grid line pattern with a feature size (line width) of 2 μm, then develop for 45 seconds to remove the photoresist in the exposed area;

[0091] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm to print a stack on a grid line pattern with a characteristic size of 2 μm to form a grid line pattern with a characteristic size of 200 nm;

[0092] (4) using a plasma cleaning machine to remove the photoresist on the substrate surface by oxygen plasma bombardment, the power of the plasma cleaning machine is 50 W, and the time is 20 minutes;

[0093] (5) Selectively etch the substrate using reactive ion beam to a depth of 800 nm;

[0094] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 minutes, removing the printed pattern, and obtaining a sample with a patterned grid line pattern.

[0095] Example 6

[0096] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0097] (2) Expose a circular dot pattern with a feature size of 2.5 μm, then develop for 45 seconds to remove the photoresist in the exposed area, where the silicon substrate is connected to the external circuit;

[0098] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a gas flow rate of 3 L / min and an external electric field strength of 200 V / cm to print a stacked circular dot pattern with a characteristic size of 400 nm on a circular dot matrix pattern with a characteristic size of 2.5 μm;

[0099] (4) Selectively etch the substrate using a reactive ion beam to a depth of 500 nm;

[0100] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The power of the plasma cleaning machine is 50 W and the time is 20 minutes.

[0101] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a circular dot pattern.

[0102] Example 7

[0103] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0104] (2) Expose a square dot pattern with feature sizes of 4.5 μm and 2 μm, followed by development for 45 s to remove the photoresist in the exposed areas;

[0105] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a gas flow rate of 3 L / min and an external electric field strength of 200 V / cm to print stacks of square dot patterns with characteristic sizes of 1 μm and 400 nm on square dot patterns with characteristic sizes of 4.5 μm and 2 μm respectively;

[0106] (4) Selectively etch the substrate using a reactive ion beam to a depth of 500 nm;

[0107] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The power of the plasma cleaning machine is 50 W and the time is 20 minutes.

[0108] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a square dot matrix pattern.

[0109] Example 8

[0110] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0111] (2) Expose a circular arc pattern with a feature size of 2 μm, where the inner diameter of the arc is 12 μm and the outer diameter is 14 μm, and then develop for 45 seconds to remove the photoresist in the exposed area;

[0112] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm to print a stack of circular arc patterns with a characteristic size of 2 μm to form a circular arc pattern with a characteristic size of 200 nm;

[0113] (4) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0114] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The power of the plasma cleaning machine is 50 W and the time is 20 minutes.

[0115] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a patterned arc pattern.

[0116] Example 9

[0117] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0118] (2) Expose a 2 μm feature line pattern, then develop for 45 s to remove the photoresist in the exposed area;

[0119] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3, an Au charged dispersed phase with an average size of 5 nm, and a printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm, so as to print a stack on a zigzag pattern with a characteristic size of 2 μm to form a zigzag pattern with a characteristic size of 200 nm;

[0120] (4) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0121] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The power of the plasma cleaning machine is 50 W and the time is 20 minutes.

[0122] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 minutes, removing the printed pattern, and obtaining a sample with a broken line pattern.

[0123] Example 10

[0124] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0125] (2) Expose a triangular outline pattern with a feature size of 2 μm, then develop for 45 seconds to remove the photoresist in the exposed area;

[0126] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm, and a triangular outline pattern with a characteristic size of 200 nm was printed on a triangular outline pattern with a characteristic size of 2 μm;

[0127] (4) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0128] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The power of the plasma cleaning machine is 50 W and the time is 20 minutes.

[0129] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a triangular outline pattern.

[0130] Example 11

[0131] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0132] (2) Expose a grid line pattern with a feature size of 2 μm, then develop for 45 seconds to remove the photoresist in the exposed area;

[0133] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and the printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 3 L / min and an external electric field strength of 200 V / cm to print a stack on a grid line pattern with a characteristic size of 2 μm to form a grid line pattern with a characteristic size of 200 nm;

[0134] (4) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0135] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The power of the plasma cleaning machine is 50 W and the time is 20 minutes.

[0136] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 minutes, removing the printed pattern, and obtaining a sample with a patterned grid line pattern.

[0137] Example 12

[0138] (1) Spin-coat AZ5214 photoresist with a thickness of 1.5 μm on a silicon substrate at a speed of 4000 r / min for 30 s;

[0139] (2) Expose a combined pattern of arcs and straight lines with a feature size of 2 μm, where the inner diameter of the arc is 12 μm and the outer diameter is 14 μm, and then develop for 45 seconds to remove the photoresist in the exposed area;

[0140] (3) The silicon substrate is connected to the external circuit, and the concentration used is 1.5x10 7 pieces / cm 3 , an Au charged dispersed phase with an average size of 5 nm, and a printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a gas flow rate of 3 L / min and an external electric field strength of 200 V / cm, so as to print a stack on a combination pattern of arcs and straight lines with a characteristic size of 2 μm to form a combination pattern of arcs and straight lines with a characteristic size of 200 nm;

[0141] (4) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0142] (5) Using a plasma cleaning machine, remove the photoresist on the substrate surface by oxygen plasma bombardment. The plasma cleaning machine uses 50W and the time is 20 minutes;

[0143] (6) Using KI metal etching solution with a concentration of 5 wt%, immersing the sample for 5 min, removing the printed pattern, and obtaining a sample with a pattern of a combination of arc and straight line.

[0144] Example 13

[0145] (1) A suspended mask is placed 5 μm above the silicon dioxide insulating substrate as a hollow pattern layer, wherein the suspended mask has circular holes with a diameter of 5 μm and a spacing of 10 μm;

[0146] (2) The concentration used is 5.5x10 7 pieces / cm 3 The printing process was carried out for 1 hour in a nitrogen atmosphere (purity of 99.999%) with a flow rate of 5 / min and an external electric field strength of 2000V / cm. The electric field strength at the printing position was controlled to be 20000V / cm to print a pattern with a diameter of 300nm. After printing, the suspended mask was moved away from the substrate by a nano-scale moving stage.

[0147] (3) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0148] (4) Using a phosphoric acid metal etching solution with a concentration of 85 wt %, the sample was immersed for 5 minutes, and after removing the printed pattern, a sample with a dot pattern was obtained.

[0149] Example 14

[0150] (1) A suspended mask is placed 2 μm above the silicon dioxide insulating substrate as a hollow pattern layer, wherein the suspended mask has line holes with a length of 6 μm and a width of 3 μm distributed at intervals of 12 μm;

[0151] (2) The concentration used is 5.5x10 7 pieces / cm 3 The Pt dispersion with an average size of 3 nm was printed under a nitrogen atmosphere (purity of 99.999%) at a flow rate of 5 L / min and an external electric field strength E1 of 1000 V / cm for 1 hour. The electric field strength at the printing position was controlled to be 15000 V / cm to print a pattern with a line width of 800 nm. After printing, the suspended mask was moved away from the substrate by a nano-scale moving stage.

[0152] (3) Selectively etch the substrate using a reactive ion beam to a depth of 400 nm;

[0153] (4) Using a phosphoric acid metal etching solution with a concentration of 85 wt%, immersing the sample for 5 minutes, removing the printed pattern, and obtaining a sample with a linear pattern.

[0154] Effect embodiment

[0155] 1a and 1b are schematic diagrams of electric field line bundling according to the additive manufacturing method of Examples 1-12 (steps (1)-(3)) and the additive manufacturing method of Examples 13-14 (steps (1)-(2)), respectively.

[0156] FIG1c is a schematic flow chart of the pattern transfer method of Examples 1-14, wherein Method 1 corresponds to Examples 1-5 and 13-14, and Method 2 corresponds to Examples 6-12.

[0157] The samples obtained according to the above embodiment were observed by SEM electron microscope at different magnifications.

[0158] Figures 2a-2d, 3a-3d, 4, 5a-5d, and 6a-6b correspond to SEM electron micrographs of straight line patterns, circular arc patterns, arc + straight line combination patterns, broken line patterns, and grid line patterns transferred to substrates according to Examples 1-5 of the present invention, respectively. The characteristic dimensions of the patterns transferred to the substrate are significantly smaller than those of the original patterns. As shown in the figures, the transferred patterns exhibit high precision and high edge definition, maintaining these high precision and high edge definition even at high magnifications.

[0159] Figures 7a-7b, 8a-8d, 9a-9d, 10a-10d, 11a-11c, 12a-12c, and 13a-13b correspond to SEM electron micrographs of circular dot patterns, square dot patterns, arc patterns, broken line patterns, triangular outline patterns, grid line patterns, and arc+straight line combination patterns transferred to a substrate according to Examples 6-12 of the present invention, respectively. As shown in the figures, a pattern with a small feature size can be formed on a pattern with a large feature size and transferred together, achieving a significant reduction in feature size while also multiplying density. The transferred pattern has high precision and high edge definition, and its high precision and high edge definition can be maintained even at high magnification.

[0160] Figures 14a-14b are SEM electron microscope photos of the cross section of the pattern printed by the additive manufacturing method (steps (1)-(3)) in Example 8 of the present invention after ion beam cutting. As shown in Figure 14a, the edge of the printed pattern is very blurred. In addition, as shown by the dotted line in Figure 14b, the side wall of the printed pattern is about 45 degrees, and the verticality is low. Figures 14c-14d are SEM electron microscope photos of the cross section of the pattern transferred to the substrate by the patterning method (steps (4)-(6)) in Example 8 of the present invention after ion beam cutting. It can be seen that, as shown in Figure 14c, the side wall of the transferred pattern is about 90 degrees, the verticality of the side wall is improved, and as shown in Figure 14d, the edge of the transferred pattern is clearly visible.

[0161] Figures 15a-15b are SEM electron microscope photos of the line pattern printed according to the additive manufacturing method (steps (1)-(3)) in Example 1 of the present invention at different magnifications. It can be seen that there is an obvious halo at the bottom of the printed pattern and the boundary of the pattern is not clear. Figures 15c-15d are SEM electron microscope photos of the arc pattern and the triangular outline pattern transferred to the substrate according to the patterning method of Examples 8 and 10 of the present invention, in which very obvious boundaries of the pattern can be observed, and the patterns in Figures 15c-15d at higher magnifications can be observed to have clearer boundaries than the patterns in Figures 15a-15b, indicating that the edge clarity of the transferred pattern has been greatly improved.

[0162] Figures 16a-16b and 17a-17b correspond to SEM electron microscope images of the pattern printed by the additive manufacturing method in Examples 13-14 of the present invention (steps (1)-(2)) at different magnifications. It can be seen that the feature size of the printed pattern is greatly reduced, which can achieve low-cost, high-efficiency, and large-area three-dimensional structure printing. The additive manufacturing method of the present invention does not require the substrate to be connected to electricity, and an insulating substrate can be used. By simply controlling the electric field strength at the printing position (i.e., the electric field strength at the position after the electric field is converged, which is the same as above and subject to modification), it can achieve a pattern printing effect comparable to or even better than the pattern printed according to the method described in CN113478809B.

Claims

1. A micro-nano scale additive manufacturing method, characterized in that, It controls the directional migration of charged dispersed phases in a gas through the action of an electric field, passing through the hollow channels in the hollow pattern layer on the substrate, migrating and stacking onto the substrate to form a printed pattern with a characteristic size smaller than that of the hollow channels; wherein, the substrate is an insulating substrate, and the electric field strength value for controlling the printing position is not less than 15,000 V / cm, and the direction of the electric field strength is the positive direction or the negative direction.

2. The additive manufacturing method according to claim 1, wherein It satisfies one or both of the following conditions: (1) The insulating substrate is a silica substrate, a glass substrate or a plastic substrate; and (2) wherein, the printing position refers to the position on the substrate where the electric field lines finally converge and start printing, and the electric field strength value at the printing position is 15,000 - 30,000 V / cm, and the direction of the electric field strength is the positive direction or the negative direction.

3. The additive manufacturing method according to claim 1, characterized in that It satisfies one or more of the following conditions: (1) wherein, the electric field action is generated by applying an external electric field, and the strength value of the external electric field is 1 - 10,000 V / cm, and the direction of the electric field strength is the positive direction or the negative direction; (2) wherein, the charged dispersed phase is a charged liquid and / or solid substance dispersed in the gas, and the material of the charged dispersed phase is selected from one or more of inorganic materials, organic materials and composite materials; (3) The size of the charged dispersed phase is 0.1 nm to 10 μm; (4) wherein, the charged dispersed phase is prepared by a discharge plasma technique, an aerosol method or an electrospray method. When the material of the printed pattern has conductive or semi-conductive properties, such as a metal material or a semiconductor material, the charged dispersed phase is prepared by a discharge plasma method. When the material of the dispersed phase is a solution, the charged dispersed phase is prepared by an aerosol method or an electrospray method; (5) wherein, the hollow pattern layer is a mask with a hollow pattern, or a hollow pattern layer prepared by photolithography; (6) The material of the hollow pattern layer is a dielectric or a conductive layer; (7) wherein, the distance between the hollow pattern layer and the substrate is greater than or equal to 0; (8) The hollow pattern is various simple patterns or complex patterns. The simple patterns are dots, straight lines or arcs, and the complex patterns are cross lines, broken lines, dot matrices, square matrices, polygons, or a combined pattern of one or more of the above patterns and the simple patterns; (9) The characteristic size of the hollow pattern is 1 - 100 times that of the printed pattern; and (10) The characteristic size of the printed pattern is 0.1 nm to 10 μm.

4. The additive manufacturing method according to claim 3, wherein It satisfies one or more of the following conditions: (1) The material of the charged dispersed phase is a conductor material or a semiconductor material; (2) The organic material is a polymer material or a biomolecular material; (3) The material of the hollow pattern layer is silicon nitride, silicon oxide or photoresist; (4) The material of the hollow pattern layer is a metal material; (5) The distance between the hollow pattern layer and the substrate is 0 - 50 microns; (6) The characteristic size of the hollow pattern is 1 - 20 times that of the printed pattern; and (7) The characteristic size of the printed pattern is 0.1 nm to 1000 nm.

5. The additive manufacturing method according to claim 4, wherein It satisfies one or more of the following conditions: (1) The conductor material is a metal material, a non-metallic element, or a compound formed by a non-metallic element and a metal; (2) The characteristic size of the hollow pattern is 2 to 20 times the characteristic size of the printed pattern; and (3) The characteristic size of the printed pattern is 1000nm, 800nm, 400nm, 300nm or 200nm.

6. The additive manufacturing method according to claim 5, wherein It meets one or both of the following conditions: (1) The non-metallic element is selected from one or more of boron, carbon, nitrogen, oxygen, silicon and arsenic; (2) the characteristic size of the hollow pattern is 4 times, 5 times, 6 times, 10 times or 16 times the characteristic size of the printed pattern; and (3) The metal material is a metal element or an alloy. Preferably, the metal element in the metal material is selected from one or more of magnesium, aluminum, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, copper, zinc, gallium, germanium, yttrium, zirconium, niobium, molybdenum, technetium, ruthenium, rhodium, palladium, silver, cadmium, indium, tin, antimony, hafnium, tantalum, tungsten, rhenium, iridium, platinum, gold, lead and bismuth.

7. A patterning method at the micro-nano scale, characterized in that, It includes: transferring the printed pattern on the substrate to the substrate; The printed pattern is made by the following additive manufacturing method: by controlling the directional migration of the charged dispersed phase in the gas through the action of an electric field, the charged dispersed phase passes through the hollow channels in the hollow pattern layer on the substrate, migrates and stacks to the substrate, and forms a printed pattern with a characteristic size smaller than the characteristic size of the hollow channels; The substrate is a conductive substrate or an insulating substrate; when the substrate is a conductive substrate, the substrate is connected to an external circuit; when the substrate is an insulating substrate, the electric field strength value of the printing position is controlled to be not less than 15000V / cm, wherein the direction of the electric field strength is a positive direction or a negative direction; Wherein, the transfer is performed in any of the following ways: (1) on a substrate having only the printed pattern, etching the substrate not covered by the printed pattern, and then removing the printed pattern; and (2) On the substrate having the hollow pattern layer and the printed pattern, etching the substrate not covered by the hollow pattern layer and the printed pattern, and then removing the hollow pattern layer and the printed pattern.

8. The patterning method according to claim 7, wherein It meets one or more of the following conditions: (1) The conductive substrate is a silicon substrate, a silicon nitride substrate or a silicon carbide substrate; (2) The insulating substrate is a silicon dioxide substrate, a glass substrate or a plastic substrate; (3) When the substrate is a conductive substrate and is connected to an external circuit, the electric field strength value at the printing position is 1 to 30,000 V / cm, wherein the direction of the electric field strength is positive or negative; (4) When the substrate is an insulating substrate, the electric field strength value at the printing position is 15000 to 30000 V / cm, wherein the direction of the electric field strength is positive or negative; (5) In the transfer method (1), before the etching, a step of removing the hollow pattern layer may be further included to obtain a substrate having only the printed pattern; (6) In the transfer method (2), the hollow pattern layer is first removed, and then the printed pattern is removed; (7) The etching is selective etching or non-selective etching; (8) The ratio of the etching depth to the characteristic size of the printed pattern is 1 to 10; (9) When the material of the hollow pattern layer is photoresist, the hollow pattern layer is removed by plasma bombardment or solvent dissolution; (10) When the hollow pattern layer is a mask, the mask is moved away from the substrate with the printed pattern by a nanoscale moving stage; (11) When the material of the printed pattern is metal, the printed pattern is removed by a metal etching solution; (12) Before the transfer, it may further include the step of obtaining the printed pattern by the additive manufacturing method; and (13) The area of the pattern that can be formed in a single time by the patterning method is not less than 8 mm 2 .

9. The patterning method according to claim 8, wherein It satisfies one or more of the following conditions: (1) The conductive substrate is a silicon substrate; (2) The etching is reactive ion beam selective etching; (3) The ratio of the depth of the etching to the feature size of the printed pattern is 1 to 4, such as 1, 2 or 4; And (4) When the material of the printed pattern is gold, the printed pattern is removed by a potassium iodide solution.

10. The patterning method according to any one of claims 7 to 9, characterized in that, The additive manufacturing method satisfies the conditions described in any one of claims 3 to 6.

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