Pixel driving circuit, driving method, and display panel

Abstract

The present application discloses a pixel driving circuit, a driving method, and a display panel. In the pixel driving circuit, a driving module inputs a signal output by a first power supply and provides a light-emitting driving signal for a light-emitting element; a threshold compensation module is connected to a control end of the driving module and a second end of the driving module under the control of a second scanning signal; a first end of a first capacitor is connected to the first power supply; a second end of the first capacitor is connected to the control end of the driving module; a data input module is connected to a first end of a second capacitor; a second end of the second capacitor is connected to the control end of the driving module; the data input module outputs a data signal to the first end of the second capacitor under the control of a first scanning signal, or outputs a reference voltage to the first end of the second capacitor under the control of the second scanning signal; and a reset module is configured to output a reset voltage to a first end of the light-emitting element, the second end of the driving module, and the control end of the driving module. The technical solution provided in the present application can improve the display uniformity of the panel.

Description

Pixel driving circuit, driving method, and display panel

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 30, 2023, with application number 2023118729706, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of display technology, for example, to a pixel driving circuit and driving method, and a display panel. Background Art

[0003] With the continuous development of electronic technology, the requirements for display screen quality are becoming increasingly higher. Organic Light-Emitting Diode (OLED) screens have attracted widespread attention due to their advantages such as self-luminescence, low power consumption, thinness, flexibility, brilliant colors, high contrast, and fast response speed. They are gradually replacing Liquid Crystal Display (LCD) screens and have become the representative of the next generation of display screens.

[0004] Because OLED elements are current-driven, they require a corresponding pixel driver circuit to provide the driving current for them to emit light. As display resolution increases, pixel sizes decrease, and the area occupied by the pixel driver circuit decreases. Consequently, the capacitance of the capacitors in the pixel driver circuit decreases. When the scan signal flips from low to high, the effect of charge injection becomes increasingly noticeable, leading to a more pronounced difference between the far and near pixels, which in turn degrades display uniformity.

[0005] Summary of the Invention

[0006] Embodiments of the present application provide a pixel driving circuit and driving method, and a display panel to improve display uniformity.

[0007] In a first aspect, an embodiment of the present application provides a pixel driving circuit, comprising: a driving module, a threshold compensation module, a reset module, a data input module, a first capacitor and a second capacitor;

[0008] The first end of the driving module is configured to input a signal output by a first power supply; the second end of the driving module is configured to provide a light-emitting driving signal to the light-emitting element; the threshold compensation module is configured to connect the control end of the driving module and the second end of the driving module under the control of a second scanning signal; the first end of the first capacitor is connected to the first power supply; and the second end of the first capacitor is connected to the control end of the driving module.

[0009] The data input module is connected to the first end of the second capacitor; the second end of the second capacitor is connected to the control end of the driving module; the data input module is connected to the data signal and the reference voltage respectively, and is configured to output the data signal to the first end of the second capacitor under the control of the first scanning signal, or output the reference voltage to the first end of the second capacitor under the control of the second scanning signal;

[0010] The reset module is connected to the first end of the light emitting element and is configured to output a reset voltage to the first end of the light emitting element, the second end of the driving module and the control end of the driving module.

[0011] In a second aspect, an embodiment of the present application provides a driving method for a pixel driving circuit, which is applicable to any pixel driving circuit provided in the embodiment of the present application, wherein the pixel driving circuit further includes a light emitting control module; the light emitting control module is disposed between the second end of the driving module and the first end of the light emitting element;

[0012] The driving method of the pixel driving circuit includes:

[0013] During the initialization phase, the reset module transmits a reset voltage to the first terminal of the light-emitting element; the light-emitting control module is in a first conduction state under the control of the light-emitting control signal and is configured to transmit the reset voltage to the second terminal of the driving module; the threshold compensation module transmits the reset voltage to the control terminal of the driving module; and the data writing module transmits a reference voltage to the first terminal of the second capacitor under the control of the second scanning signal.

[0014] In the threshold compensation stage, the threshold compensation module compensates the threshold voltage of the driving module to the control terminal of the driving module; the data writing module continues to transmit the reference voltage to the first terminal of the second capacitor under the control of the second scanning signal;

[0015] In the data writing phase, the data writing module transmits the data signal to the first end of the second capacitor under the control of the first scanning signal;

[0016] In the pre-stabilization stage, the light control module is in the second conduction state under the control of the light control signal; the reset module is turned on under the control of the reset control signal; and a path is established between the first power supply and the reset voltage;

[0017] In the light-emitting stage, the light-emitting control module is in the second conducting state under the control of the light-emitting control signal, so that the driving module generates a driving current and transmits it to the light-emitting element;

[0018] A conduction current of the light emitting control module in the first conduction state is smaller than a conduction current of the light emitting control module in the second conduction state.

[0019] In a third aspect, an embodiment of the present application further provides a display panel, comprising the pixel driving circuit provided by any embodiment of the present application.

[0020] In the present application, a driver module of a pixel driver circuit is connected to a first power source and configured to provide a light-emitting driving signal to a light-emitting element. A threshold compensation module is configured to perform threshold compensation on a control terminal of the driver module. A first capacitor is connected between the control terminal and the first terminal of the driver module. A data input module is connected to the control terminal of the driver module via a second capacitor and outputs a data signal to the second capacitor under the control of a first scan signal and outputs a reference voltage to the second capacitor under the control of a second scan signal. The threshold compensation module is connected to the control terminal and the second terminal of the driver module under the control of a second scan signal. In this embodiment, the data input module and the threshold compensation module are simultaneously controlled by the second scan signal, so that the control terminals of the data input module and the threshold compensation module undergo voltage jumps simultaneously, and charge is injected simultaneously at both ends of the second capacitor, so that the threshold compensation of the control terminal of the driver module is less affected by the charge injection, so that the threshold voltage captured by the control terminal of the driver module is closer to the threshold voltage of the driver module itself. Therefore, whether it is a near-end pixel driver circuit or a far-end pixel driver circuit, the threshold voltage captured by the control terminal is less affected by the charge injection and tends to be consistent, ensuring that the brightness difference of the light-emitting elements at the far and near ends of the display panel is small and the display panel displays uniformly. In addition, the captured threshold voltage in this embodiment is closer to the actual threshold voltage of the driving module, thereby achieving a more complete threshold compensation function, improving the brightness display accuracy, and improving the quality of the picture display. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] FIG1 is a schematic structural diagram of a pixel driving circuit provided in an embodiment of the present application;

[0022] FIG2 is a schematic structural diagram of another pixel driving circuit provided in an embodiment of the present application;

[0023] FIG3 is a working timing diagram of the pixel driving current in FIG2 ;

[0024] FIG4 is a schematic structural diagram of another pixel driving circuit provided in an embodiment of the present application;

[0025] FIG5 is a schematic structural diagram of a comparative example of a pixel driving circuit provided in an embodiment of the present application;

[0026] FIG6 is an operation timing diagram of the pixel driving circuit in FIG5 ;

[0027] FIG7 is a schematic flow chart of a driving method of a pixel driving circuit provided in an embodiment of the present application;

[0028] FIG8 is a schematic structural diagram of a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] In a pixel driving circuit, for example, a pixel driving circuit for a display panel with a higher display resolution, the capacitance value of the capacitor is small, and the effect of charge injection is more obvious. For example, when a signal jump occurs at the control terminal of a transistor in the pixel driving circuit, for example, from a high level to a low level, or from a low level to a high level, the source and drain of the transistor are also prone to level jump (a micro capacitor is formed between the control terminal and the source or drain of the transistor), causing the potential of certain nodes in the pixel driving circuit to change, which is equivalent to the node being injected with charge. And because the control signal connected to the control terminal, such as the scanning signal, has a difference in voltage value at the near end and the far end, the charge injection amount of the same node of the pixel driving circuit at the far end and the pixel driving circuit at the near end is different, resulting in different luminous currents of the light-emitting element driven by the final pixel driving circuit, thereby causing the luminous brightness of the light-emitting element at the far end and the near end to shift, resulting in poor display uniformity of the display panel. It should be noted that the near end refers to the end close to the driving circuit, and the far end refers to the end far away from the driving circuit. Usually, various driving circuits such as data driving circuits and scanning driving circuits are set at one end of the display panel. From the direction close to the driving circuit to the direction far away from the driving circuit, there are differences in voltage values ​​for each pixel driving circuit.

[0030] To solve the above-mentioned charge injection problem, an embodiment of the present application provides a pixel driving circuit, as shown in FIG1 . FIG1 is a schematic structural diagram of a pixel driving circuit provided in an embodiment of the present application, comprising: a driving module 11, a threshold compensation module 12, a reset module 13, a data input module 14, a first capacitor C1, and a second capacitor C2;

[0031] The first end of the driving module 11 is configured to input a signal output by the first power supply PVDD; the second end of the driving module 11 is configured to provide a light-emitting driving signal to the light-emitting element D1; the threshold compensation module 12 is configured to connect the control end of the driving module 11 and the second end of the driving module 11 under the control of the second scan signal SCAN2; the first end of the first capacitor C1 is connected to the first power supply PVDD; the second end of the first capacitor C1 is connected to the control end of the driving module 11;

[0032] The data input module 14 is connected to the first end of the second capacitor C2; the second end of the second capacitor C2 is connected to the control end of the driving module 11; the data input module 14 is connected to the data signal Vdata and the reference voltage Vofs, respectively, and is configured to output the data signal Vdata to the first end of the second capacitor C2 under the control of the first scan signal SCAN1, or output the reference voltage Vofs to the first end of the second capacitor C2 under the control of the second scan signal SCAN2;

[0033] The reset module 13 is connected to the first terminal of the light emitting element D1 and is configured to output a reset voltage VRST to the first terminal of the light emitting element D1 , the second terminal of the driving module 11 and the control terminal of the driving module 11 .

[0034] In an embodiment of the present application, a driver module of a pixel driver circuit is connected to a first power source and configured to provide a light-emitting drive signal to a light-emitting element. A threshold compensation module is configured to perform threshold compensation on a control terminal of the driver module. A first capacitor is connected between the control terminal and the first terminal of the driver module. A data input module is connected to the control terminal of the driver module via a second capacitor and outputs a data signal to the second capacitor under the control of a first scan signal and outputs a reference voltage to the second capacitor under the control of a second scan signal. The threshold compensation module is connected to the control terminal and the second terminal of the driver module under the control of a second scan signal. In this embodiment, the data input module and the threshold compensation module are simultaneously controlled by the second scan signal, so that the control terminals of the data input module and the threshold compensation module undergo voltage jumps simultaneously, and charge is injected simultaneously at both ends of the second capacitor, so that the threshold compensation of the control terminal of the driver module is less affected by the charge injection, so that the threshold voltage captured by the control terminal of the driver module is closer to the threshold voltage of the driver module itself. Therefore, whether it is a near-end pixel driver circuit or a far-end pixel driver circuit, the threshold voltage captured by the control terminal tends to be consistent, ensuring that the brightness difference of the light-emitting elements at the far and near ends of the display panel is small and the display panel displays uniformly. In addition, the captured threshold voltage in this embodiment is closer to the actual threshold voltage of the driving module, thereby achieving a more complete threshold compensation function, improving the brightness display accuracy, and improving the quality of the picture display.

[0035] The above is the core concept of this application. The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making any creative work are within the scope of protection of this application.

[0036] As shown in Figure 1, the driving module 11 includes a control end, a first end, and a second end. Among them, the node of the control end of the driving module 11 can be marked as the first node N1, and the node of the second end can be marked as the second node N2. The first end of the driving module 11 is also configured to connect to the first power supply PVDD, and the second end of the driving module 11 is electrically connected to the first end of the light-emitting element D1 (for example, it can be the anode Anode), and the second end of the light-emitting element D1 can be configured to connect to the second power supply PVEE. Then the first power supply PVDD forms a conductive path through the driving module 11, the light-emitting element D1 and the second power supply PVEE, that is, the driving module 11 can provide a light-emitting driving signal to the light-emitting element D1, so that the light-emitting element D1 generates a light-emitting current. The threshold compensation module 12 is configured to connect the control end (first node N1) and the second end (second node N2) of the driving module 11, and is configured to set the threshold voltage V thp The control end of the writing driving module 11 is prevented from affecting the light emitting current of the light emitting element D1 , thereby improving the brightness display accuracy of the light emitting element D1 .

[0037] A first end of the first capacitor C1 is connected to a first power supply PVDD; a second end of the first capacitor C1 is connected to a first node N1; a first end of the second capacitor C2 (which may be referred to as a third node N3) is connected to the data input module 14; and a second end of the second capacitor C2 is connected to the first node N1. Furthermore, the data input module 14 outputs a data signal Vdata to a first end of the second capacitor C2 under the control of a first scan signal SCAN1, and outputs a reference voltage Vofs to a first end of the second capacitor C2 under the control of a second scan signal SCAN2. It should be noted that the data input module 14 and the threshold compensation module 12 are both controlled by the second scan signal SCAN2. The control ends of the data input module 14 and the threshold compensation module 12 will simultaneously undergo a voltage jump when a voltage jump occurs. For example, when the second scan signal SCAN2 is converted from a low level to a high level, or the second scan signal SCAN2 is converted from a high level to a low level, the first parasitic capacitor Cgd1 formed between the data input module 14 and the first node N1 undergoes a voltage jump, the second parasitic capacitor Cgs2 formed between the threshold compensation module 12 and the first node N1 undergoes a voltage jump, and the third parasitic capacitor Cgd2 formed between the threshold compensation module 12 and the second node N2 undergoes a voltage jump. Because the voltage jump occurs simultaneously at the first node N1 and the third node N3 on both sides of the second capacitor C2, the injected charge will be dispersed in the capacitor network between the first node N1 and the third node N3 (including the first capacitor C1, the second capacitor C2, the first parasitic capacitor Cgd1, the second parasitic capacitor Cgs2 and the third parasitic capacitor Cgd2), then the amount of charge injected into the first node N1 is small, so that the potential of the first node N1 is less affected by the voltage jump. At this time, it can be seen that there is still additional charge injected into the first node N1, but since the first node N1 and the third node N3 are charged at the same time, the capacitor network formed between the first node N1 and the third node N3 generates current (charge circulation) to a certain extent. This process can effectively disperse the charge injection amount, so that the potential of the first node N1 is less affected by the charge injection, thereby greatly weakening the impact of the charge injection, so that the threshold voltage V captured by the first node N1 is less. thpIt is closer to reality, and the threshold values ​​captured by the pixel driving circuits at each position are consistent, which more perfectly realizes the function of threshold voltage compensation. In this embodiment, the second scanning signal SCAN2 is used to simultaneously control the on and off of the data input module 14 and the threshold compensation module 12. Although the first node N1 and the third node N3 undergo voltage jumps, their voltage jumps occur simultaneously, so that the injected charge is dispersed. In the related art, because the data input module 14 and the threshold compensation module 12 are controlled by different scanning signals and have different timings, the first node N1 and the third node N3 undergo voltage jumps in a time-sharing manner. At each voltage jump, charge injection occurs only on one side of the second capacitor C2. At this time, the first node N1 will superimpose the charge injections generated by the two jumps, so that the potential of the first node N1 is greatly affected, which ultimately affects the threshold voltage V thp Capture accuracy. For example, when the voltage at the control end of the threshold compensation module 12 jumps to ΔV1, the voltage at the first node N1 jumps to ΔV1; thereafter, when the voltage at the control end of the data input module 14 jumps to ΔV2, the voltage at the first node N1 jumps to ΔV2 again. After two charge injections, the voltage change value of the first node N1 is (ΔV1+ΔV2). That is, in the related art, the voltage at the control end of the data input module 14 and the threshold compensation module 12 jumps in sequence, which will cause the first node N1 to superimpose the two charge injection processes. In the embodiment of the present application, the voltage at the control end of the data input module 14 and the threshold compensation module 12 jumps at the same time, which will disperse the single charge injection process of the first node N1. Compared with the related art, the pixel driving circuit of this embodiment weakens the impact of charge injection. Even if the charge injection amounts of the near-end pixel driving circuit and the far-end pixel driving circuit are different, the difference in the first node N1 will not be too large, thereby reducing the difference in the light-emitting current of the near-end pixel driving circuit and the far-end pixel driving circuit. In summary, the pixel driving circuit in the embodiment of the present application has higher display uniformity, effectively prevents the pixel driving circuit from generating random offset noise, and improves the image display quality.

[0038] In addition, in this embodiment, the pixel driving circuit also includes a reset module 13, which is connected to the first end of the light-emitting element D1 and can transmit the reset voltage VRST to the first end of the light-emitting element D1. In addition, by controlling the conduction and closing of modules such as the threshold compensation module 12, the second node N2 and the first node N1 can be reset through the reset module 13 to prevent the first node N1 from having residual voltage in the previous display cycle, which affects the brightness display of the light-emitting element D1 in this cycle.

[0039] Optionally, the pixel driving circuit may further include a light-emitting control module 15 disposed between the second terminal of the driving module 11 and the first terminal of the light-emitting element D1. The light-emitting control module 15 can connect the second terminal of the driving module 11 and the first terminal of the light-emitting element D1, thereby controlling the light-emitting element D1 to emit light. Furthermore, when the reset module 13 resets the pixel driving circuit, the light-emitting control module 15 can be turned on, and the threshold compensation module 12 can also be turned on, so that the reset voltage VRST is transmitted to the second terminal of the driving module 11 and the control terminal of the driving module 11.

[0040] On the basis of the above embodiment, optionally, each module in the pixel driving circuit is turned on at a low level as an example for illustration, and the working process of the pixel driving circuit at least includes the following contents: in the initialization stage, the reset module 13 is configured to provide a reset voltage VRST to the first end of the light-emitting element D1 to reset the anode of the light-emitting element D1; the light-emitting control module 15 is configured to be in a conducting state under the control of the light-emitting control signal EMIT to transmit the reset voltage VRST to the second node N2 to reset the second end of the driving module 11; the threshold compensation module 12 is configured to provide the reset voltage V RST is transmitted to the first node N1 to reset the second end of the first capacitor C1, the second end of the second capacitor C2, and the control end of the driving module 11. At this time, the driving module 11 is in the on state, and the bias state of the driving module 11 is changed back to the initial state from the previous driving cycle to prevent the hysteresis effect of the driving module 11 from affecting the subsequent working state of the driving module 11. The data input module 14 is configured to transmit the reference voltage Vofs to the first end of the second capacitor C2. The potentials of the first node N1 and the second node N2 are the reset voltage VRST, and the voltage of the third node N3 is the reference voltage Vofs.

[0041] In the threshold compensation stage, the reset module 13 and the light control module 15 are turned off. At this time, a path is formed between the first power supply PVDD and the first node N1, so that the current signal is sequentially charged from the first power supply PVDD through the driving module 11 and the threshold compensation module 12 to the first node N1. At the beginning of charging, the potential of the first node N1 is low, the driving module 11 is turned on, and the potential of the second node N2 is raised. The threshold compensation module 12 is set to be turned on under the control of the second scan signal SCAN2 and gradually increase the potential of the first node N1. As the potential of the first node N1 increases, the conduction current of the driving module 11 gradually decreases until the difference between the voltage of the first node N1 and the voltage of the second node N2 is the threshold voltage V of the driving module 11. thp At this time, the driving module 11 is turned off, and the potential Un1 of the first node N1 and the potential Un2 of the second node N2 are Un1 = Un2 = PVDD-V thp, which is the critical point at which the driving module 11 is turned off. Thus, at the end of the threshold compensation phase, the potential of the first node N1 is related to the threshold voltage of the driving module 11, and the threshold compensation module 12 compensates the threshold voltage of the driving module 11 to the first node N1; the data input module 14 continues to transmit the reference voltage Vofs to the first end of the second capacitor C2, so that the potential Un1 of the first node N1 will not be coupled to the third node N3, and the potential Un3 of the third node N3 = V ofs Thus, at the end of the threshold compensation stage T2, the voltage difference across the second capacitor C2 becomes Un1-Vofs. It should be noted that at the end of the threshold compensation stage, the second scan signal SCAN2 suddenly changes from a low level to a high level, and the voltage jumps to ΔV1. The voltage jumps at the first node N1, the second node N2, and the third node N3 occur simultaneously. Where C1 is the capacitance of the first capacitor; C2 is the capacitance of the second capacitor; Cot is the total capacitance of the capacitor network seen by the first node N1 and the third node N3 excluding C1 and C2; Un3 = V ofs +ΔV1; In the related art, when the voltage jumps ΔV1 and ΔV2 occur in the first node N1 and the third node N3 respectively, Un1′=Un2′=PVDD-V thp +ΔV+ΔV2; Comparing Un1′ in the related art with Un1 in this embodiment, it can be found that in this embodiment, the first node N1 is less affected by the charge injection, making its capture threshold voltage closer to V thp The data input module 14 stops writing the reference voltage Vofs to the first terminal of the second capacitor C2. In this embodiment, the threshold voltage captured by both the near-end pixel driving circuit and the far-end pixel driving circuit during the threshold compensation phase is less affected by charge injection. Therefore, regardless of whether the charge injection amount differs between the near-end pixel driving circuit and the far-end pixel driving circuit, the final light-emitting current of the light-emitting element is not significantly different, resulting in a more uniform display. Furthermore, during the threshold compensation phase, the reset module 13 can be turned on to reset the first terminal of the light-emitting element D1, or it can be turned off. In this embodiment, the reset module 13 can include a process of switching from an on state to an off state.

[0042] In the data writing phase, the data input module 14 writes the data signal Vdata to the first end of the second capacitor C2, so that the potential Un3 of the second end of the second capacitor C2, that is, the third node N3, is equal to V data, that is, the potential of the second end of the second capacitor C2 changes by (Vdata-Vofs); at the same time, due to the coupling effect of the second capacitor C2, the potential of the first node N1 electrically connected to the second end of the second capacitor C2 will change accordingly; since the first node N1 is also electrically connected to the first capacitor C1, the potential change of the first node N1 is related to the voltage divided by the first capacitor C1 on the first node N1, so the potential of the first node N1 Thus, even though the data signal Vdata written to the third node N3 by the data write module 11 is a relatively large voltage signal, the signal coupled to the first node N1 is positively correlated with the ratio of the capacitance value of the first capacitor C1 to the sum of the capacitance values ​​of the two capacitors (the first capacitor C1 and the second capacitor C2), so that the first capacitor C1 and the second capacitor C2 play a certain voltage-dividing role. Compared with the data signal Vdata written to the third node N3, the voltage change of the first node N1 is smaller, thereby being able to place the data signal Vdata within a wider range to correspond one-to-one with each grayscale from 0 to 255. Consequently, at the end of the data write stage, the potential of the first node N1 can also correspond one-to-one with each grayscale from 0 to 255. Subsequently, the data write module 11 stops outputting the data signal Vdata under the control of the first scan signal SCAN1. The first scan signal SCAN1 changes from a low level to a high level, and the voltage jumps to ΔV2. Un3=V data +ΔV2; in the data writing phase, the driving module 11, the light control module 15, the reset module 13 and the threshold compensation module 12 are all turned off;

[0043] In the light-emitting stage, the data input module 14, the reset module 13 and the threshold compensation module 12 are all turned off, and the light-emitting control module 15 is in the on state under the control of the light-emitting control signal EMIT, so that the driving current Id generated by the driving module 11 according to the potential of the first node N1 is transmitted to the light-emitting element D1, driving the light-emitting element D1 to emit light. Then the light-emitting current of the light-emitting element in this embodiment is Wherein, μ is the carrier mobility of PMOS tube; C OX is the oxide layer capacitance per unit area; is the width-to-length ratio of the PMOS tube; |V thp | is the threshold voltage of the PMOS tube; V DS is the voltage difference between the source and drain of the PMOS tube; m is the mobility; V T is the absolute temperature coefficient.

[0044] Optionally, the operation process of the pixel driving circuit may further include a pre-stabilization phase; the pre-stabilization phase may be provided after the data writing phase and before the light-emitting phase. Exemplarily, during the pre-stabilization phase, the data input module 14 is turned off, the driving module 11, the light-emitting control module 15, and the reset module 13 are turned on, and a path is formed between the first power supply PVDD terminal and the reset voltage VRST terminal. Following the data input phase, the pre-stabilization phase stabilizes the voltages of the first node N1 and the second node N2, providing a stable potential for the control terminal of the driving module 11 to stably drive the light-emitting element D1, improve the light-emitting uniformity of the light-emitting element D1, and reduce the offset noise (random offset) of the pixel driving current.

[0045] FIG2 is a schematic diagram of the structure of another pixel driving circuit provided in an embodiment of the present application, and FIG3 is a timing diagram of the operation of the pixel driving circuit in FIG2 . As shown in FIG3 , the operation timing of the pixel driving circuit includes, in sequence: an initialization phase T1, a threshold compensation phase T2, a data writing phase T3, a pre-stabilization phase T4, and a light-emitting phase T5. Optionally, the data input module 14 may include: a first input unit 141 and a second input unit 142; the first input unit 141 is configured to connect the data signal Vdata to the first end of the second capacitor C2 under the control of the first scan signal SCAN1; the second input unit 142 is configured to connect the reference voltage Vofs and the first end of the second capacitor C2 under the control of the second scan signal SCAN2. The data input module 14 may include two parts: the first input unit 141 and the second input unit 142; the second input unit 142 is configured to transmit the reference voltage Vofs to the first end of the second capacitor C2 during the initialization phase T1 and the threshold compensation phase T2; and the first input unit 141 is configured to transmit the data signal Vdata to the first end of the second capacitor C2 during the data writing phase T3. It should be noted that, as shown in FIG3 , the enable levels of the first scan signal SCAN1 and the second scan signal SCAN2 do not overlap, so the first input unit 141 and the second input unit 142 operate in a time-sharing manner to prevent the data signal Vdata and the reference voltage Vofs from being simultaneously transmitted to the first end of the second capacitor C2. It should be noted that in the embodiment shown in FIG3 , the low level of the first scan signal SCAN1 and the second scan signal SCAN2 is the enable level, and the high level is the disable level, but the present application is not limited to this.

[0046] Optionally, the first input unit 141 may include a first transistor M1; the second input unit 142 includes a second transistor M2; the first end of the first transistor M1 is connected to the data signal Vdata; the second end of the first transistor M1 is connected to the first end of the second capacitor C2; the control end of the first transistor M1 is connected to the first scan signal SCAN1; the first end of the second transistor M2 is connected to the reference voltage Vofs; the second end of the second transistor M2 is connected to the first end of the second capacitor C2; and the control end of the second transistor M2 is connected to the second scan signal SCAN2.

[0047] Continuing with FIG2 , the light control module 15 may optionally include: a third transistor M3; a control terminal of the third transistor M3 connected to the light control signal EMIT; a first terminal of the third transistor M3 connected to the second terminal of the driver module 11; and a second terminal of the third transistor M3 connected to the first terminal of the light-emitting element D1. The third transistor M3 is configured to connect the driver module 11 and the light-emitting element D1. During the initialization phase, the driver module 11, the third transistor M3, and the reset module 13 are all turned on, and the third transistor M3 transmits the reset voltage VRST to the second node N2, thereby resetting the control terminal and the second terminal of the driver module 11. During the pre-stabilization phase, the current flowing through the driver module 11 and the third transistor M3 forms a conductive path between the first power supply PVDD and the reset voltage VRST, stabilizing the potentials of the control terminal and the second terminal of the driver module 11 to a voltage that can reach the corresponding grayscale current of the light-emitting element D1. During the light-emitting phase, the current flowing through the third transistor M3 forms a conductive path between the first power supply PVDD, the light-emitting element D1, and the second power supply PVEE, forming the corresponding grayscale current of the light-emitting element D1.

[0048] FIG4 is a schematic diagram of the structure of another pixel driving circuit provided by an embodiment of the present application. The operating timing of the pixel driving circuit in FIG4 is the operating timing of FIG3. Optionally, the pixel driving circuit may further include: a negative feedback module 16; a first terminal of the negative feedback module 16 is connected to the first power supply PVDD; a second terminal of the negative feedback module 16 is connected to the first terminal of the driving module 11; and a control terminal of the negative feedback module 16 is connected to the second terminal of the negative feedback module 16. During the light-emitting stage, as the grayscale changes, the resistance of the cathode (outputting the second power supply PVEE) is large and uneven, which causes the second power supply PVEE of the pixel driving circuit to fluctuate at different positions. The fluctuation of the second power supply PVEE will cause the voltage of the second node N2 to fluctuate. In addition, during the display process, there are many factors that can cause the voltage of the second node N2 to fluctuate. Here, the fluctuation of the second power supply PVEE causing the voltage of the second node N2 to fluctuate is used as an example. It is known that the transistor of the driving module 11 in the display bread operates in the subthreshold region. Therefore, when the source-drain voltage difference of the transistor (the voltage difference between the first section and the second terminal of the driving module 11) fluctuates, the light-emitting current will be affected and fluctuate, resulting in changes in display brightness and poor display uniformity. In this embodiment, a negative feedback module 16 is added to the pixel driving circuit. The negative feedback module 16 is configured to effectively suppress fluctuations in the light-emitting current when the voltage at the second node N2 fluctuates, and pull the light-emitting current back to the grayscale current corresponding to the light-emitting element D1, thereby improving display uniformity and reducing the offset noise (random offset) of the pixel driving current.

[0049] For example, referring to FIG4 , the negative feedback module 16 may optionally include: a fourth transistor M4; a first terminal of the fourth transistor M4 connected to the first power supply PVDD; a second terminal of the fourth transistor M4 connected to the first terminal of the driving module 11; and a control terminal of the fourth transistor M4 connected to the second terminal of the fourth transistor M4. The fourth transistor M4 is added to the pixel circuit, so when the second power supply PVEE increases, the voltage of the second node N2 increases accordingly, so the light-emitting current I of the light-emitting element D1 increases. OLED decreases, and when the light emitting current I OLED When the voltage V NF The voltage V between the control terminal and the first terminal of the driving module 11 will also increase. GS increases, the luminous current generated by the driving module 11 increases, so the offset luminous current I OLED Pull back to the original value, so that the light emitting element D1 returns to the same brightness; and when the second power supply PVEE drops, the voltage of the second node N2 decreases accordingly, so the light emitting current I OLED Increases, and when the light-emitting current I OLEDWhen the voltage of the fourth node NF increases, the fourth transistor M4 adjusts to the current at this time, and the voltage V NF The voltage difference V between the control terminal and the first terminal of the driving module 11 will also decrease. GS decreases, the luminous current it generates decreases, so the luminous current I OLED Pull back to the original value, so that the light emitting element D1 returns to the same brightness. In summary, the fourth transistor M4 can effectively suppress the difference in light emitting current caused by node voltage fluctuation, thereby improving display uniformity.

[0050] 2 and 4 , optionally, the driving module 11 may include a fifth transistor M5; the threshold compensation module 12 includes a sixth transistor M6; the reset module 13 includes a seventh transistor M7; the control terminal of the fifth transistor M5 is respectively connected to the second terminal of the first capacitor C1 and the first terminal of the second capacitor C2; the first terminal of the fifth transistor M5 is configured to input a signal output by the first power supply PVDD; the second terminal of the fifth transistor M5 is electrically connected to the first terminal of the light-emitting element D1; the control terminal of the sixth transistor M6 is connected to the second scan signal SCAN2; the first terminal of the sixth transistor M6 is connected to the control terminal of the fifth transistor M5; the second terminal of the sixth transistor M6 is connected to the second terminal of the fifth transistor M5; the first terminal of the seventh transistor M7 is connected to the first terminal of the light-emitting element D1; the second terminal of the seventh transistor M7 is connected to the reset voltage VRST; and the control terminal of the seventh transistor M7 is connected to the reset control signal VINI. The pixel driving circuit of this embodiment forms a 7T2C current driven pixel circuit, which can weaken the influence of charge injection and reduce random offset noise. The added negative feedback module 16 suppresses the change of light-emitting current caused by node voltage fluctuation, effectively improving the pixel driving circuit and effectively improving display uniformity.

[0051] 3 and 4 , optionally, the pixel driving circuit may further include: a light emitting control module 15 and a negative feedback module 16; the light emitting control module 15 includes a third transistor M3; the third transistor M3 is configured to connect the second end of the fifth transistor M5 and the first end of the light emitting element D1; the negative feedback module 16 includes a fourth transistor M4; the fourth transistor M4 is connected to the first power supply PVDD and the first end of the fifth transistor M5; the control end of the fourth transistor M4 is connected to the first end of the fifth transistor M5; the control end of the third transistor M3 is connected to the light emitting control signal; the control end of the seventh transistor M7 is connected to the reset control signal; the first scan signal SCAN1, the second scan signal SCAN2, the light emitting control signal EMIT and the reset control signal VINI are configured to implement the following driving: in the initialization phase T1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 are turned on; the first transistor M1 is turned off; in the threshold compensation stage T2, the second transistor M2, the fourth transistor M4, the fifth transistor M5 and the sixth transistor M6 are turned on; the first transistor M1, the seventh transistor M7 and the third transistor M3 are turned off; in the data writing stage T3, the first transistor M1 is turned on; the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 are turned off; in the pre-stabilization stage T4, the third transistor M3, the fourth transistor M4, the fifth transistor M5 and the seventh transistor M7 are turned on; the first transistor M1, the second transistor M2 and the sixth transistor M6 are turned off; in the light-emitting stage T5, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are turned on; the first transistor M1, the second transistor M2, the sixth transistor M6 and the seventh transistor M7 are turned off; the on-current of the third transistor M3 in the initialization stage is less than the on-current of the third transistor M3 in the pre-stabilization stage and the light-emitting stage.

[0052] The following is a detailed description of the operation of the pixel driving circuit using the embodiment shown in FIG4. As shown in FIG3 and FIG4, in this embodiment, for the first scanning signal SCAN1, the second scanning signal SCAN2, the light emitting control signal EMIT, and the reset control signal VINI, a low level is used as the enable level and a high level is used as the disable level, as shown below:

[0053] In the initialization phase T1, the second scan signal SCAN2 and the reset control signal VINI are at a low level, the first scan signal SCAN1 is at a high level, and the light-emitting control signal EMIT is at a BIAS potential. It should be noted that the BIAS potential enables the third transistor M3 to be turned on, but its conduction current is small, so that the third transistor M3 has a smaller power consumption, which is beneficial to the low power consumption requirements of the display panel. In this embodiment, the third transistor M3 at this time can be referred to as the first conduction state. In this embodiment, the third transistor M3 at this time can be referred to as the first conduction state. Optionally, the first conduction state controlled by the BIAS potential is the working state of the third transistor M3 operating in the linear region; the third transistor M3 is the working state of the saturation region under the control of the enable level. In the initialization phase T1. At this time, the second transistor M2, the third transistor M3, the fifth transistor M5, the fourth transistor M4, the sixth transistor M6, and the seventh transistor M7 are turned on, and the reset current flows from the first power supply PVDD to the reset signal VRST. The voltage of the third node N3 is the reference voltage V ofs , the first node N1 and the second node N2 are at a lower potential, which is the potential of the reset voltage VRST.

[0054] In the threshold compensation stage T2, the second scan signal SCAN2 and the reset control signal VINI are at a low level, the first scan signal SCAN1 and the light emitting control signal EMIT are at a high level, and the second transistor M2, the fourth transistor M4, the fifth transistor M5 and the sixth transistor M6 are turned on, and the potential Un3 of the third node N3 is the reference potential V ofs , the potential Un1 of the first node N1 and the potential Un2 of the second node N2 are Un1=Un2=V NF1 -V thp , where V NF1 is the voltage value of the fourth node NF. When the second scan signal SCAN2 changes from low level to high level, charge injection is injected into the first node N1, the second node N2 and the third node N3. Therefore, when the second scan signal SCAN2 ends its low level, the potential of each node is Un3 = V ofs +ΔV1, Where C1 is the capacitance of the first capacitor; C2 is the capacitance of the second capacitor; ΔV1 is the difference between the high and low levels of the second scan signal SCAN2; and Cot is the total capacitance of the capacitor network between the first node N1 and the third node N3, excluding C1 and C2 (including at least the first parasitic capacitor Cgd1, the second parasitic capacitor Cgs2, and the third parasitic capacitor Cgd2). It can be seen that although additional charge is still injected into the first node N1, the simultaneous voltage changes at the first node N1 and the third node N3 greatly reduce the effect of the charge injection, making the threshold voltage captured by the pixel driver circuit closer to the actual value V thp , and the threshold voltage captured by the pixel driving circuit at each position is consistent, which more perfectly realizes the function of threshold voltage compensation; in the data input stage T3, the first scan signal SCAN1 is low, the second scan signal SCAN2, the reset control signal VINI and the light control signal EMIT are high, at this time the voltage of the data signal V data is written into the third node N3, so Un3 = V data , When the first scan signal SCAN1 changes from a low level to a high level, charge injection is injected into the first node N1. Therefore, when the first scan signal SCAN1 ends its low level, the potential of the first node N1 is as follows:

[0055] Wherein, ΔV2 is the difference between the high level and the low level of the first scan signal SCAN1;

[0056] In the pre-stabilization stage T4, the reset control signal VINI and the light-emitting control signal EMIT are at a low level, the first scan signal SCAN1 and the second scan signal SCAN2 are at a high level, and the third transistor M3 is turned on. At this time, the current value of the third transistor M3 is higher than its current value in the first conduction state, so that the fifth transistor M5 can quickly charge the first end of the light-emitting element to prevent the light-emitting element from having color deviation due to insufficient charging. At this time, the conduction state of the third transistor M3 is the second conduction state. Optionally, the second conduction state is the working state of the third transistor M3 operating in the saturation region. At this time, the fourth transistor M4, the fifth transistor M5, the third transistor M3 and the seventh transistor M7 are turned on, and the light-emitting current flows from the first voltage PVDD terminal to the reset voltage VRST terminal. At this time, the first node N1 and the second node N2 are stabilized to a voltage corresponding to the grayscale current; in the light-emitting stage T5, the light-emitting control signal EMIT is at a low level, the first scan signal SCAN1, the second scan signal SCAN2 and the reset control signal VINI are at a high level, and the seventh transistor M7 is turned off. The fourth transistor M4, the fifth transistor M5 and the third transistor M3 are turned on, and the third transistor M3 continues to maintain the second conduction state. The grayscale current flows from the first power supply PVDD terminal through the light-emitting element D1 to the second power supply PVEE terminal. The grayscale current is:

[0057] Wherein, μ is the carrier mobility of PMOS tube; C OX is the oxide layer capacitance per unit area; is the width-to-length ratio of the PMOS tube; |V thp | is the threshold voltage of the PMOS tube; V DS is the voltage difference between the source and drain of the PMOS tube; m is the mobility; V T is the absolute temperature coefficient.

[0058] As can be seen from formula (2), the pixel driving circuit weakens the effect of charge injection, thereby reducing the difference in luminous current between the near-end pixel driving circuit and the far-end pixel driving circuit, so that the display panel has higher display uniformity and can weaken the effect of power supply voltage drop (IR drop) on display uniformity.

[0059] In order to demonstrate the beneficial effects of the pixel driving circuit of the embodiment of the present application, the present embodiment provides a solution that does not process charge injection. As a comparative example of the embodiment of the present application, as shown in Figures 5 and 6, Figure 5 is a structural schematic diagram of a comparative example of a pixel driving circuit provided by the embodiment of the present application, and Figure 6 is a working timing diagram of the pixel driving circuit in Figure 5. Figure 5 is a pixel driving circuit including transistors M1′, M2′, M3′, M4′ and MD′, and a first capacitor C1′ and a second capacitor C2′. The pixel driving circuit is controlled by scan signals SCAN1′, SCAN2′ and a light-emitting control signal EMIT′, and includes nodes N1′, N2′ and N3′ as shown in Figure 5, and an initialization phase T1′, a threshold compensation phase T2′, a data writing phase T3′ and a light-emitting phase T4′ as shown in Figure 6. The working process of the comparative example in Figure 5 is as follows:

[0060] ELVDD is the positive voltage of the pixel driver circuit, ELVEE is the negative voltage for the pixel driver circuit to operate, the scan signal SCAN1′ controls the writing of the data voltage DATA, the scan signal SCAN2′ controls the reset and threshold compensation of the light-emitting element, and the light-emitting control signal EMIT′ controls the light-emitting element to emit light. During the period when EMIT′ is BIAS′, the scan signals SCAN1′ and SCAN2′ are low, transistors M1′, M2′, and M3′ are simultaneously turned on, the reference voltage Vofs is written to the N3′ node, the reset voltage VRST′ is written to the anode of the light-emitting element, and the N1′, N2′, and N3′ nodes obtain the initial potential. At the same time, the reset voltage VINI′ is written to the anode of the light-emitting element through transistor M3′. When the scan signals SCAN1′ and SCAN2′ are simultaneously high and the light-emitting control signal EMIT′ is low, the light-emitting element begins to emit light, and its current formula is:

[0061] Formula (3) shows that the pixel circuit realizes the relationship between the luminous current and the threshold voltage V of the transistor MD. thp The luminous current is independent of the power supply voltage ELVDD. However, as display resolution increases, pixel pitch decreases, and the capacitance of capacitors (C1, C2) decreases. When the scan signal switches from low to high, the effect of charge injection becomes increasingly significant, resulting in a more pronounced difference between the far and near pixels, which in turn leads to poor display uniformity.

[0062] When the threshold compensation is completed, the voltages at the nodes N1′ and N2′ are Un1′=Un2′=ELVDD-V thpAt this time, the scan signal SCAN2′ changes from low level to high level, and the potential changes by ΔV1. The final potential of nodes N1′ and N2′ due to the influence of charge injection is: Un1′=ELVDD-V thp +ΔV1, as shown in Figure 6, the threshold compensation stage occurs during the transition of the scan signal SCAN2′. However, due to the influence of charge injection, the captured threshold value becomes inaccurate, and the charge injection amount at different locations is different, resulting in different threshold voltages. At this time, the threshold compensation function is not accurate enough and the uniformity deteriorates. When the data writing stage ends, At this time, the scan signal SCAN1′ changes from low level to high level, and the potential changes by ΔV2. Due to the influence of charge injection, the final potential of node N1′ is:

[0063] Therefore, the final luminous current is:

[0064] Formula (5) shows that the final luminous current is related to charge injection. For the same row of pixels, the charge injection at the near and far ends is different, that is, the near-end charge injection is ΔV1_1, and the far-end charge injection is ΔV1_2. ΔV1_2<ΔV1_1, so the luminous current at the near and far ends is different. Charge injection also increases the difference in random offset noise, which ultimately exacerbates display non-uniformity.

[0065] By comparing formula (2) with formula (5), it can be seen that the pixel driving circuit in this embodiment weakens the effect of charge injection, thereby reducing the difference in luminous current between the near-end circuit and the far-end circuit, and improving the uniformity of the display panel.

[0066] Based on the same concept, an embodiment of the present application also provides a driving method for a pixel driving circuit. Applicable to the pixel driving circuit provided in any embodiment of the present application, the pixel driving circuit further includes a light emitting control module; the light emitting control module is disposed between the second end of the driving module and the first end of the light emitting element; FIG7 is a flow chart of a driving method for a pixel driving circuit provided in an embodiment of the present application. As shown in FIG7, the driving method for the pixel driving circuit of this embodiment includes the following steps:

[0067] Step S101, in the initialization stage, the reset module transmits the reset voltage to the first end of the light-emitting element; the light-emitting control module is in the first conduction state under the control of the light-emitting control signal, and is configured to transmit the reset voltage to the second end of the driving module; the threshold compensation module transmits the reset voltage to the control end of the driving module; the data writing module transmits the reference voltage to the first end of the second capacitor under the control of the second scanning signal.

[0068] Step S102 , in the threshold compensation stage, the threshold compensation module compensates the threshold voltage of the driving module to the control terminal of the driving module; the data writing module continues to transmit the reference voltage to the first terminal of the second capacitor under the control of the second scanning signal.

[0069] Step S103 : In the data writing phase, the data writing module transmits the data signal to the first end of the second capacitor under the control of the first scanning signal.

[0070] Step S104: In the pre-stabilization stage, the light control module is in the second conduction state under the control of the light control signal; the reset module is turned on under the control of the reset control signal; and a path is established between the first power supply and the reset voltage.

[0071] Step S105 : In the light-emitting stage, the light-emitting control module is in the second conduction state under the control of the light-emitting control signal, so that the driving module generates a driving current and transmits it to the light-emitting element.

[0072] The conduction current of the light emitting control module in the first conduction state is smaller than the conduction current of the light emitting control module in the second conduction state.

[0073] In an embodiment of the present application, a driver module of a pixel driver circuit is connected to a first power source and configured to provide a light-emitting drive signal to a light-emitting element. A threshold compensation module is configured to perform threshold compensation on a control terminal of the driver module. A first capacitor is connected between the control terminal and the first terminal of the driver module. A data input module is connected to the control terminal of the driver module via a second capacitor and outputs a data signal to the second capacitor under the control of a first scan signal and outputs a reference voltage to the second capacitor under the control of a second scan signal. The threshold compensation module is connected to the control terminal and the second terminal of the driver module under the control of a second scan signal. In this embodiment, the data input module and the threshold compensation module are simultaneously controlled by the second scan signal, so that the control terminals of the data input module and the threshold compensation module undergo voltage jumps simultaneously, and charge is injected simultaneously at both ends of the second capacitor, so that the threshold compensation of the control terminal of the driver module is less affected by the charge injection, so that the threshold voltage captured by the control terminal of the driver module is closer to the threshold voltage of the driver module itself. Therefore, whether it is a near-end pixel driver circuit or a far-end pixel driver circuit, the threshold voltage captured by the control terminal tends to be consistent, ensuring that the brightness difference of the light-emitting elements at the far and near ends of the display panel is small and the display panel displays uniformly. In addition, the captured threshold voltage in this embodiment is closer to the actual threshold voltage of the driving module, thereby achieving a more complete threshold compensation function, improving the brightness display accuracy, and improving the quality of the picture display.

[0074] The present application also provides a display panel. Figure 8 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application. As shown in Figure 8, the display panel 1 provided in an embodiment of the present application includes the pixel driving circuit 200 described in any embodiment of the present application. The display panel can be a display panel for an electronic device such as a smart wearable device for virtual reality, augmented reality, or mixed reality, and this embodiment does not specifically limit this.

[0075] In this embodiment, the display panel includes the technical features of the pixel driving circuit provided in any embodiment of the present application, and has the beneficial effects of the corresponding technical features, which will not be repeated here.

Claims

1. A pixel driving circuit, comprising: A driving module, a threshold compensation module, a reset module, a data input module, a first capacitor, and a second capacitor; A first end of the driving module is configured to input a signal output by a first power supply; a second end of the driving module is configured to provide a light-emitting driving signal for a light-emitting element; the threshold compensation module is configured to connect a control end of the driving module and the second end of the driving module under the control of a second scanning signal; a first end of the first capacitor is connected to the first power supply; a second end of the first capacitor is connected to the control end of the driving module; The data input module is connected to a first end of the second capacitor; a second end of the second capacitor is connected to the control end of the driving module; the data input module is respectively connected to a data signal and a reference voltage, and is configured to output the data signal to the first end of the second capacitor under the control of a first scanning signal, or output the reference voltage to the first end of the second capacitor under the control of a second scanning signal; The reset module is connected to a first end of the light-emitting element, and is configured to output a reset voltage to the first end of the light-emitting element, the second end of the driving module, and the control end of the driving module.

2. The pixel driving circuit according to claim 1, wherein, The data input module includes: a first input unit and a second input unit; The first input unit is configured to connect the data signal and the first end of the second capacitor under the control of the first scanning signal; The second input unit is configured to connect the reference voltage and the first end of the second capacitor under the control of the second scanning signal.

3. The pixel driving circuit according to claim 2, wherein, The first input unit includes a first transistor; the second input unit includes a second transistor; A first end of the first transistor is connected to the data signal; a second end of the first transistor is connected to the first end of the second capacitor; a control end of the first transistor is connected to the first scanning signal; A first end of the second transistor is connected to the reference voltage; a second end of the second transistor is connected to the first end of the second capacitor; a control end of the second transistor is connected to the second scanning signal.

4. The pixel driving circuit according to claim 1 further includes: A light-emitting control module; The light-emitting control module is disposed between the second end of the driving module and the first end of the light-emitting element.

5. The pixel driving circuit according to claim 4, wherein, The light-emitting control module includes: a third transistor; A control end of the third transistor is connected to a light-emitting control signal; a first end of the third transistor is connected to the second end of the driving module; a second end of the third transistor is connected to the first end of the light-emitting element.

6. The pixel driving circuit according to claim 1 further includes: A negative feedback module; A first end of the negative feedback module is connected to the first power supply; a second end of the negative feedback module is connected to the first end of the driving module; A control end of the negative feedback module is connected to the second end of the negative feedback module.

7. The pixel driving circuit according to claim 6, wherein, The negative feedback module includes: a fourth transistor; A first end of the fourth transistor is connected to the first power supply; a second end of the fourth transistor is connected to the first end of the driving module; a control end of the fourth transistor is connected to the second end of the fourth transistor.

8. The pixel driving circuit according to claim 3, wherein, The driving module includes a fifth transistor; the threshold compensation module includes a sixth transistor; the reset module includes a seventh transistor; The control terminal of the fifth transistor is respectively connected to the second terminal of the first capacitor and the first terminal of the second capacitor; the first terminal of the fifth transistor is set to input the signal output by the first power supply; the second terminal of the fifth transistor is electrically connected to the first terminal of the light-emitting element; The control terminal of the sixth transistor is connected to the second scan signal; the first terminal of the sixth transistor is connected to the control terminal of the fifth transistor; the second terminal of the sixth transistor is connected to the second terminal of the fifth transistor; The first terminal of the seventh transistor is connected to the first terminal of the light-emitting element; the second terminal of the seventh transistor is connected to the reset voltage; the control terminal of the seventh transistor is connected to the reset control signal.

9. The pixel driving circuit according to claim 8 further includes: A light-emitting control module and a negative feedback module; The light-emitting control module includes a third transistor; the third transistor is set to be connected to the second terminal of the fifth transistor and the first terminal of the light-emitting element; the negative feedback module includes a fourth transistor; the fourth transistor is connected to the first power supply and the first terminal of the fifth transistor; the control terminal of the fourth transistor is connected to the first terminal of the fifth transistor; The control terminal of the third transistor is connected to the light-emitting control signal; the control terminal of the seventh transistor is connected to the reset control signal; The first scan signal, the second scan signal, the light-emitting control signal, and the reset control signal are configured to achieve the following driving: In the initialization stage, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are turned on; the first transistor is turned off; In the threshold compensation stage, the second transistor, the fourth transistor, the fifth transistor, and the sixth transistor are turned on; the first transistor, the seventh transistor, and the third transistor are turned off; In the data writing stage, the first transistor is turned on; the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are turned off; In the pre-stabilization stage, the third transistor, the fourth transistor, the fifth transistor, and the seventh transistor are turned on; the first transistor, the second transistor, and the sixth transistor are turned off; In the light-emitting stage, the third transistor, the fourth transistor, and the fifth transistor are turned on; the first transistor, the second transistor, the sixth transistor, and the seventh transistor are turned off; The conduction current of the third transistor in the initialization stage is less than the conduction currents of the third transistor in the pre-stabilization stage and the light-emitting stage.

10. A driving method for a pixel driving circuit, applicable to the pixel driving circuit according to any one of claims 1-3 or 6-9 above, the pixel driving circuit further including a light-emitting control module; the light-emitting control module is disposed between the second terminal of the driving module and the first terminal of the light-emitting element; The driving method for the pixel driving circuit includes: In the initialization stage, the reset module transmits the reset voltage to the first terminal of the light-emitting element; the light The control module is in the first conduction state under the control of the light-emitting control signal, and is set to transmit the reset voltage to the second end of the driving module; the threshold compensation module transmits the reset voltage to the control end of the driving module; the data input module transmits a reference voltage to the first end of the second capacitor under the control of the second scanning signal; In the threshold compensation stage, the threshold compensation module compensates the threshold voltage of the driving module to the control end of the driving module; the data input module continues to transmit the reference voltage to the first end of the second capacitor under the control of the second scanning signal; In the data writing stage, the data input module transmits a data signal to the first end of the second capacitor under the control of the first scanning signal; In the pre-stabilization stage, the light-emitting control module is in the second conduction state under the control of the light-emitting control signal; the reset module is turned on under the control of the reset control signal; a path is formed between the first power supply and the reset voltage; In the light-emitting stage, the light-emitting control module is in the second conduction state under the control of the light-emitting control signal, so that the driving module forms a driving current and transmits it to the light-emitting element; The conduction current of the light-emitting control module in the first conduction state is less than the conduction current of the light-emitting control module in the second conduction state.

11. A driving method for a pixel driving circuit, applicable to the pixel driving circuit according to any one of claims 4 or 5 above, The driving method of the pixel driving circuit includes: In the initialization stage, the reset module transmits a reset voltage to the first end of the light-emitting element; The light-emitting control module is in the first conduction state under the control of the light-emitting control signal, and is set to transmit the reset voltage to the second end of the driving module; The threshold compensation module transmits the reset voltage to the control end of the driving module; The data input module transmits a reference voltage to the first end of the second capacitor under the control of the second scanning signal; In the threshold compensation stage, the threshold compensation module compensates the threshold voltage of the driving module to the control end of the driving module; The data input module continues to transmit the reference voltage to the first end of the second capacitor under the control of the second scanning signal; In the data writing stage, the data input module transmits a data signal to the first end of the second capacitor under the control of the first scanning signal; In the pre-stabilization stage, the light-emitting control module is in the second conduction state under the control of the light-emitting control signal; the reset module is turned on under the control of the reset control signal; a path is formed between the first power supply and the reset voltage; In the light-emitting stage, the light-emitting control module is in the second conduction state under the control of the light-emitting control signal, so that the driving module forms a driving current and transmits it to the light-emitting element; The conduction current of the light-emitting control module in the first conduction state is less than the conduction current of the light-emitting control module in the second conduction state.

12. The driving method of the pixel driving circuit according to claim 10 or 11, wherein, In the threshold compensation stage, the reset module continuously transmits the reset voltage to the first end of the light-emitting element.

13. A display panel, including the pixel driving circuit according to any one of claims 1-9 above.

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