Array substrate and display panel

By providing part of the light shielding part on the source and drain of the array substrate, the light shielding structure is made in the projection of the active layer covering the projection of the active layer on the substrate layer, the problem of low opening rate caused by the large proportion of the light shielding structure is solved, and the opening rate is improved and the process is simplified, and the high-resolution display needs are met.

WO2025138885A1PCT designated stage expired Publication Date: 2025-07-03WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/112119
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-29
Filing Date
2024-08-14
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

The problem of low opening rate in the existing array substrates is that the light-shielding structure accounts for a large proportion of the area.

Method used

The first light shielding part and the second light shielding part are respectively arranged on the source and drain electrodes, so that the orthoprojection part on the substrate layer is located in the orthoprojection of the active layer, reducing the area proportion of the light shielding structure, and realizing the absorption and reflection cancellation of light through the multi-layer film layer stacking structure, simplifying the process.

Benefits of technology

It improves the overall opening rate of the array substrate, simplifies the process, reduces production costs, and meets the needs of high-resolution display.

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Abstract

Embodiments of the present application disclose an array substrate and a display panel. The array substrate comprises a substrate layer, an active layer, and a source-drain layer which are sequentially arranged. The source-drain layer comprises a source electrode and a drain electrode. The source electrode is electrically connected to one end of the active layer, and the drain electrode is electrically connected to the other end of the active layer. The source electrode comprises a first light-shielding part, the first light-shielding part is electrically connected to one end of the active layer, and the orthographic projection of the first light-shielding part on the substrate layer is at least partially located within the orthographic projection of the active layer on the substrate layer.
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Description

Array substrate and display panel

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 29, 2023, with application number 202311868280.3, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of display, and in particular to an array substrate and a display panel. Background Art

[0003] With the development of 5G communication technology and the advancement of VR (Virtual Reality) content and hardware, VR technology is experiencing rapid growth. However, VR technology requires very high screen resolution, resulting in a relatively small area for each luminous pixel. Due to its superior performance, BOA (Black Matrix On Array) technology is becoming the mainstream backplane technology for VR. However, existing BOA technology requires a separate shielding structure above the source electrode to provide light shielding. This requires the shielding structure to be larger than the corresponding source electrode, resulting in a larger area of ​​the shielding structure and a lower overall aperture ratio. SUMMARY OF THE INVENTION

[0004] The embodiments of the present application provide an array substrate and a display panel, which can solve the problem of low aperture ratio caused by the large area occupied by the light-shielding structure in the existing array substrate.

[0005] An embodiment of the present application provides an array substrate, comprising:

[0006] substrate layer;

[0007] an active layer, disposed on one side of the substrate layer;

[0008] a source-drain electrode layer, disposed on a side of the active layer away from the substrate layer, the source-drain electrode layer comprising a source electrode and a drain electrode, the source electrode being electrically connected to one end of the active layer, and the drain electrode being electrically connected to the other end of the active layer;

[0009] The source electrode includes a first light shielding portion electrically connected to one end of the active layer, and an orthographic projection of the first light shielding portion on the substrate layer is at least partially located within an orthographic projection of the active layer on the substrate layer.

[0010] Accordingly, an embodiment of the present application further provides a display panel, including an array substrate, wherein the array substrate includes:

[0011] substrate layer;

[0012] an active layer, disposed on one side of the substrate layer;

[0013] a source-drain electrode layer, disposed on a side of the active layer away from the substrate layer, the source-drain electrode layer comprising a source electrode and a drain electrode, the source electrode being electrically connected to one end of the active layer, and the drain electrode being electrically connected to the other end of the active layer;

[0014] The source electrode includes a first light shielding portion electrically connected to one end of the active layer, and an orthographic projection of the first light shielding portion on the substrate layer is at least partially located within an orthographic projection of the active layer on the substrate layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG1 is a schematic structural diagram of an array substrate provided in an embodiment of the present application;

[0016] FIG2 is a schematic structural diagram of another array substrate provided in an embodiment of the present application;

[0017] FIG3 is a schematic structural diagram of another array substrate provided in an embodiment of the present application;

[0018] FIG4 is a schematic structural diagram of another array substrate provided in an embodiment of the present application;

[0019] FIG5 is a schematic structural diagram of another array substrate provided in an embodiment of the present application;

[0020] FIG6 is a schematic structural diagram of another array substrate provided in an embodiment of the present application;

[0021] FIG7 is a structural flow chart of a source electrode manufacturing process provided in an embodiment of the present application;

[0022] FIG8 is a schematic structural diagram of a display panel provided in an embodiment of the present application.

[0023] Description of reference numerals:

[0024] 10. Display panel;

[0025] 100, array substrate; 110, substrate layer; 120, light shielding layer; 130, buffer layer; 140, active layer; 150, gate insulating layer; 160, gate layer; 170, interlayer dielectric layer; 180, source / drain electrode layer; 181, first conductive layer; 182, first insulating layer; 183, second conductive layer; 184, source electrode; 1841, first light shielding portion; 1841a, first sub-light shielding portion; 1841b, first insulating portion; 1841c, second Second sub-light shielding portion; 1842, first conductive portion; 185, drain; 1851, second light shielding portion; 1851a, third sub-light shielding portion; 1851b, second insulating portion; 1851c, fourth sub-light shielding portion; 1852, second conductive portion; 190, color resist layer; 200, second insulating layer; 210, third conductive layer; 211, pixel electrode; 220, third insulating layer; 230, fourth conductive layer; 231, common electrode; 240, photoresist layer;

[0026] 300, opposing substrate;

[0027] 400, liquid crystal layer. Modes for Carrying Out the Invention

[0028] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0029] The embodiments of the present application provide an array substrate and a display panel, which are described in detail below. It should be noted that the order of description of the following embodiments does not limit the preferred order of the embodiments.

[0030] As shown in Figures 1 to 6, the array substrate 100 includes a substrate layer 110. The substrate layer 110 serves as the base structure of the array substrate 100 and is used to support other structures in the array substrate 100 to ensure the structural stability of the array substrate 100. The substrate layer 110 can be a rigid or flexible substrate made of glass, quartz, plastic, or other materials, and is not particularly limited herein.

[0031] The array substrate 100 includes an active layer 140 and a source-drain layer 180. The active layer 140 is arranged on one side of the substrate layer 110, and the source-drain layer 180 is arranged on the side of the active layer 140 away from the substrate layer 110. The active layer 140 forms a channel region. The source-drain layer 180 includes a source 184 and a drain 185. The source 184 is electrically connected to one end of the channel region on the active layer 140, and the drain 185 is electrically connected to the other end of the channel region on the active layer 140. The conduction between the source 184 and the drain 185 can be achieved by controlling the conduction of the channel region on the active layer 140.

[0032] Among them, the source 184 includes a first light-shielding portion 1841, which is electrically connected to one end of the active layer 140, that is, the first light-shielding portion 1841 serves as a part of the source 184, and the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 is at least partially located within the orthographic projection of the active layer 140 on the substrate layer 110, that is, the first light-shielding portion 1841 can directly serve as the source 184 (as shown in Figures 2, 4 and 6) or as a light-shielding structure in the source 184 (as shown in Figures 1, 3 and 5) to reduce the reflection of light by the source 184.

[0033] It should be noted that in the traditional array substrate 100 structure, it is usually necessary to form a separate shading structure above the source 184 and the drain 185. Since the shading structure needs to block the source 184 and the drain 185 and is affected by the manufacturing process accuracy, the size of the shading structure needs to be made larger. Although this can achieve the shielding of the source 184 and the drain 185, it will result in a lower overall aperture ratio of the array substrate 100. The source 184 is typically shielded by a light shielding structure in the same direction as the data line, and the drain 185 is typically shielded by a light shielding structure in the same direction as the scan line. Relatively speaking, the size of the light shielding structure corresponding to the source 184 has a greater impact on the overall aperture ratio of the array substrate 100. Therefore, in this application, by making the first light shielding portion 1841 a part of the source 184 or directly using the first light shielding portion 1841 as the source 184, the size of the first light shielding portion 1841 can be closer to the size of the source 184 itself, thereby reducing the area occupied by the first light shielding portion 1841 and thereby improving the overall aperture ratio of the array substrate 100. In addition, since the first light shielding portion 1841 is a part of the source 184, compared to the traditional array substrate 100, there is no need to add an additional mask to produce the light shielding structure, which can also simplify the manufacturing process of the array substrate 100, improve production efficiency, and reduce production costs.

[0034] Optionally, in some embodiments of the present application, the source further includes a first conductive portion, the first conductive portion is located on the side of the first light-shielding portion facing the active layer, the first light-shielding portion is electrically connected to one end of the active layer through the first conductive portion, and the orthographic projection of the first light-shielding portion on the substrate layer covers the orthographic projection of the first conductive portion on the substrate layer.

[0035] Optionally, in some embodiments of the present application, the first light-shielding portion includes a first sub-light-shielding portion, a first insulating portion, and a second sub-light-shielding portion stacked in a direction away from the substrate layer, the first sub-light-shielding portion is electrically connected to one end of the active layer, and the second sub-light-shielding portion is electrically connected to the first sub-light-shielding portion.

[0036] Optionally, in some embodiments of the present application, the width of the portion of the first light-shielding portion extending from the side wall of the first conductive portion is less than or equal to 0.2 microns.

[0037] Optionally, in some embodiments of the present application, the source-drain electrode layer includes a first conductive layer, a first insulating layer, and a second conductive layer sequentially arranged in a direction away from the substrate layer, the first conductive layer includes the source electrode, and the second conductive layer includes the drain electrode; or,

[0038] The source electrode and the drain electrode are arranged in the same layer.

[0039] Optionally, in some embodiments of the present application, the drain includes a second light-shielding portion, the second light-shielding portion is electrically connected to the other end of the active layer, and the orthographic projection of the second light-shielding portion on the substrate layer is at least partially located within the orthographic projection of the active layer on the substrate layer.

[0040] Optionally, in some embodiments of the present application, the drain further includes a second conductive portion, the second conductive portion is located on the side of the second light-shielding portion facing the active layer, the second light-shielding portion is electrically connected to the other end of the active layer through the second conductive portion, and the orthographic projection of the second light-shielding portion on the substrate layer covers the orthographic projection of the second conductive portion on the substrate layer.

[0041] Optionally, in some embodiments of the present application, the second light-shielding portion includes a third sub-light-shielding portion, a second insulating portion, and a fourth sub-light-shielding portion stacked in a direction away from the substrate layer, and the third sub-light-shielding portion is electrically connected to one end of the active layer.

[0042] Optionally, in some embodiments of the present application, the array substrate further includes a color resist layer, a second insulating layer, a third conductive layer, a third insulating layer and a fourth conductive layer, which are sequentially arranged on the side of the source and drain layer away from the substrate layer, the third conductive layer includes a pixel electrode, and the pixel electrode is electrically connected to the drain, and the fourth conductive layer includes a common electrode, and the common electrode is arranged corresponding to the pixel electrode.

[0043] Specifically, a light-shielding layer 120 and a buffer layer 130 are sequentially arranged between the substrate layer 110 and the active layer 140, and a gate insulating layer 150, a gate layer 160 and an interlayer dielectric layer 170 are sequentially arranged between the active layer 140 and the source-drain layer 180. The gate layer 160 includes a gate, and the light-shielding layer 120, the active layer 140 and the gate are arranged correspondingly. The light-shielding layer 120 and the gate are used to block the active layer 140 to prevent light from irradiating the active layer 140 and causing structural changes in the active layer 140, thereby affecting the performance of the active layer 140.

[0044] In the embodiment of the present application, the array substrate 100 includes a substrate layer 110, an active layer 140 and a source-drain layer 180 arranged in sequence, the source-drain layer 180 includes a source 184 and a drain 185, the source 184 is electrically connected to one end of the active layer 140, and the drain 185 is electrically connected to the other end of the active layer 140, wherein the source 184 includes a first light-shielding portion 1841, the first light-shielding portion 1841 is electrically connected to one end of the active layer 140, and the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 is at least partially located within the orthographic projection of the active layer 140 on the substrate layer 110. In the present application, the first light-shielding portion 1841 is directly used as a part of the source 184, and the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 is at least partially located within the orthographic projection of the active layer 140 on the substrate layer 110. That is, whether the first light-shielding portion 1841 is directly used as the source 184 or the first light-shielding portion 1841 is used to block and reduce the reflection of light by the source 184, compared with the traditional method of forming a separate light-shielding structure above the source 184, the area occupied by the light-shielding structure can be reduced, thereby improving the overall aperture ratio of the array substrate 100.

[0045] Optionally, as shown in Figures 1, 3 and 5, the source 184 also includes a first conductive portion 1842, which is located on the side of the first light-shielding portion 1841 facing the active layer 140, and the first light-shielding portion 1841 is electrically connected to one end of the active layer 140 through the first conductive portion 1842, that is, the source 184 is composed of a stacked arrangement of the first conductive portion 1842 and the first light-shielding portion 1841. This arrangement allows the source 184 to reduce the reflection of light through the first light-shielding portion 1841 while being able to adopt a first conductive portion 1842 with better conductivity, i.e., higher conductivity, to be electrically connected to the active layer 140, thereby reducing the connection resistance between the source 184 as a whole and the active layer 140.

[0046] Among them, the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 covers the orthographic projection of the first conductive portion 1842 on the substrate layer 110, that is, in the thickness direction of the array substrate 100, the first light-shielding portion 1841 fully covers the first conductive portion 1842 to reduce the overall reflection of light by the source 184.

[0047] In some embodiments, the first light-shielding portion 1841 includes a first sub-light-shielding portion 1841a, a first insulating portion 1841b, and a second sub-light-shielding portion 1841c stacked in a direction away from the substrate layer 110. The first sub-light-shielding portion 1841a is electrically connected to one end of the active layer 140, and the second sub-light-shielding portion 1841c is electrically connected to the first sub-light-shielding portion 1841a. That is, the first light-shielding portion 1841 is formed of a three-layer stacked structure. The thickness of the second sub-light-shielding portion 1841c can be less than that of the first sub-light-shielding portion 1841a. That is, the second sub-light-shielding portion 1841c has a semi-transmissive and semi-reflective property, while the first sub-light-shielding portion 1841a mainly reflects light.

[0048] When external light strikes the second sub-light-shielding portion 1841c, the light that has passed through the second sub-light-shielding portion 1841c, after passing through the first insulating portion 1841b, is reflected from the surface of the first sub-light-shielding portion 1841a. Due to the optical path difference, the light reflected from the first sub-light-shielding portion 1841a is superimposed and offset by the light that has passed through the second sub-light-shielding portion 1841c, thereby enabling the first light-shielding portion 1841 to absorb the incident light, thereby reducing light reflection from the source electrode 184. In other words, when the first light-shielding portion 1841 is a stacked structure formed by the first sub-light-shielding portion 1841a, the first insulating portion 1841b, and the second sub-light-shielding portion 1841c, light absorption is achieved through the interaction of the two sub-light-shielding portions. In this case, the first sub-light-shielding portion 1841a and the second sub-light-shielding portion 1841c do not need to have anti-reflection properties themselves, thereby expanding the range of material options for the first light-shielding portion 1841.

[0049] It should be noted that, in the array substrate 100, since the source electrode 184 and the data line are arranged on the same layer and are electrically connected, the data line is electrically connected to the peripheral circuit, that is, the structures of the source electrode 184, the data line and the corresponding electrically connected peripheral circuit can be kept consistent. During the manufacturing process of the array substrate 100, a hole is opened on the first insulating portion 1841b between the first sub-light-shielding portion 1841a and the second sub-light-shielding portion 1841c corresponding to the peripheral circuit, and the corresponding first sub-light-shielding portion 1841a is electrically connected to the second sub-light-shielding portion 1841c, so that the first sub-light-shielding portion 1841a and the second sub-light-shielding portion 1841c corresponding to the source electrode 184 can be kept electrically connected without the need to design a hole on the first insulating portion 1841b corresponding to the source electrode 184.

[0050] Among them, the width of the part of the first light-shielding portion 1841 extending out from the side wall of the first conductive portion 1842 is less than or equal to 0.2 microns, that is, the setting method of the first light-shielding portion 1841 in the embodiment of the present application can keep the width difference between the first light-shielding portion 1841 and the first conductive portion 1842 at the edge position within 0.2 microns. When the difference is reduced to 0 microns, the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 and the orthographic projection of the first conductive portion 1842 on the substrate layer 110 can completely overlap, thereby minimizing the area share of the first light-shielding portion 1841 and improving the overall aperture ratio of the array substrate 100.

[0051] During the actual manufacturing process, the width of the portion of the first light-shielding portion 1841 extending from the side wall of the first conductive portion 1842 can be set to 0 microns, 0.05 microns, 0.1 microns, 0.15 microns or 0.2 microns, etc. The specific value can be designed and adjusted according to the actual process accuracy, and no special restrictions are imposed here.

[0052] Optionally, as shown in Figures 1 to 4, the source-drain layer 180 includes a first conductive layer 181, a first insulating layer 182, and a second conductive layer 183, sequentially arranged in a direction away from the substrate layer 110. The first conductive layer 181 includes a source electrode 184, and the second conductive layer 183 includes a drain electrode 185. That is, the source-drain layer 180 has a multi-layer film structure, and the source electrode 184 and the drain electrode 185 are not on the same layer and must be produced separately using two photomasks. For high-resolution display technology, the area corresponding to a light-emitting pixel is relatively small. Disposing the source electrode 184 and the drain electrode 185 on different layers can reduce the area occupied by the Harima transistor, thereby enabling the array substrate 100 in the embodiment of the present application to meet the requirements of high-resolution applications.

[0053] Alternatively, as shown in Figures 5 and 6, the source 184 and the drain 185 can also be arranged in the same layer, that is, the source and drain layer 180 is a single-layer film structure, and the source 184 and the drain 185 can be formed simultaneously using one mask. This allows the array substrate 100 in the embodiment of the present application to save the number of masks when applied to scenarios with low resolution requirements, thereby simplifying the process and reducing production costs.

[0054] It should be noted that the specific structure of the source-drain layer 180 in the embodiment of the present application can be selected and adjusted according to the actual use requirements of the array substrate 100, and is not particularly limited here.

[0055] Specifically, when the source electrode 184 is composed of a first conductive portion 1842 and a first light shielding portion 1841, and the first light shielding portion 1841 is composed of a first sub-light shielding portion 1841a, a first insulating portion 1841b, and a second sub-light shielding portion 1841c, the first conductive portion 1842 and the first light shielding portion 1841 can be formed simultaneously using a single photomask. As shown in FIG7 , the first conductive layer 181, three film layers corresponding to the first light shielding portion 1841, and a photoresist layer 240 are sequentially deposited on the side of the active layer 140 facing away from the substrate layer 110. The photoresist layer 240 is then patterned using a single photomask to expose the region where the source electrode 184 is located. The three film layers corresponding to the first light shielding portion 1841 and the first conductive layer 181 are then etched to form the stacked first conductive portion 1842 and the first light shielding portion 1841. The remaining photoresist layer 240 on the first light shielding portion 1841 is then stripped, completing the fabrication of the source electrode 184. This manufacturing method can not only omit the number of times of forming a separate mask for the shading structure, but also make the size of the first shading portion 1841 close to the size of the first conductive portion 1842, thereby minimizing the area occupied by the first shading portion 1841 and thereby improving the overall aperture ratio of the array substrate 100.

[0056] In some embodiments, as shown in Figures 3 to 6, the drain 185 includes a second light-shielding portion 1851, which is electrically connected to the other end of the active layer 140, that is, the second light-shielding portion 1851 serves as a part of the drain 185, and the orthographic projection of the second light-shielding portion 1851 on the substrate layer 110 is at least partially located within the orthographic projection of the active layer 140 on the substrate layer 110, that is, the second light-shielding portion 1851 can directly serve as the drain 185 or as a light-shielding structure in the drain 185 to reduce the reflection of light by the drain 185.

[0057] Similarly, in conventional array substrate 100 structures, a separate light shielding structure is typically formed above drain electrode 185. Because the light shielding structure needs to shield drain electrode 185 and is affected by manufacturing process precision, the light shielding structure needs to be relatively large. While this effectively shields drain electrode 185, it results in a lower overall aperture ratio for array substrate 100. In the present application, by forming second light shielding portion 1851 as part of drain electrode 185 or directly utilizing second light shielding portion 1851 as drain electrode 185, the size of second light shielding portion 1851 is closer to that of drain electrode 185 itself, thereby reducing the area occupied by second light shielding portion 1851 and improving the overall aperture ratio of array substrate 100. Furthermore, since second light shielding portion 1851 is part of drain electrode 185, compared to conventional array substrate 100, an additional photomask is not required to fabricate the light shielding structure. This simplifies the manufacturing process of array substrate 100, improves production efficiency, and reduces production costs.

[0058] In other embodiments, the drain 185 also includes a second conductive portion 1852, which is located on the side of the second light-shielding portion 1851 facing the active layer 140, and the second light-shielding portion 1851 is electrically connected to the other end of the active layer 140 through the second conductive portion 1852, that is, the drain 185 is composed of a stacked arrangement of the second conductive portion 1852 and the second light-shielding portion 1851. This arrangement allows the drain 185 to reduce the reflection of light through the second light-shielding portion 1851, while being able to adopt a second conductive portion 1852 with better conductivity, i.e., higher conductivity, to be electrically connected to the active layer 140, thereby reducing the connection resistance between the drain 185 as a whole and the active layer 140.

[0059] Among them, the orthographic projection of the second shading portion 1851 on the substrate layer 110 covers the orthographic projection of the second conductive portion 1852 on the substrate layer 110, that is, in the thickness direction of the array substrate 100, the second shading portion 1851 fully covers the second conductive portion 1852 to reduce the overall reflection of light by the drain 185.

[0060] In some embodiments, the second light-shielding portion 1851 includes a third sub-light-shielding portion 1851a, a second insulating portion 1851b, and a fourth sub-light-shielding portion 1851c stacked in a direction away from the substrate layer 110. The third sub-light-shielding portion 1851a is electrically connected to one end of the active layer 140, i.e., the second light-shielding portion 1851 is formed of a three-layer stack. The thickness of the fourth sub-light-shielding portion 1851c can be less than that of the third sub-light-shielding portion 1851a, i.e., the fourth sub-light-shielding portion 1851c has a semi-transmissive and semi-reflective property, while the third sub-light-shielding portion 1851a primarily reflects light.

[0061] When external light strikes the fourth sub-light-shielding portion 1851c, the light that has passed through the fourth sub-light-shielding portion 1851c, after passing through the second insulating portion 1851b, is reflected on the surface of the third sub-light-shielding portion 1851a. Due to the optical path difference, the light reflected by the third sub-light-shielding portion 1851a is superimposed and offset by the light that has passed through the fourth sub-light-shielding portion 1851c, thereby enabling the second light-shielding portion 1851 to absorb the incident light and thereby reduce light reflection from the source electrode 184. In other words, when the second light-shielding portion 1851 is a stacked structure formed by the third sub-light-shielding portion 1851a, the second insulating portion 1851b, and the fourth sub-light-shielding portion 1851c, light absorption is achieved through the interaction of the two sub-light-shielding portions. In this case, the third sub-light-shielding portion 1851a and the fourth sub-light-shielding portion 1851c do not need to have anti-reflection properties themselves, thereby expanding the range of material options for the second light-shielding portion 1851.

[0062] It should be noted that in the array substrate 100, since the drain 185 is used to be electrically connected to the subsequent pixel electrode 211, and the third sub-light-shielding portion 1851a and the fourth sub-light-shielding portion 1851c are isolated by the second insulating portion 1851b, during the manufacturing process of the array substrate 100, it is necessary to simultaneously perform opening design on the fourth sub-light-shielding portion 1851c and the second insulating portion 1851b to facilitate the subsequent electrical connection design between the pixel electrode 211 and the third sub-light-shielding electrode.

[0063] It should be noted that in the embodiment of the present application, the source 184 and the drain 185 can be made of the same material and have the same structural composition. Specifically, the first light shielding portion 1841 and the second light shielding portion 1851 can be made of the same material and have the same structural composition, and the first conductive portion 1842 and the second conductive portion 1852 can also be made of the same material and have the same structural composition. The specific types of these materials can be selected and adjusted based on actual design requirements and are not particularly limited herein.

[0064] Optionally, the array substrate 100 further includes a color resist layer 190, a second insulating layer 200, a third conductive layer 210, a third insulating layer 220, and a fourth conductive layer 230, which are sequentially arranged on the side of the source / drain electrode layer 180 facing away from the substrate layer 110. The third conductive layer 210 includes a pixel electrode 211, which is electrically connected to the drain electrode 185. The fourth conductive layer 230 includes a common electrode 231, which is arranged corresponding to the pixel electrode 211. When the array substrate 100 is applied to the display panel 10, the common electrode 231 and the pixel electrode 211 are used to form a fringe field to control the deflection of the liquid crystal layer 400 in the display panel 10, thereby achieving control of the displayed image.

[0065] The color filter layer 190 includes red, green, and blue color filters. These filters are used to filter light emitted by the backlight source, allowing light of corresponding colors to pass through. Combined with the fringe field formed by the common electrode 231 and the pixel electrode 211, this allows for control of the display image. The second insulating layer 200 is a planarizing layer used to flatten the surface of the color filter layer 190 to facilitate the formation of the pixel electrode 211 and the common electrode 231. The third insulating layer 220 is a passivation layer used to separate the pixel electrode 211 from the common electrode 231 to prevent mutual interference that could affect display quality.

[0066] Secondly, an embodiment of the present application provides a display panel, which includes an array substrate. The specific structure of the array substrate refers to the above embodiment. Since this display panel adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be repeated here one by one.

[0067] As shown in Figure 8, the display panel 10 includes an array substrate 100, an opposing substrate 300, and a liquid crystal layer 400. The opposing substrate 300 is disposed opposite the array substrate 100. During assembly of the display panel 100, the array substrate 100 and the opposing substrate 300 are fastened together to form a receiving cavity, and the liquid crystal layer 400 is filled in the receiving cavity between the opposing substrate 300 and the array substrate 100. During operation of the display panel 100, the pixel electrodes 211 and the common electrode 231 in the array substrate 100 form a fringe field, which causes the liquid crystal molecules in the liquid crystal layer 400 to rotate, thereby changing the angle of the emitted light and forming different display images to meet different display requirements.

[0068] Specifically, as shown in Figures 1 to 6, the array substrate 100 includes a substrate layer 110, an active layer 140 and a source-drain layer 180 arranged in sequence, the source-drain layer 180 includes a source 184 and a drain 185, the source 184 is electrically connected to one end of the active layer 140, and the drain 185 is electrically connected to the other end of the active layer 140, wherein the source 184 includes a first light-shielding portion 1841, the first light-shielding portion 1841 is electrically connected to one end of the active layer 140, and the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 is at least partially located within the orthographic projection of the active layer 140 on the substrate layer 110. In the present application, the first light-shielding portion 1841 is directly used as a part of the source 184, and the orthographic projection of the first light-shielding portion 1841 on the substrate layer 110 is at least partially located within the orthographic projection of the active layer 140 on the substrate layer 110. That is, whether the first light-shielding portion 1841 is directly used as the source 184 or the first light-shielding portion 1841 is used to block and reduce the reflection of light by the source 184, compared with the traditional method of forming a separate light-shielding structure above the source 184, the area occupied by the light-shielding structure can be reduced, thereby improving the overall aperture ratio of the array substrate 100.

[0069] It should be noted that the application scope of the display panel 10 in the embodiment of the present application is very wide, including various display and lighting display devices such as televisions, computers, mobile phones, foldable and rollable display screens, as well as wearable devices such as smart bracelets and smart watches, all of which are within the scope of the application field of the display panel 10 in the embodiment of the present application.

[0070] The above is a detailed introduction to an array substrate and a display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An array substrate, comprising: A substrate layer; An active layer disposed on one side of the substrate layer; A source-drain layer disposed on the side of the active layer away from the substrate layer, the source-drain layer includes a source electrode and a drain electrode, the source electrode is electrically connected to one end of the active layer, and the drain electrode is electrically connected to the other end of the active layer; Wherein, the source electrode includes a first light-shielding portion, the first light-shielding portion is electrically connected to one end of the active layer, and at least a part of the orthographic projection of the first light-shielding portion on the substrate layer is located within the orthographic projection of the active layer on the substrate layer.

2. The array substrate according to claim 1, wherein, The source electrode further includes a first conductive portion, the first conductive portion is located on the side of the first light-shielding portion facing the active layer, the first light-shielding portion is electrically connected to one end of the active layer through the first conductive portion, and the orthographic projection of the first light-shielding portion on the substrate layer covers the orthographic projection of the first conductive portion on the substrate layer.

3. The array substrate according to claim 2, wherein, The width of the portion of the first light-shielding portion protruding from the sidewall of the first conductive portion is less than or equal to 0.2 micrometers.

4. The array substrate according to claim 1, wherein, The first light-shielding portion includes a first sub-light-shielding portion, a first insulating portion, and a second sub-light-shielding portion stacked in a direction away from the substrate layer, the first sub-light-shielding portion is electrically connected to one end of the active layer, and the second sub-light-shielding portion is electrically connected to the first sub-light-shielding portion.

5. The array substrate according to claim 4, wherein, The thickness of the second sub-light-shielding portion is less than the thickness of the first sub-light-shielding portion.

6. The array substrate according to any one of claims 1 to 5, wherein, The source-drain layer includes a first conductive layer, a first insulating layer, and a second conductive layer sequentially disposed in a direction away from the substrate layer, the first conductive layer includes the source electrode, and the second conductive layer includes the drain electrode; or, The source electrode and the drain electrode are disposed in the same layer.

7. The array substrate according to claim 6, wherein, The drain electrode includes a second light-shielding portion, the second light-shielding portion is electrically connected to the other end of the active layer, and at least a part of the orthographic projection of the second light-shielding portion on the substrate layer is located within the orthographic projection of the active layer on the substrate layer.

8. The array substrate according to claim 7, wherein, The drain electrode further includes a second conductive portion, the second conductive portion is located on the side of the second light-shielding portion facing the active layer, the second light-shielding portion is electrically connected to the other end of the active layer through the second conductive portion, and the orthographic projection of the second light-shielding portion on the substrate layer covers the orthographic projection of the second conductive portion on the substrate layer.

9. The array substrate according to claim 7, wherein, The second light-shielding portion includes a third sub-light-shielding portion, a second insulating portion, and a fourth sub-light-shielding portion stacked in a direction away from the substrate layer, and the third sub-light-shielding portion is electrically connected to one end of the active layer.

10. The array substrate according to claim 1, wherein, The array substrate further includes a color filter layer, a second insulating layer, a third conductive layer, a third insulating layer, and a fourth conductive layer sequentially disposed on the side of the source-drain layer away from the substrate layer, the third conductive layer includes a pixel electrode, the pixel electrode is electrically connected to the drain electrode, and the fourth conductive layer includes a common electrode, and the common electrode is disposed corresponding to the pixel electrode.

11. A display panel, comprising an array substrate, the array substrate includes: A substrate layer; An active layer disposed on one side of the substrate layer; A source-drain layer is disposed on a side of the active layer away from the substrate layer. The source-drain layer includes a source electrode and a drain electrode. The source electrode is electrically connected to one end of the active layer, and the drain electrode is electrically connected to the other end of the active layer. Wherein, the source electrode includes a first light-shielding portion, the first light-shielding portion is electrically connected to one end of the active layer, and a positive projection of the first light-shielding portion on the substrate layer is at least partially located within a positive projection of the active layer on the substrate layer.

12. The display panel according to claim 11, wherein, The source electrode further includes a first conductive portion. The first conductive portion is located on a side of the first light-shielding portion facing the active layer. The first light-shielding portion is electrically connected to one end of the active layer through the first conductive portion, and a positive projection of the first light-shielding portion on the substrate layer covers a positive projection of the first conductive portion on the substrate layer.

13. The display panel according to claim 12, wherein, A width of a portion of the first light-shielding portion protruding from a sidewall of the first conductive portion is less than or equal to 0.2 micrometers.

14. The display panel according to claim 11, wherein, The first light-shielding portion includes a first sub-light-shielding portion, a first insulating portion, and a second sub-light-shielding portion that are stacked in a direction away from the substrate layer. The first sub-light-shielding portion is electrically connected to one end of the active layer, and the second sub-light-shielding portion is electrically connected to the first sub-light-shielding portion.

15. The display panel according to claim 14, wherein, A thickness of the second sub-light-shielding portion is less than a thickness of the first sub-light-shielding portion.

16. The display panel according to any one of claims 11 to 15, wherein, The source-drain layer includes a first conductive layer, a first insulating layer, and a second conductive layer that are sequentially disposed in a direction away from the substrate layer. The first conductive layer includes the source electrode, and the second conductive layer includes the drain electrode; or, The source electrode and the drain electrode are disposed in the same layer.

17. The display panel according to claim 16, wherein, The drain electrode includes a second light-shielding portion. The second light-shielding portion is electrically connected to the other end of the active layer, and a positive projection of the second light-shielding portion on the substrate layer is at least partially located within a positive projection of the active layer on the substrate layer.

18. The display panel according to claim 17, wherein, The drain electrode further includes a second conductive portion. The second conductive portion is located on a side of the second light-shielding portion facing the active layer. The second light-shielding portion is electrically connected to the other end of the active layer through the second conductive portion, and a positive projection of the second light-shielding portion on the substrate layer covers a positive projection of the second conductive portion on the substrate layer.

19. The display panel according to claim 17, wherein, The second light-shielding portion includes a third sub-light-shielding portion, a second insulating portion, and a fourth sub-light-shielding portion that are stacked in a direction away from the substrate layer. The third sub-light-shielding portion is electrically connected to one end of the active layer.

20. The display panel according to claim 11, wherein, The array substrate further includes a color resist layer, a second insulating layer, a third conductive layer, a third insulating layer, and a fourth conductive layer that are sequentially disposed on a side of the source-drain layer away from the substrate layer. The third conductive layer includes a pixel electrode. The pixel electrode is electrically connected to the drain electrode. The fourth conductive layer includes a common electrode. The common electrode is disposed corresponding to the pixel electrode.

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