Photodiode and manufacturing method therefor, and electronic element

Abstract

The present application relates to a photodiode and a manufacturing method therefor, and an electronic element. The method for manufacturing the photodiode comprises: forming an adjustment structure extending into an epitaxial layer, wherein the adjustment structure comprises a plurality of adjustment areas which are spaced apart, the epitaxial layer has a first doping type, the adjustment areas have the first doping type, and the doping concentration of each adjustment area is greater than that of the epitaxial layer; and forming a collection layer extending into the adjustment structure and the epitaxial layer, wherein at least part of the boundary of the collection layer is located in the boundary of the adjustment structure, and the collection layer has a second doping type. According to the method, the photodiode having high quantum efficiency can be manufactured.

Description

Photodiode and manufacturing method thereof, and electronic component

[0001] Related applications

[0002] This application claims priority to the Chinese patent application with application number 202311846410.3, filed on December 28, 2023, entitled “Photodiode and its manufacturing method, electronic component” and the Chinese patent application with application number 202311853316.0, filed on December 28, 2023, entitled “Photodiode and its manufacturing method”, the entire text of which is hereby incorporated by reference. Technical Field

[0003] The present application relates to the field of semiconductor technology, and in particular to photodiodes and manufacturing methods thereof, and electronic components. Background Art

[0004] Photodiode detectors detect light by absorbing incident photons to generate photogenerated carriers, which are then collected by electrodes. From generation to collection, photogenerated carriers typically undergo two processes: diffusion in the epitaxial layer and drift in the space charge region. Drift in the space charge region is much faster than diffusion in the epitaxial layer. Therefore, photogenerated carriers generated in the space charge region quickly drift to the electrodes under the action of the electric field and are collected. Photogenerated carriers generated in the epitaxial material outside the space charge region, on the other hand, must first diffuse to reach the space charge region and then drift under the electric field before being collected by the electrodes. In other words, the diffusion process outside the space charge region is relatively slow. Photogenerated carriers during the diffusion process may be trapped by defects in the epitaxial material, resulting in a decrease in quantum efficiency. Summary of the Invention

[0005] Based on this, it is necessary to provide photodiodes and their manufacturing methods and electronic components to address the issue of how to improve quantum efficiency.

[0006] An embodiment of the present application provides a method for manufacturing a photodiode, the method comprising: forming an adjustment structure extending into an epitaxial layer, the adjustment structure comprising a plurality of adjustment regions spaced apart, the epitaxial layer having a first doping type, the adjustment region having the first doping type, the doping concentration of the adjustment region being greater than the doping concentration of the epitaxial layer; and forming a collection layer extending into the adjustment structure and the epitaxial layer, with at least a portion of its boundary located within the boundary of the adjustment structure, the collection layer having a second doping type.

[0007] The method for manufacturing a photodiode provided in an embodiment of the present application forms multiple adjustment regions spaced apart from each other, thereby ensuring that the width of the first space charge region in the epitaxial layer is relatively wide while the width of the second space charge region in the adjustment region is relatively narrow. The method provided in an embodiment of the present application can produce a photodiode with high quantum efficiency and low dark current.

[0008] In some embodiments, the epitaxial layer has a first region, a second region, and a third region, and the adjustment structure is located in the second region; the method also includes: forming a pinning layer having a first doping type, the pinning layer including a first pinning portion stacked on the adjustment structure and a second pinning portion located in the third region to protrude from the boundary of the adjustment structure.

[0009] With this arrangement, a photodiode capable of isolating the influence of surface states is manufactured.

[0010] In some embodiments, the method further includes: forming a first electrode region located in the third region and connected to the epitaxial layer, the first electrode region having a first doping type and a doping concentration greater than the doping concentration of the epitaxial layer; forming a second electrode region located in the first region and connected to the collection layer, the second electrode region having a second doping type and a doping concentration greater than the doping concentration of the collection layer; forming a first anti-reflection film stacked on the pinning layer; and forming a first passivation layer stacked on the first anti-reflection film.

[0011] With this arrangement, a front-illuminated photodiode with a compact structure, high efficiency and long service life is manufactured.

[0012] In some embodiments, the method for manufacturing a photodiode further includes: epitaxially forming an epitaxial layer stacked on a substrate, wherein an adjustment structure extends into the epitaxial layer from a side of the epitaxial layer facing away from the substrate; removing the substrate; forming a second anti-reflection film stacked on the epitaxial layer, wherein the second anti-reflection film is located on a side of the epitaxial layer facing away from the pinning layer; and forming a second passivation layer stacked on the second anti-reflection film.

[0013] With this arrangement, a back-illuminated photodiode with a compact structure, high efficiency and long service life is manufactured.

[0014] On the other hand, an embodiment of the present application provides a photodiode, which includes: an epitaxial layer having a first doping type; an adjustment structure extending into the epitaxial layer, the adjustment structure including a plurality of adjustment regions spaced apart, the adjustment regions having a first doping type and a doping concentration greater than the doping concentration of the epitaxial layer; and a collection layer extending into the adjustment structure and the epitaxial layer, with at least part of its boundary located within the boundary of the adjustment structure, the collection layer having a second doping type.

[0015] The photodiode provided by the embodiment of the present application has high quantum efficiency and low dark current. In addition, the adjustment structure can control the width of the lateral space charge region at the boundary of the collection region.

[0016] In some embodiments, the epitaxial layer has a first region, a second region, and a third region, and the adjustment structure is located in the second region; the photodiode also includes a pinning layer having a first doping type, the pinning layer includes a first pinning portion stacked on the adjustment structure and a second pinning portion located in the third region to protrude beyond the boundary of the adjustment structure.

[0017] This arrangement can isolate the influence of surface states.

[0018] In some embodiments, the photodiode further includes a substrate having a first doping type, the substrate being located on a side of the epitaxial layer facing away from the pinned layer, the doping concentration of the substrate being greater than the doping concentration of the epitaxial layer; and the resistivity of the epitaxial layer being greater than 100Ωcm.

[0019] With such an arrangement, a front-illuminated photodiode can be realized, and the circuit performance of the photodiode is good.

[0020] In some embodiments, the photodiode further includes a first electrode region, a second electrode region, a first anti-reflection film and a first passivation layer; the first electrode region is located in the third region and connected to the epitaxial layer, the first electrode region has a first doping type and a doping concentration greater than the doping concentration of the epitaxial layer; the second electrode region is located in the first region and connected to the collection layer, the second electrode region has a second doping type and a doping concentration greater than the doping concentration of the collection layer; the first anti-reflection film is stacked on the pinning layer; and the first passivation layer is stacked on the first anti-reflection film.

[0021] This arrangement can draw current from the front, improve the light incident efficiency, and ensure a long service life of the photodiode.

[0022] Exemplarily, the collecting layer includes a first collecting portion located in the first region and a second collecting portion located in the second region, the second electrode region extends into the first collecting portion, and the first electrode region extends into the epitaxial layer.

[0023] In some embodiments, the photodiode further includes a second antireflection film and a second passivation layer; the second antireflection film is stacked on the epitaxial layer, and the second antireflection film is located on the side of the epitaxial layer facing away from the pinned layer; the second passivation layer is stacked on the second antireflection film.

[0024] Such an arrangement can realize a back-illuminated photodiode, ensure the light incident efficiency, and guarantee the service life.

[0025] Exemplarily, the total area of ​​all adjustment zones is 50% to 70% of the contour area of ​​the adjustment structure.

[0026] With this setup, the dark current can be reduced by more than 60%.

[0027] An embodiment of the present application provides a method for manufacturing a photodiode, which includes: forming a plurality of grooves extending into an epitaxial layer, the epitaxial layer having a first doping type; and performing an ion implantation process on the epitaxial layer to form a collection layer having a second doping type, wherein the collection layer includes a plurality of first collection portions interlaced with the plurality of grooves and a plurality of second collection portions extending from the bottom ends of the grooves into the epitaxial layer.

[0028] The method for manufacturing a photodiode provided in an embodiment of the present application forms grooves so that different portions of the collection layer extend to different depths relative to the epitaxial layer. Consequently, the space charge region generated by the epitaxial layer and the collection layer has good absorption capabilities for light of different wavelengths and excellent transport capabilities for photogenerated carriers. The photodiode implemented using the epitaxial layer and the collection layer has high quantum efficiency and fast response speed.

[0029] In some embodiments, the step of forming a plurality of grooves extending into the epitaxial layer includes: etching to form a plurality of grooves arranged in parallel or in an array, wherein the groove mouth area is larger than the groove bottom area; the step of forming the collection layer includes: forming a third collecting portion connecting the first collecting portion and the second collecting portion by inclined ion implantation.

[0030] Such an arrangement helps to form an integrated collection layer, thereby ensuring the ion implantation effect and controlling the thickness of the collection layer.

[0031] In some embodiments, the step of forming the plurality of grooves includes: etching to form a plurality of first grooves spaced apart from each other; etching to form a plurality of second grooves spaced apart from the first grooves, wherein the depth of the second grooves is greater than that of the first grooves.

[0032] In this way, grooves with different depths can be formed, thereby affecting the position of the space charge region in the epitaxial layer.

[0033] In some embodiments, the sum of the projected areas of all the grooves along the extension direction is 20% to 80% of the projected area of ​​the collection layer along the extension direction; the depth of the groove is 0.5 μm to 10 μm, and the ratio of the groove depth to the groove width is within 10:1; the ratio of the groove depth of the second groove to the groove depth of the first groove is in the range of 1.5:1 to 5:1, and the ratio of the number of second grooves to the number of first grooves is in the range of 3:1 to 1:3.

[0034] This arrangement allows for fine-tuning of the performance of the fabricated photodiode and ensures overall responsivity.

[0035] In some embodiments, the epitaxial layer has a first region, a second region, and a third region, and the plurality of grooves are located in the second region. The method for manufacturing a photodiode further includes: epitaxially forming an epitaxial layer stacked on a substrate; forming a first electrode region located in the third region and connected to the epitaxial layer, the first electrode region having a first doping type and a doping concentration greater than a doping concentration of the epitaxial layer; forming a second electrode region located in the first region and connected to the collection layer, the second electrode region having a second doping type and a doping concentration greater than a doping concentration of the collection layer; and removing the substrate.

[0036] Such an arrangement can form an epitaxial layer with a stable structure and good performance, and manufacture a back-illuminated photodiode with high short-wave response.

[0037] In some embodiments, the method further includes: forming a pinning layer stacked on the collection layer, the pinning layer including a first pinning portion covering the first collection portion, a second pinning portion located at the bottom end of the groove, and a third pinning portion protruding from the boundary of the collection layer.

[0038] Such an arrangement can reduce the impact of surface defects on the performance of the photodiode.

[0039] On the other hand, an embodiment of the present application provides a photodiode, which includes: an epitaxial layer having a first doping type; and an integrated collection layer, the collection layer extending into the epitaxial layer, the collection layer including a plurality of first collection parts and a plurality of second collection parts, the plurality of first collection parts and the plurality of second collection parts being arranged alternately; the position of the second collection part along the extension direction extends further into the epitaxial layer than the position of the first collection part along the extension direction.

[0040] In the photodiode provided in the embodiment of the present application, the collection layer has parts at different depths, and the space charge region realized makes the photodiode have high quantum efficiency and fast response speed.

[0041] In some embodiments, the collection layer further includes a plurality of third collection parts, adjacent first collection parts and second collection parts are spaced apart along the extension direction and along the parallel direction, and the third collection parts connect the first collection parts and the second collection parts.

[0042] Such an arrangement helps to ensure that the thickness of the collection layer relative to its extension direction is uniform, and then ensures that the width of the space charge region is uniform, so as to maintain a low level of dark current.

[0043] In some embodiments, the sum of the projected areas of all the second collecting portions along the extension direction is 20% to 80% of the projected area of ​​the collecting layer along the extension direction; the step difference between the second collecting portion and the first collecting portion along the extension direction is 0.5 μm to 10 μm, and the ratio of the step difference to the spacing between two adjacent first collecting portions is within 10:1; the second collecting portion includes a first deep zone and a second deep zone, and the position of the second deep zone along the extension direction extends further into the epitaxial layer than the position of the first deep zone along the extension direction; the ratio of the first step difference between the second deep zone and the first collecting portion along the extension direction to the second step difference between the first deep zone and the first collecting portion along the extension direction is in the range of 1.5:1 to 5:1, and the ratio of the number of second deep zones to the number of first deep zones is in the range of 3:1 to 1:3.

[0044] With this arrangement, the comprehensive quantum efficiency of the photodiode is good, and it can also be finely controlled to obtain photodiodes targeted at different wavelengths.

[0045] In some embodiments, the photodiode further includes a pinning layer, which is located on the side of the collection layer facing away from the epitaxial layer. The pinning layer includes a first pinning portion stacked on the first collection portion, a second pinning portion stacked on the second collection portion, and a third pinning portion protruding from the boundary of the collection layer.

[0046] With such an arrangement, the performance of the photodiode is stable and reliable and is less affected by the interface state.

[0047] An embodiment of the present application further provides an electronic component, which includes: a circuit; and the aforementioned photodiode, wherein the epitaxial layer and the collection layer of the photodiode are electrically connected to the circuit respectively.

[0048] The electronic components provided by the embodiments of the present application have high photoelectric conversion efficiency and sensitive electrical properties. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the drawings of the application without creative work.

[0050] FIG1 is a flow chart of a method for manufacturing a photodiode according to some embodiments of the present application;

[0051] FIG2 is a schematic diagram of a semiconductor structure including an epitaxial layer;

[0052] FIG3 is a partial schematic diagram of a semiconductor structure including a regulating structure;

[0053] FIG4 is a schematic top view of a semiconductor structure according to an embodiment of the present application;

[0054] FIG5 is a schematic top view of another semiconductor structure according to an embodiment of the present application;

[0055] FIG6 is a schematic diagram of a semiconductor structure including a collection layer;

[0056] FIG7 is a schematic diagram of a semiconductor structure including a pinning layer;

[0057] FIG8 is a schematic diagram of a semiconductor structure including a first electrode region and a second electrode region;

[0058] FIG9 is a schematic diagram of the working state of the front-illuminated photodiode according to an embodiment of the present application;

[0059] FIG10 is a schematic diagram of the working state of a back-illuminated photodiode according to an embodiment of the present application;

[0060] FIG11 is a spectral responsivity curve of a back-illuminated photodiode according to an embodiment of the present application;

[0061] FIG12 is a dark current curve diagram of a back-illuminated photodiode according to an embodiment of the present application;

[0062] FIG13 is a schematic flow chart of a method for manufacturing a photodiode according to some other embodiments of the present application;

[0063] FIG14 is a schematic structural diagram of a semiconductor structure after forming an epitaxial layer;

[0064] FIG15 is a schematic structural diagram of a prefabricated semiconductor structure after forming a mask layer;

[0065] FIG16 is a schematic structural diagram of a semiconductor structure after grooves are formed;

[0066] FIG17 is a schematic structural diagram of a semiconductor structure after forming a collection layer;

[0067] FIG18 is a schematic structural diagram of a semiconductor structure after forming a pinning layer;

[0068] FIG19 is a schematic structural diagram of a photodiode according to an embodiment of the present application;

[0069] FIG20 is a graph showing the spectral responsivity of the embodiment of the present application and the comparative example;

[0070] FIG21 is a dark current curve diagram of the embodiment of the present application and the comparative example;

[0071] FIG22 is a schematic structural diagram of a photodiode according to an embodiment of the present application;

[0072] FIG23 is a schematic structural diagram of a photodiode according to an embodiment of the present application;

[0073] FIG24 is a schematic structural diagram of a semiconductor structure after grooves are formed;

[0074] FIG25 is a schematic structural diagram of a photodiode according to an embodiment of the present application;

[0075] FIG26 is a graph showing spectral responsivity of three embodiments of the present application;

[0076] FIG27 is a dark current curve diagram of three embodiments of the present application;

[0077] FIG28 is a block diagram of the structure of the electronic component according to an embodiment of the present application.

[0078] Explanation of reference numerals: 1, substrate; 2, epitaxial layer; 10, mask layer; 20, groove; 201, first groove; 202, second groove; 21, first dielectric portion; 22, second dielectric portion; 23, third dielectric portion; 3A, adjustment structure; 30, adjustment region; 3, collection layer; 31, 301, first collection portion; 32, 302, second collection portion; 321, first deep region; 322, second deep region; 33, third collection portion; 34, auxiliary collection portion; 4 , pinning layer; 41, first pinning portion; 42, second pinning portion; 43, third pinning portion; 5, space charge region; 51, first space charge region; 52, second space charge region; 521, first sensing region; 522, second sensing region; 6, first electrode region; 7, second electrode region; 100, photodiode; 200, circuit; 300, electronic component; 8, first antireflection film; 9, first passivation layer; 11, second antireflection film; 12, second passivation layer. DETAILED DESCRIPTION

[0079] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0080] In the description of the embodiments of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "perpendicular", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.

[0081] In the embodiments of the present application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, a first feature being "above," "above," and "above" a second feature may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is lower in level than the second feature.

[0082] In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. For example, the first doping type may also be referred to as the second doping type, and the second doping type may also be referred to as the first doping type. In the description of the embodiments of the present application, "multiple" means at least two, for example, two, three, etc., unless otherwise clearly and specifically defined.

[0083] In the embodiments of the present application, unless otherwise clearly specified and limited, the terms "connected", "connection", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a flexible connection, or a rigid connection along at least one direction; it can be a mechanical connection, or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or directly connected with the presence of an intermediate medium, or it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. The terms "install", "set", "fix", etc. can be broadly understood as connection. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0084] As used herein, the terms "layer" and "region" refer to a portion of a material that includes an area with a certain thickness. A layer can extend horizontally, vertically and / or along a tapered surface. A layer can be an area of ​​a uniform or non-uniform continuous structure, and its thickness perpendicular to the extension direction may not be greater than the thickness of the continuous structure. A layer can include multiple layers, which can be stacked layers or discretely extended layers. The shapes of the various regions and layers in the drawings and their relative sizes and positional relationships are only exemplary and may deviate from the actual shapes due to manufacturing tolerances or technical limitations, and the design can be adjusted according to actual needs.

[0085] Referring to FIG. 1 , FIG. 1 illustrates a process flow for a method for manufacturing a photodiode in some embodiments of the present application. In some implementations, method 1000 for manufacturing a photodiode includes step S102A and step S103A. The method 1000 for manufacturing a photodiode according to the embodiment shown in FIG. 1 of the present application is described in detail below in conjunction with FIG. 2 through FIG. 8 .

[0086] 2 , in some embodiments, the method 1000 further includes step S101A: forming an epitaxial layer 2. Specifically, the epitaxial layer 2 stacked on the substrate 1 can be formed by an epitaxial process.

[0087] Substrate 1 has a first doping type. For example, the first doping type may be hole-type doping or electron-type doping, and substrate 1 may have hole-type doping. The material of substrate 1 may include at least one of silicon carbide, silicon, silicon germanium, germanium, or a Group III-V compound such as gallium nitride and gallium arsenide. The epitaxial layer 2 may be doped with the first doping type through in-situ doping. The material of epitaxial layer 2 may include silicon. Alternatively, substrate 1 and epitaxial layer 2 may be said to have the first conductivity type, where the majority carriers are holes or electrons. For example, the majority carriers of epitaxial layer 2 are holes.

[0088] The doping concentration of the substrate 1 is greater than that of the epitaxial layer 2. For example, the substrate 1 is heavily P-type doped, and the epitaxial layer 2 is lightly P-type doped. For example, the resistivity of the epitaxial layer 2 is greater than 100Ωcm, for example, greater than 120Ωcm.

[0089] It can be understood that the structure obtained in each step in the embodiment of the present application can be called a prefabricated structure for the next step.

[0090] Referring to FIG. 3 , step S102A includes forming an adjustment structure 3A extending into the epitaxial layer 2. The adjustment structure 3A includes a plurality of adjustment regions 30 spaced apart from each other. The adjustment regions 30 have a first doping type, and the doping concentration of the adjustment regions 30 is greater than the doping concentration of the epitaxial layer 2. The adjustment regions 30 may have P-type doping. In some embodiments, the adjustment regions 30 are doped wells, for example, P-type doped wells.

[0091] After step S102A, the epitaxial layer 2 includes a first dielectric portion 21 and a second dielectric portion 22. The adjustment structure 3A is stacked on the first dielectric portion 21 along the Z-axis. The second dielectric portion 22 can separate two adjacent adjustment regions 30, for example, along the X-axis.

[0092] The semiconductor structure shown in Figure 3 is a portion of a wafer. As shown in Figures 4 and 5 , the first dielectric portion 21, or epitaxial layer 2, comprises a first region, a second region, and a third region. The first region is where the electrode connected to the adjustment structure 3A is located, corresponding to, for example, the α region. The second region is where the adjustment structure 3A is located, corresponding to, for example, the β region. It is understood that the electrode connected to the adjustment structure 3A is located in the region where the adjustment structure 3A is located, that is, the first region is located in the second region. The third region is the region of the first dielectric portion 21 excluding the adjustment structure 3A, corresponding to, for example, the γ region. In the portion of the semiconductor structure shown in Figure 3 , which may be half of the entire semiconductor structure, the second and third regions are arranged along the X-axis. In the X-axis, the first region is located at the end of the second region away from the third region. The adjustment structure 3A is located in the second region, or the β region, and the third region is outside the second region.

[0093] As shown in Figure 4, the adjustment structure 3A includes multiple adjustment zones 30 arranged in an array along the XY plane. The projection of each adjustment zone 30 in the XY plane can be rectangular. The projection of the adjustment zone 30 can be circular, strip-shaped, annular, etc. As shown in Figure 5, the adjustment structure 3A includes multiple annular adjustment zones 30 arranged sequentially from the inside to the outside along the XY plane. In other embodiments, the adjustment structure may include multiple strip-shaped adjustment zones arranged along the X-axis.

[0094] Exemplarily, the total area of ​​all adjustment zones 30 is 10% to 90% of the outline area of ​​the adjustment structure 3A, for example, 20%, 40%, 60%, or 80%. The areas of different adjustment zones 30 can vary, so that the adjustment structure 3A is balanced overall and the adjustment zones 30 are relatively evenly distributed. Exemplarily, the total area of ​​all adjustment zones 30 refers to the sum of the areas projected on the XY plane by the multiple adjustment zones 30, and the outline area of ​​the adjustment structure 3A refers to the area projected on the XY plane by the outer contour of the adjustment structure 3A.

[0095] In some embodiments, the adjustment structure 3A can be formed by ion implantation. The adjustment region 30 is a P-type doped well. The resistivity of the doped well can be adjusted by adjusting the dopant dose, while the depth of the doped well can be adjusted by controlling the ion implantation energy. The dopant elements in the adjustment structure 3A are activated by annealing, such as rapid thermal annealing or furnace annealing.

[0096] In other embodiments, the grooves may be etched and then backfilled. In other embodiments, after forming the first dielectric portion 21 , the adjustment structure 3A and the second dielectric portion 22 may be formed correspondingly through an in-situ doping process and a compensatory doping process.

[0097] Referring to Figure 6, step S103A includes forming a gettering layer 3. Specifically, a gettering layer 3 is formed that extends into the adjustment structure 3A and the epitaxial layer 2. The adjustment structure 3A and the gettering layer 3 extend into the epitaxial layer 2 from the same side of the epitaxial layer 2 along the Z-axis. Specifically, the adjustment structure 3A extends into the epitaxial layer 2 from the side of the epitaxial layer 2 facing away from the substrate 1. The extension distance of the gettering layer 3 is less than the extension distance of the adjustment structure 3A.

[0098] In the XY plane, at least part of the boundary of the collection layer 3 is located within the boundary of the adjustment structure 3A. Specifically, in some embodiments, the boundary of the collection layer 3 is entirely located within the boundary of the adjustment structure 3A. In other embodiments, in the XY plane, the boundary of the collection layer 3 is partially located within the boundary of the adjustment structure 3A and partially located outside the boundary of the adjustment structure 3A. As shown in Figure 6, the boundary of the adjustment structure 3A can be the boundary of the outermost adjustment area 30. The collection layer 3 includes a second collection portion 302 located in the second area. The collection layer 3 is stacked on the second dielectric portion 22. Exemplarily, the collection layer 3 includes a first collection portion 301 located in the first area.

[0099] The collection layer 3 has a second doping type, for example, N-type doping. It forms a PN junction with the epitaxial layer 2 and the adjustment structure 3A. This PN junction creates a space charge region 5 (Figures 9 and 10), a photosensitive region that collects photogenerated carriers. The doping concentration of the collection layer 3 is higher than that of the adjustment structure 3A, enabling control of the width of the space charge region 5.

[0100] Understandably, the collection layer 3 may be said to have a second conductivity type, which is different from the first conductivity type.

[0101] Referring to FIG. 7 , in some embodiments, method 1000 further includes step S104A: forming a pinning layer 4. Pinning layer 4 has a first doping type, specifically, a heavily P-type doping layer. The doping concentration of pinning layer 4 is greater than the doping concentration of collection layer 3. Exemplarily, the thickness of pinning layer 4, or the distance extending along the Z-axis, is 10 nm to 1000 nm, for example, 50 nm, 200 nm, or 500 nm.

[0102] The pinning layer 4 extending into the epitaxial layer 2 can be formed by an ion implantation process, and then the dopant elements of the collection layer 3 and the dopant elements of the pinning layer 4 can be activated by an annealing process. The pinning layer 4 extends a shorter distance than the collection layer 3. For example, the pinning layer 4 can be formed by other semiconductor process steps and is stacked on the collection layer 3 and the adjustment structure 3A.

[0103] The pinning layer 4 includes a first pinning portion 41 and a second pinning portion 42. The first pinning portion 41 is located in the second region (β region), and the first pinning portion 41 is stacked on the second collecting portion 32 of the collecting layer 3 and the adjustment structure 3A. The second collecting portion 32 can be located in the third region to protrude the boundary of the adjustment structure 3A, and the second pinning portion 42 and the first pinning portion 41 are an integrated structure. The first pinning portion 41 is used to isolate the influence of the surface state on the collecting layer 3. The second pinning portion 42 can enhance the protection of the boundary and enable the pinning layer 4 to connect the epitaxial layer 2. The pinning layer 4 has a window in the first region.

[0104] Referring to FIG. 8 , in some embodiments, the method 1000 further includes step S105A and step S106A.

[0105] Step S105A: Forming a first electrode region 6. The first electrode region 6 is located in the third region and connected to the epitaxial layer 2. The first electrode region 6 extending into the epitaxial layer 2 can be formed by an ion implantation process. For example, the epitaxial layer 2 may include a third dielectric portion 23 juxtaposed to the pinning layer 4, and the first electrode region 6 may extend into and penetrate the third dielectric portion 23. The first electrode region 6 has a first doping type and a doping concentration greater than the doping concentration of the epitaxial layer 2. The first electrode region 6 may be heavily P-type doped.

[0106] Step S106A, forming a second electrode region 7. The second electrode region 7 is located in the first region and can be connected to the collection layer 3, for example, to the first collection portion 301, through a window in the pinning layer 4. The second electrode region 7 extending into the first collection portion 301 can be formed by an ion implantation process, with the second electrode region 7 spaced apart from the pinning layer 4. The second electrode region 7 has a second doping type, and the doping concentration of the second electrode region 7 is greater than the doping concentration of the collection layer 3. Exemplarily, the second electrode region 7 has a heavily N-type doping.

[0107] For example, the first electrode region 6 and the second electrode region 7 may be activated simultaneously by an annealing process, such as performing rapid thermal annealing or spike annealing.

[0108] The method 1000 for manufacturing a photodiode provided in an embodiment of the present application further includes the step of forming metal electrodes. For example, a first electrode (not shown) makes ohmic contact with the first electrode region 6, and a second electrode (not shown) makes ohmic contact with the second electrode region 7. The first electrode region 6 and the second electrode region 7 are exposed on the same side of the epitaxial layer 2, enabling the photocurrent of the photosensitive region to be extracted through the first electrode region 6 and the second electrode region 7.

[0109] The method for manufacturing a photodiode provided in an embodiment of the present application can form a photodiode with a regulated space charge region, thereby reducing dark current while maintaining quantum efficiency. The method is easy to perform, and the resulting photodiode has reliable performance.

[0110] 9 , illustratively, the method 1000 further includes: forming a first antireflection film 8 stacked on the pinning layer 4; and forming a first passivation layer 9 stacked on the first antireflection film 8. In this way, a front-illuminated photodiode can be formed.

[0111] Referring to Figure 10 , method 1000 for manufacturing a photodiode further includes: removing substrate 1; forming a second antireflection film 11 stacked on epitaxial layer 2, with second antireflection film 11 located on the side of epitaxial layer 2 facing away from pinning layer 4; and forming a second passivation layer 12 stacked on second antireflection film 11. This can form a back-illuminated photodiode. For example, after removing substrate 1, epitaxial layer 2 can be thinned, for example, by thinning first dielectric portion 21.

[0112] FIG9 shows a photodiode according to an embodiment of the present application. The present embodiment provides a photodiode 100, which can be manufactured using the aforementioned method 1000 for manufacturing a photodiode. Exemplarily, the photodiode 100 includes an epitaxial layer 2, an adjustment structure 3A, and a collection layer 3.

[0113] Epitaxial layer 2 has a first doping type. An adjustment structure 3A extends into epitaxial layer 2. Adjustment structure 3A includes a plurality of spaced adjustment regions 30. Adjustment regions 30 have the first doping type and a doping concentration greater than that of epitaxial layer 2. Adjustment regions 30 are arranged side by side in the XY plane. A gettering layer 3 extends into the gettering structure 3A, with at least a portion of its boundary located within the boundaries of the gettering structure 3A. Gettering layer 3 has a second doping type.

[0114] The collection layer 3 forms a PN junction with the adjustment structure 3A to realize a first space charge region 51 as shown in FIG9 . The first space charge region 51 is located in the adjustment structure 3A. The collection layer 3 forms a PN junction with the epitaxial layer 2 to realize a second space charge region 52. The second space charge region 52 is located in the epitaxial layer 2, specifically in the second dielectric portion 22 and may extend into the first dielectric portion 21. The space charge region 5 includes the first space charge region 51 and the second space charge region 52.

[0115] The epitaxial layer 2 has a low doping concentration, and the second space charge region 52 is relatively wide (along the Z-axis), thereby ensuring a high quantum efficiency for the photodiode 100. The adjustment regions 30 of the adjustment structure 3A have a high doping concentration, and the first space charge region 51 is relatively narrow, thereby suppressing the overall dark current of the photodiode 100.

[0116] As shown in Figure 9, incident light L can enter the photodiode 100 from the top side. It can pass through the pinning layer 4 and enter the collection layer 3, the modulation structure 3A, or the epitaxial layer 2. Light absorbed in the space charge region 5 can ionize the space charge region 5, generating photogenerated carriers. These carriers drift with the electric field to the electrodes and are rapidly collected. The space charge region 5 is also the functional region of the photodiode 100.

[0117] Illustratively, the photodiode 100 further includes a pinned layer 4 having a first doping type and a substrate 1 having the first doping type. The substrate 1 is located on the side of the epitaxial layer 2 facing away from the pinned layer 4. The doping concentrations of the substrate 1 and the pinned layer 4 are both higher than the doping concentration of the epitaxial layer 2. Illustratively, the resistivity of the epitaxial layer 2 is greater than 100 Ωcm. The resistivity of the adjustment region 30 is lower than the resistivity of the epitaxial layer 2.

[0118] Exemplarily, the photodiode 100 further includes a first electrode region 6 , a second electrode region 7 , a first antireflection film 8 and a first passivation layer 9 , which will not be described in detail herein.

[0119] As shown in Figure 10, an embodiment of the present application provides a photodiode 100, which can be a back-illuminated photodiode. No substrate is provided on the side of the epitaxial layer 2 facing away from the pinned layer 4 along the Z-axis. For example, a second antireflection film 11 and a second passivation layer 12 can be provided. In some embodiments, the first passivation layer 9 can still be provided on the upper side of the epitaxial layer 2. Both the first passivation layer 9 and the second passivation layer 12 can be referred to as the final passivation layer.

[0120] In conjunction with Figures 4 and 5 , the total area of ​​all adjustment regions 30 is 10% to 90% of the outline area of ​​the adjustment structure 3A. The outline area of ​​the adjustment structure 3A can be considered to be substantially equivalent to the area of ​​the second region. In the embodiment of the present application, the ratio of the first space charge region 51 to the second space charge region 52 in the space charge region 5 is affected by the range of 50% to 70%.

[0121] As shown in Figure 11, the comparative example without adjustment structure 3A and the embodiment of the present application achieve substantially the same spectral responsivity curve in the corresponding incident light wavelength range of 0.4 μm to 0.9 μm. As shown in Figure 12, the photodiode 100 provided by the embodiment of the present application achieves a reduction in dark current compared to the comparative example, with the dark current reduction in the embodiment of the present application exceeding 60%.

[0122] 13 , which shows steps of a method for manufacturing a photodiode in some other embodiments of the present application. The method 1000 for manufacturing a photodiode provided in an embodiment of the present application includes step S102B and step S103B.

[0123] Illustratively, the method for manufacturing a photodiode provided by the embodiment shown in FIG. 13 of the present application is described in detail below in conjunction with FIG. 14 to FIG. 19 .

[0124] 14 , in some embodiments, the method 1000 for manufacturing a photodiode further includes step S101B: forming an epitaxial layer 2 stacked on the substrate 1 .

[0125] The substrate 1 has a first doping type, which may be hole-type doping. For example, the substrate 1 has a heavily P-type doping. The material of the substrate 1 may include a semiconductor material, such as at least one of silicon, silicon germanium, germanium, and a Group III-V compound.

[0126] Exemplarily, the epitaxial layer 2 is formed by an epitaxial process. The epitaxial layer 2 has a first doping type, whose doping concentration is lower than the doping concentration of the substrate 1, for example, lightly doped P-type. The material of the epitaxial layer 2 may include silicon. The epitaxial layer 2 is stacked on the substrate 1 along the Z-axis direction and can be extended along the XY plane (Figure 22). Optionally, the size of the epitaxial layer 2 along the normal of the extension surface is in the range of 5μm to 100μm. This can ensure the quality of the epitaxial layer 2 and facilitate subsequent processing of the epitaxial layer 2.

[0127] In the manufacturing method provided in the embodiment of the present application, the structure obtained in each step can be referred to as a prefabricated structure for the subsequent step. For example, the epitaxial layer in step S101 can be referred to as a prefabricated epitaxial layer.

[0128] Referring to Figures 15 and 16 , step S102B includes forming a plurality of grooves 20 extending into the epitaxial layer 2. For example, in step S102B, a patterned mask layer 10 is first formed, and then the plurality of grooves 20 are formed using the mask layer 10. The mask layer 10 may be made of silicon nitride or silicon oxide. The grooves 20 may be formed using dry etching or wet etching, and the direction in which the grooves 20 extend may be substantially parallel to the Z-axis.

[0129] For example, a groove 20 with an inclination angle is formed. The sidewall of the groove 20 is inclined relative to the Z-axis direction. In other words, the groove size of the groove 20 can be larger than the groove bottom size. The distance between the top surface of the epitaxial layer 2 and the bottom surface of the groove 20, that is, the groove depth H of the groove 20, can be in the range of 0.5μm to 10μm, for example, 1μm, 3μm, 5μm or 8μm. For example, the depth of each groove 20 in Figure 16 is basically the same, and the spacing between each groove 20 can be basically the same. The groove 20 does not penetrate the epitaxial layer 2. For example, if the thickness of the epitaxial layer 2 is 5μm, the depth of the groove 20 can be 0.8μm.

[0130] Referring to Figure 17 , step S103B includes forming a collection layer 3. This collection layer 3 can be formed by an ion implantation process. The top surface of the epitaxial layer 2 and the bottom surface of the recess 20 are both ion implanted surfaces, as are the sidewalls of the recess 20. This ion implantation process forms an integrated collection layer 3.

[0131] The collection layer 3 has a second doping type, which is different from the first doping type. For example, when the first doping type is hole-type doping, the second doping type is electron-type doping. The collection layer 3 may have N-type doping.

[0132] The collection layer 3 includes a first collection portion 31 and a second collection portion 32. Multiple first collection portions 31 are arranged intersectingly with multiple grooves 20 along the X-axis. The first collection portion 31 extends from the top surface of the epitaxial layer 2 into the epitaxial layer 2. The second collection portion 32 extends from the bottom end of the groove 20 into the epitaxial layer 2. The thickness of the second collection portion 32 and the first collection portion 31 can be substantially the same. Along the Z-axis, the second collection portion 32 extends further into the epitaxial layer 2 than the first collection portion 31. Specifically, the distance between the second collection portion 32 and the same side of the first collection portion 31 can be referred to as the step difference between the two, which is also the depth of the groove 20, i.e., the groove depth H. The second collection portion 32 also does not extend beyond the epitaxial layer 2.

[0133] Exemplarily, the collecting layer 3 further includes a third collecting portion 33, which extends from the sidewall of the groove 20 into the epitaxial layer 2. The first collecting portion 31 can be connected to the second collecting portion 32 via the third collecting portion 33. During the ion implantation process, the extension depth of the first collecting portion 31 can be less than the depth of the groove 20.

[0134] In some embodiments, the ion implantation process is an inclined ion implantation process, which can be used to simultaneously form the first collecting portion 31, the second collecting portion 32, and the third collecting portion 33, and illustratively, also form the auxiliary collecting portion 34. The method 1000 for manufacturing a photodiode also includes an annealing diffusion step to activate the doping elements, and the doping characteristics of each part of the collecting layer 3 are basically the same. The extension direction of the collecting layer 3 is deflected, and the size of the perpendicular line of the collecting layer 3 on its extension surface is relatively balanced. Optionally, the angle of the inclined ion implantation can be adjusted within the range of 3° to 45° to ensure the implantation effect on the side wall of the groove 20 and the performance of the third collecting portion 33.

[0135] As shown in Figure 17, epitaxial layer 2 has a first region, a second region, and a third region. The first region is the α region, the second region is the β region, and the third region is the γ region. The second region may separate the first and third regions. Exemplarily, collection layer 3 and recess 20 are located in the second region. In other embodiments, collection layer 3 includes an auxiliary collection portion 34 located in the first region and extending from the illustrated top surface of epitaxial layer 2 into epitaxial layer 2. Auxiliary collection portion 34 is connected to first collection portion 31 or to third collection portion 33.

[0136] The epitaxial layer 2 may include a first dielectric portion 21, a second dielectric portion 22, and a third dielectric portion 23. The first dielectric portion 21 and the second collecting portion 32 are stacked along the Z-axis. The second dielectric portion 22 may be stacked along the Z-axis with the first collecting portion 31. The third dielectric portion 23 may be parallel to the first collecting portion 31 and located in the third region.

[0137] Referring to Figure 18, the method 1000 for manufacturing a photodiode provided in an embodiment of the present application can form a photodiode 100 based on an epitaxial layer 2 and a collection layer 3 (Figure 19). The shape of the collection layer 3 cooperates with the epitaxial layer 2 to form a space charge region 5 with a special shape. The method 1000 can flexibly and precisely adjust the performance of the photodiode 100 to produce a photodiode 100 with high quantum efficiency and sensitive response.

[0138] Exemplarily, the method 1000 for manufacturing a photodiode further includes step S104B: forming a pinning layer 4 stacked on the collection layer 3. In some embodiments, the pinning layer 4 can be formed by a low-energy ion implantation process and annealing activation. The pinning layer 4 has a first doping type, for example, a heavily P-type doping. The extension depth of the pinning layer 4 is relatively shallow, and it can extend into the collection layer 3 and the epitaxial layer 2. The pinning layer 4 can isolate the surface state and can isolate the influence of the surface damage defects caused when the groove 20 is formed on the performance of the collection layer 3 and the epitaxial layer 2. In addition, the pinning layer 4 helps to regulate the space charge region 5 and helps to clamp the dark current.

[0139] The pinning layer 4 includes a first pinning portion 41, a second pinning portion 42 and a third pinning portion 43. The first pinning portion 41 covers the first collecting portion 31. Specifically, the first pinning portion 41 is located on the side of the first collecting portion 31 that is away from the epitaxial layer 2 along the Z-axis direction. The second pinning portion 42 is located at the bottom end of the groove 20, and the second pinning portion 42 covers the second collecting portion 32. The third pinning portion 43 protrudes from the boundary of the collecting layer 3 in the X-axis direction, which helps to prevent the collecting layer 3 from being directly connected to the top surface of the third dielectric portion 23, that is, to prevent the collecting layer 3 from being connected to the top surface of the epitaxial layer 2 in the third region. Exemplarily, the fourth pinning portion (not marked) of the pinning layer 4 covers the third collecting portion 33. The pinning layer 4 leaves a window in the first region, and the auxiliary collecting portion 34 is not covered by the pinning layer 4.

[0140] Mainly influenced by the collection layer 3, a space charge region 5 forms within the epitaxial layer 2. This space charge region 5 also serves as the photosensitive region of the photodiode 100. Space charge region 5 comprises a first space charge region 51 and a second space charge region 52. Along the Z-axis shown in the figure, the first space charge region 51 is located below the first collection portion 31, and the second space charge region 52 is located below the second collection portion 32. The second space charge region 52 is located deeper within the epitaxial layer 2 along the Z-axis than the first space charge region 51. The portion of the space charge region 5 located to the side of the collection layer 3 is controlled.

[0141] In some embodiments, the photodiode manufactured by the method 1000 for manufacturing a photodiode is a front-illuminated photodiode. In use, light is irradiated through the pinned layer into the collection layer and the epitaxial layer.

[0142] 19 , in some embodiments, the method 1000 for manufacturing a photodiode further includes: step S105B, forming a first electrode region 6 ; step S106B, forming a second electrode region 7 ; and step S107 , removing the substrate 1 .

[0143] The first electrode region 6 can be formed by an ion implantation process and a heat treatment. The first electrode region 6 is located in the third region and is connected to the epitaxial layer 2. The first electrode region 6 can extend into the epitaxial layer 2, specifically, into the third dielectric portion 23. The first electrode region 6 has a first doping type and a doping concentration greater than the doping concentration of the epitaxial layer 2. For example, a high dose of nitrogen ions or phosphorus ions can be implanted to provide the first electrode region 6 with a heavily N-type doping.

[0144] The second electrode region 7 can be formed by an ion implantation process and annealing activation. The second electrode region 7 is located in the first region, and the second electrode region 7 is connected to the collection layer 3. The second electrode region 7 can extend into the collection layer 3, specifically, the second electrode region 7 can extend into the auxiliary collection portion 34. Exemplarily, the second electrode region 7 is spaced apart from the pinning layer 4. The second electrode region 7 has a second doping type and a doping concentration greater than the doping concentration of the collection layer 3, for example, by high-dose boron ion or aluminum ion implantation to achieve P-type heavy doping.

[0145] For example, an electrode structure (not shown) is formed on the side of the epitaxial layer 2 facing away from the substrate 1 . In the electrode structure, the first metal electrode can make ohmic contact with the first electrode region 6 , and the second metal electrode can make ohmic contact with the second electrode region 7 .

[0146] Referring to Figure 19, by removing the substrate 1, the method 1000 for manufacturing a photodiode provided in an embodiment of the present application can manufacture a back-illuminated photodiode. Exemplarily, the method 1000 also includes a step of thinning the epitaxial layer 2, and the epitaxial layer 2 can be thinned to a target thickness. The side of the epitaxial layer 2 facing away from the collection layer 3 along the Z-axis direction can be called the back side, which is also the light incident side. The back side and the space charge region 5 can be separated by a gap. The distance between the first space charge region 51 and the back side of the epitaxial layer 2 is farther than the distance between the second space charge region 52 and the back side of the epitaxial layer 2.

[0147] Referring to Figure 19, the photodiode 100 can produce a photoelectric effect under the action of back-incident light. Photons entering the epitaxial layer 2 will generate photogenerated carriers. If generated in the space charge region 5, they will be quickly collected in the second electrode region 7. If generated outside the space charge region 5 in the epitaxial layer 2, they need to diffuse into the space charge region 5 first and then be collected by the second electrode region 7. The second space charge region 52 with a deeper position below the groove 20 can shorten the diffusion distance of the photogenerated carriers, which is beneficial to improving the quantum efficiency and response speed of the short-wave band; in the area without the groove 20, the epitaxial layer 2 has a thicker silicon layer thickness to ensure the quantum efficiency of the long wave; since the absolute width of the space charge region 5 has not increased, it will not cause an increase in dark current.

[0148] With reference to Figures 19, 20, 21 and 24, the embodiments of the present application are compared with the comparative examples. For example, the sum of the projected areas of all the second grooves 20 along the extension direction is 20% to 40% of the projected area of ​​the collection layer 3 along the extension direction, that is, the sum of the projected areas of all the second grooves 20 along the Z-axis direction on the XY plane is 20% to 40% of the projected area of ​​the collection layer 3 along the Z-axis direction on the XY plane; the depth of the groove 20 is 0.5μm to 10μm, and the ratio of the groove depth H to the groove width W of the groove 20 is within 10:1. The groove width W of the above-mentioned groove 20 refers to the distance between the two opposite sides of the groove 20 on the top surface of the epitaxial layer 2. For example, 3 to 8 grooves 20 are set at equal intervals, and the groove widths of the grooves 20 are equal.

[0149] In some comparative examples, the epitaxial layer 2 has no groove 20 formed therein, and a flat collection layer 3 is formed, and a pinning layer 4 may also be formed.

[0150] As shown in Figure 20, Figure 20 shows a comparison of the spectral responsivity curves of the embodiment of the present application and the comparative example. In the process of increasing the wavelength of the incident light, the spectral responsivity of the comparative example without grooves first rises and then falls, and the highest spectral responsivity is obtained at about 0.64μm wavelength. The embodiment of the present application with grooves has a higher spectral responsivity in the short-wave band, and has the highest spectral responsivity at around 0.62μm wavelength; the embodiment of the present application achieves a spectral responsivity that is basically the same as that of the comparative example around 0.8μm wavelength; and furthermore, it shows a higher spectral responsivity in the band above 0.84μm wavelength.

[0151] On the other hand, as shown in FIG21 , the embodiment of the present application does not have a significant change in dark current compared to the comparative example, that is, the dark current is not increased.

[0152] Referring to FIG22 , in the method 1000 for manufacturing a photodiode, the step of forming a plurality of grooves 20 extending into the epitaxial layer 2 includes: etching to form a plurality of grooves 20 spaced apart. The notch area of ​​the groove 20 is greater than the bottom area of ​​the groove 20. Exemplarily, the notch area of ​​the groove 20 refers to the projected area of ​​the opening region of the groove 20 on the XY plane, and the bottom area of ​​the groove 20 refers to the projected area of ​​the bottom region of the groove on the XY plane. Exemplarily, in some embodiments, the width of the opening of the groove 20 is greater than the width of the bottom of the groove 20, such that the notch area of ​​the groove 20 is greater than the bottom area of ​​the groove 20. Multiple grooves 20 can be arranged side by side in the XY plane. The semiconductor structure shown in FIG22 can be a portion of the photodiode 100, and the β region can actually surround the α region in the XY plane.

[0153] Referring to FIG. 23 , in method 1000 for manufacturing a photodiode, the step of forming a plurality of grooves 20 includes etching to form a plurality of grooves 20 arranged in an array. The cross-section of the grooves 20 in the Z-axis direction can be rectangular, circular, or other shapes. The grooves 20 can be arranged in rows and columns, in a honeycomb pattern, or of varying sizes. The grooves 20 are evenly distributed throughout the second region.

[0154] Referring to FIG. 24 , in a method 1000 for manufacturing a photodiode, the step of forming a plurality of grooves 20 includes: etching to form a plurality of first grooves 201; and etching to form a plurality of second grooves 202 spaced apart from the first grooves 201 along the X-axis. In other embodiments, etching to form a plurality of first grooves 201 is performed, and then second grooves 202 are formed on a portion of the first grooves 201. The depth of the second grooves 202 is greater than the depth of the first grooves 201.

[0155] For example, the depth of the groove 20 is 0.5 μm to 10 μm, and the ratio of the groove depth H to the groove width W of the groove 20 is within 10:1, for example, 5:1. The ratio of the groove depth H2 of the second groove 202 to the groove depth H1 of the first groove 201 is in the range of 1.5:1 to 5:1, for example, 2:1. The ratio of the number of second grooves 202 to the number of first grooves 201 is in the range of 3:1 to 1:3, for example, 1:2.

[0156] 25 , a method 1000 for manufacturing a photodiode may form a back-illuminated photodiode 100 . In this embodiment, the steps after forming the groove 20 may refer to the aforementioned embodiment and will not be described in detail.

[0157] In the photodiode 100 shown in FIG25 , the second collecting portion 32 includes a first deep region 321 corresponding to the first groove 201 and a second deep region 322 corresponding to the second groove 202. The second space charge region 52 of the space charge region 5 includes a first sensing region 521 corresponding to the first deep region 321 and a second sensing region 522 corresponding to the second deep region 322. The second sensing region 522 is closer to the light incident surface of the epitaxial layer 2 than the first sensing region 521.

[0158] Exemplarily, the sum of the projected areas of all the grooves 20 along the extension direction is 20% to 80% of the projected area of ​​the collection layer 3 along the extension direction.

[0159] Referring to Figures 26 and 27 , the photodiodes of three embodiments of the present application are compared. Specifically, the photodiode of one embodiment is obtained by forming grooves of different depths (hereinafter referred to as "double grooves"). The photodiode of another embodiment is obtained by forming grooves of the same depth but shallower. The photodiode of yet another embodiment is obtained by forming grooves of the same depth but deeper. For example, all three embodiments are back-illuminated photodiodes.

[0160] As shown in Figure 26, the spectral responsivity curves of the three embodiments show essentially the same trends. Within the range of incident light wavelengths less than 5.8 μm, the spectral responsivities of the photodiodes obtained using the double-groove process and the deep-groove process are higher and essentially the same. Within the range of incident light wavelengths greater than 0.6 μm, the spectral responsivities of the photodiodes obtained using the double-groove process are intermediate.

[0161] As shown in FIG. 27 , the dark current levels of the three embodiments are substantially the same.

[0162] In the embodiment of the present application, the second sensing region 522 and the first sensing region 521 of the photodiode 100 obtained by forming grooves of different depths are located at different depths, allowing for more precise control of the quantum efficiency of the photodiode 100 at different wavelengths. The second deep region 322 is closer to the light incident surface of the epitaxial layer 2, thereby improving the short-wavelength responsivity of the photodiode 100 while minimizing the decrease in long-wavelength responsivity and preventing an increase in dark current.

[0163] Referring to Figures 19 and 25 , an embodiment of the present application provides a photodiode 100 comprising an epitaxial layer 2 and a collection layer 3. A space charge region 5 is formed within the epitaxial layer 2, which generates a photoelectric effect. The photodiode 100 of the embodiment of the present application can be manufactured using the aforementioned method.

[0164] The epitaxial layer 2 has a first doping type. The collection layer 3 is an integrated structure, and the collection layer 3 can extend into the epitaxial layer 2 from the first side.

[0165] The collection layer 3 includes a plurality of first collection portions 31 and a plurality of second collection portions 32. The first collection portions 31 and the second collection portions 32 are arranged alternately. With respect to the first side, the second collection portions 32 extend further into the epitaxial layer 2 than the first collection portions 31 along the extension direction.

[0166] By means of the collection parts at different depths, the space charge region 5 in the photodiode 100 includes sensing regions at different depths, so that the photodiode 100 has better quantum efficiency and faster response speed without increasing dark current.

[0167] Exemplarily, the collection layer 3 further includes a plurality of third collection portions 33. Adjacent first collection portions 31 and second collection portions 32 are spaced apart along the extension direction (i.e., the Z-axis) and spaced apart along the parallel direction (i.e., the X-axis). The extension dimension of the first collection portion 31 along the Z-axis is smaller than the step difference between the first collection portion 31 and the second collection portion 32. The third collection portion 33 connects the first collection portion 31 and the second collection portion 32.

[0168] For example, the sum of the projected areas of all second collecting portions 32 along the extension direction is 20% to 80% of the projected area of ​​the collection layer 3 along the extension direction. That is, the sum of the projected areas of all second collecting portions 32 along the Z-axis on the XY plane is 20% to 80% of the projected area of ​​the collection layer 3 along the Z-axis on the XY plane. The step difference between the second collecting portions 32 and the first collecting portions 31 along the extension direction is 0.5 μm to 10 μm. The ratio of the step difference to the spacing between two adjacent first collecting portions 31, and also the ratio of the step difference to the groove width W of the groove 20, that is, the ratio of the groove depth H to the groove width W of the groove 20, is within 10:1.

[0169] Exemplarily, the second collecting portion 32 includes a first deep region 321 and a second deep region 322. The second deep region 322 extends further into the epitaxial layer 2 than the first deep region 321. For a back-illuminated photodiode 100, the second deep region 322 is closer to the light incident surface of the epitaxial layer 2, while the first deep region 321 is further away.

[0170] For example, the ratio of the first step difference between the second deep region 322 and the first collecting portion 31 along the extension direction to the second step difference between the first deep region 321 and the first collecting portion 31 along the extension direction is in the range of 1.5:1 to 5:1. The ratio of the number of second deep regions 322 to the number of first deep regions 321 is in the range of 3:1 to 1:3.

[0171] Exemplarily, the photodiode 100 further includes a pinning layer 4, which is located on the side of the collection layer 3 facing away from the epitaxial layer 2. The pinning layer 4 includes a first pinning portion 41 stacked on the first collection portion 31, a second pinning portion 42 stacked on the second collection portion 32, and a third pinning portion 43 protruding from the boundary of the collection layer 3. The pinning layer 4 may be filled with or covered with an insulating material. Exemplarily, in the direction of the X-axis, the first pinning portion 41 extends from the edge A of the groove 20 close to the third region toward the third region to the edge B of the first collection portion 31, the second pinning portion 42 extends from the edge A of the groove 20 in a direction away from the third region to the edge C of the second collection portion 32 away from the third region, and the third pinning portion 43 extends from the edge B of the first collection portion 31 close to the third region toward the third region.

[0172] As shown in FIG28 , the present embodiment further provides an electronic component 300 comprising a photodiode 100 and a circuit 200 . The specific structure of the photodiode 100 may be the structure of the aforementioned embodiment. The epitaxial layer 2 and the collection layer 3 of the photodiode 100 are electrically connected to the circuit 200 .

[0173] The electronic component 300 can utilize the photoelectric effect to realize electrical functions, and has high efficiency and sensitive response.

[0174] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0175] In the embodiments of the above application, unless otherwise clearly specified and limited, the order of execution of each step is not limited, for example, it can be executed in parallel, or it can be executed in sequence in different orders. The sub-steps of each step can also be executed in an interleaved manner. The above various forms of processes can be used, and steps can also be reordered, added or deleted. As long as the desired results of the technical solutions provided in the embodiments of the present application can be achieved, this document is not limited here.

[0176] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A method for manufacturing a photodiode, characterized in that, Comprising: Forming a regulating structure (3A) extending into the epitaxial layer (2), the regulating structure (3A) including a plurality of regulating regions (30) arranged at intervals, the epitaxial layer (2) having a first doping type, the regulating regions (30) having the first doping type, and the doping concentration of the regulating regions (30) being greater than the doping concentration of the epitaxial layer (2); And Forming a collecting layer (3) extending into the regulating structure (3A) and the epitaxial layer (2), and at least part of the boundary being within the boundary of the regulating structure (3A), the collecting layer (3) having a second doping type.

2. The method for manufacturing a photodiode according to claim 1, wherein, The epitaxial layer (2) has a first region, a second region and a third region, the regulating structure (3A) is located in the second region, and the first region is within the second region and is the region where the electrode connected to the regulating structure is located; The method further includes: Forming a pinning layer (4) having the first doping type, the pinning layer (4) including a first pinning portion (41) stacked on the regulating structure (3A) and a second pinning portion (42) located in the third region and protruding beyond the boundary of the regulating structure (3A).

3. The method for manufacturing a photodiode according to claim 2, wherein, Further comprising: Forming a first electrode region (6) located in the third region and connected to the epitaxial layer (2), the first electrode region (6) having the first doping type and a doping concentration greater than the doping concentration of the epitaxial layer (2); Forming a second electrode region (7) located in the first region and connected to the collecting layer (3), the second electrode region (7) having the second doping type and a doping concentration greater than the doping concentration of the collecting layer (3); Forming a first antireflection film (8) stacked on the pinning layer (4); and Forming a first passivation layer (9) stacked on the first antireflection film (8).

4. The method for manufacturing a photodiode according to claim 2, wherein, Further comprising: Epitaxially forming the epitaxial layer (2) stacked on the substrate (1), the regulating structure (3A) extending into the epitaxial layer (2) from the side of the epitaxial layer (2) facing away from the substrate (1); Removing the substrate (1); Forming a second antireflection film (11) stacked on the epitaxial layer (2), the second antireflection film (11) being located on the side of the epitaxial layer (2) facing away from the pinning layer (4); and Forming a second passivation layer (12) stacked on the second antireflection film (11).

5. A photodiode, characterized in that, Comprising: An epitaxial layer (2) having a first doping type; A regulating structure (3A) extending into the epitaxial layer (2), the regulating structure (3A) including a plurality of regulating regions (30) arranged at intervals, the regulating regions (30) having the first doping type and a doping concentration greater than the doping concentration of the epitaxial layer (2); and A collecting layer (3) extending into the regulating structure (3A) and the epitaxial layer (2), and at least part of the boundary being within the boundary of the regulating structure (3A), the collecting layer (3) having a second doping type.

6. The photodiode according to claim 5, wherein, The epitaxial layer (2) has a first region, a second region and a third region, and the regulating structure (3A) is located in the second region; The photodiode (100) further includes a pinning layer (4) having the first doping type. The pinning layer (4) includes a first pinning portion (41) laminated on the adjusting structure (3A) and a second pinning portion (42) located in the third region to protrude beyond the boundary of the adjusting structure (3A).

7. The photodiode according to claim 6, wherein, It further includes a substrate (1) having the first doping type. The substrate (1) is located on the side of the epitaxial layer (2) facing away from the pinning layer (4), and the doping concentration of the substrate (1) is greater than that of the epitaxial layer (2). The resistivity of the epitaxial layer (2) is greater than 100 Ω·cm.

8. The photodiode according to claim 7, wherein, It further includes a first electrode region (6), a second electrode region (7), a first antireflection film (8), and a first passivation layer (9). The first electrode region (6) is located in the third region and is connected to the epitaxial layer (2). The first electrode region (6) has the first doping type and a doping concentration greater than that of the epitaxial layer (2). The second electrode region (7) is located in the first region and is connected to the collection layer (3). The second electrode region (7) has the second doping type and a doping concentration greater than that of the collection layer (3). The first antireflection film (8) is laminated on the pinning layer (4). The first passivation layer (9) is laminated on the first antireflection film (8).

9. The photodiode according to claim 6, wherein, It further includes a second antireflection film (11) and a second passivation layer (12). The second antireflection film (11) is laminated on the epitaxial layer (2), and the second antireflection film (12) is located on the side of the epitaxial layer (2) facing away from the pinning layer (4). The second passivation layer (12) is laminated on the second antireflection film (11). Wherein, the total area of all the adjustment regions (30) is 50% to 70% of the contour area of the adjustment structure (3A).

10. A method for manufacturing a photodiode, characterized in that, It includes: Forming a plurality of grooves (20) extending into the epitaxial layer (2). The epitaxial layer (2) has the first doping type. And Performing an ion implantation process on the epitaxial layer (2) to form a collection layer (3) having the second doping type. Wherein, the collection layer (3) includes a plurality of first collection portions (31) arranged alternately with the plurality of grooves (20) and a plurality of second collection portions (32) extending from the bottom ends of the grooves (20) into the epitaxial layer (2).

11. The method for manufacturing a photodiode according to claim 10, wherein, The step of forming the plurality of grooves (20) extending into the epitaxial layer (2) includes: etching to form a plurality of grooves (20) arranged side by side or in an array, and the notch area of the grooves (20) is larger than the bottom area of the grooves (20). The step of forming the collection layer (3) includes: forming a third collection portion (33) connecting the first collection portion (31) and the second collection portion (32) by oblique ion implantation.

12. The method for manufacturing a photodiode according to claim 10, wherein, The step of forming the plurality of grooves (20) includes: etching to form a plurality of first grooves (201) arranged at intervals; etching to form a plurality of second grooves (202) arranged at intervals with the first grooves (201), and the depth of the second grooves (202) is greater than the depth of the first grooves (201).

13. The method for manufacturing a photodiode according to claim 12, wherein, The sum of the projected areas of all the grooves (20) in the extending direction is 20% to 80% of the projected area of the collection layer (3) in the extending direction; The depth of the groove (20) is 0.5 μm to 10 μm, and the ratio of the groove depth to the groove width of the groove (20) is within 10:1; The ratio of the groove depth of the second groove (202) to the groove depth of the first groove (201) is in the range of 1.5:1 to 5:1, and the ratio of the number of the second grooves (202) to the number of the first grooves (201) is in the range of 3:1 to 1:

3.

14. The method for manufacturing a photodiode according to claim 10, wherein, The epitaxial layer (2) has a first region, a second region and a third region, and the plurality of grooves (20) are located in the second region; The method further includes: Epitaxially forming the epitaxial layer (2) stacked on the substrate (1); and Forming a first electrode region (6) located in the third region and connected to the epitaxial layer (2), the first electrode region (6) having the first doping type and a doping concentration greater than the doping concentration of the epitaxial layer (2); Forming a second electrode region (7) located in the first region and connected to the collection layer (3), the second electrode region (7) having the second doping type and a doping concentration greater than the doping concentration of the collection layer (3); and Removing the substrate (1).

15. The method for manufacturing a photodiode according to claim 10, wherein, The method further includes: forming a pinning layer (4) stacked on the collection layer (3), the pinning layer (4) including a first pinning portion (41) covering the first collection portion (31), a second pinning portion (42) located at the bottom end of the groove (20), and a third pinning portion (43) protruding beyond the boundary of the collection layer (3).

16. A photodiode, characterized in that, Including: An epitaxial layer (2) having a first doping type; And An integral collection layer (3), the collection layer (3) extending into the epitaxial layer (2), the collection layer (3) including a plurality of first collection portions (31) and a plurality of second collection portions (32), the plurality of first collection portions (31) and the plurality of second collection portions (32) being arranged alternately; the position of the second collection portion (32) in the extending direction is more extended into the epitaxial layer (2) than the position of the first collection portion (31) in the extending direction.

17. The photodiode according to claim 16, wherein, The collection layer (3) further includes a plurality of third collection portions (33), adjacent first collection portions (31) and second collection portions (32) have a spacing in the extending direction and a spacing in the juxtaposed direction, and the third collection portions (33) connect the first collection portions (31) and the second collection portions (32).

18. The photodiode according to claim 16, wherein, The sum of the projected areas of all the second collection portions (32) in the extending direction is 20% to 80% of the projected area of the collection layer (3) in the extending direction; The step difference between the second collection portion (32) and the first collection portion (31) in the extending direction is 0.5 μm to 10 μm, and the ratio of the step difference to the spacing between adjacent two first collection portions (31) is within 10:1; The second collection part (32) includes a first deep region (321) and a second deep region (322). The position of the second deep region (322) along the extension direction extends deeper into the epitaxial layer (2) than the position of the first deep region (321) along the extension direction. The ratio of a first step difference between the second deep region (322) and the first collection part (31) along the extension direction to a second step difference between the first deep region (321) and the first collection part (31) along the extension direction is in the range of 1.5:1 to 5:1, and the ratio of the number of the second deep regions (322) to the number of the first deep regions (321) is in the range of 3:1 to 1:

3.

19. The photodiode according to claim 16, wherein, It further includes a pinning layer (4). The pinning layer (4) is located on a side of the collection layer (3) facing away from the epitaxial layer (2). The pinning layer (4) includes a first pinning part (41) laminated on the first collection part (31), a second pinning part (42) laminated on the second collection part (32), and a third pinning part (43) protruding beyond the boundary of the collection layer (3).

20. An electronic component, characterized in that, Comprising: The photodiode (100) according to any one of claims 5 to 9 and 16 to 19; and A circuit (200), the circuit (200) being electrically connected to the epitaxial layer (2) and the collection layer (3) of the photodiode (100) respectively.

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