Substrate processing system and substrate processing method

Abstract

With the purpose of forming a desired resist pattern by performing an acid treatment on a substrate, this substrate processing system comprises: a substrate placement unit on which the substrate is placed, the substrate having a lower layer film to be patterned using a resist film, the substrate being placed on the unit before formation of the resist film; and an acid supply mechanism that supplies an acidic gas or mist as a first processing fluid to the lower layer film of the substrate having been placed on the substrate placement unit.

Description

Substrate processing system and substrate processing method

[0001] The present disclosure relates to a substrate processing system and a substrate processing method.

[0002] In manufacturing semiconductor devices, photolithography is performed on semiconductor wafers (hereinafter referred to as wafers). Patent Document 1 discloses an apparatus for forming a resist film on a wafer, developing the resist film after exposure, and performing a hydrophobic treatment before forming the resist film.

[0003] JP 2013-004804 A

[0004] The present disclosure provides a technique that allows a desired resist pattern to be formed by subjecting a substrate to an acid treatment.

[0005] The substrate processing system of the present disclosure includes a substrate placement part for placing a substrate having an underlayer film for patterning using a resist film before the resist film is formed, and an acid supply mechanism for supplying an acidic gas or mist as a first processing fluid to the underlayer film of the substrate placed on the substrate placement part.

[0006] According to the present disclosure, a desired resist pattern can be formed by subjecting a substrate to an acid treatment.

[0007] FIG. 1 is a plan view showing a wafer processing system according to an embodiment; FIG. 2 is a longitudinal sectional front view showing the wafer processing system; FIG. 3 is a longitudinal sectional side view showing an acid treatment apparatus in the wafer processing system; FIG. 4 is a view showing surface changes of a wafer in a comparative embodiment; FIG. 5 is a view showing surface changes of a wafer in a comparative embodiment; FIG. 6 is a view showing surface changes of a wafer in a comparative embodiment; FIG. 7 is a view showing surface changes of a wafer in a comparative embodiment; FIG. 8 is a flow diagram of a wafer processing method according to an embodiment; FIG. 9 is a view showing surface changes of a wafer in an embodiment; FIG. 10 is a view showing surface changes of a wafer in an embodiment; FIG. 11 is a view showing surface changes of a wafer in an embodiment; FIG. 12 is a view showing surface changes of a wafer in an embodiment; FIG. 13 is a view showing surface changes of a wafer in an embodiment; FIG. 14 is a view showing surface changes of a wafer in an embodiment; FIG. 15 is a view showing surface changes of a wafer in an embodiment; FIG. 10 is a diagram showing a change in the surface of a wafer W due to wafer processing according to a second embodiment; FIG. 11 is a vertical sectional side view showing the operation of a heat treatment apparatus according to a second embodiment; FIG. 12 is a vertical sectional side view showing the operation of a heat treatment apparatus according to a second embodiment; FIG. 13 is a time chart showing the closing and opening of a damper during PAB; FIG. 14 is a diagram showing the operation of PAB after formation of an underlayer film; FIG. 15 is a graph showing the results of an evaluation test; FIG. 16 is a graph showing the results of an evaluation test.

[0008] First Embodiment A wafer processing system (substrate processing system) according to this embodiment will be described below with reference to the drawings. In this specification, elements having substantially the same functional configuration are designated by the same reference numerals, and redundant description will be omitted.

[0009] <Wafer Processing System> First, the configuration of a wafer processing system according to this embodiment will be described. Figures 1 and 2 are a plan view and a longitudinal sectional front view, respectively, that schematically show the configuration of the wafer processing system. In this embodiment, the wafer processing system 1 is described as an example of a photolithography processing system that performs a resist film forming process and a development process on a wafer W, which is a substrate.

[0010] 1, the wafer processing system 1 includes a cassette station 2 into which a cassette C containing a plurality of wafers W is loaded and unloaded, and a processing station 3 equipped with a plurality of various processing devices that perform predetermined processing on the wafers W. The wafer processing system 1 is configured by integrally connecting the cassette station 2 and an interface station 4 that transfers the wafers W between the processing station 3 and an exposure device (not shown) adjacent to the opposite side of the processing station 3. Note that, although two processing stations 3 are installed between the cassette station 2 and the interface station 4 as shown in FIG. 1, one processing station 3 or three or more processing stations may be installed.

[0011] The cassette station 2 is provided with a plurality of cassette mounting plates 21 and wafer transfer devices 22 and 23. The cassette station 2 uses the wafer transfer device 22 or 23 to transfer wafers between the cassettes C placed on the cassette mounting plate 21 and the processing station 3. To this end, the wafer transfer devices 22 and 23 are each provided with drive mechanisms in the X direction, Y direction, up and down direction, and around the vertical axis (θ direction) as needed, and may also be provided with drive mechanisms in all directions.

[0012] At least one of wafer transfer devices 22 and 23 is capable of transferring wafers to and from cassette C, and is also capable of transferring wafers W to and from processing station 3. The transfer of wafers W to and from processing station 3 refers to, for example, transferring wafers to and from third block G3, which includes a transfer device accessible by wafer transfer device 33 in processing station 3 (described later). Third block G3 may include multiple transfer devices (not shown) arranged vertically.

[0013] An inspection device (not shown) for inspecting the wafer W may be provided at a position accessible to either the wafer transfer device 22 or 23 .

[0014] The processing station 3 includes multiple blocks, e.g., three blocks G1, G2, and G4 (first, second, and fourth blocks). As shown in FIG. 2, multiple layers 31 each including the first and second blocks G1 and G2 are stacked vertically. For example, the first block G1 is provided on the front side of the processing station 3 (the negative X-direction side in FIG. 1), and the second block G2 is provided on the rear side of the processing station 3 (the positive X-direction side in FIG. 1). The fourth block G4 is provided on the interface station 4 side of the processing station 3 (the positive Y-direction side in FIG. 1) or at a connection point with another adjacent processing station 3. The fourth block G4 may include multiple transfer devices arranged vertically. The aforementioned third block G3 may also be provided within the processing station 3.

[0015] The first block G1 is provided with a plurality of processing devices, such as a patterning film forming device and a developing device (both not shown). The developing device is, for example, a liquid developing device that uses a developing solution for development. The patterning film forming device may include, for example, a resist film forming device as well as an anti-reflection film forming device.

[0016] For example, a plurality of processing devices may be arranged in a horizontal line, and the number, arrangement, and type of these processing devices may be selected arbitrarily.

[0017] These patterning film forming apparatuses and developing apparatuses, for example, supply a predetermined processing liquid or a predetermined gas onto the wafer W. In this manner, the patterning film forming apparatus forms a resist film used as a mask when forming a pattern on an underlying film, or forms an anti-reflection film for efficiently performing a light irradiation process, such as an exposure process. On the other hand, the developing apparatus removes a portion of the exposed resist film to form the uneven shape that serves as the mask.

[0018] For example, the second block G2 is provided with vertically and horizontally aligned heat treatment devices (not shown) for performing heat treatments such as heating and cooling of wafers W. The second block G2 also includes, although not shown, a hydrophobizing device for performing a hydrophobizing treatment to improve the fixation of the resist solution to the wafer W, an acid treatment device for supplying an acidic gas to the surface of the wafer W before the resist solution is applied, a peripheral exposure device for exposing the peripheral portion of the wafer W, and a gas developing device for performing a developing treatment using a developing gas. These devices are also similarly aligned vertically (in the Z direction in FIG. 2 ) and horizontally in the second block G2. The number and arrangement of these heat treatment devices, hydrophobizing devices, acid treatment devices, peripheral exposure devices, and gas developing devices can be selected as desired.

[0019] 1, a wafer transfer area 32 is formed in an area sandwiched between the first block G1 and the second block G2 in a plan view. In the wafer transfer area 32, for example, a wafer transfer device 33 is disposed.

[0020] The wafer transfer device 33 has a transfer arm 33a that is movable in, for example, the Y direction, the front-rear direction, the θ direction, and the up-down direction. The wafer transfer device 33 moves within the wafer transfer area 32 and can transfer the wafer W to predetermined devices in the surrounding first block G1, second block G2, third block G3, and fourth block G4. When there are multiple processing stations 3 as shown in Figure 1, the wafer transfer device 33 provided in the processing station 3 located on the interface station 4 side can transfer the wafer W to predetermined devices in the first, second, and fourth blocks G1, G2, and G4, as well as the fifth block G5 described below.

[0021] A plurality of wafer transfer devices 33 are arranged vertically, for example, as shown in FIG. 2 . One wafer transfer device 33 can transfer wafers W to a predetermined device located at the height of the upper layers 31 among the multiple layers 31 stacked vertically. Another wafer transfer device 33 can transfer wafers W to a predetermined device located at the height of the multiple layers 31 located below the above layers 31. A plurality of wafer transfer areas 32 are provided to enable such transfer of wafers W. Note that the number of wafer transfer devices 33 and the number of layers 31 corresponding to one wafer transfer device 33 can be selected arbitrarily, such as by providing a wafer transfer device 33 for each layer 31.

[0022] The wafer transfer area 32, the first block G1, or the second block G2 may also include a shuttle transfer device (not shown) that linearly transfers wafers W between a space adjacent to one side of the processing station 3 and another space adjacent to the opposite side.

[0023] The interface station 4 includes a fifth block G5 equipped with a plurality of transfer devices, and wafer transfer devices 41 and 42. The interface station 4 uses the wafer transfer device 41 or 42 to transfer the wafer W between the fifth block G5, where the wafer W is transferred by the wafer transfer device 33, and the exposure device. To this end, the wafer transfer devices 41 and 42 are each provided with drive mechanisms for the X direction, Y direction, up / down direction, and around the vertical axis (θ direction) as needed, and may also be provided with drive mechanisms for all directions. At least one of the wafer transfer devices 41 and 42 can support the wafer W and transfer the wafer W between the transfer device in the fifth block G5 and the exposure device.

[0024] A cleaning treatment device for cleaning the surface of the wafer W and the aforementioned peripheral exposure device may be provided in the interface station 4 at a position accessible to either of the wafer transfer devices 41 and 42 .

[0025] The inspection device may be provided in the cassette station 2 as described above, but it may also be provided in the processing station 3 and the interface station 4 at a position accessible to any of the wafer transport devices (33, 41, 42 in FIG. 1 or FIG. 2) provided inside each station.

[0026] The wafer processing system 1 described above is provided with a control device 100. The control device 100 is, for example, a computer, and has a program storage unit (not shown). The program storage unit stores a program for controlling the processing of wafers W in the wafer processing system 1. The program storage unit also stores a program that includes a set of steps for controlling the operation of drive systems such as the various processing devices and transfer devices described above to achieve wafer processing in the wafer processing system 1. The program may be recorded on a computer-readable storage medium H and installed into the control device 100 from the storage medium H.

[0027] <Operation of Wafer Processing System> The wafer processing system 1 is configured as described above. Next, an example of wafer processing performed using the wafer processing system 1 configured as described above will be described.

[0028] First, a cassette C containing a plurality of wafers W is carried into the cassette station 2 of the wafer processing system 1 and placed on the cassette mounting plate 21. Next, each wafer W in the cassette C is sequentially removed by the wafer transfer device 22 or 23 and transferred to the delivery device in the third block G3.

[0029] The wafer W transferred to the transfer device in the third block G3 is supported by the wafer transfer device 33 and transferred to the acid treatment device and hydrophobization device provided in the second block G2, in that order, for acid treatment and hydrophobization. The wafer W is then transferred by the wafer transfer device 33 to the resist film forming device, where a resist film is formed on the wafer W, and then transferred to the heat treatment device for pre-baking, before being transferred to the transfer device in the fifth block G5. When there are multiple processing stations 3 as shown in FIGS. 1 and 2 , the wafer W is temporarily placed in the transfer device in the fourth block G4 before being transferred to the transfer device in the fifth block G5, and then transferred between the multiple wafer transfer devices 33. If necessary, the wafer W may also be transferred by the wafer transfer device 33 to a peripheral exposure device, where the peripheral edge of the wafer is exposed.

[0030] The wafer W transferred to the transfer device in the fifth block G5 is transferred to the exposure device by wafer transfer devices 41 and 42, and is exposed to a predetermined pattern. The wafer W may be cleaned in a cleaning device before the exposure process.

[0031] The exposed wafer W is transferred to a transfer device in the fifth block G5 by the wafer transfer devices 41 and 42. Thereafter, the wafer W is transferred to a heat treatment device by the wafer transfer device 33 and subjected to post-exposure baking.

[0032] The wafer W that has been subjected to the post-exposure bake process is transferred by the wafer transfer device 33 to a liquid developing device and developed. After development is complete, the wafer W is transferred by the wafer transfer device 33 to a heat treatment device and subjected to a second post-exposure bake process. The wafer W is then transferred by the wafer transfer device 33 to a gas developing device and further developed. When repeated twice in this manner, the first post-exposure bake process and liquid developing process are processes performed to form the general shape of the pattern, and the second post-exposure bake process and gas developing process are processes performed to modify the shape of the pattern to the desired shape. The wafer W that has been subjected to the gas development process is transferred by the wafer transfer device 33 to a heat treatment device and subjected to a post-bake process.

[0033] The wafer W is then transferred by wafer transfer device 33 to the transfer device in third block G3, and then transferred by wafer transfer device 22 or 23 in cassette station 2 to a cassette C on a predetermined cassette mounting plate 21. This completes the photolithography process. Any unnecessary processing equipment listed above may not be provided, or processing in that equipment may not be performed.

[0034] The following describes in further detail each device in the wafer processing system 1, which is a substrate processing system, as follows: an acid processing device 5A that performs acid processing on a circular substrate, i.e., a wafer W, before coating with a resist liquid; a hydrophobizing device 5B that performs hydrophobizing processing; a coating device 5C that is a resist film forming device; a heat processing device 5D; a liquid developing device 5E; and a gas developing device 5F.

[0035] If the processing station 3 is divided into two sections, each consisting of multiple layers 31, vertically, then, for example, multiple acid treatment devices 5A and multiple hydrophobization devices 5B are provided in the second block G2 of each layer 31 constituting the lower section. In other words, while the dotted-line frames surrounding the multiple layers 31 are shown stacked vertically in FIG. 2 , the acid treatment devices 5A and the hydrophobization devices 5B are provided side by side in the second block G2 of each layer 31 enclosed by the lower dotted-line frame. The coating device 5C is provided, for example, in the first block G1 of each layer 31 constituting the lower section. The multiple heat treatment devices 5D perform pre-baking, post-exposure baking, and post-baking processes by appropriately setting the set temperature, heating time, etc. for each. For this reason, multiple heat treatment devices 5D are provided in the second block G2 of each layer 31 constituting the upper and lower sections. In each layer 31 forming the upper divided body, a liquid developing apparatus 5E is provided in the first block G1, and a gas developing apparatus 5F is provided in the second block G2.

[0036] With the devices 5A to 5F arranged in this manner, acid treatment, hydrophobic treatment, resist film formation treatment, and pre-baking treatment are performed in each layer 31 constituting the lower divided body, while post-exposure baking, liquid development treatment, and gas development treatment are performed in each layer 31 constituting the upper divided body.

[0037] <Acid Treatment Apparatus 5A> The structure of acid treatment apparatus 5A will be described below as a representative of these apparatuses 5A to 5F. FIG. 3 is a vertical cross-sectional side view showing a schematic outline of the configuration of acid treatment apparatus 5A. Acid treatment apparatus 5A includes a processing chamber 12 that includes a processing space S on a heating plate 11 (described later) and accommodates wafers W. Processing chamber 12 is composed of an upper chamber 12a located above and a lower chamber 12b located below that is integrated with upper chamber 12a and can seal the interior.

[0038] The lower chamber 12b is formed, for example, in a generally cylindrical shape with an upward opening and is provided to surround the lower and lateral sides of the hot plate 11. The hot plate 11 (substrate mounting portion) is supported on the bottom wall of the lower chamber 12b via a support pedestal 12d. The hot plate 11 is configured to support and heat a wafer W. The hot plate 11 has a thick, disk-like shape and includes, for example, a built-in heater 13. The heater 13 is, for example, a resistance heater. The temperature of the hot plate 11 is adjusted by, for example, controlling the heater 13 using a control device 100, thereby heating, for example, the wafer W mounted on the hot plate 11 to a predetermined temperature. Furthermore, the hot plate 11 is provided with a plurality of suction holes (not shown) for suctioning the wafer W to the hot plate 11 and a plurality of through-holes 11a located in the center of the hot plate 11.

[0039] Furthermore, the lower chamber 12b is provided with, for example, three lift pins 15 (only two are shown) below the hot plate 11 to support and elevate the wafer W from below. The lift pins 15 are raised and lowered by a lift mechanism 15a, which has a drive source (not shown), such as a motor, that generates a driving force for raising and lowering the lift pins 15. The lift pins 15 are inserted into the through holes 11a and can protrude from the upper surface of the hot plate 11.

[0040] The upper chamber 12a is configured to be freely raised and lowered by a lifting mechanism (not shown). The lifting mechanism has a drive source (not shown), such as a motor, that generates a driving force for raising and lowering the upper chamber 12a. The upper chamber 12a is formed, for example, in a generally cylindrical shape with an open bottom, and is provided with a shower head 14 inside. The shower head 14 has, for example, a generally disk shape and is provided so as to face the wafer W on the hot plate 11. The shower head 14 is attached to the upper chamber 12a with a gap interposed between it and the upper chamber 12a. A peripheral exhaust path 19b, which is this gap, is formed by the top surface 12c and side surface 12f of the upper chamber 12a and the top surface and side surface of the shower head 14.

[0041] The shower head 14 discharges an acidic gas and a purge gas toward the hot plate 11 in the processing space S. The acidic gas (first processing fluid) contains a vapor of an acidic solution L1, which is, for example, an aqueous solution of nitric acid, and an inert gas, such as nitrogen gas or argon (Ar).

[0042] The shower head 14 also has a plurality of discharge holes 14a and a distribution space 14b. The discharge holes 14a are each formed in the lower surface of the shower head 14. The discharge holes 14a are arranged substantially uniformly in an area of ​​the lower surface of the shower head 14 facing the wafer W placed on the hot plate 11, except for a central exhaust port 18a (described later). The distribution space 14b distributes the acidic gas and purge gas introduced into the shower head 14 and supplies them to each discharge hole 14a.

[0043] 3, a supply pipe 16a of a gas supply mechanism 16 for supplying an acidic gas and a purge gas is connected to the shower head 14. The supply pipe 16a is disposed so as to penetrate the upper surface portion 12c, the peripheral exhaust path 19b, and the upper surface portion of the shower head 14, and its downstream end opens into the distribution space 14b.

[0044] The gas supply mechanism 16 is composed of a supply pipe 16a and an acidic gas supply mechanism 16b and a purge gas supply mechanism 16c, which are respectively provided on the upstream sides of two branches of the supply pipe 16a, and supplies acidic gas and purge gas to the distribution space 14b of the showerhead 14. The acidic gas supply mechanism 16b, which is an acid supply mechanism, includes, for example, a tank 17a that stores an acidic solution L1, which is a raw material for the acidic gas, to generate the acidic gas, an inert gas supply unit 17b, and a supply equipment group 17c, and supplies the acidic gas to the supply pipe 16a. The supply equipment group 17c is provided downstream of the tank 17a and includes an on-off valve, a flow rate control valve, etc., that control the flow of the acidic gas.

[0045] The tank 17a generates acidic gas by bubbling the acidic solution L1 with an inert gas supplied from the inert gas supply unit 17b to vaporize the acidic solution L1. The tank 17a may also be provided with a heater (not shown) for heating the acidic solution L1 in order to promote the vaporization of the acidic solution L1.

[0046] The purge gas supply mechanism 16c includes a supply unit 17e that supplies an inert gas such as nitrogen gas or argon, and a group of supply equipment 17f that is provided downstream of the supply unit 17e and includes an on-off valve and a flow control valve that control the flow of the purge gas, and supplies the purge gas to the supply pipe 16a.

[0047] Furthermore, a central exhaust section 18 and a peripheral exhaust section 19 are provided on the top surface 12c of the upper chamber 12a. The central exhaust section 18 and the peripheral exhaust section 19 have a central exhaust port 18a and a peripheral exhaust port 19a, respectively, that open downward toward the processing space S, and exhaust air from the processing chamber 12, i.e., the processing space S, upward. The central exhaust port 18a is located near the center of the wafer W on the hot plate 11 as viewed from above (from the center in the illustrated example), and the peripheral exhaust port 19a is located on the peripheral side of the wafer W as viewed from above. Specifically, the peripheral exhaust port 19a is located at a position overlapping the peripheral edge of the wafer W and is an annular opening that surrounds the outer periphery of the shower head 14. Note that the peripheral exhaust port 19a may be a plurality of mutually separated exhaust ports arranged along the outer periphery of the shower head 14.

[0048] The peripheral exhaust section 19 includes the peripheral exhaust path 19b including the peripheral exhaust port 19a, and a peripheral exhaust pipe 19c that opens into the peripheral exhaust path 19b and penetrates the upper surface 12c. An exhaust device 19d such as a vacuum pump is connected to the downstream end of the peripheral exhaust pipe 19c, and a group of exhaust devices (not shown) having valves for adjusting the amount of exhaust air is provided upstream of the exhaust device 19d.

[0049] The central exhaust section 18 includes a central exhaust port 18a and a central exhaust pipe 18c extending upward. The central exhaust pipe 18c is provided to penetrate the upper surface portion 12c, the peripheral exhaust path 19b, and the showerhead 14. An exhaust device 18d such as a vacuum pump is connected to the downstream end of the central exhaust pipe 18c, and a group of exhaust equipment (not shown) including a valve for adjusting the exhaust rate is provided upstream of the exhaust device 18d.

[0050] 4 is loaded between the lower chamber 12b and the upper chamber 12a at the upper position, and the wafer W is placed on the heating plate 11, which has been set to a predetermined temperature, and heated. Next, the upper chamber 12a is lowered to the lower position, thereby forming a processing space S between the shower head 14 and the heating plate 11.

[0051] With the processing space S evacuated by the central exhaust unit 18 and the peripheral exhaust unit 19, an acidic gas is supplied to the processing space S by the action of the supply equipment group 17c. This acidic gas flows above the center and above the periphery of the processing space S through the central exhaust port 18a located on the center side of the wafer W in a top view and the peripheral exhaust port 19a located along the periphery of the wafer W, and is quickly exhausted from the processing space S. As a result, the entire top surface of the wafer W is oxidized.

[0052] After the supply of the acidic gas to the processing space S is stopped, the processing space S continues to be evacuated in the same manner as when the acidic gas was supplied, and a purge gas is supplied to the processing space S by the action of the supply equipment group 17f. This purge gas flows through the processing space S in the same manner as the acidic gas, and purges and removes the remaining acidic gas from the processing space S. Thereafter, the supply of the purge gas to the processing space S is stopped, the upper chamber 12a returns to the upper position, and the wafer W can be unloaded from the processing chamber 12.

[0053] <Other Apparatuses 5B to 5F> The other apparatuses 5B to 5F will be briefly described below, focusing on the differences from the acid treatment apparatus 5A. The hydrophobization apparatus 5B, heat treatment apparatus 5D, and gas developing apparatus 5F have generally the same structure as the acid treatment apparatus 5A. Instead of an acid gas supply mechanism, the hydrophobization apparatus 5B has a hydrophobization gas supply mechanism, the heat treatment apparatus 5D has an inert gas supply mechanism, and the gas developing apparatus 5F has a development gas supply mechanism.

[0054] The hydrophobization gas in the hydrophobization device 5B is, for example, a silane coupling agent, and more specifically, HMDS gas. A tank of the hydrophobization gas supply mechanism stores an HMDS solution and vaporizes the solution to generate HMDS gas.

[0055] In the gas developing device 5F, the developing gas is generated by vaporizing the developing solution contained in a tank of the developing gas supply mechanism through bubbling. An example of developing a positive resist film will be shown later, and in this case the developing solution is, for example, a TMAH (Tetramethyl ammonium hydroxide) aqueous solution.

[0056] Coating apparatus 5C and liquid developing apparatus 5E each include a mounting section that attracts and holds the center of the backside of wafer W, a rotation mechanism that rotates the mounting section, and a nozzle that supplies processing liquid to the front surface of wafer W, and are configured to supply processing liquid to the entire front surface of wafer W. Coating apparatus 5C supplies resist liquid as the processing liquid to wafer W and forms a resist film by spin coating. This resist is a so-called i-line resist that is exposed to i-lines with a wavelength of 365 nm irradiated from a mercury lamp in an exposure apparatus, for example.

[0057] The liquid developing apparatus 5E supplies a developer as a processing liquid to develop the resist film. The liquid developing apparatus 5E also supplies a cleaning liquid to the wafer W to remove the developer remaining on the wafer W after development. Therefore, a liquid flow of the developer and cleaning liquid can be formed on the wafer W from the center of the wafer W to the outside.

[0058] <Processing of Comparative Example> Before describing the wafer processing, which is the substrate processing of this embodiment, and the resulting changes to the surface of the wafer W, a brief description will be given of the wafer processing and the surface changes of the wafer W in the comparative example. Figures 4 to 7 are diagrams schematically showing the changes to the wafer surface in the comparative example. In the wafer processing of this comparative example, acid treatment by acid treatment apparatus 5A is not performed. Note that the resist film is a positive type, and the description will be given assuming that gas developing apparatus 5F is used for development, out of gas developing apparatus 5F and liquid developing apparatus 5E.

[0059] 4, before processing in the wafer processing system 1, an underlayer film 51 made of, for example, polycrystalline silicon (polysilicon) is formed on the wafer W, and the underlayer film 51 forms the surface of the wafer W. The underlayer film 51 is etched using a resist film patterned by development as a mask, thereby forming a pattern.

[0060] In wafer processing in the comparative example, a hydrophobization process is first performed in a hydrophobization apparatus 5B to replace hydrophilic groups on the surface of the underlayer film 51 with hydrophobic groups so that a developing fluid (a developing gas and a developing solution formed by liquefying the developing gas) does not penetrate between the underlayer film 51 and the resist film 53 during development. A resist film 53 is then formed in a coating apparatus 5C so as to contact the underlayer film 51. After PAB in a heat treatment apparatus 5D, exposure is further performed in an exposure apparatus, and PEB is performed in the heat treatment apparatus 5D on the wafer W having an exposed portion 53a formed in the resist film 53, as shown in FIG. 5 . The wafer W is then developed in a gas development apparatus 5F, whereby most of the exposed portion 53a is dissolved while the unexposed portion 53b remains, forming a resist pattern.

[0061] As shown in Figure 6, during this development, a portion of the exposed portion 53a adheres as insoluble matter 54 to the surface of the underlying film 51 exposed by development. This insoluble matter 54 remains attached to the underlying film 51 even when exposed to the flow of developing gas formed on the wafer W, and tends to remain as residue on the underlying film 51 even after development, as shown in Figure 7. If the insoluble matter 54 remains on the underlying film 51 in this manner, the residue of the insoluble matter 54 may act as a mask when the underlying film 51 is etched, which may cause unevenness on the bottom surface of a recess formed by etching or may result in insufficient etching of the underlying film 51 below the residue. In the following description, the insoluble matter 54 that remains as residue after development as described above may sometimes be referred to as residue 54 even during development.

[0062] The inventors speculated that the reason why residue 54 easily adheres to the surface of underlayer film 51 is that the molecules contained in resist film 53 that form residue 54 and the molecules that form polycrystalline silicon, which is underlayer film 51, have similar degrees of polarity and are of the same kind. In other words, molecules with similar degrees of polarity tend to have a high affinity for each other, and it was speculated that the adhesion of residue 54 to underlayer film 51 occurs due to the relationship between the molecules that form residue 54 and the molecules that form polycrystalline silicon. Note that "molecular polarities that are of the same kind" means that the molecules in question are both polar or both non-polar, and non-polar includes non-polar and low polarity that is relatively close to non-polar. The molecules that form polycrystalline silicon and the molecules that form residue 54 are both non-polar molecules.

[0063] <Processing of First Embodiment> In contrast to the processing of the comparative example, the wafer processing of the embodiment oxidizes the surface portion of the underlying film 51 by acid treatment to a limited extent, thereby suppressing adhesion of the residues 54 .

[0064] Hereinafter, with reference to FIG. 8, which is a flow diagram of the wafer processing method according to this embodiment, and FIGS. 9 to 14, which schematically show changes in the surface of the wafer W, the wafer processing according to this embodiment and changes in the surface of the wafer W will be described in detail.

[0065] 3, the wafer W transferred to the acid treatment device 5A is heated to a predetermined temperature, for example, 80° C. or higher, by being placed on the hot plate 11. In this heated state, the wafer W is exposed to the acid gas supplied to the treatment space S. As a result, the surface of the wafer W (the surface of the lower film 51) is oxidized, and SiO ２ An oxide film 52 made of silicon oxide (SiO 2 ) is formed (step S1 in FIG. 8). ２ Since is a polar molecule, the formation of this oxide film 52 can be said to be a process of modifying the underlying film 51 made of polycrystalline silicon so that the polarity of the surface of the underlying film 51 becomes high.

[0066] Next, the wafer W is transferred to the hydrophobizing apparatus 5B, and while heated to a predetermined temperature, is exposed to the HMDS gas supplied to the processing space S. This hydrophobizes the oxide film 52 on the surface of the wafer W. That is, a process is performed to prevent the intrusion of a developing fluid between the oxide film 52 and the resist film 53 during development (step S2).

[0067] Subsequently, the wafer W is transferred to the coating apparatus 5C. In the coating apparatus 5C, a resist solution is supplied to the hydrophobic surface of the oxide film 52, and a resist film 53 is formed in contact with the oxide film 52 as shown in FIG. 11 (step S3).

[0068] Thereafter, the wafer W is transported in this order to a heat treatment device 5D, an exposure device, and another heat treatment device 5D, where PAB, exposure, and PEB are performed, and the wafer W having the exposed portions 53a formed in the resist film 53 as in the comparative example is transported to a gas developing device 5F, where it is heated and exposed to a developing gas supplied to the processing space S. Most of the exposed portions 53a are dissolved, while the non-exposed portions 53b remain, forming a resist pattern (step S4).

[0069] During this development, as shown in FIG. 12, residues 54 generated from the exposed portion 53a remain on the surface of the exposed oxide film 52. However, the SiO ２The polarity of the residue 54 and the polarity of the molecules that make up the residue 54 are not similar, i.e., the polarities are far apart, so the affinity between the residue 54 and the oxide film 52 is low. Therefore, as shown in FIG. 13, the residue 54 is carried by the flow of the developing gas and removed from the oxide film 52. The residue 54 then flows into the exhaust port of the apparatus together with the developing gas. The supply of the developing gas is stopped, and the development process is completed. FIG. 14 shows the wafer W after the development process.

[0070] Thereafter, the underlying film 51 of the wafer W is etched using the resist film 53 as a mask. Since the residues 54 have been removed from the underlying film 51, the problems described in the comparative example are suppressed, and the pattern of the underlying film 51 formed by etching can have a desired shape. As described above, the wafer processing of this embodiment makes it possible to form a good resist pattern that can prevent etching from being hindered by the residues 54.

[0071] Although the example of developing using the gas developing apparatus 5F has been described, when developing using the liquid developing apparatus 5E, the formation of the oxide film 52 can similarly suppress adhesion of the residue 54 to the underlying film 51. Specifically, the residue 54 is removed from the wafer W by the liquid flow of the developing solution and cleaning solution formed on the wafer W.

[0072] <Regarding the Oxide Film 52> If the oxide film 52 is too thick, i.e., if oxidation of the lower layer film 51 progresses excessively and extends below the surface, etching of the lower layer film 51 and subsequent processes may not be performed as desired. Oxidation of the surface means that the average thickness H2 of the oxide film 52 (see FIG. 10 ) is, for example, 20% or less of the average thickness H1 of the lower layer film 51 (in other words, the oxide film 52 and the lower layer film 51) before the oxide film 52 is formed. To more reliably prevent the above-mentioned problems, it is more preferable to oxidize the oxide film 52 so that the average thickness H2 is, for example, 5% or less. The average thickness here refers to, for example, the average thickness at 10 or more randomly selected, mutually separated positions in the semiconductor device formation region of the wafer W.

[0073] It is also conceivable to perform the oxidation treatment of the underlayer film 51 by discharging an acidic solution L1 as a processing fluid from a nozzle to form a liquid flow between the wafer W and the nozzle. However, generating an acidic gas from the acidic solution L1 and supplying the acidic gas to the wafer W as a processing fluid reduces the amount of acid contained in a given volume of the processing fluid, thereby reducing the amount of reaction of the underlayer film 51 per given time. Furthermore, the time the processing fluid remains on the wafer W can be easily controlled by supplying and stopping the acidic gas to the processing space S, evacuating the processing space S, and stopping the supply of purge gas to the processing space S. In other words, performing the treatment using an acidic gas makes it easier to control the average film thickness H2 of the oxide film 52 so that it does not become excessively large. As described above, performing the oxidation treatment of the underlayer film 51 using an acidic gas can minimize the influence on the processing performed on the wafer W after the resist pattern is formed.

[0074] <Description of the Acid-Containing Developer Fluid (Second Processing Fluid)> While the above description has been given using an i-line resist as an example, any type of resist may be used, and depending on the resist, the developer may contain acid. Therefore, the system may be configured so that each of the developing apparatuses (5E, 5F) and the acid treatment apparatus 5A supplies acid to the wafer W. In this case, the purpose of the liquid developing apparatus 5E and the gas developing apparatus 5F is not oxidation treatment, but rather the acid treatment apparatus 5A is desirably to perform oxidation treatment reliably and quickly. Therefore, it is preferable that the acid solution L1 in the tank 17a of the acid treatment apparatus 5A has a higher titratable acidity than the developer in the tanks of the liquid developing apparatus 5E and the gas developing apparatus 5F. In other words, the acid treatment apparatus 5A has a higher oxidation reactivity. Note that the comparison of titratable acidity here is based on the assumption that the acid solution L1 and the developer are used in equal amounts (unit: L).

[0075] Therefore, if the acid solution L1 and the developer are each composed of the same compound and an acid is generated from a single compound in each of the acid solution L1 and the developer, it is preferable that the concentration of the acid-generating compound be higher in the acid solution L1 than in the developer. To give a specific example, if the resist used is a negative resist such as a metal oxide resist (MOR) exposed to EUV, a mixture of acetic acid and the organic solvent PGMEA (propylene glycol methyl ether acetate) can be used as the developer. In other words, acid is not generated from multiple types of compounds in the solution, but rather from a single compound (acetic acid). Even if a mixture of acetic acid and PGMEA is used as the acid solution L1, it is preferable that the concentration of acetic acid be higher in the acid solution L1 than in the developer.

[0076] <Explanation of Other Differences Between Acid Treatment Apparatus 5A and Gas Development Apparatus 5F> As described above, in the acid treatment apparatus 5A and the gas development apparatus 5F, acid-containing gases can be supplied to the wafer W as acidic gas and developing gas, respectively, for processing. However, in the acid treatment apparatus 5A, in order to ensure reliable and rapid oxidation, it is desirable to set the temperature of the wafer W during supply of acidic gas higher than the temperature of the wafer W during supply of developing gas. Note that although the heating and gas supply have been described as being performed while the wafer W is placed on the hot plate 11, the heating and gas supply may also be performed while the wafer W is separated from the hot plate 11 by the lift pins 15. The temperature of the wafer W during supply of acidic gas or developing gas is the temperature of the upper surface of the hot plate 11 when the wafer W is placed on the hot plate 11 and the temperature of the processing space S when the heating and gas supply are performed while the wafer W is separated from the hot plate 11.

[0077] In the acid treatment apparatus 5A and the gas developing apparatus 5F, a heater may be provided in the supply pipe 16a or the shower head 14 to heat the acidic gas. The heater outputs may be different between the acid treatment apparatus 5A and the gas developing apparatus 5F, so that the acidic gas in the acid treatment apparatus 5A has a higher temperature than the developing gas in the gas developing apparatus 5F. The action of these heaters and the action of the hot plate 11 may create a temperature difference between the processing space S of the acid treatment apparatus 5A and the processing space S of the gas developing apparatus 5F, that is, a temperature difference may be created between the wafers W on the lift pins as described above.

[0078] In the treatment by the acid treatment apparatus 5A and the gas developing apparatus 5F, the temperature of the wafer W when the acid gas is supplied may be set lower than the temperature of the wafer W when the developing gas is supplied, contrary to the examples described above. By doing so, it is possible to suppress deterioration of the underlying film and the film below the underlying film due to excessive energy being applied to the wafer W. For the same reason, the temperature of the acid gas in the acid treatment apparatus 5A may be set lower than the temperature of the developing gas in the gas developing apparatus 5F.

[0079] Although the processing temperature and processing gas (acid gas, developing gas) of the wafer W are different between the acid processing apparatus 5A and the gas developing apparatus 5F in the above description, the processing temperature and processing gas may be the same. Therefore, the acid processing apparatus 5A may also be used as the gas developing apparatus 5F.

[0080] Regarding the acid gas, the underlayer film 51, and the resist, the acid contained in the acid solution L1 is not limited to the above-mentioned examples as long as it serves as an oxidizing agent that oxidizes the surface portion of the underlayer film 51. For example, formic acid, oxalic acid, hydrofluoric acid, sulfuric acid, benzenesulfonic acid, etc. may also be used.

[0081] The underlayer film 51 need only be a film whose polarity differs from that of the compound constituting the resist film when oxidized, and is not limited to polycrystalline silicon, but may be a silicon film other than polycrystalline silicon, such as amorphous silicon. The underlayer film 51 is also not limited to a film made of a semiconductor such as silicon, but may be a film made of an organic compound or a metal film.

[0082] As for the resist solution, it is sufficient that the molecules of the resulting residue 54 and the molecules of the oxidized underlayer film 51 have different polarities, so it is not limited to the examples given so far, and it is also possible to use a resist solution that is exposed to energy rays such as g-line, KrF excimer laser, ArF excimer laser, EUV, etc.

[0083] Incidentally, changing the polarity by oxidizing the surface of the underlayer film 51 so that the residue 54 does not remain attached reduces the affinity between the underlayer film 51 and the resist film 53, thereby reducing the adhesion of the resist film 53 to the underlayer film 51. Specifically, looking at the comparative examples of FIGS. 4 to 7 and the embodiments of FIGS. 9 to 14 , the adhesion of the resist film 53 to the oxide film 52 in the embodiments is lower than the adhesion of the resist film 53 to the underlayer film 51 in the comparative examples. This lower adhesion of the resist film 53 to the underlayer film 51 in the embodiments compared to the comparative examples means that in the embodiments, the surface portion of the underlayer film 51 after the oxidation treatment (i.e., the oxide film 52) has lower adhesion to the resist film 53 than the surface portion of the underlayer film 51 before the oxidation treatment.

[0084] It should be noted that when comparing adhesion in this manner, all processes except for the formation of the oxide film 52 are assumed to be performed under the same conditions. In other words, the hydrophobic treatment and the formation of the resist film 53 are performed under the same conditions, and differences in adhesion will occur as described above. These differences in adhesion can be confirmed by known testing methods, such as a scratch test in which a jig pressed against the film is moved in the direction of the film's surface to observe the state of peeling, or a tensile test in which an adhesive material provided on a jig is pressed against the film and then the jig is pulled from the film to observe the state of peeling.

[0085] Incidentally, such a change in the polarity of the surface of the lower layer film 51 also results in a change in the contact angle with a liquid, such as pure water, which is a polar molecule, after the hydrophobization treatment. Specifically, in the comparative embodiments shown in FIGS. 4 to 7 , the lower layer film 51, which is made of polycrystalline silicon, is hydrophobized. Because the molecular polarities of the lower layer film 51 and pure water are dissimilar, the contact angle θ1 of the lower layer film 51 with pure water after the hydrophobization treatment is relatively large. In the embodiments shown in FIGS. 9 to 14 , the oxide film 52, which is made of silicon oxide, is hydrophobized. Because the molecular polarities of the oxide film 52 and pure water are similar, the contact angle θ2 of the oxide film 52 with pure water after the hydrophobization treatment is smaller than the contact angle θ1. If the difference between the contact angles θ1 and θ2 is due to differences in the treatment between the comparative embodiment and the embodiment, the oxidation treatment of the embodiment can also be considered to be a treatment performed to reduce the contact angle with pure water. To avoid practical problems, the ratio of the contact angle θ2 / the contact angle θ1 is preferably, for example, 70% or greater.

[0086] <Acid Mist Supply Device> Instead of acid gas, a mist of acid solution L1 (acid mist) may be supplied to wafer W. FIG. 15 is a vertical cross-sectional side view of an acid treatment device 5G that supplies acid mist. In the figure, reference numeral 61 denotes a spin chuck that suction-holds the central portion of the backside of a horizontally placed wafer W. In the figure, reference numeral 62 denotes a rotation mechanism that rotates the wafer W together with the spin chuck 61 around a vertical axis. In the figure, reference numeral 63 denotes a cup that is open at the top. In the figure, reference numeral 65 denotes a drain port. In the figure, reference numeral 66 denotes an exhaust port that opens at the bottom of cup 63, and exhausts air during processing of wafer W.

[0087] In the figure, 71 is a nozzle that ejects acidic mist, which can be moved laterally by a moving mechanism not shown, and the position where the mist is ejected (the position where the nozzle outlet is projected onto the wafer W along the ejection direction) can be moved along the diameter of the wafer W.

[0088] A supply unit 72 is provided, which includes a reservoir for the acid solution L1 and a pump for pressure-feeding the acid solution L1 from the reservoir to the nozzle 71. An inert gas is supplied to the nozzle 71 from an inert gas supply unit 17b. The liquid flow of the acid solution L1 supplied to the nozzle 71 is broken up and atomized by the inert gas, and the acid solution L1 is ejected downward as an acid mist. The rotation of the wafer W and the movement of the nozzle 71 supply the acid mist to the entire upper surface of the wafer W. The reservoir for the acid solution L1, the nozzle 71, the supply unit 72, and the inert gas supply unit 17b correspond to the acid treatment mechanism in the acid treatment apparatus 5G.

[0089] In the case where oxidation treatment of the lower layer film 51 is performed by supplying an acidic mist in this manner, it is possible to prevent a large amount of acidic solution L1 from being supplied to the wafer W, and this is similarly effective as in the case where oxidation treatment is performed by supplying an acidic gas. In order to promote oxidation, in this acid treatment apparatus 5G, a light irradiation unit formed of an LED or the like may be provided around the spin chuck 61, and the wafer W may be heated by irradiating light from this light irradiation unit onto the wafer W above. Also, in the apparatus configuration provided with the processing vessel and heating plate described above, an acidic mist may be supplied instead of an acidic gas.

[0090] <Apparatus for performing oxidation treatment without using acid> The oxidation treatment of the lower layer film 51 is not limited to using acid, and may be performed using, for example, ozone (O ３ For example, an ultraviolet irradiation device may be provided in the acid treatment device 5A, and the gas supply mechanism 16 may be configured to supply oxygen gas to the treatment space S. The oxygen gas is activated by ultraviolet light irradiated into the treatment space S by the ultraviolet irradiation device, and becomes ozone gas, which oxidizes the lower layer film 51.

[0091] Furthermore, in the wafer processing of this embodiment, it is not essential to perform all of the above-described processes, and the wafer processing system 1 does not necessarily have to be provided with any of the processing devices 5A to 5F.

[0092] <Other Configuration Examples of Wafer Processing System> The wafer processing system 1 including the devices 5A-5F for performing a series of wafer processes has been described above, but below we will describe an example of a wafer processing system in which the processing devices 5A-5F are appropriately individually distributed and arranged. For convenience, in the following description, what has been described as a processing device will be referred to as a processing module, what has been described as an exposure device will be referred to as an exposure machine, and what has been described as a wafer transfer device will be referred to as a wafer transfer mechanism.

[0093] The wafer processing system may be configured to perform the above-mentioned photolithography by transporting cassettes C between a plurality of devices each configured by including a cassette station 2 and a processing station 3, or by connecting cassette station 2 to an exposure machine. In other words, the processing modules (processing devices) described above as being mounted in wafer processing system 1 for performing photolithography may be provided separately in a plurality of devices to which cassettes C are transported, and the wafer processing system may be configured by these plurality of devices.

[0094] Any of the multiple devices constituting the wafer processing system is equipped with an interface station 4, and an exposure machine is connected to a cassette station 2 or a processing station 3 via the interface station 4. A cassette station 2 is provided in each device, and devices not connected to an exposure machine are composed of a cassette station 2 and a processing station 3. A control device 100 is provided for each device. Cassettes C are transported between load ports LP of different devices by a transport mechanism (hereinafter referred to as the factory transport mechanism) installed in the factory where the wafer processing system is installed. The load port LP is composed of a cassette mounting plate 21 installed in the cassette station 2 and an openable / closable wafer W loading / unloading opening provided corresponding to the position of the cassette mounting plate 21.

[0095] An example of the configuration of a wafer processing system comprising the above-described multiple devices will be described below using the schematic plan views of FIGS. 16 to 20. To facilitate understanding of the configuration, processing modules are denoted differently in each of these figures. Coating modules are referred to as COT, and developing modules, liquid developing modules and gas developing modules, are sometimes collectively referred to as DEV. Liquid developing modules and gas developing modules are distinguished and referred to as WDEV and GDEV, respectively. Regarding thermal processing modules, the module that performs pre-baking, the module that performs post-exposure baking, and the module that performs post-baking are referred to as PAB (Post Apply Bake), PEB (Post Exposure Bake), and POST, respectively. In other words, the processes performed in each module are indicated as module names.

[0096] By distinguishing between the types of processing modules as described above, the drawings show the types of processing modules arranged in the first block G1 and the second block G2 within the processing station 3 of each device, but the arrangement of the processing modules is not limited to this illustrated example. The processing modules arranged in the first block G1 and the processing modules arranged in the second block G2 may be arranged in the opposite direction to that shown in the drawing, for example.

[0097] Although the acid treatment module is not clearly shown in the figure, it may be mounted in the processing station 3 of the same apparatus as the coating module COT or the gas developing module GDEV. Mounting the acid treatment module in the same apparatus as the gas developing module GDEV includes cases where the acid treatment module is also used as the gas developing module GDEV. Mounting the acid treatment module in other apparatuses will be explained separately.

[0098] The cassette station 2 is also provided with a temporary storage section for temporarily storing the cassettes C and a cassette transport mechanism for transporting the cassettes C between the load port LP and the temporary storage section. If a temporary storage section is provided, the factory transport mechanism may transport the cassettes C to the temporary storage section instead of the load port LP. The exposure machine is shown in the figure as exposure machine EXP.

[0099] First, a description will be given of the wafer processing system 1A shown in Fig. 16. The wafer processing system 1A is made up of apparatuses 201 to 203. Apparatus 201 comprises a coating module COT and a thermal treatment module PAB. Apparatus 202 comprises a thermal treatment module PEB and an interface station 4, and an exposure machine EXP is connected to apparatus 202. Apparatus 203 comprises a development processing module DEV and a thermal treatment module POST.

[0100] In the wafer processing system 1A, the acid treatment module is installed alongside, for example, the heat treatment module PAB of the apparatus 201. The cassette C is transported to, for example, the apparatuses 201, 202, and 203 in that order, and the wafers W are processed therein. In this case, the movement between the apparatuses 201 to 203 is reduced, and the flow line of the wafers W is shortened, so that the processing from the acid treatment to the formation of the resist pattern can be performed efficiently.

[0101] Next, a wafer processing system 1B shown in FIG. 17 will be described. The wafer processing system 1B is composed of apparatuses 211 to 213. The apparatus 211 includes a coating module COT, a thermal treatment module PAB, and an interface station 4, and is connected to an exposure machine EXP. The apparatus 212 includes a thermal treatment module PEB and a liquid developing module WDEV. The apparatus 213 includes a thermal treatment module PEB and a gas developing module GDEV. Cassettes C are transported through the apparatuses 211, 212, and 213 in this order, and wafers W are processed therein. In the apparatus 212, a first PEB and a liquid developing process are performed in that order, and in the apparatus 213, a second PEB and a gas developing process are performed in that order.

[0102] Next, a wafer processing system 1C shown in FIG. 18 will be described. The wafer processing system 1C is composed of apparatuses 221 to 224. Apparatus 221 includes a coating module COT and a thermal processing module PAB. Apparatus 222 includes thermal processing modules PAB and PEB. Apparatus 223 includes an interface station 4, and an exposure machine EXP is connected to apparatus 223. Apparatus 224 includes a development processing module DEV. Therefore, for PAB, wafers W are received in either apparatus 221 or 222.

[0103] For example, if the acid treatment module is installed in apparatus 221 and wafers W are to undergo PAB in apparatus 221, cassette C is transported in the order of apparatuses 221, 223, 222, and 224. If the acid treatment module is installed in apparatus 222 and wafers W are to undergo PAB in apparatus 221, cassette C is transported in the order of apparatuses 222, 221, 223, 222, and 224, and wafers W are to undergo PEB when cassette C is transported to apparatus 222 for the second time. If wafers W are to undergo PAB in apparatus 222, cassette C is transported in the order of apparatuses 222, 221, 222, 223, 222, and 224, and wafers W are to undergo PAB when cassette C is transported to apparatus 222 for the second time, and wafers W are to undergo PEB when cassette C is transported to apparatus 222 for the third time. In this manner, the system may be configured such that cassettes C are repeatedly transported to the same apparatus for processing. When the acid treatment module is installed in the apparatus 223, the cassette C is transported to the apparatuses 223, 221, 223, 222, and 224 in this order, and the wafers W are exposed when the cassette C is transported to the apparatus 223 for the second time.

[0104] The wafer processing system 1D shown in FIG. 19 will now be described. The wafer processing system 1D is composed of apparatuses 231 and 232. The apparatus 231 includes a coating module COT, thermal treatment modules PAB and PEB, a liquid developing module WDEV, and an interface station 4, and an exposure machine EXP is connected to the apparatus 231. The apparatus 232 includes a thermal treatment module PEB and a gas developing module GDEV. When an acid treatment module is installed together with the thermal treatment modules PAB and PEB of the apparatus 231, cassettes C are transferred to the apparatuses 231 and 232 in this order, and wafers W are processed therein. When the acid treatment module is installed together with or serves as the gas developing module GDEV of the apparatus 232, cassettes C are transferred to the apparatuses 232, 231, and 232 in this order.

[0105] The wafer processing system 1E shown in Figure 20 will now be described. The wafer processing system 1E is composed of apparatuses 241 and 242. Apparatus 241 includes a coating module COT and a thermal treatment module PAB. Apparatus 242 includes a thermal treatment module PEB, a development module DEV, and an interface station 4, and an exposure machine EXP is connected to apparatus 242. When an acid treatment module is installed alongside the thermal treatment module PAB of apparatus 241, cassettes C are transported through apparatuses 241 and 242 in that order, and wafers W are processed thereon.

[0106] Furthermore, when the acid treatment module is mounted independently in another apparatus provided separately from these apparatuses 241 and 242, the cassette C is transported in this order to the other apparatus, then to the apparatuses 241 and 242. Since the wafers W are not expected to be affected in the transport process from the acid treatment module to the coating module COT, the acid treatment module may be mounted independently in either such an apparatus or in an apparatus in which it is mounted together with other modules.

[0107] As described above, the exposure machine EXP may have a system configuration connected to either an apparatus for forming a resist film or an apparatus for performing PEB, as shown in Figures 16, 17, 19, and 20, or may have a system configuration connected to neither of these apparatuses, as shown in Figure 18. As shown in Figure 20, etc., a system configuration in which the PEB and the subsequent development process are performed in the same apparatus may be used, or a system configuration in which they are performed in different apparatuses, as shown in Figures 17 and 18. When performing the PEB and development process twice, a system configuration in which the apparatus for performing the first PEB and development process and the apparatus for performing the second PEB and development process are different may be used, as shown in Figures 17 and 19, or a system configuration in which the two PEB and development processes are performed in the same apparatus may be used.

[0108] Second Embodiment The second embodiment will be described, focusing on differences from the first embodiment. FIGS. 21 to 25 are diagrams schematically illustrating changes in the surface of a wafer W due to wafer processing according to the second embodiment. First, as shown in FIG. 21 , an acidic gas is supplied to a wafer W having an exposed underlayer film 51 on its surface, as in the first embodiment, and is deposited on the surface of the underlayer film 51. The acid (more specifically, an acidic compound) constituting the acidic gas thus deposited on the wafer W is indicated as 56. The compounds exemplified as constituting the acidic gas in the first embodiment can be used as this acidic compound. Therefore, for example, acetic acid can be used as the acidic compound.

[0109] Thereafter, with the acid 56 still adhering to the surface of the underlayer film 51, a resist film 53 is formed as shown in FIG. 22 . That is, the resist film 53 is formed with the acid 56 remaining on the surface of the underlayer film 51. After the resist film 53 is formed, the acid 56 penetrates into the resist film 53. The resist film 53 in this second embodiment is made of a chemically amplified resist. As is well known, a chemically amplified resist contains an acid generator that generates acid upon exposure and a polymer compound. In the following description, the resist film 53 is described as being made of a positive chemically amplified resist, but the resist film 53 may also be made of a negative chemically amplified resist.

[0110] After the resist film 53 is formed, the wafer W undergoes PAB. During this PAB heating, some of the acid 56 that has permeated the resist film 53 volatilizes. As shown in FIG. 23, the surface of the wafer W is exposed to an exhaust stream, removing the volatilized acid 56. This is followed by exposure and PEB. FIG. 24 shows the wafer W at the end of PEB, with exposed and unexposed areas of the resist film 53 designated as 57 and 58, respectively. In the exposed areas 57, a reaction occurs that solubilizes the film in the developer fluid due to the release of acid from the acid generator during exposure and the increase in acid concentration in the film during PEB, catalyzed by the acid. The acid 56 provided to the resist film 53 as an acid gas also promotes the solubilization reaction. For convenience, in FIG. 24, the acid generated from compounds already contained in the resist film 53 and the acid provided by the acid gas are referred to as acid 56 without distinction between them.

[0111] Since the acid 56 supplied as an acidic gas also contributes to the solubilization reaction, the area in which the solubilization reaction proceeds to a certain amount or more is wider when the acid 56 is supplied to the wafer W than when the acid 56 is not supplied to the wafer W as an acidic gas. A developing fluid is then supplied to the wafer W to dissolve the exposed portions 57, thereby forming a resist pattern ( FIG. 25 ). As described above, the solubilization reaction proceeds to a certain amount or more over a wider area than when the acid 56 is not supplied by an acidic gas, and thus the CD (Critical Dimension), which is the line width of the resist pattern, is smaller.

[0112] According to the mechanism described above, the CD of the resist pattern can be controlled by controlling the amount of acid 56 provided to the resist film by the acidic gas and contributing to the solubilization reaction. As shown in FIG. 23 , an exhaust flow is formed around the wafer W during PAB. If the exhaust flow is formed for a short time, heat accumulation in the space around the wafer W causes a slight increase in the temperature of the wafer W, which is thought to increase the amount of acid 56 volatilized. Conversely, if the exhaust flow is formed for a long time, heat accumulation is suppressed, which suppresses the temperature increase of the wafer W and leads to a relatively small amount of acid 56 volatilized. Therefore, CD can be controlled by controlling the period during which the wafer W is exposed to the exhaust flow during PAB. FIGS. 26 and 27 show longitudinal side views of a thermal processing apparatus 5Da configured to control the period during which the wafer W is exposed to the exhaust flow during PAB.

[0113] The configuration of the heat treatment apparatus 5Da will be described below, focusing on the differences from the heat treatment apparatus 5D that performs PAB in the first embodiment. In describing this heat treatment apparatus 5Da, parts configured similarly to the acid treatment apparatus 5A of the first embodiment will be assigned the same reference numerals as those assigned to the acid treatment apparatus 5A, and detailed descriptions thereof will be omitted. For ease of explanation, the left-right direction in the drawings will be referred to as the left-right direction of the heat treatment apparatus 5Da, and the lateral direction perpendicular to this left-right direction will be referred to as the front-rear direction. However, the front-rear and left-right directions described here do not necessarily coincide with the front-rear and left-right directions described above.

[0114] The processing vessel 82 of the heat treatment apparatus 5Da is formed flat, and a heating plate 11 is provided to close from below an opening provided in a bottom wall 82a of the processing vessel 82. The wafer W is transferred between the wafer W transfer device and the heating plate 11 by lifting pins 15 which are raised and lowered by a lifting mechanism 15a (not shown in FIGS. 26 and 27).

[0115] A loading / unloading port 85 for wafers W is provided on the left sidewall of processing vessel 82. A shutter 83 that moves up and down by a lifting mechanism (not shown) is provided to the left of loading / unloading port 85 to open and close loading / unloading port 85. A gap 82d is formed between shutter 83 and the sidewall of processing vessel 82. As will be described later, the processing vessel 82 is evacuated. Due to this evacuation, even when loading / unloading port 85 is closed (the state shown in FIGS. 26 and 27 ), gas surrounding processing vessel 82, such as the atmosphere, can be sucked into processing vessel 82 through gap 82d.

[0116] A partition plate 84 is provided to divide the interior of the processing vessel 82 into upper and lower sections. The partition plate 84 forms a bypass flow path 89 between itself and the ceiling wall of the processing vessel 82, and forms a processing space 8S between itself and the heating plate 11 and the bottom wall 82a. The bypass flow path 89 is a path for exhausting air by bypassing the surface of the wafer W, as will be described later. The partition plate 84 is provided above the loading / unloading port 85 and away from the left side wall of the processing vessel 82, forming a gap 89a between itself and the left side wall.

[0117] The right side of the processing vessel 82 is open. A damper 88 is provided on the right side of the processing vessel 82. The damper 88 includes a housing 88a and a valve body 88c. The housing 88a is formed to close the open right side of the processing vessel 82, and the bypass flow path 89 and the processing space 8S are connected to the inside of the housing 88a. An exhaust port 88b is formed in the bottom wall of the housing 88a. The exhaust port 88b is connected to an exhaust device (not shown), and the processing vessel 82 is exhausted through the inside of the housing 88a by this exhaust device.

[0118] The valve body 88c includes a rotation axis provided near the right end of the partition plate 84 and a plate-like body extending in a direction perpendicular to the extension direction of the rotation axis. Therefore, the orientation of the plate-like body is changed. This change in orientation switches between a first exhaust state in which the valve body 88c blocks the flow path from the processing space 8S toward the exhaust port 88b and a second exhaust state in which the valve body 88c blocks the flow path from the gap 89a toward the exhaust port 88b. In the first exhaust state, as shown in FIG. 26 , the bypass flow path 89 is connected to the exhaust port 88b, and the processing vessel 82 is exhausted through the bypass flow path 89. In the second exhaust state, as shown in FIG. 27 , the processing space 8S is connected to the exhaust port 88b, and the processing vessel 82 is exhausted through the processing space 8S. In other words, this heat treatment apparatus 5Da is configured so that the exhaust flow path within the processing vessel 82 is switched so that gas flowing in from outside the processing vessel 82 is exhausted to the exhaust port 88b via either the bypass flow path 89 or the processing space 8S, and this switching of the exhaust flow path is performed by a damper 88, which is an exhaust mechanism.

[0119] By switching the exhaust flow path during the thermal processing (PAB) of the wafer W, the amount of acid 56 released from the wafer W as described in FIG. 23 is adjusted to control CD. Of the first and second exhaust states, the second exhaust state is the state shown in FIG. 23. For convenience of explanation, it is assumed that the damper 88 is closed when the first exhaust state is established, and that the damper 88 is open when the second exhaust state is established. The operation of the damper 88 is controlled by the control device 100 described above.

[0120] 28 is a timing chart showing the closing and opening of the damper 88 during PAB. In the first exhaust state (exhaust state via the bypass flow path 89) with the damper 88 closed, the lift pins 15 receive the wafer W from the wafer transfer device above the hot plate 11. After the wafer transfer device is retracted from the processing chamber 82, the shutter 83 is closed. The lift pins 15 then descend, and the wafer W is placed on the hot plate 11 (time t1), starting the thermal processing of the wafer W, i.e., the PAB. Since no airflow is formed in the processing space 8S, the temperature rise of the wafer W is promoted, facilitating the release of acid 56 from the resist film 53, and the thermal processing of the wafer W proceeds.

[0121] Then, at time t2, a predetermined time after time t1, the damper 88 is opened, and the second exhaust state (a state in which air is exhausted through the processing space 8S) is established. By forming an airflow in the processing space 8S, i.e., around the wafer W, a temperature rise of the wafer W is suppressed, and heat processing of the wafer W proceeds in a state in which release of acid 56 from the resist film 53 is suppressed. After a predetermined time has passed from time t2, the lift pins 15 are raised to separate the wafer W from the heating plate 11 (time t3), completing the PAB of the wafer W. The wafer W is then unloaded from the processing vessel 82 by the wafer transfer mechanism.

[0122] Immediately after the start of PAB, the fluidity of the film is relatively high due to the relatively large amount of solvent contained in the resist film 53, which may cause variations in the film thickness within the surface of the resist film 53 due to the influence of the air currents formed in the processing space 8S. Moreover, after a relatively long time has passed since the start of PAB, the amount of sublimates produced from the resist film 53 becomes relatively large, and there is a risk of defects occurring in the pattern due to adhesion of these sublimates to the wafer W. To prevent such problems, in the process described with reference to the time chart of FIG. 28, the first exhaust state is first established, and then the second exhaust state is established.

[0123] The time from time t1 to time t3 when the wafer W is subjected to heat treatment is defined as T1. The time from time t2 to time t3 during this heat treatment time T1 when the second exhaust state is established is defined as T2. The ratio of the time T2 during the second exhaust state to the heat treatment time T1 may be varied between different wafers W. That is, for wafer W1, which is transferred first to the heat treatment apparatus 5Da, an arbitrary value A1 is set for T2 / T1, and for wafer W2, which is transferred later to the heat treatment apparatus 5Da, an arbitrary value A2 different from A1 is set. This allows resist patterns having different CDs to be formed on wafers W1 and W2. More specifically, by varying T2 / T1 between wafer lots, for example, resist patterns with desired CDs can be formed for each lot.

[0124] It should be noted that the CDs to be made different between wafers W do not necessarily have to be made different by setting T2 / T1 to different values. When the processing conditions for forming resist patterns during development processing or the like are different between wafers W1 and W2, the CDs of wafers W1 and W2 may be made the same by setting different A1 and A2 for T2 / T1.

[0125] While the damper 88 is switched between open and closed states once during the heat treatment time T1, this is not limiting and may be repeated multiple times. Furthermore, instead of adjusting the ratio of the time T2 in the second exhaust state to the heat treatment time T1, the acid concentration in the resist film 53 may be adjusted by, for example, changing the exhaust flow rate per unit time. Specifically, the damper 88 is not used to switch the exhaust flow path within the processing vessel 82. The processing vessel 82 is evacuated by an exhaust device, and a valve is installed in the exhaust path connecting the exhaust device to the processing vessel 82. The exhaust flow rate is changed by changing the valve opening. From time t1 to t2 in FIG. 28 , the valve opening is reduced to reduce the exhaust flow rate, and from time t2 to t3, the valve opening is increased to increase the exhaust flow rate. By changing the exhaust flow rate in this manner, the wafer W is exposed to an airflow with a relatively higher flow rate from time t2 to t3 compared to time t1 to t2, thereby suppressing the temperature rise of the wafer W and suppressing the release of acid 56 from the resist film 53.

[0126] In performing the processing of this second embodiment, the wafer W is transported in the order of the acid treatment apparatus 5A, the coating apparatus 5C, and the heat treatment apparatus 5Da, and processing from supplying acid gas to PAB is performed. Then, after exposure, PEB and development may be performed as in the first embodiment. Note that in this second embodiment, hydrophobization processing may also be performed by the hydrophobization apparatus 5B. To prevent volatilization of the acid 56 during the hydrophobization processing, the hydrophobization processing may be performed before the processing by the acid treatment apparatus 5A.

[0127] Although the acid 56 has been described as being released from the resist film 53 during PAB, it may also be released from the resist film 53 during PEB. Therefore, PEB may be performed using the thermal processing apparatus 5Da, and T2 / T1 may be controlled by switching the damper 88 open and closed as described with reference to FIG. 28 to control CD during this thermal processing. If the temperature of the wafer W during PAB is relatively low and, for example, the temperature of the wafer W during PEB is higher than that during PAB (i.e., the temperature of the heating plate 11 that heats the wafer W is higher), acid 56 is likely to remain in the resist film 53 at the start of PEB, so it is effective to control T2 / T1 during PEB.

[0128] In the second embodiment, the acidic compound may also be supplied to the wafer W as a mist instead of a gas. In the second embodiment, the acidic compound is not limited to being supplied as a gas or a mist, as long as it remains on the wafer W during the resist film formation. Specifically, for example, a liquid flow containing the acidic compound may be ejected from a nozzle and supplied to the wafer W.

[0129] 21 to 25, the ratio T2 / T1 of the exhaust time in the heat treatment apparatus 5Da is controlled during the PAB after the formation of the resist film. However, the ratio T2 / T1 of the exhaust time in the heat treatment apparatus 5Da may also be controlled during the PAB after the formation of the underlayer film. That is, after forming the underlayer film 51 by performing a liquid process or a gas process on the wafer W, a liquid flow containing an acidic gas, an acidic mist, or an acidic compound is supplied to deposit the acidic compound on the surface of the underlayer film 51 before performing the PAB on the underlayer film 51. Then, when performing the PAB on the underlayer film 51, the ratio T2 / T1 is controlled by switching the exhaust flow path, as described in the time chart for the PAB on the resist film 53, to volatilize a portion of the acid 56 deposited on the surface of the underlayer film 51. The partially volatilized acid 56 is then removed by the exhaust flow, as shown in FIG. 29, to control the amount of acid 56 remaining on the underlayer film 51. After the PAB of the underlayer film 51 , a resist film 53 is formed, and the acid 56 remaining in the underlayer film 51 penetrates into the resist film 53 .

[0130] After the resist film 53 is formed, PAB, exposure, PEB, and development are sequentially performed on the resist film 53. By controlling the amount of acid 56 on the surface of the lower layer film 51 during PAB of the lower layer film 51, the amount of acid 56 provided to the resist film 53 is also controlled, and the CD of the resist pattern can be controlled as shown in the evaluation test described below. Note that when switching the exhaust flow path during PAB of the lower layer film 51 in this manner, the exhaust flow path may or may not be switched when PAB of the resist film 53 is performed.

[0131] For convenience of explanation, the acid 56 supplied to the underlayer film 51 in the form of a gas or mist has been described as adhering to the underlayer film 51, but it may also penetrate into the surface of the underlayer film 51. Even if it penetrates in this manner, it is sufficient that the acid 56 is provided from the underlayer film 51 to the resist film 53 during the formation of the resist film 53. Furthermore, the acid 56 has been described as an acidic compound. Even if it is an acidic compound when supplied to the wafer W in the form of a gas or mist, when it is provided to the resist film 53, it is not limited to being provided to the resist film 53 in the form of that compound, and only ionized hydrogen ions may be provided to the resist film 53. Therefore, the illustrated acid 56 includes both an acidic compound and hydrogen ions.

[0132] It should be noted that the wafer processing systems disclosed herein are not limited to the configurations and operations described above. The substrates processed in each wafer processing system are not limited to wafers W, but may also be FPD (flat panel display) substrates or mask substrates for manufacturing exposure masks. The embodiments disclosed herein should be considered illustrative in all respects and not restrictive. The above embodiments may be omitted, substituted, modified, and combined in various ways without departing from the scope and spirit of the appended claims.

[0133] <Evaluation Test> An evaluation test performed in connection with the technology of the second embodiment will now be described. In this evaluation test, acidic gas was supplied to underlayer films 51 formed in the same manner on a plurality of wafers W using the acid treatment apparatus 5A described in the second embodiment. Then, PAB was performed on the underlayer films 51 using a heat treatment apparatus 5Da. The ratio of the evacuation time T2 in the second evacuation state (the time from t2 to t3 in the time chart) to the heat treatment time T1 was changed for each wafer W. Thereafter, the following steps were performed in order: resist film formation → PAB of the resist film → exposure → PEB → development. The relationship between the acid concentration on the surface of the underlayer film 51 after PAB of the underlayer film 51 (hereinafter simply referred to as PAB), the ratio (T2 / T1) during PAB, and the CD of the resist pattern was verified.

[0134] The PAB heat treatment was performed for 60 seconds, and the evacuation time in the second evacuation state was set to 60 seconds, 40 seconds, and 20 seconds, i.e., the ratio of the time T2 in the second evacuation state to the heat treatment time T1 (T2 / T1) was set to 1, 2 / 3, and 1 / 3. The other PAB processing conditions, such as the power supplied to the heater of the hot plate 11 and the evacuation flow rate per unit time, and other processing conditions were set to be the same for these wafers W.

[0135] 30 and 31 are graphs showing the results of this evaluation test. FIG. 30 is a graph showing the acid concentration peak area versus the ratio of evacuation time to heating time. The acid concentration peak area is calculated by measuring the acid concentration on the surface of the underlayer film 51 of each wafer W after PAB of the underlayer film, and calculating the total area of ​​the region where the acid concentration is equal to or higher than a relatively high predetermined value. Therefore, it is believed that the wider this acid concentration peak area is, the higher the concentration of acid remaining on the surface of the underlayer film 51 after PAB. As shown in FIG. 30 , the smaller T2 / T1 is, the narrower the acid concentration peak area is. Therefore, it was confirmed that the concentration of acid remaining on the underlayer film 51 can be controlled by controlling the evacuation around the wafer W.

[0136] 31 is a graph showing the average CD value of the resist pattern versus the area of ​​the acid concentration peak area, where the average CD value is shown relative to a certain standard value X [nm]. As shown in the figure, the average CD value decreased as the area of ​​the acid concentration peak area increased. Therefore, it was demonstrated that the CD of the resist pattern can be controlled by controlling the acid concentration on the surface of the underlayer film 51. From the results shown in FIGS. 30 and 31, it can be seen that after forming the underlayer film 51 and supplying acid, the CD of the resist pattern can be adjusted to a desired value by controlling the exhaust around the wafer W as described in the embodiment.

[0137] W wafer 11 heating plate 51 underlayer film 53 resist film 16b acid gas supply mechanism

Claims

1. A substrate processing system comprising: a substrate placement unit for placing a substrate on which a lower layer film to be patterned using a resist film is located, before the resist film is formed; and an acid supply mechanism for supplying an acidic gas or mist as a first processing fluid to the lower layer film of the substrate placed on the substrate placement unit.

2. The substrate processing system according to claim 1, wherein the acid supply mechanism supplies the first processing fluid so that a surface portion of the lower layer film is selectively oxidized.

3. The substrate processing system according to claim 2, wherein the oxidized surface portion has lower adhesion to the resist film than the surface portion before oxidation.

4. The substrate processing system according to claim 1, further comprising: a developing processing device for supplying an acidic gas or mist as a second processing fluid to develop the resist film after exposure; and a temperature adjustment unit for adjusting the temperature of the substrate so that the temperature of the substrate when the first processing fluid is supplied is higher than the temperature of the substrate when the second processing fluid is supplied.

5. The substrate processing system according to claim 1, further comprising: a developing processing device for supplying an acidic gas or mist as a second processing fluid to develop the resist film after exposure; and a temperature adjustment unit for adjusting the temperature of the substrate so that the temperature of the substrate when the first processing fluid is supplied is lower than the temperature of the substrate when the second processing fluid is supplied.

6. The substrate processing system according to claim 1, further comprising: a developing processing device for supplying an acidic gas or mist as a second processing fluid to develop the resist film after exposure; wherein a compound constituting a first liquid raw material for generating the first processing fluid and a compound constituting a second liquid raw material for generating the second processing fluid are the same; and the concentration of the compound generating an acid in the first liquid raw material is higher than the concentration of the compound generating an acid in the second liquid raw material.

7. The substrate processing system according to claim 1, wherein the acid supply mechanism supplies the first processing fluid so that acid remains on the surface of the lower layer film when the resist film is formed on the substrate.

8. A substrate processing system comprising a heat treatment apparatus for heat-treating the substrate after the first processing fluid is supplied, the heat treatment apparatus including a heating mechanism for heating the substrate and an exhaust mechanism for exhausting the periphery of the substrate, and when processing a plurality of the substrates in the heat treatment apparatus in sequence, a control device is provided for controlling the operation of the exhaust mechanism so that the ratio of the time of exhaust by the exhaust mechanism or the exhaust flow rate during the time when the substrate is heated by the heating mechanism is different between the substrate processed first and the substrate processed later. The substrate processing system according to claim 7.

9. A substrate processing method including a step of placing a substrate having an underlayer film to be patterned using a resist film on a substrate placement portion, and a step of supplying an acidic gas or mist as a first processing fluid to the underlayer film of the substrate placed on the substrate placement portion by an acid supply mechanism.

10. The substrate processing method according to claim 9, wherein the step of supplying the first processing fluid includes a step of oxidizing by limiting the surface portion of the underlayer film.

11. The substrate processing method according to claim 9, wherein the step of oxidizing the surface portion of the underlayer film is a step of reducing the adhesion to the resist film compared to the surface portion before oxidation.

12. A substrate processing method according to claim 9, including a developing step of supplying an acidic gas or mist as a second processing fluid to develop the resist film after exposure, and a step of adjusting the temperature of the substrate so that the temperature of the substrate when the first processing fluid is supplied is higher than the temperature of the substrate when the second processing fluid is supplied.

13. A substrate processing method according to claim 9, including a developing step of supplying an acidic gas or mist as a second processing fluid to develop the resist film after exposure, and a step of adjusting the temperature of the substrate so that the temperature of the substrate when the first processing fluid is supplied is lower than the temperature of the substrate when the second processing fluid is supplied.

14. The substrate processing method according to claim 9, comprising a developing step of supplying an acidic gas or mist as the second processing fluid to develop the resist film after exposure, wherein a compound constituting the first liquid raw material that generates the first processing fluid and a compound constituting the second liquid raw material that generates the second processing fluid are the same, and the concentration of the compound that generates an acid in the first liquid raw material is higher than the concentration of the compound that generates an acid in the second liquid raw material.

15. The substrate processing method according to claim 9, wherein the step of supplying the acidic gas or mist as the first processing fluid is a step of supplying the first processing fluid so that an acid remains on the surface of the underlying film when the resist film is formed on the substrate.

16. The substrate processing method according to claim 15, comprising a step of heat-treating the substrate after the first processing fluid is supplied in a heat treatment apparatus including a heating mechanism for heating the substrate and an exhaust mechanism for exhausting the periphery of the substrate, and when sequentially processing a plurality of the substrates in the heat treatment apparatus, making the ratio of the time during which exhaust is performed by the exhaust mechanism or the exhaust flow rate different between the substrate processed first and the substrate processed later during the time when the substrate is heated by the heating mechanism.

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