Wiring board and semiconductor device

Abstract

The present invention provides a wiring board comprising a first insulating substrate, a second insulating substrate, a first internal conductor, a second internal conductor, and an interlayer conductor. The first internal conductor has a first via conductor and a first land conductor, and the second internal conductor has a second via conductor and a second land conductor. The coefficient of thermal expansion of the second insulating substrate is different from the coefficient of thermal expansion of the first insulating substrate. The interlayer conductor electrically connects the first via conductor and the second via conductor, and provided that L0 is the minimum distance between the outer edge of the first via conductor and the outer edge of the interlayer conductor, L1 is the minimum distance between the outer edge of the first via conductor and the outer edge of the first land conductor, and L2 is the minimum distance between the outer edge of the second via conductor and the outer edge of the second land conductor in a plan view as seen from a direction perpendicular to a first surface, L0 is greater than L1 and L2.

Description

Wiring board and semiconductor device

[0001] The present disclosure relates to a wiring substrate and a semiconductor device.

[0002] 2. Description of the Related Art Conventionally, a composite wiring board in which a resin substrate portion and a ceramic substrate portion are joined together has been known (see Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2019-121720

[0004] The wiring board of the present disclosure comprises a first insulating substrate, a second insulating substrate, a first internal conductor, a second internal conductor, and an interlayer conductor. The first insulating substrate has a first surface. The second insulating substrate is located in contact with the first surface. The first internal conductor is located within the first insulating substrate. The second internal conductor is located within the second insulating substrate. The interlayer conductor is located on the first surface. The first internal conductor has a first via conductor penetrating at least a portion of the first insulating substrate and a first land conductor electrically connected to the first via conductor. The second internal conductor has a second via conductor penetrating at least a portion of the second insulating substrate and a second land conductor electrically connected to the second via conductor. The thermal expansion coefficient of the second insulating substrate is different from that of the first insulating substrate. The interlayer conductor is electrically connected to the first via conductor and the second via conductor, and when viewed in a planar view perpendicular to the first surface, if the minimum distance between the outer edge of the first via conductor and the outer edge of the interlayer conductor is L0, the minimum distance between the outer edge of the first via conductor and the outer edge of the first land conductor is L1, and the minimum distance between the outer edge of the second via conductor and the outer edge of the second land conductor is L2, L0 is greater than L1 and L2.

[0005] FIG. 1 is a perspective view showing an example of the configuration of a wiring board according to an embodiment. FIG. 2 is a plan view showing an example of the configuration of a wiring board according to an embodiment. FIG. 3 is a cross-sectional perspective view taken along line A-A shown in FIG. 1. FIG. 4 is a cross-sectional perspective view showing an example of the configuration of a first internal conductor, a second internal conductor, and an interlayer conductor. FIG. 5 is a cross-sectional perspective view showing an example of the configuration of a first internal conductor, a second internal conductor, and an interlayer conductor. FIG. 6 is a cross-sectional perspective view showing an example of the configuration of a first internal conductor, a second internal conductor, and an interlayer conductor. FIG. 7 is a cross-sectional perspective view showing an example of the configuration of a first internal conductor, a second internal conductor, and an interlayer conductor. FIG. 8 is a perspective view showing an example of the configuration of a wiring board according to an embodiment. FIG. 9 is an enlarged perspective view showing an example of a side conductor. FIG. 10 is an enlarged perspective view showing an example of a side conductor. FIG. 11 is an enlarged perspective view showing an example of a side conductor. FIG. 12 is a perspective view showing an example of the configuration of a semiconductor device according to an embodiment. FIG. 13 is a cross-sectional perspective view showing an example of the configuration of a semiconductor device according to an embodiment.

[0006] Hereinafter, embodiments for carrying out a wiring board and a semiconductor device according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail with reference to the drawings. Note that the present disclosure is not limited to these embodiments. Furthermore, the embodiments can be appropriately combined as long as the processing content is not contradictory. Furthermore, the same components in the following embodiments will be assigned the same reference numerals, and redundant explanations will be omitted.

[0007] In addition, in the drawings referred to below, to make the explanation easier to understand, an orthogonal coordinate system may be shown in which the X-axis direction, Y-axis direction, and Z-axis direction, which are perpendicular to each other, are defined, and the Z-axis direction is the thickness direction of the wiring board.

[0008] The resin substrate portion, which is a substrate containing resin, and the ceramic substrate portion, which is a substrate made of ceramic, have different thermal expansion coefficients. Therefore, when heat is applied to the resin substrate portion and the ceramic substrate portion, for example, by heat treatment during the manufacturing process or by heat generated during operation of the mounted electronic components, the difference in thermal expansion coefficients between the resin substrate portion and the ceramic substrate portion may cause the positions of the via conductors located in the resin substrate portion to become misaligned with the positions of the via conductors located in the ceramic substrate portion. This may result in the electrical connection between the resin substrate portion and the ceramic substrate portion being interrupted.

[0009] Here, an example of joining a resin substrate and a ceramic substrate has been given, but this is not limited to this, and the above-mentioned problem can occur when joining two insulating substrates with different thermal expansion coefficients.

[0010] The present disclosure provides a technique that can reduce the possibility of electrical connection between two insulating substrates being joined together being broken due to a difference in the thermal expansion coefficients of the insulating substrates.

[0011] <Embodiment> Fig. 1 is a perspective view showing an example of the configuration of a wiring board according to an embodiment. Fig. 2 is a plan view showing an example of the configuration of a wiring board according to an embodiment. Fig. 3 is a cross-sectional perspective view taken along line AA shown in Fig. 1.

[0012] As shown in FIGS. 1 to 3, the wiring board 100 according to the embodiment includes a first insulating substrate 10, a second insulating substrate 20, a first inner conductor 30, a second inner conductor 40, and an interlayer conductor 50.

[0013] The wiring substrate 100 is a laminate of a first insulating substrate 10 and a second insulating substrate 20. The first insulating substrate 10 may contain an inorganic material. The inorganic material may be ceramic. The second insulating substrate 20 may contain an organic material. The organic material may be an organic resin, or may contain multiple types of organic resins. The detailed configurations of the first internal conductors 30, the second internal conductors 40, and the interlayer conductors 50 will be described later with reference to FIGS. 4 to 9. In addition, the planar view in this disclosure refers to a planar view seen from a direction perpendicular to the first surface 11 of the first insulating substrate 10, and is a concept that includes a planar perspective view in which some components are seen through from the Z direction. In addition, the horizontal direction in this disclosure refers to the XY plane direction.

[0014] The wiring substrate 100 may be rectangular in plan view, for example. The wiring substrate 100 may also have a through hole 110 in the center in plan view. The through hole 110 may be rectangular in plan view. The through hole 110 may be configured in a rectangular shape such that the portion that penetrates the first insulating substrate 10 is larger in the horizontal direction than the portion that penetrates the second insulating substrate 20. Without being limited to the above, the wiring substrate 100 may be configured without the through hole 110.

[0015] Ceramics have higher rigidity than organic materials. Therefore, a wiring board 100 configured with a first insulating substrate 10 containing ceramic and a second insulating substrate 20 containing an organic material can have improved rigidity compared to a wiring board configured only with a substrate containing an organic material. This makes it easy for the wiring board 100 to maintain its rigidity even when the thickness of the wiring board 100 is reduced, without the need for additional reinforcing members. Furthermore, the improved rigidity of the wiring board 100 due to the above configuration reduces the likelihood of the wiring board 100 flexing, warping, or bending.

[0016] Furthermore, the wiring board 100 can be made lighter because the volumes of the first insulating substrate 10 and the second insulating substrate 20 can be reduced by the amount of the through holes 110 .

[0017] <First Insulating Substrate> The first insulating substrate 10 may contain ceramic, or may be primarily composed of ceramic. Examples of ceramic that can be used include ceramics primarily composed of at least one selected from the group consisting of aluminum oxide, silicon oxide, zirconium oxide, silicon carbide, silicon nitride, and aluminum nitride, or ceramics primarily composed of a composite oxide such as mullite, zircon, steatite, enstatite, glass ceramics, and glass. The first insulating substrate 10 contains a glass material in addition to the ceramic. In the present disclosure, a "major component" refers to a material that accounts for, for example, 50% by mass or more of the material.

[0018] The first insulating substrate 10 may be an insulating substrate made of a glass substrate, which contains a glass material in the same manner as an insulating substrate containing ceramic.

[0019] 3 , the first insulating substrate 10 may have a first surface 11 and a second surface 12 located on the opposite side to the first surface 11. The first insulating substrate 10 may be a plate-like body having the first surface 11 and the second surface 12 as its main surfaces. The first insulating substrate 10 may also have a first side surface 13 connecting the first surface 11 and the second surface 12. The first side surface 13 is the outer surface of the first insulating substrate 10.

[0020] The first insulating substrate 10 may also have a plurality of ceramic layers 14. The plurality of ceramic layers 14 may be stacked along the thickness direction of the first insulating substrate 10. By configuring the first insulating substrate 10 using a plurality of ceramic layers 14 in this way, it is possible to obtain a first insulating substrate 10 that has therein first land conductors 32 (described later) and conductors with wiring shapes suitable for various purposes, and by making the plurality of ceramic layers 14 each have a different shape, it is possible to improve the degree of freedom in designing the shape of the wiring substrate 100.

[0021] The wiring board 100 having such a first insulating substrate 10 offers a high degree of freedom in wiring design. Furthermore, by configuring the first insulating substrate 10 using a plurality of ceramic layers 14, it is possible to fabricate the first insulating substrate 10 while checking, layer by layer, whether the first land conductors 32 (described later) and internal conductors having wiring shapes according to various purposes are properly formed, and whether each layer has been processed into the desired shape. This allows for an improved yield of the first insulating substrate 10.

[0022] In this embodiment, the first insulating substrate 10 has two ceramic layers 14, but the number of ceramic layers 14 is not limited to two. The number of ceramic layers 14 may be three or more. Furthermore, the first insulating substrate 10 does not necessarily have a multi-layer structure. That is, the first insulating substrate 10 may be a single layer. When the first insulating substrate 10 is a single layer, the first insulating substrate 10 and the first land conductors 32 can be formed by additive manufacturing (AM) using a 3D printer.

[0023] <Second Insulating Substrate> As described above, the second insulating substrate 20 may contain an organic material. The organic material may be an organic resin. The organic resin may be, for example, an epoxy resin, an acrylic resin, a polycarbonate resin, a polyimide resin, an olefin resin, a maleimide resin, or a polyphenylene resin. Furthermore, the second insulating substrate 20 may contain multiple types of organic resins.

[0024] The organic resin may be, for example, polytetrafluoroethylene (PTFE) or other fluororesin, or polyphenylene ether resin. The second insulating substrate 20 may contain components other than the organic resin. Examples of components other than the organic resin contained in the second insulating substrate 20 include inorganic materials such as silica and rubber materials. The content of the inorganic material such as silica in the second insulating substrate 20, in terms of mass %, may be greater than the content of the organic resin in the second insulating substrate 20. More specifically, the content of the inorganic material such as silica in the second insulating substrate 20 may be 50 mass % or more of the second insulating substrate 20, and the content of the organic resin in the second insulating substrate 20 may be 50 mass % or less of the second insulating substrate 20.

[0025] 3 , the second insulating substrate 20 may have a third surface 21 and a fourth surface 22 located opposite the third surface 21. The second insulating substrate 20 may be a plate-like body having the third surface 21 and the fourth surface 22 as its main surfaces. The second insulating substrate 20 may also have a second side surface 23 connecting the third surface 21 and the fourth surface 22. The second side surface 23 is the outer surface of the second insulating substrate 20.

[0026] The second insulating substrate 20 may have multiple organic resin layers 24. The multiple organic resin layers 24 may be stacked along the thickness direction of the second insulating substrate 20. By configuring the second insulating substrate 20 using multiple organic resin layers 24, it is possible to obtain a second insulating substrate 20 having therein second land conductors 42 (described later) and conductors with wiring shapes suitable for various purposes. Furthermore, by forming the multiple organic resin layers 24 into different shapes, the degree of freedom in designing the shape of the wiring substrate 100 can be improved. A wiring substrate 100 having such a second insulating substrate 20 has a high degree of freedom in designing the wiring and the shape of the wiring substrate 100. Note that the organic resin layer 24 refers to a layer containing an organic resin, and includes not only a layer composed only of an organic resin, but also a layer containing an organic resin and an inorganic material such as silica. Furthermore, the content of the organic resin in the organic resin layer 24 in terms of mass % may be smaller than the content of the inorganic material in the organic resin layer 24 in terms of mass %.

[0027] The second insulating substrate 20 is superimposed on the first surface 11 of the first insulating substrate 10. The third surface 21 of the second insulating substrate 20 is bonded to the first surface 11 of the first insulating substrate 10. That is, the second insulating substrate 20 is directly bonded to the first insulating substrate 10 without an adhesive layer. The adhesive layer here refers to a layer containing, for example, an epoxy resin, a polyimide resin, or a polyamide-imide resin, and refers to a layer in which a conductor for wiring, such as the first via conductor 31, is not explicitly formed. Specifically, the organic resin layer 24 of the second insulating substrate 20 may contain an epoxy-based resin. The ceramic layer 14 of the first insulating substrate 10 may contain a ceramic containing hydroxyl groups as a main component. In this case, the second insulating substrate 20 may be chemically bonded to the first insulating substrate 10 via the hydroxyl groups. This allows the first insulating substrate 10 and the second insulating substrate 20 to be hydrogen-bonded via the hydroxyl groups.

[0028] In this way, since there is no adhesive layer for joining the first insulating substrate 10 and the second insulating substrate 20, the thickness of the wiring substrate 100 is reduced, and the wiring substrate 100 can be made smaller.

[0029] In this embodiment, the second insulating substrate 20 has two organic resin layers 24, but the number of organic resin layers 24 is not limited to two. The number of organic resin layers 24 may be three or more. Furthermore, the second insulating substrate 20 does not necessarily have to have a multi-layer structure. In other words, the second insulating substrate 20 may be a single layer.

[0030] The second insulating substrate 20 containing an organic material is easier to form fine wiring patterns and narrow-pitch wiring patterns on than a substrate containing an inorganic material as its main component. On the other hand, the first insulating substrate 10 containing a ceramic as its main component has higher rigidity than the second insulating substrate 20. The first insulating substrate 10 containing a ceramic as its main component may also have a higher density than the second insulating substrate 20. When the second insulating substrate 20 is a single layer, the second insulating substrate 20 and the second land conductors 42 can be formed by additive manufacturing using a 3D printer.

[0031] The wiring board 100 can increase rigidity while achieving finer wiring and narrower pitches by combining the first insulating substrate 10 and the second insulating substrate 20. Since warping of the board becomes more pronounced as the board becomes larger, the configuration of the wiring board 100 in which the first insulating substrate 10 compensates for the low rigidity of the second insulating substrate 20 is particularly useful for increasing the size of the board.

[0032] The insulating substrate containing an organic material may be lighter than an insulating substrate mainly made of ceramic. In this case, the wiring board 100 according to the present disclosure, which includes the first insulating substrate 10 mainly made of ceramic and the second insulating substrate 20 mainly made of organic material, can be lighter than a wiring board made of only an insulating substrate mainly made of ceramic.

[0033] <First Inner Conductor and Second Inner Conductor> Figures 4 to 6 are cross-sectional perspective views showing examples of the configurations of the first inner conductor, the second inner conductor, and the interlayer conductor. Figure 7 is a cross-sectional view showing an example of the configurations of the first inner conductor, the second inner conductor, and the interlayer conductor.

[0034] As shown in Fig. 4, the first internal conductor 30 is located inside the first insulating substrate 10. The first internal conductor 30 may extend in a direction perpendicular to the first surface 11. Note that "extending" here does not necessarily mean extending over the shortest distance. Note that, when the first insulating substrate 10 further includes a conductor located on the second surface 12, the first internal conductor 30 may be electrically connected to the conductor located on the second surface 12. Furthermore, a portion of the first internal conductor 30 may be exposed at the second surface 12 or the first side surface 13.

[0035] The first internal conductor 30 includes a first via conductor 31 that penetrates at least a portion of the first insulating substrate 10, and a first land conductor 32 that is electrically connected to the first via conductor 31. The first via conductor 31 may penetrate one or more ceramic layers 14. The first land conductor 32 may be located between the multiple ceramic layers 14. The first land conductor 32 may be a portion that is located around the first via conductor 31 in a planar view. In other words, the first land conductor 32 may be located at a location that overlaps with the first via conductor 31 in a planar view. Here, in the present disclosure, a via conductor refers to a portion that penetrates between layers in the thickness direction of the wiring substrate 100. For example, when the first insulating substrate 10 is mainly composed of ceramic, holes are formed in a green sheet before sintering at positions that will become the first via conductors 31 by punching, laser processing, or the like, and the holes are filled with a conductive paste to form the first via conductors 31. At this time, some of the conductive paste filled in the holes may seep out onto the surface of the green sheet, forming a seeped portion. In this disclosure, however, such a seeped portion will not be treated as part of the via conductor, but will be treated as constituting part of the land conductor.

[0036] The first land conductor 32 may extend in one or more directions from the periphery of the first via conductor 31. In other words, the first land conductor 32 may have a first portion located around the first via conductor 31 and a second portion extending in one or more directions from the first portion. The first land conductor 32 may also have a so-called solid pattern. The first land conductor 32 may be in contact with other conductors on the same plane in the horizontal direction. In other words, the conductor area may extend in a partial direction of the first land conductor 32.

[0037] In this way, since the wiring board 100 has the first internal conductor 30 in the first insulating substrate 10, compared to conventional wiring boards that have wiring only on organic resin substrates, the wiring board 100 has a high degree of freedom in designing the wiring because a material for the first internal conductor 30 can be selected that corresponds to the thermal expansion coefficient of the first insulating substrate 10. On the other hand, when a configuration is adopted in which wiring (the first internal conductor 30 and the second internal conductor 40) is provided on both the first insulating substrate 10 and the second insulating substrate 20, it is preferable to increase the bonding strength between the first insulating substrate 10 and the second insulating substrate 20 to reduce the possibility of misalignment between the first internal conductor 30 and the second internal conductor 40.

[0038] The second internal conductor 40 is located inside the second insulating substrate 20 and extends in a direction perpendicular to the first surface 11. Note that "extending" here does not necessarily mean extending over the shortest distance. For example, the second internal conductor 40 may have a second via conductor 41 (described later) inclined with respect to the direction perpendicular to the first surface 11. This point will be described later. Note that if the second insulating substrate 20 further includes a conductor located on the fourth surface 22, the second internal conductor 40 may be electrically connected to the conductor located on the fourth surface 22. Furthermore, a portion of the second internal conductor 40 may be exposed at the fourth surface 22 or the second side surface 23.

[0039] The second inner conductor 40 has a second via conductor 41 that penetrates at least a portion of the second insulating substrate 20, and a second land conductor 42 that is electrically connected to the second via conductor 41. The second via conductor 41 penetrates one or more organic resin layers 24. The second land conductor 42 may be located between the multiple organic resin layers 24. The second land conductor 42 may be a portion that is located around the second via conductor 41 in a planar view. In other words, the second land conductor 42 may be located at a position that overlaps with the second via conductor 41 in a planar view.

[0040] The second land conductor 42 may extend in one or more directions from the periphery of the second via conductor 41. In other words, the second land conductor 42 may have a first portion located around the second via conductor 41 and a second portion extending in one or more directions from the first portion. The second land conductor 42 may also have a so-called solid pattern. The second land conductor 42 may be in contact with other conductors on the same plane in the horizontal direction. In other words, the conductor area may extend in a direction that is part of the second land conductor 42.

[0041] The first inner conductor 30 may be, for example, a metal conductor containing tungsten or molybdenum as its main component. As an example, the first via conductor 31 may be a metal conductor containing tungsten as its main component, and the first land conductor 32 may be a metal conductor containing molybdenum as its main component. Alternatively, the first via conductor 31 may be a metal conductor containing molybdenum as its main component, and the first land conductor 32 may be a metal conductor containing tungsten as its main component. Alternatively, both the first via conductor 31 and the first land conductor 32 may be metal conductors containing tungsten as their main component, or both the first via conductor 31 and the first land conductor 32 may be metal conductors containing molybdenum as their main component. Note that the first inner conductor 30 may be, for example, a metal conductor containing copper or gold as its main component and also containing tungsten or molybdenum.

[0042] The second inner conductor 40 may be, for example, a metal conductor containing copper as a main component, or may be a metal conductor containing copper and bismuth.

[0043] The first internal conductor 30 may contain a glass material. In this case, the first internal conductor 30 is bonded to the first insulating substrate 10, which also contains a glass material, via the glass material. Specifically, the glass material contained in the first internal conductor 30 can be integrated with the glass material contained in the first insulating substrate 10 by firing. This allows the anchor effect between the glass materials to strengthen the bond between the first insulating substrate 10 and the first internal conductor 30. This also allows the rigidity of the first insulating substrate 10 to be increased.

[0044] Furthermore, when the first internal conductor 30 contains a glass material, the firing temperatures of the first insulating substrate 10 and the first internal conductor 30 can be made closer to each other in the firing process during the manufacturing of the wiring substrate 100. Furthermore, the shrinkage rates of the first insulating substrate 10 and the first internal conductor 30 can be adjusted.

[0045] <Physical Properties of First Insulating Substrate and Second Insulating Substrate> The thermal expansion coefficient of the second insulating substrate 20 is different from that of the first insulating substrate 10. Specifically, the thermal expansion coefficient of the first insulating substrate 10 in the direction along the first surface 11 is different from that of the second insulating substrate 20 in the direction along the first surface 11. For example, the thermal expansion coefficient of the first insulating substrate 10 may be smaller than that of the second insulating substrate 20. Because the second insulating substrate 20 is bonded to the first insulating substrate 10, with the above configuration, when the second insulating substrate 20 attempts to thermally deform due to a temperature change, the first insulating substrate 10 restrains the second insulating substrate 20, thereby reducing the thermal deformation of the second insulating substrate 20.

[0046] <Interlayer Conductor> The interlayer conductor 50 is located on the first surface 11 between the first insulating substrate 10 and the second insulating substrate 20, and electrically connects the conductor located within or on the surface of the first insulating substrate 10 to the conductor located within or on the surface of the second insulating substrate 20. Specifically, the interlayer conductor 50 is electrically connected to the first via conductor 31 and also to the second via conductor 41. The wiring board 100 having such an interlayer conductor 50 has a high degree of design freedom. The interlayer conductor 50 may be a metal conductor containing tungsten or molybdenum as a main component. The interlayer conductor 50 may also contain a glass material.

[0047] The interlayer conductor 50 is located at a position overlapping at least the first via conductor 31 and the second via conductor 41 in a plan view. As shown in Fig. 4, the interlayer conductor 50 may extend in one or more directions from the periphery of the first via conductor 31 and the second via conductor 41. In other words, the interlayer conductor 50 may have a structure having only a first portion located around the first via conductor 31 and the second via conductor 41, or may have a structure having the first portion and a second portion extending in one or more directions from the first portion. From another perspective, the interlayer conductor 50 may be in contact with another conductor on the same plane in the horizontal direction.

[0048] Here, in a plan view, the minimum distance between the outer edge of the first via conductor 31 and the outer edge of the interlayer conductor 50 is defined as L0. Furthermore, the minimum distance between the outer edge of the first via conductor 31 and the outer edge of the first land conductor 32 is defined as L1. Furthermore, the minimum distance between the outer edge of the second via conductor 41 and the outer edge of the second land conductor 42 is defined as L2. Here, the "outer edge" refers to the edge in a direction perpendicular to the thickness direction of the wiring substrate 100.

[0049] The interlayer conductor 50 according to the embodiment is configured so that L0 is greater than L1 and L2.

[0050] As described above, in the wiring board 100 according to the present disclosure, the interlayer conductor 50 is formed wider than the first land conductor 32 and the second land conductor 42. As a result, even if the positions of the first via conductor 31 and the second via conductor 41 are misaligned due to a difference in the thermal expansion coefficients of the first insulating substrate 10 and the second insulating substrate 20, the first via conductor 31 and the interlayer conductor 50 are likely to remain electrically connected, and the second via conductor 41 and the interlayer conductor 50 are also likely to remain electrically connected. Therefore, the wiring board 100 according to the present disclosure can reduce the possibility that the electrical connection between the first insulating substrate 10 and the second insulating substrate 20 will be interrupted due to a difference in the thermal expansion coefficients of the first insulating substrate 10 and the second insulating substrate 20.

[0051] Furthermore, as a problem in the manufacturing process, while the positional tolerance of ceramic and organic materials may be large, the positional tolerance of the ceramic and the positional tolerance of the organic material may be large in either case. Because of the difference in the horizontal positional tolerance between the first insulating substrate 10 and the second insulating substrate 20, if the area of ​​the interlayer conductor 50 is small, the first via conductor 31 and the second via conductor 41 may be misaligned, resulting in a disconnection. According to the wiring board 100 of the present disclosure, even if the first via conductor 31 and the second via conductor 41 are misaligned due to the difference in the positional tolerance between the first insulating substrate 10 and the second insulating substrate 20, the area of ​​the interlayer conductor 50 is increased so that the first via conductor 31 and the second via conductor 41 are connected by the interlayer conductor 50, thereby making it difficult for the electrical connection to be interrupted. In other words, even if the positions of the first via conductor 31 and the second via conductor 41 vary due to manufacturing tolerances resulting from differences in the materials of the first insulating substrate 10 and the second insulating substrate 20, the likelihood of the electrical connection being interrupted can be reduced. The manufacturing tolerances mentioned here are due to shrinkage during hardening of organic materials and sintering of ceramics during the manufacturing process.

[0052] Furthermore, when the first via conductors 31 and the interlayer conductors 50, and the second via conductors 41 and the interlayer conductors 50 each contain the same metal material, the bonding between the insulating substrates can be strengthened by metallic bonding using the same metal material. Even when the first via conductors 31 and the interlayer conductors 50, and the second via conductors 41 and the interlayer conductors 50 each contain different metal materials, the bonding between the insulating substrates can be strengthened by forming an alloy layer.

[0053] In addition, in a plan view, the first via conductor 31 and the second via conductor 41 may at least partially overlap each other. For example, as shown in Fig. 4, the first via conductor 31 and the second via conductor 41 may completely coincide and overlap each other in a plan view. In addition, without being limited to the example of Fig. 4, for example, as shown in Fig. 5, the first via conductor 31 and the second via conductor 41 may partially overlap each other in a plan view.

[0054] As a result, the wiring length is shorter in plan view than when the first via conductor 31 and the second via conductor 41 do not completely overlap, thereby reducing electrical resistance. Also, in plan view, the wiring is bent less than when the first via conductor 31 and the second via conductor 41 do not completely overlap, thereby reducing transmission loss at a predetermined frequency. Furthermore, resonance with a frequency band that could become noise occurs at the bent portion of the wiring, reducing the possibility of receiving noise.

[0055] Furthermore, when a portion of the first via conductor 31 overlaps a portion of the second via conductor 41, at the position where the first via conductor 31 and the second via conductor 41 overlap in a planar view, the first via conductor 31 and the second via conductor 41 are continuous in the thickness direction of the wiring board 100, so it can be considered that there is no bending at that position.

[0056] Here, a supplementary note on the above-mentioned transmission loss is provided. The transmission efficiency at a given frequency is assumed in the design stage under the condition that the first via conductor 31 and the second via conductor 41 are continuously aligned in a straight line. If the first via conductor 31 and the second via conductor 41 are misaligned due to differences in the positional tolerance between the first insulating substrate 10 and the second insulating substrate 20 during the manufacturing process, the first via conductor 31 and the second via conductor 41 may not be aligned in a straight line, resulting in a bend. Since the impedance changes when the conductor is bent compared to when it is linear, a frequency design optimized for a linear state may result in a decrease in transmission efficiency. Furthermore, an increase in the transmission ratio of the noise frequency band due to the bend results in a relative decrease in the power of the frequency to be transmitted. Therefore, the expected transmission efficiency cannot be achieved, and the above-mentioned transmission loss may occur.

[0057] L0 may be 1.5 to 4.0 times L1. With this configuration, the possibility of the electrical connection between the first insulating substrate 10 and the second insulating substrate 20 being interrupted can be suitably reduced.

[0058] L1 may be smaller than L2. This allows efficient heat diffusion in an organic substrate having a relatively low thermal conductivity when the second insulating substrate 20 is an organic substrate containing an organic material. Note that L1 does not necessarily have to be smaller than L2, and may be larger than L2.

[0059] Here, another reason why L1 may be smaller than L2 will be explained. When the first via conductor 31 and the first land conductor 32 each contain a glass material, the anchor effect of the glass material bonds them together, making them less likely to peel off. Therefore, even if the bonding area is small, the risk of disconnection is low, so L1 may be smaller than L2.

[0060] In a plan view, the bonding area between the second via conductor 41 and the second land conductor 42 may be larger than the bonding area between the first via conductor 31 and the first land conductor 32. The second via conductor 41 and the second land conductor 42 may be bonded by pressure. That is, the second via conductor 41 and the second land conductor 42 may not have a substance to bond them together, such as the glass material of the first via conductor 31 and the first land conductor 32. In such a case, if the bonding area between the second via conductor 41 and the second land conductor 42 is small, the bonding strength between the second via conductor 41 and the second land conductor 42 may be insufficient, and the second via conductor 41 and the second land conductor 42 may peel off. Therefore, from the viewpoint of increasing the bonding area and reducing the possibility of electrical connection being interrupted, L2 may be larger than L1.

[0061] As shown by the two-dot chain line in Figure 5, the second via conductor 41 may be inclined with respect to the direction perpendicular to the first surface 11. This reduces the number of bending points of the current path flowing through the wiring and increases the bending angle, thereby reducing transmission loss at a predetermined frequency. Furthermore, noise may be generated due to the wiring length between bending points of the current path flowing through the wiring, but noise reception due to resonance with the frequency band that may cause the noise can be prevented. The bending angle is the angle at which the second via conductor 41 and the interlayer conductor 50 intersect, the angle at which the interlayer conductor 50 intersects with the first via conductor 31, or the angle at which the second via conductor 41 and the first via conductor 31 intersect.

[0062] Furthermore, when the second via conductor 41 is tilted, it is possible to reduce the possibility that a crack will occur in the wiring substrate 100 in the thickness direction of the wiring substrate 100. In other words, since the second via conductor 41 is located at the tip of a crack that will occur in the thickness direction of the wiring substrate 100, the crack will be less likely to progress.

[0063] In addition, in a plan view, the second via conductor 41 may be offset from the first via conductor 31. For example, as shown in Fig. 5, the first via conductor 31 and the second via conductor 41 may only partially overlap in a plan view. As shown in Fig. 6, the second via conductor 41 may be positioned so as not to completely overlap with the first via conductor 31 in a plan view.

[0064] When the first via conductor 31 and the second via conductor 41 are continuously located at the same location, there is a possibility that cracks will occur starting from that location. However, the above-described configuration can reduce the possibility of such cracks occurring. In addition, intentionally forming a bending point in the wiring makes it easier for resonance with a specific frequency band due to the wiring length between the bending points to occur, thereby improving transmission efficiency. Furthermore, when multiple via conductors are continuously connected in a straight line in the thickness direction of the wiring substrate 100, cracks are more likely to occur starting from the via conductors. However, the above-described configuration can reduce the risk of such cracks occurring.

[0065] As shown in FIG. 7 , the interlayer conductor 50 may have a first conductor layer 51 and a second conductor layer 52. The first conductor layer 51 is electrically connected to the first internal conductor 30. Specifically, the first conductor layer 51 may be electrically connected to the first via conductor 31. The second conductor layer 52 is located on the first conductor layer 51 and is electrically connected to the second internal conductor 40. Specifically, the second conductor layer 52 may be electrically connected to the second via conductor 41. The first conductor layer 51 may contain a glass material. The second internal conductor 40 and the second conductor layer 52 may contain the same metal material. For example, the same metal material may be copper.

[0066] When the first insulating substrate 10 and the first conductor layer 51 contain a glass material, the anchoring effect of the glass material can increase the bonding strength between the first insulating substrate 10 and the first conductor layer 51. Furthermore, the second internal conductor 40 and the second conductor layer 52, which contain the same metal material, are bonded together by melting the metal material through heat treatment during the manufacturing process. Furthermore, since the surface of the first conductor layer 51, which contains a glass material, is relatively rough, in other words, uneven, the second conductor layer 52 located on the first conductor layer 51 is bonded by the anchoring effect caused by the unevenness of the surface of the first conductor layer 51. In this way, the wiring board 100 according to the present disclosure can increase the bonding strength between the first insulating substrate 10 and the first conductor layer 51, between the second internal conductor 40 and the second conductor layer 52, and between the first conductor layer 51 and the second conductor layer 52. Therefore, even if a load is applied to the first conductor layer 51 and the second conductor layer 52, which are the electrical connection portions at the joint between the first insulating substrate 10 and the second insulating substrate 20, the electrical connection between the first insulating substrate 10 and the second insulating substrate 20 is unlikely to be interrupted. Therefore, according to the wiring board 100 of the present disclosure, the reliability of the electrical connection at the joint between the first insulating substrate 10 and the second insulating substrate 20 can be improved.

[0067] The first conductor layer 51 may have a higher thermal conductivity than the first internal conductor 30. By increasing the thermal conductivity of the first conductor layer 51, which has a larger surface area than the first internal conductor 30, it is possible to release heat at the joint of the insulating substrate to the first insulating substrate 10 side. The metal material contained in the first conductor layer 51 may be tungsten, and the metal material contained in the first via conductor 31 may be molybdenum. The metal material contained in the first conductor layer 51 may be copper, and the metal material contained in the first via conductor 31 may be tungsten.

[0068] Furthermore, the metal material contained in the first conductor layer 51 may be the same as the metal material contained in the first internal conductor 30. This strengthens the bond between the first conductor layer 51 and the first internal conductor 30. Furthermore, the same metal material has the same ionization tendency, melting point, or specific gravity, which reduces the possibility of metal diffusion between the first conductor layer 51 and the first internal conductor 30 and chemical reactions such as corrosion due to metal diffusion.

[0069] The thermal conductivity of the first insulating substrate 10 may be higher than that of the second insulating substrate 20. When the metal material contained in the first conductor layer 51 is the first metal material and the metal material contained in the second internal conductor 40 and the second conductor layer 52 is the second metal material, the thermal conductivity of the second metal material may be higher than that of the first metal material. In this case, the first conductor layer 51, the second internal conductor 40, and the second conductor layer 52 have an inverse relationship in terms of thermal conductivity with respect to the first insulating substrate 10 and the second insulating substrate 20. This prevents heat from being trapped in the second insulating substrate 20 and allows heat to dissipate to the first insulating substrate 10, which has a higher thermal conductivity. When a heat source is present on the first insulating substrate 10 side, heat can be guided to the second internal conductor 40 and the second conductor layer 52, rather than to the second insulating substrate 20. The first metal material may be tungsten or molybdenum. The second metallic material may be copper.

[0070] The interlayer conductor 50 may further include an intermediate conductor layer 53 located between the first conductor layer 51 and the second conductor layer 52. This prevents unintended chemical reactions between the first conductor layer 51 and the second conductor layer 52. The intermediate conductor layer 53 functions as a barrier layer, reducing the possibility of cracks occurring in the interlayer conductor 50 due to a reaction between the first conductor layer 51 and the second conductor layer 52, reducing durability against external impacts. Furthermore, the interlayer conductor 50 may be less likely to contain copper contained in the second conductor layer 52, for example, penetrating into the grain boundaries of the first conductor layer 51.

[0071] Furthermore, when the metal material contained in the first conductor layer 51 is the first metal material, the metal material contained in the second conductor layer 52 is the second metal material, and the metal material contained in the intermediate conductor layer 53 is the third metal material, the linear thermal expansion coefficient α3 of the third metal material may be between the linear thermal expansion coefficient α1 of the first metal material and the linear thermal expansion coefficient α2 of the second metal material. In other words, the linear thermal expansion coefficient α3 of the third metal material may be greater than the linear thermal expansion coefficient α1 of the first metal material and less than the linear thermal expansion coefficient α2 of the second metal material.

[0072] This allows the third metal material to be positioned between the first metal material and the second metal material, reducing the possibility of the first metal material and the second metal material peeling off due to the difference in linear thermal expansion coefficients caused by repeated thermal expansion and contraction during mounting of the electronic component or operation of the electronic component. The linear thermal expansion coefficient α3 of the third metal material may be smaller than the linear thermal expansion coefficient α1 of the first metal material and larger than the linear thermal expansion coefficient α2 of the second metal material. The first metal material may be tungsten or molybdenum. The second metal material may be copper. The third metal material may be nickel.

[0073] Furthermore, the linear thermal expansion coefficient α1 of the first metal material may be smaller than the linear thermal expansion coefficient α2 of the second metal material. Thus, when the first insulating substrate 10 is a ceramic substrate, by reducing the linear thermal expansion coefficient of the first metal material located on the ceramic substrate side, it is possible to reduce the possibility of cracks occurring in the ceramic substrate due to thermal expansion of the first conductor layer 51 caused by repeated thermal expansion and contraction during mounting and operation of electronic components.

[0074] In the above-described embodiment, an example has been described in which the via conductor is composed of two via conductors, the first via conductor 31 and the second via conductor 41. However, the present invention is not limited to this, and the wiring substrate 100 may further include a third via conductor 43.

[0075] 8 is a perspective view showing an example of the configuration of a wiring board according to an embodiment. The second internal conductor 40 may further include a third via conductor 43 spaced apart from the second via conductor 41. In this case, the interlayer conductor 50 may further include an interlayer land conductor 54 connected to the first via conductor 31 and the second via conductor 41, and an interlayer electrode 55 continuous with the interlayer land conductor 54. The interlayer electrode 55 may be electrically connected to the third via conductor 43.

[0076] The third via conductor 43 of the second inner conductor 40 may be connected to the interlayer land conductor 54 instead of the interlayer electrode 55. The second inner conductor 40 may have a plurality of third via conductors 43. By connecting the second via conductor 41 and the third via conductor 43 to the interlayer land conductor 54 and / or the interlayer electrode 55, the impedance value can be adjusted.

[0077] This facilitates electrical conduction between layers. Furthermore, if the interlayer conductor 50 is a ground terminal, the ground potential can be strengthened. Furthermore, forming a parallel circuit with the second via conductor 41 and the third via conductor 43 reduces electrical resistance. Furthermore, electrical connection can be ensured even if one of the second via conductor 41 and the third via conductor 43 experiences a conduction failure.

[0078] The first inner conductor 30 may further include a third via conductor (not shown) located at a distance from the first via conductor 31. In this case, the interlayer conductor 50 may also include an interlayer land conductor 54 connected to the first via conductor 31 and the second via conductor 41, and an interlayer electrode 55 continuous with the interlayer land conductor 54. The interlayer electrode 55 may be electrically connected to a third via conductor (not shown). This configuration achieves the same effect as when the second inner conductor 40 includes the third via conductor 43. Note that both the first inner conductor 30 and the second inner conductor 40 may include a third via conductor.

[0079] The third via conductor of the first inner conductor 30 may be connected to the interlayer land conductor 54 instead of the interlayer electrode 55. The first inner conductor 30 may have a plurality of third via conductors. By connecting the first via conductor 31 and the third via conductor to the interlayer land conductor 54 and / or the interlayer electrode 55, the impedance value can be adjusted.

[0080] Here, the number of vias in the second internal conductor 40 connected to the interlayer conductor 50 may be equal to or greater than the number of vias in the first internal conductor 30 connected to the interlayer conductor 50. In this case, the vias in the second internal conductor 40 connected to the interlayer conductor 50 and the vias in the first internal conductor 30 connected to the interlayer conductor 50 may overlap or be separated in plan view.

[0081] Conversely, the number of vias in the first internal conductor 30 connected to the interlayer conductor 50 may be equal to or greater than the number of vias in the second internal conductor 40 connected to the interlayer conductor 50. In this case, the vias in the first internal conductor 30 connected to the interlayer conductor 50 and the vias in the second internal conductor 40 connected to the interlayer conductor 50 may overlap or be separated in plan view.

[0082] In addition, when the interlayer conductor 50 includes the interlayer land conductor 54 and the interlayer electrode 55, the second internal conductor 40 does not necessarily have to have the third via conductor 43. For example, instead of the third via conductor 43, an interlayer electrode (not shown) may be connected to the interlayer land conductor 54 of the interlayer conductor 50.

[0083] The wiring board 100 may be configured to include a side conductor 60 instead of the third via conductor 43. This point will be described with reference to Figures 9 to 11. Figures 9 to 11 are enlarged perspective views showing an example of a side conductor.

[0084] The wiring board 100 may further include a side conductor 60 located on at least one of the first side surface 13 of the first insulating substrate 10 and the second side surface 23 of the second insulating substrate 20. The side conductor 60 may be, for example, a castellation, and may be electrically connected to the interlayer conductor 50. The side conductor 60 may extend in the thickness direction of the wiring board 100. As shown in FIG. 9, the side conductor 60 may be located on the second side surface 23 of the second insulating substrate 20. As shown in FIG. 10, the side conductor 60 may be located on the first side surface 13 of the first insulating substrate 10 and the second side surface 23 of the second insulating substrate 20. As shown in FIG. 11, the side conductor 60 may be located on the first side surface 13 of the first insulating substrate 10.

[0085] In the above-described embodiment, L0, L1, and L2 in the via conductors, land conductors, and interlayer conductors 50 of the same wiring system have been described, but the above-described magnitude relationship may be established by comparing L0, L1, and L2 in the via conductors, land conductors, and interlayer conductors of different wiring systems. The thickness of the first land conductor 32 may be smaller than the thickness of the second land conductor 42. The diameter of the first via conductor 31 may be larger or smaller than the diameter of the second via conductor 41.

[0086] <Semiconductor Device> Fig. 12 is a perspective view showing an example of the configuration of a semiconductor device according to an embodiment. Fig. 13 is a cross-sectional perspective view showing an example of the configuration of a semiconductor device according to an embodiment. As shown in Figs. 12 and 13, a semiconductor device 300 includes a wiring substrate 100, a semiconductor element 310, and an optical filter 320.

[0087] The semiconductor element 310 is mounted on the wiring board 100. In the example shown in Figures 12 and 13, the semiconductor element 310 is mounted on the third surface 21 of the second insulating substrate 20 in the wiring board 100. The semiconductor element 310 is located inside the through hole 110. In the example shown in Figures 12 and 13, the optical filter 320 is mounted on the fourth surface 22 of the second insulating substrate 20 in the wiring board 100. The optical filter 320 is located so as to face the open end of the through hole 110 on the fourth surface 22.

[0088] The semiconductor element 310 is, for example, an image sensor, and generates heat due to the operation of the image sensor. When thermal expansion and thermal contraction are repeated due to the operation of the image sensor, the wiring substrate 100 can reduce the possibility that the electrical connection between the insulating substrates will be broken due to the difference in thermal expansion coefficient between the first insulating substrate 10 and the second insulating substrate 20. The semiconductor element 310 may be electrically connected to the wiring substrate 100 by solder, i.e., flip-chip mounting, or by bonding wire.

[0089] The first insulating substrate 10 may contain an organic resin. The second insulating substrate 20 may contain ceramic as a main component. That is, the semiconductor element 310 may be mounted on the second insulating substrate 20 whose main component is ceramic.

[0090] The present disclosure has been described in detail above, but the present disclosure is not limited to the above-described embodiments, and various modifications, improvements, etc. are possible within the scope that does not deviate from the gist of the present disclosure.

[0091] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. Indeed, the above-described embodiments can be embodied in various forms. Furthermore, the above-described embodiments may be omitted, substituted, or modified in various forms without departing from the scope and spirit of the appended claims. Combinations of embodiments are also possible.

[0092] The present technology can also be configured as follows: (1) A semiconductor device comprising: a first insulating substrate having a first surface; a second insulating substrate located in contact with the first surface; a first internal conductor located in the first insulating substrate; a second internal conductor located in the second insulating substrate; and an interlayer conductor located on the first surface, wherein the first internal conductor has a first via conductor penetrating at least a portion of the first insulating substrate and a first land conductor electrically connected to the first via conductor, the second internal conductor has a second via conductor penetrating at least a portion of the second insulating substrate and a second land conductor electrically connected to the second via conductor, the second insulating substrate has a thermal expansion coefficient different from that of the first insulating substrate, the interlayer conductor is electrically connected to the first via conductor and the second via conductor, A wiring board in which, in a plan view seen from a direction perpendicular to the first surface, the minimum distance between the outer edge of the first via conductor and the outer edge of the interlayer conductor is L0, the minimum distance between the outer edge of the first via conductor and the outer edge of the first land conductor is L1, and the minimum distance between the outer edge of the second via conductor and the outer edge of the second land conductor is L2, L0 is larger than L1 and L2. (2) The wiring board according to (1), in which, in the plan view, the first via conductor and the second via conductor at least partially overlap. (3) The wiring board according to (1) or (2), in which L0 is 1.5 to 4.0 times L1. (4) The wiring board according to any one of (1) to (3), in which L1 is smaller than L2. (5) The wiring board according to any one of (1) to (4), in which the second via conductor is inclined with respect to a direction perpendicular to the first surface. (6) The wiring board according to any one of (1) to (5), wherein, in the plan view, the second via conductor is offset with respect to the first via conductor. (7) The wiring board according to any one of (1) to (6), wherein the second internal conductor further has a third via conductor positioned with a space between it and the second via conductor, the interlayer conductor further has an interlayer land conductor connected to the first via conductor and the second via conductor, and an interlayer electrode continuous with the interlayer land conductor, and the interlayer electrode is electrically connected to the third via conductor.(8) The wiring board according to any one of (1) to (6), wherein the first internal conductor further has a third via conductor positioned with a space between it and the first via conductor, the interlayer conductor further has an interlayer land conductor connected to the first via conductor and the second via conductor, and an interlayer electrode continuous with the interlayer land conductor, and the interlayer electrode is electrically connected to the third via conductor. (9) The wiring board according to any one of (1) to (8), wherein the first insulating substrate contains a glass material, and the first internal conductor contains a glass material. (10) The wiring board according to any one of (1) to (9), wherein the second insulating substrate contains a resin material. (11) The wiring board according to any one of (1) to (10), wherein the interlayer conductor has a first conductor layer electrically connected to the first internal conductor and a second conductor layer located on the first conductor layer and electrically connected to the second internal conductor, the first conductor layer containing a glass material, and the second internal conductor and the second conductor layer containing the same metal material. (12) The wiring board according to (11), wherein the first conductor layer has a higher thermal conductivity than the first internal conductor. (13) The wiring board according to (11) or (12), wherein the metal material contained in the first conductor layer is the same as the metal material contained in the first internal conductor. (14) The wiring board according to any one of (11) to (13), wherein the thermal conductivity of the first insulating substrate is higher than the thermal conductivity of the second insulating substrate, and when a metal material contained in the first conductor layer is a first metal material, and a metal material contained in the second internal conductor and the second conductor layer is a second metal material, the thermal conductivity of the second metal material is higher than the thermal conductivity of the first metal material. (15) The wiring board according to any one of (11) to (14), further comprising an intermediate conductor layer located between the first conductor layer and the second conductor layer.(16) The wiring board according to (15), wherein, when the metal material contained in the first conductor layer is a first metal material, the metal material contained in the second conductor layer is a second metal material, and the metal material contained in the intermediate conductor layer is a third metal material, the linear thermal expansion coefficient of the third metal material is between the linear thermal expansion coefficients of the first metal material and the second metal material. (17) The wiring board according to (16), wherein the linear thermal expansion coefficient of the first metal material is smaller than the linear thermal expansion coefficient of the second metal material. (18) A semiconductor device comprising: the wiring board according to any one of (1) to (17); and a semiconductor element mounted on the wiring board.

[0093] REFERENCE SIGNS LIST 10 First insulating substrate 11 First surface 20 Second insulating substrate 30 First internal conductor 31 First via conductor 32 First land conductor 40 Second internal conductor 41 Second via conductor 42 Second land conductor 43 Third via conductor 50 Interlayer conductor 51 First conductor layer 52 Second conductor layer 53 Intermediate conductor layer 54 Interlayer land conductor 55 Interlayer electrode 60 Side conductor 100 Wiring substrate 300 Semiconductor device 310 Semiconductor element

Claims

1. A wiring substrate comprising: a first insulating substrate having a first surface; a second insulating substrate positioned in contact with the first surface; a first internal conductor positioned within the first insulating substrate; a second internal conductor positioned within the second insulating substrate; and an interlayer conductor positioned on the first surface, wherein the first internal conductor has a first via conductor that penetrates at least a part of the first insulating substrate and a first land conductor that is electrically connected to the first via conductor, the second internal conductor has a second via conductor that penetrates at least a part of the second insulating substrate and a second land conductor that is electrically connected to the second via conductor, the coefficient of thermal expansion of the second insulating substrate is different from that of the first insulating substrate, the interlayer conductor is electrically connected to the first via conductor and the second via conductor, and in a plan view seen from a direction perpendicular to the first surface, when the minimum distance between the outer edge of the first via conductor and the outer edge of the interlayer conductor is L0, the minimum distance between the outer edge of the first via conductor and the outer edge of the first land conductor is L1, and the minimum distance between the outer edge of the second via conductor and the outer edge of the second land conductor is L2, L0 is greater than L1 and L2.

2. The wiring substrate according to claim 1, wherein in the plan view, at least a part of the first via conductor and the second via conductor overlap.

3. The wiring substrate according to claim 1 or 2, wherein L0 is 1.5 times or more and 4.0 times or less of L1.

4. The wiring substrate according to any one of claims 1 to 3, wherein L1 is smaller than L2.

5. The wiring substrate according to any one of claims 1 to 4, wherein the second via conductor is inclined with respect to the direction perpendicular to the first surface.

6. The wiring substrate according to any one of claims 1 to 5, wherein in the plan view, the second via conductor is displaced with respect to the first via conductor.

7. The wiring substrate according to any one of claims 1 to 6, wherein the second internal conductor further has a third via conductor positioned with a space therebetween from the second via conductor, the interlayer conductor further has an interlayer land conductor connected to the first via conductor and the second via conductor and an interlayer electrode continuous with the interlayer land conductor, and the interlayer electrode is electrically connected to the third via conductor.

8. The first internal conductor further has a third via conductor that is positioned with a space therebetween from the first via conductor, the interlayer conductor further has an interlayer land conductor that connects to the first via conductor and the second via conductor, and an interlayer electrode that is continuous with the interlayer land conductor, and the interlayer electrode is electrically connected to the third via conductor. The wiring substrate according to any one of claims 1 to 6.

9. The first insulating substrate contains a glass material, and the first internal conductor contains a glass material. The wiring substrate according to any one of claims 1 to 8.

10. The second insulating substrate contains a resin material. The wiring substrate according to any one of claims 1 to 9.

11. The interlayer conductor has a first conductor layer that is electrically connected to the first internal conductor, and a second conductor layer that is positioned on the first conductor layer and is electrically connected to the second internal conductor. The first conductor layer contains a glass material, and the second internal conductor and the second conductor layer contain the same metal material. The wiring substrate according to any one of claims 1 to 10.

12. The first conductor layer has a higher thermal conductivity than the first internal conductor. The wiring substrate according to claim 11.

13. The metal material contained in the first conductor layer is the same as the metal material contained in the first internal conductor. The wiring substrate according to claim 11 or 12.

14. When the thermal conductivity of the first insulating substrate is higher than the thermal conductivity of the second insulating substrate, the metal material contained in the first conductor layer is defined as a first metal material, and the metal materials contained in the second internal conductor and the second conductor layer are defined as a second metal material, the thermal conductivity of the second metal material is higher than the thermal conductivity of the first metal material. The wiring substrate according to any one of claims 11 to 13.

15. The wiring substrate according to any one of claims 11 to 14 further includes an intermediate conductor layer positioned between the first conductor layer and the second conductor layer.

16. When the metal material contained in the first conductor layer is defined as a first metal material, the metal material contained in the second conductor layer is defined as a second metal material, and the metal material contained in the intermediate conductor layer is defined as a third metal material, the linear thermal expansion coefficient of the third metal material is between the linear thermal expansion coefficient of the first metal material and the linear thermal expansion coefficient of the second metal material. The wiring substrate according to claim 15.

17. The wiring board according to claim 16, wherein the linear thermal expansion coefficient of the first metal material is smaller than the linear thermal expansion coefficient of the second metal material.

18. A semiconductor device comprising the wiring board according to any one of claims 1 to 17 and a semiconductor element mounted on the wiring board.

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