Communication method and apparatus, and storage medium

Abstract

The embodiments of the present disclosure provide a communication method and apparatus, and a storage medium, which relate to the technical field of communications and are used for improving the communication efficiency. The communication method comprises: acquiring a bit sequence, the bit sequence comprising a plurality of bits; on the basis of the bit sequence and a preset mapping relationship, generating a complex symbol sequence, the complex symbol sequence comprising a plurality of complex symbols, and the preset mapping relationship being used for indicating that the plurality of bits are mapped into the plurality of complex symbols; and transmitting the complex symbol sequence.

Description

Communication method and device, and storage medium

[0001] This application claims priority to Chinese patent application No. 202410016401.X filed on January 3, 2024, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of communication technologies, and in particular to a communication method and device, and a storage medium. Background Art

[0003] In wireless communications, information signals must be converted into signals suitable for transmission over a communication channel to ensure reliable transmission within the communication system. Currently, the modulation methods used in wireless communications are all two-dimensional modulation, which maps multiple bits into a single complex symbol during the modulation process, improving both data transmission efficiency and spectral efficiency.

[0004] Summary of the Invention

[0005] Embodiments of the present disclosure provide a communication method and apparatus, as well as a storage medium, for improving communication efficiency.

[0006] In a first aspect, a communication method is provided, which includes: obtaining a bit sequence, the bit sequence including multiple bits; generating a complex symbol sequence based on the bit sequence and a preset mapping relationship, the complex symbol sequence including multiple complex symbols, the preset mapping relationship being used to indicate mapping multiple bits to multiple complex symbols; and sending the complex symbol sequence.

[0007] In a second aspect, a communication device is provided, comprising: a processing module and a communication module. The processing module is configured to obtain a bit sequence comprising a plurality of bits. The processing module is further configured to generate a complex symbol sequence based on the bit sequence and a preset mapping relationship. The complex symbol sequence comprises a plurality of complex symbols, and the preset mapping relationship indicates that the plurality of bits are mapped to a plurality of complex symbols. The communication module is configured to transmit the complex symbol sequence.

[0008] In a third aspect, a communication device is provided, the communication device including a processor, wherein the processor implements the communication method of the first aspect when executing a computer program.

[0009] In a fourth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes computer instructions; when the computer instructions are executed, the communication method of the first aspect is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings.

[0011] FIG1 is a schematic diagram of the architecture of a communication system according to an embodiment of the present disclosure.

[0012] FIG2 is a flow chart of a communication method according to an embodiment of the present disclosure.

[0013] FIG3 is a schematic diagram of an end-to-end structure according to an embodiment of the present disclosure.

[0014] FIG4 is a schematic diagram of the structure of a modulation neural network according to an embodiment of the present disclosure.

[0015] FIG5 is a schematic diagram of the structure of a demodulation neural network according to an embodiment of the present disclosure.

[0016] FIG6 is a flow chart of a modulation neural network and a demodulation neural network according to an embodiment of the present disclosure.

[0017] FIG7 is a performance comparison diagram of high-dimensional modulation according to an embodiment of the present disclosure.

[0018] FIG8 is a flow chart of another communication method according to an embodiment of the present disclosure.

[0019] FIG9 is a schematic structural diagram of a communication device according to an embodiment of the present disclosure.

[0020] FIG10 is a schematic structural diagram of another communication device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0021] The following will be combined with the accompanying drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the embodiments described are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present disclosure.

[0022] In the description of the present disclosure, unless otherwise specified, " / " means "or", for example, A / B can mean A or B. "And / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: only A, only B, and A and B. In addition, "at least one" means one or more, and "a plurality" means two or more. Words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0023] It should be noted that, in this disclosure, words such as "exemplary" or "for example" are used to describe examples, illustrations, or explanations. Any embodiment or design described in this disclosure using words such as "exemplary" or "for example" should not be interpreted as being more preferred or advantageous than other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0024] Current modulation methods are all two-dimensional modulation, such as Quadrature Amplitude Modulation (QAM) in the fifth generation mobile communication technology (5G) and Amplitude and Phase Shift Keying modulation (APSK) in the second generation standard of digital video broadcasting (DVB-S2). In two-dimensional modulation, since multiple bits are mapped to one complex symbol, more bandwidth resources are required to transmit information, reducing communication efficiency. Moreover, in two-dimensional modulation, information can only be transmitted in two dimensions, resulting in a large number of symbols in each dimension, reducing spectrum utilization and further limiting communication efficiency. Therefore, how to change the modulation method and thus improve communication efficiency is an urgent problem to be solved.

[0025] Based on this, the present disclosure provides a communication method that, through a preset mapping relationship, maps multiple bits in a bit sequence into multiple complex symbols rather than a single complex symbol. This achieves high-dimensional modulation, reduces the bandwidth resources required for information transmission, and improves communication efficiency. Furthermore, the method can transmit information in multiple dimensions, reducing the number of symbols required for information transmission in each dimension, improving spectrum utilization, and further enhancing communication efficiency.

[0026] The communication method provided by the present disclosure can be applied to a communication system as shown in Figure 1, which shows a schematic diagram of the architecture of a communication system according to an embodiment of the present disclosure. As shown in Figure 1, the communication system includes a first node 10 and a second node 20.

[0027] In a wireless communication scenario, a first node 10 and a second node 20 communicate via a wireless channel. For example, the first node 10 is a base station and the second node 20 is a terminal. The base station and the terminal communicate via a wireless channel. In another example, the first node 10 is a terminal and the second node 20 is a wireless router. The wireless router and the terminal communicate via a wireless channel. In another example, the first node 10 is a first base station and the second node 20 is a second base station. The first base station and the second base station communicate via a wireless channel. In another example, the first node 10 is a first terminal and the second node 20 is a second terminal. The first terminal and the second terminal communicate via a wireless channel. In another example, the first node 10 is a repeater and the second node 20 is a base station. The base station and the repeater communicate via a wireless channel. In another example, the first node 10 is a terminal and the second node 20 is a repeater. The repeater and the terminal communicate via a wireless channel. In another example, the first node 10 is a first repeater and the second node 20 is a second repeater. The first repeater and the second repeater communicate via a wireless channel. For another example, the first node 10 is a base station, the second node 20 is a satellite, and the satellite and base station communicate via a wireless channel. For another example, the first node 10 is a satellite, the second node 20 is a base station, and the base station and satellite communicate via a wireless channel. For another example, the first node 10 is a terminal, the second node 20 is a satellite, and the satellite and terminal communicate via a wireless channel. For another example, the first node 10 is a satellite, the second node 20 is a terminal, and the terminal and satellite communicate via a wireless channel. For another example, the first node 10 is a ground device, the second node 20 is an aircraft, and the aircraft and ground device communicate via a wireless channel. For another example, the first node 10 is a first aircraft, the second node 20 is a second aircraft, and the first and second aircraft communicate via a wireless channel.

[0028] In the embodiments of the present disclosure, description is mainly made by taking the first node 10 as a base station and the second node 20 as a terminal as an example.

[0029] In some embodiments, the first node 10 is configured to provide wireless access services to multiple terminals. For example, a base station provides a service coverage area (also known as a cell). Terminals that enter this area can communicate with the base station via wireless signals to receive the wireless access services provided by the base station.

[0030] In some embodiments, the first node 10 may be a base station or an evolved base station (eNB or eNodeB) in long term evolution (LTE) or long term evolution advanced (LTE-A), a base station device in a 5G network, or a base station in a future communication system. The base station may include various network-side devices such as various macro base stations, micro base stations, home base stations, wireless remote devices, reconfigurable intelligent surfaces (RIS), routers, and wireless fidelity (WIFI) devices.

[0031] In some embodiments, the second node 20 can be a device with wireless transceiver capabilities, which can be deployed on land, including indoors or outdoors, handheld, wearable, or vehicle-mounted; it can also be deployed on the water surface (such as a ship, etc.); it can also be deployed in the air (for example, on an airplane, a balloon, and a satellite, etc.). The terminal can be a mobile phone, a tablet computer, a computer with wireless transceiver capabilities, a virtual reality (VR) terminal, an augmented reality (AR) terminal, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical care, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, etc. The embodiments of the present disclosure do not limit the application scenarios. The terminal may sometimes also be referred to as a user, user equipment (UE), access terminal, UE unit, UE station, mobile station, mobile station, remote station, remote terminal, mobile device, UE terminal, wireless communication device, UE agent or UE device, etc., but the embodiments of the present disclosure are not limited to this.

[0032] It should be noted that Figure 1 is only an exemplary framework diagram. The number of devices included in Figure 1 and the names of each device are not limited. In addition to the devices shown in Figure 1, the communication system may also include other devices, such as core network devices.

[0033] The application scenarios of the embodiments of the present disclosure are not limited. The system architecture and business scenarios described in the embodiments of the present disclosure are intended to more clearly illustrate the technical solutions of the embodiments of the present disclosure and do not constitute a limitation on the technical solutions provided by the embodiments of the present disclosure. Those skilled in the art will appreciate that with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided by the embodiments of the present disclosure are equally applicable to similar technical problems.

[0034] FIG2 shows a flow chart of a communication method according to the present disclosure. As shown in FIG2 , the communication method is applied to a first node and includes the following S101 to S103 .

[0035] In S101, a bit sequence is acquired.

[0036] The bit sequence includes a plurality of bits.

[0037] In some embodiments, the first node obtains the bit sequence based on the received sequence transmission information.

[0038] The sequence transmission information includes a bit sequence to be transmitted, and is used to instruct the first node to transmit the bit sequence.

[0039] For example, the sequence transmission information may be sent to the first node via a network by an upper-layer network device of the first node or a second node. The bit sequence may be data generated by an upper-layer network device of the first node or the second node, or a control instruction sent to the first node by another network device.

[0040] In S102, a complex symbol sequence is generated based on the bit sequence and a preset mapping relationship.

[0041] The complex symbol sequence includes multiple complex symbols, and the preset mapping relationship is used to indicate that multiple bits are mapped to multiple complex symbols.

[0042] It should be understood that the channel has certain frequency characteristics, and not all frequency components in the bit sequence can be transmitted through the channel. Therefore, the bit sequence needs to be modulated into a waveform suitable for transmission through the channel. The sequence after modulation is called a complex symbol sequence. In addition, modulation can convert the bit sequence into a more compact form, thereby reducing the bandwidth resources occupied during transmission, and modulation can also increase the anti-interference ability during transmission. In the embodiment of the present disclosure, the bit sequence is modulated into a complex symbol sequence through a preset mapping relationship to complete the subsequent transmission process.

[0043] The preset mapping relationship includes any one of the following: a modulation neural network, a modulation lookup table.

[0044] In some embodiments, a bit sequence is input into a modulation neural network to directly generate a complex symbol sequence corresponding to the bit sequence.

[0045] For example, the bit sequence b0, b1, b2, ..., b M-1 Input to the modulation neural network, b0,b1,b2,...,b M-1 ZhongmeiQ m *N d / 2 bits are mapped to N d / 2 complex symbols, and finally output the complex symbol sequence S0,S1,S2,...,S (M-1) / Qm .Q m Indicates the modulation order, which is used to indicate the number of bits that each complex symbol can carry. N d Represents the modulation dimension, which is used to indicate the dimension of each complex symbol when carrying bits.

[0046] As an implementation method, the modulation neural network is a neural network obtained by end-to-end structure training.

[0047] It's important to note that in machine learning or deep learning, an end-to-end training approach directly progresses from raw input data to final output. In this training approach, the entire neural network is trained to complete a specific task, rather than breaking the task down into separate stages for training. This training approach can make neural networks more automated and simplified, making them more adaptable to diverse data and tasks, and improving their performance and generalization.

[0048] As shown in Figure 3, it is a schematic diagram of an end-to-end structure according to an embodiment of the present disclosure, and the end-to-end structure includes at least one of the following: a modulation neural network and a demodulation neural network. In the end-to-end structure, bits serve as the input of the entire end-to-end structure, and at the same time serve as labels of the modulation neural network and the demodulation neural network, and are input to the modulation neural network. The output of the modulation neural network is input to the demodulation neural network through the channel, and finally the demodulation neural network outputs the log-likelihood ratio (LLR). The entire process uses binary cross-entropy (BCE) as the loss function.

[0049] As shown in FIG4 , the modulation neural network includes at least one of the following: a first input layer, a segmentation layer, a symmetry constraint layer, a first network block, a coordinate transformation layer, a multiplication layer, and a power normalization layer.

[0050] In some embodiments, the first input layer is used to input the bit sequence to the segmentation layer.

[0051] In some embodiments, the segmentation layer is used to divide the bit sequence into a first bit sequence and a second bit sequence, and input the first bit sequence into the symmetry constraint layer and input the second bit sequence into the first network block.

[0052] Exemplarily, the first bit sequence is used to implement the symmetry constraint, and the second bit sequence is used to calculate the amplitude. For example, the first input layer inputs an 8-bit bit sequence b0b1...b7. The segmentation layer segments this bit sequence into a first bit sequence b0b1b2b3 and a second bit sequence b4b5b6b7. The segmentation layer inputs the first bit sequence b0b1b2b3 to the symmetry constraint layer and the second bit sequence b4b5b6b7 to the first network block.

[0053] In some embodiments, the symmetry constraint layer is used to perform symmetric processing on the first bit sequence to generate a symmetric array, and input the symmetric array to the multiplication layer.

[0054] Exemplarily, the symmetric constraint layer is used to map bit 0 in the first bit sequence to bit 1, and to map bit 1 in the first bit sequence to bit -1. For example, when the first bit sequence is 0001, the symmetric array output by the symmetric constraint layer is [1, 1, 1, -1].

[0055] It should be noted that the symmetric constraint layer can be implemented by a fully connected layer, including the weight matrix and bias vector. For example, the input vector of the symmetric constraint layer is X = [x0, x1, ... x Nd-1 ], the output vector is Y=X*W+b. W=-2*eye(N d -1), W is the weight matrix, N d -1-dimensional unit diagonal matrix. The weight matrix represents the matrix consisting of all weight parameters between the two layers of neurons in the symmetric constraint layer. The weight matrix determines the strength of the connections between neurons, thereby affecting the learning and predictive capabilities of the modulated neural network. b = [1, 1, ... 1], where b is the bias vector, which adjusts the parameters of the activation function output of each layer of neurons. To ensure that the symmetric constraint layer remains unchanged during network training, the weight matrix and bias vector must remain unchanged during training.

[0056] In some embodiments, the first network block is used to generate a first array based on the second bit sequence, and input the first array to the coordinate transformation layer.

[0057] Exemplarily, the first network block may be composed of multiple layers of fully connected layers, or may be composed of a convolutional neural network, or may be composed of a recurrent neural network.

[0058] In some embodiments, the coordinate transformation layer is used to transform the polar coordinate system corresponding to the first array into a rectangular coordinate system, generate a second array, and input the second array into the multiplication layer.

[0059] It should be noted that the first array generated by the first network block has low diversity and may be at risk of overfitting. Therefore, a coordinate transformation is required to spatially transform the first data to increase the diversity of the first array and avoid the risk of overfitting, ultimately generating the second array.

[0060] For example, the coordinate transformation layer may represent the coordinates of the first array in the first coordinate system [x0, x1, ..., x Nd-1 ] is transformed into the coordinate representation of the second coordinate system [y0,y1,...,y Nd-1 ]. Taking the coordinate transformation layer to convert the 4-dimensional polar coordinate system into the 4-dimensional rectangular coordinate system as an example, the coordinate transformation formula is as follows: x1=r cosθ1cosθ2cosθ3 x2=r cosθ1cosθ2sinθ3 x3=r cosθ1sinθ2 x4=r sinθ1

[0061] In some embodiments, the multiplication layer is used to generate an initial complex array based on the symmetric array and the second array, and input the initial complex array to the power normalization layer.

[0062] For example, the modulation order Q m =4, modulation dimension N d =4 as an example. Assuming the first bit sequence is 0000, the symmetric array output by the symmetric constraint layer is [1,1,1,1]. Assuming the second array output after calculation by the first network block and the coordinate transformation layer is [w,x,y,z], the initial complex array generated by the multiplication layer based on the symmetric array and the second array is [w,x,y,z]. As another example, assuming the first bit sequence is 0001, the symmetric array output by the symmetric constraint layer is [1,1,1,-1]. Assuming the second array output after calculation by the first network block and the coordinate transformation layer is [w,x,y,z], the initial complex array generated by the multiplication layer based on the symmetric array and the second array is [w,x,y,-z].

[0063] In some embodiments, a power normalization layer is used to normalize the initial complex array, generate a complex array, and output the complex array.

[0064] Exemplarily, the normalization process is used to normalize the mean of the initial complex array to 0 and the variance to 1, so that the average value of the output power is 1. The normalization process includes scaling the initial complex array in equal proportions, and does not perform translation processing on the initial complex array. For example, taking the two initial complex arrays input in the previous example as an example, [w,x,y,z] and [w,x,y,-z] are symmetric in the last dimension, then the complex array output by the power normalization layer is also symmetric in the last dimension, and the symmetry in other dimensions is similar to that of the last dimension, which will not be described in detail here.

[0065] The complex array is used to indicate the complex symbol sequence corresponding to the bit sequence.

[0066] For example, the modulation order Q m =4, modulation dimension N d =4 as an example, when the complex array output by the power normalization layer is [w,x,y,z], the complex number symbols indicated by the complex array are [S1,S2]. S1 = w + j * x, S2 = y + j * z, where j represents a unit imaginary number.

[0067] As shown in FIG5 , the demodulation neural network includes at least one of the following: a second input layer, a second network block, a coordinate inverse transformation layer, a third network block, and a splicing layer.

[0068] In some embodiments, the second input layer is used to input the complex array to the second network block and the inverse coordinate transformation layer.

[0069] In some embodiments, the second network block is configured to calculate a first log-likelihood ratio for implementing a symmetry constraint in the complex array, and input the first log-likelihood ratio to the concatenation layer.

[0070] Exemplarily, the second network block may be composed of multiple layers of fully connected layers, or may be composed of a convolutional neural network, or may be composed of a recurrent neural network.

[0071] In some embodiments, the coordinate inverse transformation layer is used to transform the rectangular coordinate system corresponding to the complex array into a polar coordinate system to obtain a third array, and input the third array into the third network block.

[0072] For example, the coordinate inverse transformation layer is used to represent the coordinates of the second coordinate system corresponding to the complex array [y0, y1, ..., y Nd-1 ] is transformed into the coordinate representation of the first coordinate system [x0,x1,...,x Nd-1 Taking the coordinate transformation layer to convert the 4-dimensional rectangular coordinate system into the 4-dimensional polar coordinate system as an example, the coordinate transformation formula is as follows:

[0073] In some embodiments, the third network block is configured to calculate a second log-likelihood ratio based on the third array, and input the second log-likelihood ratio to the concatenation layer.

[0074] The second log-likelihood ratio characterizes the log-likelihood ratio used to calculate the magnitude in the complex array.

[0075] Exemplarily, the third network block may be composed of multiple connection layers, a convolutional neural network, or a recurrent neural network.

[0076] In some embodiments, the concatenation layer is configured to concatenate the first log-likelihood ratio and the second log-likelihood ratio to generate a target log-likelihood ratio, and output the target log-likelihood ratio.

[0077] The target log likelihood ratio is used to represent the relative likelihood that the second node can receive each complex symbol in the complex symbol sequence.

[0078] As shown in Figure 6, it is a flow chart of the modulation neural network and the demodulation neural network according to an embodiment of the present disclosure. In order to illustrate the workflow of the modulation neural network and the demodulation neural network in actual operation, the segmentation layer, the symmetry constraint layer, and the first network block in the modulation neural network are presented in the form of a fully connected layer or a shaping layer, and the second network block, the coordinate inverse transformation layer, and the third network block in the demodulation neural network are presented in the form of a fully connected layer or a shaping layer.

[0079] For example, in the modulation neural network, the input layer is equivalent to the first input layer in the present disclosure, the shaping layer (B, N, M) is equivalent to the segmentation layer in the present disclosure, the fully connected layer (B, N, 2) is equivalent to the symmetric constraint layer in the present disclosure, the fully connected layer (B, N, M-2) to the fully connected layer (B, 2*N) + Sigmoid is equivalent to the first network block in the present disclosure, the coordinate transformation layer, the multiplication layer and the power normalization layer are respectively equivalent to the coordinate transformation layer, the multiplication layer and the power normalization layer in the present disclosure. In addition, a shaping layer (B, N, 2) is added between the coordinate transformation layer and the multiplication layer to align the dimensions of the complex symbols.

[0080] In the demodulation neural network. The symbol input layer is equivalent to the second input layer in the present disclosure, the inverse coordinate transformation layer is equivalent to the inverse coordinate transformation layer in the present disclosure, the fully connected layer (B, 32) + ELU to the shaping layer (B, N, M-2) is equivalent to the third network block in the present disclosure, the fully connected layer (B, N, 16) + ELU to the fully connected layer (B, N, 2) is equivalent to the second network block in the present disclosure, and the splicing layer is equivalent to the splicing layer in the present disclosure. In addition, above the symbol input layer, an SNR input layer is added to input the signal-to-noise ratio corresponding to the log-likelihood ratio (LLR). A shaping layer and an absolute value layer are added between the symbol input layer and the inverse coordinate transformation layer to align the dimension of the log-likelihood ratio. A shaping layer, a copy layer and a multiplication layer are added after the splicing layer. The shaping layer is used to align the dimension of the log-likelihood ratio, the copy layer is used to align the dimension of the signal-to-noise ratio, and the multiplication layer is used to perform weighted operations on the signal-to-noise ratio input of the copy layer and the log-likelihood ratio input of the shaping layer.

[0081] Exemplarily, the numbers in the brackets in Figure 6 represent the size of the output of the layer, B represents the batch size, N is half of the modulation dimension, M is the modulation order, the coordinate transformation layer and the coordinate inverse transformation layer use polar coordinates to rectangular coordinates transformation and inverse transformation, and the activation function in the fully connected layer is the exponential linear unit function (ELU) or the sigmoid function.

[0082] As shown in Figure 7, a performance comparison chart of high-dimensional modulation according to an embodiment of the present disclosure is shown. Figure 7 shows a performance test of the block error rate (BLER) of the high-dimensional modulation of the modulation neural network combined with low-density parity-check coding (LDPC) during the training process of the modulation neural network under the conditions of a modulation order of 6, a modulation dimension of 4, and an additive white Gaussian noise (AWGN) of 15dB. It is compared with the BLER performance of the geometric shaping constellation diagram. As shown in Figure 7, when the BLER is 0.1, the signal-to-noise ratio (SNR) corresponding to geometric shaping is 15.17dB, and the SNR corresponding to high-dimensional modulation is 15.04dB. The SNR required for high-dimensional modulation is lower than that for geometric shaping.

[0083] In some embodiments, based on the bit sequence and the modulation lookup table, the complex symbol sequence corresponding to the bit sequence can be directly determined.

[0084] As shown in Table 1, the modulation lookup table includes a plurality of complex symbols and a plurality of bits corresponding to the plurality of complex symbols.

[0085] Table 1

[0086] As an implementation manner, the modulation lookup table is determined according to the modulation neural network.

[0087] For example, Q m *N d All possible combinations of / 2 bits are input into the modulation neural network to obtain the complex symbols corresponding to the possible combinations of bits. m =4, modulation dimension N d =4, all possible combinations of 8 bits are 00000000, 00000001, ..., 11111111, a total of 256. The above 256 bit combinations are input into the modulation neural network to obtain 256 complex number arrays [w0, x0, y0, z0], [w1, x1, y1, z1], ..., [w 255 ,x 255 ,y 255 ,z 255 ], and maps the 256 complex arrays to the corresponding complex symbols. For example, the complex array [w i ,x i ,y i ,z i ]The corresponding complex symbol is [S i,1 ,S i,2 ]. Finally, according to the complex symbols corresponding to the bits included in the bit sequence, the above complex symbols are combined to obtain a complex symbol sequence.

[0088] In another example, the bit sequence includes 00000000 and 00000001. According to the above modulation lookup table, the complex symbol corresponding to 00000000 is S 0,1 ,S 0,2 , the complex symbol corresponding to 00000001 is S 1,1 ,S 1,2 , then the complex symbol sequence corresponding to the bit sequence is S 0,1 ,S 0,2 ,S 1,1 ,S 1,2 When the modulation lookup table is determined, the complex symbol sequence corresponding to the bit sequence can be directly determined based on the bit sequence and the modulation lookup table without the participation of the modulation neural network.

[0089] In S103, a complex symbol sequence is sent.

[0090] As an implementation manner, after generating the complex symbol sequence, the first node may directly send the complex symbol sequence to the second node.

[0091] As another implementation manner, after the first node generates the complex symbol sequence, in response to receiving a sequence sending instruction sent by the second node, the first node sends the complex symbol sequence to the second node.

[0092] In this way, by using a preset mapping relationship, multiple bits in a bit sequence are mapped to multiple complex symbols rather than a single complex symbol, achieving high-dimensional modulation, reducing the bandwidth resources required for information transmission and improving communication efficiency. Furthermore, the ability to transmit information in multiple dimensions reduces the number of symbols required for information transmission in each dimension, improving spectrum utilization and further enhancing communication efficiency.

[0093] FIG8 shows a schematic flow chart of another communication method according to the present disclosure. As shown in FIG8 , the communication method is applied to the second node and includes the following S201 and S202 .

[0094] In S201, a complex symbol sequence sent by a first node is received.

[0095] The complex symbol sequence includes a plurality of complex symbols.

[0096] In S202, a bit sequence is determined based on the complex symbol sequence and the demodulation mapping relationship.

[0097] It should be understood that when the first node transmits a bit sequence, it modulates the bit sequence into a complex symbol sequence using a preset mapping relationship. Therefore, when the second node receives the complex symbol sequence, it needs to demodulate the complex symbol sequence into a corresponding bit sequence using the demodulation mapping relationship to obtain the corresponding data information.

[0098] The demodulation mapping relationship is used to indicate mapping of multiple complex symbols to multiple bits. The demodulation mapping relationship includes any of the following: a demodulation neural network, a demodulation lookup table.

[0099] As an implementation method, the demodulation neural network is a neural network obtained through end-to-end structural training.

[0100] The end-to-end structure includes at least one of the following: a modulation neural network and a demodulation neural network.

[0101] As shown in FIG4 , the modulation neural network includes at least one of the following: a first input layer, a segmentation layer, a symmetry constraint layer, a first network block, a coordinate transformation layer, a multiplication layer, and a power normalization layer.

[0102] In some embodiments, the first input layer is used to input the bit sequence to the segmentation layer.

[0103] In some embodiments, the segmentation layer is used to divide the bit sequence into a first bit sequence and a second bit sequence, and input the first bit sequence into the symmetry constraint layer and input the second bit sequence into the first network block.

[0104] In some embodiments, the symmetry constraint layer is used to perform symmetric processing on the first bit sequence to generate a symmetric array, and input the symmetric array to the multiplication layer.

[0105] The symmetry constrained layer consists of a weight matrix and a bias vector.

[0106] In some embodiments, the first network block is used to generate a first array based on the second bit sequence, and input the first array to the coordinate transformation layer.

[0107] In some embodiments, the coordinate transformation layer is used to transform the polar coordinate system corresponding to the first array into a rectangular coordinate system, generate a second array, and input the second array into the multiplication layer.

[0108] In some embodiments, the multiplication layer is used to generate an initial complex array based on the symmetric array and the second array, and input the initial complex array to the power normalization layer.

[0109] In some embodiments, a power normalization layer is used to normalize the initial complex array, generate a complex array, and output the complex array.

[0110] As shown in FIG5 , the demodulation neural network includes at least one of the following: a second input layer, a second network block, a coordinate inverse transformation layer, a third network block, and a splicing layer.

[0111] In some embodiments, the second input layer is used to input the complex array to the second network block and the inverse coordinate transformation layer.

[0112] In some embodiments, the second network block is configured to calculate a first log-likelihood ratio for implementing a symmetry constraint in the complex array, and input the first log-likelihood ratio to the concatenation layer.

[0113] In some embodiments, the coordinate inverse transformation layer is used to transform the rectangular coordinate system corresponding to the complex array into a polar coordinate system to obtain a third array, and input the third array into the third network block.

[0114] In some embodiments, the third network block is configured to calculate a second log-likelihood ratio based on the third array, and input the second log-likelihood ratio to the concatenation layer.

[0115] In some embodiments, the concatenation layer is configured to concatenate the first log-likelihood ratio and the second log-likelihood ratio to generate a target log-likelihood ratio, and output the target log-likelihood ratio.

[0116] In some embodiments, the solution lookup table includes a plurality of bit sequences and a plurality of complex symbols corresponding to each of the plurality of bit sequences.

[0117] As an implementation, the solution lookup table is determined based on the demodulation neural network.

[0118] It should be noted that both the decoding lookup table and the modulation lookup table include multiple bit sequences and multiple complex symbols corresponding to each of the multiple bit sequences, and there is a corresponding relationship between the decoding lookup table and the modulation lookup table. For a description of the decoding lookup table, please refer to the description of the modulation lookup table, and this disclosure will not elaborate on this.

[0119] In this way, by using a preset mapping relationship, multiple bits in a bit sequence are mapped to multiple complex symbols rather than a single complex symbol, achieving high-dimensional modulation, reducing the bandwidth resources required for information transmission and improving communication efficiency. Furthermore, the ability to transmit information in multiple dimensions reduces the number of symbols required for information transmission in each dimension, improving spectrum utilization and further enhancing communication efficiency.

[0120] It is understandable that, in order to implement the above functions, the communication device includes hardware structures and / or software modules corresponding to the execution of each function. It should be readily apparent to those skilled in the art that, in conjunction with the algorithmic steps of the various examples described in the embodiments of the present disclosure, the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present disclosure.

[0121] The embodiments of the present disclosure can divide the functional modules of the communication device according to the above-mentioned method embodiments. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one functional module. The above-mentioned integrated modules can be implemented in the form of hardware or software. It should be noted that the division of modules in the embodiments of the present disclosure is schematic and is only a logical functional division. In actual implementation, there may be other division methods. The following is an example of dividing each functional module corresponding to each function.

[0122] FIG9 is a schematic diagram of a communication device applied to a first node according to an embodiment of the present disclosure. As shown in FIG9 , the communication device 90 includes a processing module 901 and a communication module 902 .

[0123] The processing module 901 is configured to obtain a bit sequence, where the bit sequence includes a plurality of bits.

[0124] The processing module 901 is further configured to generate a complex symbol sequence based on the bit sequence and a preset mapping relationship. The complex symbol sequence includes multiple complex symbols, and the preset mapping relationship is used to indicate mapping multiple bits to multiple complex symbols.

[0125] The communication module 902 is configured to send a complex symbol sequence.

[0126] In some embodiments, the preset mapping relationship includes any one of the following: a modulation neural network, a modulation lookup table.

[0127] In some embodiments, the modulation neural network is a neural network trained based on an end-to-end structure.

[0128] In some embodiments, the end-to-end structure includes at least one of the following: a modulation neural network, a demodulation neural network.

[0129] In some embodiments, the modulation neural network includes at least one of the following: a first input layer, a segmentation layer, a symmetry constraint layer, a first network block, a coordinate transformation layer, a multiplication layer, and a power normalization layer. The first input layer is used to input a bit sequence into the segmentation layer; the segmentation layer is used to divide the bit sequence into a first bit sequence and a second bit sequence, and input the first bit sequence into the symmetry constraint layer, and input the second bit sequence into the first network block, the first bit sequence is used to implement the symmetry constraint, and the second bit sequence is used to calculate the amplitude; the symmetry constraint layer is used to perform symmetric processing on the first bit sequence, generate a symmetric array, and input the symmetric array into the multiplication layer; the first network block is used to generate a first array based on the second bit sequence, and input the first array into the coordinate transformation layer; the coordinate transformation layer is used to convert the polar coordinate system corresponding to the first array into a rectangular coordinate system, generate a second array, and input the second array into the multiplication layer; the multiplication layer is used to generate an initial complex array based on the symmetric array and the second array, and input the initial complex array into the power normalization layer; the power normalization layer is used to normalize the initial complex array, generate a complex array, and output the complex array, the complex array being used to indicate the complex symbol sequence corresponding to the bit sequence.

[0130] In some embodiments, the symmetry constraint layer includes a weight matrix and a bias vector.

[0131] In some embodiments, the demodulation neural network includes at least one of the following: a second input layer, a second network block, a coordinate inverse transformation layer, a third network block, and a splicing layer. The second input layer is used to input the complex array into the second network block and the coordinate inverse transformation layer; the second network block is used to calculate a first log-likelihood ratio for implementing a symmetry constraint in the complex array, and input the first log-likelihood ratio into the splicing layer; the coordinate inverse transformation layer is used to convert the rectangular coordinate system corresponding to the complex array into a polar coordinate system to obtain a third array, and input the third array into the third network block; the third network block is used to calculate a second log-likelihood ratio based on the third array, and input the second log-likelihood ratio into the splicing layer, the second log-likelihood ratio being used to represent the log-likelihood ratio for calculating the amplitude in the complex array; the splicing layer is used to splice the first log-likelihood ratio and the second log-likelihood ratio to generate a target log-likelihood ratio, and output the target log-likelihood ratio.

[0132] In some embodiments, the modulation lookup table includes a plurality of complex symbols and a plurality of bits corresponding to each of the plurality of complex symbols.

[0133] In some embodiments, the modulation lookup table is determined based on a modulation neural network.

[0134] In the case of implementing the functions of the above-mentioned integrated modules in hardware, the embodiments of the present disclosure provide another structure of the communication device involved in the above-mentioned embodiments. As shown in Figure 10, the communication device 100 includes: a processor 1002 and a bus 1004. In some embodiments, the communication device may also include a memory 1001. In some embodiments, the communication device 100 may also include a communication interface 1003.

[0135] Processor 1002 may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present disclosure. Processor 1002 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array, or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof, and may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments of the present disclosure. Processor 1002 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP (digital signal processor) and a microprocessor, and the like.

[0136] The communication interface 1003 is used to connect to other devices via a communication network, such as Ethernet, wireless access network, or wireless local area network (WLAN).

[0137] The memory 1001 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0138] As an implementation, the memory 1001 may exist independently of the processor 1002. The memory 1001 may be connected to the processor 1002 via a bus 1004 to store instructions or program codes. When the processor 1002 calls and executes the instructions or program codes stored in the memory 1001, the communication method provided in the embodiments of the present disclosure can be implemented.

[0139] In another implementation, the memory 1001 may also be integrated with the processor 1002 .

[0140] Bus 1004 can be an Extended Industry Standard Architecture (EISA) bus, etc. Bus 1004 can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, FIG10 shows only one thick line, but this does not mean that there is only one bus or only one type of bus.

[0141] Some embodiments of the present disclosure provide a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium) having computer program instructions stored therein. When the computer program instructions are executed on a computer, the computer executes a communication method as in any of the above embodiments.

[0142] Exemplarily, the above-mentioned computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks, or magnetic tapes, etc.), optical disks (e.g., compact disks (CDs), digital versatile disks (DVDs), etc.), smart cards, and flash memory devices (e.g., erasable programmable read-only memories (EPROMs), cards, sticks, or key drives, etc.). The various computer-readable storage media described in the present disclosure may represent one or more devices and / or other machine-readable storage media for storing information. The term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0143] An embodiment of the present disclosure provides a computer program product comprising instructions. When the computer program product is run on a computer, the computer is enabled to execute the communication method described in any one of the above embodiments.

[0144] In the technical solution disclosed herein, a preset mapping relationship is used to map multiple bits in a bit sequence to multiple complex symbols, rather than a single complex symbol. This achieves high-dimensional modulation, reduces the bandwidth resources required for information transmission, and improves communication efficiency. Furthermore, the ability to transmit information in multiple dimensions reduces the number of symbols required for transmission in each dimension, improves spectrum utilization, and further enhances communication efficiency.

[0145] The above is only a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or replacements within the technical scope disclosed in the present disclosure should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A communication method, comprising: Obtaining a bit sequence, where the bit sequence includes a plurality of bits; Generating a complex symbol sequence based on the bit sequence and a preset mapping relationship; wherein, the complex symbol sequence includes a plurality of complex symbols, and the preset mapping relationship is used to indicate mapping the plurality of bits to the plurality of complex symbols; Transmitting the complex symbol sequence.

2. The method according to claim 1, wherein The preset mapping relationship includes any one of the following: a modulation neural network, a modulation look-up table.

3. The method according to claim 2, wherein The modulation neural network is a neural network trained based on an end-to-end structure.

4. The method according to claim 3, wherein, The end-to-end structure includes at least one of the following: the modulation neural network, the demodulation neural network.

5. The method according to claim 2, wherein, The modulation neural network includes at least one of the following: a first input layer, a segmentation layer, a symmetry constraint layer, a first network block, a coordinate transformation layer, a multiplication layer, and a power normalization layer; Wherein, the first input layer is used to input the bit sequence into the segmentation layer; The segmentation layer is used to divide the bit sequence into a first bit sequence and a second bit sequence, input the first bit sequence into the symmetry constraint layer, and input the second bit sequence into the first network block. The first bit sequence is used to implement symmetry constraint, and the second bit sequence is used to calculate the amplitude; The symmetry constraint layer is used to perform symmetry processing on the first bit sequence to generate a symmetry array, and input the symmetry array into the multiplication layer; The first network block is used to generate a first array based on the second bit sequence, and input the first array into the coordinate transformation layer; The coordinate transformation layer is used to convert the polar coordinate system corresponding to the first array into a rectangular coordinate system to generate a second array, and input the second array into the multiplication layer; The multiplication layer is used to generate an initial complex array based on the symmetry array and the second array, and input the initial complex array into the power normalization layer; The power normalization layer is used to perform normalization processing on the initial complex array to generate a complex array, and output the complex array. The complex array is used to indicate the complex symbol sequence corresponding to the bit sequence.

6. The method according to claim 5, wherein, The symmetry constraint layer includes a weight matrix and a bias vector.

7. The method according to claim 4, wherein The demodulation neural network includes at least one of the following: a second input layer, a second network block, a coordinate inverse transformation layer, a third network block, and a splicing layer; Wherein, the second input layer is used to input the complex array into the second network block and the coordinate inverse transformation layer; The second network block is used to calculate a first log-likelihood ratio for implementing symmetry constraint in the complex array, and input the first log-likelihood ratio into the splicing layer; The coordinate inverse transformation layer is used to convert the rectangular coordinate system corresponding to the complex array into a polar coordinate system to obtain a third array, and input the third array into the third network block; The third network block is used to calculate a second log-likelihood ratio based on the third array, and input the second log-likelihood ratio into the splicing layer. The second log-likelihood ratio is used to characterize the log-likelihood ratio for calculating the amplitude in the complex array; The splicing layer is used to splice the first log-likelihood ratio and the second log-likelihood ratio to generate a target log-likelihood ratio and output the target log-likelihood ratio.

8. The method according to claim 2, wherein, The modulation look-up table includes a plurality of complex symbols and a plurality of bits corresponding to the plurality of complex symbols.

9. The method according to claim 2, wherein The modulation look-up table is determined according to the modulation neural network.

10. A communication device, wherein, It includes a processor, and when the processor executes a computer program, it implements the communication method according to any one of claims 1 to 9.

11. A computer-readable storage medium, wherein, The computer-readable storage medium includes computer instructions; wherein, when the computer instructions are executed, the communication method according to any one of claims 1 to 9 is implemented.

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