Multi-layer doping source structure, and high-quality emitter and controllable preparation method therefor

Abstract

The present invention provides a multi-layer doping source structure, and a high-quality emitter and a controllable preparation method therefor. The multi-layer doping source structure comprises a dielectric layer, a nitrogen silicide layer and a doping source layer, which are stacked on the front surface of a crystalline silicon substrate, wherein the dielectric layer is a silicon oxide film or a silicon oxynitride film, the doping source layer is boron-doped amorphous silicon doped with functional elements or phosphorus-doped amorphous silicon doped with functional elements, and the functional elements doped in the doping source layer are carbon and / or nitrogen. In the present invention, the doping source structure is composed of the dielectric layer, a nitrogen silicide and boron- / phosphorus-doped amorphous silicon doped with functional elements; the multi-layer doping source structure has both a strong laser absorption capability and a high boron or phosphorus doping concentration, thereby facilitating a reduction in the laser power and the illumination time required by a laser selective emitter technique; moreover, such a multi-layer doping source structure is favorable for reducing the surface boron concentration, decreasing defects and improving the passivation effect of an emitter, and therefore an improvement in battery efficiency can be promoted.

Description

A multi-layer doping source structure, high-quality emitter and controllable preparation method thereof Technical Field

[0001] The present invention relates to the technical field of photovoltaic cells, and in particular to a multi-layer doping source structure, a high-quality emitter and a controllable preparation method thereof. Background Art

[0002] Fabricating a selective emitter (SE) on the front surface of crystalline silicon cells is an effective method for improving cell efficiency. Selective emitter technology involves applying high-concentration doping near and at the contact point between the metal gate and the silicon wafer to reduce the contact resistance between the metal electrode and the silicon wafer. Low-concentration doping in areas outside the electrodes reduces recombination in the diffusion layer. The use of a selective emitter can increase the cell's open-circuit voltage and fill factor, thereby improving cell conversion efficiency. Laser-based SE fabrication is a common method used in industry and has been applied in p-type emitter passivation and rear-contact (PERC) cells, increasing cell efficiency by approximately 0.3% to 0.4%.

[0003] Laser doping remains a challenge for the next generation of industrial high-efficiency cells using n-type crystalline silicon substrates—tunneling oxide passivated contact (TOPCon) cells. This is because the solid solubility of boron in silicon is lower than that of phosphorus. Current industrial laser SE technology uses borosilicate glass (BSG) formed by the diffusion of BBr3 or BCl3 as the boron source. However, using BSG as a boron source presents the following challenges: 1) The boron concentration in the BSG boron source is very low, making it difficult to dope boron atoms into silicon. 2) The solid solubility of boron in BSG is higher than that in silicon, further increasing the difficulty of introducing boron atoms from BSG into silicon. 3) Because BSG is primarily composed of silicon oxide, its high band gap and high transmittance result in low or no laser absorption. Existing industry practices use green lasers around 532nm, which primarily act on the silicon wafer, heating the BSG through the wafer's reverse thermal effect and introducing boron into the silicon surface. This mechanism is somewhat indirect. 4) Laser boron diffusion requires high power or long exposure time to achieve sufficient junction depth and sheet resistance, which can easily damage the textured surface structure of the silicon wafer. If the power is too low, the energy during the diffusion may be insufficient, making it difficult for the laser to dope the boron from the BSG into the emitter layer, resulting in the metallization heavily doped area failing to meet the concentration requirements.

[0004] Patent document CN116130539A discloses a laminated solid-state doping source structure that uses a dielectric layer / boron-doped amorphous silicon solid source for boron diffusion, which is expected to solve the problem of laser doping. However, the dielectric layer is easily damaged at high temperatures, which reduces the passivation performance of the boron emitter. Patent document CN116994945A discloses a diffusion structure of dielectric layer / boron-doped silicon oxide / boron-doped amorphous silicon, which can avoid the formation of stacking fault defects during high-temperature annealing. The passivation effect of the boron emitter formed by this patented technology is improved. However, due to the damage to the silicon substrate caused by the dielectric layer during preparation, the difficulty in controlling the boron concentration of the boron-doped silicon oxide on the surface, the difficulty in controlling the sheet resistance, and the low passivation quality, the overall performance of the prepared emitter is not good, and there is still considerable room for improvement. Summary of the Invention

[0005] In view of the shortcomings of the existing technology, the technical problem to be solved by the present invention is how to improve the laser absorption ability of the doping source, while reducing the concentration of diffused elements on the emitter surface and improving the emitter passivation effect.

[0006] To solve the above problems, the first aspect of the present invention provides a multi-layer doping source structure, including a dielectric layer, a nitride silicon layer and a doping source layer stacked on the front side of a crystalline silicon substrate, the dielectric layer is a silicon oxide film or a silicon oxynitride film, the doping source layer is boron-doped amorphous silicon doped with functional elements or phosphorus-doped amorphous silicon doped with functional elements, and the functional elements doped in the doping source layer are carbon and / or nitrogen.

[0007] The present invention comprises a doping source structure composed of a dielectric layer, a nitrogen silicide, and a boron / phosphorus-doped amorphous silicon doped with functional elements. This multi-layer doping source structure combines strong laser absorption capability with a high boron or phosphorus doping concentration, which is beneficial for reducing the laser power and illumination time required for laser SE technology. At the same time, this multi-layer doping source structure is beneficial for reducing the surface boron / phosphorus concentration, reducing defects, improving the emitter passivation effect, and promoting the improvement of battery efficiency.

[0008] Furthermore, the thickness of the doping source layer is 10 to 500 nm, the thickness of the nitride silicide layer is 1 to 100 nm, and the thickness of the dielectric layer is 1 to 3 nm. The presence of the dielectric layer can reduce interface defects, adjust the boron / phosphorus activation concentration in the non-laser area, and enhance the passivation effect; the nitride silicide can prevent the formation of stacking fault defects and adjust the boron / phosphorus diffusion concentration and depth; the doping source layer doped with functional elements has a stronger absorption capacity for laser light and can effectively diffuse light under low-power laser light.

[0009] Furthermore, the nitrogen content of the silicide nitride layer is 0.5 at% to 50 at%. The silicide nitride layer has the following multiple functions: 1) It prevents crystal defects such as stacking faults caused by the epitaxial growth of amorphous silicon on a single-crystal silicon substrate during high-temperature annealing, significantly improving the passivation effect of the emitter in the non-laser region; 2) Silicide nitride has a strong boron barrier effect, effectively reducing the surface boron concentration in the non-laser region, thereby further improving its passivation effect; 3) By adjusting the thickness and nitrogen content of the silicide nitride layer, the square resistance, junction depth, and passivation performance can be adjusted.

[0010] Furthermore, the content of the functional element in the doping source layer is 0.1 at% to 10 at%, and the boron / phosphorus doping concentration is 5E17 to 5E21 cm -3 The doped source layer contains a high concentration of boron and phosphorus, and has a strong ability to absorb laser light. The doping of functional elements C and N can effectively reduce the crystallization rate of the film and the activation concentration of boron and phosphorus, thereby reducing the surface concentration of the emitter and improving the passivation performance.

[0011] A second aspect of the present invention provides a controllable preparation method for a high-quality emitter, using the above-mentioned multi-layer doping source structure, the controllable preparation method comprising the following steps:

[0012] S1. preparing a dielectric layer on the front surface of the crystalline silicon substrate;

[0013] S2. Plasma treatment of the dielectric layer;

[0014] S3, depositing a nitride silicon layer on the surface of the dielectric layer;

[0015] S4, depositing a doping source layer on the surface of the nitride silicide layer to obtain a doping source structure;

[0016] S5. Laser processing is performed on the designed electrode area to diffuse boron or phosphorus into the crystalline silicon substrate;

[0017] S6. Performing high-temperature annealing to cause secondary diffusion of boron or phosphorus in the laser-treated area and diffusion of boron or phosphorus in the non-laser-treated area;

[0018] S7. Remove the remaining doping source structure, and form a selective emitter structure on the front side of the crystalline silicon substrate.

[0019] Furthermore, in step S1, the dielectric layer is prepared by a method selected from wet chemical methods, high-temperature oxidation methods, ozone oxidation methods, and plasma-assisted oxidation methods. The dielectric layer acts as a barrier to boron / phosphorus diffusion, effectively reducing the surface boron / phosphorus concentration in the non-laser region, thereby further improving the passivation effect. By adjusting the thickness of the dielectric layer, the square resistance and junction depth can be adjusted.

[0020] Furthermore, in step S2, the plasma is selected from one or more of H2, Ar, N2O, C2O, and NH3. Using plasma to treat the dielectric layer can improve its quality, adjust its chemical composition, and improve its barrier effect.

[0021] Furthermore, in step S3, the silicide layer is prepared using chemical vapor deposition technology, and in step S4, the dopant source layer is prepared using chemical vapor deposition technology. Using CVD technology to deposit the silicide layer and the dopant source layer avoids the use of a conventional BBr3 thermal diffusion furnace, saving production costs, and ensuring uniform deposition, resulting in highly uniform emitter square resistance.

[0022] Furthermore, in step S5, the source layer is surface treated with a laser. Boron / phosphorus-doped amorphous silicon doped with functional elements has a much greater light absorption capacity than BSG, allowing for more efficient boron / phosphorus diffusion at the same laser power and irradiation time. Therefore, lower power and shorter irradiation times can be used to achieve the same doping effect as a conventional BSG source layer, which helps reduce laser damage to the textured surface and laser process costs.

[0023] Furthermore, in step S6, the high temperature process causes the functional elements in the doping source structure to diffuse into the silicon substrate.

[0024] Furthermore, step S7 specifically includes: removing the dopant source layer by wet etching with an alkaline solution, wet etching the nitride silicide layer and the dielectric layer with hydrofluoric acid, and then etching the surface of the silicon crystalline silicon substrate with an alkaline solution selected from one of KOH, NaOH, TMAH, ammonia, and a TMAH / IPA mixed solution. This step etches away the multi-layer dopant source structure and removes a small amount of surface with high boron concentration and boron-related defects, which is beneficial for improving the passivation performance of the emitter.

[0025] The third aspect of the present invention provides a high-quality emitter, which is prepared by the above-mentioned controllable preparation method. The high-quality emitter prepared by the process of the present invention can effectively reduce the contact resistance between the emitter and the metal electrode, while reducing the recombination of the area outside the electrode. The emitter passivation performance formed in the non-laser area after annealing is excellent. The square resistance of the laser-processed area of ​​the selective emitter structure is adjustable in the range of tens to hundreds of Ω / sq, usually 40 to 150 Ω / sq, and the square resistance of the non-laser-processed area is adjustable in the range of tens to thousands of Ω / sq, usually 100 to 350 Ω / sq.

[0026] Furthermore, the high-quality emitter contains nitrogen, which can suppress micro defects in silicon when it enters the emitter. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] FIG1 is a schematic structural diagram of a doping source structure in a specific embodiment of the present invention.

[0028] FIG2 is a schematic flow chart of a method for preparing a selective emitter in a specific embodiment of the present invention.

[0029] FIG3 is a schematic structural diagram of a selective emitter in a specific embodiment of the present invention.

[0030] FIG4 is a comparison diagram of the absorption spectra of Example 1 of the present invention and Comparative Example 1.

[0031] FIG5 is a graph showing the selective emitter boron diffusion curve in Example 5 of the present invention.

[0032] FIG6 is a graph showing selective emitter boron diffusion curves in Example 9 of the present invention and Comparative Example 7.

[0033] Description of reference numerals:

[0034] 1-crystalline silicon substrate, 2-dielectric layer, 3-nitrogen silicide layer, 4-doping source layer, 5-laser processed area, 6-non-laser processed area. DETAILED DESCRIPTION

[0035] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only intended to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter ranges described in the present invention. Reasonable variations derived therefrom are still within the scope of protection of the claims of the present invention.

[0036] It should be noted that the endpoints of the ranges and any values ​​disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoints of each range, the endpoints of each range and individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be considered to be specifically disclosed herein.

[0037] A specific embodiment of the present invention provides a multilayer dopant source structure, as shown in Figure 1, comprising a dielectric layer 2, a silicide layer 3, and a dopant source layer 4 stacked sequentially on the front surface of a crystalline silicon substrate 1. This dopant source structure is suitable for silicon wafers with different surface morphologies, including velvet, alkaline-polished, and acid-polished surfaces.

[0038] The dielectric layer 2 is a silicon oxide film or a silicon oxynitride film. In a specific embodiment, the thickness of the dielectric layer 2 is 1 to 3 nm. The presence of the dielectric layer 2 can adjust the boron / phosphorus activation concentration in the non-laser region and enhance the passivation effect.

[0039] The doping source layer 4 is boron-doped amorphous silicon doped with a functional element or phosphorus-doped amorphous silicon doped with a functional element, and the functional element is carbon and / or nitrogen, preferably carbon. In a specific embodiment, the thickness of the doping source layer 4 is 10 to 500 nm, the content of the functional element in the doping source layer 4 is 0.1 at% to 10 at%, and the boron / phosphorus doping concentration is 5E17 to 5E21 cm -3 .

[0040] Adding a silicide nitride layer 3 between the doping source layer 4 and the dielectric layer 2 can effectively suppress boron diffusion and defects on the silicon substrate surface in the non-laser region, significantly enhancing the passivation effect of the boron / phosphorus emitter in the non-laser region. In a specific embodiment, the thickness of the silicide nitride layer 3 is 1 to 100 nm, and the nitrogen content in the silicide nitride layer 3 is 0.5 at % to 50 at %. By adjusting the thickness and nitrogen content of the silicide nitride layer 3, the square resistance, junction depth, and passivation performance can be adjusted. In theory, the thinner the silicide nitride or the lower the nitrogen content, the smaller the square resistance, the deeper the junction depth, and the worse the passivation effect; the thicker the silicide nitride or the higher the nitrogen content, the larger the square resistance, the smaller the junction depth, and the better the passivation effect.

[0041] The above-mentioned doping source structure takes into account strong laser absorption ability and high boron concentration, which is beneficial to reducing the laser power and illumination time required for laser SE technology. At the same time, this multi-layer doping source structure is beneficial to reducing the surface boron concentration, reducing defects, improving the emitter passivation effect, and promoting the improvement of battery efficiency.

[0042] A specific embodiment of the present invention further provides a method for preparing a high-quality emitter using the above-mentioned doping source structure. Taking an n-type crystalline silicon substrate as an example, a typical process flow is shown in FIG2 , comprising the following steps:

[0043] S0. Prepare an n-type silicon wafer, clean and texture the front side, and use it as a crystalline silicon substrate 1.

[0044] S1. Prepare a dielectric layer 2 on the front surface of the crystalline silicon substrate 1. The dielectric layer 2 is a silicon oxide film or a silicon nitride film. The dielectric layer 2 is prepared by wet chemical method, high temperature oxidation method, ozone oxidation method, plasma assisted oxidation method, etc., which can reduce interface defects.

[0045] S2. Plasma treatment is performed on dielectric layer 2. The plasma is selected from one or more of H2, Ar, N2O, C2O, and NH3. The plasma treatment method is preferably PECVD. This step can improve the quality of dielectric layer 2 and adjust its chemical composition, which is beneficial for enhancing its barrier effect.

[0046] S3. Depositing a nitride silicide layer 3 on the surface of the plasma-treated dielectric layer 2. The nitride silicide layer 3 is prepared by chemical vapor deposition techniques, including APCVD, LPCVD, PECVD, HWCVD, and the like.

[0047] S4. Deposit a doping source layer 4 on the surface of the nitride silicide layer 3. The doping source layer 4 is a boron / phosphorus-doped amorphous silicon film doped with carbon and / or nitrogen. Chemical vapor deposition techniques such as APCVD, LPCVD, PECVD, and HWCVD are used to prepare the doping source layer 4. Upon completion of this step, a doping source structure consisting of the dielectric layer 2, the nitride silicide layer 3, and the doping source layer 3 is obtained.

[0048] S5. Laser treatment is performed on the designed electrode area to diffuse the boron / phosphorus of the doping source structure into the crystalline silicon substrate 1. This step can achieve the same doping effect as a conventional BSG source layer using lower power and shorter illumination time, which is beneficial to reducing laser damage to the texture surface and laser process costs.

[0049] S6. Perform high-temperature annealing to cause boron / phosphorus secondary diffusion in the laser-processed area and boron / phosphorus diffusion in the non-laser-processed area. The high-temperature process causes the functional elements C and N in the doping source structure to diffuse into the crystalline silicon substrate 1.

[0050] S7. Remove the remaining dopant source structure. A wet etching process is used. In a specific embodiment, the etching solution includes alkaline solution and HF, wherein the alkaline solution is selected from one of KOH, NaOH, TMAH, ammonia water, and a TMAH / IPA mixed solution, which has a large etching selectivity for amorphous silicon and nitride silicon. During the wet etching process, the dopant source layer 4 can be etched away with alkaline solution first, and then the nitride silicon layer 3 and the dielectric layer 2 can be completely etched away using an HF system solution. Finally, the surface of the crystalline silicon substrate 1 is etched again with alkaline solution to remove a small amount of surface with high boron concentration and boron-related defects.

[0051] After completing the above steps, a laser-processed area 5 and a non-laser-processed area 6 with different doping concentrations are formed on the front side of the crystalline silicon substrate 1, and the structure is shown in Figure 3, that is, a selective emitter structure is obtained. In addition to boron or phosphorus, nitrogen can also be detected in the selective emitter, and nitrogen can suppress micro-defects in silicon. If the functional elements of the doping source layer 4 include carbon, carbon can also be detected in the selective emitter. In a specific embodiment, the square resistance of the laser-processed area 5 of the selective emitter structure prepared by the above method is adjustable in the range of tens to hundreds of Ω / sq, usually 40 to 150 Ω / sq, and the square resistance of the non-laser-processed area 6 is adjustable in the range of tens to thousands of Ω / sq, usually 100 to 350 Ω / sq.

[0052] The above method is also applicable to preparing laser-doped phosphorus emitters on p-type silicon wafers.

[0053] The technical solutions and technical effects of the present invention will be further described below through specific embodiments.

[0054] Example 1

[0055] An n-type quartz substrate was prepared and cleaned, and then the silicon oxide dielectric layer was treated with N2O / H2 plasma using PECVD. A 5nm thick nitride silicide film (15at% nitrogen content) and a 50nm thick carbon-doped boron-doped amorphous silicon film (5at% carbon content) were then deposited.

[0056] Comparative Example 1

[0057] Prepare an n-type quartz substrate, clean it, and then use a BBr3 diffusion furnace to deposit a 50nm borosilicate glass (BSG) film on the silicon wafer surface.

[0058] The light absorption spectra of the samples prepared in Example 1 and Comparative Example 2 were tested, and the results are shown in Figure 4. As can be seen from the absorption spectra in Figure 4, the carbon-doped boron-doped amorphous silicon deposited by PECVD has a much greater light absorption capacity than BSG, thus having a better laser doping effect.

[0059] Example 2

[0060] Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 50W, scanning rate is 30m / s) to carry out boron propulsion treatment. Clean and etch to remove the source layer.

[0061] Example 3

[0062] Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m / s) to carry out boron propulsion treatment. Clean and etch to remove the source layer.

[0063] Comparative Example 2

[0064] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the substrate in a BBr3 diffusion furnace and deposit a 50nm thick borosilicate glass (BSG) film. Use a 325nm nanosecond pulsed laser (50W laser power, 30m / s scan rate) to introduce boron. Clean and etch away the source layer.

[0065] Comparative Example 3

[0066] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the substrate in a BBr3 diffusion furnace and deposit a 50nm thick borosilicate glass (BSG) film. Use a 325nm nanosecond pulsed laser (25W laser power, 15m / s scan rate) to introduce boron. Clean and etch away the source layer.

[0067] The square resistance and junction depth of the laser-processed area of ​​the samples prepared in Example 2-3 and Comparative Example 2-3 were tested, and the results are shown in Table 1 below.

[0068] Table 1. Sheet resistance and junction depth of laser-processed areas of samples

[0069] It can be seen from the test results in Table 1 that under the same laser conditions, the dielectric layer / nitrogen silicide / carbon-doped boron-doped amorphous silicon doping source structure can be doped more effectively; under low laser power conditions, the BSG boron source is difficult to dope, while the dielectric layer / nitrogen silicide / doped boron-doped amorphous silicon boron source can still achieve a good doping effect.

[0070] Example 4

[0071] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a silicon oxide dielectric layer of about 1.5 nm on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 5at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then use KOH solution to selectively etch the boron source layer, then use HF to etch the nitride silicon film and the dielectric layer, and finally use KOH solution to etch the silicon substrate surface. After etching, use aluminum oxide and silicon nitride to passivate the silicon substrate surface. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

[0072] Example 5

[0073] Prepare an n-type crystalline silicon substrate, clean it and make it textured. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a silicon oxide dielectric layer of about 1.5nm on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitrogen siliconide film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing treatment at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate. The boron diffusion curve of the selective emitter prepared in this embodiment is shown in Figure 5, and its square resistance is 219Ω / Sq.

[0074] Example 6

[0075] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 25at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

[0076] Example 7

[0077] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to treat the silicon oxide dielectric layer with N2O / H2 plasma. Then deposit a 5nm nitride silicon film (nitrogen content of 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content of 15at%). Perform an annealing treatment at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the silicon substrate surface. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate. Use aluminum oxide and silicon nitride to passivate the silicon substrate surface. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

[0078] Example 8

[0079] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 25at%). Perform annealing at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface of the silicon substrate. Use SIMS to test the concentration distribution of N and C. The results show that N and C atoms exist in the silicon substrate.

[0080] Comparative Example 4

[0081] Prepare an n-type crystalline silicon substrate, clean it, and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm thick silicon oxide dielectric layer on its surface. Then, deposit a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Anneal it at 1000°C for 240 minutes to form a pn junction. Then, alternately use KOH solution and HF to selectively etch the boron source layer. After etching, passivate the surface with aluminum oxide and silicon nitride.

[0082] Comparative Example 5

[0083] Prepare an n-type crystalline silicon substrate and clean and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform annealing at 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching, use aluminum oxide and silicon nitride to passivate the surface.

[0084] Comparative Example 6

[0085] Prepare an n-type crystalline silicon substrate, clean it and texturize it. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on its surface. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm boron-doped amorphous silicon film on the surface of the silicon oxide dielectric layer. Perform annealing treatment at a high temperature of 1000°C for 240 minutes to form a pn junction. Then alternately use KOH solution and HF to selectively etch the boron source layer. After etching is completed, use aluminum oxide and silicon nitride to passivate the surface.

[0086] The emitter square resistance, junction depth and single-side saturation current density (J) of the emitter passivation sheets prepared in Examples 4-8 and Comparative Examples 4-6 were tested. 0,s ), implicit open circuit voltage (iV oc )The results are shown in Table 2 below.

[0087] Table 2. Key parameters of emitter in non-laser treated area of ​​passivation wafer

[0088] The test results in Table 2 show that plasma treatment of the silicon oxide dielectric layer and the addition of a silicide nitrogen layer between the silicon oxide and the boron-doped amorphous silicon can effectively suppress boron diffusion and defects on the surface of the silicon substrate in the non-laser area, significantly increasing the passivation effect of the boron emitter in the non-laser area.

[0089] Example 9

[0090] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitrogen silicide film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m / s) to carry out boron propulsion treatment, followed by a high temperature annealing treatment of 1000°C for 240min to form a heavily doped structure. Then use KOH solution and HF alternately to selectively etch the boron source layer.

[0091] Comparative Example 7

[0092] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a BBr3 diffusion furnace and deposit a BSG layer of about 50nm on the front side. Use a nanosecond pulsed laser with a wavelength of 325nm (laser power of 25W, scanning rate of 15m / s) to carry out boron propulsion treatment, followed by annealing at 1000℃ for 240min to form a heavily doped structure. Then, alternately use KOH solution and HF to selectively etch the boron source layer.

[0093] Boron diffusion curves and square resistances were measured using ECV and four-probe techniques on the emitters prepared in Example 9 and Comparative Example 7, with the results shown in Figure 6. The test results show that, compared to borosilicate glass, the multilayer doping source structure of the present invention can achieve higher boron concentrations and junction depths under the same laser and annealing conditions, resulting in more efficient doping.

[0094] Example 10

[0095] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulsed laser with a wavelength of 325nm (laser power of 25W, scanning rate of 15m / s) to carry out boron driving treatment on the designed electrode area. The entire structure is annealed at a high temperature of 1000°C for 240 minutes to form a selective emitter structure. Subsequently, KOH solution and HF are used alternately to selectively etch the boron source layer. After etching, the surface is passivated with aluminum oxide and silicon nitride. Metal electrodes are printed on the electrode area by screen printing and then sintered in a belt furnace.

[0096] Comparative Example 8

[0097] An n-type crystalline silicon substrate is prepared, with the front surface textured, the back surface polished, and then subjected to standard RCA cleaning. A boron emitter is formed on the silicon wafer using BBr3 thermal diffusion. After etching away the boron source layer, the surface is passivated using aluminum oxide and silicon nitride. Metal electrodes are then screen-printed in the electrode area and sintered in a belt furnace.

[0098] The performance of the selective emitter prepared in Example 10 and the conventional boron emitter prepared in Comparative Example 8 were tested. The test contents included the overall current density (J 0,total ), the current density in the electrode contact area (J 0,met ) and contact resistivity (ρ c,met), the diffusion resistance of the non-electrode contact area (R sq ) and current density (J 0,pass ), and the results are shown in Table 3 below.

[0099] Table 3 Performance comparison of selective emitter and conventional boron emitter

[0100] From the test results in Table 3, it can be seen that the overall passivation performance, the passivation performance of the electrode contact area and the passivation performance of the non-electrode contact area of ​​the selective emitter structure prepared in Example 10 are significantly better than those of the boron emitter prepared by the conventional method.

[0101] Example 11

[0102] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Place the crystalline silicon substrate in a 110°C HNO3 solution for 15 minutes to grow a 1.5nm silicon oxide dielectric layer on the front side. Use PECVD to perform N2O / H2 plasma treatment on the silicon oxide dielectric layer. Then deposit a 5nm nitride silicon film (nitrogen content is 15at%) and a 50nm carbon-doped boron-doped amorphous silicon film (carbon content is 5at%). Use a nanosecond pulse laser with a wavelength of 325nm (laser power is 25W, scanning rate is 15m / s) to carry out boron driving treatment on the designed electrode area. The entire substrate is annealed at a high temperature of 1000°C for 240 minutes to form a selective emitter structure. Subsequently, KOH solution and HF are used alternately to selectively etch the boron source layer. Use 110°C nitric acid to treat the back side of the silicon wafer for 15 minutes to grow about 1.5nm of silicon oxide on the back side of the silicon wafer. An 80nm thick phosphorus-doped amorphous silicon layer is deposited on the backside of the silicon wafer using tubular PECVD, followed by annealing at 840°C for 30 minutes to form the TOPCon structure. The front side is passivated with aluminum oxide and silicon nitride. Electrodes are screen-printed on both sides, followed by belt furnace sintering.

[0103] Comparative Example 9

[0104] Prepare an n-type crystalline silicon substrate, texturize the front side, polish the back side, and perform standard RCA cleaning. Use the BBr3 thermal diffusion method to form a boron emitter on the front side of the crystalline silicon substrate. After RCA cleaning, use 110°C nitric acid treatment for 15 minutes to grow about 1.5nm of silicon oxide on the back side of the silicon wafer. Use tubular PECVD to deposit a 60nm phosphorus-doped amorphous silicon layer on the back side of the silicon wafer, and anneal at 840°C for 30 minutes to form a TOPCon structure. Passivate the front side with aluminum oxide and silicon nitride. Screen print electrodes on both sides and perform belt furnace sintering.

[0105] The key parameters of the TOPCon batteries prepared in Example 11 and Comparative Example 9 were tested, including the open circuit voltage (Voc ), short-circuit current (J sc ), fill factor (FF) and power conversion efficiency (PCE), and the results are shown in Table 4 below.

[0106] Table 4 Comparison of key parameters of TOPCon batteries of Example 11 and Comparative Example 9

[0107] The test results in Table 4 prove that the selective emitter prepared by the method shown in this patent significantly improves the open circuit voltage and fill factor of the battery. The efficiency of the prepared TOPCon battery can be increased by about 0.33% compared to the battery without a selective emitter.

[0108] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A multi-layer doping source structure, characterized in that It includes a dielectric layer, a silicon nitride layer, and a doped source layer that are stacked on the front surface of a crystalline silicon substrate. The dielectric layer is a silicon oxide thin film or a silicon oxynitride thin film. The doped source layer is boron-doped amorphous silicon doped with a functional element or phosphorus-doped amorphous silicon doped with a functional element. The functional element doped in the doped source layer is carbon and / or nitrogen.

2. The multi-layer doping source structure according to claim 1, wherein The thickness of the doped source layer is 10 - 500 nm, the thickness of the silicon nitride layer is 1 - 100 nm, and the thickness of the dielectric layer is 1 - 3 nm.

3. The multi-layer doping source structure according to claim 1 or 2, characterized in that, The nitrogen element content in the silicon nitride layer is 0.5 at% - 50 at%.

4. The multi-layer doping source structure according to claim 1 or 2, characterized in that The content of the functional element in the doping source layer is 0.1 at% to 10 at%, the boron doping concentration is 5E17 to 5E19 cm -3 , or the phosphorus doping concentration is 5E17 to 1E20 cm -3 .

5. A controllable preparation method for a high-quality emitter, characterized in that, Using the multi-layer doped source structure as described in any one of claims 1 - 4, the controllable preparation method includes the following steps: S1. Prepare a dielectric layer on the front surface of the crystalline silicon substrate. S2. Perform plasma treatment on the dielectric layer. S3. Deposit a silicon nitride layer on the surface of the dielectric layer. S4. Deposit a doped source layer on the surface of the silicon nitride layer to obtain a doped source structure. S5. Perform laser treatment on the designed electrode area to diffuse boron or phosphorus into the crystalline silicon substrate. S6. Perform high-temperature annealing treatment to cause secondary diffusion of boron or phosphorus in the laser-treated area and diffusion of boron or phosphorus in the non-laser-treated area. S7. Remove the remaining doped source structure, and a selective emitter structure is formed on the front surface of the crystalline silicon substrate.

6. The controllable preparation method of the high-quality emitter according to claim 5, characterized in that, In the step S1, the preparation method of the dielectric layer is selected from one of wet chemical method, high-temperature oxidation method, ozone oxidation method, and plasma-assisted oxidation method.

7. The controllable preparation method of the high-quality emitter according to claim 5, characterized in that, In the step S2, the plasma is selected from one or more of H2, Ar, N2O, C2O, and NH3.

8. The controllable preparation method of the high-quality emitter according to claim 5, characterized in that, In the step S3, chemical vapor deposition technology is used to prepare the silicon nitride layer, and in the step S4, chemical vapor deposition technology is used to prepare the doped source layer.

9. The controllable preparation method of the high-quality emitter according to claim 5, characterized in that, In the step S6, the high-temperature annealing treatment temperature is 800 - 1200 °C.

10. The controllable preparation method of the high-quality emitter according to claim 5, wherein, The step S7 specifically includes: using alkaline solution wet etching to remove the doped source layer, using hydrofluoric acid wet etching to remove the silicon nitride layer and the dielectric layer, and then using alkaline solution etching on the surface of the crystalline silicon substrate.

11. A high-quality emitter, characterized in that, Obtained by the controllable preparation method as described in any one of claims 5 - 10.

12. The high-quality emitter according to claim 11, characterized in that, The high-quality emitter contains nitrogen element.

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