Enhanced coding of handles in forward and reverse edgebreaker

Abstract

Systems and methods for coding of handles in meshes. In an example mesh encoding method, information is obtained describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index. Handle information is encoded identifying a pair of corner indices. The pair of corner indices includes a first corner index and a second corner index. The encoding of the handle information comprises encoding a sign of the first corner index. In some embodiments, encoding the handle information further comprises encoding an offset of the second corner index. In some embodiments, the first and / or second corner index are encoded using delta coding.

Description

ENHANCED CODING OF HANDLES IN FORWARD AND REVERSE EDGEBREAKERCROSS-REFERENCE

[0001] This application claims the priority of European Patent Application No. 24305006.9, filed 2 January 2024, entitled “Enhanced Coding of Handles in Forward and Reverse Edgebreaker,” which is incorporated herein by reference in its entirety.BACKGROUND

[0002] Following the MPEG V-Mesh (now renamed V-DMC) CfP the solution proposed by Apple was selected to become the foundation of the MPEG V-Mesh Test Model (TM). This solution is described in K. Mammou, J. Kim, A. Tourapis and D. Podborski, "m59281 - [V- CG] Apple's Dynamic Mesh Coding CfP Response," Apple Inc, 2022 (Mammou et al. 2022). An overview of a mesh encoder using this solution is shown in FIG. 1 , and a corresponding decoder is shown in FIG. 2. The TM, for some frames, uses a static mesh coder for the encoding of a base mesh that is then subdivided to obtain an approximation of the original mesh.SUMMARY

[0003] A mesh encoding method according to some embodiments comprises: obtaining information describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index; and encoding handle information identifying a pair of corner indices, the pair of corner indices including a first corner index and a second corner index; wherein encoding the handle information comprises encoding a sign of the first corner index.

[0004] A mesh decoding method according to some embodiments comprises: obtaining a bitstream describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index; and decoding from the bitstream handle information identifying a pair of corner indices, the pair of corner indices including a first corner index and a second corner index; wherein decoding the handle information comprises decoding a sign of the first corner index.

[0005] In some embodiments, encoding or decoding (collectively “coding”) the handle information comprises encoding or decoding an offset of the second corner index.

[0006] In some embodiments, encoding or decoding the offset of the second corner index comprises arithmetic encoding or decoding of the offset of the second corner index.

[0007] In some embodiments, encoding or decoding the sign of the first corner index comprises arithmetic encoding or decoding of the sign of the first corner index.

[0008] In some embodiments, encoding or decoding the handle information further comprises encoding or decoding a triangle index associated with at least one of the corner indices. In some such embodiments, the triangle index is coded as a variable sized integer.

[0009] In some embodiments, encoding or decoding handle information includes encoding or decoding a first delta value representing a difference between the first corner index of a current pair of corner indices and a corresponding first corner index of a pervious pair of corner indices.

[0010] In some embodiments encoding or decoding handle information includes encoding or decoding a second delta value representing a difference between the second corner index of a current pair of corner indices and a corresponding second corner index of a previous pair of corner indices.

[0011] In some embodiments, encoding or decoding handle information includes coding a second delta value representing a difference between the second corner index and the first corner index.

[0012] Some embodiments further comprise determining a number of handles in the mesh, and arithmetic coding at least a portion of the handle information in response to a determination that the number of handles is at least a threshold number.

[0013] In some embodiments, the method is performed by an edgebreaker encoder or decoder.

[0014] In some embodiments, the method is performed by a forward mesh encoder or decoder.

[0015] In some embodiments, the method is performed by a reverse mesh encoder or decoder.

[0016] An apparatus according to some embodiments comprises one or more processors, the apparatus being configured to perform any of the methods described herein.

[0017] An apparatus according to some embodiments comprises at least one processor and a computer-readable medium storing instructions for performing any of the methods described herein.

[0018] A computer-readable medium according to some embodiments store instructions for performing any of the methods described herein.

[0019] A computer-readable medium according to some embodiments stores a mesh encoded according to any of the methods described herein.

[0020] A signal according to some embodiments conveys a mesh encoded according to any of the methods described herein.BRIEF DESCRIPTION OF THE DRAWINGS

[0021] FIG. 1 is a flow diagram illustrating an overview of an MPEG test model intra frame encoding process.

[0022] FIG. 2 is a flow diagram illustrating an overview of an MPEG test model intra frame decoding process.

[0023] FIG. 3 is a flow diagram illustrating an overview of a reverse edgebreaker mesh codec according to example embodiments. The top row is the encoding line, and the bottom row is the decoding line.

[0024] FIG. 4 illustrates example source code for a serialize method from the TMv6 encoder, that are related to the storage and encoding of the handles table.

[0025] FIG. 5 illustrates example source code for an unserialize method from the TMv6 decoder, that is related to the reconstruction and decoding of handles table.

[0026] FIG. 6 illustrates parts of a serialize method from a reverse encoder that are related to the storage and coding of a handles table.

[0027] FIG. 7 illustrates parts of an unserialize method from a reverse decoder that are related to the reconstruction and decoding of a handles table.

[0028] FIG. 8 illustrates a first part of a serialize method proposed for both forward and reverse versions according to an example embodiment. Note that some statements are only used for the REVERSE mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0029] FIG. 9 illustrates a second part of a serialize method proposed for both forward and reverse versions according to an example embodiment. Note that some statements are only used for the FORWARD mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0030] FIG. 10 illustrates a first part of an unserialize method proposed for both forward and reverse versions according to an example embodiment. Note that some statements are only used for REVERSE mode and some for FORWARD mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0031] FIG. 11 illustrates a second part of an unserialize method proposed for both forward and reverse versions. Note that some statements are only used for REVERSE mode and some for FORWARD mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0032] FIG. 12 illustrates a portion of a syntax writer method related to the storage of handles.

[0033] FIG. 13 illustrates a portion of a syntax reader method related to the storage of handles.

[0034] FIGs. 14A-14C are a table illustrating results on the first 32 frames of V-DMC CTC using forward with handle optimization vs forward mode with TMv6 handles management. The first five numerical columns illustrate the C1 lossy Al condition. The final five numerical columns illustrate the C2 lossy RA condition. As seen in FIGs. 14A-14C, example embodiments show some gains on the size of the base mesh intra coding, with a more negative percentage indicating better compression. Empty entries reflect conditions for which testing was not performed.

[0035] FIG. 15 is a block diagram of an example of a system in which various aspects and embodiments are implemented.DETAILED DESCRIPTIONOverview of mesh coding.

[0036] FIG. 1 is a schematic block diagram of a mesh encoding process in which some embodiments may be implemented. A source mesh model 302 is provided as an input mesh M(i) to the mesh encoding process. The source mesh model 302 is associated with a source texture map 304 that is proved as an input texture map A(i) to the encoding process. The input mesh is decimated at 306 to generate a base mesh m(i) with a reduced number of vertices, and a UV atlas is generated for the base mesh at 308. The base mesh is quantized at 310 and encoded at 312, with the compressed base mesh data being multiplexed at 314 into a dynamic mesh bitstream. The compressed base mesh data is reconstructed at theencoder to generate reconstructed base mesh m’(i) with a static mesh decoder 316. The reconstructed base mesh is subdivided at 318 by adding new vertices. A subdivision surface fitting process is performed at 320 by comparing the subdivided base mesh with the input mesh M(i) to determine a set of displacements d(i) that deform the vertices of the subdivided base mesh to correspond more closely to the surfaces defined by the input mesh M(i). These displacements may be updated at 322 into updated displacements d’(i) based on difference between the original base mesh m(i) and the reconstructed base mesh m’(i). These updated displacements are encoded using a wavelet transform 324 that generates wavelet coefficients e’(i), which are quantized at 326 and packed at 328 into an image format. A time-varying series of images representing the wavelet coefficients may be encoded at 330 using conventional video encoding techniques, and the encoded video may be multiplexed at 314 with the data representing the compressed base mesh. At the encoder, the displacements are reconstructed from the encoded video through image unpacking 329, inverse quantization 331 , and inverse wavelet transform 332 to generate a reconstructed set of displacements d”(i). A reconstructed base mesh M”(i) is obtained through inverse quantization at 334 of the reconstructed quantized base mesh m’(i), and the reconstructed base mesh M”(i) is subdivided at 336. A reconstructed deformed mesh DM(i) is generated at 338 by applying the reconstructed set of displacements d”(i) to the reconstructed base mesh m’(i). The reconstructed deformed mesh DM(i) is used as a destination mesh model 340 for the purpose of attribute transfer 341.

[0037] Using the reconstructed deformed mesh DM(i) (destination mesh model 340), the input mesh M(i) (source mesh model 302), and the input texture map A(i) (source texture map 304), an attribute transfer process is performed to provide attribute values for a destination texture map A’(i) that is associated with the reconstructed deformed mesh DM(i). Pixels in the texture map A’(i) that are not associated with any triangle of the reconstructed deformed mesh DM(i) may be filled using a padding process 342. A color space conversion 344 may be performed, a time-varying series of texture maps A’(i) may be encoded using conventional video encoding techniques 346, and the encoded video may be multiplexed at 314 into a bitstream 350 with the data representing the displacements and the compressed base mesh. Patch information 348 may also be multiplexed in the bitstream.

[0038] FIG. 2 illustrates an example of a mesh decoder. The mesh decoder demultiplexes different sub-bitstreams from, e.g. a V3C bitstream. The sub-bitstreams may include a subbitstream representing a static mesh, a sub-bitstream representing displacements, and one or more sub-bitstreams representing attributes. In the illustration of FIG. 2, thedisplacements sub-bitstream is illustrated as being decoded with a video decoder, but as discussed in greater detail below, different decoder configurations may be used depending on parameters received in the bitstream. For example, the decoder may be configured to use an arithmetic decoder in place of a video decoder for the coding of the displacements. In addition, where video coding is used, different decoder configurations may use different video codecs (such as AVC, HEVC, VVC, and the like).

[0039] Until v3.0, the V-Mesh test model encoded the base mesh using the Google Draco implementation of the state-of-the-art mesh encoder named edgebreaker, described in J. Rossignac, "Edgebreaker: Connectivity compression for triangle meshes," GVU center, Georgia Institute of Technology, 1999; and in J. Rossignac, "3D compression made simple: Edgebreaker with ZipandWrap on a corner-table," in Proceedings International Conference on Shape Modeling and Applications, Genova, Italy, 2001. Such implementations have used the Spirale Reversi variant of edgebreaker, described at M. Isenburg and J. Snoeyink, "Spirale Reversi: Reverse decoding of the Edgebreaker encoding," Computational Geometry, vol. 20, pp. 39-52, 2001. Such implementations have been adapted to work on a Corner Table (CT), as described in J. Rossignac, "3D compression made simple: Edgebreaker with ZipandWrap on a corner-table," in Proceedings International Conference on Shape Modeling and Applications, Genova, Italy, 2001. Note that Rossinac (1999) originally decodes in a forward manner and operates on a Half Edge representation of the mesh. Later, Rossignac (2001) proposed a modified version, still decoding forward but running on a Corner Table representation of the mesh, which leads to a very compact algorithm. Spirale Reversi proposes an extension, still running on a Half Edge representation, but performing the decoding in a reverse manner. Spirale Reversi is described in M. Isenburg and J. Snoeyink, "Spirale Reversi: Reverse decoding of the Edgebreaker encoding," Computational Geometry, vol. 20, pp. 39-52, 2001. It leads to a decoding on O(n) in one pass which provides better performance than Rossignac (1999) (worst case time complexity of O(n2)) and Rossignac (2001) (O(n) but multi pass).

[0040] For the standardization of V-DMC is desirable to provide an MPEG alternative implementation of the edgebreaker that could be used in the test model reference software and extended / specified as needed. InterDigital handled the task of crafting the first version of the software. The version that was adopted for the TM v3.0 is detailed in the following MPEG contributions: J.-E. Marvie and O. Mocquard, "m62603 - [V-DMC][EE4.4] Edgebreaker base mesh codec integration," MPEG meeting 142, Antalya, 2023; and J.-E. Marvie and O. Mocquard, "m63344 -[V-DMC][EE4.4]-an-efficient-Edgebreaker- implementation," MPEG meeting 142, Antalya. This software is further described inEuropean Patent Application No. 23305505.2, filed 6 April 2023. In that application, specific adaptations of the forward edgebreaker were presented, working on a corner table that was made to support the V-Mesh TM requirements as well as the associated bitstream syntax. Further extensions are described in the following European Patent Applications:• European Patent Application No. 23305941.9, filed 14 June 2023 (describing the coding of per-face attributes).• European Patent Application No. 23306154.8, filed 7 July 2023 (describing alternative vertex traversals).• European Patent Application No. 23306155.5, filed 7 July 2023 (describing prediction-degree based motion estimation).• European Patent Application No. 23306292.6, filed 26 July 2023 (describing per- face attribute optimization).

[0041] For some meshes, especially the large ones with regular topology (vertex valence average of 6 neighbors), some specific extensions (known as valence driven encoding) can be used to better encode the CLERS table, such as those described in A. Szymczak, "Optimized Edgebreaker encoding for large and regular triangle meshes," The Visual Computer, vol. 19, pp. 271-278, 2003. However, this solution is specific to the reverse version of the edgebreaker. A first version of the reverse version is presented in Isenburg & Snoeyink (2001), which works on a half edge data structure. Later a version working on a corner table data structure, and supporting surfaces with holes and handles, was presented in T. Lewiner, H. Lopes, J. Rossignac and A. W. Vieira, "Efficient Edgebreaker for Surfaces of Arbitrary Topology," in Proceedings. 17th Brazilian Symposium on Computer Graphics and Image Processing, 2004 (“Lewiner et al. (2004)”).Overview of example embodiments.

[0042] FIG. 3 provides an overview of an example reverse edgebreaker mesh codec. The top row is the encoding line. The bottom row is the decoding line. As illustrated in FIG. 3, an example edgebreaker encoder performs pre-processing 102 of a mesh, e.g. to accommodate non-manifold surfaces or to quantize attributes. At 104, the encoder performs connectivity coding using edgebreaker to generate a CLERS table representing the connectivity. At 106, the encoder performs prediction of attributes of the mesh. The prediction may proceed in a topology-based order determined by the edgebreaker encoding. Alternatively, the prediction may proceed using a different order, such as a depth- first traversal or a vertex-degree-based traversal. At 108, the alternate traversal isperformed. The encoder may signal in the bitstream information indicating which type of traversal is used for attribute prediction. The encoder may test different traversal types (e.g. a topology-based traversal type and one or more alternative traversal types) and encode the mesh using whichever traversal type provides the best performance (e.g. the greatest compression). At 110, entropy coding is performed of the CLERS table, of other information (e.g. handle information) about the topology of the mesh, and / or of the attribute residuals. A bitstream including this entropy encoded information may be stored for later use or may be transmitted to an encoder without intermediate storage.

[0043] At 112, a decoder performs entropy decoding on a received bitstream, including entropy decoding as appropriate of a CLERS table, handle information, and / or attribute residual information. At 114, the decoder uses the CLERS table and related information to reconstruct the topology or connectivity of the mesh. At 116, the decoder performs attribute prediction and corrections using the appropriate traversal type corresponding to the traversal type used by the encoder (which may be signaled in the bitstream). Where the traversal type is an alternative traversal type, the decoder performs the appropriate alternative traversal at 118. Where the traversal type is based on the topology of the mesh as reconstructed in 114, an alternative traversal is not needed. At 120, post-processing is performed, e.g. to recreate manifold structures, dequantize attributes, and perform postindexing.

[0044] Example embodiments provide more efficient solutions for the encoding and decoding of handles in both forward and reverse implementations of edgebreaker.

[0045] Example embodiments are described below using commented source code to show examples of different encoding and decoding functions. Example syntax for use in encoding and decoding (e.g. in a V3C implementation) is also given below.

[0046] Some embodiments perform the encoding and decoding the different tables using the techniques of TMv6.0, except for modifications as described herein for the coding of handles.

[0047] In European Patent Application No. 23305505.2 a solution was proposed to encode the handles, using some properties such as index offsetting. Such a solution is illustrated in FIGs. 4 and 5 of the present application. In a reverse edgebreaker implementation, the handles table may be used to code the handles but also the boundaries using negative integer values for the first handle pair of values. The arithmetic coding (AC) model from TMv6 is sufficient since coding the sign is also called for. Hence, in a reverse edgebreaker implementation, the handles may be coded as delta values as seen in FIGs. 6 and 7.

[0048] In example embodiments, for both forward and reverse coding, handle coding may be performed using some or all of the following features. Such embodiments may reduce the number of bits used to code the handles.

[0049] In example embodiments, the geometry of a triangular mesh is represented using a corner table providing information regarding the properties of each corner. There are three corners per triangle, so for a mesh with a number nT of triangles, there are 3*nT corners, which may be indexed by a number in the range from 0 to (3*nT-1). A sign bit may be used to indicate the presence of handles. Handles may be represented as pairs of corners. In example embodiments, the first corner in the pair has a corner index of either-3 * _T - 2 or3 * _T + 2 where _T is the triangle index. Thus the sign bit information together with the triangle index information provides sufficient information to retrieve the corner index of the first corner.

[0050] The second corner in the pair has a corner index of either_T * 3 + 1 or_T * 3 + 2Thus, an offset bit together with the triangle index provides sufficient information to retrieve the corner index of the second corner.

[0051] In example embodiments, some or all of the following features may be implemented:

[0052] Feature A: Encode corner indices as variable sized integers.

[0053] Feature B: Encode sign and offset bit vectors; and encode triangle indices as variable sized integers.

[0054] Feature C: Use feature A or B, and encode a delta value as follows. According to Feature C1 , a first set of delta values codes differences between corner indices of consecutive first corners, and a second set of delta values codes differences between corner indices of consecutive second corners. According to Feature C2, a first set of delta values codes differences between corner indices of consecutive first corners, and a second set of delta values codes differences between corner indices of second corners and theirassociated first corners. Other types of delta coding may alternatively be used, e.g. a combination of Feature C1 and C2.

[0055] Feature D: Use feature A or B, and encode sign and offset bits with arithmetic coding. The arithmetic coding may be used to code a positive / negative value associated with the first handle corner and / or a +1 / +2 shift associated with the second handle corner.

[0056] Feature E: Use features C and D. In addition for Feature E1 , the delta encoding uses variable sized integers with byte chunks, using a signed to unsigned mapping and encoding as a succession of Sbits chunks, where 1 bit is used to signal extension (e.g. 7 useful bits per 8 bit chunk). This provides an efficient implementation e.g. when using 32 bits (4 chunks), leading to fast parsing. For feature E2, feature E1 is used but with 4 bits chunks (less bits for small sizes - more for large sizes). Efficient implementation still possible, e.g. using 64bits registers to accommodate large values for very big meshes. For feature E3, a separate prefix is used, with a few bits indicating how many chunks are used to represent the value. As an example, 13bits value with 4bits useful chunks: 4 chunks, code (4-1) as prefix and use 16bits for the suffix. For feature E4, the prefix of Feature E3 is implemented and the prefix is arithmetic coded, e.g. using unitary coding.■ 1 chunk code 1■ 2 chunks code 01■ 5 chunks code 00001■ Using a limited number of contexts (one final context reused for all bits beyond n-th bit), this last context possibly using bypass coding.

[0057] For feature E5, E4 is used but the chunk size is not limited, and it may be optimized depending on the data sequence.

[0058] For feature F1 , a selection of coding scheme may be made from among the above schemes (or others) based on the codec size and signal method in the bitstream.

[0059] For feature F2, a selection of coding scheme may be made from among the above schemes (or others) depending on number of handles. For example, arithmetic coding may be used only if there is greater than a threshold number of handles because the overhead of AC coding may not be worthwhile in cases where there are relatively few handles.

[0060] In an example embodiment, if the number of handles is lower than a threshold MIN_HANDLE, then the feature C1 is implemented, and if the number of Handles is larger or equal to the threshold MIN_HANDLE, then features C1 , D, and E4 are implemented.

[0061] In one example embodiment, after experimental results on a wide variety of models, the value of the threshold MIN_HANDLE is set to 10, though any other value may alternatively be used.

[0062] The different variants of feature E as describe above may also be used to encode positions global coordinates and UV global coordinates in the reverse and forward edgebreaker (this concerns the coding of the start tables). While the E1 approach for those has been replaced with a fixed size representation, the E2-4 variants could potentially lead to gains for models with a large number of CCs or UV patches.

[0063] The presented software code is a (sometimes simplified) C++ code. In the code: dvec2 are mathematical 2D vectors of C / C++ double values (64bits floating point). vec2 are mathematical 2D vectors of C / C++ float values (32bits floating point). std : : sqrt returns mathematical square root of the parameter. std : : round returns mathematical rounding to nearest integer of the parameter. std : :vector<float> name; is an array of floats named name, float could be replaced another type such as vec2, then the following methods would all operate on vec2 values instead of floats. namef i] dereferences the array name at index i. name . push_back(v) adds a new element of value v at the end of the array name by increasing its size of 1 element. name . reserve( n) reserves some memory for the vector name but its effective number of elements name . size ( ) is not changed. Such a memory pre-allocation prevents multiple memory realocations on multiple calls to name . push_back( ). name . assign (n v) resizes the array name to contain n elements and set all the values to v. v is optional, default value is used if not provided. name . resize(n v) resizes the array name to contain n elements and set the new values to v. Existing values are left unchanged, v is optional, default value is used if not provided.

[0064] FIG. 4 Illustrates a portion of the serialize method from the TMv6 encoder that is related to the storage and coding of handles table.

[0065] FIG. 5 illustrates a portion of the unserialize method from the TMv6 encoder that is related to the reconstruction and decoding of handles table.

[0066] FIG. 6 illustrates portions of a serialize method from a reverse encoder that are related to the storage and coding of handles table.

[0067] FIG. 7 illustrates parts of an unserialize method from a the reverse decoder that are related to the reconstruction and decoding of handles table.

[0068] FIG. 8 illustrates a first part of a serialize method proposed for both forward and reverse versions according to an example embodiment. Note that some statements are only used for the REVERSE mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0069] FIG. 9 illustrates a second part of a serialize method proposed for both forward and reverse versions according to an example embodiment. Note that some statements are only used for the FORWARD mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0070] FIG. 10 illustrates a first part of an unserialize method proposed for both forward and reverse versions according to an example embodiment. Note that some statements are only used for REVERSE mode and some for FORWARD mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0071] FIG. 11 illustrates a second part of an unserialize method proposed for both forward and reverse versions. Note that some statements are only used for REVERSE mode and some for FORWARD mode. Example embodiments may include one serialize method for each mode, both are presented here in the same code for convenience.

[0072] A mesh coding syntax may be modified in example embodiments. For example, in some embodiments, a mesh position coding payload syntax may be used as follows. In particular, features indicated with a dagger (t) reflect example modifications.

[0073] In embodiments that do not include a forward mode, the element mesh_cc_with_handles_count may be renamed mesh_handles_count, and mesh_handles_count may no longer be an array.

[0074] FIGs. 12 and 13 illustrate code for a syntax writer and reader according to some embodiments, with portions that are contingent on the number of handles being illustrated in boldface. If the number of handles NumHandles is less than MIN_HANDLE these embodiments write / read the deltas computed in FIG. 9 I FIG. 10, otherwise the write / read is performed on the buffer that is AC coded / decoded in FIG. 81 FIG. 11 .

[0075] In some embodiments, more flexibility may be provided by storing the value of MIN_HANDLE in the syntax. In some such embodiments, a rate optimization (RO) is performed at the serialize step to select the best solution from simple delta coding and more advanced coding. This path would introduce more complexity but could potentially improve compression in some cases.

[0076] FIG. 12 illustrates a portion of a syntax writer method related to the storage of handles. Example features of particular interest are shown in bold.

[0077] FIG. 13 illustrates a portion of a syntax reader method related to the storage of handles. Example features of particular interest are shown in bold.

[0078] Example embodiments provide an efficient way of handling AC contexts and mix of block coding of integers. Coding gains have been seen on the handle tables. Small global gains on the V-DMC CTCs are seen in FIGs. 14A-14C, but handles are a very small portion of the global payload.

[0079] FIGs. 14A-14C illustrate results on the first 32 frames of V-DMC CTC using forward with handle optimization vs. forward mode with TMv6 handles management. The first five numerical columns illustrate the C1 lossy Al condition. The final five numerical columns illustrate the C2 lossy RA condition. As seen in FIGs. 14A-14C, example embodimentsshow some gains on the size of the base mesh intra coding, with a more negative percentage indicating better compression. Empty entries reflect conditions for which testing was not performed.

[0080] A codec implementing an example embodiment was run on a set of 319 models extracted from the Real World Textured Things (RWTT) dataset, keeping only the ones with a single texture map and CC attribution license. The forward and the reverse modes were compared with and without the example handle coding method, and the average results are presented in the following table. Gains are observed in size and there are negligible runtime differences (variation is only due to operating system interrupts and caching fluctuations).Example system hardware.

[0081] Example embodiments of encoders and / or decoders (collectively coders) configured to implement embodiments described herein may be implemented using systems such as the system of FIG. 15. FIG. 15 is a block diagram of an example of a system in which various aspects and embodiments are implemented. System 1000 can be embodied as a device including the various components described below and is configured to perform one or more of the aspects described in this document. Examples of such devices, include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 1000, singly or in combination, can be embodied in a single integrated circuit (IC), multiple ICs, and / or discrete components. For example, in at least one embodiment, the processing and encoder / decoder elements of system 1000 are distributed across multiple ICs and / or discrete components. In various embodiments, the system 1000 is communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and / or output ports. In various embodiments, the system 1000 is configured to implement one or more of the aspects described in this document.

[0082] The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor 1010 can include embedded memory, input output interface, and various other circuitries as known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and / or a non-volatile memory device). System 1000 includes a storage device 1040, which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and / or optical disk drive. The storage device 1040 can include an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and / or a network accessible storage device, as non-limiting examples.

[0083] System 1000 includes an encoder / decoder module 1030 configured, for example, to process data to provide an encoded video or decoded video, and the encoder / decoder module 1030 can include its own processor and memory. The encoder / decoder module 1030 represents module(s) that can be included in a device to perform the encoding and / or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder / decoder module 1030 can be implemented as a separate element of system 1000 or can be incorporated within processor 1010 as a combination of hardware and software as known to those skilled in the art.

[0084] Program code to be loaded onto processor 1010 or encoder / decoder 1030 to perform the various aspects described in this document can be stored in storage device 1040 and subsequently loaded onto memory 1020 for execution by processor 1010. In accordance with various embodiments, one or more of processor 1010, memory 1020, storage device 1040, and encoder / decoder module 1030 can store one or more of various items during the performance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

[0085] In some embodiments, memory inside of the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can beeither the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and / or the storage device 1040, for example, a dynamic volatile memory and / or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO / IEC 13818, and 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard being developed by J VET, the Joint Video Experts Team).

[0086] The input to the elements of system 1000 can be provided through various input devices as indicated in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in FIG. 1 C, include composite video.

[0087] In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example, cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band.Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.

[0088] Additionally, the USB and / or HDMI terminals can include respective interface processors for connecting system 1000 to other electronic devices across USB and / or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor 1010 as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface ICs or within processor 1010 as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 1010, and encoder / decoder 1030 operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device.

[0089] Various elements of system 1000 can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement 1140, for example, an internal bus as known in the art, including the I nter-IC (I2C) bus, wiring, and printed circuit boards.

[0090] The system 1000 includes communication interface 1050 that enables communication with other devices via communication channel 1060. The communication interface 1050 can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel 1060. The communication interface 1050 can include, but is not limited to, a modem or network card and the communication channel 1060 can be implemented, for example, within a wired and / or a wireless medium.

[0091] Data is streamed, or otherwise provided, to the system 1000, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal of these embodiments is received over the communications channel 1060 and the communications interface 1050 which are adapted for Wi-Fi communications. The communications channel 1060 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system 1000 using a set-top box that delivers the data overthe HDMI connection of the input block 1130. Still other embodiments provide streamed data to the system 1000 using the RF connection of the input block 1130. As indicated above, various embodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.

[0092] The system 1000 can provide an output signal to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a cell phone (mobile phone), or other device. The display 1100 can also be integrated with other components (for example, as in a smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices 1120 include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide a function based on the output of the system 1000. For example, a disk player performs the function of playing the output of the system 1000.

[0093] In various embodiments, control signals are communicated between the system 1000 and the display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV. Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to system 1000 using the communications channel 1060 via the communications interface 1050. The display 1100 and speakers 1110 can be integrated in a single unit with the other components of system 1000 in an electronic device such as, for example, a television. In various embodiments, the display interface 1070 includes a display driver, such as, for example, a timing controller (T Con) chip.

[0094] The display 1100 and speaker 1110 can alternatively be separate from one or more of the other components, for example, if the RF portion of input 1130 is part of a separate set-top box. In various embodiments in which the display 1100 and speakers 1110 are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.

[0095] The embodiments can be carried out by computer software implemented by the processor 1010 or by hardware, or by a combination of hardware and software. As a nonlimiting example, the embodiments can be implemented by one or more integrated circuits. The memory 1020 can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor 1010 can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.Additional embodiments.

[0096] A mesh encoding method according to some embodiments comprises: obtaining information describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index; and encoding handle information identifying a pair of corner indices, the pair of corner indices including a first corner index and a second corner index; wherein encoding the handle information comprises encoding a sign of the first corner index.

[0097] A mesh decoding method according to some embodiments comprises: obtaining a bitstream describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index; and decoding from the bitstream handle information identifying a pair of corner indices, the pair of corner indices including a first corner index and a second corner index; wherein decoding the handle information comprises decoding a sign of the first corner index.

[0098] In some embodiments, encoding or decoding (collectively “coding”) the handle information comprises encoding or decoding an offset of the second corner index.

[0099] In some embodiments, encoding or decoding the offset of the second corner index comprises arithmetic encoding or decoding of the offset of the second corner index.

[0100] In some embodiments, encoding or decoding the sign of the first corner index comprises arithmetic encoding or decoding of the sign of the first corner index.

[0101] In some embodiments, encoding or decoding the handle information further comprises encoding or decoding a triangle index associated with at least one of the corner indices. In some such embodiments, the triangle index is coded as a variable sized integer.

[0102] In some embodiments, encoding or decoding handle information includes encoding or decoding a first delta value representing a difference between the first corner index of a current pair of corner indices and a corresponding first corner index of a pervious pair of corner indices.

[0103] In some embodiments encoding or decoding handle information includes encoding or decoding a second delta value representing a difference between the second corner index of a current pair of corner indices and a corresponding second corner index of a previous pair of corner indices.

[0104] In some embodiments, encoding or decoding handle information includes coding a second delta value representing a difference between the second corner index and the first corner index.

[0105] Some embodiments further comprise determining a number of handles in the mesh, and arithmetic coding at least a portion of the handle information in response to a determination that the number of handles is at least a threshold number.

[0106] In some embodiments, the method is performed by an edgebreaker encoder or decoder.

[0107] In some embodiments, the method is performed by a forward mesh encoder or decoder.

[0108] In some embodiments, the method is performed by a reverse mesh encoder or decoder.

[0109] An apparatus according to some embodiments comprises one or more processors, the apparatus being configured to perform any of the methods described herein.

[0110] An apparatus according to some embodiments comprises at least one processor and a computer-readable medium storing instructions for performing any of the methods described herein.

[0111] A computer-readable medium according to some embodiments store instructions for performing any of the methods described herein.

[0112] A computer-readable medium according to some embodiments stores a mesh encoded according to any of the methods described herein.

[0113] A signal according to some embodiments conveys a mesh encoded according to any of the methods described herein.

[0114] This disclosure describes a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description, and does not limit the disclosure or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.

[0115] The aspects described and contemplated in this disclosure can be implemented in many different forms. While some embodiments are illustrated specifically, other embodiments are contemplated, and the discussion of particular embodiments does not limit the breadth of the implementations. At least one of the aspects generally relates to mesh encoding and decoding, and at least one other aspect generally relates to transmitting a bitstream generated or encoded. These and other aspects can be implemented as a method, an apparatus, a computer readable storage medium having stored thereon instructions for encoding or decoding mesh data according to any of the methods described, and / or a computer readable storage medium having stored thereon a bitstream generated according to any of the methods described.

[0116] Various methods are described herein, and each of the methods comprises one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined. Additionally, terms such as “first”, “second”, etc. may be used in various embodiments to modify an element, component, step, operation, etc., such as, for example, a “first decoding” and a “second decoding”. Use of such terms does not imply an ordering to the modified operations unless specifically required. So, in this example, the first decoding need not be performed before the second decoding, and may occur, for example, before, during, or in an overlapping time period with the second decoding.

[0117] Various numeric values may be used in the present disclosure, for example. The specific values are for example purposes and the aspects described are not limited to these specific values.

[0118] Embodiments described herein may be carried out by computer software implemented by a processor or other hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The processor can be of any type appropriate to the technicalenvironment and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.

[0119] When a figure is presented as a flow diagram, it should be understood that it also provides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method / process.

[0120] The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable / personal digital assistants (“PDAs”), and other devices that facilitate communication of information between end-users.

[0121] Reference to “one embodiment” or “an embodiment” or “one implementation” or “an implementation”, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase “in one embodiment” or “in an embodiment” or “in one implementation” or “in an implementation”, as well any other variations, appearing in various places throughout this disclosure are not necessarily all referring to the same embodiment.

[0122] Additionally, this disclosure may refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

[0123] Further, this disclosure may refer to “accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0124] Additionally, this disclosure may refer to “receiving” various pieces of information. Receiving is, as with “accessing”, intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, “receiving” is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0125] It is to be appreciated that the use of any of the following“and / or”, and “at least one of”, for example, in the cases of “A / B”, “A and / or B” and “at least one of A and B”, is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of “A, B, and / or C” and “at least one of A, B, and C”, such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended for as many items as are listed.

[0126] Also, as used herein, the word “signal” refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of a plurality of parameters for region-based filter parameter selection for de-artifact filtering. In this way, in an embodiment the same parameter is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, then signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety of ways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word “signal”, the word “signal” can also be used herein as a noun.

[0127] Implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

[0128] We describe a number of embodiments. Features of these embodiments can be provided alone or in any combination, across various claim categories and types. Further, embodiments can include one or more of the following features, devices, or aspects, alone or in any combination, across various claim categories and types:

[0129] A bitstream or signal that includes one or more of the described syntax elements, or variations thereof.

[0130] A bitstream or signal that includes syntax conveying information generated according to any of the embodiments described.

[0131] Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.

[0132] Creating and / or transmitting and / or receiving and / or decoding according to any of the embodiments described.

[0133] A method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the embodiments described.

[0134] Note that various hardware elements of one or more of the described embodiments are referred to as “modules” that carry out (i.e., perform, execute, and the like) various functions that are described herein in connection with the respective modules. As used herein, a module includes hardware (e.g., one or more processors, one or more microprocessors, one or more microcontrollers, one or more microchips, one or more application-specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), one or more memory devices) deemed suitable for a given implementation. Each described module may also include instructions executable for carrying out the one or more functions described as being carried out by the respective module, and it is noted that thoseinstructions could take the form of or include hardware (i.e., hardwired) instructions, firmware instructions, software instructions, and / or the like, and may be stored in any suitable non-transitory computer-readable medium or media, such as commonly referred to as RAM, ROM, etc.

[0135] Although features and elements are described above in particular combinations, each feature or element can be used alone or in any combination with the other features and elements. In addition, the methods described herein may be implemented in a computer program, software, or firmware incorporated in a computer-readable medium for execution by a computer or processor. Examples of computer-readable storage media include, but are not limited to, a read only memory (ROM), a random access memory (RAM), a register, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs). A processor in association with software may be used to implement a radio frequency transceiver for use in a WTRLI, UE, terminal, base station, RNC, or any host computer.

Claims

CLAIMS1. A mesh encoding method comprising: obtaining information describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index, the mesh further having at least one handle; and encoding handle information for each handle, the handle information identifying a pair of corner indices associated with the respective handle, each pair of corner indices including a first corner index of a first corner in a first triangle in the plurality of triangles and a second corner index of a second corner in a second triangle in the plurality of triangles; wherein the handle information for a current handle includes: information identifying a sign of the first corner index of the current handle; information identifying the first triangle of the current handle; information identifying the second triangle of the current handle; and information identifying an offset value of the current handle, the second corner index being three times an index of the second triangle, plus an offset identified by the offset value.

2. A mesh encoding apparatus comprising one or more processors configured to perform at least: obtaining information describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index, the mesh further having at least one handle; and encoding handle information for each handle, the handle information identifying a pair of corner indices associated with the respective handle, each pair of corner indices including a first corner index of a first corner in a first triangle in the plurality of triangles and a second corner index of a second corner in a second triangle in the plurality of triangles; wherein the handle information for a current handle includes: information identifying a sign of the first corner index of the current handle; information identifying the first triangle of the current handle; information identifying the second triangle of the current handle; and information identifying an offset value of the current handle, the second corner index being three times an index of the second triangle, plus an offset identified by the offset value.

3. The method of claim 1 or the apparatus of claim 2, wherein the information identifying the sign of the first corner index is a sign bit and the information identifying the offset value is an offset bit.

4. The method of claim 1 , or claim 3 as it depends from claim 1 , or the apparatus of claim 2, or claim 3 as it depends from claim 2, wherein the information identifying the first triangle is a first delta value, the first delta value being a signed integer representing a difference between a triangle index of the first triangle of the current handle and a triangle index of the first triangle of a previous handle.

5. The method of claim 4 as it depends from claim 1 , or the apparatus of claim 4 as it depends from claim 2, wherein the first delta value is a variable-sized integer.

6. The method of claim 1 , or claims 3-5 as they depend from claim 1 , or the apparatus of claim 2, or claims 3-5 as they depend from claim 2, wherein the information identifying the second triangle is a second delta value, the second delta value being a signed integer representing a difference between a triangle index of the second triangle of the current handle and a triangle index of the second triangle of a previous handle.

7. The method of claim 6 as it depends from claim 1 , or the apparatus of claim 6 as it depends from claim 2, wherein the second delta value is a variable-sized integer.

8. A mesh decoding method comprising: obtaining information describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index, the mesh further having at least one handle; and decoding handle information for each handle, the handle information identifying a pair of corner indices associated with the respective handle, each pair of corner indices including a first corner index of a first corner in a first triangle in the plurality of triangles and a second corner index of a second corner in a second triangle in the plurality of triangles; wherein the handle information for a current handle includes: information identifying a sign of the first corner index of the current handle; information identifying the first triangle of the current handle; information identifying the second triangle of the current handle; andinformation identifying an offset value of the current handle, the second corner index being three times an index of the second triangle, plus an offset identified by the offset value.

9. A mesh decoding apparatus comprising one or more processors configured to perform at least: obtaining information describing a geometry of a mesh comprising a plurality of triangles, each triangle having a plurality of corners associated with a respective corner index, the mesh further having at least one handle; and decoding handle information for each handle, the handle information identifying a pair of corner indices associated with the respective handle, each pair of corner indices including a first corner index of a first corner in a first triangle in the plurality of triangles and a second corner index of a second corner in a second triangle in the plurality of triangles; wherein the handle information for a current handle includes: information identifying a sign of the first corner index of the current handle; information identifying the first triangle of the current handle; information identifying the second triangle of the current handle; and information identifying an offset value of the current handle, the second corner index being three times an index of the second triangle, plus an offset identified by the offset value.

10. The method of claim 8 or the apparatus of claim 9, wherein the information identifying the sign of the first corner index is a sign bit and the information identifying the offset value is an offset bit.11 . The method of claim 8, or claim 10 as it depends from claim 8, or the apparatus of claim 9, or claim 10 as it depends from claim 9, wherein the information identifying the first triangle is a first delta value, the first delta value being a signed integer representing a difference between a triangle index of the first triangle of the current handle and a triangle index of the first triangle of a previous handle.

12. The method of claim 11 as it depends from claim 8, or the apparatus of claim 11 as it depends from claim 9, wherein the first delta value is a variable-sized integer.

13. The method of claim 8, or claims 10-12 as they depend from claim 8, or the apparatus of claim 9, or claims 10-12 as they depend from claim 9, wherein the information identifying the second triangle is a second delta value, the second delta value being a signed integer representing a difference between a triangle index of the second triangle of the current handle and a triangle index of the second triangle of a previous handle.

14. The method of claim 13 as it depends from claim 8, or the apparatus of claim 13 as it depends from claim 9, wherein the second delta value is a variable-sized integer.

15. The method of claim 8, or claims 10-14 as they depend from claim 8, or the apparatus of claim 9, or claims 10-14 as they depend from claim 9, wherein decoding the handle information for the current handle comprises entropy decoding the handle information.

16. The method of claim 8, or claims 10-14 as they depend from claim 8, or the apparatus of claim 9, or claims 10-14 as they depend from claim 9, wherein, in response to a determination that a number of handles in the mesh is at least a threshold number, the decoding of the handle information for the current handle comprises entropy decoding of the handle information.

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