Chip package structure and electronic apparatus
Through the structure of the flexible contact terminal and the chip buckle plate combined with the radiator, the problem of bare chip easily damaged during the heat dissipation process is solved, stable and reliable installation and efficient heat dissipation are achieved, and the packaging cost is reduced.
Patent Information
- Application Number
- PCT/IB2024/062796
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-01-05
- Filing Date
- 2024-12-18
- Publication Date
- 2025-07-10
AI Technical Summary
During the heat dissipation process, the bare chip loses the protection of the metal cover, and the ability to resist external influences is reduced, making it easy to damage, increasing the packaging and preparation costs.
The structure is adopted in which the flexible contact terminal and the chip buckle plate are combined with the radiator, and the flexible contact terminal is connected to the circuit board. During the installation process, the radiator moves relative to the chip buckle plate, maintains the contact state with the bare chip for heat dissipation, and absorbs the installation tolerance through the detachable connector and elastic member to avoid excessive pressure on the bare chip.
It realizes stable and reliable installation and efficient heat dissipation of the bare chip, reduces the preparation cost of the package structure, and improves the practicality of the package structure and the reliability of the use of the bare chip.
Smart Images

Figure IB2024062796_10072025_PF_FP_ABST
Abstract
Description
Technical Field of Chip Packaging Structure and Electronic Device
[0001] This application relates to the field of chip packaging, and particularly to a chip packaging structure and an electronic device. Background Art
[0002] With the rapid development of electronic technology, the application scope of chips is becoming increasingly wide. During the use of a chip, the chip will generate a certain amount of heat. If the heat cannot be dissipated in time, it may affect the normal operation of the chip.
[0003] Since a chip usually includes a bare die and a metal cover disposed outside the bare die, the metal cover is used to protect the bare die. In order to solve the heat dissipation problem of the chip, the metal cover can be removed, so that the radiator can be directly in contact with the bare chip. This can not only improve the heat dissipation capacity, but also save the chip cost.
[0004] However, for a chip, since the bare chip loses the protection of the metal cover, its ability to resist external influences is greatly reduced, so that the bare chip is easily damaged during the assembly process, thereby increasing the manufacturing cost of the electronic device. Summary of the Invention
[0005] The embodiments of this application provide a chip packaging structure and an electronic device, which can not only ensure the heat dissipation quality and effect of the chip, but also realize stable and reliable installation operation of the bare chip.
[0006] In a first aspect, the embodiments of this application provide a chip packaging structure, including: a bare chip, mounted on a circuit board through a mounting seat, the mounting seat including a plurality of flexible contact terminals for abutting against the bare chip, so that a communication line is formed between the bare chip and the circuit board through the flexible contact terminals; a chip pressing plate for pressing the bare chip on the mounting seat, wherein the chip pressing plate is connected with a radiator. When the bare chip is pressed on the mounting seat by using the chip pressing plate, the radiator can move relative to the chip pressing plate based on the generated mounting stress, and the radiator remains in contact with the upper surface of the bare chip to perform heat dissipation operation on the bare chip.
[0007] In some instances, the direction in which the radiator moves relative to the chip pressing plate is opposite to the mounting direction of the bare chip.
[0008] In some instances, the mounting seat is a land grid array package socket, and the mounting seat is fixedly mounted on the circuit board.
[0009] In some examples, the encapsulation structure further includes: a chip metal ring connected to the bare chip, and the bare chip is disposed in the middle of the chip metal ring to abut against the flexible contact terminal through the chip metal ring.
[0010] In some examples, the chip pressing plate is mounted on the circuit board through a detachable connecting member.
[0011] In some examples, a first elastic member is disposed on the detachable connecting member, and the first elastic member is configured to absorb installation tolerances during the process of mounting the bare chip on the circuit board.
[0012] In some examples, the chip pressing plate is movably connected to the heat sink through a detachable connecting member, and a limiting member is disposed at the upper end of the detachable connecting member, and the limiting member is configured to limit the range of movement of the heat sink relative to the chip pressing plate.
[0013] In some examples, the detachable connecting member includes any one of the following: a connecting post, a spring connecting member.
[0014] In some examples, when the detachable connecting member is a connecting post, a second elastic member is disposed on the connecting post.
[0015] In some examples, the heat sink includes a heat dissipation boss for abutting against the upper surface of the bare chip, and a mounting through hole corresponding to the heat dissipation boss is provided in the chip pressing plate, and the heat dissipation boss abuts against the upper surface through the mounting through hole.
[0016] In some examples, the size of the heat dissipation boss is the same as or different from the size of the upper surface.
[0017] In some examples, the number of the bare chips is multiple, and the heat sink includes a plurality of heat dissipation bosses for dissipating heat from the multiple bare chips, and the heights of the plurality of heat dissipation bosses are the same or different.
[0018] In some examples, the heat sink abuts against the upper surface of the bare chip through a heat conducting member.
[0019] In a second aspect, an embodiment of the present application provides an electronic device, including: a substrate; the chip encapsulation structure described in the first aspect above, and the encapsulation structure is detachably mounted on the substrate.
[0020] The chip packaging structure and electronic device provided in this embodiment include a bare chip and a chip pressing plate. The bare chip can be installed on a circuit board through a mounting base with flexible contact terminals. Specifically, the bare chip can be pressed onto the mounting base by the chip pressing plate. At the same time, a radiator can be used to dissipate heat from the bare chip. In this way, when the bare chip is pressed onto the mounting base by the chip pressing plate, the radiator can effectively keep dissipating heat from the bare chip, ensuring the safety and reliability of the bare chip during operation. In addition, since the radiator can move relative to the chip pressing plate based on the generated mounting stress, the chip pressing plate and the radiator will not exert a large mounting pressure on the bare chip, thus avoiding damage to the bare chip, reducing the preparation cost of the packaging structure, ensuring the stable and reliable use of the bare chip, and further improving the practicality of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or related technologies. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0022] FIG. 1 is a schematic structural diagram I of a chip packaging structure provided by an embodiment of the present application;
[0023] FIG. 2 is a schematic structural diagram of the contact between the bare chip and the flexible contact terminal provided by an embodiment of the present application;
[0024] FIG. 3 is a schematic structural diagram II of a chip packaging structure provided by an embodiment of the present application;
[0025] FIG. 4 is a schematic structural diagram I of the connection between the chip pressing plate and the radiator provided by an embodiment of the present application;
[0026] FIG. 5 is a schematic structural diagram II of the connection between the chip pressing plate and the radiator provided by an embodiment of the present application;
[0027] FIG. 6 is a schematic structural diagram III of a chip packaging structure provided by an embodiment of the present application;
[0028] FIG. 7 is a schematic structural diagram of a chip packaging structure provided by an embodiment of the present application;
[0029] FIG. 8 is a schematic structural diagram of a circuit board with a heat dissipation function provided by an application embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0030] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the following will clearly and completely describe the technical solutions in the embodiments of this application with reference to the accompanying drawings in the embodiments of this application. Apparently, the described embodiments are some, but not all, of the embodiments of this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts shall fall within the scope of protection of this application.
[0031] In the description of the embodiments of this application, terms such as "installation", "connection", "fixation", etc. shall be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of this application can be understood according to specific circumstances.
[0032] In the description of the embodiments of this application, it should be understood that the orientation or positional relationships indicated by terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the embodiments of this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the embodiments of this application.
[0033] The terms "comprising" and "having" in the description and claims of the embodiments of this application, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process or device comprising a series of steps does not necessarily have to be limited to those steps or structures clearly listed, but may include other steps or structures not clearly listed or inherent to such process or device.
[0034] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the embodiments of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.
[0035] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the embodiments of this application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples. Term definition: A packaging form of a chip component with integrated circuit functions, without adding a metal cover to protect the bare wafer.
[0037] Land Grid Array (LGA) socket, a surface mounting technology for integrated circuits, whose pins are located on the socket rather than on the integrated circuit. The chip with LGA packaging can be connected to the printed circuit board through the LGA socket. Compared with the traditional packaging method with pins on the integrated circuit, it can reduce the problem of pin damage and increase the number of pin positions.
[0038] The following will describe in detail some embodiments of this application with reference to the accompanying drawings. Without conflict between the embodiments, the following embodiments and the features in the embodiments can be combined with each other.
[0039] To facilitate the understanding of the specific structural features and structural effects of the chip packaging structure and the electronic device in this embodiment, the related technologies will be briefly described below.
[0040] With the development and progress of semiconductor integrated circuit technology, the 3nm and 5nm processes have been gradually and maturely applied to the design and production of chips, further improving the hardware performance of the chips. However, at the same time, the higher-density integrated circuits bring higher heat dissipation, the power consumption of the chips is increasing, and the size of the chips is also getting larger and larger, making it increasingly difficult to solve the heat dissipation problem of the chips.
[0041] In a traditional chip packaging structure, bare chips need to be packaged in a metal cover. At this time, in order to conduct heat out, an interface material needs to be filled between the bare chip and the metal cover for heat conduction, which is called TIM1; an interface material is filled again between the metal cover and the radiator, which is called TIM2. The heat is transmitted to the radiator through the conduction of the two interface materials for heat dissipation operation. However, since the heat of the bare chip is conducted through two layers of interface materials, the resistance of heat transfer is relatively large. In order to obtain better heat conduction ability, the TIM1 material is often expensive, which greatly affects the manufacturing cost of the chip.
[0042] During the process of packaging the bare chip, in order to better solve the chip heat dissipation problem, the metal cover can be removed, and the radiator is in direct contact with the bare chip. The filled interface material is reduced to one layer, which can greatly reduce the thermal resistance, improve the heat dissipation ability, and at the same time save the packaging cost of the bare chip.
[0043] However, for a bare chip, since the bare chip loses the protection of the metal cover, its ability to resist external influences is greatly reduced, which makes the bare chip easily damaged during the assembly process, thereby increasing the packaging and preparation costs of the bare chip.
[0044] This embodiment provides a chip packaging structure, which can be implemented as a bare chip package. This chip packaging structure can not only ensure the heat dissipation quality and effect of the chip, but also realize stable and reliable installation operation for the bare chip. Specifically, as shown in Figure 1, the chip packaging structure in this embodiment may include a bare chip 1 and a chip pressing plate 4.
[0045] The bare chip 1 is installed on the circuit board 3 through the mounting seat 2. The mounting seat 2 includes a plurality of flexible contact terminals 201 for abutting against the bare chip 1, so that a communication circuit is formed between the bare chip 1 and the circuit board 3 through the flexible contact terminals 201.
[0046] Among them, the bare chip 1 can refer to the bare wafer after wafer dicing. The bare chip 1 can be mounted on the circuit board 3 through the mounting base 2. For the circuit board 3, different application scenarios can correspond to different types of circuit boards 3. For example, the circuit board 3 can be implemented as a printed circuit board (Printed Circuit Board, abbreviated as PCB) or a printed circuit board assembly process board (Printed Circuit Board Assembly, abbreviated as PCBA). Relative to the PCBA board, the PCB board is an empty printed circuit board without any components deployed on it. For the circuit board 3, those skilled in the art can flexibly select or configure the specific type of the circuit board 3 according to specific design requirements and application requirements.
[0047] For the mounting base 2, the mounting base 2 can include a plurality of flexible contact terminals 201 for abutting against the bare chip 1. Among them, the flexible contact terminals 201 can deform with the change of the contact pressure. For example, when the contact pressure on the flexible contact terminals 201 is greater, the deformation of the flexible contact terminals 201 is greater; when the contact pressure on the flexible contact terminals 201 is smaller, the deformation of the flexible contact terminals 201 is smaller.
[0048] In addition, different application scenarios can correspond to different types of mounting bases 2. Those skilled in the art can flexibly configure the mounting base 2 according to specific application requirements. For example, the mounting base 2 can be implemented as a ball grid array package BGA socket or a land grid array package (Land Grid Array, abbreviated as LAG) socket. Since the LAG packaging process has the advantages of convenient maintenance, low cost, support for multiple types of chips, convenient flexible switching and reconfiguration, etc., preferably, the mounting base 2 can be implemented as an LAG socket. At this time, the mounting base 2 can be fixedly mounted on the circuit board 3. For example, the mounting base 2 can be soldered on the circuit board 3, or the mounting base 2 can be fixedly connected to the circuit board 3 through a connecting piece or an adhesive, or the mounting base 2 can be in contact with the circuit board 3 through flexible contact terminals or elastic contact terminals, etc., as long as the stable reliability of the mounting base 2 mounted on the circuit board 3 can be ensured.
[0049] The chip pressing plate 4 included in the chip packaging structure is used to press the bare chip 1 onto the mounting base 2. Among them, the chip pressing plate 4 is connected to a radiator 5. When using the chip pressing plate 4 to press the bare chip 1 onto the mounting base 2, the radiator 5 can move relative to the chip pressing plate 4 based on the generated mounting stress. Moreover, the radiator 5 remains in contact with the upper surface of the bare chip 1. In some instances, the radiator 5 can be in direct contact with the bare chip 1, or the radiator 5 can be in contact with the upper surface of the bare chip 1 through a heat conducting member or heat conducting material, so that the radiator 5 can dissipate heat from the bare chip 1.
[0050] For the chip pressing plate 4, the chip pressing plate 4 can be implemented as a plate-like structure with a regular shape or an irregular shape. The chip pressing plate 4 can press the bare chip 1 onto the mounting base 2. Among them, the number of bare chips 1 can be one or more, that is, one chip pressing plate 4 can press one or more bare chips 1 onto the mounting base 2. The installed bare chips 1 can form a connected circuit between the mounting base 2 through multiple flexible contact terminals 201 and between the mounting base 2 and the circuit board 3, so as to realize the stable application of the bare chip 1.
[0051] It should be noted that when using the chip pressing plate 4 to press the bare chip 1 onto the mounting base 2, in order to ensure the stable reliability of the use of the bare chip 1, heat dissipation operation needs to be performed on the bare chip 1. At this time, the chip pressing plate 4 can be connected to a radiator 5, and the radiator 5 can move relative to the chip pressing plate 4 based on the generated mounting stress, that is, the direction in which the radiator 5 moves relative to the chip pressing plate 4 is opposite to the mounting direction of the bare chip 1. For example, when using the chip pressing plate 4 to press the bare chip 1 onto the mounting base 2, the bare chip 1 can obtain a mounting force in the fl direction. The above-mentioned fl direction can be called the mounting direction. Since the chip pressing plate 4 is connected to the radiator 5 and the radiator 5 remains in contact with the bare chip 1, the radiator 5 can dissipate heat from the bare chip 1. Heat dissipation operation.
[0052] Specifically, when the bare chip 1 is pressed and mounted on the mounting seat 2 by the chip pressing plate 4, the chip pressing plate 4 will move along the fl direction. If the chip pressing plate 4 is fixedly connected to the radiator 5, the radiator 5 will also move along the fl direction. At this time, the radiator 5 and the chip pressing plate 4 can exert a relatively large mounting pressure on the bare chip 1. Since the bare chip 1 is not protected by a metal cover, the bare chip 1 cannot withstand a relatively large mounting pressure, otherwise the bare chip 1 is likely to be damaged. To avoid damage to the bare chip 1 when it is pressed and mounted on the mounting seat 2, the chip pressing plate 4 can be movably connected to the radiator 5. Specifically, when the chip pressing plate 4 presses and mounts the bare chip 1 on the mounting seat 2 along the fl direction, since the radiator 5 abuts against the bare chip 1, therefore, the bare chip 1 will generate a mounting stress in the f2 direction due to the pressing operation of the chip pressing plate 4 along the fl direction. The radiator 5 can move relative to the chip pressing plate 4 along the f2 direction due to the generated mounting stress, which will reduce the mounting pressure exerted by the radiator 5 on the bare chip 1, thereby ensuring the stable and reliable installation of the bare chip 1. At the same time, the quality and effect of heat dissipation for the bare chip 1 are also ensured.
[0053] The chip packaging structure provided in this embodiment includes a bare chip 1 and a chip pressing plate 4. The bare chip 1 can be mounted on a circuit board 3 through a mounting seat 2 with flexible contact terminals 201. Specifically, the bare chip 1 can be pressed and mounted on the mounting seat 2 by the chip pressing plate 4, and at the same time, the radiator 5 can be used to dissipate heat from the bare chip 1. In this way, when the bare chip 1 is pressed and mounted on the mounting seat 2 by the chip pressing plate 4, the radiator 5 can effectively maintain the heat dissipation operation on the bare chip 1, ensuring the safe and reliable operation of the bare chip 1. In addition, since the radiator 5 can move relative to the chip pressing plate 4 based on the generated mounting stress, therefore, the chip pressing plate 4 and the radiator 5 do not exert a relatively large mounting pressure on the bare chip 1, thus avoiding damage to the bare chip 1, reducing the preparation cost of the packaging structure, ensuring the stable and reliable use of the bare chip 1, and further improving the practicability of the packaging structure.
[0054] Figure 2 is a schematic structural diagram of the bare chip abutting against the flexible contact terminal provided by the embodiment of the present application; on the basis of the above embodiment, referring to FIGS. 1-2, since the bare wafer 1 has not undergone a packaging operation, in the process of installing the bare wafer 1, in order to avoid damage to the bare wafer 1 as much as possible, the packaging structure in this embodiment may further include a chip metal ring 6, which is disposed between the mounting base 2 and the chip pressing plate 4, and the chip metal ring 6 can be connected to the bare chip 1. The bare chip 1 is disposed in the middle or on one side of the chip metal ring 6. Specifically, the bare chip 1 can be installed and connected through the chip metal ring 6 by a detachable connection member, or the bare chip 1 can be fixedly connected to the chip metal ring 6. When the bare chip 1 is installed on the chip metal ring 6, the bare chip 1 can abut against the flexible contact terminal 201 through the chip metal ring 6, and the chip metal ring 6 can protect the bare chip 1 and the edge of the bare chip 1, effectively avoiding damage to the bare chip 1 during the installation process, thereby ensuring the installation reliability of the bare chip 1. The installation reliability of the bare chip 1.
[0055] Figure 3 is a second schematic structural diagram of a chip packaging structure provided by the embodiment of the present application; on the basis of the above embodiment, referring to FIGS. 1-3, the installation manner between the chip pressing plate 4 and the circuit board 3 in this embodiment is not limited. In order to facilitate the maintenance or adjustment of the packaging structure, the chip pressing plate 4 in this embodiment can be installed on the circuit board 3 through a detachable connection member 7.
[0056] Among them, the detachable connection member 7 can be implemented as any one of the following: screws, studs, bolts, rivets, etc. And, in order to ensure that the chip pressing plate 4 can be stably installed on the circuit board 3, the chip pressing plate 4 can be installed on the circuit board 3 through a plurality of detachable connection members 7. For example, the chip pressing plate 4 can be installed on the circuit board 3 through two, four or eight detachable connection members 7.
[0057] When installing the chip pressing plate 4 on the circuit board 3 by using the detachable connecting member 7, in order to ensure the stable reliability of the installation operation, a first elastic member 8 may be provided on the detachable connecting member 7. The first elastic member 8 may be implemented as a spring sleeved on the detachable connecting member 7. The first elastic member 8 is used to absorb the installation tolerance of the bare chip 1 during the process of installing the bare chip 1 on the circuit board 3, and can also buffer the installation pressure between the chip pressing plate 4 and the circuit board 3, further ensuring the stable reliability of the detachable installation between the chip pressing plate 4 and the circuit board 3.
[0058] FIG. 4 is a schematic structural diagram I of the connection between the chip pressing plate and the radiator provided by the embodiment of the present application; on the basis of the above embodiment, referring to FIGS. 1-4, the specific connection manner between the chip pressing plate 4 and the radiator 5 in this embodiment is not limited, and those skilled in the art can flexibly set it according to the implemented structural features. For example: The chip pressing plate 4 can be directly movably connected to the radiator 5 through the elastic member 9. The elastic member 9 not only enables relative movement between the radiator 5 and the chip pressing plate 4, but also enables the radiator 5 to keep in contact with the upper surface of the bare chip 1, so as to maintain heat dissipation for the bare chip 1.
[0059] In order to achieve the above installation effect between the radiator 5 and the chip pressing plate 4, for the elastic member 9, the elastic modulus of the elastic member 9 should be greater than or equal to a preset threshold, so as to ensure that the radiator 5 keeps in contact with the upper surface of the bare chip 1. And when the bare chip 1 is pressed on the mounting seat 2 by using the chip pressing plate 4, the radiator 5 can move relative to the chip pressing plate 4 based on the generated installation stress, effectively realizing the detachable connection operation between the chip pressing plate 4 and the radiator 5 stably.
[0060] FIG. 5 is a schematic structural diagram II of the connection between the chip pressing plate and the radiator provided by the embodiment of the present application; on the basis of the above embodiment, referring to FIGS. 1-5, the chip pressing plate 4 can not only be directly movably connected to the radiator 5 through the elastic member 9, but also be movably connected to the radiator 5 through the detachable connecting member 10. A limiting member 11 is provided at the upper end of the detachable connecting member 10, and the limiting member 11 is used to limit the range of movement of the radiator 5 relative to the chip pressing plate 4.
[0061] Among them, the detachable connecting member 10 may include any one of the following: a connecting column, a spring connecting member. When the detachable connecting member 10 is implemented as a connecting column, a second elastic member 12 may be sleeved on the connecting column. The second elastic member 12 is used to absorb the installation tolerance during the process of mounting the bare chip 1 on the circuit board 3 through the mounting base 2. Moreover, the second elastic member 12 can also buffer the installation pressure between the chip pressing plate 4 and the heat sink 5, so as to effectively realize that the chip pressing plate 4 can be stably and movably connected to the heat sink 5.
[0062] Further, with continued reference to FIGS. 1-5, in order to ensure the quality and effect of heat dissipation of the heat sink 5 on the bare chip 1, the heat sink 5 may include a heat dissipation boss 501 for abutting against the upper surface of the bare chip 1. An installation through hole 401 corresponding to the heat dissipation boss 501 is provided in the chip pressing plate 4. The heat dissipation boss 501 abuts against the upper surface through the installation through hole 401. Among them, the size of the installation through hole 401 may be adapted to the size of the heat dissipation boss 501, and the size of the heat dissipation boss 501 may be the same as or different from the size of the upper surface of the bare chip 1, that is, the size of the heat dissipation boss 501 may be greater than, less than, or equal to the size of the upper surface of the bare chip 1.
[0063] FIG. 6 is a schematic structural diagram III of a chip packaging structure provided by an embodiment of the present application; on the basis of the above embodiment, with reference to FIGS. 1-6, for the bare chip 1 included in the packaging structure, the number of bare chips 1 may be one or more. When the number of bare chips 1 is multiple, the heat sink 5 may include multiple heat dissipation bosses 501 for dissipating heat from the multiple bare chips 1, and the heights of the multiple heat dissipation bosses 501 may be the same or different.
[0064] For example, two bare chips 1 may be mounted on the mounting base 2. The sizes, sizes, and heights of the two bare chips 1 are different respectively. In order to accurately mount the two bare chips 1 on the circuit board 3 through the mounting base 2 at the same time and ensure the quality and effect of heat dissipation for the two bare chips 1, two heat dissipation bosses 501 may be configured on the heat sink 5. The height of one heat dissipation boss 501 may be h1, and the height of the other heat dissipation boss 501 may be h2, where h1 is not equal to h2. The above two heat dissipation bosses 501 may respectively abut against the two bare chips 1 with different heights to ensure the quality and effect of heat dissipation for the two bare chips 1.
[0065] Similarly, when multiple bare chips 1 are installed on the circuit board 3, the heat sink 5 can be configured with multiple heat dissipation bosses 501 for dissipating heat from the multiple bare chips 1. The sizes, heights, and dimensions of the multiple heat dissipation bosses 501 can be the same or different. The multiple heat dissipation bosses 501 that abut against the multiple bare chips 1 can dissipate heat from the multiple bare chips 1, ensuring the heat dissipation quality and effect, and thus improving the stability and reliability of the use of the bare chips 1.
[0066] In this embodiment, the number of bare chips 1 in the packaging structure can be one or more. Correspondingly, the heat sink 5 can include one or more heat dissipation bosses 501 for dissipating heat from the one or more bare chips 1. Those skilled in the art can flexibly configure and adjust the number of bare chips 1, the number of heat dissipation bosses 501, and their structural features according to specific application requirements or design requirements, effectively improving the flexibility and reliability of the use of this packaging structure. In this embodiment, the electronic device can implement the preset functions by configuring one or more chip packaging structures 100 on the substrate 200. Among them, the packaging structure 100 can not only ensure the heat dissipation quality and effect, but also facilitate the installation operation of the packaging structure 100, is not easily damaged, and thus reduces the manufacturing cost of the electronic device, effectively ensuring the stability and reliability of the operation of the electronic device, and further improving the practicality of the electronic device.
[0067] FIG. 7 is a schematic structural diagram of a chip packaging structure provided by an embodiment of the present application. Referring to FIG. 7, an electronic device provided in this embodiment can include: a substrate 200; the chip packaging structure 100 in the above embodiment, and the number of the packaging structures 100 is at least one, and the packaging structure 100 is detachably installed on the substrate 200.
[0068] Among them, the specific shape structure, implementation function, and implementation effect of the packaging structure 100 in this embodiment are similar to those of the packaging structure in the above embodiment. For details, reference can be made to the above description and will not be elaborated here.
[0069] In some instances, the chip packaging structure 100 can be installed on the substrate 200 through a backplane, and the backplane can effectively ensure the use strength of the chip packaging structure 100.
[0070] In this embodiment of the electronic device, by configuring one or more chip packaging structures 100 on the substrate 200, an electronic device that can implement preset functions can be realized. Among them, the packaging structure 100 can not only ensure the heat dissipation quality and effect, but also facilitate the installation operation of the packaging structure 100, is not easily damaged, and thus reduces the manufacturing cost of the electronic device, effectively ensuring the stability and reliability of the operation of the electronic device, and further improving the practicality of the electronic device.
[0071] In specific applications, as shown in Figure 8, taking a land grid array (LGA) socket in a planar grid array package as the mounting base and a printed circuit board assembly (PCBA) board as the circuit board as an example, this embodiment provides a packaging structure for a bare chip. Specifically, the packaging structure may include: a PCBA board 3 for deploying at least one bare chip 1 and other electrical components (not shown in the figure). The electrical components can form a preset connection circuit with the at least one deployed bare chip 1 to achieve preset functions, such as image processing functions, signal processing functions, etc. Among them, the other electrical components may include at least one of the following: resistors, inductors, capacitors, etc.
[0072] A support lower backplane 301 is provided on the back of the PCBA board 3. Specifically, the support lower backplane 301 can be fixedly connected to the PCBA board by means of connectors, adhesives or welding, and is used to increase the strength of the PCBA board 3, so that the PCBA board 3 can be used more stably and reliably.
[0073] A support upper backplane 302 is provided on the front of the PCBA board 3. Specifically, the support upper backplane 302 can be fixedly connected to the PCBA board by means of connectors, adhesives or welding, and is used to increase the strength of the PCBA board 3, so that the PCBA board 3 can be used more stably and reliably.
[0074] An LGA socket 2 is soldered on the PCBA board 3, and a plurality of flexible contact terminals 20L for contacting the bare chip 1 are provided on the LGA socket 2.
[0075] A bare chip 1 is provided in the middle of a chip metal ring 6 to abut against the flexible contact terminal 201 through the chip metal ring 6.
[0076] A chip pressing plate 4 is detachably connected to the PCBA board 3, the support lower backplane 301 and the support upper backplane 302 through a plurality of detachable connectors 7. Among them, the detachable connectors 7 can be realized as screws, and a first elastic member 8, such as a spring, for absorbing the manufacturing tolerances of the packaging structure can be provided on the screws.
[0077] The heat sink 5 is movably connected to the chip pressing plate 4 through a plurality of detachable connectors 10. Among them, the detachable connector 10 can be implemented as a connecting column and a limiting part arranged at the upper end of the connecting column, and a second elastic member 12, such as a spring member, for absorbing the manufacturing tolerance of the packaging structure can be arranged on the connecting column. The heat sink 5 can include one or more heat dissipation bosses 501, and the heat dissipation bosses 501 can be in contact with the upper surface of the bare chip 1 through the mounting through holes in the chip pressing plate 4. Specifically, the heat dissipation bosses 501 can be in contact with the upper surface of the bare chip 1 through a heat conducting member or heat conducting material to dissipate heat from the bare chip 1.
[0078] It should be noted that when the bare chip 1 is pressed and installed on the mounting seat 2 by using the chip pressing plate 4, the heat sink 5 can move relative to the chip pressing plate 4 based on the generated installation stress, and the heat sink 5 remains in contact with the upper surface of the bare chip 1 to dissipate heat from the bare chip 1.
[0079] The packaging structure provided by the embodiment of the present application can solve the problems existing in the related art: when the bare chip is installed through the LGA socket, it may be damaged or deformed severely under a large pressure (200 kgf), and the bare chip cannot be reliably contacted with the heat sink; specifically, by coupling the chip pressing plate 4 with the heat sink 5 corresponding to the bare chip 1, when the chip pressing plate 4 applies an installation pressure to the bare chip 1 and the PCBA board 3, the heat sink 5 will also passively apply a stable pressure to the area where the bare chip 1 is located, and this pressure forms a stable counterbalance and elimination with the elastic force generated by the flexible contact terminals 201 of the LGA socket 2, so that the force on the bare chip 1 is more balanced, thereby effectively preventing the upward arching deformation or damage of the bare chip 1; in addition, by installing the bare chip 1 on the PCBA board 3 through the LGA socket 2, the advantages of the LGA packaging technology are retained, and the advantages specifically include: convenient maintenance, low cost, and the ability to support flexible switching and reconfiguration of multiple types of chips, etc., which further ensures the stable and reliable use of the chip packaging structure.
[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
Claims 1. A chip packaging structure, comprising: A bare chip is mounted on a circuit board through a mounting base. The mounting base includes a plurality of flexible contact terminals for abutting against the bare chip, so that a communication circuit is formed between the bare chip and the circuit board through the flexible contact terminals. A chip pressing plate is used to press-fit the bare chip onto the mounting base. Wherein, the chip pressing plate is connected with a radiator. When the bare chip is press-fitted onto the mounting base by using the chip pressing plate, the radiator can move relative to the chip pressing plate based on the generated mounting stress. And the radiator keeps in abutting contact with the upper surface of the bare chip to dissipate heat from the bare chip.
2. The chip packaging structure according to claim 1, wherein The direction in which the radiator moves relative to the chip pressing plate is opposite to the mounting direction of the bare chip.
3. The chip packaging structure according to claim 1, wherein, The mounting base is a land grid array package socket, and the mounting base is fixedly mounted on the circuit board.
4. The chip packaging structure according to claim 1 further includes: A chip metal ring is connected to the bare chip. The bare chip is arranged in the middle of the chip metal ring to abut against the flexible contact terminal through the chip metal ring.
5. The chip packaging structure according to claim 1, wherein The chip pressing plate is mounted on the circuit board through a detachable connecting member.
6. The chip packaging structure according to claim 5, wherein A first elastic member is arranged on the detachable connecting member. The first elastic member is used to absorb the mounting tolerance during the process of mounting the bare chip on the circuit board.
7. The chip packaging structure according to claim 1, wherein The chip pressing plate is movably connected with the radiator through a detachable connecting member. A limiting member is arranged at the upper end of the detachable connecting member. The limiting member is used to limit the range of movement of the radiator relative to the chip pressing plate.
8. The chip package structure according to claim 7, wherein, The detachable connecting member includes any one of the following: a connecting post, a spring connecting member.
9. The chip packaging structure according to claim 8, wherein, When the detachable connecting member is a connecting post, a second elastic member is arranged on the connecting post.
10. The chip package structure according to claim 1, wherein The radiator includes a heat dissipation boss for abutting against the upper surface of the bare chip. An installation through hole corresponding to the heat dissipation boss is arranged in the chip pressing plate. The heat dissipation boss abuts against the upper surface through the installation through hole.
11. The chip packaging structure according to claim 10, wherein, The size of the heat dissipation boss is the same as or different from the size of the upper surface.
12. The chip packaging structure according to claim 10, wherein The number of the bare chips is multiple. The radiator includes a plurality of heat dissipation bosses for dissipating heat from multiple bare chips. The heights of the plurality of heat dissipation bosses are the same or different.
13. The chip packaging structure according to any one of claims 1-12, wherein The radiator abuts against the upper surface of the bare chip through a heat conducting member.
14. An electronic device, comprising: Substrate; The chip packaging structure according to any one of claims 1-13, and the packaging structure is detachably mounted on the substrate.
Citation Information
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