Communication method, apparatus, device, and storage medium

Abstract

The present application provides a communication method, an apparatus, a device, and a storage medium. The method comprises: on the basis of a 16*32 base matrix, determining a check matrix corresponding to a target code length, and sending first information obtained by encoding on the basis of the check matrix, wherein a first base matrix supporting a first code length is associated with a second base matrix supporting a second code length, for example, the position of a cyclic shift matrix represented by a first element of the first base matrix is the same as the position of a cyclic shift matrix represented by a first element in the second base matrix. For determination of a check matrix by a communication device, the processing complexity is reduced, thereby improving the data transmission reliability of a system. Further, in embodiments of the present application, in the check matrix determined on the basis of the 16*32 base matrix, the first element in the 17th column is zero, and the xth element and the 16th element in the 17th column are the same non-zero element, x being an integer greater than 1 and less than 16, thereby improving the encoding flexibility.

Description

Communication method, device, equipment and storage medium

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on January 10, 2024, with application number 202410042932.6 and application name “Communication Method, Apparatus, Equipment and Storage Medium”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communication technologies, and in particular to a communication method, apparatus, device, and storage medium. Background Art

[0003] The Institute of Electrical and Electronics Engineers (IEEE) 802.11n / ac / ax / be wireless local area network (WLAN) transmission standards primarily focus on improving the user experience in high-bandwidth scenarios (e.g., 60 GHz), including increasing average user throughput and energy efficiency for battery-powered devices. High-bandwidth scenarios require high-speed, reliable transmission of data, video, and other services within limited frequency and power resources, necessitating highly reliable and efficient channel coding schemes.

[0004] In the field of channel coding, concatenated codes (such as Turbo codes) and low-density parity-check (LDPC) codes are currently the two most mature and widely used channel coding methods. Both have performance close to the Shannon limit. Compared with concatenated codes, LDPC codes offer the following advantages: excellent bit error performance without the need for a deep interleaver; improved frame error rate performance; significantly reduced error floor; non-trellis-based decoding; support for parallel decoding, resulting in minimal decoding latency. Therefore, LDPC codes have become the standard channel coding scheme for low-frequency, short-range WLAN communication systems such as IEEE 802.11n / ac / ax.

[0005] How to further improve the decoding performance of LDPC codes needs to be solved urgently. Summary of the Invention

[0006] The embodiments of the present application provide a communication method, apparatus, device, and storage medium to improve the decoding performance of LDPC codes, thereby improving the transmission reliability of wireless transmission systems.

[0007] In a first aspect, the present application provides a communication method. The method may be performed by a first communication device, which may include a Wi-Fi device, or a chip or functional module disposed in the Wi-Fi device.

[0008] Exemplarily, the method includes: a first communication device determines a check matrix corresponding to a target code length based on a 16*32 basis matrix, and sends first information encoded based on the check matrix, wherein the first basis matrix supporting the first code length is associated with the second basis matrix supporting the second code length, such as the position of the cyclic shift matrix represented by the first element of the first basis matrix is ​​the same as the position of the cyclic shift matrix represented by the first element in the second basis matrix. For the communication device to determine the check matrix, the processing complexity is reduced, thereby improving the data transmission reliability of the system.

[0009] Furthermore, in an embodiment of the present application, in the check matrix determined based on the 16*32 base matrix, the first element in the 17th column is zero, the xth element and the 16th element in the 17th column are the same non-zero elements, and x is an integer greater than 1 and less than 16, thereby improving the flexibility of the encoding.

[0010] In a second aspect, the present application provides a communication method, which may be performed by a second communication device, which may include a Wi-Fi device, or a chip or functional module in the Wi-Fi device.

[0011] Exemplarily, the method includes: a second communication device receives first information, the first information is encoded based on a check matrix of a target code length, and a check matrix is ​​determined based on a 16*32 basis matrix, the basis matrix includes multiple first elements, the first elements correspond to the cyclic shift matrix, the position of the first element in the first basis matrix is ​​the same as the position of the first element in the second basis matrix, the first basis matrix is ​​used to determine the check matrix corresponding to the first code length, the second basis matrix is ​​used to determine the check matrix corresponding to the second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the basis matrix is ​​zero, the xth element and the 16th element in the 17th column of the basis matrix are the same non-zero elements, and x is an integer greater than 1 and less than 16.

[0012] In combination with the first aspect or the second aspect, in a possible implementation, the basis matrix can be expressed as:

[0013] or

[0014] Wherein, a indicates that there is a z*z cyclic shift identity matrix at the corresponding element position, z is the expansion factor, and - indicates an all-zero matrix.

[0015] In the above two examples of the first element position, the row weight and column weight of the basis matrix are different. When the row weight and column weight are different, the decoding complexity is different. Therefore, in this implementation, the above two possible basis matrices are proposed for different decoding complexities.

[0016] In combination with the first aspect or the second aspect, in a possible implementation, z is 10, and the basis matrix can be expressed as:

[0017] or

[0018] In combination with the first aspect or the second aspect, in a possible implementation, z is 20, and the basis matrix can be expressed as:

[0019] or

[0020] In combination with the first aspect or the second aspect, in a possible implementation, z is 40, and the basis matrix can be expressed as:

[0021] or

[0022] In combination with the first aspect or the second aspect, in a possible implementation, z is 60, and the basis matrix can be expressed as:

[0023] or

[0024] In combination with the first aspect or the second aspect, in a possible implementation, z is 80, and the basis matrix can be expressed as:

[0025] or

[0026] In a third aspect, an embodiment of the present application provides a first communication device configured to execute the method in the first aspect or any possible implementation. The first communication device includes a module configured to execute the method in the first aspect or any possible implementation.

[0027] In a fourth aspect, embodiments of the present application provide a second communication device configured to execute the method in the second aspect or any possible implementation. The second communication device includes a module configured to execute the method in the second aspect or any possible implementation.

[0028] In a fifth aspect, an embodiment of the present application provides a first communication device, comprising a processor configured to execute the method described in the first aspect or any possible implementation. The processor is configured to execute a program stored in a memory, and when the program is executed, the method described in the first aspect or any possible implementation is executed.

[0029] In a possible implementation, the memory is located outside the first communication device.

[0030] In a possible implementation, the memory is located within the first communication device.

[0031] In the embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. For example, the first communication device may be a chip.

[0032] In a possible implementation, the first communication device further includes a transceiver, where the transceiver is configured to receive information or send information.

[0033] In a sixth aspect, an embodiment of the present application provides a second communication device, comprising a processor configured to execute the method described in the second aspect or any possible implementation. The processor is configured to execute a program stored in a memory, and when the program is executed, the method described in the second aspect or any possible implementation is executed.

[0034] In a possible implementation, the memory is located outside the second communication device.

[0035] In a possible implementation, the memory is located within the second communication device.

[0036] In the embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. Exemplarily, the second communication device may be a chip.

[0037] In a possible implementation, the second communication device further includes a transceiver, where the transceiver is configured to receive information or send information.

[0038] In the seventh aspect, an embodiment of the present application provides a first communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used to input and / or output information, and the logic circuit is used to execute the method described in the first aspect or any possible implementation method.

[0039] In an eighth aspect, an embodiment of the present application provides a second communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used to input and / or output information, and the logic circuit is used to execute the method described in the second aspect or any possible implementation method.

[0040] In the ninth aspect, an embodiment of the present application provides a computer-readable storage medium, which is used to store a computer program. When the computer-readable storage medium is run on a computer, the method shown in any one of the above-mentioned first to second aspects or any possible implementation method is executed.

[0041] In a tenth aspect, an embodiment of the present application provides a computer program product, which, when executed on a computer, enables the method shown in any one of the first to second aspects or any possible implementation thereof to be executed.

[0042] In an eleventh aspect, an embodiment of the present application provides a computer program. When the computer program is run on a computer, the method shown in any one of the first to second aspects or any possible implementation is executed.

[0043] In the twelfth aspect, an embodiment of the present application provides a communication system, which includes a first communication device and / or a second communication device, the first communication device is used to execute the method shown in the above-mentioned first aspect or any possible implementation of the first aspect, and the second communication device is used to execute the method shown in the above-mentioned second aspect or any possible implementation of the second aspect.

[0044] The beneficial effects of the contents of the above-mentioned second to twelfth aspects and each possible implementation method can be referred to the beneficial effects brought about by the above-mentioned first aspect and each possible implementation method of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] FIG1a is a schematic diagram of a matrix prototype of a reference check matrix provided in an embodiment of the present application;

[0046] FIG1b is a schematic diagram of a CPM provided in an embodiment of the present application;

[0047] FIG2a is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application;

[0048] FIG2b is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application;

[0049] FIG2c is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application;

[0050] FIG3 is a schematic diagram of an interaction flow of a communication method provided in an embodiment of the present application;

[0051] FIG4 is a partial schematic diagram of a shortening operation in an LDPC encoding provided in an embodiment of the present application;

[0052] FIG5a is a schematic diagram of the positions of base matrix elements provided in an embodiment of the present application;

[0053] FIG5b is a schematic diagram of another base matrix element position provided in an embodiment of the present application;

[0054] FIG6a is a schematic diagram of a check matrix provided in an embodiment of the present application;

[0055] FIG6 b is a schematic diagram of a factor graph provided in an embodiment of the present application;

[0056] FIG7a is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0057] FIG7 b is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0058] FIG7c is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0059] FIG7 d is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0060] FIG8a is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0061] FIG8b is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0062] FIG8c is a schematic diagram of a decoding performance provided by an embodiment of the present application;

[0063] FIG9a is a schematic diagram showing a performance comparison of a check matrix provided in an embodiment of the present application;

[0064] FIG9b is a schematic diagram showing a performance comparison of a check matrix provided in an embodiment of the present application;

[0065] FIG9c is a schematic diagram showing a performance comparison of a check matrix provided in an embodiment of the present application;

[0066] FIG9 d is a schematic diagram showing a performance comparison of a check matrix provided in an embodiment of the present application;

[0067] FIG10 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0068] FIG11 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0069] FIG12 is a schematic structural diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0070] To facilitate understanding of the technical solution of the present application, the present application will be further described below with reference to the accompanying drawings.

[0071] The terms "first" and "second" in the specification, claims, and drawings of this application are used only to distinguish different objects and are not used to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to the process, method, product, or device.

[0072] References to "embodiments" herein mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it refer to independent or alternative embodiments that are mutually exclusive of other embodiments. It will be understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0073] In this application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three and more than three, and "and / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. "Or" means that two relationships can exist, such as only A exists, only B exists; when A and B are not mutually exclusive, it can also mean that three relationships exist, such as only A exists, only B exists, and A and B exist at the same time. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c".

[0074] The LDPC codes used in the IEEE 802.11ac / ax standards are quasi-cyclic (QC) LDPC (QC-LDPC) codes. QC-LDPC codes are a widely used type of structured LDPC codes. Due to the unique structure of their parity check matrices, they can be encoded using simple feedback shift registers, effectively alleviating the coding complexity issues associated with LDPC codes.

[0075] The current standard adopts 12 LDPC code parity check matrices, with three code lengths N: N = 648, N = 1296, or N = 1944. Each code length can support four different coding rates: 1 / 2, 2 / 3, 3 / 4, and 5 / 6. The matrix prototypes of the parity check matrices for each code length and rate are different. The parity check bit portion (the matrix corresponding to the parity bits, or parity matrix, shown below) in the matrix prototypes of the 12 parity check matrices for different code lengths and rates has the same structure. For example, the code rate selection can be determined by the modulation and coding scheme (MCS) selected by the transmission system based on link adaptation. Therefore, a communication device in a traditional WLAN can select a parity check matrix from the 12 parity check matrices based on a given code length and code rate. The aforementioned identical structure can be understood as meaning that the parity bit portion of the matrix prototypes of the different parity check matrices in Figure 1a has the first row and first column elements all set to 1, and the last row and first column elements all set to 1.

[0076] Figure 1a shows the matrix prototype of the LDPC code check matrix with code length N=1944 and different code rates. The “-” in Figure 1a represents a Z*Z all-zero matrix, the “0” in Figure 1a represents a Z*Z unit matrix, and the non-zero elements in Figure 1a represent the circulant permutation matrix (CPM) of the Z*Z unit matrix. For example, CPM uses P i Indicates that i represents the cyclic shift value or the number of bits of the unit matrix cyclically shifted to the right or the CPM coefficient or the element greater than or equal to 0 in the matrix prototype of the check matrix, etc. The specific name of i is not limited in the embodiments of the present application. i is a non-negative integer, such as 0≤i≤Z-1. When i=0, CPM can be understood as a Z*Z unit matrix, or a CPM with a cyclic shift value of 0. Exemplarily, Z=N / 24. The aforementioned "24" can be the same as the number of columns of the matrix prototype of the check matrix in the IEEE 802.11ac / ax standard. For IEEE 801.11ac / ax, regardless of the code length N=648, N=1296, or N=1944, the number of columns of the matrix prototype of the check matrix is ​​24 columns.

[0077] For example, taking element "1" (i.e., i=1) in FIG1a as an example, the element 1 can be expanded to a CPM of 81*81 (1944 / 24=81). The CPM can be expanded by cyclically shifting the unit matrix right by 1 bit, as shown below:

[0078] For example, taking 4*4 CPM as an example, FIG1b shows the CPM when i=0, the CPM when i=1, the CPM when i=2, and the CPM when i=3. The CPM shown in FIG1b is only an example. The CPM of other Z*Z unit matrices in the embodiment of the present application can refer to the principle shown in FIG1a or 1b to obtain the final P i , I will not go into details here.

[0079] As mentioned above, LDPC codes have been widely used in WLAN standards to improve the transmission reliability of wireless transmission systems. The new IEEE 802.15ab standard introduces new LDPC coding techniques, compared to the IEEE 802.15az standard, to further enhance system data transmission reliability. For example, UWB systems may simultaneously transmit short, medium, and long packets, such as 20, 100, and 1500 bytes. If IEEE 802.11n LDPC codes were reused in UWB systems, three different LDPC check matrices would be required for a single code rate (e.g., rate 1 / 2) to implement LDPC codes with three code lengths (e.g., 648, 1296, and 1944 bits). Simultaneously implementing these three check matrices would increase the complexity of the system's channel coding module, failing to meet the stringent requirements for low power consumption, low latency, and low implementation complexity of the codec required for LDPC channel coding in next-generation UWB transmission.

[0080] In view of this, an embodiment of the present application provides a new LDCP code that can support different code lengths. In the embodiment of the present application, a first base matrix supporting a first code length is associated with a second base matrix supporting a second code length. For example, the position of the cyclic shift matrix represented by "0" or non-0 elements in the first base matrix is ​​the same as the position of the cyclic shift matrix represented by "0" or non-0 elements in the second base matrix. This reduces the processing complexity for communication equipment to determine the check matrix, thereby improving the data transmission reliability of the system.

[0081] Furthermore, in an embodiment of the present application, in the check matrix determined based on the 16*32 base matrix, the first element in the 17th column is zero, the xth element and the 16th element in the 17th column are the same non-zero elements, and x is an integer greater than 1 and less than 16, thereby improving the flexibility of the encoding.

[0082] In the embodiments of the present application, the various matrices shown below can be called prototypes of the parity-matrices, or matrix prototypes of the parity-matrices, or matrix prototypes for codeword block length N, or mother matrices, or base matrices, etc. The specific names of the matrices involved in the embodiments of the present application are not limited in the embodiments of the present application. Generally speaking, a matrix including element 0 and element 1 after expansion based on Z and cyclic shift value i is called a parity matrix, so the various matrices shown below can also be called matrices before CPM expansion, etc. The various matrices shown in Example 1 or Example 2 below can be called base matrices of the parity-matrices, and the matrices after expansion based on the elements in the various matrices shown in Example 1 or Example 2 can be called parity matrices. For the specific method of expansion, please refer to the above description of Figure 1a. For the specific content of the expanded parity matrix, the embodiments of the present application will no longer list them one by one.

[0083] In the embodiments of the present application, the code length may also be referred to as a codeword block length, etc., and the specific name of the code length is not limited in the embodiments of the present application. In the embodiments of the present application, Z may be referred to as a subblock size, an expansion factor, or a lift factor, etc., and the specific name of Z is not limited in the embodiments of the present application. For ease of description, the following description uses Z as an example of an expansion factor.

[0084] Generally speaking, Z = N / 24. However, as standards progress, the subsequent method of calculating Z may also change, and the embodiments of this application do not limit this. For ease of understanding, different letter parameters are used in the embodiments of this application to represent different meanings, such as N for code length, Z for expansion factor, R for code rate, K for the number of information bits, and E for the number of check bits. However, the various letter parameters shown in the embodiments of this application are only examples and should not be understood as limitations on the embodiments of this application.

[0085] The following introduces the communication system involved in the embodiments of the present application.

[0086] The technical solutions provided in the embodiments of the present application can be applied to wireless local area network (WLAN) systems, such as Wi-Fi, etc. For example, the methods provided in the embodiments of the present application can be applied to the Institute of Electrical and Electronics Engineers IEEE 802.11 series protocols, such as the 802.11be protocol, the 802.11bn protocol, or the next generation of the 802.11bn protocol, etc., which are not listed one by one. The technical solutions provided in the embodiments of the present application can also be applied to wireless personal area networks (WPANs) based on millimeter wave (MMW) and ultra-wideband (UWB) technologies, etc. For example, the methods provided in the embodiments of the present application can be applied to the IEEE 802.15 series protocols, such as the 802.15.4a protocol, the 802.15.4z protocol, or the 802.15.4ab protocol, or a future generation of UWB WPAN protocols, etc., which are not listed one by one. The technical solutions provided in the embodiments of the present application can also be applied to the following communication systems, for example, the Internet of Things (IoT) system, vehicle-to-everything (V2X, where X can represent anything), device-to-device (D2D), narrowband Internet of Things (NB-IoT) system, long-term evolution (LTE) system, fifth-generation (5G) communication system, and new communication systems that will emerge in future communication developments. For example, the V2X may include vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P) or vehicle-to-network (V2N) communication.

[0087] WLAN systems can provide high-speed and low-latency transmission. As WLAN application scenarios continue to evolve, WLAN systems will be applied to more scenarios or industries, such as the Internet of Things industry, the Internet of Vehicles industry, the banking industry, corporate offices, sports stadiums and exhibition halls, concert halls, hotel rooms, dormitories, wards, classrooms, supermarkets, squares, streets, production workshops and warehouses, etc. Of course, devices that support WLAN communication or perception (such as access points or stations) can be sensor nodes in smart cities (such as smart water meters, smart electricity meters, and smart air detection nodes), smart devices in smart homes (such as smart cameras, projectors, displays, TVs, speakers, refrigerators, washing machines, etc.), nodes in the Internet of Things, entertainment terminals (such as wearable devices such as augmented reality (AR) and virtual reality (VR)), smart devices in smart offices (such as printers, projectors, loudspeakers, speakers, etc.), Internet of Vehicles devices, infrastructure in daily life scenarios (such as vending machines, self-service navigation counters in supermarkets, self-service checkout equipment, self-service ordering machines, etc.), and equipment in large sports and music venues.

[0088] UWB technology has the advantages of low system complexity, low power spectrum density of transmitted signals, insensitivity to channel fading, low interception capability, and high positioning accuracy. It is particularly suitable for high-speed wireless access in dense multipath locations such as indoors. The method provided in the present application can be implemented by a communication device in a wireless communication system. The communication device can be a device involved in a UWB system. For example, the communication device can include but is not limited to a communication server, router, switch, bridge, computer, mobile phone, etc. that supports UWB technology. For another example, the communication device can include user equipment (UE), which can include various handheld devices, vehicle-mounted devices (such as cars or components installed on cars, etc.) that support UWB technology, wearable devices, Internet of Things (IoT) devices, computing devices, or other processing devices connected to a wireless modem, etc., which are not listed here one by one. For another example, the communication device can include a central control point, such as a personal area network (PAN) or a PAN coordinator. The PAN coordinator or PAN can be a mobile phone, a vehicle-mounted device, an anchor point, a tag, or a smart home, etc. For another example, the communication device may include a chip, and the chip may be provided in a communication server, a router, a switch, or a terminal device, etc., which are not listed here one by one.

[0089] In one possible implementation, the method provided in the embodiment of the present application may be implemented by a communication device in a communication system. For example, the communication device may be an access point (AP) or a station (STA).

[0090] AP is a device with wireless communication function, supports communication or perception using WLAN protocol, and has the function of communicating or perceiving with other devices in the WLAN network (such as non-access point station (non-AP STA) or other access points). Of course, it can also have the function of communicating or perceiving with other devices. Alternatively, the access point is equivalent to a bridge connecting the wired network and the wireless network. Its main function is to connect various wireless network clients together and then connect the wireless network to the Ethernet. In the WLAN system, the access point can be called an access point station (AP STA). The device with wireless communication function can be a complete device, or it can be a chip, processing system or functional module installed in the complete device. The device installed with these chips or processing systems or functional modules can implement the methods and functions of the embodiments of the present application under the control of the chip or processing system or functional module. The AP in the embodiment of the present application is a device that provides services for non-AP STA, and can support 802.11 series protocols or subsequent protocols. For example, an access point can be an access point for a terminal (such as a mobile phone) to enter a wired (or wireless) network. It is mainly deployed in homes, buildings, and campuses, with a typical coverage radius of tens to hundreds of meters. Of course, it can also be deployed outdoors. For another example, an AP can be a communication entity such as a communication server, router, switch, or bridge; an AP can include various forms of macro base stations, micro base stations, and relay stations. Of course, an AP can also be a chip, processing system, or module in any of the above-mentioned devices, thereby implementing the methods and functions of the embodiments of the present application.

[0091] A STA is a device with wireless communication capabilities that supports communication or perception using the WLAN protocol and has the ability to communicate or perceive other non-AP STAs or access points in the WLAN network. In a WLAN system, a station can be referred to as a non-access point station (non-AP STA). For example, a STA is any user communication device that allows a user to communicate or perceive with an AP and then communicate with a WLAN. The device with wireless communication capabilities can be a complete device, or a chip, processing system, or functional module installed in the complete device. The device installed with these chips, processing systems, or functional modules can implement the methods and functions of the embodiments of the present application under the control of the chip, processing system, or functional module. For example, a STA can be a wireless communication chip, a wireless sensor, or a wireless communication terminal, and can also be referred to as a user. For another example, a STA can be a mobile phone that supports Wi-Fi communication capabilities, a tablet that supports Wi-Fi communication capabilities, a set-top box that supports Wi-Fi communication capabilities, a smart TV that supports Wi-Fi communication capabilities, a smart wearable device that supports Wi-Fi communication capabilities, an in-vehicle communication device that supports Wi-Fi communication capabilities, and a computer that supports Wi-Fi communication capabilities. Of course, STA can also be a chip, processing system, or module in the various forms of devices mentioned above, so as to implement the methods and functions of the embodiments of the present application.

[0092] Exemplarily, the communication system to which the method provided in the embodiment of the present application can be applied may include access points and stations. For example, the embodiment of the present application may be applicable to scenarios of communication or perception between AP and STA, between AP and AP, or between STA and STA in a WLAN, and the embodiment of the present application is not limited to this. Optionally, the AP may communicate or perceive with a single STA, or the AP may communicate or perceive with multiple STAs at the same time. Specifically, the communication or perception between the AP and multiple STAs can be divided into downlink transmission in which the AP sends signals to multiple STAs at the same time, and uplink transmission in which multiple STAs send signals to the AP. Among them, the WLAN communication protocol can be supported between the AP and STA, between the AP and AP, and between STA and STA. The communication protocol may include a protocol of the IEEE 802.11 series, such as the 802.11bn protocol, and of course, it is also applicable to protocols after 802.11bn.

[0093] Figure 2a is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application. The communication system may include one or more APs and one or more STAs. Figure 2a shows two access points such as AP1 and AP2, and three stations such as STA1, STA2 and STA3. As an example, the method provided in an embodiment of the present application may be applicable to data communication or perception between an AP and one or more STAs, such as the communication between AP1 and STA1 as shown in Figure 2a, the communication between the AP and STA as shown in Figure 2b, the communication between AP1 and STA1 and STA2 as shown in Figure 2a, and the communication between the AP and STA1, STA2 and STA3 as shown in Figure 2c. As another example, the method provided in an embodiment of the present application may be applicable to communication between APs, such as the communication between AP1 and AP2 as shown in Figure 2a. As another example, the method provided in an embodiment of the present application may be applicable to communication between STAs, such as the communication between STA2 and STA3 as shown in Figure 2a.

[0094] In Figures 2a through 2c, STAs are mobile phones and APs are routers, respectively, as examples. This does not limit the types of APs and STAs used in the embodiments of this application. Furthermore, the number of APs and STAs shown in Figures 2a through 2c is merely exemplary. In specific implementations, the number of APs or STAs can be greater or lesser, and this is not a limitation in the embodiments of this application.

[0095] From the perspectives of sending and receiving signals, the first communication device described below can be understood as a communication device that sends signals, and the second communication device can be understood as a communication device that receives signals. Alternatively, the first communication device can be referred to as a transmitter, and the second communication device can be referred to as a receiver. In the embodiments of the present application, the signal can be a signal obtained by processing an encoded sequence. From the perspective of different devices, as an example, the first communication device and the second communication device can be Wi-Fi chips, functional modules, or processing systems, etc., provided in different Wi-Fi devices. As another example, the first communication device can be an AP, and the second communication device can be a non-AP STA. As yet another example, the first communication device and the second communication device can both be non-AP STAs or both APs. As yet another example, the first communication device can be a non-AP STA, and the second communication device can be an AP. As yet another example, at least one of the first communication device and the second communication device can be a multi-link device (MLD), etc., which are not listed one by one in the embodiments of the present application. Exemplarily, a multi-link device (MLD) refers to a device that simultaneously has multiple stations (such as APs or non-AP STAs), each operating on different frequency bands or channels. A multi-link device includes multiple subordinate stations, which can be physical stations or logical stations. Each station can operate on a link, a frequency band, or a channel, etc. The above-mentioned subordinate stations can be APs or non-AP STAs. A multi-link device (such as a non-AP MLD or an AP MLD) can be a communication device with wireless communication capabilities. The communication device can be a complete device, or a chip, processing system, or module installed in the complete device. Devices installed with these chips, processing systems, or modules can implement the methods and functions of the embodiments of the present application under the control of these chips, processing systems, or modules. The multi-link device can implement wireless communication in accordance with the 802.11 series of protocols, thereby achieving communication with other devices. The other devices shown here may be multi-link devices or may not be multi-link devices. The frequency bands in which the multi-link device operates may include but are not limited to: sub 1 GHz, 2.4 GHz, 5 GHz, 6 GHz, etc., which are not listed here one by one.

[0096] The embodiment of the present application describes the method provided by the embodiment of the present application based on the first communication device and the second communication device. However, during the process of transmitting signals, the first communication device and the second communication device can also forward the signal through other devices, such as forwarding the signal between the first communication device and the second communication device through a forwarding device. The embodiment of the present application does not limit other devices other than the first communication device and the second communication device.

[0097] The communication method provided in the embodiments of the present application will be described below with reference to the accompanying drawings.

[0098] FIG3 is a schematic diagram of an interaction flow of a communication method provided in an embodiment of the present application. In conjunction with FIG3 , the method 300 includes at least some of the following steps S310 to S340:

[0099] S310: The first communication device obtains an information bit sequence.

[0100] The information bit sequence may be a bit sequence containing information. For example, the length of the information bit sequence is N2, or the number of bits of the information bit sequence is N2. N2 is a positive integer. The N2 bits may include K information bits, or K data bits, or K payload bits. K is a positive integer. N2 may be an integer greater than or equal to K. For example, when N2 is greater than K, the information bit sequence may further include (N2-K) 0s. For the relevant description of the "0" shown here, please refer to the description of the shortening operation in Figure 4 below, which will not be described in detail here.

[0101] The value of N2 can be related to the code length and code rate. If the length of the encoded sequence in step 302 is N1, then N2 = N1 * R, where R is the encoding code rate of the information bit sequence. N1 shown here can also be called the code length corresponding to the check matrix.

[0102] In a possible implementation, the method shown in FIG3 may further include:

[0103] The first communication device obtains a code length N1. Optionally, the code length N1 can be 320, 640, 1280, 1920, 2560 bits, etc.

[0104] In a possible implementation, the method shown in FIG3 may further include:

[0105] The first communication device obtains a code rate R.

[0106] In a WLAN system, different code lengths and code rates may correspond to different parity check matrices. Therefore, before the first communication device performs LDPC encoding, it may also obtain a code rate R. After obtaining the code rate R, the first communication device may select a parity check matrix based on the code rate R and the code length N1. The code rate R may be determined based on the MCS selected by link adaptation. For example, the code rate R may be determined based on current channel information. The embodiments of the present application do not limit the specific method for determining the code rate R. As an example, the MCS may be issued by the AP. As another example, the MCS may be determined by the first communication device, etc. For example, the first communication device sends an MCS to the second communication device, the second communication device receives the MCS, and obtains the code rate R based on the MCS. For another example, the second communication device sends an MCS to the first communication device, the first communication device receives the MCS, and obtains the code rate R based on the MCS. The embodiments of the present application do not limit the specific interaction process for the MCS.

[0107] Exemplarily, the code rate R may be preset, such as agreed upon by a protocol or stored in the first communication device; or the code rate R may be preconfigured, such as issued by an AP; or the code rate R may be a basic code rate, for example, in a UWB system, the basic code rate is 1 / 2, and other code rates may be obtained by shortening or puncturing.

[0108] For example, R can be any of the following: 1 / 2, 2 / 3, 3 / 4, 5 / 6. Of course, as the standard progresses, the value of R can also have other values, which is not limited in the embodiments of the present application.

[0109] S320: The first communication device performs LDPC encoding on the information bit sequence based on the check matrix to obtain first information.

[0110] Among them, the check matrix is ​​determined based on a 16*32 basis matrix. The basis matrix includes multiple first elements, and the first elements correspond to the cyclic shift matrix of z*z, that is, the elements in the basis matrix whose values ​​are zero or non-zero. The basis matrix also includes multiple second elements, and the second elements do not correspond to the cyclic shift matrix, or the second elements represent the full-zero matrix of z*z, where z is a positive integer. This application does not limit the expression of the second elements. For example, the second elements can be expressed by "-", "0" or other symbols or numerical values. Since the second elements represent the full-zero matrix of z*z, the second elements at different positions in the basis matrix can have the same expression. For example, each second element in the basis matrix can be expressed as "-".

[0111] As mentioned above, even if the code rate is the same, the basis matrices corresponding to the check matrices of different code lengths are different, including the position and value of the first element in the basis matrix. In the embodiment of the present application, when the basis matrix is ​​used to determine the check matrix corresponding to different code lengths, the position of the first element in the basis matrix remains unchanged. For example, the first basis matrix is ​​used to determine the check matrix of the first code length, and the second basis matrix is ​​used to determine the check matrix of the second code length. The first element in the first basis matrix and the first element in the second basis matrix have the same element position. For example, the positions of the first elements in the first basis matrix and the second basis matrix can be referred to in Example 1 below. For another example, the positions of the first elements in the first basis matrix and the second basis matrix can be referred to in Example 2 below. The dimension z of the cyclic shift matrix corresponding to the first element at the same position in the first basis matrix and the second basis matrix is ​​different, or the first basis matrix is ​​expanded based on the z1*z1 cyclic shift matrix to obtain the check matrix of the first code length, and the second basis matrix is ​​expanded based on the z2*z2 cyclic shift matrix to obtain the check matrix of the second code length. z1 and z2 are unequal positive integers. Optionally, the values ​​of the first elements at the same position in the first basis matrix and the second basis matrix can be different or the same. For example, the first code length may be 320 bits as described below, and the second code length may be 640 bits as described below.

[0112] For example, in order to improve the flexibility of encoding, in an embodiment of the present application, the first element in the 17th column of the base matrix is ​​zero, and the xth element and the 16th element in the 17th column of the base matrix are the same non-zero elements, where x is an integer greater than 1 and less than 16.

[0113] The following two examples illustrate the position of the first element and the position of the second element in the basis matrix. Here, a indicates that there is a z*z cyclic shift unit matrix at the corresponding element position, that is, a indicates the position of the first element in the basis matrix, where a should not be understood as the value of the element. The value of the first element represented by a can be the same or different; "-" indicates an all-zero matrix, that is, "-" represents the second element, and "-" can be replaced by "-1" or other representations.

[0114] Example 1:

[0115] Example 2:

[0116] The R corresponding to the base matrix of the check matrix shown in the above example 1 and example 2 may be equal to 1 / 2, and at the same time, the R corresponding to the check matrix is ​​also equal to 1 / 2.

[0117] The first X columns of the basis matrix correspond to information bits and can therefore be called the square matrix corresponding to the information bits, or the information matrix, where X = 32*R. When R is 1 / 2, the X columns are the left 16*16 portion of the basis matrix. The last Y columns of the basis matrix correspond to parity bits and can therefore be called the square matrix corresponding to the parity bits, or the parity matrix, where Y = 32*(1-R). When R is 1 / 2, the Y columns are the right 16*16 portion of the basis matrix.

[0118] In the above-mentioned Example 1 and Example 2, the row weight of at least one row of the basis matrix is ​​different, and the column weight of at least one column is different, wherein the row weight refers to the number of elements of the corresponding non-zero matrix in the row of the basis matrix, and the column weight refers to the number of elements of the corresponding non-weighted zero matrix in the column of the basis matrix. When the basis matrix has different row weights and / or different column weights, the decoding complexity is different, wherein the decoding complexity can be related to the average variable node degree η, and therefore the decoding complexity can be represented by η. Example 1 is smaller than Example 2. Optionally, η = 3.1 for Example 1 and η = 3.47 for Example 2.

[0119] The position of the first element in the basis matrix in Example 1 can also be seen in the first column of Figure 5a: the mother matrix. Here, "0, 3, 7, 11, 15, 16, 17" indicates that the elements in the 0th, 3rd, 7th, 11th, 15th, 16th, and 17th columns of the mother matrix are the first elements, and "0, 3, 6, 11, 16, 17, 18" indicates that the elements in the 0th, 3rd, 6th, 11th, 16th, and 18th columns of the mother matrix are the first elements, and so on.

[0120] The position of the first element in the basis matrix in Example 2 above can also be seen in the first column of Figure 5b: the mother matrix. Here, "0, 3, 4, 9, 15, 16, 17" indicates that the elements in the 0th, 3rd, 4th, 9th, 15th, 16th, and 17th columns of the mother matrix are the first elements, and "1, 2, 4, 8, 16, 17, 18" indicates that the elements in the 1st, 2nd, 4th, 8th, 16th, 17th, and 18th columns of the 1st row of the mother matrix are the first elements, and so on.

[0121] In Example 1 above, to expand the parity check matrices corresponding to different code lengths, the value of the expansion factor z is different, and the cyclic shift value (i.e., the value of the first element) in the base matrix also varies. The following example illustrates the base matrix using expansion factors z = 10, z = 20, z = 40, z = 60, and z = 80 as examples.

[0122] In the implementation method 1 of the above example 1, when the expansion factor z is 10, the base matrix can be expanded to a check matrix corresponding to N1 being 320 bits by the expansion factor. For example, the base matrix can be expressed as:

[0123] In the implementation method 1 of the above example 1, the base matrix can also be represented by the representation of the sixth column (N1=320, z=10) in Figure 5a. Here, "3, 8, 9, 0, 5, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 3, 8, 9, 0, 5, 0, 0 in sequence; "4, 1, 5, 8, 2, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 4, 1, 5, 8, 2, 0, 0 in sequence.

[0124] Any first element in the above-mentioned implementation method 1, such as element i (i is the value corresponding to the element), can be expanded to CPM, which is obtained by expanding the unit matrix by cyclic shifting i positions to the right. For example, element 0 in implementation method 1 can be expanded to a 10*10 unit matrix, and element i greater than 0 (such as i is greater than 0) can obtain a 10*10 CPM based on the unit matrix by cyclic shifting i positions to the right. The base matrix shown in implementation method 1 includes 16 rows and 32 columns, so the check matrix expanded based on the expansion factor z can include 16*10 rows and 32*10 columns. The relevant explanations about the expansion factor z here are also applicable to other implementation methods of Example 1 below. The only difference is that the value of z is different, and it will not be repeated for the sake of brevity.

[0125] In the implementation method 2 of the above example 1, when the expansion factor z is 20, the base matrix can be expanded to a check matrix corresponding to N1 being 640 bits by the expansion factor. For example, the base matrix can be expressed as:

[0126] In the implementation method 2 of the above example 1, the base matrix can also be represented by the fifth column (N1=640, z=20) in Figure 5a. Here, "17, 8, 15, 17, 11, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 17, 8, 15, 17, 11, 0, 0, in sequence; "5, 11, 14, 10, 14, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 5, 11, 14, 10, 14, 0, 0, etc. in sequence.

[0127] In the implementation method 3 of the above example 1, when the expansion factor z is 40, the base matrix can be expanded to a check matrix corresponding to N1 being 1280 bits by the expansion factor. For example, the base matrix can be expressed as:

[0128] In implementation 3 of Example 1 above, the base matrix can also be represented by the fourth column (N1=1280, z=40) in Figure 5a. Here, "27, 13, 33, 33, 0, 0, 0" indicates that the values ​​of the first elements in row 0 of the mother matrix are 27, 13, 33, 33, 0, 0, 0, in sequence; "26, 4, 7, 36, 27, 0, 0" indicates that the values ​​of the first elements in row 1 of the mother matrix are 26, 4, 7, 36, 27, 0, 0, and so on.

[0129] In the implementation mode 4 of the above example 1, when the expansion factor z is 60, the base matrix can be expanded to a check matrix corresponding to N1 being 1920 bits by the expansion factor. For example, the base matrix can be expressed as:

[0130] In the implementation method 4 of the above example 1, the base matrix can also be represented by the representation of the third column (N1=1920, z=60) in Figure 5a. Here, "3, 43, 17, 49, 54, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 3, 43, 17, 49, 54, 0, 0, respectively; "10, 39, 19, 32, 22, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 10, 39, 19, 32, 22, 0, 0, etc.

[0131] In the implementation mode 5 of the above example 1, when the expansion factor z is 80, the base matrix can be expanded to a check matrix corresponding to N1 being 2560 bits by the expansion factor. For example, the base matrix can be expressed as:

[0132] In the implementation method 5 of the above example 1, the base matrix can also be represented by the second column (N1=2560, z=80) in Figure 5a. Here, "56, 16, 36, 45, 17, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 56, 16, 36, 45, 17, 0, 0, respectively; "75, 70, 54, 14, 15, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 75, 70, 54, 14, 15, 0, 0, etc.

[0133] Similar to Example 1 above, in Example 2, the value of the expansion factor z is different, and the cyclic shift value (i.e., the value of the first element) in the base matrix also varies. The following uses expansion factors z = 10, z = 20, z = 40, z = 60, and z = 80 as examples to illustrate the base matrix.

[0134] In the implementation method 1 of the above example 2, when the expansion factor z is 10, the base matrix can be expanded to a check matrix corresponding to N1 being 320 bits by the expansion factor. For example, the base matrix can be expressed as:

[0135] In the implementation method 1 of the above example 2, the base matrix can also be represented by the representation of the sixth column (N1=320, z=10) in Figure 5b. Here, "2, 7, 6, 4, 6, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 2, 7, 6, 4, 6, 0, 0 in sequence; "5, 3, 7, 8, 2, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 5, 3, 7, 8, 2, 0, 0 in sequence.

[0136] In the implementation method 2 of the above example 2, when the expansion factor z is 20, the base matrix can be expanded to a check matrix corresponding to N1 being 640 bits by the expansion factor. For example, the base matrix can be expressed as:

[0137] In the implementation method 2 of the above example 2, the base matrix can also be represented by the fifth column (N1=640, z=20) in Figure 5b. Here, "5, 15, 4, 15, 10, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 5, 15, 4, 15, 10, 0, 0 in sequence; "5, 13, 9, 19, 2, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 5, 13, 9, 19, 2, 0, 0, etc. in sequence.

[0138] In the implementation method 3 of the above example 2, when the expansion factor z is 40, the base matrix can be expanded to a check matrix corresponding to N1 being 1280 bits by the expansion factor. For example, the base matrix can be expressed as:

[0139] In implementation 3 of Example 2 above, the base matrix can also be represented by the representation of column 4 (N1=1280, z=40) in Figure 5b. Here, "22, 6, 17, 29, 2, 0, 0" indicates that the values ​​of the first elements in row 0 of the mother matrix are 22, 6, 17, 29, 2, 0, 0, in sequence; "27, 34, 2, 7, 13, 0, 0" indicates that the values ​​of the first elements in row 1 of the mother matrix are 27, 34, 2, 7, 13, 0, 0, and so on, in sequence.

[0140] In the implementation mode 4 of the above example 2, when the expansion factor z is 60, the base matrix can be expanded to a check matrix corresponding to N1 being 1920 bits by the expansion factor. For example, the base matrix can be expressed as:

[0141] In the implementation method 4 of the above example 2, the base matrix can also be represented by the representation of the third column (N1=1920, z=60) in Figure 5b. Here, "35, 34, 28, 0, 15, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 35, 34, 28, 0, 15, 0, 0, respectively; "5, 30, 44, 19, 43, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 5, 30, 44, 19, 43, 0, 0, ... respectively.

[0142] In the implementation mode 5 of the above example 2, when the expansion factor z is 80, the base matrix can be expanded to a check matrix corresponding to N1 being 2560 bits by the expansion factor. For example, the base matrix can be expressed as:

[0143] In the implementation method 5 of the above example 2, the base matrix can also be represented by the second column (N1=2560, z=80) in Figure 5b. Here, "67, 10, 55, 5, 55, 0, 0" means that the values ​​of the first elements in the 0th row of the mother matrix are 67, 10, 55, 5, 55, 0, 0 in sequence; "28, 22, 11, 41, 59, 0, 0" means that the values ​​of the first elements in the 1st row of the mother matrix are 28, 22, 11, 41, 59, 0, 0 in sequence.

[0144] In each possible implementation of the above example 2, the relevant description of the expansion factor z can refer to the description in example 1 and will not be repeated here.

[0145] The basis matrices of the check matrices shown in each possible implementation of Examples 1 and 2 above are merely examples and do not constitute any limitation on the present application. Furthermore, the value of z in any of the above implementations is merely an example and may be greater than the values ​​in the above examples. For example, in Implementation 5 of Example 2 above, z may be greater than 80, and N1 corresponding to the basis matrix of the corresponding check matrix is ​​equal to 32*z.

[0146] In the above S320, the first communication device may perform LDPC encoding through an encoding module (such as an LDPC encoding module) to obtain an encoded sequence, and output the encoded sequence from the encoding module. The length of the encoded sequence may be the aforementioned N1. The encoded sequence may include K information bits and E check bits. Alternatively, the encoded sequence may be composed of an information bit sequence and a check bit sequence, the length of the information bit sequence may be N2, and the length of the check bit sequence may be E. N1=N2+E. The value of E is related to N1 and R. For example, if N1=320 and R=1 / 2, then E=160.

[0147] In a possible implementation, the first communication device may further perform a shortening operation after outputting the encoded sequence, as illustrated below by an example.

[0148] Generally speaking, after being encoded, the information bit sequence needs to be placed into an integer number of orthogonal frequency division multiplexing (OFDM) symbols, and the encoded sequence also needs to be placed into an integer number of LDPC codewords. Therefore, before the first communication device performs LDPC encoding, the first communication device needs to first determine the minimum number of OFDM symbols N required for this transmission. SYM , then based on N SYM and the current coding and modulation scheme (such as the modulation order indicated by MCS, etc.) to calculate the total number of coded bits N that can be stored in all OFDM symbols TCB =N CBPS *N SYM , where N CBPS The number of encoded bits that can be stored in each OFDM symbol. Then, the first communication device can calculate the LDPC code length (i.e., the code length shown in the embodiment of the present application) used in the current transmission and the required number of codewords N based on the above results. CW. Exemplarily, when there are not enough information bits (such as the case where K is less than 1944 as shown in Examples 1 to 3 below) to fill the information bit part in the LDPC codeword, the first communication device can perform a shortening operation before performing LDPC encoding (also known as generating check bits). The shortening operation refers to filling a certain number of zeros in the information bit part before generating the check bits through LDPC encoding, and then deleting these zeros after encoding to generate the check bits. Figure 4 is a partial schematic diagram of a shortening operation in an LDPC encoding provided by an embodiment of the present application. As shown in Figure 4, step 401 indicates that the first communication device can obtain the payload bits (payload bits) to be encoded (such as the K information bits shown in the embodiment of the present application). Step 402 indicates that the first communication device can calculate the LDPC code length and the number of codewords, and Figure 4 exemplarily shows three LDPC codewords. The length of each LDPC codeword (i.e., code length) can be equal to the code length. Step 403 indicates that the first communication device can perform a shortening operation on the information bits, and Figure 4 shows a codeword containing payload bits and shortening zero bits. Step 404 indicates that the first communication device can generate parity bits using the payload bits and shortening bits. FIG4 shows a codeword including payload bits, shortening 0 bits, and parity bits. Step 405 indicates that the first communication device discards these shortening 0 bits. FIG4 shows a codeword including data bits and parity bits. The above descriptions of the shortening operation, etc. are merely examples. For further descriptions of the shortening operation, etc., reference may be made to relevant standards or protocols, etc., and the present application does not limit this.

[0149] The first information in the above S320 may be a coded sequence, or the first information may be a signal that is obtained by processing the coded sequence and can be transmitted through a channel. Exemplarily, the first communication device may further perform at least one of the following processing on the coded sequence: stream parsing, constellation mapping, LDPC subcarrier mapping, stream cyclic shift, space and frequency mapping, inverse discrete Fourier transform (IDFT), insertion of cyclic prefix, and windowing.

[0150] For example, the first communication device may also perform rate matching on the encoded sequence. The rate matching method may include puncturing, repetition, and shortening. For example, the first communication device may also puncture the parity bits in the encoded sequence to obtain a higher code rate or a shorter code length. For other processing of the encoded sequence by the first communication device, reference may be made to relevant standards or protocols, and this embodiment of the present application is not limited thereto.

[0151] S330: The first communication device sends first information to the second communication device. Correspondingly, the second communication device receives the first information sent by the first communication device.

[0152] Exemplarily, after receiving the first information, the second communication device may perform corresponding processing on the first information to obtain information to be decoded. For example, when the second communication device receives the first information, it may perform at least one of the following processing: cyclic prefix removal, discrete Fourier transform (DFT), spatial and frequency demapping, deinterleaving, and constellation deconstruction. The corresponding processing before the second communication device obtains the information to be decoded may also refer to relevant standards or protocols, etc., which are not limited in this embodiment of the present application. The length of the information to be decoded may be N1.

[0153] S340: The second communication device performs LDPC decoding on the information to be decoded based on the check matrix to obtain an information bit sequence.

[0154] Exemplarily, the decoding method that can be adopted by the second communication device includes but is not limited to a hard decision decoding method, a soft decision decoding method, or a hybrid decoding method. The specific decoding process is not described in detail in the embodiment of the present application.

[0155] Exemplarily, the second communication device may also use a method similar to FIG4 to determine the code length N1, etc. For the relevant description of how the second communication device obtains the code length N1 and the code rate R, please refer to the above description of the first communication device and will not be described in detail here.

[0156] Regarding the method by which the first communication device obtains N1 and R, and the method by which the second communication device obtains N1 and R, reference may be made to relevant standards or protocols, etc., and the embodiments of the present application do not limit this.

[0157] In an embodiment of the present application, the above-mentioned S310 and S320 can be implemented by an encoding module, and the above-mentioned step 340 can be implemented by a decoding module. In a specific implementation, the method shown in Figure 3 can also be divided into an encoding method or a decoding method. For example, the first communication device can include an encoding module, and the second communication device can include a decoding module. Optionally, in addition to including the above-mentioned encoding module, the first communication device can also include an acquisition module, which can be used to obtain code length and code rate, etc. Optionally, the first communication device can also include a shortening module or a blocking module, etc. Optionally, in addition to including a decoding module, the second communication device can also include an acquisition module, which can be used to obtain information to be decoded.

[0158] In an embodiment of the present application, a first basis matrix supporting a first code length is associated with a second basis matrix supporting a second code length. For example, the position of the cyclic shift matrix represented by the first element of the first basis matrix is ​​the same as the position of the cyclic shift matrix represented by the first element in the second basis matrix. For a communication device to determine a check matrix, the processing complexity is reduced, thereby improving the data transmission reliability of the system.

[0159] Furthermore, in an embodiment of the present application, in the check matrix determined based on the 16*32 base matrix, the first element in the 17th column is zero, the xth element and the 16th element in the 17th column are the same non-zero elements, and x is an integer greater than 1 and less than 16, thereby improving the flexibility of the encoding.

[0160] The following describes a method for determining a check matrix according to an embodiment of the present application.

[0161] The method for determining the parity check matrix shown in the embodiments of this application is merely an example. In a specific implementation, the determination method shown below may be defined by a standard. Alternatively, in a specific implementation, both communicating parties may store the parity check matrix base matrix, the cyclic shift value, the position of the first element, and so on.

[0162] The first communication device can determine the check matrix corresponding to the target code length based on a 16*32 basis matrix. The 16*32 basis matrix can refer to the description in any of the implementation methods in the above-mentioned Example 1 and Example 2. In some embodiments, the first communication device can select a basis matrix based on the target code length. For example, when the code length is 320 bits, the basis matrix in Implementation Method 1 in Example 1 or the basis matrix in Implementation Method 1 in Example 2 is selected. For example, when the code length is 640 bits, the basis matrix in Implementation Method 1 in Example 1 or the basis matrix in Implementation Method 2 in Example 2 is selected, and so on. In other embodiments, the first communication device can obtain the position information of the first element in the basis matrix and determine the value of each first element in the basis matrix (i.e., the cyclic shift value) according to the target code length. For example, when the target code length is 320 bits, in the above-mentioned Example 1, the first communication device can obtain the information in the first column and the information in the sixth column as shown in Figure 5a to determine the basis matrix.

[0163] Furthermore, the first communication device expands the base matrix to obtain check matrices of LDPC codes with different code lengths. The process of expanding the base matrix to obtain the check matrix has been described above and will not be repeated for the sake of brevity.

[0164] The method for determining the check matrix by the second communication device is similar to that of the first communication device and will not be described again for the sake of brevity.

[0165] The above method for determining the check matrix may be for a certain code rate, such as a code rate of 1 / 2. The first communication device may perform rate matching on the coded sequence through processing operations such as puncturing, repetition, and shortening to obtain a coded sequence of other code rates.

[0166] The check matrix of the LDPC code can also be represented by a factor graph (Tanner graph). The factor graph and the check matrix are one-to-one corresponding. The factor graph consists of two types of nodes. The first type of nodes are variable nodes, representing information bits, and the second type of nodes are check nodes, representing check constraint relationships. Each check node represents a check constraint relationship. Figure 6a is the check matrix H of the LDPC code. In Figure 6a, {Vi} represents the variable node set, and {Cj} represents the check node set. i = 1, 2, ..., 8. j = 1, 2, 3, 4. Each row of the check matrix H corresponds to a check equation, and each column corresponds to an information bit. In Figure 6a, there are 8 variable nodes and 4 check nodes. If an information bit is included in the corresponding check equation, a line is used to connect the variable nodes and check nodes involved to obtain a factor graph. Figure 6b is the factor graph of the check matrix H of the LDPC code. For other descriptions of the factor graph, please refer to relevant standards or protocols, etc., and the embodiments of the present application are not limited to this.

[0167] In the embodiment of the present application, the check matrix is ​​designed according to the quasi-regular check degree, that is, the weight of all rows of the base matrix (that is, the number of non-zero entries in the row) has only two values: d and d+1. For example, in Example 1, the row weight of rows 0 to 2 is 7, and the row weight of rows 3 to 15 is 6; for example, in Example 2, the row weight of rows 0 to 14 is 7, and the row weight of row 15 is 6. This characteristic of the base matrix can improve the efficiency of check node processing in the LDPC decoding process, avoid resource waste, and further minimize the maximum degree of the check node (that is, the above-mentioned d+1) to reduce resource waste.

[0168] In order to balance the performance, decoding convergence speed, decoding complexity and other factors of the LDPC code, the LDPC code (or parity check matrix) in this application can be effectively applied to transmission systems such as UWB that have high requirements for both delay and decoding convergence speed. In the embodiment of this application, by adjusting some or all of the control variables: the average variable node degree (η), the slope and the stability factor, adjustments are made to obtain a base matrix, such as determining the position and value of the first element in the base matrix.

[0169] The decoding complexity is associated with the variable node degree η. In some embodiments, the decoding complexity can be represented by the variable node degree η. The decoding complexity can also be associated with the average number of iterations, such as the iterative decoding complexity can be represented by the average number of iterations n. it The product of the decoding complexity is expressed as C∝η·n it .

[0170] The following is an exemplary description of the influence of the base matrix on the decoding performance when different control variables are used, with reference to FIG. 7 a to FIG. 7 d .

[0171] Referring to FIG7a, taking a code length of 320 bits and 8 decoding iterations as an example, the first column in FIG7a represents the slope, and the first row of column labels describes the average column weight of the check matrix. Each item in the table of FIG7a represents the slope (row) and average column weight (column) of the corresponding value. -2 The difference (or SNR loss) between the signal-to-noise ratio (SNR) required for a good frame error rate (FER) and the corresponding channel capacity SNR is shown. Lower SNR loss indicates better LDPC code performance. The final row, "grand total," shows the small SNR loss at different average column weights. Figure 8a shows the data in the table shown in Figure 7a, with decoding complexity as the horizontal axis and SNR loss as the vertical axis.

[0172] Figure 7b is similar to Figure 7a, except that the parity check matrix in the table shown in Figure 7b has a code length of 640 bits. Figure 8b shows the data in the table shown in Figure 7b with decoding complexity as the horizontal axis and SNR loss as the vertical axis. Figure 7c is similar to Figure 7a, except that the parity check matrix in the table shown in Figure 7c has a code length of 1280 bits. Figure 8c shows the data in the table shown in Figure 7c with decoding complexity as the horizontal axis and SNR loss as the vertical axis. Figure 7d is similar to Figure 7a, except that the parity check matrix in the table shown in Figure 7d has a code length of 2560 bits.

[0173] 7a to 7d and 8a to 8c, in order to achieve a balance between performance and decoding complexity, the embodiment of the present application selects the check matrix implemented at decoding complexity η=3.1 and decoding complexity η=3.47 as the check matrix of the embodiment of the present application.

[0174] The following describes the simulation results of the check matrix provided in the embodiments of the present application.

[0175] The following describes the performance comparison of the parity check matrix for the aforementioned LDPC code and a reference parity check matrix. The reference parity check matrix can be a parity check matrix for an LDPC code with a classless WiFi coding structure. In Figures 9a through 9d, the horizontal axis represents the SNR in dB, and the vertical axis represents the FER. Sequence numbers 1 through 8 in Figures 9a through 9d are provided for ease of distinction and should not be construed as limiting the embodiments of this application.

[0176] Figure 9a shows a comparison of the FER performance of a parity check matrix provided by an embodiment of the present application, such as a parity check matrix with decoding complexity η = 3.47 and dual diagonal (DD), with a parity check matrix of the same code length (e.g., a parity check matrix without dual diagonal and eta = 3.5) under 8 decoding iterations. eta refers to the complexity, expressed as the average column weight of the parity check matrix. As shown in Figure 9a, the FER performance comparisons for the 320-bit code length parity check matrix DD 320, 3.47 and the parity check matrix C320, eta = 3.5; the FER performance comparisons for the 640-bit code length parity check matrix DD 640, 3.47 and the parity check matrix C640, eta = 3.5; the FER performance comparisons for the 1280-bit code length parity check matrix DD 1280, 3.47 and the parity check matrix C1280, eta = 3.5; and the FER performance comparisons for the 2560-bit code length parity check matrix DD 2560, 3.47 and the parity check matrix C2560, eta = 3.5. R = 1 / 2. C320, C640, C1280, and C2560 are all parity check matrices without double diagonals.

[0177] FIG9 b shows a comparison of the FER performance of a parity check matrix provided in an embodiment of the present application, such as a parity check matrix with a decoding complexity η = 3.47 (DD), and a parity check matrix of a non-WiFi-like code with the same code length (eta = 3.5), under 25 decoding iterations.

[0178] FIG9 c shows a comparison of the FER performance of a parity check matrix provided by an embodiment of the present application, such as a parity check matrix with decoding complexity η = 3.09 (DD), and a parity check matrix of non-WiFi-like coding with the same code length (eta = 3.2) under 8 decoding iterations.

[0179] FIG9 d shows a comparison of the FER performance of a parity check matrix provided in an embodiment of the present application, such as a parity check matrix with a decoding complexity η = 3.09 (DD), and a parity check matrix (eta = 3.2) of non-WiFi-like coding with the same code length, under 25 decoding iterations.

[0180] As can be seen from Figures 9a to 9d, the check matrix obtained by expanding the base matrix with the same first element position in the embodiment of the present application has excellent decoding performance, and at the same time achieves a good balance between decoding performance and decoding complexity.

[0181] The following describes a communication device according to an embodiment of the present application.

[0182] The present application divides the functional modules of the communication device according to the above method embodiment. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in this application is schematic and is only a logical function division. There may be other division methods in actual implementation. The communication device of the embodiment of the present application will be described in detail below with reference to Figures 10 to 10.

[0183] FIG10 is a schematic diagram of the structure of a communication device 500 provided in an embodiment of the present application. As shown in FIG10 , the communication device includes a processing module 510 and a transceiver module 520. The transceiver module 520 can implement corresponding communication functions, and the processing module 510 is used to implement corresponding processing functions. For example, the transceiver module 520 can also be referred to as an interface, a communication interface, or a communication module.

[0184] In some embodiments of the present application, the communication device may be used to perform the actions performed by the first communication device in the above method embodiments. In this case, the first communication device may be the Wi-Fi device itself, or a chip or functional module configurable in the device. The transceiver module 520 is used to perform the transceiver-related operations of the first communication device in the above method embodiments, and the processing module 510 is used to perform the processing-related operations of the first communication device in the above method embodiments.

[0185] Exemplarily, the processing module 510 can be used to determine the check matrix corresponding to the target code length based on a 16*32 basis matrix, the basis matrix includes multiple first elements, the first element corresponds to the cyclic shift matrix, the position of the first element in the first basis matrix is ​​the same as the position of the first element in the second basis matrix, the first basis matrix is ​​used to determine the check matrix corresponding to the first code length, the second basis matrix is ​​used to determine the check matrix corresponding to the second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the basis matrix is ​​zero, and the xth element and the 16th element in the 17th column of the basis matrix are the same non-zero elements; the transceiver module 520 can be used to send first information, which is obtained based on the check matrix encoding.

[0186] Exemplarily, the processing module 510 can also be used to perform LDPC encoding on the information bit sequence, and perform other processing on the encoded sequence to obtain the first information; the transceiver module 520 can also be used to send or output the signal after other processing.

[0187] Exemplarily, the processing module 510 may include an encoding module. For example, the processing module 510 may also include an acquisition module, a shortening module, or a blocking module. Exemplarily, the processing module 510 may also include at least one of the following modules: a constellation mapping module, a stream cyclic shift module, a space and frequency mapping module, an IDFT module, a cyclic prefix insertion and windowing module. Exemplarily, the transceiver module 520 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 502 may include a pin module, etc.

[0188] Referring to Figure 10 , in other embodiments of the present application, the communication device 500 can be used to perform the actions performed by the second communication device in the above method embodiments. In this case, the communication device can be the Wi-Fi device itself, or a chip or functional module configurable in the device. The transceiver module 520 is used to perform the transceiver-related operations of the second communication device in the above method embodiments, and the processing module 510 is used to perform the processing-related operations of the second communication device in the above method embodiments.

[0189] Exemplarily, the transceiver module 520 can be used to receive first information, which is obtained by encoding the check matrix based on the target code length; the processing module 510 can be used to determine the check matrix based on a 16*32 basis matrix, the basis matrix includes multiple first elements, the first elements correspond to the cyclic shift matrix, the position of the first element in the first basis matrix is ​​the same as the position of the first element in the second basis matrix, the first basis matrix is ​​used to determine the check matrix corresponding to the first code length, the second basis matrix is ​​used to determine the check matrix corresponding to the second code length, the target code length includes the first code length or the second code length, the first element in the 17th column of the basis matrix is ​​zero, and the xth element and the 16th element in the 17th column of the basis matrix are the same non-zero elements.

[0190] Exemplarily, the transceiver module 520 may also be used to input information to be decoded; the processing module 510 may also perform LDPC decoding on the information to be decoded based on the check matrix to obtain an information bit sequence.

[0191] Exemplarily, the processing module 510 may include a decoding module. For example, the processing module 510 may also include an acquisition module, etc. Exemplarily, the processing module 510 may also include at least one of the following components: a cyclic prefix removal module, a DFT module, a deinterleaving module, a constellation deconstruction module, and a descrambling module. Exemplarily, the transceiver module 520 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 520 may include a pin module, etc.

[0192] Optionally, in each of the above embodiments, the communication device may further include a storage module, which may be used to store instructions and / or data, and the processing unit 510 may read the instructions and / or data in the storage module so that the communication device implements the above method embodiments.

[0193] The specific descriptions of the transceiver module and the processing module shown in the above embodiments are only examples. For the specific functions or execution steps of the transceiver module and the processing module, please refer to the above method embodiments and will not be described in detail here.

[0194] The above describes the communication device according to the embodiment of the present application. The following describes possible product forms of the communication device. Any product having the functions of the communication device described in FIG10 above falls within the scope of protection of the embodiment of the present application. The following description is for illustrative purposes only and does not limit the product forms of the communication device according to the embodiment of the present application to these examples.

[0195] In one possible implementation, in the communication device shown in FIG10 , the processing module 510 may be one or more processors, and the transceiver module 520 may be a transceiver. Alternatively, the transceiver module 520 may be a transmitting module and a receiving module, where the transmitting module may be a transmitter and the receiving module may be a receiver, with the transmitting module and receiving module being integrated into a single device, such as a transceiver. In embodiments of the present application, the processor and transceiver may be coupled, and the connection method between the processor and transceiver is not limited in embodiments of the present application. During the execution of the above-described method, the process of sending information in the above-described method may be the process of the processor outputting the above-described information. When outputting the above-described information, the processor outputs the above-described information to the transceiver for transmission by the transceiver. After being output by the processor, the above-described information may require further processing before reaching the transceiver. Similarly, the process of receiving information in the above-described method may be the process of the processor receiving the above-described information. When the processor receives the input information, the transceiver receives the above-described information and inputs it into the processor. Furthermore, after the transceiver receives the above-described information, the above-described information may require further processing before being input into the processor.

[0196] As shown in FIG. 11 , the communication device 600 includes one or more processors 620 and a transceiver 610 .

[0197] In some embodiments of the present application, the communication device may be configured to execute the steps, methods, or functions executed by the first communication device or the network management server. For example, the processor 620 may be configured to execute the functions or steps implemented by the processing module 510 shown in FIG10 , and the transceiver 610 may be configured to execute the functions or steps implemented by the transceiver module 520 shown in FIG10 . For a detailed description of the processor 620 and the transceiver 610, reference may be made to FIG10 or the method embodiment shown above and will not be described in detail here.

[0198] In other embodiments of the present application, the communication device is used to execute the steps, methods, or functions executed by the second communication device or terminal device. For example, the processor 620 can be used to execute the functions or steps implemented by the processing module 510 shown in Figure 10, and the transceiver 610 can be used to execute the functions or steps implemented by the transceiver module 520 shown in Figure 10. For detailed descriptions of the processor 620 and the transceiver 610, please refer to Figure 10 or the method embodiment shown above and will not be described in detail here.

[0199] In various implementations of the communication device shown in FIG11 , the transceiver may include a receiver and a transmitter, wherein the receiver is configured to perform a receiving function (or operation) and the transmitter is configured to perform a transmitting function (or operation). The transceiver is configured to communicate with other devices / devices via a transmission medium.

[0200] Optionally, the communication device 600 may further include one or more memories 630 for storing program instructions and / or data. The memory 630 is coupled to the processor 620. The coupling in the embodiment of the present application is an indirect coupling or communication connection between the communication devices, units or modules, which can be electrical, mechanical or other forms, and is used for information exchange between the communication devices, units or modules. The processor 620 may operate in conjunction with the memory 630. The processor 620 can execute program instructions stored in the memory 630. Optionally, at least one of the one or more memories may be included in the processor.

[0201] The specific connection medium between the transceiver 610, processor 620, and memory 630 is not limited in the embodiments of the present application. In Figure 11, the memory 630, processor 620, and transceiver 610 are connected via a bus 640. The bus is represented by a bold line in Figure 11. The connection methods between other components are only for illustrative purposes and are not limiting. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, Figure 11 only uses a single bold line, but this does not mean that there is only one bus or only one type of bus.

[0202] In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc., and may implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of the present application may be directly implemented as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor, etc.

[0203] In the embodiment of the present application, memory may include but is not limited to non-volatile memories such as hard disk drive (HDD) or solid-state drive (SSD), random access memory (RAM), erasable programmable read-only memory (EPROM), read-only memory (ROM) or portable read-only memory (CD-ROM), etc. Memory is any storage medium that can be used to carry or store program code in the form of instructions or data structures, and can be read and / or written by a computer (such as the communication device shown in the present application), but is not limited thereto. The memory in the embodiment of the present application can also be a circuit or other arbitrarily capable of realizing a storage function, for storing program instructions and / or data.

[0204] The processor 620 is primarily used to process communication protocols and communication data, control the entire communication device, execute software programs, and process software program data. The memory 630 is primarily used to store software programs and data. The transceiver 610 may include control circuitry and an antenna. The control circuitry is primarily used to convert baseband signals into radio frequency signals and process radio frequency signals. The antenna is primarily used to transmit and receive radio frequency signals in the form of electromagnetic waves. Input / output devices, such as a touch screen, display, and keyboard, are primarily used to receive user input and output data to the user.

[0205] When the communication device is powered on, the processor 620 can read the software program in the memory 630, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be sent wirelessly, the processor 620 performs baseband processing on the data to be transmitted and outputs the baseband signal to the radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal and then transmits the radio frequency signal to the outside in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the radio frequency circuit receives the radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor 620. The processor 620 converts the baseband signal into data and processes the data.

[0206] In another implementation, the RF circuit and antenna may be provided independently of the processor performing baseband processing. For example, in a distributed scenario, the RF circuit and antenna may be remotely arranged independent of the communication device.

[0207] The communication device shown in the embodiment of the present application may also have more components than those in Figure 11, and the embodiment of the present application is not limited to this. The method performed by the processor and transceiver shown above is only an example. For the specific steps performed by the processor and transceiver, please refer to the method described above.

[0208] In another possible implementation, in the communication device shown in FIG10 , the processing module 510 may be one or more logic circuits, and the transceiver module 520 may be an input / output interface, or may be called a communication interface, or an interface circuit, or an interface, etc. Alternatively, the transceiver module 520 may be a sending module and a receiving module, the sending module may be an output interface, the receiving module may be an input interface, and the sending module and the receiving module may be integrated into one module, such as an input / output interface. As shown in FIG12 , the communication device 700 shown in FIG12 includes a logic circuit 710 and an interface 720. That is, the processing module 510 may be implemented using a logic circuit 710, and the transceiver module 520 may be implemented using an interface 720. The logic circuit 710 may be a chip, a processing circuit, an integrated circuit, or a system-on-chip (SoC) chip, etc., and the interface 720 may be a communication interface, an input / output interface, a pin, etc. For example, FIG12 is illustrated using the communication device 700 as a chip, and the chip includes a logic circuit 710 and an interface 720.

[0209] In the embodiment of the present application, the logic circuit and the interface can also be coupled to each other. The embodiment of the present application does not limit the specific connection method of the logic circuit and the interface. For example, the logic circuit 710 can be used to execute the functions or steps implemented by the processing module 510 as shown in Figure 10, and the interface 720 can be used to execute the functions or steps implemented by the transceiver module 520 as shown in Figure 10. For a specific description of the logic circuit 710 and the interface 720, please refer to Figure 10 or the method embodiment shown above, and will not be described in detail here.

[0210] The communication device shown in the embodiment of the present application can implement the method provided in the embodiment of the present application in the form of hardware, or can implement the method provided in the embodiment of the present application in the form of software, etc., and the embodiment of the present application is not limited to this.

[0211] An embodiment of the present application further provides a communication system, which includes a first communication device and a second communication device. The first communication device and the second communication device can be used to execute the method in any of the aforementioned embodiments.

[0212] In addition, the present application also provides a computer program, which is used to implement the operations and / or processing performed by each communication device in the method provided by the present application.

[0213] The present application also provides a computer-readable storage medium having computer code stored therein. When the computer code is run on a computer, the computer executes the operations and / or processing performed by each communication device in the method provided by the present application.

[0214] The present application also provides a computer program product, which includes computer code or computer program. When the computer code or computer program is run on a computer, the operations and / or processes performed by the method provided in the present application are executed.

[0215] In the several embodiments provided in this application, it should be understood that the disclosed systems, communication devices, and methods can be implemented in other ways. For example, the communication device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, communication devices or modules, or can be electrical, mechanical or other forms of connection.

[0216] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the technical effects of the solutions provided in the embodiments of the present application.

[0217] In addition, the functional modules in the various embodiments of the present application may be integrated into a processing module, or each module may exist physically separately, or two or more modules may be integrated into a single module. The above-mentioned integrated modules may be implemented in the form of hardware or software functional modules.

[0218] If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a readable storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned readable storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0219] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A communication method, characterized in that Comprising: Determining a parity-check matrix corresponding to a target code length based on a 16×32 base matrix, the base matrix including a plurality of first elements, the first elements corresponding to cyclic shift matrices, a position of a first element in a first base matrix being the same as a position of the first element in a second base matrix, the first base matrix being used to determine a parity-check matrix corresponding to a first code length, the second base matrix being used to determine a parity-check matrix corresponding to a second code length, the target code length including the first code length or the second code length, a first element in a 17th column of the base matrix being zero, an xth element and a 16th element in the 17th column of the base matrix being the same non-zero element, the x being an integer greater than 1 and less than 16; Sending a first piece of information, the first piece of information being encoded based on the parity-check matrix.

2. The method according to claim 1, characterized in that The basis matrix can be expressed as: Or , wherein, The a indicates that there is a z×z cyclic shift identity matrix at a corresponding element position, the z being an expansion factor, and the - indicates a all-zero matrix.

3. The method according to claim 1 or 2, characterized in that, where z is 10, and the base matrix can be expressed as: Or 4. The method according to claim 1 or 2, characterized in that, where z is 20, and the basis matrix can be expressed as: Or 5. The method according to claim 1 or 2, characterized in that, where z is 40, and the base matrix can be expressed as: Or 6. The method according to claim 1 or 2, characterized in that, where z is 60, and the basis matrix can be expressed as: Or 7. The method according to claim 1 or 2, characterized in that, where z is 80, and the basis matrix can be expressed as: Or 8. A communication method, characterized in that, Comprising: Receiving a first piece of information, the first piece of information being encoded based on a parity-check matrix of a target code length; Determining the parity-check matrix based on a 16×32 base matrix, the base matrix including a plurality of first elements, the first elements corresponding to cyclic shift matrices, a position of a first element in a first base matrix being the same as a position of the first element in a second base matrix, the first base matrix being used to determine a parity-check matrix corresponding to a first code length, the second base matrix being used to determine a parity-check matrix corresponding to a second code length, the target code length including the first code length or the second code length, a first element in a 17th column of the base matrix being zero, an xth element and a 16th element in the 17th column of the base matrix being the same non-zero element, the x being an integer greater than 1 and less than 16.

9. The method according to claim 8, characterized in that The base matrix can be expressed as: Or , wherein, The a indicates that there is a z×z cyclic shift identity matrix at a corresponding element position, the z being an expansion factor, and the - indicates a all-zero matrix.

10. The method according to claim 8 or 9, characterized in that, where z is 10, and the base matrix can be expressed as: Or 11. The method according to claim 8 or 9, characterized in that, where z is 20, and the basis matrix can be expressed as: Or 12. The method according to claim 8 or 9, characterized in that, where z is 40, and the base matrix can be expressed as: Or 13. The method according to claim 8 or 9, characterized in that where z is 60, and the base matrix can be expressed as: Or 14. The method according to claim 8 or 9, characterized in that, where z is 80, and the basis matrix can be expressed as: Or 15. A communication device, characterized in that, Comprising a module for performing the method according to any one of claims 1 to 7, or a module for performing the method according to any one of claims 8 to 14.

16. A communication device, characterized in that, Comprising a processor, the processor being used to perform the method according to any one of claims 1 to 14.

17. A communication device, characterized in that, Comprising a logic circuit and an interface, the logic circuit and the interface being coupled; The interface is used to input and / or output information, and the logic circuit is used to perform the method according to any one of claims 1 to 14.

18. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program, and when the computer program is executed, the method according to any one of claims 1 to 14 is executed.

19. A computer program product, characterized in that, When the computer program product is executed, the method according to any one of claims 1 to 14 is executed.

20. A communication system, characterized in that, The communication system includes a first communication device and a second communication device, the first communication device being used to perform the method according to any one of claims 1 to 7, and the second communication device being used to perform the method according to any one of claims 8 to 14.

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