Central processing unit control method and apparatus, and server

Abstract

The present disclosure provides a central processing unit control method and apparatus, and a server. The method may comprise: determining a target physical core corresponding to the current virtual central processing unit, wherein the current virtual central processing unit is a virtual central processing unit in a virtual machine; acquiring virtual configuration information of the current virtual central processing unit, wherein the virtual configuration information is generated on the basis of a user configuration; and updating operation parameters of the target physical core on the basis of the virtual configuration information. The utilization rate of a physical central processing unit is improved.

Description

[0001] Processor Control Method, Device, and Server This disclosure claims priority to Chinese patent application number 202410095175.9, filed with the China Patent Office on January 23, 2024, entitled "Processor Control Method, Device, and Server," the entire contents of which are incorporated herein by reference. Technical Field This disclosure relates to the field of computers, and more particularly to a processor control method, device, and server. Background: A server can run a virtual machine, which can include multiple virtual central processing units (vCPUs). These multiple vCPUs operate based on the physical processors in the server. In related art, for any virtual machine, the performance of the multiple vCPUs in the virtual machine is the same. However, in the above-mentioned approach, because the vCPUs perform different tasks, some vCPUs are extremely busy, reaching their performance limits, while others are relatively idle, wasting some performance. As can be seen from the above, in related art, the overall utilization of the multiple virtual processors is low, which in turn leads to low utilization of the physical processors. SUMMARY OF THE INVENTION Various aspects of the present disclosure provide a processor control method, apparatus, and server for improving physical processor utilization. In a first aspect, embodiments of the present disclosure provide a processor control method, comprising: determining a target physical core corresponding to a current virtual processor, where the current virtual processor is a virtual processor in a virtual machine; obtaining virtual configuration information of the current virtual processor, where the virtual configuration information is generated based on a user configuration; and updating operating parameters of the target physical core based on the virtual configuration information. In one possible implementation, updating the operating parameters of the target physical core based on the virtual configuration information comprises: determining the previous virtual processor corresponding to the target physical core; determining the update status of the current virtual processor, where the update status is either an updated state or a non-updated state; and updating the operating parameters of the target physical core based on the previous virtual processor, the update status, and the virtual configuration information. In one possible implementation, updating the operating parameters of the target physical core according to the previous virtual processor, the update status, and the virtual configuration information includes: if the current virtual processor is different from the previous virtual processor and / or the update status is the updated status, updating the operating parameters of the target physical core according to the virtual configuration information.In one possible implementation, if the current virtual processor is different from the previous virtual processor and / or the update state is the updated state, updating the operating parameters of the target physical core according to the virtual configuration information includes: determining whether the current virtual processor is the same as the previous virtual processor; if so, updating the operating parameters according to the virtual configuration information when the update state is the updated state; if not, updating the operating parameters according to the virtual configuration information. In one possible implementation, determining whether the current virtual processor is the same as the previous virtual processor includes: obtaining a current structure pointer corresponding to the target physical core, the current structure pointer indicating the current virtual processor; obtaining a previous structure pointer corresponding to the target physical core, the previous structure pointer indicating the previous virtual processor; if the current structure pointer and the previous structure pointer are the same, determining that the current virtual processor is the same as the previous virtual processor; if the current structure pointer and the previous structure pointer are different, determining that the current virtual processor is different from the previous virtual processor. In one possible embodiment, the method further includes: when the target physical core stops running the current virtual processor, updating the current structure pointer corresponding to the target physical core to null; and updating the previous structure pointer corresponding to the target physical core to the structure pointer corresponding to the current virtual processor. In one possible embodiment, determining the update status of the current virtual processor includes: obtaining a status bit corresponding to the current virtual processor; if the status bit is a first preset value, determining the update status to be the updated state; and if the status bit is a second preset value, determining the update status to be the unupdated state. In one possible embodiment, after the update status is the updated state and the operating parameters are updated according to the virtual configuration information, the method further includes: setting the status bit to the second preset value. In one possible implementation, after updating the operating parameters of the target physical core according to the previous virtual processor, the update status, and the virtual configuration information, the method further includes: determining a previous physical core corresponding to the current virtual processor, where the previous physical core is a physical core called by the current virtual processor before calling the target physical core; determining whether a virtual processor is running on the previous physical core; and if not, setting the operating parameters of the previous physical core to default operating parameters.In one possible embodiment, the virtual machine is provided with an interactive interface and a register; obtaining virtual configuration information of the current virtual processor includes: reading the virtual configuration information from the register, where the virtual configuration information is written to the register by the virtual machine via the interactive interface. In one possible embodiment, the method further includes: operating the current virtual processor according to the updated operating parameters of the target physical core. In a second aspect, an embodiment of the present disclosure provides a processor control device, the device including: a first determination module, an acquisition module, and an update module, wherein the first determination module is used to determine the target physical core corresponding to the current virtual processor, where the current virtual processor is a virtual processor in the virtual machine; the acquisition module is used to obtain virtual configuration information of the current virtual processor, where the virtual configuration information is generated based on a user configuration; and the update module is used to update the operating parameters of the target physical core according to the virtual configuration information. In one possible embodiment, the update module is specifically configured to: determine the previous virtual processor corresponding to the target physical core; determine the update status of the current virtual processor, where the update status is either updated or not updated; and update the operating parameters of the target physical core based on the previous virtual processor, the update status, and the virtual configuration information. In one possible embodiment, the update module is specifically configured to: if the current virtual processor is different from the previous virtual processor and / or the update status is updated, update the operating parameters of the target physical core based on the virtual configuration information. In one possible embodiment, the update module is specifically configured to: determine whether the current virtual processor is the same as the previous virtual processor; if so, update the operating parameters based on the virtual configuration information if the update status is updated; if not, update the operating parameters based on the virtual configuration information. In one possible implementation, the update module is specifically configured to: obtain a current structure pointer corresponding to the target physical core, where the current structure pointer is used to indicate the current virtual processor; obtain a previous structure pointer corresponding to the target physical core, where the previous structure pointer is used to indicate the previous virtual processor; if the current structure pointer is identical to the previous structure pointer, determine that the current virtual processor is identical to the previous virtual processor; and if the current structure pointer is different from the previous structure pointer, determine that the current virtual processor is different from the previous virtual processor.In one possible implementation, the update module is further configured to: when the target physical core stops running the current virtual processor, update the current structure pointer corresponding to the target physical core to NULL; and update the previous structure pointer corresponding to the target physical core to the structure pointer corresponding to the current virtual processor. In one possible implementation, the update module is configured to: obtain a status bit corresponding to the current virtual processor; if the status bit is a first preset value, determine that the update state is the updated state; if the status bit is a second preset value, determine that the update state is the unupdated state. In one possible implementation, the update module is further configured to: set the status bit to the second preset value. In one possible implementation, the device further includes a second determination module and a setting module. The second determination module is configured to determine the previous physical core corresponding to the current virtual processor, the previous physical core being the physical core called by the current virtual processor before calling the target physical core. The second determination module is further configured to determine whether a virtual processor is running on the previous physical core. If not, the setting module is configured to set the operating parameters of the previous physical core to default operating parameters. In one possible implementation, the virtual machine is provided with an interactive interface and a register. The acquisition module is specifically configured to read the virtual configuration information from the register, the virtual configuration information being written to the register by the virtual machine via the interactive interface. In one possible implementation, the device further includes an execution module, the execution module being configured to execute the current virtual processor according to the updated operating parameters of the target physical core. In a third aspect, an embodiment of the present disclosure provides a server, comprising: a memory and a processor; the memory storing computer-executable instructions; and the processor executing the computer-executable instructions stored in the memory, so that the processor performs any of the methods described in the first aspect. In a fourth aspect, embodiments of the present disclosure provide a computer-readable storage medium storing computer-executable instructions. When executed by a processor, the computer-executable instructions are used to implement any of the methods described in the first aspect. In a fifth aspect, embodiments of the present disclosure provide a computer program product, including a computer program. When executed by a processor, the computer program implements any of the methods described in the first aspect. Embodiments of the present disclosure provide a processor control method, apparatus, and server. The server can determine a target physical core corresponding to a current virtual processor, obtain virtual configuration information of the current virtual processor, and then update operating parameters of the target physical core based on the virtual configuration information.Because the virtual processor runs based on the target physical core, updating the target physical core's operating parameters based on the virtual configuration information allows the target physical core to have different performance, thereby providing different performance for the virtual processors running based on the target physical core. This allows multiple virtual processors to have differentiated performance, effectively utilizing multiple virtual processors, and thus improving the overall utilization of multiple virtual processors, thereby improving the utilization of physical processors. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings described herein are provided to provide a further understanding of the present disclosure and constitute a part of this disclosure. The exemplary embodiments of this disclosure and their descriptions are intended to explain this disclosure and do not constitute undue limitations of this disclosure. In the drawings: FIG1 is a schematic diagram of a scenario provided by an exemplary embodiment of the present disclosure; FIG2 is a flowchart of a processor control method provided by an exemplary embodiment of the present disclosure; FIG3 is a flowchart of another processor control method provided by an exemplary embodiment of the present disclosure; FIG4 is a schematic diagram of a dirty map structure provided by an exemplary embodiment of the present disclosure; FIG5 is an architecture diagram of a server provided by an exemplary embodiment of the present disclosure; FIG6 is a schematic diagram of the structure of a processor control device provided by an exemplary embodiment of the present disclosure; FIG7 is a schematic diagram of the structure of another processor control device provided by an exemplary embodiment of the present disclosure; and FIG8 is a schematic diagram of the structure of a server provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS: It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, storage, and display) involved in this disclosure are all authorized by the user or fully authorized by all parties. The collection, use, and processing of the relevant data must comply with relevant laws, regulations, and standards, and corresponding operation portals are provided for users to choose to authorize or reject. To further clarify the objectives, technical solutions, and advantages of this disclosure, the technical solutions of this disclosure will be described clearly and completely below in conjunction with specific embodiments of this disclosure and the corresponding figures. Obviously, the described embodiments are only some of the embodiments of this disclosure, and are not exhaustive. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure. The technical solutions of this disclosure are implemented based on Intel Speed ​​Select Technology (ISST), a microprocessor power management technology. ISST technology enables performance configuration of physical cores, improving the performance of a target physical core by sacrificing the performance of other physical cores.

[0002] ISST technology primarily includes the following four technologies: 1. Intel® Speed ​​Select Technology Core Power (ISST-CP). ISST-CP allows physical cores to be assigned different priorities. When the load on a physical processor causes its power consumption to exceed its thermal design power (TDP), the highest-priority cores in the processor are prioritized.

[0003] 2. Intel(R) Speed ​​Select Technology Turbo Frequency (ISST-TF): ISST-TF allows you to assign physical cores to different priorities. It controls the frequencies of lower-priority cores within a lower range, while those of higher-priority cores within a higher range. This provides higher turbo frequencies for higher-priority cores, thereby improving the overall performance of multiple cores.

[0004] 3. Intel(R) Speed ​​Select Technology Base Frequency (ISST-BF): ISST-BF increases the base frequency of higher-priority cores and decreases the base frequency of lower-priority cores. The base frequency is the lowest frequency at which a core can operate.

[0005] 4. Intel® Speed ​​Select Technology Perf Profile (ISST-PP) technology supports physical cores operating in different operating modes. For each operating mode, a corresponding profile can be created. This profile can include the physical core's base frequency, thermal design power consumption, and maximum operating temperature. Physical cores can operate in different operating modes according to different profiles. The technical solution of this disclosure implements ISST technology virtualization, providing virtual machines with ISST capabilities. Specifically, by configuring each virtual processor in the virtual machine, the target physical core corresponding to the virtual processor can be configured, resulting in differentiated performance for the target physical core. Figure 1 is a schematic diagram of a scenario provided by an exemplary embodiment of this disclosure. Referring to Figure 1, a server may include at least one physical processor and at least one virtual machine. The physical processor may include multiple physical cores. For example, the physical processor may include 32 physical cores, namely physical core 0, physical core 1, ..., and physical core 31. The virtual machine may include multiple vCPUs. These multiple vCPUs can perform different tasks. For example, virtual machine 1 may include 64 vCPUs, namely vCPU 1, vCPU 2, vCPU 3, and vCPU 63. vCPU 0 and vCPU 1 can be used to perform graphics processing tasks; vCPU 2 and vCPU 3 can be used to perform logging tasks. For any vCPU, the vCPU runs based on the physical cores of the physical processor. For example, vCPU 0 and vCPU 1 can run based on physical core 0; vCPU 2 and vCPU 3 can run based on physical core 1; vCPU 4, vCPU 5, and vCPU 62 can run based on physical core 31. Because different vCPUs are used to perform different tasks, users can configure any vCPU in the virtual machine differently to adjust the vCPU's performance to match the performance required for the task. For example, if in virtual machine 1, vCPU 0 is used to perform graphics processing tasks and the utilization rate of vCPU 0 is 90%; if vCPU 2 is used to perform logging tasks and the utilization rate of vCPU 2 is 30%, the user can configure vCPU 0 in virtual machine 1 to make vCPU 1 have higher performance to better perform graphics processing tasks; and configure vCPU 2 to have lower performance to avoid wasting some performance.In the related art, for any virtual machine, the performance of multiple vCPUs within the virtual machine is identical. However, in the aforementioned approach, because each vCPU performs different tasks, some vCPUs are extremely busy, reaching their performance limits, while others are relatively idle, wasting some performance. Consequently, in the related art, the overall utilization of multiple virtual processors is low, which in turn leads to low utilization of physical processors. In an embodiment of the present disclosure, a server can determine the target physical core corresponding to the current virtual processor and obtain the virtual configuration information of the current virtual processor. The target physical core's operating parameters can then be updated based on the virtual configuration information. Because the virtual processor operates based on the target physical core, updating the target physical core's operating parameters based on the virtual configuration information allows the target physical core to have different performance, thereby providing different performance for the virtual processors operating based on the target physical core. This allows multiple virtual processors to have differentiated performance, effectively utilizing multiple virtual processors, and thus improving the overall utilization of multiple virtual processors and, in turn, the utilization of physical processors. The technical solutions presented in this disclosure are described in detail below through specific embodiments. It should be noted that the following embodiments may exist independently or in combination. Identical or similar content will not be described repeatedly in different embodiments. FIG. 2 is a flowchart of a processor control method provided by an exemplary embodiment of the present disclosure. Referring to FIG. 2 , the method may include:

[0006] 5201. Determine the target physical core corresponding to the current virtual processor. The execution subject of the embodiment of the present disclosure may be a server, or a control device of a processor provided in the server. The control device of the processor may be implemented by software, or by a combination of software and hardware. The control device of the processor may be a processor in the server. For ease of understanding, the following description will be made using the execution subject as an example. The current virtual processor is a virtual processor in a virtual machine. The current virtual processor refers to the virtual processor currently running on the target physical core. Since any virtual processor runs based on a physical core, the target physical core corresponding to the current virtual processor may be determined for the current virtual processor. For example, if the current virtual processor is vCPU0, the target physical core corresponding to vCPU0 may be determined, assuming that the target physical core is physical core 0.

[0007] S202. Obtain virtual configuration information of the current virtual processor. Virtual configuration information refers to the configuration information of the current virtual processor. The virtual configuration information may be generated based on user configuration. Optionally, the virtual configuration information may include information such as the priority, thermal design power consumption, and / or operating frequency of the current virtual processor. Optionally, the virtual machine may have corresponding interaction interfaces and registers, and the virtual configuration information may be written to the registers through the interaction interfaces. For example, the interaction interfaces may include a communication (MailBox) interface and a memory-mapped input / output (MMI0) interface. Optionally, the virtual configuration information may be read from the registers to obtain the virtual configuration information of the current virtual processor. For example, if the current virtual processor is vCPU 0, virtual configuration information 0 may be read from the registers to obtain virtual configuration information 0 of vCPU 0. Virtual configuration information 0 may include information that vCPU 0 has a priority of 1, a thermal design power consumption of 600 W, and an operating frequency of 2000 MHz.

[0008] S203. Update the operating parameters of the target physical core based on the virtual configuration information. In an optional embodiment, the operating parameters of the target physical core can be updated based on the virtual configuration information in the following manner: determine the previous virtual processor corresponding to the target physical core; determine the update status of the current virtual processor; and update the operating parameters of the target physical core based on the previous virtual processor, the update status, and the virtual configuration information. Any physical core can run one vCPU at any time, i.e., it cannot run two vCPUs simultaneously. Therefore, a physical core can run different virtual processors at different times. For example, physical core 0 can run vCPU0 at one time and vCPU1 at a second time, but it cannot run vCPU0 and vCPU1 simultaneously. The previous virtual processor refers to the virtual processor that the target physical core ran before running the current virtual processor. The update status can be either updated or not updated. The update status of the current virtual processor is the update status of the virtual configuration information of the current virtual processor. For example, if the current virtual processor is vCPU0, the virtual configuration information of vCPU0 is virtual configuration information 0, and the update status of virtual configuration information 0 is in the updated state, the update status of the current virtual processor vCPU0 is in the updated state. For example, if the target physical core is physical core 0, assuming that the previous virtual processor corresponding to physical core 0 can be determined to be vCPU2; if the current virtual processor is vCPU0, the update status of vCPU 0 can be determined. Optionally, the operating parameters of the target physical core can be updated based on the previous virtual processor, the update status, and the virtual configuration information in the following manner: If the current virtual processor is different from the previous virtual processor and / or the update status is in the updated state, the operating parameters of the target physical core are updated based on the virtual configuration information. For example, if the target physical core is physical core 0, if the previous virtual processor corresponding to physical core 0 is vCPU 2, and if the current virtual processor is vCPU 0, it can be determined that the current virtual processor is different from the previous virtual processor; and / or, if the update status of the current virtual processor vCPU 0 is the updated state, the operating parameters of physical core 0 can be updated according to the virtual configuration information 0 of vCPU 0.If virtual configuration information 0 may include a priority of 1, a thermal design power consumption of 600 W, and an operating frequency of 2000 MHz for vCPU 0, then the priority of physical core 0 may be set to 1, the thermal design power consumption may be set to 600 W, and the operating frequency may be set to 2000 MHz. After the operating parameters of the target physical core are updated, the target physical core may run the current virtual processor based on the updated operating parameters. The target physical core may provide the current virtual processor with performance that is different from that before the update and different from that of the virtual processors on other physical cores. For example, if the target physical core is physical core 0, after updating the operating parameters of physical core 0, the priority of physical core 0 is 1, the thermal design power is 600W, and the operating frequency is 2000MHz. If the current virtual processor running on physical core 0 is vCPU0, physical core 0 can run vCPU0 based on the updated operating parameters. That is, the priority of vCPU0 can be 1, and a thermal design power of 600W and an operating frequency of 2000MHz can be provided to vCPU0. In the embodiment of the present disclosure, the server can determine the target physical core corresponding to the current virtual processor and obtain the virtual configuration information of the current virtual processor. Then, the operating parameters of the target physical core can be updated based on the virtual configuration information. Because the virtual processor runs based on the target physical core, updating the operating parameters of the target physical core based on the virtual configuration information can enable the target physical core to have different performance, thereby providing different performance to the virtual processors running based on the target physical core. This allows multiple virtual processors to have differentiated performance, effectively utilizing multiple virtual processors, thereby improving the overall utilization of multiple virtual processors and, in turn, improving the utilization of physical processors. The following describes the processor control method in detail based on the embodiment shown in FIG2 and in conjunction with FIG3. FIG3 is a flow chart of another processor control method provided by an exemplary embodiment of the present disclosure. Referring to FIG3, the method may include:

[0009] S301: Determine the target physical core corresponding to the current virtual processor. It should be noted that the execution process of step S301 can refer to step S201 and will not be repeated here.

[0010] 5302. Obtain virtual configuration information of the current virtual processor. Optionally, the virtual machine may be provided with corresponding interactive interfaces and registers, and the virtual configuration information may be written to the registers through the interactive interfaces. Optionally, the interactive interfaces may include a vMailBox interface, a vMMIO interface, a MailBox interface, and an MMIO interface. Among them, the vMailBox interface refers to a virtual MailBox interface, and the vMMIO interface refers to a virtual MMIO interface. The vMailBox interface corresponds to the MailBox interface, and the vMMIO interface corresponds to the MMIO interface. The vMailBox interface and the vMMIO interface are located in user mode, and the MailBox interface and the MMIO interface are located in kernel mode. For the vMailBox interface, the vMailBox interface may have two corresponding registers. For example, the names of the two registers and the corresponding address offsets may be as shown in Table 1: Table 1 Optionally, a vMailBox configuration space may be provided in the memory. The vMailBox configuration space may store the address offsets corresponding to the two registers. The server may determine the address offset in the vMailBox configuration space and access the corresponding register according to the address offset. Regarding the Punit_MailBox_interface register, the Punit_MailBox_interface register may include 32 bits, and the functions of the bits may be as shown in Table 2: Table 2 As shown in Table 2, bits 0 to 7 are used to store specific commands; bits 8 to 15 are used to store subcommands; bits 16 to 28 are used to store parameters; bits 29 to 30 are reserved bits; and bit 31 is the busy bit. Optionally, a busy bit of 0 can indicate that the Punit_MailBox_interface register is not in use and the data in the Punit_MailBox_data register is invalid; a busy bit of 1 can indicate that the Punit_MailBox_interface register is in use and the data in the Punit_MailBox_data register is valid. Optionally, the server can generate configuration operation data, a configuration command, and subcommands of the configuration command in response to a user's configuration operation on the current virtual processor. The server can determine whether the busy bit in the Punit_MailBox_interface register is 0. If it is 1, the server can loop and wait for the busy bit to return to 0. If it is 0, the server can write the configuration operation data to the Punit_MailBox_data register, write the configuration command and its subcommands to the Punit_MailBox_interface register, and update the busy bit to 1. Based on the configuration operation data in the Punit_MailBox_data register, the server can execute the configuration command and its subcommands in the Punit_MailBox_interface register to generate a command return status and virtual configuration information. The server can store the command return status and error code in the Punit_MailBox_interface register and the virtual configuration information in the Punit_MailBox_data register. Optionally, after completing execution of the configuration command and its subcommands, the server can update the busy bit to 0, indicating a complete response. Optionally, the Punit_MailBox_data register and the Punit_MailBox_interface register may also store other data of the current virtual processor. The command return status may be a normal state or an abnormal state. When the command return status is a normal state, the virtual configuration information of the current virtual processor may be obtained by reading the virtual configuration information from the Punit_MailBox_data register. For the vMMI0 interface, the vMMIO interface may have corresponding registers.The registers corresponding to the vMMIO interface can store data such as address offsets and operating parameters for multiple physical cores. For the MailBox interface, the MailBox interface can have multiple corresponding registers; for the MMI0 interface, the MMI0 interface can have multiple corresponding registers. The server can write data from the registers corresponding to the vMailBox interface to the registers corresponding to the MailBox interface; and can write data from the registers corresponding to the vMMI0 interface to the registers corresponding to the MMI0 interface. The server can obtain virtual configuration information from the registers corresponding to the MailBox interface. For example, if the current virtual processor is vCPU0, virtual configuration information 0 can be obtained from the registers corresponding to the MailBox interface to obtain virtual configuration information 0 for vCPU0. Virtual configuration information 0 can include vCPU0's priority of 1, thermal design power consumption of 600W, and operating frequency of 2000MHz.

[0011] S303. Determine the previous virtual processor corresponding to the target physical core. For any target physical core, the target physical core may have a corresponding current structure pointer and a previous structure pointer. Optionally, the current structure pointer may be represented by "current_running_vcpu," and the current structure pointer may be used to indicate the current virtual processor. Optionally, the previous structure pointer may be represented by "last_running_vcpu," and the previous structure pointer may be used to indicate the previous virtual processor. The server may obtain the previous structure pointer corresponding to the target physical core and determine the previous virtual processor corresponding to the target physical core based on the previous structure pointer, that is, the previous virtual processor running on the target physical core. For example, if the target physical core is physical core 0, the previous structure pointer 0 corresponding to physical core 0 may be determined. If the previous structure pointer 0 indicates VCPU 2, it may be determined that the previous virtual processor running on physical core 0 is vCPU 2.

[0012] S304. Determine the update status of the current virtual processor. In an optional embodiment, the update status of the current virtual processor can be determined as follows: obtain a status bit corresponding to the current virtual processor; if the status bit is a first preset value, determine that the update status is updated; if the status bit is a second preset value, determine that the update status is not updated. Optionally, a dirty map structure can be obtained from a kernel-mode KVM emulation device. The dirty map structure can include status bits corresponding to multiple virtual processors, where the status bits corresponding to the virtual processors are status bits corresponding to the virtual configuration information. Optionally, the first preset value can be 1, indicating an updated state; the second preset value can be 0, indicating an unupdated state. The dirty map structure is described below with reference to FIG4 . FIG4 is a schematic diagram of a dirty map structure provided in an exemplary embodiment of the present disclosure. Referring to FIG4 , the dirty map structure can include multiple status bits. If the current virtual processor is vCPU0, the virtual configuration information of vCPU0 is virtual configuration information 0, and if the status bit corresponding to virtual configuration information 0 in the dirty map structure is status bit 0, then vCPU0 corresponds to status bit 0. If status bit 0 is 1, it indicates that the update status of virtual configuration information 0 is the updated state, that is, the update status of vCPU0 is the updated state; if virtual configuration information 1 is the virtual configuration information corresponding to vCPU1, the status bit corresponding to virtual configuration information 1 is status bit 1, and status bit 1 is 0, it indicates that the update status of virtual configuration information 1 is the unupdated state, that is, the update status of vCPU1 is the unupdated state; if virtual configuration information 2 is the virtual configuration information corresponding to vCPU 2, the status bit corresponding to virtual configuration information 2 is status bit 2, and status bit 2 is 1, it indicates that the update status of virtual configuration information 2 is the updated state, that is, the update status of vCPU2 is the updated state.

[0013] S305. Determine whether the current virtual processor is the same as the previous virtual processor. Optionally, the server may determine whether the current virtual processor is the same as the previous virtual processor. If so, it indicates that the target physical core has been running the current virtual processor, and step S306 may be executed. If not, it indicates that the virtual processor running on the target physical core has changed, and step S308 may be executed. In an optional embodiment, determining whether the current virtual processor is the same as the previous virtual processor may be performed as follows: obtaining a current structure pointer corresponding to the target physical core; obtaining a previous structure pointer corresponding to the target physical core; if the current structure pointer and the previous structure pointer are the same, determining that the current virtual processor is the same as the previous virtual processor; if the current structure pointer and the previous structure pointer are different, determining that the current virtual processor is different from the previous virtual processor. For example, if the target physical core is physical core 0, current structure pointer 0 and previous structure pointer 0 corresponding to physical core 0 may be obtained. If the current structure pointer 0 indicates that the current virtual processor is vCPU0 and the previous structure pointer 0 indicates that the previous virtual processor is vCPU0, then it can be determined that the current virtual processor is the same as the previous virtual processor, and step S306 can be executed. If the current structure pointer 0 indicates that the current virtual processor is vCPU0 and the previous structure pointer 0 indicates that the previous virtual processor is vCPU2, then it can be determined that the current virtual processor is different from the previous virtual processor, and step S308 can be executed. 5306: When the update status is updated, the operating parameters are updated according to the virtual configuration information. If the target physical core has been running the current virtual processor, the server can further determine the update status of the current virtual processor. If the update status is updated, the operating parameters can be updated according to the virtual configuration information. If the update status is not updated, it indicates that the user has not performed any operation on the current virtual processor, and there is no need to update the operating parameters of the target physical core. For example, if the target physical core is physical core 0 and the current virtual processor is vCPU 0, the server can determine the update status of vCPU 0 and, when the update status is updated, update the operating parameters of physical core 0 according to virtual configuration information 0 of vCPU 0. If virtual configuration information 0 includes a priority of 1, a thermal design power of 600 W, and an operating frequency of 2000 MHz for vCPU 0, the operating parameters of physical core 0 can be updated to: priority 1, thermal design power of 600 W, and an operating frequency of 2000 MHz according to virtual configuration information 0.

[0014] S307, set the status bit to a second preset value. After the update state is the updated state and the operating parameters are updated according to the virtual configuration information, the status bit corresponding to the current virtual processor can be set to the second preset value, that is, set to 0.

[0015] S308. Update operating parameters based on the virtual configuration information. If the virtual processor running on the target physical core changes, the operating parameters can be updated based on the virtual configuration information of the current virtual processor. For example, if the target physical core is physical core 0, the current virtual processor is vCPU0, and if virtual configuration information 0 includes vCPU0 with a priority of 1, a thermal design power of 600W, and an operating frequency of 2000MHz, then based on virtual configuration information 0, the operating parameters of physical core 0 can be updated to: priority of 1, thermal design power of 600W, and an operating frequency of 2000MHz.

[0016] S309. When the target physical core stops running the current virtual processor, the current structure pointer corresponding to the target physical core is updated to NULL. Since the current structure pointer corresponding to the target physical core is used to indicate the current virtual processor running on the target physical core, and the previous structure pointer is used to indicate the previous virtual processor running on the target physical core, when the target physical core stops running the current virtual processor, that is, when there is no current virtual processor running on the target physical core, the current structure pointer corresponding to the target physical core can be updated to NULL. For example, if the target physical core is physical core 0, and physical core 0 stops running the current virtual processor, the current structure pointer 0 corresponding to physical core 0 can be updated to NULL, that is, current_running_vcpu = NULL.

[0017] 5310. Update the previous structure pointer corresponding to the target physical core to the structure pointer corresponding to the current virtual processor. When the target physical core stops running the current virtual processor, the current virtual processor changes to the previous virtual processor running on the target physical core. Therefore, the previous structure pointer corresponding to the target physical core can be updated to the structure pointer corresponding to the current virtual processor. For example, if the target physical core is physical core 0, and the current virtual processor is vCPU0, the corresponding structure pointer is the vCPU0 pointer. Then, the previous structure pointer 0 of physical core 0 can be updated to the vCPU0 pointer, that is, last_running_vcpu = vcpu00.

[0018] S311. Determine the previous physical core corresponding to the current virtual processor. The previous physical core is the physical core called by the current virtual processor before calling the target physical core. For example, if the current virtual processor is vCPU0 and the target physical core is physical core 0, then vCPU0 was running on physical core 1 before running on physical core 0. In this case, it can be determined that the previous physical core corresponding to the current virtual processor vCPU0 is physical core 1.

[0019] S312. Determine whether a virtual processor is running on the previous physical core. If not, execute step S313. For example, if the previous physical core is physical core 1, determine whether a virtual processor is running on physical core 1.

[0020] S313: Set the operating parameters of the previous physical core to default operating parameters. If it is determined that no virtual processor is running on the previous physical core, the previous physical core can be reset, that is, the operating parameters of the previous physical core can be set to default operating parameters. For example, if the previous physical core is physical core 1, and if it is determined that no virtual processor is running on physical core 1, the operating parameters of physical core 1 can be set to default operating parameters. It should be noted that in the technical solution of the present disclosure, steps S301-S313 only update the operating parameters of the target physical core based on the virtual configuration information of the current virtual processor during the loading phase of the current virtual processor, and do not reset the target physical core when the current virtual processor stops running. The reason is as follows:

[0021] 1. The primary task of the target physical core in the server is to run virtual processors. In other words, virtual processors are the primary users of the target physical core's resources. Although the target physical core has stopped running the current virtual processor, the target physical core's performance has little impact on processing other server tasks. Therefore, as long as the virtual processor running on the target physical core remains unchanged, the target physical core's operating parameters do not need to be set to default.

[0022] 2. Updating the operating parameters of the target physical core based on the virtual configuration information of the current virtual processor incurs a certain amount of overhead. If the operating parameters of the target physical core are restored to the default parameters each time the target physical core stops running the current virtual processor, then the target physical core will also need to update its operating parameters based on the virtual configuration information of the current virtual processor the next time it runs the current virtual processor. Updating and restoring operating parameters to defaults approximately 1,000 times per second incurs an overhead of tens of milliseconds, which is unacceptable for the performance of the target physical core. In the disclosed embodiment, the server can determine the target physical core corresponding to the current virtual processor and obtain the virtual configuration information of the current virtual processor. The server can also determine the previous virtual processor corresponding to the target physical core and the update status of the current virtual processor. The server can then determine whether the current virtual processor is the same as the previous virtual processor. If so, the server can update the operating parameters based on the virtual configuration information if the update status is "updated" and set the status bit to a second preset value. If not, the server can update the operating parameters based on the virtual configuration information. When the target physical core stops running the current virtual processor, the server may also update the current structure pointer corresponding to the target physical core to null and update the previous structure pointer corresponding to the target physical core to the structure pointer corresponding to the current virtual processor. The server may also determine the previous physical core corresponding to the current virtual processor and whether a virtual processor is running on the previous physical core. If not, the operating parameters of the previous physical core may be set to default operating parameters. Because the virtual processor runs based on the target physical core, updating the operating parameters of the target physical core based on virtual configuration information can enable the target physical core to have different performance, thereby providing different performance for the virtual processors running based on the target physical core. This allows for differentiated performance of multiple virtual processors and effectively utilizes multiple virtual processors, thereby improving the overall utilization of multiple virtual processors and, in turn, physical processor utilization. The following describes the architecture of the server based on any of the above embodiments and in conjunction with Figure 5. Figure 5 is an architectural diagram of a server provided by an exemplary embodiment of the present disclosure. As shown in Figure 5, the server may include user mode, kernel mode, and hardware layers. The server may run multiple virtual machines in user mode. Each virtual machine may include multiple virtual processors. For example, virtual machine 0 may include vCPU0-0, vCPU0-1, and vCPU0-63. In user mode, for any virtual machine, the virtual machine may have a corresponding vISST device, where the vISST device refers to a virtual ISST device.The vISST device may include a vMailBox interface and a vMMIO interface. The vISST device may include data structures that record the vISST device status, which are used for virtual machine hot upgrades and hot migrations. For example, for virtual machine 0, virtual machine 0 may have a corresponding vISST-0 device. The vISST-0 device may include a vMailBox-0 interface and a vMMIO-O interface. The vMailBox-0 interface may have corresponding registers, such as the Punit_MailBox_data register and the Punit_MailBox_interface register. The Punit_MailBox_interface register may store configuration commands and subcommands for configuring the current virtual processor of virtual machine 0. The Punit_MailBox_data register may store configuration operation data and / or virtual configuration information obtained after executing configuration commands and subcommands, namely, the virtual configuration information of the current virtual processor of virtual machine 0. The vMMIO-O interface may have corresponding registers, which may store data such as the address offsets of multiple physical cores and operating parameters. The multiple physical cores include the target physical core. In kernel mode, for each vISST device, there can be a corresponding open source hardware virtualization technology (Kernel-based Virtual Machine, KVM) simulation device.

[0023] The KVM emulation device may include a MailBox interface and an MMIO interface. The MailBox interface corresponds to the vMailBox interface, and the MMI0 interface corresponds to the vMMIO interface. The MailBox interface and the vMMIO interface may each have multiple corresponding registers.

[0024] The KVM emulation device and the corresponding vISST device are combined to form an overall interface. For example, for the vISST-0 device, the vISST-0 device can have a corresponding KVM-0 emulation device. The KVM-0 emulation device can include the MailBox-0 interface and the MMIO-0 interface. Through the MailBox-0 interface, virtual configuration information and other data in the registers corresponding to the vMailBox-0 interface can be retrieved and stored in the corresponding registers of the MailBox-0 interface. Through the MMIO-0 interface, data such as the physical core address offset in the registers corresponding to the vMMIO-0 interface can be retrieved and stored in the MMIO-0 interface. In kernel mode, most virtualization operations on the vISST device are implemented, including storage of the vISST device status, operations on the vISST device, and the results of vISST device operations. A server can include multiple physical processors, each of which can include multiple physical cores. For example, physical processor 0 may include physical cores 0-0, 0-1, 0-2, and 0-3. Optionally, the server may obtain the virtual configuration information of the current virtual processor and the address offset of the target physical core from the KVM emulation device (i.e., the MailBox-0 interface and the MMIO-0 interface). The server may locate the target physical core based on the address offset and update the operating parameters of the target physical core based on the virtual configuration information. For example, if the current virtual processor is vCPU 0 and the corresponding target physical core is physical core 0-0 in physical processor 0, the operating parameters of physical core 0-0 may be updated based on the virtual configuration information of vCPU 0. In the disclosed embodiment, the server may determine the target physical core corresponding to the current virtual processor and obtain the virtual configuration information of the current virtual processor, and then update the operating parameters of the target physical core based on the virtual configuration information. Because virtual processors run based on target physical cores, updating the target physical core's operating parameters based on virtual configuration information allows the target physical cores to have different performance, providing different performance for the virtual processors running based on the target physical cores. This allows multiple virtual processors to have differentiated performance, effectively utilizing multiple virtual processors, thereby improving the overall utilization of multiple virtual processors and, in turn, the utilization of physical processors. Figure 6 is a schematic diagram of a processor control device according to an exemplary embodiment of the present disclosure.Referring to Figure 6 , the processor control device 10 includes: a first determination module 11, an acquisition module 12, and an update module 13. The first determination module 11 is configured to determine the target physical core corresponding to the current virtual processor, where the current virtual processor is a virtual processor in a virtual machine; the acquisition module 12 is configured to obtain virtual configuration information of the current virtual processor, where the virtual configuration information is generated based on a user configuration; and the update module 13 is configured to update the operating parameters of the target physical core based on the virtual configuration information. The processor control device provided in the embodiments of the present disclosure can implement the technical solutions shown in the above-mentioned method embodiments. The implementation principles and beneficial effects are similar and are not further described here. In one possible implementation, the update module 13 is specifically configured to: determine the previous virtual processor corresponding to the target physical core; determine the update status of the current virtual processor, where the update status is either updated or not updated; and update the operating parameters of the target physical core based on the previous virtual processor, the update status, and the virtual configuration information. In one possible implementation, the update module 13 is specifically configured to: if the current virtual processor is different from the previous virtual processor and / or the update state is the updated state, update the operating parameters of the target physical core according to the virtual configuration information. In one possible implementation, the update module 13 is specifically configured to: determine whether the current virtual processor is the same as the previous virtual processor; if so, update the operating parameters according to the virtual configuration information when the update state is the updated state; if not, update the operating parameters according to the virtual configuration information. In a possible implementation, the update module 13 is specifically configured to: obtain a current structure pointer corresponding to the target physical core, where the current structure pointer is used to indicate the current virtual processor; obtain a previous structure pointer corresponding to the target physical core, where the previous structure pointer is used to indicate the previous virtual processor; if the current structure pointer is identical to the previous structure pointer, determine that the current virtual processor is identical to the previous virtual processor; if the current structure pointer is different from the previous structure pointer, determine that the current virtual processor is different from the previous virtual processor.In one possible embodiment, the update module 13 is further configured to: when the target physical core stops running the current virtual processor, update the current structure pointer corresponding to the target physical core to null; and update the previous structure pointer corresponding to the target physical core to the structure pointer corresponding to the current virtual processor. In one possible embodiment, the update module 13 is further configured to: obtain a status bit corresponding to the current virtual processor; if the status bit is a first preset value, determine that the update status is the updated state; if the status bit is a second preset value, determine that the update status is the unupdated state. In one possible embodiment, the update module 13 is further configured to: set the status bit to the second preset value. The control device of the processor provided in the embodiment of the present disclosure can implement the technical solution shown in the above-mentioned method embodiment. Its implementation principles and beneficial effects are similar and will not be further described here. Figure 7 is a structural schematic diagram of another control device of a processor provided in an exemplary embodiment of the present disclosure. Referring to FIG. 7 , based on the embodiment shown in FIG. 6 , the processor control device 10 may further include a second determination module 14, a setting module 15, and an operation module 16. The second determination module 14 is configured to determine the previous physical core corresponding to the current virtual processor, where the previous physical core is the physical core called by the current virtual processor before calling the target physical core. The second determination module 14 is also configured to determine whether a virtual processor is running on the previous physical core. If not, the setting module 15 is configured to set the operating parameters of the previous physical core to default operating parameters. The processor control device provided in the embodiments of the present disclosure may implement the technical solutions shown in the above-mentioned method embodiments. The implementation principles and beneficial effects are similar and will not be further described here. In one possible implementation, the virtual machine is provided with an interactive interface and a register. The acquisition module 12 is specifically configured to read the virtual configuration information from the register, where the virtual configuration information is written to the register by the virtual machine via the interactive interface. In one possible implementation, the operation module 16 is configured to operate the current virtual processor according to the updated operating parameters of the target physical core. The processor control device provided in the embodiments of the present disclosure can implement the technical solutions shown in the above-described method embodiments. The implementation principles and beneficial effects are similar and will not be further described here. The exemplary embodiments of the present disclosure provide a schematic structural diagram of a server. See FIG8 . The server 20 may include a processor 21 and a memory 22.Exemplarily, the processor 21 and the memory 22 are interconnected via a bus 23. The memory 22 stores computer-executable instructions; the processor 21 executes the computer-executable instructions stored in the memory 22, causing the processor 21 to perform the method described in the above method embodiment. Accordingly, embodiments of the present disclosure provide a computer-readable storage medium storing computer-executable instructions. When executed by a processor, the computer-executable instructions are used to implement the method described in the above method embodiment. Accordingly, embodiments of the present disclosure may also provide a computer program product comprising a computer program. When executed by a processor, the computer program can implement the method described in the above method embodiment. Those skilled in the art will appreciate that embodiments of the present disclosure may be provided as methods, systems, or computer program products. Therefore, the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present disclosure may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code. The present disclosure is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, such that execution of the instructions by the processor of the computer or other programmable data processing device produces means for implementing the functions specified in one or more processes in the flowcharts and / or one or more blocks in the block diagrams. These computer program instructions can also be stored in a computer-readable memory capable of directing the computer or other programmable data processing device to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means that implement the functions specified in one or more processes in the flowcharts and / or one or more blocks in the block diagrams. These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory. Memory may include non-volatile memory in the form of random access memory (RAM) and / or non-volatile memory such as read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium. Computer-readable media, including both permanent and non-permanent, removable and non-removable media, can implement information storage using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory media such as modulated data signals and carrier waves. It should also be noted that the terms "comprise," "include," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements may include not only those elements but also other elements not expressly listed or inherent to such process, method, article, or apparatus. In the absence of further limitations, elements defined by the phrase "comprising a..." do not preclude the presence of other identical elements in the process, method, product, or device comprising the elements. The foregoing description is merely an embodiment of the present disclosure and is not intended to limit the present disclosure. Persons skilled in the art will readily appreciate that various modifications and variations of the present disclosure are possible. Any modifications, equivalent substitutions, improvements, and the like made within the spirit and principles of the present disclosure are intended to be encompassed by the claims of the present disclosure.

Claims

Claims 1. A control method for a processor, comprising: Determine the target physical core corresponding to the current virtual processor, where the current virtual processor is a virtual processor in a virtual machine; Obtain the virtual configuration information of the current virtual processor, where the virtual configuration information is generated based on user configuration; update the operating parameters of the target physical core according to the virtual configuration information.

2. The method according to claim 1, wherein updating the operating parameters of the target physical core according to the virtual configuration information comprises: Determine the previous virtual processor corresponding to the target physical core; Determine the update status of the current virtual processor, where the update status is an updated status or an unupdated status; Update the operating parameters of the target physical core according to the previous virtual processor, the update status, and the virtual configuration information.

3. The method according to claim 2, updating the operating parameters of the target physical core according to the previous virtual processor, the update status, and the virtual configuration information, including: If the current virtual processor is different from the previous virtual processor, and / or the update status is the updated status, then update the operating parameters of the target physical core according to the virtual configuration information.

4. According to the method described in claim 3, if the current virtual processor is different from the previous virtual processor, and / or the update status is the updated status, then update the operating parameters of the target physical core according to the virtual configuration information, including: Determine whether the current virtual processor is the same as the previous virtual processor; If so, then when the update status is the updated status, update the operating parameters according to the virtual configuration information; if not, then update the operating parameters according to the virtual configuration information.

5. For the method according to claim 4, determining whether the current virtual processor is the same as the previous virtual processor includes: Obtain the current structure pointer corresponding to the target physical core, where the current structure pointer is used to indicate the current virtual processor; Obtain the previous structure pointer corresponding to the target physical core, where the previous structure pointer is used to indicate the previous virtual processor; if the current structure pointer is the same as the previous structure pointer, then determine that the current virtual processor is the same as the previous virtual processor; If the current structure pointer is different from the previous structure pointer, then determine that the current virtual processor is different from the previous virtual processor.

6. The method according to claim 5, wherein the method further comprises: When the target physical core stops running the current virtual processor, update the current structure pointer corresponding to the target physical core to null; And update the previous structure pointer corresponding to the target physical core to the structure pointer corresponding to the current virtual processor.

7. The method according to any one of claims 2-6, determining an update status of the current virtual processor, includes: Obtain the status bit corresponding to the current virtual processor; If the status bit is the first preset value, then determine that the update status is the updated status; [[ID= 8. The method according to claim 7, after the update status is the updated status and the operating parameters are updated according to the virtual configuration information, further comprising: ​ 9. After updating the operating parameters of the target physical core according to the previous virtual processor, the update status, and the virtual configuration information, the method according to any one of claims 2-8 further includes: ​ 10. The method according to any one of claims 1-9, wherein the virtual machine is provided with an interaction interface and a register; obtaining virtual configuration information of the current virtual processor, comprising: ​ 11. The method according to any one of claims 1-10, the method further comprising: ​ 12. A control device for a processor, comprising: A first determination module, an acquisition module, and an update module, wherein the first determination module is configured to determine a target physical core corresponding to a current virtual processor, and the current virtual processor is a virtual processor in a virtual machine; the acquisition module is configured to acquire virtual configuration information of the current virtual processor, and the virtual configuration information is generated based on user configuration; the update module is configured to update operating parameters of the target physical core according to the virtual configuration information.

13. A server, comprising: At least one processor; And a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to cause the server to execute the method according to any one of claims 1-11.

14. A computer-readable storage medium storing computer-executable instructions, which when executed by a processor, implement the method according to any one of claims 1-11.

15. A computer program product comprising a computer program, which when executed by a processor, implements the method according to any one of claims 1-11.

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