Power conversion device

Abstract

The present invention addresses the problem of reducing current distortion without directly controlling a plurality of switches for zero voltage soft switching in a control device. A control device (51) sets a second dead time period between the high-level period of a first control signal to a first switching element (1) and the high-level period of the first control signal to a second switching element (2), said second dead time period being obtained by adding a variable time to a first dead time period. A signal generation circuit (52) generates, for each of a plurality of switches (8), a second control signal having a high-level period corresponding to the second dead time period. A control system (50) is configured to perform, when it is determined that a resonance current passing through each of two or more switches (8) among the plurality of switches (8) flows to a resonance inductor (L1) simultaneously, one of a first control operation and a second control operation on the basis of an overlap period in which the resonance current passing through each of the two or more switches (8) flows simultaneously.

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device, and more particularly to a power conversion device capable of converting DC power into AC power.

[0002] The power conversion device disclosed in Patent Document 1 includes a first DC terminal and a second DC terminal, a power conversion circuit, multiple AC terminals, multiple switches, multiple resonant capacitors, a resonant inductor, a capacitor, and a control device. The power conversion circuit has multiple first switching elements and multiple second switching elements. In the power conversion circuit, multiple switching circuits, each of which has multiple first switching elements and multiple second switching elements connected in series in a one-to-one relationship, are connected in parallel to each other. The multiple switches correspond one-to-one to the multiple switching circuits, and have first ends connected to junctions between the first switching elements and the second switching elements in the corresponding switching circuits and second ends connected in common to a common junction. The first end of the resonant inductor is connected to the common junction. When the control device determines that two-phase resonant currents corresponding to two of the multiple switching circuits simultaneously flow through one resonant inductor, the control device controls to shift the on-periods of the first switching elements and the second switching elements in one of the two switching circuits.

[0003] The power conversion device disclosed in Patent Document 1 can perform soft switching more reliably.

[0004] In the power conversion device disclosed in Patent Document 1, if the control device is configured to generate and output multiple first control signals and multiple second control signals, the control device may become large.

[0005] Furthermore, in the power conversion device disclosed in Patent Document 1, current distortion of the load current flowing through the AC terminal connected to the connection point of the first switching element and the second switching element, which have been controlled to shift the on-period, may become large.

[0006] International Publication No. 2023 / 074636

[0007] An object of the present disclosure is to provide a power conversion device that can reduce current distortion without directly controlling a plurality of switches for zero voltage soft switching in a control device.

[0008] A power conversion device according to one aspect of the present disclosure includes a first DC terminal and a second DC terminal, a power conversion circuit, multiple AC terminals, multiple switches, multiple resonant capacitors, a resonant inductor, a regenerative capacitor, and a control system. The power conversion circuit includes multiple first switching elements and multiple second switching elements. In the power conversion circuit, multiple switching circuits are connected in parallel, each including the multiple first switching elements and the multiple second switching elements connected in series in a one-to-one relationship. In the power conversion circuit, the multiple first switching elements are connected to the first DC terminals, and the multiple second switching elements are connected to the second DC terminals. The multiple AC terminals correspond one-to-one to the multiple switching circuits. Each of the multiple AC terminals is connected to a connection point between the first switching element and the second switching element in the corresponding switching circuit. The multiple switches correspond one-to-one to the multiple switching circuits. Each of the multiple switches has a first end connected to the connection point between the first switching element and the second switching element in the corresponding switching circuit, and a second end connected to a common connection point. The plurality of resonant capacitors correspond one-to-one to the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of the corresponding switch. The resonant inductor has a first end and a second end. The first end of the resonant inductor is connected to the common connection point. The regenerative capacitor has a third end and a fourth end. The third end of the regenerative capacitor is connected to the first DC terminal or the second DC terminal. The fourth end of the regenerative capacitor is connected to the second end of the resonant inductor. The control system includes a control device and a signal generating circuit. The control device provides each of the plurality of first switching elements and the plurality of second switching elements with a first control signal whose potential changes between a high level and a low level. The signal generating circuit provides each of the plurality of switches with a second control signal whose potential changes between a high level and a low level.The control device sets, for each of the plurality of switching circuits, a second dead time period obtained by adding a variable time to a predetermined first dead time period between a high-level period of the first control signal to the first switching element and a high-level period of the first control signal to the second switching element so that on periods of the first switching element and the second switching element do not overlap. The variable time period is determined using at least a current value of a load current corresponding to each of the plurality of switching circuits among a plurality of load currents flowing through each of the plurality of AC terminals, an inductance of the resonant inductor, and a potential at the fourth end of the regenerative capacitor. The signal generating circuit generates, for each of the plurality of switches, the second control signal having a high-level period corresponding to the second dead time period for a corresponding switching circuit among the plurality of switching circuits. The control system is configured to, when it determines that resonant currents passing through two or more of the plurality of switches simultaneously flow through the resonant inductor, perform one of a first control operation and a second control operation based on the overlap period during which the resonant currents passing through the two or more switches simultaneously flow. The first control operation is an operation of shifting a high-level period of the second control signal to at least one of the two or more switches so that resonant currents passing through the two or more switches do not simultaneously flow through the resonant inductor. The second control operation is an operation of shifting a high-level period of the second control signal to at least one of the two or more switches so that the high-level periods of the second control signal to each of the two or more switches overlap by a predetermined period or more in second dead-time periods corresponding to two or more switching circuits connected to the two or more switches among the plurality of switching circuits.

[0009] FIG. 1 is a circuit diagram of a system including a power conversion device according to a first embodiment. FIG. 2 is a circuit block diagram of a signal generating circuit in the power conversion device. FIG. 3 is a diagram illustrating time variations in duty and load current corresponding to voltage commands for each of three phases in an AC load connected to multiple AC terminals of the power conversion device. FIG. 4 is a timing chart illustrating the operation of the power conversion device. FIG. 5 is a timing chart illustrating the operation of the power conversion device. FIG. 6 is a timing chart illustrating the operation of the power conversion device. FIG. 7 is a diagram illustrating the operation of the power conversion device when the U-phase load current is positive. FIG. 8 is a diagram illustrating the operation of the power conversion device during a first period. FIG. 9 is a diagram illustrating the operation of the power conversion device during a second period. FIG. 10 is a diagram illustrating the operation of the power conversion device during a third period. FIG. 11 is a diagram illustrating the operation of the power conversion device when the polarity of the U-phase load current is negative. FIG. 12 is a timing chart illustrating the overlap time when two-phase resonant currents overlap in the power conversion device. FIG. 13 is a timing chart illustrating the operation of the power conversion device according to the first embodiment when the control system performs a first control operation. FIG. 14 is a timing chart illustrating the operation of the power conversion device according to the second embodiment when the control system performs a second control operation. FIG. 15 is a waveform diagram of a load current in the power conversion device according to the first embodiment. FIG. 16 is a circuit diagram of a system including a power conversion device according to a second embodiment. FIG. 17 is a diagram illustrating the operation of the power conversion device according to the first embodiment when the U-phase load current is positive. FIG. 18 is a diagram illustrating the operation of the power conversion device according to the third embodiment when the polarity of the U-phase load current is negative. FIG. 20 is a timing chart illustrating the operation of the power conversion device according to the first embodiment when the control system performs a first control operation. FIG. 21 is a timing chart illustrating the operation of the power conversion device according to the second embodiment when the control system performs a second control operation. FIG. 22 is a timing chart illustrating the operation of the power conversion device according to a third embodiment when the control system performs a first control operation.FIG. 23 is a timing chart for explaining operation when the control system of the power conversion device performs a second control operation. FIG. 24 is a timing chart for explaining operation when the control system of the power conversion device according to embodiment 4 performs a first control operation. FIG. 25 is a timing chart for explaining operation when the control system of the power conversion device according to embodiment 5 performs a second control operation. FIG. 26 is a circuit diagram of a system including a power conversion device according to embodiment 5. FIG. 27 is a diagram explaining operation when the polarity of the U-phase load current of the power conversion device according to embodiment 5 is positive. FIG. 28 is a diagram explaining operation when the polarity of the U-phase load current of the power conversion device according to embodiment 6 is negative. FIG. 30 is a diagram explaining operation when the polarity of the U-phase load current of the power conversion device according to embodiment 6 is positive. FIG. 31 is a diagram explaining operation when the polarity of the U-phase load current of the power conversion device according to embodiment 7 is negative. FIG. 32 is a circuit diagram of a system including a power conversion device according to embodiment 7. FIG. 33 is a circuit diagram of a system including a power conversion device according to embodiment 8. FIG. 34 is a circuit diagram of a system including a power conversion apparatus according to embodiment 9. FIG. 35 is a circuit diagram of a system including a power conversion apparatus according to embodiment 10. FIG. 36 is a circuit diagram of a system including a power conversion apparatus according to embodiment 11. FIG. 37 is a circuit diagram of a system including a power conversion apparatus according to embodiment 12. FIG. 38 is a circuit diagram of a system including a power conversion apparatus according to embodiment 13. FIG. 39 is a timing chart for explaining the operation of a power conversion apparatus according to example 1 when a control system performs a first control operation. FIG. 40 is a timing chart for explaining the operation of a power conversion apparatus according to the same when a control system performs a second control operation. FIG. 41 is a timing chart for explaining the operation of a power conversion apparatus according to example 2 when a control system performs a first control operation. FIG. 42 is a timing chart for explaining the operation of a power conversion apparatus according to the same when a control system performs a second control operation. FIG. 43 is a timing chart for explaining the operation of a power conversion apparatus according to example 3 when a control system performs a first control operation.FIG. 44 is a timing chart for explaining the operation when the control system in the power conversion device performs the second control operation.

[0010] First Embodiment A power conversion device 100 according to a first embodiment will be described below with reference to FIGS.

[0011] (1) Overall Configuration of the Power Conversion Device As shown in FIG. 1 , the power conversion device 100 includes a first DC terminal 31, a second DC terminal 32, and multiple (e.g., three) AC terminals 41. A DC power source E1 is connected between the first DC terminal 31 and the second DC terminal 32, and an AC load RA1 is connected to the multiple AC terminals 41. The AC load RA1 is, for example, a three-phase servo motor. The power conversion device 100 converts DC output from the DC power source E1 into AC power and outputs it to the AC load RA1. The DC power source E1 includes, for example, a solar cell or a fuel cell. The DC power source E1 may also include a DC-DC converter. In the power conversion device 100, when the multiple AC terminals 41 are three AC terminals 41, the AC power is, for example, three-phase AC power having a U phase, a V phase, and a W phase.

[0012] The power conversion device 100 includes a power conversion circuit 11, a plurality of (e.g., three) switches 8, a plurality of (e.g., three) resonant capacitors 9, a resonant inductor L1, a regenerative capacitor 15, and a control system 50. The control system 50 includes a control device 51 and a signal generating circuit 52. Each of the plurality of switches 8 is, for example, a bidirectional switch. The power conversion device 100 also includes a first clamp diode 13 and a second clamp diode 14. The power conversion device 100 also includes a capacitor C10.

[0013] The power conversion circuit 11 has a plurality of (e.g., three) first switching elements 1 and a plurality of (e.g., three) second switching elements 2. In the power conversion circuit 11, a plurality of (e.g., three) switching circuits 10, each having a plurality of first switching elements 1 and a plurality of second switching elements 2 connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit 11, the plurality of first switching elements 1 are connected to first DC terminals 31, and the plurality of second switching elements 2 are connected to second DC terminals 32.

[0014] The plurality of AC terminals 41 correspond one-to-one to the plurality of switching circuits 10. Each of the plurality of AC terminals 41 is connected to a connection point 3 of a first switching element 1 and a second switching element 2 in a corresponding one of the plurality of switching circuits 10.

[0015] The multiple switches 8 correspond one-to-one to the multiple switching circuits 10. Each of the multiple switches 8 has a first end 81 and a second end 82. The first end 81 of each of the multiple switches 8 is connected to a connection point 3 between a first switching element 1 and a second switching element 2 in a corresponding one of the multiple switching circuits 10.

[0016] The plurality of resonance capacitors 9 correspond one-to-one to the plurality of switches 8. Each of the plurality of resonance capacitors 9 is connected between the first end 81 of the corresponding switch 8 among the plurality of switches 8 and the second DC terminal 32.

[0017] The resonant inductor L1 has a first end and a second end, and the first end of the resonant inductor L1 is connected to the second end 82 of a corresponding one of the multiple switches 8 (three switches 8 in this embodiment).

[0018] The regenerative capacitor 15 has a third end 153 and a fourth end 154. In the regenerative capacitor 15, the third end 153 is connected to the second DC terminal 32, and the fourth end 154 is connected to the second end of the resonant inductor L1.

[0019] The control device 51 provides a first control signal to each of the plurality of first switching elements 1 and the plurality of second switching elements 2 .

[0020] The signal generating circuit 52 provides a second control signal to each of the plurality of switches 8 .

[0021] (2) Details of the Power Conversion Device Hereinafter, for convenience of explanation, the switching circuits 10 corresponding to the U phase, V phase, and W phase of the multiple switching circuits 10 may be referred to as switching circuit 10U, switching circuit 10V, and switching circuit 10W, respectively. Hereinafter, the first switching element 1 and the second switching element 2 of switching circuit 10U may be referred to as first switching element 1U and second switching element 2U. Hereinafter, the first switching element 1 and the second switching element 2 of switching circuit 10V may be referred to as first switching element 1V and second switching element 2V. Hereinafter, the first switching element 1 and the second switching element 2 of switching circuit 10W may be referred to as first switching element 1W and second switching element 2W. In the following, the connection point 3 between the first switching element 1U and the second switching element 2U will be referred to as connection point 3U, the connection point 3 between the first switching element 1V and the second switching element 2V will be referred to as connection point 3V, and the connection point 3 between the first switching element 1W and the second switching element 2W will be referred to as connection point 3W. In the following, the AC terminal 41 connected to connection point 3U will be referred to as AC terminal 41U, the AC terminal 41 connected to connection point 3V will be referred to as AC terminal 41V, and the AC terminal 41 connected to connection point 3W will be referred to as AC terminal 41W. In the following, the resonant capacitor 9 connected in parallel to the second switching element 2U will be referred to as resonant capacitor 9U, the resonant capacitor 9 connected in parallel to the second switching element 2V will be referred to as resonant capacitor 9V, and the resonant capacitor 9 connected in parallel to the second switching element 2W will be referred to as resonant capacitor 9W. In the following, the switch 8 connected to connection point 3U may be referred to as switch 8U, the switch 8 connected to connection point 3V may be referred to as switch 8V, and the switch 8 connected to connection point 3W may be referred to as switch 8W.

[0022] In the power conversion device 100, for example, a high-potential output terminal (positive electrode) of the DC power supply E1 is connected to the first DC terminal 31, and a low-potential output terminal (negative electrode) of the DC power supply E1 is connected to the second DC terminal 32. In addition, in the power conversion device 100, for example, a U-phase terminal, a V-phase terminal, and a W-phase terminal of the AC load RA1 are connected to three AC terminals 41U, 41V, and 41W, respectively.

[0023] In the power conversion circuit 11, each of a plurality of (three in the example of FIG. 1 ) first switching elements 1 and a plurality of (three in the example of FIG. 1 ) second switching elements 2 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the plurality of first switching elements 1 and the plurality of second switching elements 2 are connected to a control device 51. In each of the plurality of switching circuits 10 of the power conversion device 100, a first main terminal of the first switching element 1 is connected to a first DC terminal 31, a second main terminal of the first switching element 1 is connected to a first main terminal of the second switching element 2, and a second main terminal of the second switching element 2 is connected to a second DC terminal 32. In each of the plurality of switching circuits 10, the first switching element 1 is a high-side switching element (P-side switching element), and the second switching element 2 is a low-side switching element (N-side switching element). Each of the plurality of first switching elements 1 and the plurality of second switching elements 2 is, for example, an IGBT (Insulated Gate Bipolar Transistor). Therefore, the control terminal, the first main terminal and the second main terminal of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 are the gate terminal, the collector terminal and the emitter terminal, respectively.

[0024] The power conversion circuit 11 further includes a plurality of (three) first diodes 4 connected in anti-parallel to the plurality of (three) first switching elements 1 in a one-to-one relationship, and a plurality of (three) second diodes 5 connected in anti-parallel to the plurality of (three) second switching elements 2 in a one-to-one relationship. In each of the plurality of first diodes 4, the anode of the first diode 4 is connected to the second main terminal (emitter terminal) of the first switching element 1 corresponding to the first diode 4, and the cathode of the first diode 4 is connected to the first main terminal (collector terminal) of the first switching element 1 corresponding to the first diode 4. In each of the plurality of second diodes 5, the anode of the second diode 5 is connected to the second main terminal (emitter terminal) of the second switching element 2 corresponding to the second diode 5, and the cathode of the second diode 5 is connected to the first main terminal (collector terminal) of the second switching element 2 corresponding to the second diode 5.

[0025] A connection point 3U between the first switching element 1U and the second switching element 2U is connected to, for example, a U-phase terminal of an AC load RA1 via an AC terminal 41U. A connection point 3V between the first switching element 1V and the second switching element 2V is connected to, for example, a V-phase terminal of the AC load RA1 via an AC terminal 41V. A connection point 3W between the first switching element 1W and the second switching element 2W is connected to, for example, a W-phase terminal of the AC load RA1 via an AC terminal 41W.

[0026] The plurality of resonant capacitors 9 correspond one-to-one to the plurality of switches 8. Each of the plurality of resonant capacitors 9 is connected between a first end 81 and a second DC terminal 32 of a corresponding switch 8 among the plurality of switches 8. The power conversion device 100 has a plurality of resonant circuits. Each of the plurality of resonant circuits includes a resonant capacitor 9 and a resonant inductor L1.

[0027] In this embodiment, each of the multiple switches 8 has a third switching element 6 and a fourth switching element 7. Each of the multiple (three in the example of FIG. 1 ) third switching elements 6 and the multiple (three in the example of FIG. 1 ) fourth switching elements 7 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the multiple third switching elements 6 and the multiple fourth switching elements 7 are connected to the signal generating circuit 52. Each of the multiple third switching elements 6 and the multiple fourth switching elements 7 is, for example, an IGBT. Therefore, the control terminal, the first main terminal, and the second main terminal of each of the multiple third switching elements 6 and the multiple fourth switching elements 7 are a gate terminal, a collector terminal, and an emitter terminal, respectively. In each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 are connected in anti-series. In each of the multiple switches 8, the first main terminal (collector terminal) of the third switching element 6 and the first main terminal (collector terminal) of the fourth switching element 7 are connected. In each of the switches 8, the second main terminal (emitter terminal) of the third switching element 6 is connected to the connection point 3 of a corresponding one of the switching circuits 10, and the second main terminal (emitter terminal) of the fourth switching element 7 is connected to the resonance inductor L1. Each of the switches 8 further includes a diode 61 connected in anti-parallel to the third switching element 6 and a diode 71 connected in anti-parallel to the fourth switching element 7.

[0028] In the power conversion device 100, the switch 8U is connected to a connection point 3U between the first switching element 1U and the second switching element 2U. The switch 8V is connected to a connection point 3V between the first switching element 1V and the second switching element 2V. The switch 8W is connected to a connection point 3W between the first switching element 1W and the second switching element 2W. Hereinafter, for convenience of explanation, the third switching element 6 and the fourth switching element 7 of the switch 8U will be referred to as the third switching element 6U and the fourth switching element 7U, the third switching element 6 and the fourth switching element 7 of the switch 8V will be referred to as the third switching element 6V and the fourth switching element 7V, and the third switching element 6 and the fourth switching element 7 of the switch 8W will be referred to as the third switching element 6W and the fourth switching element 7W, respectively.

[0029] The multiple switches 8 are controlled by the signal generating circuit 52. In other words, the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W are controlled by the signal generating circuit 52.

[0030] The resonant inductor L1 has a first end and a second end. The first end of the resonant inductor L1 is connected to the second ends 82 of the multiple switches 8. The first end of the resonant inductor L1 is connected to a common connection point 25 to which the second ends 82 of the multiple switches 8 are connected. The second end of the resonant inductor L1 is connected to the fourth end 154 of the regenerative capacitor 15.

[0031] The regenerative capacitor 15 is connected between the second end of the resonant inductor L1 and the second DC terminal 32. The regenerative capacitor 15 is, for example, a film capacitor.

[0032] The control device 51 controls a plurality of first switching elements 1 and a plurality of second switching elements 2. The control device 51 includes a computer system. The computer system is primarily composed of a processor and a memory as hardware. The processor executes a program recorded in the memory of the computer system to realize the functions of the control device 51 in the present disclosure. The processor of the computer system is composed of one or more electronic circuits including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). The integrated circuits, such as ICs and LSIs, are referred to by different names depending on the degree of integration, and include integrated circuits called system LSIs, very large-scale integrations (VLSIs), or ultra-large-scale integrations (ULSIs). Furthermore, field-programmable gate arrays (FPGAs), which are programmed after the LSI is manufactured, or logic devices that can reconfigure the connections within the LSI or reconfigure the circuit partitions within the LSI, can also be used as processors. The electronic circuits may be integrated into a single chip or distributed across multiple chips. The multiple chips may be integrated into one device or distributed across multiple devices. The computer system referred to here includes a microcontroller having one or more processors and one or more memories. Therefore, the microcontroller is also composed of one or more electronic circuits including semiconductor integrated circuits or large-scale integrated circuits.

[0033] The control device 51 outputs first control signals SU1, SV1, and SW1 that control the on / off states of the multiple first switching elements 1U, 1V, and 1W, respectively. Each of the first control signals SU1, SV1, and SW1 is, for example, a PWM (Pulse Width Modulation) signal whose potential level changes between a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. The first switching elements 1U, 1V, and 1W are turned on when the first control signals SU1, SV1, and SW1 are at a high level, and turned off when the first control signals SU1, SV1, and SW1 are at a low level. The control device 51 also outputs first control signals SU2, SV2, and SW2 that control the on / off states of the multiple second switching elements 2U, 2V, and 2W, respectively. Each of the first control signals SU2, SV2, and SW2 is, for example, a PWM signal whose potential level changes between a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. The second switching elements 2U, 2V, and 2W are turned on when the first control signals SU2, SV2, and SW2 are at a high level, and turned off when the first control signals SU2, SV2, and SW2 are at a low level.

[0034] The control device 51 uses a sawtooth-wave carrier signal to generate first control signals SU1, SV1, SW1 corresponding to the multiple first switching elements 1U, 1V, and 1W, respectively, and first control signals SU2, SV2, and SW2 corresponding to the multiple second switching elements 2U, 2V, and 2W, respectively. More specifically, the control device 51 generates the first control signals SU1 and SU2 to be applied to the first switching element 1U and the second switching element 2U, respectively, based on at least the carrier signal and a U-phase voltage command. The control device 51 also generates the first control signals SV1 and SV2 to be applied to the first switching element 1V and the second switching element 2V, respectively, based on at least the carrier signal and a V-phase voltage command. The control device 51 also generates the first control signals SW1 and SW2 to be applied to the first switching element 1W and the second switching element 2W, respectively, based on at least the carrier signal and a W-phase voltage command. The U-phase voltage command, V-phase voltage command, and W-phase voltage command are, for example, sinusoidal signals whose phases differ by 120°, and whose values ​​(voltage command values) change over time. The waveform of the carrier signal is not limited to a sawtooth waveform and may be, for example, a triangular wave. The U-phase voltage command, V-phase voltage command, and W-phase voltage command each have the same cycle length. The U-phase voltage command, V-phase voltage command, and W-phase voltage command each have a longer cycle length T10 (see FIG. 12 ) than the carrier signal cycle length.

[0035] The duty of the first control signals SU1 and SU2 provided by the control device 51 to the first switching element 1U and the second switching element 2U, respectively, varies based on the U-phase voltage command. In FIG. 3, the duty of the first control signal SU1 is shown as the U-phase duty. The control device 51 (see FIG. 1) compares the U-phase voltage command with a carrier signal to generate the first control signal SU1 provided to the first switching element 1U. The control device 51 also inverts the first control signal SU1 provided to the first switching element 1U to generate the first control signal SU2 provided to the second switching element 2U. The control device 51 also sets a first dead time period Td1 (see FIG. 4) between the high-level period of the first control signal SU1 and the high-level period of the first control signal SU2 so that the on periods of the first switching element 1U and the second switching element 2U do not overlap.

[0036] The duty of the first control signals SV1 and SV2 provided by the control device 51 to the first switching element 1V and the second switching element 2V, respectively, varies based on the V-phase voltage command. In FIG. 3, the duty of the first control signal SV1 is shown as the V-phase duty. The control device 51 (see FIG. 1) compares the V-phase voltage command with a carrier signal to generate the first control signal SV1 provided to the first switching element 1V. The control device 51 also inverts the first control signal SV1 provided to the first switching element 1V to generate the first control signal SV2 provided to the second switching element 2V. The control device 51 also sets a first dead time period Td1 (see FIG. 5) between the high-level period of the first control signal SV1 and the high-level period of the first control signal SV2 so that the on periods of the first switching element 1V and the second switching element 2V do not overlap.

[0037] The duty of the first control signals SW1 and SW2 provided by the control device 51 to the first switching element 1W and the second switching element 2W, respectively, varies based on the W-phase voltage command. In FIG. 3, the duty of the first control signal SW1 is shown as the W-phase duty. The control device 51 (see FIG. 1) compares the W-phase voltage command with a carrier signal to generate the first control signal SW1 provided to the first switching element 1W. The control device 51 also inverts the first control signal SW1 provided to the first switching element 1W to generate the first control signal SW2 provided to the second switching element 2W. The control device 51 also sets a first dead time period Td1 (see FIG. 6) between the high-level period of the first control signal SW1 and the high-level period of the first control signal SW2 so that the on periods of the first switching element 1W and the second switching element 2W do not overlap.

[0038] The U-phase voltage command, V-phase voltage command, and W-phase voltage command are, for example, sinusoidal signals whose phases are different from each other by 120°, and whose values ​​change over time. Therefore, the duty of the first control signal SU1 (U-phase duty), the duty of the first control signal SV1 (V-phase duty), and the duty of the first control signal SW1 (W-phase duty) change like sinusoidal waves whose phases are different from each other by 120°, as shown in FIG. 3 . Similarly, the duty of the first control signal SU2, the duty of the first control signal SV2, and the duty of the first control signal SW2 change like sinusoidal waves whose phases are different from each other by 120°.

[0039] The control device 51 generates the first control signals SU1, SU2, SV1, SV2, SW1, and SW2 based on the carrier signal, the voltage commands, and information about the state of the AC load RA1. For example, if the AC load RA1 is a three-phase motor, the information about the state of the AC load RA1 includes, for example, detection values ​​from a plurality of current sensors that detect load currents (output currents) iU, iV, and iW flowing through the U-phase, V-phase, and W-phase of the AC load RA1, respectively.

[0040] The plurality of switches 8, the resonant inductor L1, the plurality of resonant capacitors 9, and the regenerative capacitor 15 are provided to perform zero-voltage soft switching of the plurality of first switching elements 1 and the plurality of second switching elements 2.

[0041] When the third switching element 6U is in the ON state and the fourth switching element 7U is in the OFF state, the switch 8U allows a charging current to pass through the path of the regenerative capacitor 15-resonant inductor L1-switch 8U-resonant capacitor 9U. The charging current is a current that charges the resonant capacitor 9U. When the third switching element 6U is in the OFF state and the fourth switching element 7U is in the ON state, the switch 8U allows a discharging current to pass through the path of the resonant capacitor 9U-switch 8U-resonant inductor L1-regenerative capacitor 15. The discharging current is a current that discharges the charge in the resonant capacitor 9U.

[0042] When the third switching element 6V is in the ON state and the fourth switching element 7V is in the OFF state, the switch 8V allows a charging current to pass through the path of the regenerative capacitor 15-resonant inductor L1-switch 8V-resonant capacitor 9V. The charging current is a current that charges the resonant capacitor 9V. When the third switching element 6V is in the OFF state and the fourth switching element 7V is in the ON state, the switch 8V allows a discharging current to pass through the path of the resonant capacitor 9V-switch 8V-resonant inductor L1-regenerative capacitor 15. The discharging current is a current that discharges the charge of the resonant capacitor 9V.

[0043] When the third switching element 6W is in the ON state and the fourth switching element 7W is in the OFF state, the switch 8W allows a charging current to pass through the path of the regenerative capacitor 15 - resonant inductor L1 - switch 8W - resonant capacitor 9W. The charging current is a current that charges the resonant capacitor 9W. When the third switching element 6W is in the OFF state and the fourth switching element 7W is in the ON state, the switch 8W allows a discharging current to pass through the path of the resonant capacitor 9W - switch 8W - resonant inductor L1 - regenerative capacitor 15. The discharging current is a current that discharges the charge in the resonant capacitor 9W.

[0044] In this embodiment, the control device 51 sets the dead time period between the high-level period of the first control signal to the first switching element 1 and the high-level period of the first control signal to the second switching element 2 for each of the multiple switching circuits 10 to a second dead time period Td2 (see FIGS. 4 to 6) determined by the first dead time period Td1 (see FIGS. 4 to 6) and the variable time Tp1 (see FIGS. 4 to 6). The second dead time period Td2 includes the first dead time period Td1. The second dead time period Td2 has a length obtained by adding the variable time Tp1 (= additional time Tad) to the length of the first dead time period Td1 (the total length of the first dead time period Td1 and the variable time Tp1). From another perspective, the control device 51 sets the second dead time period Td2, which is the first dead time period Td1 extended by the variable time Tp1, as the dead time period.

[0045] The first dead time period Td1 is a period set for each of the multiple switching circuits 10 between a high-level period of the first control signal to the first switching element 1 and a high-level period of the first control signal to the second switching element 2. The first dead time period Td1 is a period during which both the first control signal to the first switching element 1 and the first control signal to the second switching element 2 are low so that the on-periods of the first switching element 1 and the second switching element 2 do not overlap (i.e., there is no period in which both the first switching element 1 and the second switching element 2 are on). The first dead time period Td1 is determined in advance for each of the multiple switching circuits 10 based on the switching characteristics (specified turn-on time and turn-off time) of the first switching element 1 and the second switching element 2, and is stored in the control device 51. In this embodiment, for example, the length of the resonance half cycle corresponding to each of the multiple switches 8 is designed according to the length of the first dead time period Td1 of each of the multiple switching circuits 10. The resonance half period corresponding to each of the multiple switches 8 is half the resonance period, which is the reciprocal of the resonance frequency of the resonance circuit including the switch 8, the resonance inductor L1, and one resonance capacitor 9. Therefore, if the inductance of the resonance inductor L1 is L and the capacitance of the resonance capacitor 9 is C, the resonance half period is π×(L C) １／２ In this embodiment, the length of the resonance half cycle is set to be the same as the length of the first dead time period Td1, for example.

[0046] The length of the resonant half cycle of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9U is set to, for example, the length of the first dead time period Td1 (see FIG. 4) set between the high-level period of the first control signal SU1 and the high-level period of the first control signal SU2. The length of the resonant half cycle of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9V is set to, for example, the length of the first dead time period Td1 (see FIG. 5) set between the high-level period of the first control signal SV1 and the high-level period of the first control signal SV2. The length of the resonant half cycle of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9W is set to the length of the first dead time period Td1 (see FIG. 6) set between the high-level period of the first control signal SW1 and the high-level period of the first control signal SW2.

[0047] If the resonant period is Tres, Tres / 2, which is the resonant half period, is the length of the first dead time period Td1. The end of the resonant half period preferably coincides with the end of the first dead time period Td1 for the switching circuit 10 corresponding to the switch 8. FIG. 4 illustrates the first control signals SU1 and SU2, the second control signals SU6 and SU7, the first dead time period Td1, the variable time Tp1 (additional time Tad), and the second dead time period Td2. In the example of FIG. 4, the start and end of the first dead time period Td1 are time t12 and time t13, respectively. FIG. 5 also illustrates the first control signals SV1 and SV2, the second control signals SV6 and SV7, the first dead time period Td1, the variable time Tp1 (additional time Tad), and the second dead time period Td2. In the example of Fig. 5, the start and end points of the first dead time period Td1 are time t22 and time t23, respectively. Fig. 6 also illustrates the first control signals SW1 and SW2, the second control signals SW6 and SW7, the first dead time period Td1, the variable time Tp1 (additional time Tad), and the second dead time period Td2. In the example of Fig. 6, the start and end points of the first dead time period Td1 are time t32 and time t33, respectively.

[0048] The length of the resonant half cycle described above is an ideal design example, and may be 90% to 110% of the length of the first dead time period Td1. The resonant half cycle and the first dead time period Td1 may have different lengths.

[0049] The second dead time period Td2 is a period obtained by extending the first dead time period Td1 by a variable time Tp1 that depends on the current value of the load current and the potential V15 of the fourth end 154 of the regenerative capacitor 15. The variable time Tp1 is determined, for example, based on the current value of the load current, the potential V15 of the fourth end 154 of the regenerative capacitor 15, and the inductance L of the resonant inductor L1. In the case of basic operation described below, the control device 51 determines, for example, the variable time Tp1 as the additional time Tad. The additional time Tad is determined using the current value of the load current, the potential V15 of the fourth end 154 of the regenerative capacitor 15, and the inductance L of the resonant inductor L1. The current value of the load current is, for example, the result of load current detection by a current sensor or a signal processed value thereof, or an estimated value of the load current iU. The load current detection result or its signal processing value at this time is the detection value at the carrier cycle in which the additional time Tad is added to the first dead time period Td1, or the detection value at the timing closest to that carrier cycle. The estimated load current value at this time is the load current estimated value at the carrier cycle in which the additional time Tad is added to the first dead time period Td1. The inductance L of the resonance inductor L1 is a value pre-stored in the control device 51. The potential V15 at the fourth end 154 of the regenerative capacitor 15 is, for example, a detected value by a voltage detection circuit. In the example of FIG. 4, the additional time Tad is a value calculated by Tad = iU × (L / V15). In the example of FIG. 5, the additional time Tad is a value calculated by Tad = iV × (L / V15). In the example of FIG. 6, the additional time Tad is a value calculated by Tad = iW × (L / V15).

[0050] The length of the variable time Tp1 in the case of basic operation is an ideal design example, and may be 90% or more and 110% or less of the additional time Tad.

[0051] In the power conversion device 100 , a signal generating circuit 52 separate from the control device 51 controls the multiple switches 8 .

[0052] The signal generating circuit 52 generates second control signals SU6, SU7, SV6, SV7, SW6, and SW7 that control the on / off of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively, and outputs these signals to the gate terminals of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively.

[0053] The signal generating circuit 52 generates, for each of the plurality of switches 8, a second control signal having a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the plurality of switching circuits 10.

[0054] The signal generation circuit 52 synchronizes the start of the high-level period of the second control signal generated for each of the multiple switches 8 with the start of the second dead time period Td2. In the present disclosure, "synchronizing the start of the high-level period of the second control signal with the start of the second dead time period Td2" means that the start of the high-level period of the second control signal occurs between the start and end of the second dead time period Td2, and the length of time between the start of the high-level period of the second control signal and the end of the second dead time period Td2 is equal to or longer than the length of the first dead time period Td1. In the first embodiment, the signal generation circuit 52 synchronizes the start of the high-level period of the second control signal for each of the multiple switches 8 with the start of the second dead time period Td2. In the first embodiment, the length of the high-level period of the second control signal for each of the multiple switches 8 is longer than the length of the second dead time period Td2.

[0055] The signal generation circuit 52 generates a second control signal for each of the multiple switches 8 using a first control signal to the first switching element 1 and a first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10. In this embodiment, the signal generation circuit 52 has multiple (six) logic circuits 521 to 526 and multiple (six) gate drive circuits 531 to 536, as shown in Fig. 2. In the signal generation circuit 52, the multiple logic circuits 521 to 526 correspond one-to-one to the multiple gate drive circuits 531 to 536.

[0056] The logic circuit 521 is configured to generate a second control signal SU6 using the first control signal SU1 and the first control signal SU2. The logic circuit 521 is, for example, a two-input, one-output logic circuit, to which the first control signal SU1 and the first control signal SU2 output from the control device 51 are input, and which outputs a second control signal SU6. The second control signal SU6 is provided to the third switching element 6U via the gate drive circuit 531.

[0057] The logic circuit 522 is configured to generate a second control signal SU7 using the first control signal SU1 and the first control signal SU2. The logic circuit 522 is, for example, a two-input, one-output logic circuit, to which the first control signal SU1 and the first control signal SU2 output from the control device 51 are input, and which outputs a second control signal SU7. The second control signal SU7 is provided to the fourth switching element 7U via the gate drive circuit 532.

[0058] The logic circuit 523 is configured to generate a second control signal SV6 using the first control signal SV1 and the first control signal SV2. The logic circuit 523 is, for example, a two-input, one-output logic circuit, to which the first control signal SV1 and the first control signal SV2 output from the control device 51 are input, and which outputs a second control signal SV6. The second control signal SV6 is provided to the third switching element 6V via the gate drive circuit 533.

[0059] The logic circuit 524 is configured to generate a second control signal SV7 using the first control signal SV1 and the first control signal SV2. The logic circuit 524 is, for example, a two-input, one-output logic circuit, to which the first control signal SV1 and the first control signal SV2 output from the control device 51 are input, and which outputs a second control signal SV7. The second control signal SV7 is provided to the fourth switching element 7V via the gate drive circuit 534.

[0060] The logic circuit 525 is configured to generate a second control signal SW6 using the first control signal SW1 and the first control signal SW2. The logic circuit 525 is, for example, a two-input, one-output logic circuit, to which the first control signal SW1 and the first control signal SW2 output from the control device 51 are input, and which outputs a second control signal SW6. The second control signal SW6 is provided to the third switching element 6W via the gate drive circuit 535.

[0061] The logic circuit 526 is configured to generate a second control signal SW7 using the first control signal SW1 and the first control signal SW2. The logic circuit 526 is, for example, a two-input, one-output logic circuit, to which the first control signal SW1 and the first control signal SW2 output from the control device 51 are input, and which outputs a second control signal SW7. The second control signal SW7 is provided to the fourth switching element 7W via the gate drive circuit 536.

[0062] The first clamp diode 13 has an anode connected to the first end of the resonance inductor L1 and a cathode connected to the first DC terminal 31. The second clamp diode 14 has a cathode connected to the first end of the resonance inductor L1 and an anode connected to the second DC terminal 32. Therefore, the second clamp diode 14 is connected in series with the first clamp diode 13.

[0063] The capacitor C10 is connected between the first DC terminal 31 and the second DC terminal 32, and is connected in parallel to the power conversion circuit 11. The capacitor C10 is, for example, an electrolytic capacitor.

[0064] (3) Operation of the Power Conversion Device In the following description, the polarity of current iL1 flowing through resonant inductor L1 will be defined as positive when flowing in the direction of the arrow in Fig. 1, and as negative when flowing in the direction opposite to the direction of the arrow in Fig. 1. Also, in the following description, the polarity of load currents iU, iV, and iW flowing through the U, V, and W phases of AC load RA1 will be defined as positive when flowing in the direction of the arrow in Fig. 1, and as negative when flowing in the direction opposite to the direction of the arrow in Fig. 1. Also, in the following description, the polarity of currents i9U, i9V, and i9W flowing through resonant capacitors 9U, 9V, and 9W will be defined as positive when flowing in the direction of the arrow in Fig. 1, and as negative when flowing in the direction opposite to the direction of the arrow in Fig. 1. Therefore, in the case of a discharge operation in which the resonant capacitors 9U, 9V, and 9W are discharged, the polarity of the currents i9U, i9V, and i9W is positive, and in the case of a charge operation in which the resonant capacitors 9U, 9V, and 9W are charged, the polarity of the currents i9U, i9V, and i9W is negative.

[0065] In the following description, the switching element (the first switching element 1 or the second switching element 2) that is the target of zero voltage soft switching will also be referred to as the target switching element.

[0066] 1 to 11, the basic operation of the zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 is described below. The basic operation is an operation performed when a resonant current passing through two or more of the plurality of switches 8 does not flow simultaneously through the resonant inductor L1. After describing the basic operation, the operation performed when the control device 51 determines that a resonant current passing through two of the plurality of switches 8 will flow simultaneously will be described.

[0067] (3.1) Basic Operation In the power conversion device 100, the target switching element is the first switching element 1 (hereinafter also referred to as the target first switching element 1), and when the polarity of the load current flowing through the AC terminal 41 connected to the target first switching element 1 is positive, the signal generation circuit 52 turns on the third switching element 6 corresponding to the target first switching element 1. As a result, the power conversion device 100 causes the resonant inductor L1 and the resonant capacitor 9 connected to the target first switching element 1 to resonate, charging the resonant capacitor 9 from the regenerative capacitor 15 and setting the voltage across the target first switching element 1 to zero. As a result, the power conversion device 100 can achieve zero-voltage soft switching of the target first switching element 1.

[0068] Furthermore, in the power conversion device 100, when the target switching element is the second switching element 2 (hereinafter also referred to as the target second switching element 2) and the polarity of the load current flowing through the AC terminal 41 connected to the target second switching element 2 is negative, the signal generating circuit 52 turns on the fourth switching element 7 corresponding to the target second switching element 2. As a result, the power conversion device 100 causes the resonant capacitor 9 and the resonant inductor L1 connected to the target second switching element 2 to resonate, discharging the resonant capacitor 9 and setting the voltage across the target second switching element 2 to zero. As a result, the power conversion device 100 can achieve zero-voltage soft switching of the target second switching element 2.

[0069] When the control device 51 sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a variable time Tp1 (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal to the second switching element 2.

[0070] For example, when the control device 51 sets the second dead time period Td2 for the switching circuit 10U, if the polarity of the load current iU is positive, as shown in Figure 7, the control device 51 adds a variable time Tp1 (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal SU2 to the second switching element 2U.

[0071] 7 illustrates the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. Also, in FIG. 7, the voltage value of the DC power supply E1 is illustrated as Vd.

[0072] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 7 , the current iL1 flowing through the resonance inductor L1 starts at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when a variable time Tp1 (additional time Tad) has elapsed since time t11, reaches the same value as the load current iU at time t13, when the second dead-time period Td2 ends, and reaches zero at time t14, when a time Tad2 equal to the additional time Tad has elapsed since time t13. In the signal generating circuit 52, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low, and then changes from high to low at time t14, when the sum of the second dead-time period Td2 and the time Tad2 has elapsed. The current iL1 that flows between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0073] Hereinafter, a period T01 in which the absolute value of the current iL1 increases from zero to the absolute value of the load current (load current iU in the example of FIG. 7 ) will be referred to as a first period T01, a period T02 in which the absolute value of the current iL1 is greater than the load current (load current iU in the example of FIG. 7 ) will be referred to as a second period T02, and a period T03 in which the absolute value of the current iL1 decreases from the absolute value of the load current (load current iU in the example of FIG. 7 ) to zero will be referred to as a third period T03. In the power conversion device 100, when the current iL1 increases from zero to iL1=iU in the first period T01, the first period T01 transitions to a second period T02, and when a resonant current flows in the second period T02 and the first control signal to the target switching element changes from low level to high level, the second period T02 transitions to a third period T03.

[0074] In FIG. 7, the first period T01 is the period from time t11 to time t12. The length of the first period T01 is the same as the additional time Tad. In FIG. 8, the current path of the current iL1 flowing through the resonant inductor L1 during the first period T01 in FIG. 7 is indicated by a bold solid line, and the current path of the load current iU flowing during the first period T01 is indicated by a bold dashed line. During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U. Furthermore, during the first period T01, the load current iU flows through the second diode 5 connected in antiparallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1.

[0075] In FIG. 7 , the second period T02 is the period from time t12 to time t13. The length of the second period T02 is the same as the length of the resonant half cycle. In FIG. 9 , the current path of the current iL1 flowing through the resonant inductor L1 during the second period T02 in FIG. 7 is shown by a bold solid line. During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the OFF state, and the third switching element 6U is in the ON state. During the second period T02, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9.

[0076] In FIG. 7, the third period T03 is the period from time t13 to time t14. The length of the third period T03 is the same as the time Tad2. In FIG. 10, the current path of the current iL1 flowing through the resonant inductor L1 during the third period T03 in FIG. 7 is shown by a thick solid line, and the current path of the load current iU flowing during the third period T03 is shown by a thick dashed line. During the third period T03, the first switching element 1U and the third switching element 6U are each in an ON state, and the second switching element 2U and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, the connection point 3U, and the AC terminal 41U. This reduces the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through a path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U and the AC load RA1.

[0077] When the control device 51 sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a variable time Tp1 (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal to the first switching element 1.

[0078] For example, when the control device 51 sets the second dead time period Td2 for the switching circuit 10U, if the polarity of the load current iU is negative, as shown in Figure 11, the control device 51 adds a variable time Tp1 (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal SU1 to the first switching element 1U.

[0079] 11 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, in FIG. 11, the voltage value of the DC power supply E1 is illustrated as Vd.

[0080] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching. 11 , the current iL1 flowing through the resonant inductor L1 begins at time t41, when the high-level period of the second control signal SU7 begins, reaches the same value as the load current iU at time t42, when the variable time Tp1 (additional time Tad) has elapsed, reaches the same value as the load current iU at time t43, when the second dead time period Td2 ends, and reaches zero at time t44, when the time Tad2, which is the same length as the variable time Tp1, has elapsed from time t43. In the signal generating circuit 52, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0081] 11, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0082] In FIG. 11 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0083] In FIG. 11 , the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are each in an ON state, and the first switching element 1U and the third switching element 6U are each in an OFF state. During the third period T03, the current iL1 flows through the AC terminal 41U, the connection point 3U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0084] Although an example of setting the second dead time period Td2 for the switching circuit 10U has been described above, the same applies to the switching circuit 10V and the switching circuit 10W.

[0085] (3.2) First Control Action and Second Control Action When the control system 50 determines that a resonant current passing through each of two or more switches 8 among the multiple switches 8 flows simultaneously through the resonant inductor L1, the control system 50 performs one of the first control action and the second control action. The control system 50 is configured to perform one of the first control action and the second control action based on an overlap period Tov (see FIGS. 13 and 14 ) during which a resonant current passing through each of the two or more switches 8 flows simultaneously. The phrase “when it is determined that a resonant current passing through each of two or more switches 8 among the multiple switches 8 flows simultaneously” refers to a case where it is estimated in advance that a resonant current passing through each of two or more switches 8 flows simultaneously through the resonant inductor L1.

[0086] The first control operation is an operation of shifting the high-level period of the second control signal to at least one of the two or more switches 8 so that the resonant currents passing through each of the two or more switches 8 do not flow simultaneously through the resonant inductor L1.

[0087] The second control operation is an operation of shifting the high-level period of the second control signal to at least one switch 8 of the two or more switches 8 so that the high-level period of the second control signal to each of the two or more switches 8 overlaps for a predetermined period or more in the second dead time period Td2 corresponding to each of the two or more switching circuits 10 connected to the two or more switches 8 among the plurality of switching circuits 10. The predetermined period is, for example, the entire period of a resonant half cycle of a resonant circuit including the resonant inductor L1 and the two or more resonant capacitors 9 connected to the two or more switches 8, respectively.

[0088] (3.2.1) Determination of whether two-phase resonant currents flow simultaneously In the power conversion device 100, the phases of the voltage commands for three phases (U phase, V phase, and W phase) are shifted by 120° from one another, but the command values ​​of the voltage commands for two phases approach each other by an electrical angle of 60°, and the duties of the first control signals for the two phases approach each other (see regions A1 and A2 in FIG. 3 ). In region A1 in FIG. 3 , the duties of the first control signal for the U phase and the first control signal for the V phase are approximately 0.75. In region A2 in FIG. 3 , the duties of the first control signal for the U phase and the first control signal for the V phase are approximately 0.25. The polarity of the resonant current is the same as the polarity of the current iL1; in region A1, the polarity of the resonant current is positive, and in region A2, the polarity of the resonant current is negative. In the case of region A1, for example, during one cycle T10 (see FIG. 12 ) of the carrier signal, the time difference between the start of the high-level period of the second control signal SU6 supplied to the third switching element 6U (time t11 in FIG. 4 ) and the start of the high-level period of the second control signal SV6 supplied to the third switching element 6V (time t21 in FIG. 5 ) becomes short, and there is a possibility that the U-phase resonant current and the V-phase resonant current will flow simultaneously through the resonant inductor L1. In the power conversion device 100, in the case of region A2, the direction of the resonant current is opposite to that in region A1, but there is a possibility that the U-phase resonant current and the V-phase resonant current will flow simultaneously through the resonant inductor L1.

[0089] Assuming that the capacitance of each of the multiple resonant capacitors 9U, 9V, and 9W is C, if a U-phase current and a V-phase current flow simultaneously through the resonant inductor L1, then in terms of an equivalent circuit, a capacitor having a combined capacitance (=2×C) of the resonant capacitors 9U and 9V is connected in series to the resonant inductor L1. Therefore, in the power conversion device 100, if two-phase currents flow simultaneously through the resonant inductor L1, the resonant frequency of the resonant circuit including the resonant inductor L1 changes compared to when a single-phase current flows through the resonant inductor L1.

[0090] 12, the length of the period corresponding to the first period T01 during the high-level period of the second control signal SU6 is denoted by Tau, the length of the period corresponding to the second period T02 is denoted by Tres / 2, and the length of the period corresponding to the third period T03 is denoted by Tau. Tau is a value determined in the control device 51 by calculating Tau=iU×(L / V15) using, for example, the detection result of the load current iU by the current sensor or its signal processed value, or the estimated value of the load current iU, the inductance L of the resonance inductor L1 that is stored in advance, and the detection result of the potential V15 at the fourth end 154 of the regenerative capacitor 15 (in this embodiment, the detected value of the voltage across the regenerative capacitor 15).

[0091] 12, the length of the period corresponding to the first period T01 during the high-level period of the second control signal SV6 is denoted as Tav, the length of the period corresponding to the second period T02 is denoted as Tres / 2, and the length of the period corresponding to the third period T03 is denoted as Tav. Tav is a value determined in the control device 51 by, for example, calculating Tav=iV×(L / V15) using the detection result of the load current iV by the current sensor or its signal processed value, or the estimated value of the load current iV, the inductance L of the resonance inductor L1 that is stored in advance, and the detection result of the potential V15 at the fourth end 154 of the regenerative capacitor 15.

[0092] In the following description, the length of the period corresponding to the first period T01 during the high-level period of the second control signal SW6 is denoted as Taw, the length of the period corresponding to the second period T02 is denoted as Tres / 2, and the length of the period corresponding to the third period T03 is denoted as Taw. Taw is a value determined in the control device 51 by, for example, calculating Taw=iW×(L / V15) using the detection result of the load current iW by the current sensor or its signal processed value, or the estimated value of the load current iW, the inductance L of the resonance inductor L1 that is stored in advance, and the detection result of the potential V15 of the fourth end 154 of the regenerative capacitor 15.

[0093] The on-period of the first switching element 1U corresponds one-to-one to the high-level period of the first control signal SU1. The on-period of the first switching element 1V corresponds one-to-one to the high-level period of the first control signal SV1. The on-period of the first switching element 1W corresponds one-to-one to the high-level period of the first control signal SW1. Furthermore, the on-period of the second switching element 2U corresponds one-to-one to the high-level period of the first control signal SU2. The on-period of the second switching element 2V corresponds one-to-one to the high-level period of the first control signal SV2. The on-period of the second switching element 2W corresponds one-to-one to the high-level period of the first control signal SW2.

[0094] The control device 51 generates the first control signals SU1, SU2, SV1, SV2, SW1, and SW2, for example, every cycle T10 of the carrier signal (see FIG. 12), and then determines whether or not there is overlap in the resonant currents before controlling the first switching element 1U, the second switching element 2U, the first switching element 1V, the second switching element 2V, the first switching element 1W, and the second switching element 2W.

[0095] (3.2.1.1) In the case of charging operation of the resonance capacitor FIG. 12 is an explanatory diagram of how to calculate the overlap time when the U-phase resonance current and the V-phase resonance current overlap.

[0096] In the power conversion device 100, if the time difference ΔTuv is equal to or greater than Tau + Tav + (Tres / 2), the U-phase resonant current and the V-phase resonant current do not overlap, and if the time difference ΔTuv is less than Tau + Tav + Tres / 2, the U-phase resonant current and the V-phase resonant current overlap. The time difference ΔTuv is the time difference between the start of a high-level period of the first control signal SU1 provided to the first switching element 1U of the switching circuit 10U and the start of a high-level period of the first control signal SV1 provided to the first switching element 1V of the switching circuit 10V. The control device 51 determines the overlap time Tov_uv, during which the U-phase resonant current and the V-phase resonant current overlap, by calculating Tov_uv = Tau + Tav + (Tres / 2) - ΔTuv. The control device 51 estimates that the U-phase resonant current and the V-phase resonant current overlap if Tov_uv > 0. The method for calculating the time difference ΔTuv is not limited to the above example, and may use, for example, the time difference between the end point of the high-level period of the first control signal SU2 given to the second switching element 2U of the switching circuit 10U and the end point of the high-level period of the first control signal SV2 given to the second switching element 2V of the switching circuit 10V.

[0097] Furthermore, in the power conversion device 100, if the time difference ΔTuw is equal to or greater than Tau + Taw + (Tres / 2), the U-phase resonant current and the W-phase resonant current do not overlap, and if the time difference ΔTuw is less than Tau + Taw + (Tres / 2), the U-phase resonant current and the W-phase resonant current overlap. The time difference ΔTuw is the time difference between the start of a high-level period of the first control signal SU1 provided to the first switching element 1U of the switching circuit 10U and the start of a high-level period of the first control signal SW1 provided to the first switching element 1W of the switching circuit 10W. The control device 51 determines the overlap time Tov_uw, during which the U-phase resonant current and the W-phase resonant current overlap, by calculating Tov_uw = Tau + Taw + (Tres / 2) - ΔTuw. The control device 51 estimates that the U-phase resonant current and the W-phase resonant current overlap if Tov_uw > 0. The method for calculating the time difference ΔTuw is not limited to the above example, and may use, for example, the time difference between the end point of the high-level period of the first control signal SU2 and the end point of the high-level period of the first control signal SW2.

[0098] Furthermore, in the power conversion device 100, if the time difference ΔTvw is equal to or greater than Tav + Taw + (Tres / 2), the V-phase resonant current and the W-phase resonant current do not overlap, and if the time difference ΔTvw is less than Tav + Taw + (Tres / 2), the V-phase resonant current and the W-phase resonant current overlap. The time difference ΔTvw is the time difference between the start of a high-level period of the first control signal SV1 provided to the first switching element 1V of the switching circuit 10V and the start of a high-level period of the first control signal SW1 provided to the first switching element 1W of the switching circuit 10W. The control device 51 determines the overlap time Tov_vw, during which the V-phase resonant current and the W-phase resonant current overlap, by calculating Tov_vw = Tav + Taw + (Tres / 2) - ΔTvw. The control device 51 estimates that the V-phase resonant current and the W-phase resonant current overlap if Tov_vw > 0. The method for calculating the time difference ΔTvw is not limited to the above example, and may use, for example, the time difference between the end point of the high-level period of the first control signal SV2 and the end point of the high-level period of the first control signal SW2.

[0099] (3.2.1.2) In the case of discharging operation of the resonant capacitor In the case of discharging operation of the resonant capacitor 9, the control device 51 determines whether two-phase resonant currents flow simultaneously using the same time difference and overlap time as in the case of charging operation of the resonant capacitor 9.

[0100] For example, if the time difference ΔTuv between the start of the high-level period of the first control signal SU2 and the start of the high-level period of the first control signal SV2 is less than Tau + Tav + (Tres / 2), the control device 51 determines that the U-phase resonant current and the V-phase resonant current overlap.

[0101] In addition, the control device 51 determines that the U-phase resonant current and the W-phase resonant current overlap, for example, if the time difference ΔTuw between the start of the high-level period of the first control signal SU2 and the start of the high-level period of the first control signal SW2 is less than Tau + Taw + (Tres / 2).

[0102] In addition, the control device 51 determines that the V-phase resonant current and the W-phase resonant current overlap, for example, if the time difference ΔTvw between the start of the high-level period of the first control signal SV2 and the start of the high-level period of the first control signal SW2 is less than Tav + Taw + (Tres / 2).

[0103] (3.2.2) First control action and second control action when it is determined that two-phase resonant currents flow simultaneously When the control system 50 determines, for example, that the resonant currents passing through the two switches 8 respectively flow simultaneously in the resonant inductor L1, it performs one of the first control action and the second control action based on the overlap period Tov during which the resonant currents passing through the two switches 8 respectively flow simultaneously.

[0104] In the first control operation, the control system 50 shifts the high-level period of the second control signal to one of the two switches 8 so that the resonant currents passing through the two switches 8 do not simultaneously flow through the resonant inductor L1. When performing the first control operation, the control system 50 performs the first control operation so that the length of the second dead time period Td2 between the high-level period of the first control signal provided to the first switching element 1 and the high-level period of the first control signal provided to the second switching element 2 of the two switching circuits 10 corresponding to the two switches 8 does not change.

[0105] In the second control operation, the control system 50 shifts the high-level period of the second control signal to one of the two switches 8 so that the high-level period of the second control signal to each of the two switches 8 overlaps by a predetermined period or more in the second dead-time period Td2 corresponding to each of the two switching circuits 10 connected to the two switches 8 of the multiple (three) switching circuits 10. When performing the second control operation, the control system 50 performs the second control operation so that the length of the second dead-time period Td2 between the high-level period of the first control signal provided to the first switching element 1 and the high-level period of the first control signal provided to the second switching element 2 of the two switching circuits 10 corresponding to the two switches 8 is longer than in the first control operation.

[0106] The control system 50 is configured to perform a control operation that reduces the amount of shift of the second control signal between the first control operation and the second control operation when it is determined that a resonant current flows through two or more of the multiple switches 8 simultaneously through the resonant inductor L1. The control device 51 makes the variable time Tp1 different when the control system 50 performs the first control operation and when it performs the second control operation.

[0107] For ease of explanation, the shift time of the high-level period of the second control signal SU6 or SU7 to the switch 8U when the high-level period of the second control signal SU6 or SU7 is shifted is referred to as Tsu. Furthermore, the shift time of the high-level period of the second control signal SV6 or SV7 to the switch 8V when the high-level period of the second control signal SV6 or SV7 is shifted is referred to as Tsv. Furthermore, the shift time of the high-level period of the second control signal SW6 or SW7 to the switch 8W when the high-level period of the second control signal SW6 or SW7 is shifted is referred to as Tws. Note that the following description will be given assuming that the resonant current flowing through the U-phase switch 8U and the V-phase switch 8V overlap in the resonant inductor L1. However, the same applies to the cases of the U and W phases and the V and W phases.

[0108] (3.2.2.1) Operation for Zero-Voltage Soft Switching of First Switching Element The upper part of Fig. 13 shows a timing chart in the case where the control system 50 has determined in advance that two-phase resonant currents, U-phase and V-phase, will flow simultaneously during a period corresponding to the first region A1 of Fig. 3. Here, the upper part of Fig. 13 shows timing charts of the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SV6, the load currents iU, iV, and the current iL1 before the shift. In the upper part of Fig. 13, the length of the overlap period Tov during which the resonant current (U-phase resonant current) passing through switch 8U and the resonant current (V-phase resonant current) passing through switch 8V simultaneously flows is shorter than the length of the time difference ΔTuv.

[0109] The lower part of Fig. 13 shows a timing chart when the control system 50 performs the first control operation (hereinafter also referred to as "post-shift"). The lower part of Fig. 13 shows timing charts of the first control signals SV1 and SV2, the second control signal SV6, the load currents iU and iV, and the current iL1 after the shift. In the example of Fig. 13, the polarities of the load currents iU and iV flowing through the two AC terminals 41U and 41V connected to the two switches 8U and 8V are positive, and the absolute values ​​of the load current iU and the load current iV are the same. Note that Fig. 13 shows a timing chart for one cycle T10 of the carrier signal (see Fig. 12).

[0110] When performing the first control operation, the control system 50 determines the variable time Tp1 using the current values ​​of the load currents iU, iV, and iW corresponding to each of the multiple switching circuits 10 among the multiple load currents iU, iV, and iW flowing through the multiple AC terminals 41, the inductance of the resonance inductor L1, and the potential V15 at the fourth end 154 of the regenerative capacitor 15. In the example of Fig. 13, when the control system 50 performs the first control operation, the control device 51 determines the variable time Tp1. The control device 51 sets the variable time Tp1 of the second dead time period Td2 corresponding to the U-phase switching circuit 10U to a value calculated by Tp1 = iU × (L / V15), and sets the variable time Tp1 of the second dead time period Td2 corresponding to the V-phase switching circuit 10V to a value calculated by Tp1 = iV × (L / V15).

[0111] In the example of FIG. 13 , when the control system 50 performs the first control operation, it shifts the high-level periods of the first control signals SV1, SV2, and the second control signal SV6 by a shift time Tsv in a direction that delays the high-level periods. The length of the shift time Tsv is the same as the length of the overlap period Tov during which the resonant current (U-phase resonant current) passing through the switch 8U and the resonant current (V-phase resonant current) passing through the switch 8V simultaneously. Tov = Tres / 2 - ΔTuv. Therefore, as shown in the lower part of FIG. 13 , the resonant current passing through the switch 8U and the resonant current passing through the switch 8V do not overlap, enabling zero-voltage soft switching of the first switching element 1U.

[0112] In the power conversion device 100, when the control system 50 performs the first control operation when the condition Tov<ΔTuv is satisfied, the shift time Tsv can be shortened compared to when the control system 50 shifts the high-level period of the second control signal SV6 by the shift time Tsv in the direction of advancing the high-level period when the condition Tov<ΔTuv is satisfied, and the current distortion of the load current iV within one period T10 of the carrier signal (see FIG. 15) is reduced. Note that one period T10 of the carrier signal is shorter than one period of the load current iV and shorter than half the period of the load current iV.

[0113] 13 illustrates an example in which the high-level periods of the first control signals SV1, SV2, and second control signal SV6 for the V phase are shifted later when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, but this is not limiting. For example, when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted earlier. Also, when the end timing of the second dead time period Td2 for the V phase is earlier than the end timing of the second dead time period Td2 for the U phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted later. In addition, if the timing at which the second dead time period Td2 of the V phase ends is earlier than the timing at which the second dead time period Td2 of the U phase ends, the high level periods of the first control signals SV1, SV2 and second control signal SV6 of the V phase may be shifted earlier.

[0114] The upper part of Fig. 14 shows a timing chart for the case where the control system 50 has determined in advance that two-phase resonant currents, U-phase and V-phase, will flow simultaneously during a period corresponding to the first region A1 in Fig. 3. The upper part of Fig. 14 shows timing charts of the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SV6, the load currents iU, iV, and the current iL1 before the shift. In the upper part of Fig. 14, the length of the overlap period Tov during which the resonant current (U-phase resonant current) passing through switch 8U and the resonant current (V-phase resonant current) passing through switch 8V simultaneously flows is longer than the length of the time difference ΔTuv.

[0115] The lower part of Fig. 14 shows a timing chart when the control system 50 performs the second control operation (hereinafter also referred to as "post-shift"). The lower part of Fig. 14 shows timing charts of the first control signals SV1 and SV2, the second control signal SV6, the load currents iU and iV, and the current iL1 after the shift. In the example of Fig. 14, the polarities of the load currents iU and iV flowing through the two AC terminals 41U and 41V connected to the two switches 8U and 8V are positive, and the absolute values ​​of the load current iU and the load current iV are the same. Note that Fig. 14 shows a timing chart for one cycle T10 of the carrier signal (see Fig. 12).

[0116] In the control system 50, when the length of the overlap period Tov is longer than the length of the time difference ΔTuv, the control device 51 synchronizes the U-phase first control signal SU1 with the V-phase first control signal SV1, and synchronizes the U-phase first control signal SU2 with the V-phase first control signal SV2. In the example shown in the lower part of FIG. 14 , the start point of the high-level period of the V-phase first control signal SV1 is shifted forward by a shift time Tsv in the example shown in the upper part of FIG. 14 , thereby synchronizing the U-phase first control signals SU1 and SU2 with the V-phase first control signals SV1 and SV2. In the example shown in FIG. 14 , the shift time Tsv is the time difference ΔTuv between the start point of the high-level period of the first control signal SU1 before the shift and the start point of the high-level period of the first control signal SV1. The time difference ΔTuv may also be the time difference between the end point of the high-level period of the first control signal SU2 and the end point of the first control signal SV2. In addition, in the control system 50, the control device 51 may synchronize the U-phase first control signals SU1 and SU2 with the V-phase first control signals SV1 and SV2 by shifting the high-level periods of the U-phase first control signals SU1 and SU2 in a direction that delays them by the shift time Tsu.

[0117] When the control system 50 performs the second control operation, it determines the variable time Tp1 to be the sum of two or more additional times Tad corresponding to two or more switches 8 one-to-one and the difference between a first resonant half cycle when resonant currents do not flow simultaneously and a second resonant half cycle when resonant currents flow simultaneously. When the control system 50 performs the second control operation, the control device 51 determines the variable time Tp1. Each of the two or more additional times Tad is determined using the current value of the load current flowing through a corresponding switch 8 of the two or more switches 8, the inductance of the resonant inductor L1, and the potential V15 at the fourth end 154 of the regenerative capacitor 15. The first resonant half cycle is half the length of the resonant cycle of a first resonant circuit including the resonant inductor L1 and only one of the multiple resonant capacitors 9. The second resonant half cycle is half the length of the resonant cycle of a second resonant circuit including the resonant inductor L1 and two or more resonant capacitors 9 corresponding to two or more switches 8 of the multiple resonant capacitors 9.

[0118] 14 , the control device 51 calculates the sum of two additional times Tad included in the variable time Tp1 of the second dead time period Td2 corresponding to each of the two switching circuits 10U and 10V using the equation (L×|iU| / V15) + (L×|iV| / V15). When calculating the sum of two or more additional times Tad, the control device 51 uses, for example, detection results of the load currents iU and iV by the current sensors or signal processed values ​​thereof, or estimated values ​​of the load currents iU and iV, the inductance L of the resonance inductor L1 stored in advance, and the detection result of the potential V15 at the fourth end 154 of the regenerative capacitor 15. The equation for calculating the sum of two or more additional times Tad is not limited to (L×|iU| / V15) + (L×|iV| / V15), but may be L×|iU + iV| / V15 or L×|iW| / V15. The control device 51 also calculates the difference between the first and second resonance half cycles as follows: (2 １／２ -1)×Tres / 2. In this embodiment, the first resonant half period is half the resonant period, which is the reciprocal of the resonant frequency of the first resonant circuit including only the switch 8, the resonant inductor L1, and the single resonant capacitor 9. Therefore, if the inductance of the resonant inductor L1 is L, the capacitance of the resonant capacitor 9 is C, and the first resonant half period is Tres / 2, then Tres / 2=π×(L·C) １／２ In this embodiment, the second resonant half period is half the resonant period, which is the reciprocal of the resonant frequency of the first resonant circuit including the switch 8, the resonant inductor L1, and the two resonant capacitors 9. Therefore, when the inductance of the resonant inductor L1 is L and the capacitance of the resonant capacitor 9 is C, the second resonant half period is 2 １／２ ×Tres / 2=2 １／２ ×π×(L C) １／２ In addition, when the three-phase resonant currents overlap, the second resonant half cycle is 3 １／２ ×Tres / 2=3 １／２ ×π×(L C) １／２ In this case, the control device 51 calculates the difference between the first and second resonance half periods as follows: (3 １／２-1)×Tres / 2. The control device 51 calculates the variable time Tp1 after the shift in the second control operation using the following equation: Tp1=Tau+Tav+(difference between the first resonance half period and the second resonance half period).

[0119] The end point of the high level period of the second control signals SU6 and SV6 may be any point after the end point of the resonance half cycle.

[0120] In the power conversion device 100, unless the control system 50 executes the second control operation, the voltages V2u and V2v across the second switching elements 2U and 2V do not rise to Vd when the first control signals SU1 and SV1 change from a low-level period to a high-level period (the end of the second dead-time period Td2 corresponding to the U phase and the V phase, respectively). In other words, unless the control system 50 executes the second control operation, the charging of the resonant capacitors 9U and 9V does not finish when the second dead-time period Td2 corresponding to the U phase and the V phase, respectively, ends. Therefore, unless the control system 50 executes the second control operation, the voltages across the first switching elements 1U and 1V do not decrease to zero when the second dead-time period Td2 corresponding to the U phase and the V phase, respectively, ends. As a result, in the power conversion device 100, the switching of the first switching elements 1U and 1V becomes hard switching.

[0121] In contrast, when the control system 50 executes the second control operation, the voltages V2u and V2v across the second switching elements 2U and 2V rise to Vd at the time when the first control signals SU1 and SV1 change from a low-level period to a high-level period (the end of the second dead-time period Td2 corresponding to the U phase and the V phase, respectively). In other words, when the control system 50 executes the second control operation, charging of the resonant capacitors 9U and 9V ends at the end of the second dead-time period Td2 corresponding to the U phase and the V phase, respectively. For this reason, in the power conversion device 100, when the control system 50 executes the second control operation, the switching of the first switching elements 1U and 1V becomes zero-voltage soft switching.

[0122] Furthermore, when it is determined that the two-phase resonant currents overlap, it is sufficient that at least a portion of the second control signals to the two switches 8 overlap, and there are no limitations on the temporal relationship between the first control signals to the two first switching elements 1 and the relationship between the first control signals to the two second switching elements 2. For example, without being limited to the example in Fig. 14 , the start point of the high-level period of the first control signal SV1 may be earlier than the start point of the high-level period of the first control signal SU1, and the start point of the high-level period of the second control signal SV6 may be earlier than the start point of the high-level period of the second control signal SU6.

[0123] In the power conversion device 100, when the control system 50 performs the second control operation when the condition Tov > ΔTuv is satisfied, the shift time Tsv can be shortened compared to when the control system 50 shifts the high-level period of the first control signal SV1 in the direction of delaying it by the length of the overlap period Tov when the condition Tov > ΔTuv is satisfied, and the current distortion of the load current iV within one period T10 of the carrier signal (see Figure 15) is reduced.

[0124] 14 illustrates an example in which the high-level periods of the first control signals SV1, SV2, and second control signal SV6 for the V phase are shifted earlier when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, but this is not limiting. For example, when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted later. Also, when the end timing of the second dead time period Td2 for the V phase is earlier than the end timing of the second dead time period Td2 for the U phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted earlier. Furthermore, if the timing at which the second dead time period Td2 of the V phase ends is earlier than the timing at which the second dead time period Td2 of the U phase ends, the high level periods of the first control signals SV1, SV2 and second control signal SV6 of the V phase may be shifted to later periods.

[0125] (3.2.2.2) Operation for Zero-Voltage Soft Switching of Second Switching Element When the control system 50 performs zero-voltage soft switching on the second switching element 2, the high-level periods and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before the shift are reversed compared to when performing zero-voltage soft switching on the first switching element 1, and the polarities of the load currents iU, iV and current iL1 are reversed. Furthermore, when the control system 50 performs zero-voltage soft switching on the second switching element 2, it shifts the high-level period of one of the second control signals SU7 and SV7 by the shift time instead of the second control signals SU6 and SV6.

[0126] The control system 50 performs a first control action when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv, and performs a second control action when the length of the overlap period Tov is longer than the length of the time difference ΔTuv.

[0127] In the power conversion device 100, if the control system 50 determines that the U-phase resonant current and the V-phase resonant current flow simultaneously and does not perform either the first control operation or the second control operation, the voltages V2u and V2v across the second switching elements 2U and 2V do not decrease to zero at the time when the first control signals SU2 and SV2 change from a low-level period to a high-level period (the time when the second dead-time periods Td2 corresponding to the U and V phases, respectively, end). In other words, if the control system 50 does not perform either the first control operation or the second control operation, the discharge of the resonant capacitors 9U and 9V does not finish at the time when the second dead-time periods Td2 corresponding to the U and V phases, respectively, end. Therefore, if the control system 50 does not perform either the first control operation or the second control operation, the voltages V2u and V2v across the second switching elements 2U and 2V do not decrease to zero at the time when the second dead-time periods Td2 corresponding to the U and V phases, respectively, end. As a result, in the power conversion device 100, the switching of the second switching elements 2U and 2V becomes hard switching.

[0128] In contrast, when the control system 50 performs the first control operation or the second control operation, the voltages V2u and V2v across the second switching elements 2U and 2V decrease to zero at the point in time when the first control signals SU2 and SV2 change from a low-level period to a high-level period (the point in time when the second dead-time period Td2 corresponding to the U phase and the V phase, respectively, ends). In other words, when the control system 50 performs the first control operation or the second control operation, the discharge of the resonant capacitors 9U and 9V ends at the point in time when the second dead-time period Td2 corresponding to the U phase and the V phase, respectively. For this reason, in the power conversion device 100, when the control system 50 performs the first control operation or the second control operation, the switching of the second switching elements 2U and 2V becomes zero-voltage soft switching.

[0129] (3.3) Operation when it is determined that three-phase resonant currents flow simultaneously The power conversion device 100 according to embodiment 1 performs either the first control operation or the second control operation even when the control system 50 determines that three-phase resonant currents overlap, for both the operation for zero-voltage soft switching of the first switching element 1 and the operation for zero-voltage soft switching of the second switching element 2.

[0130] Below, we will explain the operation for zero-voltage soft switching of the first switching element 1 when it is determined in advance that resonant currents flow simultaneously through three of the multiple switches 8 in the resonant inductor L1.

[0131] When the control system 50 determines that resonant currents passing through three switches 8 out of the plurality of switches 8 simultaneously flow through the resonant inductor L1, it performs either a first control operation or a second control operation on two switches 8 having the same load current polarity based on the overlap period Tov, and further stops the operation of the switch 8 corresponding to the AC terminal 41 of one phase having the opposite load current polarity. "Stopping the operation of the switch 8" means setting the high-level period of the first control signal to zero within one cycle T10 of the carrier signal, thereby setting the high-level period of the second control signal to the switch 8 to zero.

[0132] The phrase "when it is determined that resonant currents flow simultaneously through three switches 8 out of the plurality of switches 8" means when it has been estimated in advance that resonant currents will flow simultaneously through the three switches 8. The control system 50 determines that three-phase resonant currents will flow simultaneously when, for example, all of the time differences ΔTuv, ΔTvw, and ΔTuw are less than a threshold value. When it is determined that resonant currents will flow simultaneously through three switches 8 out of the plurality of switches 8, one of the two switches 8 that correspond one-to-one to two AC terminals 41 having the same load current polarity is designated as a first switch, and the other is designated as a second switch.

[0133] Assuming that the capacitance of each of the multiple resonant capacitors 9U, 9V, and 9W is C, if a U-phase current, a V-phase current, and a W-phase current simultaneously flow through the resonant inductor L1, then in terms of an equivalent circuit, a capacitor having a combined capacitance (=3×C) of the resonant capacitors 9U, 9V, and 9W is connected in series to the resonant inductor L1. Therefore, in the power conversion device 100, if three-phase currents simultaneously flow through the resonant inductor L1, the resonant frequency of the resonant circuit including the resonant inductor L1 will change compared to when a single-phase current flows through the resonant inductor L1, and zero-voltage soft switching may not be achieved.

[0134] In contrast, in the power conversion device 100, if the control system 50 determines in advance that three-phase resonant currents of the U phase, V phase, and W phase will flow simultaneously, it performs the first control operation or the second control operation, thereby realizing zero-voltage soft switching of the two target switching elements corresponding to the two switches 8 and reducing current distortion in the load current (output current) flowing through the AC terminal 41 of one of the two switches 8.

[0135] In the case of an operation for performing zero-voltage soft switching on the second switching element 2, the control system 50 also performs either the first control operation or the second control operation on the two switches 8 having the same load current polarity based on the overlap period Tov, and further stops the operation of the switch 8 corresponding to the AC terminal 41 of one phase having the different load current polarity.

[0136] (4) Advantages In the power conversion device 100 according to the first embodiment, the control system 50 includes a control device 51 and a signal generating circuit 52. The control device 51 provides a first control signal, the potential of which changes between high and low levels, to each of the plurality of first switching elements 1 and the plurality of second switching elements 2. The signal generating circuit 52 provides a second control signal, the potential of which changes between high and low levels, to each of the plurality of switches 8. The control device 51 sets a second dead time period Td2, which is obtained by adding a variable time Tp1 to a predetermined first dead time period Td1, between the high-level period of the first control signal to the first switching element 1 and the high-level period of the first control signal to the second switching element 2 for each of the plurality of switching circuits 10, so that the on-periods of the first switching element 1 and the second switching element 2 do not overlap. The variable time Tp1 is determined using at least the current values ​​of the load currents iU, iV, and iW corresponding to each of the multiple switching circuits 10 among the multiple load currents iU, iV, and iW flowing through the multiple AC terminals 41, the inductance of the resonant inductor L1, and the potential V15 at the fourth end 154 of the regenerative capacitor 15. The signal generating circuit 52 generates, for each of the multiple switches 8, a second control signal having a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10. When the control system 50 determines that resonant currents passing through two or more of the multiple switches 8 simultaneously flow through the resonant inductor L1, the control system 50 performs one of a first control operation and a second control operation based on an overlap period Tov during which the resonant currents passing through the two or more switches 8 simultaneously flow. The first control operation is an operation of shifting the high-level period of the second control signal to at least one of the two or more switches 8 so that the resonant currents passing through the two or more switches 8 do not simultaneously flow through the resonant inductor L1.The second control operation is an operation of shifting the high-level period of the second control signal to at least one switch 8 of the two or more switches 8 so that the high-level period of the second control signal to each of the two or more switches 8 overlaps for a predetermined period or more in the second dead time period Td2 corresponding to each of the two or more switching circuits 10 connected to the two or more switches 8 out of the plurality of switching circuits 10.

[0137] According to the above configuration, it is possible to reduce current distortion without directly controlling the plurality of switches for zero voltage soft switching in the control device 51. More specifically, according to the above configuration, it is not necessary for the control device 51 to generate a second control signal for directly controlling the plurality of switches 8 for zero voltage soft switching. Therefore, it is possible to achieve zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 without directly controlling the plurality of switches 8 in the control device 51, thereby reducing losses in each of the first switching elements 1 and the plurality of second switching elements 2. Furthermore, according to the above configuration, the control system 50 performs one of the first control operation and the second control operation based on the overlap period Tov during which resonant currents flow simultaneously through two or more switches 8, making it possible to reduce current distortion in the load current while achieving zero voltage soft switching.

[0138] Furthermore, in the power conversion device 100 according to the first embodiment, the first switching element 1 or the second switching element 2 that is the target of zero voltage soft switching in one of the two or more switching circuits 10 is set as the first target switching element, and the first switching element 1 or the second switching element 2 that is the target of zero voltage soft switching in one of the two or more switching circuits 10 that is different from the switching circuit 10 that includes the first target switching element is set as the second target switching element, and when the time difference between the start of the high level period of the first control signal to the first target switching element and the start of the high level period of the first control signal to the second target switching element is ΔT, the control system 50 performs a first control operation when the length of the overlap period Tov of the resonant current is less than ΔT, and performs a second control operation when the length of the overlap period Tov of the resonant current is equal to or greater than ΔT.

[0139] According to the above configuration, the amount of shift in the high level period of the first control signal can be reduced, and current distortion can be reduced.

[0140] Furthermore, in the power conversion device 100 according to the first embodiment, when one of the two or more switches 8 is designated as the first switch and the other switch different from the first switch is designated as the second switch, the control system 50, when performing the first control operation, shifts the high-level period of the second control signal to one of the first switch and the second switch so that the resonant current flows through the second switch from the point in time when the current value of the resonant current passing through the first switch reaches an extreme value and coincides with the current value of the load current flowing through the AC terminal 41 corresponding to the first switch among the two or more AC terminals 41.

[0141] According to the above configuration, the amount of shift in the high level period of the second control signal can be reduced, and higher frequencies can be achieved.

[0142] (Embodiment 2) A power conversion device 100A according to embodiment 2 will be described with reference to Figures 16 to 19. Regarding the power conversion device 100A according to embodiment 2, components that are the same as those of the power conversion device 100 according to embodiment 1 (see Figures 1 and 2) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0143] 16 , the power conversion device 100A differs from the power conversion device 100 in that it includes a control system 50A instead of the control system 50 of the power conversion device 100, and a signal generation circuit 52A instead of the signal generation circuit 52 of the power conversion device 100. The control system 50A includes a control device 51 and a signal generation circuit 52A.

[0144] In the power conversion device 100A, a signal generating circuit 52A controls a plurality of switches 8.

[0145] The signal generating circuit 52A generates second control signals SU6, SU7, SV6, SV7, SW6, and SW7 that control the on / off of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively, and outputs these signals to the gate terminals of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively.

[0146] The signal generation circuit 52A generates, for each of the multiple switches 8, a second control signal having a high-level period corresponding to the second dead-time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10. In the second embodiment, the signal generation circuit 52A synchronizes the start of the high-level period of the second control signal to each of the multiple switches 8 with the start of the second dead-time period Td2, and synchronizes the end of the high-level period of the second control signal to each of the multiple switches 8 with the end of the second dead-time period Td2. Therefore, in the second embodiment, the length of the high-level period of the second control signal to each of the multiple switches 8 is the same as the length of the second dead-time period Td2. The signal generation circuit 52A includes multiple logic circuits 521 to 526 and multiple gate drive circuits 531 to 536, similar to the signal generation circuit 52 of the first embodiment (see FIG. 2 ). Since the signal generating circuit 52A synchronizes the end point of the high level period of the second control signal to each of the multiple switches 8 with the end point of the second dead time period Td2, the configuration of the multiple logic circuits 521 to 526 is different from the configuration of the multiple logic circuits 521 to 526 in the signal generating circuit 52.

[0147] (2) Operation (2.1) Basic Operation Fig. 17 shows the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. Also, in Fig. 17, the voltage value of the DC power supply E1 is shown as Vd.

[0148] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 17 , the current iL1 flowing through the resonant inductor L1 begins at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when the variable time Tp1 has elapsed, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and reaches zero at time t14, when the time Tad2, which is the same length as the variable time Tp1, has elapsed since time t13. In the signal generating circuit 52A, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low. The current iL1 flowing between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 to the resonant capacitor 9U via the resonant inductor L1.

[0149] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in Fig. 8. Also, during the first period T01, the load current iU flows through the path passing through the second diode 5 connected in anti-parallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1, as in Fig. 8.

[0150] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are each in an OFF state, and the third switching element 6U is in an ON state. During the second period T02, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, as in Fig. 9, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9U.

[0151] During the third period T03, the first switching element 1U is in an ON state, and the second switching element 2U, the third switching element 6U, and the fourth switching element 7U are each in an OFF state. In FIG. 18, the current path of the current iL1 flowing through the resonant inductor L1 during the third period T03 in FIG. 17 is shown by a bold solid line, and the current path of the load current iU flowing during the third period T03 is shown by a bold dashed line. During the third period T03, the first switching element 1U is in an ON state, and the second switching element 2U, the third switching element 6U, and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, and the first clamp diode 13. This reduces the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through a path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U and the AC load RA1.

[0152] When the control device 51 sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a variable time Tp1 to the first dead time period Td1 by shortening the high-level period of the first control signal to the first switching element 1.

[0153] For example, when the control device 51 sets the second dead time period Td2 for the switching circuit 10U, if the polarity of the load current iU is negative, as shown in Figure 19, the control device 51 adds the variable time Tp1 to the first dead time period Td1 by shortening the high-level period of the first control signal SU1 to the first switching element 1U by the same amount as the variable time Tp1.

[0154] 19 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, in FIG. 19, the voltage value of the DC power supply E1 is illustrated as Vd.

[0155] In the switching circuit 10U, when the target switching element is the second switching element 2U, the voltage V1u across the first switching element 1U becomes Vd at time t43, which is the end of the second dead time period Td2 immediately before the high-level period of the first control signal SU2, and the voltage V2u across the second switching element 2U becomes zero at time t43, which is the end of the second dead time period Td2. Therefore, when the first control signal SU2 changes from low to high at time t43, the second switching element 2U undergoes zero-voltage soft switching. In the example of FIG. 19 , the current iL1 flowing through the resonant inductor L1 begins at time t41, when the high-level period of the second control signal SU7 begins, becomes the same value as the load current iU at time t42, when the variable time Tp1 has elapsed, becomes the same value as the load current iU at time t43, when the second dead time period Td2 ends, and becomes zero at time t44, when the variable time Tp1 has elapsed from time t43. In the signal generating circuit 52A, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0156] 19, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0157] In FIG. 19 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0158] In FIG. 19 , the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U is in the ON state, and the first switching element 1U, the third switching element 6U, and the fourth switching element 7U are each in the OFF state. During the third period T03, the current iL1 flows through the second clamp diode 14, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0159] Although an example of setting the second dead time period Td2 for the switching circuit 10U has been described above, the same applies to the switching circuit 10V and the switching circuit 10W.

[0160] (2.2) First control operation and second control operation In the following, an example is given of a case in which, in the control system 50, the control device 51 estimates that the resonant current flowing through the resonant inductor L1 and the U-phase switch 8U and the resonant current flowing through the V-phase switch 8V overlap, but the same is true for the cases of the U-phase and W-phase, and the V-phase and W-phase.

[0161] (2.2.1) Operation for Zero-Voltage Soft-Switching of First Switching Element With regard to the operation of the power conversion device 100A according to the second embodiment, the operation for zero-voltage soft-switching of the first switching element 1 will be described with reference to Figs. 20 and 21. Since Figs. 20 and 21 can be viewed in the same way as Figs. 13 and 14, respectively, the description thereof will be omitted.

[0162] The control system 50A performs a first control operation when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv. In the example of FIG. 20, the length of the time difference ΔTuv is longer than the length of the overlap period Tov. When performing the first control operation, the control system 50A shifts the high-level periods of the first control signals SV1, SV2, and the second control signal SV6 in a later direction. In the example of FIG. 20, the control system 50A shifts the start point of the high-level period of the first control signal SV1 in a later direction by a shift time Tsv. The length of the shift time Tsv is the same as the length of the overlap period Tov.

[0163] In the power conversion device 100A according to the second embodiment, the control system 50A performs the first control operation, thereby eliminating the overlap period Tov between the U-phase resonant current and the V-phase resonant current as shown in FIG. 20, and enabling zero-voltage soft switching of the first switching elements 1U and 1V.

[0164] 20 illustrates an example in which the high-level periods of the first control signals SV1, SV2, and second control signal SV6 for the V phase are shifted later when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, but this is not limiting. For example, when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted earlier. Also, when the end timing of the second dead time period Td2 for the V phase is earlier than the end timing of the second dead time period Td2 for the U phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted later. In addition, if the timing at which the second dead time period Td2 of the V phase ends is earlier than the timing at which the second dead time period Td2 of the U phase ends, the high level periods of the first control signals SV1, SV2 and second control signal SV6 of the V phase may be shifted earlier.

[0165] The control system 50A performs a second control action when the length of the overlap period Tov is longer than the length of the time difference ΔTuv.

[0166] In the example of Figure 21, the length of the overlap period Tov is longer than the length of the time difference ΔTuv. When performing the second control operation, the control system 50A shifts the high-level period of the first control signal SV1 in an earlier direction. In the example of Figure 21, the control system 50A shifts the start point of the high-level period of the first control signal SV1 in an earlier direction by a shift time Tsv. The length of the shift time Tsv is the same as the length of the time difference ΔTuv. The control device 51 calculates the variable time Tp1 after the shift in the second control operation using the equation Tp1 = Tau + Tav + (the difference between the first resonant half cycle and the second resonant half cycle).

[0167] In the power conversion device 100A of embodiment 2, the control system 50A performs the second control operation, thereby enabling zero-voltage soft switching of the first switching elements 1U, 1V, similar to when the control system 50 performs the second control operation in the power conversion device 100 of embodiment 1.

[0168] 21 illustrates an example in which the high-level periods of the first control signals SV1, SV2, and second control signal SV6 for the V phase are shifted earlier when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, but this is not limiting. For example, when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted later. Also, when the end timing of the second dead time period Td2 for the V phase is earlier than the end timing of the second dead time period Td2 for the U phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted earlier. Furthermore, if the timing at which the second dead time period Td2 of the V phase ends is earlier than the timing at which the second dead time period Td2 of the U phase ends, the high level periods of the first control signals SV1, SV2 and second control signal SV6 of the V phase may be shifted to later periods.

[0169] (2.2.2) Operation for Zero-Voltage Soft Switching of Second Switching Element When the control system 50A performs zero-voltage soft switching on the second switching element 2, the high-level and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before the shift are reversed compared to when the control system 50A performs zero-voltage soft switching on the first switching element 1, and the polarities of the load currents iU, iV, and current iL1 are reversed. Furthermore, when the control system 50A performs zero-voltage soft switching on the second switching element 2, the control system 50A shifts the high-level period of one of the second control signals SU7 and SV7 by the shift time, instead of the second control signals SU6 and SV6. To achieve this shift, the control system 50A shifts the first control signal corresponding to the second control signal whose high-level period is shifted.

[0170] In the power conversion device 100A according to the second embodiment, the control system 50A performs either the first control operation or the second control operation, thereby completing the discharge of the resonant capacitors 9U, 9V at the end of the second dead time period Td2 corresponding to each of the U phase and the V phase. Therefore, in the power conversion device 100A, when the control system 50A performs the first control operation or the second control operation, the switching of the second switching elements 2U, 2V becomes zero-voltage soft switching.

[0171] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100A according to the second embodiment can reduce current distortion without directly controlling the plurality of switches 8 for zero voltage soft switching in the control device 51. Furthermore, the power conversion device 100A according to the second embodiment can realize zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2, and can reduce losses in each of the first switching element 1 and the plurality of second switching elements 2.

[0172] Third Embodiment (1) Circuit Configuration of Power Conversion Device The circuit configuration of a power conversion device 100A according to the third embodiment is the same as that of the power conversion device 100A according to the second embodiment (see FIG. 16), and therefore will not be illustrated or described again.

[0173] (2) Operation of the Power Converter (2.1) Basic Operation The basic operation of the power converter 100A is the same as that of the power converter 100A according to the second embodiment, and therefore a description thereof will be omitted.

[0174] (2.2) First control operation and second control operation In the following, an example is given of a case where the control device 51 of the control system 50A estimates that the resonant current flowing through the U-phase switch 8U and the resonant current flowing through the V-phase switch 8V overlap in the resonant inductor L1, but the same applies to the cases of the U-phase and W-phase, and the V-phase and W-phase.

[0175] (2.2.1) Operation for Zero-Voltage Soft-Switching of First Switching Element With regard to the operation of the power conversion device 100A according to the third embodiment, the operation for zero-voltage soft-switching of the first switching element 1 will be described with reference to Figs. 22 and 23. Since Figs. 22 and 23 can be interpreted in the same way as Figs. 13 and 14, respectively, the explanation thereof will be omitted.

[0176] The control system 50A performs the first control operation when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv. In the example of FIG. 22, the length of the time difference ΔTuv is longer than the length of the overlap period Tov. When performing the first control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. In the example of FIG. 22, the control system 50A shifts the start point of the high-level period of the first control signal SU1 by a shift time Tsu in an earlier direction, and shifts the start point of the high-level period of the first control signal SV1 by a shift time Tsv in a later direction. The length of the shift time Tsu is equal to the length of Tov / 2. Furthermore, the length of the shift time Tsv is equal to the length of Tov / 2.

[0177] In the power conversion device 100A according to the third embodiment, the control system 50A performs the first control operation, thereby eliminating the overlap period Tov between the U-phase resonant current and the V-phase resonant current as shown in FIG. 22, and enabling zero-voltage soft switching of the first switching elements 1U and 1V.

[0178] 22 illustrates an example in which the control system 50A advances the start of the high-level period of the first control signal SU1 and delays the start of the high-level period of the first control signal SV1 when the start timing of the high-level period of the first control signal SU1 is earlier than the start timing of the high-level period of the first control signal SV1, but the operation of the control system 50A is not limited to this example. For example, when the start timing of the high-level period of the first control signal SU1 is later than the start timing of the high-level period of the first control signal SV1, the control system 50A delays the start of the high-level period of the first control signal SU1 and advances the start of the high-level period of the first control signal SV1.

[0179] The control system 50A performs a second control action when the length of the overlap period Tov is longer than the length of the time difference ΔTuv.

[0180] In the example of FIG. 23 , the length of the time difference ΔTuv is shorter than the length of the overlap period Tov. When performing the second control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. Therefore, the control system 50A shifts the high-level periods of the second control signals SU6 and SV6 in opposite directions. In the example of FIG. 23 , the control system 50A shifts the start point of the high-level period of the first control signal SU1 by a shift time Tsu in a later direction. Furthermore, the control system 50A shifts the start point of the high-level period of the control signal SV1 by a shift time Tsv in an earlier direction. The length of the shift time Tsu is equal to the length of ΔTuv / 2. Furthermore, the length of the shift time Tsv is equal to the length of ΔTuv / 2. The control device 51 calculates the variable time Tp1 after the shift in the second control operation using the following equation: Tp1=Tau+Tav+(difference between the first resonance half period and the second resonance half period).

[0181] In the power conversion device 100A of embodiment 3, the control system 50A performs the second control operation, thereby enabling zero-voltage soft switching of the first switching elements 1U, 1V, similar to when the control system 50A performs the second control operation in the power conversion device 100A of embodiment 2.

[0182] 23 illustrates an example in which the control system 50A delays the start of the high-level period of the first control signal SU1 and advances the start of the high-level period of the first control signal SV1 when the start timing of the high-level period of the first control signal SU1 is earlier than the start timing of the high-level period of the first control signal SV1, but the operation of the control system 50A is not limited to this example. For example, when the start timing of the high-level period of the first control signal SU1 is later than the start timing of the high-level period of the first control signal SV1, the control system 50A advances the start of the high-level period of the first control signal SU1 and delays the start of the high-level period of the first control signal SV1.

[0183] (2.2.2) Operation for Zero-Voltage Soft Switching of the Second Switching Element When the control system 50A performs zero-voltage soft switching on the second switching element 2, the high-level and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before the shift are reversed compared to when the control system 50A performs zero-voltage soft switching on the first switching element 1, and the polarities of the load currents iU, iV, and current iL1 are reversed. Furthermore, when the control system 50A performs zero-voltage soft switching on the second switching element 2, the control system 50A shifts the high-level period of one of the second control signals SU7 and SV7 by the shift time instead of the second control signals SU6 and SV6. To achieve this shift, the control system 50A shifts the first control signal corresponding to the second control signal whose high-level period is shifted. Therefore, the control system 50A shifts the high-level periods of the second control signals SU7 and SV7 in opposite directions.

[0184] In the power conversion device 100A according to the third embodiment, the control system 50A performs either the first control operation or the second control operation, thereby completing the discharge of the resonant capacitors 9U, 9V at the end of the second dead time period Td2 corresponding to each of the U phase and the V phase. Therefore, in the power conversion device 100A, when the control system 50A performs the first control operation or the second control operation, the switching of the second switching elements 2U, 2V becomes zero-voltage soft switching.

[0185] (3) Advantages As with the power conversion device 100A according to the second embodiment, the power conversion device 100A according to the third embodiment can reduce current distortion without directly controlling the plurality of switches 8 for zero voltage soft switching in the control device 51. According to the power conversion device 100A according to the third embodiment, there is no need to generate a second control signal for directly controlling the plurality of switches 8 for zero voltage soft switching in the control device 51. Therefore, it is possible to realize zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 without directly controlling the plurality of switches 8 in the control device 51, and it is possible to reduce losses in each of the first switching element 1 and the plurality of second switching elements 2.

[0186] Furthermore, in the power conversion device 100A according to the third embodiment, when the control system 50A performs the first control operation, the high-level periods of the second control signals to the two switches 8 are shifted in opposite directions, and the lengths of the shift times of the high-level periods of the two second control signals are made the same. Therefore, compared to the first embodiment, current distortion of the load current of each phase can be reduced, and variation can also be reduced.

[0187] Furthermore, in the power conversion device 100A according to the third embodiment, when the control system 50A performs the second control operation, the high-level periods of the second control signals to the two switches 8 are shifted in opposite directions, and the lengths of the shift times of the high-level periods of the two second control signals are made the same. Therefore, compared to the first embodiment, current distortion of the load current of each phase can be reduced, and variation can also be reduced.

[0188] (Fourth Embodiment) (1) Circuit Configuration of Power Conversion Device The circuit configuration of a power conversion device 100A according to the fourth embodiment is the same as that of the power conversion device 100A according to the second embodiment (see FIG. 16), and therefore will not be illustrated or described.

[0189] (2) Operation of the Power Converter (2.1) Basic Operation The basic operation of the power converter 100A is the same as that of the power converter 100A according to the second embodiment, and therefore a description thereof will be omitted.

[0190] (2.2) First control operation and second control operation In the following, an example is given of a case where it is estimated that the resonant current flowing through the U-phase switch 8U and the resonant current flowing through the V-phase switch 8V overlap in the resonant inductor L1, but the same is true for the cases of the U-phase and W-phase, and the V-phase and W-phase.

[0191] (2.2.1) Operation for Zero-Voltage Soft-Switching of First Switching Element With regard to the operation of the power conversion device 100A according to the fourth embodiment, the operation for zero-voltage soft-switching of the first switching element 1 will be described with reference to Figures 24 and 25. Since the interpretations of Figures 24 and 25 are the same as those of Figures 13 and 14, respectively, the explanations thereof will be omitted.

[0192] The control system 50A performs the first control operation when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv. In the example of FIG. 24 , the length of the time difference ΔTuv is longer than the length of the overlap period Tov. When performing the first control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. Accordingly, the control system 50A shifts the high-level period of the second control signal SU6 and the high-level period of the second control signal SV6 in opposite directions. In the example of FIG. 24 , the control system 50A advances the start point of the high-level period of the first control signal SU1 by a shift time Tsu. Furthermore, the control system 50A delays the start point of the high-level period of the first control signal SV1 by a shift time Tsv. When Tov = Ta + Tb, the length of the shift time Tsu is Tov × Tb / (Ta + Tb). The length of the shift time Tsv is equal to the length of Tov×Ta / (Ta+Tb), where Ta and Tb can each be set to any value.

[0193] In the power conversion device 100A according to the fourth embodiment, the control system 50A performs the first control operation, thereby eliminating the overlap period Tov between the U-phase resonant current and the V-phase resonant current before the shift, as shown in the waveform of the post-shift current iL1 shown in the lower part of Figure 24, and enabling zero-voltage soft switching of the first switching elements 1U and 1V.

[0194] The control system 50A performs a second control action when the length of the overlap period Tov is longer than the length of the time difference ΔTuv.

[0195] In the example of FIG. 25 , the length of the time difference ΔTuv is shorter than the length of the overlap period Tov. When performing the second control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. Accordingly, the control system 50A shifts the high-level period of the second control signal SU6 and the high-level period of the second control signal SV6 in opposite directions. The control system 50A shifts the end point of the high-level period of the second control signal SU6, whose high-level period has an earlier phase by a shift time Tsu within one cycle T10 of the carrier signal (see FIG. 12 ), and shifts the end point of the high-level period of the second control signal SV6, whose high-level period has a later phase, by a shift time Tsv in an earlier direction. Accordingly, the control system 50A shifts the start point of the high-level period of the first control signal SU1 in a later direction by a shift time Tsu. Furthermore, the control system 50A shifts the start point of the high-level period of the first control signal SV1 earlier by a shift time Tsv. The length of the shift time Tsu is √2×Tres / 4−Tov×Tb / (Ta+Tb). The length of the shift time Tsv is Tov×Tb / (Ta+Tb)+ΔTuv−√2×Tres / 4. The control device 51 calculates the variable time Tp1 after the shift in the second control operation using the following equation: Tp1=Tau+Tav+(difference between the first resonant half cycle and the second resonant half cycle).

[0196] In the power conversion device 100A of embodiment 4, the control system 50A performs the second control operation, thereby enabling zero-voltage soft switching of the first switching elements 1U, 1V, similar to when the control system 50A performs the second control operation in the power conversion device 100A of embodiment 2.

[0197] (2.2.2) Operation for Zero-Voltage Soft-Switching of Second Switching Element When the control system 50A soft-switches the second switching element 2, the high-level and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before the shift are reversed compared to when the control system 50A soft-switches the first switching element 1, and the polarities of the load currents iU, iV, and current iL1 are reversed. Furthermore, when the control system 50A soft-switches the second switching element 2, it shifts the high-level period of one of the second control signals SU7 and SV7 by the shift time instead of the second control signals SU6 and SV6. To achieve this shift, it shifts the first control signal corresponding to the second control signal whose high-level period is shifted.

[0198] In the power conversion device 100A according to the fourth embodiment, the control system 50A performs either the first control operation or the second control operation, thereby completing the discharge of the resonant capacitors 9U, 9V at the end of the second dead time period Td2 corresponding to each of the U phase and the V phase. Therefore, in the power conversion device 100A, when the control system 50A performs the first control operation or the second control operation, the switching of the second switching elements 2U, 2V becomes zero-voltage soft switching.

[0199] (3) Advantages In the power conversion device 100A according to the fourth embodiment, similarly to the power conversion device 100A according to the second embodiment, the control system 50A performs one of the first control operation and the second control operation based on the overlap period Tov during which the resonant currents flow simultaneously through the two or more switches 8, thereby making it possible to reduce current distortion. According to the power conversion device 100A according to the fourth embodiment, the control device 51 does not need to generate the second control signal for directly controlling the multiple switches 8 for zero voltage soft switching. Therefore, it is possible to realize zero voltage soft switching of each of the multiple first switching elements 1 and the multiple second switching elements 2 without directly controlling the multiple switches 8 in the control device 51, and it is possible to reduce losses in each of the first switching elements 1 and the multiple second switching elements 2.

[0200] Furthermore, in the power conversion device 100A according to the fourth embodiment, when the control system 50A performs the first control operation, the high-level periods of the second control signals sent to the two switches 8 are shifted in opposite directions. This reduces current distortion and variation in the load current of each phase compared to the first embodiment.

[0201] Furthermore, in the power conversion device 100A according to the fourth embodiment, when the control system 50A performs the second control operation, the high-level periods of the second control signals sent to the two switches 8 are shifted in opposite directions. This reduces current distortion and variation in the load current of each phase compared to the first embodiment.

[0202] Fifth Embodiment A power conversion device 100B according to a fifth embodiment will be described with reference to Figures 26 to 28. Regarding the power conversion device 100B according to the fifth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Figure 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0203] 26 , the power conversion apparatus 100B differs from the power conversion apparatus 100 in that it includes a control system 50B instead of the control system 50 of the power conversion apparatus 100, and a control device 51B instead of the control device 51 of the power conversion apparatus 100. The control system 50B includes the control device 51B and a signal generating circuit 52.

[0204] In the power conversion device 100B, the control device 51B, like the control device 51, generates first control signals SU1, SU2, SV1, SV2, SV2, SW1, and SW2 to control multiple first switching elements 1 and multiple second switching elements 2.

[0205] When setting the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, the control device 51B advances the end point of the high-level period of the first control signal to the second switching element 2 and delays the start point of the high-level period of the first control signal to the first switching element 1, thereby lengthening the first dead time period Td1 by a variable time Tp1. If the time by which the end point of the high-level period of the first control signal to the second switching element 2 is advanced is Ta21 (see FIG. 27 ) and the time by which the start point of the high-level period of the first control signal to the first switching element 1 is delayed is Ta11 (see FIG. 27 ), then the variable time Tp1 is Ta11 + Ta21, i.e., Ta11 = Ta21 = 0.5 × Tp1.

[0206] When setting the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, the control device 51B advances the end point of the high-level period of the first control signal to the first switching element 1 and delays the start point of the high-level period of the first control signal to the second switching element 2, thereby lengthening the first dead time period Td1 by a variable time Tp1. If the time by which the end point of the high-level period of the first control signal to the first switching element 1 is advanced is Ta12 (see FIG. 28 ) and the time by which the start point of the high-level period of the first control signal to the second switching element 2 is delayed is Ta22 (see FIG. 28 ), then the variable time Tp1 is Ta12 + Ta22, where Ta12 = Ta22 = 0.5 × Tp1.

[0207] As in embodiment 1, the signal generating circuit 52 generates a second control signal for each of the multiple switches 8 using a first control signal to the first switching element 1 and a first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10.

[0208] (2) Operation (2.1) Basic Operation Fig. 27 shows the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. Also, in Fig. 27, the voltage value of the DC power supply E1 is shown as Vd.

[0209] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 27 , the current iL1 flowing through the resonant inductor L1 starts at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when a time period equal to the variable time Tp1 has elapsed, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and becomes zero at time t14, when the third period T03 has elapsed since time t13. In the signal generating circuit 52, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low. The current iL1 flowing between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0210] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in Fig. 8. Also, during the first period T01, the load current iU flows through the path passing through the second diode 5 connected in anti-parallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1, as in Fig. 8.

[0211] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are each in an OFF state, and the third switching element 6U is in an ON state. During the second period T02, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, as in Fig. 9, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9U.

[0212] During the third period T03, the first switching element 1U and the third switching element 6U are each in an ON state, and the second switching element 2U and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in FIG. 10. This reduces the current iL1 to zero. Also, during the third period T03, the load current iU flows through the path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U, and the AC load RA1, as in FIG. 10.

[0213] 28 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, in FIG. 28, the voltage value of the DC power supply E1 is illustrated as Vd.

[0214] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching.

[0215] 28 , the current iL1 flowing through the resonant inductor L1 starts at time t41, when the high-level period of the second control signal SU7 begins, reaches the same value as the load current iU at time t42, when a time equal to the variable time Tp1 has elapsed, reaches the same value as the load current iU at time t43, when the second dead time period Td2 ends, and reaches zero at time t44, when a time equal to the variable time Tp1 has elapsed from time t43. In the signal generating circuit 52, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0216] 28, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0217] In FIG. 28 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0218] In FIG. 28, the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are each in an ON state, and the first switching element 1U and the third switching element 6U are each in an OFF state. During the third period T03, the current iL1 flows through the AC terminal 41U, the connection point 3U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0219] Although an example of setting the second dead time period Td2 for the switching circuit 10U has been described above, the same applies to the switching circuit 10V and the switching circuit 10W.

[0220] (2.2) First Control Operation and Second Control Operation The first control operation and second control operation are similar to the first control operation and second control operation of the first embodiment, and therefore a description thereof will be omitted.

[0221] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100B according to the fifth embodiment can reduce current distortion without directly controlling the plurality of switches 8 for zero voltage soft switching in the control device 51B. According to the power conversion device 100B according to the fifth embodiment, there is no need to generate a second control signal for directly controlling the plurality of switches 8 for zero voltage soft switching in the control device 51B. Therefore, it is possible to realize zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 without directly controlling the plurality of switches 8 in the control device 51B, and it is possible to reduce losses in each of the first switching element 1 and the plurality of second switching elements 2.

[0222] Furthermore, in the power conversion device 100B, when the control device 51B sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, the control device 51B advances the end point of the high-level period of the first control signal to the second switching element 2 and delays the start point of the high-level period of the first control signal to the first switching element 1, thereby adding a variable time Tp1 to the first dead time period Td1, and if the polarity of the load current is negative, the control device 51B advances the end point of the high-level period of the first control signal to the first switching element 1 and delays the start point of the high-level period of the first control signal to the second switching element 2, thereby adding a variable time Tp1 to the first dead time period Td1.

[0223] According to the above configuration, it is possible to achieve zero voltage soft switching while reducing dead time loss and dead time error.

[0224] Sixth Embodiment A power conversion device 100C according to a sixth embodiment will be described with reference to Figures 29 to 31. Regarding the power conversion device 100C according to the sixth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Figure 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0225] 29 , the power conversion apparatus 100C differs from the power conversion apparatus 100 in that it includes a control system 50C instead of the control system 50 of the power conversion apparatus 100, and a control device 51C instead of the control device 51 of the power conversion apparatus 100. The control system 50C includes the control device 51C and a signal generating circuit 52.

[0226] In the power conversion device 100C, the control device 51C, like the control device 51, generates first control signals SU1, SU2, SV1, SV2, SV2, SW1, and SW2 to control multiple first switching elements 1 and multiple second switching elements 2.

[0227] When the control device 51C sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a variable time Tp1 to the first dead time period Td1 by shortening the high-level period of the first control signal to the first switching element 1.

[0228] When the control device 51C sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a variable time Tp1 to the first dead time period Td1 by shortening the high-level period of the first control signal to the second switching element 2.

[0229] As in embodiment 1, the signal generating circuit 52 generates a second control signal for each of the multiple switches 8 using a first control signal to the first switching element 1 and a first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10.

[0230] (2) Operation (2.1) Basic Operation Fig. 30 illustrates the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. Also, in Fig. 30, the voltage value of the DC power supply E1 is illustrated as Vd.

[0231] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 30 , the current iL1 flowing through the resonant inductor L1 starts at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when the first period T01 has elapsed since time t11, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and becomes zero at time t14, when the third period has elapsed since time t13. In the signal generating circuit 52, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low. The current iL1 flowing between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0232] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in Fig. 8. Also, during the first period T01, the load current iU flows through the path passing through the second diode 5 connected in anti-parallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1, as in Fig. 8.

[0233] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are each in an OFF state, and the third switching element 6U is in an ON state. During the second period T02, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, as in Fig. 9, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9U.

[0234] During the third period T03, the first switching element 1U and the third switching element 6U are each in an ON state, and the second switching element 2U and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in FIG. 10. This reduces the current iL1 to zero. Also, during the third period T03, the load current iU flows through the path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U, and the AC load RA1, as in FIG. 10.

[0235] 31 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, in FIG. 31, the voltage value of the DC power supply E1 is illustrated as Vd.

[0236] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching. 31 , the current iL1 flowing through the resonant inductor L1 starts at time t41, when the high-level period of the second control signal SU7 begins, reaches the same value as the load current iU at time t42, when a time equal to the variable time Tp1 has elapsed, reaches the same value as the load current iU at time t43, when the second dead time period Td2 ends, and reaches zero at time t44, when a time Tad2 equal to the variable time Tp1 has elapsed from time t43. In the signal generating circuit 52, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0237] 31, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0238] In FIG. 31 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0239] In FIG. 31 , the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are each in an ON state, and the first switching element 1U and the third switching element 6U are each in an OFF state. During the third period T03, the current iL1 flows through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0240] The above describes an example in which the first dead time period Td1 is extended to the second dead time period Td2 for the switching circuit 10U, but the same applies to the switching circuits 10V and 10W.

[0241] (2.2) First Control Operation and Second Control Operation The first control operation and second control operation are similar to the first control operation and second control operation of the first embodiment, and therefore a description thereof will be omitted.

[0242] (3) Advantages The power conversion device 100C according to the sixth embodiment, like the power conversion device 100 according to the first embodiment, is capable of reducing current distortion without directly controlling the plurality of switches 8 for zero voltage soft switching in the control device 51C. According to the power conversion device 100C according to the sixth embodiment, the control device 51C does not need to generate a second control signal for directly controlling the plurality of switches 8 for zero voltage soft switching. Therefore, the control device 51C can realize zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 without directly controlling the plurality of switches 8, thereby reducing losses in each of the first switching elements 1 and the plurality of second switching elements 2. Furthermore, like the power conversion device 100 according to the first embodiment, the control system 50C according to the sixth embodiment performs one of the first control operation and the second control operation based on the overlap period Tov during which resonant currents flow simultaneously through two or more switches 8. Therefore, it is possible to reduce current distortion of the load current while realizing zero voltage soft switching.

[0243] Seventh Embodiment A power conversion device 100 according to a seventh embodiment will be described with reference to Fig. 32. Regarding the power conversion device 100 according to the seventh embodiment, components similar to those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0244] In the power conversion device 100 according to the seventh embodiment, the third switching element 6 and the fourth switching element 7 are connected in anti-series in each of the multiple switches 8. In the power conversion device 100 according to the seventh embodiment, in each of the multiple switches 8, the second main terminal (emitter terminal) of the third switching element 6 and the second main terminal (emitter terminal) of the fourth switching element 7 are connected, the first main terminal (collector terminal) of the third switching element 6 is connected to the connection point 3 of a corresponding one of the multiple switching circuits 10, and the first terminal (collector terminal) of the fourth switching element 7 is connected to the resonance inductor L1. Each of the multiple switches 8 further includes a diode 61 connected in anti-parallel to the third switching element 6 and a diode 71 connected in anti-parallel to the fourth switching element 7.

[0245] The power conversion device 100 according to the seventh embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0246] In the power conversion device 100 according to the seventh embodiment, each of the third switching element 6 and the fourth switching element 7 may be replaced with a MOSFET or a bipolar transistor. In this case, the diode 61 and the diode 71 in FIG. 32 may be substituted with a parasitic diode of the replaced element, or an element built into the chip of the replaced element. Furthermore, in the power conversion device 100 according to the seventh embodiment, the diode 61 and the diode 71 are not limited to being externally attached to the third switching element 6 and the fourth switching element 7, but may also be elements built into the chip.

[0247] Eighth Embodiment A power conversion device 100 according to an eighth embodiment will be described with reference to Fig. 33. With respect to the power conversion device 100 according to the eighth embodiment, components similar to those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0248] In the power conversion device 100 according to the eighth embodiment, in each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 are each a MOSFET, and the third switching element 6 and the fourth switching element 7 are connected in anti-series. In the power conversion device 100 according to the eighth embodiment, in each of the multiple switches 8, a first main terminal (drain terminal) of the third switching element 6 is connected to a first main terminal (drain terminal) of the fourth switching element 7. Each of the multiple switches 8 further includes a diode 61 connected in anti-parallel to the third switching element 6 and a diode 71 connected in anti-parallel to the fourth switching element 7. In each of the multiple switches 8, a second main terminal (source terminal) of the fourth switching element 7 is connected to a resonance inductor L1. In each of the multiple switches 8, a second main terminal (source terminal) of the third switching element 6 is connected to a connection point 3 of a switching circuit 10 corresponding to the switch 8 having the third switching element 6.

[0249] The power conversion device 100 according to the eighth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0250] Ninth Embodiment A power conversion device 100 according to a ninth embodiment will be described with reference to Fig. 34. In the power conversion device 100 according to the ninth embodiment, components similar to those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0251] In the power conversion device 100 according to the ninth embodiment, in each of the plurality of switches 8, the third switching element 6 and the fourth switching element 7 are each a MOSFET, a diode 63 is connected in series to the third switching element 6, and a diode 73 is connected in series to the fourth switching element 7. In the power conversion device 100 according to the ninth embodiment, in each of the plurality of switches 8, a series circuit of the third switching element 6 and the diode 63 and a series circuit of the fourth switching element 7 and the diode 73 are connected in anti-parallel.

[0252] The power conversion device 100 according to the ninth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0253] Tenth Embodiment A power conversion device 100D according to a tenth embodiment will be described with reference to Fig. 35. With respect to the power conversion device 100D according to the tenth embodiment, components similar to those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0254] In a power conversion device 100D according to the tenth embodiment, each of the multiple switches 8 includes one MOSFET 80, a diode 83 connected in anti-parallel to the MOSFET 80, a series circuit of two diodes 84 and 85 connected in anti-parallel to the MOSFET 80, and a series circuit of two diodes 86 and 87 connected in anti-parallel to the MOSFET 80. In each of the multiple switches 8, a connection point between the diode 84 and the diode 85 in the switch 8 (a first end 81 of the switch 8) is connected to a connection point 3 of a corresponding switching circuit 10 among the multiple switching circuits 10, and a connection point between the diode 86 and the diode 87 (a second end 82 of the switch 8) is connected to the common connection point 25. In each of the switches 8, when the MOSFET 80 is in an on state, the switch 8 is in an on state, and when the MOSFET 80 is in an off state, the switch 8 is in an off state.

[0255] The power conversion device 100D according to the tenth embodiment includes a control system 50D instead of the control system 50 of the power conversion device 100 according to the first embodiment, and includes a signal generation circuit 52D instead of the signal generation circuit 52 (see FIGS. 1 and 2 ) of the power conversion device 100 according to the first embodiment. The control system 50D includes a control device 51 and the signal generation circuit 52D.

[0256] The MOSFETs 80 of the multiple switches 8 are controlled by a signal generation circuit 52D. The signal generation circuit 52D outputs a second control signal SU8 that controls the on / off state of the MOSFET 80 of the switch 8U, a second control signal SV8 that controls the on / off state of the MOSFET 80 of the switch 8V, and a second control signal SW8 that controls the on / off state of the MOSFET 80 of the switch 8W. The signal generation circuit 52D generates the second control signal SU8 using the first control signals SU1 and SU2. The signal generation circuit 52D also generates the second control signal SV8 using the first control signals SV1 and SV2. The signal generation circuit 52D generates the second control signal SW8 using the first control signals SW1 and SW2.

[0257] In the switch 8, when the MOSFET 80 is in the on state, a resonant current flows due to a resonant circuit including the resonant inductor L1 and the resonant capacitor 9. In the power conversion device 100D according to the tenth embodiment, when one of the multiple switches 8 is in the on state, a charging current including the resonant current flows through the path of the regenerative capacitor 15, the resonant inductor L1, the diode 86, the MOSFET 80, the diode 85, and the resonant capacitor 9. In addition, in the power conversion device 100D according to the tenth embodiment, when one of the multiple switches 8 is in the on state, a discharging current including the resonant current flows through the path of the resonant capacitor 9, the diode 84, the MOSFET 80, the diode 87, the resonant inductor L1, and the regenerative capacitor 15.

[0258] The power conversion device 100D according to the tenth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0259] In the power conversion device 100D according to the tenth embodiment, each of the plurality of MOSFETs 80 may be replaced with an IGBT. Furthermore, in the power conversion device 100D according to the tenth embodiment, each of the plurality of switches 8 may have, instead of the MOSFET 80, a bipolar transistor or a GaN-based GIT (Gate Injection Transistor), for example.

[0260] (Embodiment 11) A power conversion device 100 according to embodiment 11 will be described with reference to Fig. 36. Regarding the power conversion device 100 according to embodiment 11, components similar to those of the power conversion device 100 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0261] In the power conversion device 100 according to the eleventh embodiment, each of the multiple switches 8 is a dual-gate GaN-based GIT having a first source terminal, a first gate terminal, a second gate terminal, and a second source terminal. In the power conversion device 100 according to the eleventh embodiment, a second control signal SU6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT constituting the switch 8U, and a second control signal SU7 is applied between the second gate terminal and the second source terminal of the dual-gate GaN-based GIT constituting the switch 8V. A second control signal SV6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT constituting the switch 8V, and a second control signal SV7 is applied between the second gate terminal and the second source terminal of the dual-gate GaN-based GIT constituting the switch 8W. A second control signal SW6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT, and a second control signal SW7 is applied between the second gate terminal and the second source terminal of the dual-gate GaN-based GIT constituting the switch 8W.

[0262] The power conversion device 100 according to the eleventh embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0263] (Twelfth Embodiment) A power conversion device 100E according to a twelfth embodiment will be described with reference to Fig. 37. With respect to the power conversion device 100E according to the twelfth embodiment, components similar to those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted. Note that Fig. 37 does not show the capacitor C10 of Fig. 1.

[0264] (1) Configuration The power conversion device 100E differs from the power conversion device 100 in that it further includes a regenerative capacitor 16 (hereinafter also referred to as the second regenerative capacitor 16) connected between the fourth end 154 of the regenerative capacitor 15 (hereinafter also referred to as the first regenerative capacitor 15) and the first DC terminal 31.

[0265] The second regenerative capacitor 16 is connected in series to the first regenerative capacitor 15. Therefore, in the power conversion device 100E, a series circuit of the second regenerative capacitor 16 and the first regenerative capacitor 15 is connected between the first DC terminal 31 and the second DC terminal 32. In the power conversion device 100E, a first end of the resonance inductor L1 is connected to the connection point between the first regenerative capacitor 15 and the second regenerative capacitor 16. The capacitance of the second regenerative capacitor 16 is the same as the capacitance of the first regenerative capacitor 15. The phrase "the capacitance of the second regenerative capacitor 16 is the same as the capacitance of the first regenerative capacitor 15" does not necessarily mean that the capacitance of the second regenerative capacitor 16 exactly matches the capacitance of the first regenerative capacitor 15, but may mean that the capacitance of the second regenerative capacitor 16 is within a range of 95% to 105% of the capacitance of the first regenerative capacitor 15.

[0266] In the power conversion device 100E according to the twelfth embodiment, the potential V15 at the fourth terminal 154 of the first regenerative capacitor 15 is equal to the value obtained by dividing Vd, which is the voltage value of the DC power supply E1, between the second regenerative capacitor 16 and the first regenerative capacitor 15. Therefore, the potential V15 at the fourth terminal 154 of the first regenerative capacitor 15 is approximately Vd / 2.

[0267] (2) Advantages The operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100E according to the twelfth embodiment is similar to the operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100 according to the first embodiment. Therefore, like the power conversion device 100 according to the first embodiment, the power conversion device 100E according to the twelfth embodiment can reduce current distortion without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0268] (Embodiment 13) A power conversion device 100F according to embodiment 13 will be described with reference to Fig. 38. With respect to the power conversion device 100F according to embodiment 13, components similar to those of the power conversion device 100 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0269] (1) Configuration The power conversion device 100F differs from the power conversion device 100 in that the third end 153 of the regenerative capacitor 15 is connected to the first DC terminal 31.

[0270] (2) Operation The operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100F according to the thirteenth embodiment is similar to the operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100 according to the first embodiment.

[0271] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100F according to the thirteenth embodiment is capable of reducing current distortion without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0272] (Other Modifications) The above-described first to thirteenth embodiments are merely examples of various embodiments of the present disclosure. The above-described first to thirteenth embodiments can be modified in various ways depending on the design, etc., as long as the object of the present disclosure can be achieved.

[0273] For example, each of the plurality of first switching elements 1 and the plurality of second switching elements 2 is not limited to an IGBT but may be a MOSFET. In this case, each of the plurality of first diodes 4 may be substituted with a parasitic diode of the MOSFET constituting the corresponding first switching element 1. Also, each of the plurality of second diodes 5 may be substituted with a parasitic diode of the MOSFET constituting the corresponding second switching element 2. The MOSFET is, for example, a Si-based MOSFET or a SiC-based MOSFET. Each of the plurality of first switching elements 1 and the plurality of second switching elements 2 may be, for example, a bipolar transistor or a GaN-based GIT.

[0274] Furthermore, the signal generating circuits 52, 52A, 52D may be configured to generate the second control signal for each of the plurality of switches 8 using one of the first control signal to the first switching element 1 and the first control signal to the second switching element 2 of the corresponding switching circuit 10 among the plurality of switching circuits 10. In any case, it is preferable that the signal generating circuits 52, 52A, 52D do not include a microcontroller.

[0275] In the power conversion device 100 according to the first embodiment, the diode 61 and the diode 71 are not limited to being externally attached to the third switching element 6 and the fourth switching element 7, respectively, but may also be elements built into one chip.

[0276] In addition, in the power conversion devices 100A to 100C according to embodiments 2 to 6, the configuration of the switch 8 is the same as the configuration of the switch 8 in the power conversion device 100 according to embodiment 1, but it may also be the same as the configuration of the switch 8 in any of embodiments 7 to 13.

[0277] Furthermore, the power conversion devices 100, 100B to 100F may not be provided with the first clamp diode 13 and the second clamp diode 14.

[0278] Furthermore, in the power conversion devices 100, 100A to 100F, if the capacitance of each of the multiple resonant capacitors 9 is relatively small, instead of attaching the multiple resonant capacitors 9 externally, the parasitic capacitance between both ends of the multiple second switching elements 2 may also serve as the multiple resonant capacitors 9.

[0279] The length of the first resonant half cycle is set to be the same as the length of the first dead time period Td1, but may be different from the length of the first dead time period Td1. In either case, however, it is desirable that the end point of the first resonant half cycle coincides with the end point of the first dead time period Td1.

[0280] Furthermore, the power conversion devices 100, 100A to 100F are not limited to a configuration that outputs three-phase AC, but may be configured to output polyphase AC with three or more phases.

[0281] Furthermore, in the control devices 51, 51B, and 51C, the operation of "determining that multiple resonant currents are flowing simultaneously" is not limited to the operation of "determining that multiple resonant currents are flowing simultaneously" when the time difference is less than the threshold value described in embodiment 1.

[0282] For example, the control devices 51, 51B, and 51C may determine that two-phase resonant currents are flowing simultaneously when any one of the current difference between the U-phase load current iU and the V-phase load current iV, the current difference between the V-phase load current iV and the W-phase load current iW, and the current difference between the W-phase load current iW and the U-phase load current iU is less than a current difference threshold.

[0283] In addition, the control devices 51, 51B, and 51C may determine that three-phase resonant currents are flowing simultaneously when any of the current differences between the U-phase load current iU and the V-phase load current iV, the V-phase load current iV and the W-phase load current iW, and the W-phase load current iW and the U-phase load current iU are less than the current difference threshold.

[0284] In addition, the control devices 51, 51B, and 51C may determine that "two-phase resonant currents flow simultaneously" when the electrical angle calculated from sensor information output from a sensor device (e.g., an encoder or resolver) for detecting the rotation speed of the motor, or the estimated electrical angle, is within a first rotation angle range (e.g., 55° or more and 65° or less), a second rotation angle range (e.g., 115° or more and 125° or less), a third rotation angle range (e.g., 175° or more and 185° or less), a fourth rotation angle range (e.g., 235° or more and 245° or less), a fifth rotation angle range (295° or more and 305° or less), or a sixth rotation angle range (e.g., 355° or more and 365° or less).

[0285] (Other Examples) (Example 1) (1) Circuit Configuration of Power Conversion Device The circuit configuration of the power conversion device 100A according to Example 1 is the same as that of the power conversion device 100A according to embodiment 2 (see FIG. 16), and therefore will not be illustrated or described.

[0286] (2) Operation of the Power Converter (2.1) Basic Operation The basic operation of the power converter 100A according to Example 1 is the same as that of the power converter 100A according to the second embodiment, and therefore a description thereof will be omitted.

[0287] (2.2) First control operation and second control operation In the following, an example is given of a case in which, in the control system 50A, the control device 51 estimates that the resonant current flowing through the resonant inductor L1 and the U-phase switch 8U and the resonant current flowing through the V-phase switch 8V overlap, but the same is true for the cases of the U-phase and W-phase, and the V-phase and W-phase.

[0288] (2.2.1) Operation for Zero-Voltage Soft-Switching of First Switching Element With regard to the operation of the power conversion device 100A according to Example 1, the operation for zero-voltage soft-switching of the first switching element 1 will be described with reference to Figures 39 and 40. Since the interpretations of Figures 39 and 40 are the same as those of Figures 13 and 14, respectively, the explanations thereof will be omitted.

[0289] The control system 50A performs a first control operation when the length of the overlap period Tov is longer than the length of the time difference ΔTuv. In the example of FIG. 39, the length of the time difference ΔTuv is shorter than the length of the overlap period Tov. When performing the first control operation, the control system 50A shifts the high-level periods of the first control signals SV1, SV2, and the second control signal SV6 in a later direction. In the example of FIG. 39, the control system 50A shifts the start point of the high-level period of the first control signal SV1 in a later direction by a shift time Tsv. The length of the shift time Tsv is the same as the length of the overlap period Tov.

[0290] In the power conversion device 100A of Example 1, the control system 50A performs the first control operation, thereby eliminating the overlap period Tov between the U-phase resonant current and the V-phase resonant current as shown in Figure 39, and enabling zero-voltage soft switching of the first switching elements 1U and 1V.

[0291] 39 illustrates an example in which the high-level periods of the first control signals SV1, SV2, and second control signal SV6 for the V phase are shifted later when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, but this is not limiting. For example, when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted earlier. Also, when the end timing of the second dead time period Td2 for the V phase is earlier than the end timing of the second dead time period Td2 for the U phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted later. In addition, if the timing at which the second dead time period Td2 of the V phase ends is earlier than the timing at which the second dead time period Td2 of the U phase ends, the high level periods of the first control signals SV1, SV2 and second control signal SV6 of the V phase may be shifted earlier.

[0292] The control system 50A performs the second control action when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv.

[0293] In the example of Figure 40, the length of the overlap period Tov is shorter than the length of the time difference ΔTuv. When performing the second control operation, the control system 50A shifts the high-level period of the first control signal SV1 in an earlier direction. In the example of Figure 40, the control system 50A shifts the start point of the high-level period of the first control signal SV1 in an earlier direction by a shift time Tsv. The length of the shift time Tsv is the same as the length of the time difference ΔTuv. The control device 51 calculates the variable time Tp1 after the shift in the second control operation using the equation Tp1 = Tau + Tav + (the difference between the first resonant half cycle and the second resonant half cycle).

[0294] In the power conversion device 100A of Example 1, the control system 50A performs the second control operation, thereby enabling zero-voltage soft switching of the first switching elements 1U, 1V, similar to when the control system 50 performs the second control operation in the power conversion device 100 of Embodiment 1.

[0295] 40 illustrates an example in which the high-level periods of the first control signals SV1, SV2, and second control signal SV6 for the V phase are shifted earlier when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, but this is not limiting. For example, when the end timing of the second dead time period Td2 for the U phase is earlier than the end timing of the second dead time period Td2 for the V phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted later. Also, when the end timing of the second dead time period Td2 for the V phase is earlier than the end timing of the second dead time period Td2 for the U phase, the high-level periods of the first control signals SU1, SU2, and second control signal SU6 for the U phase may be shifted earlier. Furthermore, if the timing at which the second dead time period Td2 of the V phase ends is earlier than the timing at which the second dead time period Td2 of the U phase ends, the high level periods of the first control signals SV1, SV2 and second control signal SV6 of the V phase may be shifted to later periods.

[0296] (2.2.2) Operation for Zero-Voltage Soft Switching of Second Switching Element When the control system 50A performs zero-voltage soft switching on the second switching element 2, the high-level and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before the shift are reversed compared to when the control system 50A performs zero-voltage soft switching on the first switching element 1, and the polarities of the load currents iU, iV, and current iL1 are reversed. Furthermore, when the control system 50A performs zero-voltage soft switching on the second switching element 2, the control system 50A shifts the high-level period of one of the second control signals SU7 and SV7 by the shift time, instead of the second control signals SU6 and SV6. To achieve this shift, the control system 50A shifts the first control signal corresponding to the second control signal whose high-level period is shifted.

[0297] In the power conversion device 100A according to Example 1, the control system 50A performs either the first control operation or the second control operation, thereby completing the discharge of the resonant capacitors 9U and 9V at the end of the second dead time period Td2 corresponding to each of the U phase and the V phase. Therefore, in the power conversion device 100A, when the control system 50A performs the first control operation or the second control operation, the switching of the second switching elements 2U and 2V becomes zero-voltage soft switching.

[0298] (3) Advantages: As with the power conversion device 100 according to the first embodiment, the power conversion device 100A according to the first embodiment can achieve zero-voltage soft switching of each of the first switching elements 1 and the second switching elements 2 without directly controlling the multiple switches 8 for zero-voltage soft switching in the control device 51. This reduces losses in each of the first switching elements 1 and the second switching elements 2. Furthermore, when the power conversion device 100A according to the first embodiment performs the first control operation, it can reduce losses through zero-voltage soft switching and reduce peak currents and noise by avoiding overlapping of the currents iL1 flowing through the resonant inductor L1. Furthermore, when the power conversion device 100A according to the first embodiment performs the second control operation, it can reduce losses through zero-voltage soft switching and, by shifting the second control signals so that they overlap, it can expand the range in which the carrier signal can be shifted within one cycle, thereby enabling higher frequencies.

[0299] (Example 2) (1) Circuit Configuration of Power Converter The circuit configuration of the power converter 100A according to Example 2 is the same as that of the power converter 100A according to the second embodiment (see FIG. 16), and therefore will not be illustrated or described.

[0300] (2) Operation of the Power Converter (2.1) Basic Operation The basic operation of the power converter 100A according to Example 2 is the same as that of the power converter 100A according to the second embodiment, and therefore a description thereof will be omitted.

[0301] (2.2) First control operation and second control operation In the following, an example is given of a case where it is estimated that the resonant current flowing through the U-phase switch 8U and the resonant current flowing through the V-phase switch 8V overlap in the resonant inductor L1, but the same is true for the cases of the U-phase and W-phase, and the V-phase and W-phase.

[0302] (2.2.1) Operation for Zero-Voltage Soft-Switching of First Switching Element With regard to the operation of the power conversion device 100A according to Example 2, the operation for zero-voltage soft-switching of the first switching element 1 will be described with reference to Figures 41 and 42. Since the interpretations of Figures 41 and 42 are the same as those of Figures 13 and 14, respectively, the explanations thereof will be omitted.

[0303] The control system 50A performs the first control operation when the length of the overlap period Tov is longer than the length of the time difference ΔTuv. In the example of FIG. 41, the length of the time difference ΔTuv is shorter than the length of the overlap period Tov. When performing the first control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. In the example of FIG. 41, the control system 50A shifts the start point of the high-level period of the first control signal SU1 by a shift time Tsu in an earlier direction, and shifts the start point of the high-level period of the first control signal SV1 by a shift time Tsv in a later direction. The length of the shift time Tsu is equal to the length of Tov / 2. The length of the shift time Tsv is also equal to the length of Tov / 2.

[0304] In the power conversion device 100A of Example 2, the control system 50A performs the first control operation, thereby eliminating the overlap period Tov between the U-phase resonant current and the V-phase resonant current as shown in Figure 41, and enabling zero-voltage soft switching of the first switching elements 1U and 1V.

[0305] 41 illustrates an example in which the control system 50A advances the start of the high-level period of the first control signal SU1 and delays the start of the high-level period of the first control signal SV1 when the end timing of the high-level period of the first control signal SU1 is earlier than the end timing of the high-level period of the first control signal SV1, but the operation of the control system 50A is not limited to this example. For example, when the end timing of the high-level period of the first control signal SU1 is later than the end timing of the high-level period of the first control signal SV1, the control system 50A delays the start of the high-level period of the first control signal SU1 and advances the start of the high-level period of the first control signal SV1.

[0306] The control system 50A performs the second control action when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv.

[0307] In the example of FIG. 42 , the length of the time difference ΔTuv is longer than the length of the overlap period Tov. When performing the second control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. Accordingly, the control system 50A shifts the high-level periods of the second control signals SU6 and SV6 in opposite directions. In the example of FIG. 42 , the control system 50A shifts the start point of the high-level period of the first control signal SU1 later by a shift time Tsu. Furthermore, the control system 50A shifts the start point of the high-level period of the control signal SV1 earlier by a shift time Tsv. The length of the shift time Tsu is equal to the length of ΔTuv / 2. Furthermore, the length of the shift time Tsv is equal to the length of ΔTuv / 2. The control device 51 calculates the variable time Tp1 after the shift in the second control operation using the following equation: Tp1=Tau+Tav+(difference between the first resonance half period and the second resonance half period).

[0308] In the power conversion device 100A of Example 2, the control system 50A performs the second control operation, thereby enabling zero-voltage soft switching of the first switching elements 1U, 1V, similar to when the control system 50A performs the second control operation in the power conversion device 100A of Embodiment 2.

[0309] 42 illustrates an example in which the control system 50A delays the start of the high-level period of the first control signal SU1 and advances the start of the high-level period of the first control signal SV1 when the end timing of the high-level period of the first control signal SU1 is earlier than the end timing of the high-level period of the first control signal SV1, but the operation of the control system 50A is not limited to this example. For example, when the end timing of the high-level period of the first control signal SU1 is later than the end timing of the high-level period of the first control signal SV1, the control system 50A advances the start of the high-level period of the first control signal SU1 and delays the start of the high-level period of the first control signal SV1.

[0310] (2.2.2) Operation for Zero-Voltage Soft Switching of the Second Switching Element When the control system 50A performs zero-voltage soft switching on the second switching element 2, the high-level and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before the shift are reversed compared to when the control system 50A performs zero-voltage soft switching on the first switching element 1, and the polarities of the load currents iU, iV, and current iL1 are reversed. Furthermore, when the control system 50A performs zero-voltage soft switching on the second switching element 2, the control system 50A shifts the high-level period of one of the second control signals SU7 and SV7 by the shift time instead of the second control signals SU6 and SV6. To achieve this shift, the control system 50A shifts the first control signal corresponding to the second control signal whose high-level period is shifted. Therefore, the control system 50A shifts the high-level periods of the second control signals SU7 and SV7 in opposite directions.

[0311] In the power conversion device 100A according to Example 2, the control system 50A performs either the first control operation or the second control operation, thereby completing the discharge of the resonant capacitors 9U, 9V at the end of the second dead time period Td2 corresponding to each of the U phase and the V phase. Therefore, in the power conversion device 100A according to Example 2, when the control system 50A performs the first control operation or the second control operation, the switching of the second switching elements 2U, 2V becomes zero-voltage soft switching.

[0312] (3) Advantages The power conversion device 100A according to Example 2, like the power conversion device 100A according to Embodiment 2, can achieve zero-voltage soft switching of each of the first switching elements 1 and the second switching elements 2 without directly controlling the multiple switches 8 for zero-voltage soft switching in the control device 51, thereby reducing losses in each of the first switching elements 1 and the second switching elements 2. Furthermore, when the power conversion device 100A according to Example 2 performs the first control operation, it can reduce losses through zero-voltage soft switching and reduce peak currents and noise by avoiding overlapping of the currents iL1 flowing through the resonant inductor L1. Furthermore, when the power conversion device 100A according to Example 2 performs the second control operation, it can reduce losses through zero-voltage soft switching and, by shifting the second control signals so that they overlap, it can expand the range in which the carrier signal can be shifted within one period, thereby enabling higher frequencies.

[0313] (Example 3) (1) Circuit Configuration of Power Converter The circuit configuration of the power converter 100A according to Example 3 is the same as that of the power converter 100A according to the second embodiment (see FIG. 16), and therefore will not be illustrated or described again.

[0314] (2) Operation of the Power Converter (2.1) Basic Operation The basic operation of the power converter 100A according to Example 3 is the same as that of the power converter 100A according to the second embodiment, and therefore a description thereof will be omitted.

[0315] (2.2) First control operation and second control operation In the following, an example is given of a case where it is estimated that the resonant current flowing through the U-phase switch 8U and the resonant current flowing through the V-phase switch 8V overlap in the resonant inductor L1, but the same is true for the cases of the U-phase and W-phase, and the V-phase and W-phase.

[0316] (2.2.1) Operation for Zero-Voltage Soft-Switching of First Switching Element With regard to the operation of the power conversion device 100A according to Example 3, the operation for zero-voltage soft-switching of the first switching element 1 will be described with reference to Figures 43 and 44. Since the interpretations of Figures 43 and 44 are the same as those of Figures 13 and 14, respectively, the explanations thereof will be omitted.

[0317] The control system 50A performs the first control operation when the length of the overlap period Tov is longer than the length of the time difference ΔTuv. In the example of FIG. 43, the length of the time difference ΔTuv is shorter than the length of the overlap period Tov. When performing the first control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. Accordingly, the control system 50A shifts the high-level period of the second control signal SU6 and the high-level period of the second control signal SV6 in opposite directions. In the example of FIG. 43, the control system 50A advances the start point of the high-level period of the first control signal SU1 by a shift time Tsu. Furthermore, the control system 50A delays the start point of the high-level period of the first control signal SV1 by a shift time Tsv. When Tov = Ta + Tb, the length of the shift time Tsu is Tov × Tb / (Ta + Tb). The length of the shift time Tsv is equal to the length of Tov×Ta / (Ta+Tb), where Ta and Tb can each be set to any value.

[0318] In the power conversion device 100A of Example 3, the control system 50A performs the first control operation, thereby eliminating the overlap period Tov between the U-phase resonant current and the V-phase resonant current before the shift, as shown in the waveform of the shifted current iL1 in the lower part of Figure 43, and enabling zero-voltage soft switching of the first switching elements 1U and 1V.

[0319] The control system 50A performs the second control action when the length of the overlap period Tov is shorter than the length of the time difference ΔTuv.

[0320] In the example of FIG. 44 , the time difference ΔTuv is longer than the overlap period Tov. When performing the second control operation, the control system 50A shifts the high-level period of the first control signal SU1 and the high-level period of the first control signal SV1 in opposite directions. Accordingly, the control system 50A shifts the high-level period of the second control signal SU6 and the high-level period of the second control signal SV6 in opposite directions. The control system 50A shifts the end point of the high-level period of the second control signal SU6, whose high-level period has an earlier phase by a shift time Tsu within one cycle T10 of the carrier signal (see FIG. 12 ), and shifts the end point of the high-level period of the second control signal SV6, whose high-level period has a later phase, by a shift time Tsv in an earlier direction. Accordingly, the control system 50A shifts the start point of the high-level period of the first control signal SU1 in a later direction by a shift time Tsu. The control system 50A also shifts the start point of the high-level period of the first control signal SV1 earlier by a shift time Tsv. The length of the shift time Tsu is √2×Tres / 4−Tov×Tb / (Ta+Tb). The length of the shift time Tsv is Tov×Tb / (Ta+Tb)+ΔTuv−√2×Tres / 4.

[0321] In the power conversion device 100A of Example 3, the control system 50A performs the second control operation, thereby enabling zero-voltage soft switching of the first switching elements 1U and 1V, similar to when the control system 50A performs the second control operation in the power conversion device 100A of Embodiment 2.

[0322] (2.2) Operation for Soft Switching of Second Switching Element When the control system 50A performs zero-voltage soft switching on the second switching element 2, the high-level periods and low-level periods of the first control signals SU1, SU2, SV1, and SV2 before shifting are reversed compared to when performing zero-voltage soft switching on the first switching element 1, and the polarities of the load currents iU, iV, and current iL1 are reversed. Furthermore, when the control system 50A performs zero-voltage soft switching on the second switching element 2, it shifts the high-level periods of the second control signals SU7 and SV7 in opposite directions to each other, instead of the second control signals SU6 and SV6.

[0323] In the power conversion device 100A according to Example 3, the control system 50A performs either the first control operation or the second control operation, thereby completing the discharge of the resonant capacitors 9U, 9V at the end of the second dead time period Td2 corresponding to each of the U phase and the V phase. Therefore, in the power conversion device 100A according to Example 3, when the control system 50A performs the first control operation or the second control operation, the switching of the second switching elements 2U, 2V becomes zero-voltage soft switching.

[0324] (3) Advantages In the power conversion device 100A according to Example 3, similar to the power conversion device 100A according to Embodiment 2, the control system 50A performs one of the first control operation and the second control operation based on the overlap period Tov during which the resonant currents flow simultaneously through the two or more switches 8. This enables zero-voltage soft switching of each of the first switching elements 1 and the second switching elements 2, thereby reducing losses in each of the first switching elements 1 and the second switching elements 2. Furthermore, when the power conversion device 100A according to Example 3 performs the first control operation, it can reduce losses through zero-voltage soft switching and reduce peak currents and noise by avoiding overlap of the currents iL1 flowing through the resonant inductor L1. Furthermore, when the power conversion device 100A according to Example 3 performs the second control operation, it can reduce losses through zero-voltage soft switching and, by shifting the second control signals so that they overlap, it can expand the range in which the carrier signal can be shifted within one period, thereby enabling higher frequencies.

[0325] (Aspects) The following aspects are disclosed in this specification.

[0326] A power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a first aspect includes a first DC terminal (31), a second DC terminal (32), a power conversion circuit (11), a plurality of AC terminals (41), a plurality of switches (8), a plurality of resonant capacitors (9), a resonant inductor (L1), a regenerative capacitor (15), and a control system (50; 50A; 50B; 50C; 50D). The power conversion circuit (11) has a plurality of first switching elements (1) and a plurality of second switching elements (2). In the power conversion circuit (11), a plurality of switching circuits (10), each including a plurality of first switching elements (1) and a plurality of second switching elements (2) connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit (11), a plurality of first switching elements (1) are connected to a first DC terminal (31), and a plurality of second switching elements (2) are connected to a second DC terminal (32). The plurality of AC terminals (41) correspond one-to-one to the plurality of switching circuits (10). Each of the plurality of AC terminals (41) is connected to a connection point (3) between the first switching element (1) and the second switching element (2) in the corresponding switching circuit (10). The plurality of switches (8) correspond one-to-one to the plurality of switching circuits (10). Each of the plurality of switches (8) has a first end (81) connected to the connection point (3) between the first switching element (1) and the second switching element (2) in the corresponding switching circuit (10), and a second end (82) connected to a common connection point (25). The plurality of resonance capacitors (9) correspond one-to-one to the plurality of switches (8). Each of the multiple resonant capacitors (9) is connected between the first end (81) of the corresponding switch (8) and the second DC terminal (32). The resonant inductor (L1) has a first end and a second end. In the resonant inductor (L1), the first end of the resonant inductor (L1) is connected to the common connection point (25). The regenerative capacitor (15) has a third end (153) and a fourth end (154). In the regenerative capacitor (15), the third end (153) is connected to the first DC terminal (31) or the second DC terminal (32). In the regenerative capacitor (15), the fourth end (154) is connected to the second end of the resonant inductor (L1).The control system (50; 50A; 50B; 50C; 50D) includes a control device (51; 51B; 51C) and a signal generating circuit (52). The control device (51; 51B; 51C) provides a first control signal, the potential of which changes between a high level and a low level, to each of the plurality of first switching elements (1) and the plurality of second switching elements (2). The signal generating circuit (52; 52A; 52D) provides a second control signal, the potential of which changes between a high level and a low level, to each of the plurality of switches (8). The control device (51; 51B; 51C) sets a second dead time period (Td2) for each of the plurality of switching circuits (10) between a high-level period of a first control signal to the first switching element (1) and a high-level period of the first control signal to the second switching element (2), the second dead time period (Td2) being obtained by adding a variable time (Tp1) to a predetermined first dead time period (Td1) so that the on periods of the first switching element (1) and the second switching element (2) do not overlap. The variable time (Tp1) is determined using at least the current values ​​of the load currents (iU, iV, iW) corresponding to each of the plurality of switching circuits (10) among the plurality of load currents (iU, iV, iW) flowing through the plurality of AC terminals (41), the inductance of the resonance inductor (L1), and the potential (V15) of the fourth end (154) of the regenerative capacitor (15). The signal generating circuit (52; 52A; 52D) generates, for each of the multiple switches (8), a second control signal having a high-level period corresponding to a second dead time period (Td2) for a corresponding switching circuit (10) among the multiple switching circuits (10). The control system (50; 50A; 50B; 50C; 50D) is configured to perform one of a first control operation and a second control operation based on an overlap period (Tov) during which the resonant currents flow simultaneously through the two or more switches (8) when it is determined that the resonant currents flow simultaneously through the resonant inductor (L1) through two or more switches (8). The first control operation is an operation of shifting the high-level period of the second control signal to at least one switch (8) among the two or more switches (8) so that the resonant currents flow simultaneously through the resonant inductor (L1).The second control operation is an operation of shifting the high-level period of the second control signal to at least one switch (8) of the two or more switches (8) so that the high-level periods of the second control signal to each of the two or more switches (8) overlap by a predetermined period or more in a second dead time period (Td2) corresponding to each of two or more switching circuits (10) connected to the two or more switches (8) among the plurality of switching circuits (10).

[0327] According to this aspect, it is possible to reduce current distortion without directly controlling the plurality of switches (8) for zero voltage soft switching in the control device (51; 51B; 51C).

[0328] In the power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to the second aspect, the control system (50; 50A; 50B; 50C; 50D) is configured to perform a control operation that reduces the amount of shift of the second control signal between a first control operation and a second control operation when it is determined that a resonant current passing through each of two or more of the multiple switches (8) simultaneously flows through the resonant inductor (L1). The control device (51; 51B; 51C) makes the variable time (Tp1) different when the control system (50; 50A; 50B; 50C; 50D) performs the first control operation and when it performs the second control operation.

[0329] In the power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to the third aspect, when the control system (50; 50A; 50B; 50C; 50D) determines that a resonant current passing through each of two or more of the multiple switches (8) simultaneously flows through the resonant inductor (L1), when performing a first control operation, the control system determines the first control operation using the current values ​​of the corresponding load currents (iU, iV, iW) for each of the multiple switching circuits (10) among the multiple load currents (iU, iV, iW) flowing through each of the multiple AC terminals (41), the inductance of the resonant inductor (L1), and the potential (V15) of the fourth end (154) of the regenerative capacitor (15). When the second control operation is performed, the variable time (Tp1) is determined to be the sum of two or more additional times (Tad) corresponding one-to-one to the two or more switches (8) and the difference between a first resonant half cycle when no resonant current flows simultaneously and a second resonant half cycle when the resonant current flows simultaneously. Each of the two or more additional times (Tad) is determined using the current value of the load current flowing through a corresponding switch (8) among the two or more switches (8), the inductance of the resonant inductor (L1), and the potential (V15) at the fourth end (154) of the regenerative capacitor (15). The first resonant half cycle is half the length of the resonant cycle of a first resonant circuit including the resonant inductor (L1) and only one of the multiple resonant capacitors (9). The second resonant half-cycle is half the length of the resonant cycle of a second resonant circuit including a resonant inductor (L1) and two or more resonant capacitors (9) corresponding to two or more switches (8) among the plurality of resonant capacitors (9).

[0330] In the power conversion device (100; 100A) according to the fourth aspect, in the second aspect, when the control device (51) sets the second dead time period (Td2) for each of the plurality of switching circuits (10), if the polarity of the load current is positive, it adds a variable time (Tp1) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the second switching element (2), and if the polarity of the load current is negative, it adds a variable time (Tp1) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the first switching element (1).

[0331] According to this aspect, it is possible to achieve zero-voltage soft switching while further reducing the dead-time loss and the dead-time error.

[0332] In the power conversion device (100B) according to the fifth aspect, in the second aspect, when the control device (51B) sets the second dead time period (Td2) for each of the plurality of switching circuits (10), if the polarity of the load current is positive, the control device (51B) adds a variable time (Tp1) to the first dead time period (Td1) by advancing the end point of the high level period of the first control signal to the second switching element (2) and delaying the start point of the high level period of the first control signal to the first switching element (1), and if the polarity of the load current is negative, the control device (51B) adds a variable time (Tp1) to the first dead time period (Td1) by advancing the end point of the high level period of the first control signal to the first switching element (1) and delaying the start point of the high level period of the first control signal to the second switching element (2).

[0333] According to this aspect, it is possible to achieve zero-voltage soft switching while further reducing the dead-time loss and the dead-time error.

[0334] In the power conversion device (100C) according to the sixth aspect, in the second aspect, when the control device (51C) sets the second dead time period (Td2) for each of the plurality of switching circuits (10), if the polarity of the load current is positive, it adds a variable time (Tp1) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the first switching element (1), and if the polarity of the load current is negative, it adds a variable time (Tp1) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the second switching element (2).

[0335] According to this embodiment, it is possible to realize zero-voltage soft switching.

[0336] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a seventh aspect, in any one of the first to sixth aspects, the signal generation circuit (52; 52A; 52D) generates a second control signal for each of the plurality of switches (8) using at least one of a first control signal to a first switching element (1) and a first control signal to a second switching element (2) of a corresponding switching circuit (10) among a plurality of switching circuits (10).

[0337] According to this aspect, it is possible to simplify the signal generating circuit (52; 52A; 52D).

[0338] In the power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) of the eighth aspect, in the seventh aspect, the signal generating circuit (52; 52A; 52D) includes a plurality of logic circuits (521 to 526) and does not include a microcontroller.

[0339] According to this aspect, it is possible to simplify the signal generating circuit (52; 52A; 52D).

[0340] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a ninth aspect, in any one of the first to eighth aspects, a first switching element (1) or a second switching element (2) that is a target of zero voltage soft switching in one switching circuit (10) of the two or more switching circuits (10) is set as a first target switching element, and one switching circuit (10) different from the switching circuit (10) that includes the first target switching element is set as a first target switching element. In the case of (a) in (b), the first switching element (1) or the second switching element (2) that is the target of zero-voltage soft switching is set as the second target switching element, and the time difference between the start of a high-level period of a first control signal to the first target switching element and the start of a high-level period of the first control signal to the second target switching element is set as ΔT, the control system (50) performs a first control operation when the length (Tov) of the overlap period of the resonant current is less than ΔT, and performs a second control operation when the length (Tov) of the overlap period of the resonant current is equal to or greater than ΔT.

[0341] According to this aspect, it is possible to reduce the amount of shift in the high level period of the first control signal, and to reduce current distortion.

[0342] A power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a tenth aspect is any one of the first to ninth aspects, in which when one of the two or more switches (8) is a first switch and the other switch different from the first switch is a second switch, the control system (50), when performing a first control operation, shifts a high-level period of a second control signal to at least one of the first switch and the second switch so that the resonant current flows through the second switch from a time point when the current value of the resonant current passing through the first switch reaches an extreme value and coincides with the current value of a load current flowing through an AC terminal (41) corresponding to the first switch among the two or more AC terminals (41).

[0343] According to this aspect, the amount of shift in the high level period of the second control signal can be reduced, and higher frequencies can be achieved.

[0344] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to an eleventh aspect, in any one of the first to ninth aspects, the control system (50; 50A; 50B; 50C; 50D) shifts the high-level period of the second control signal to each of the two or more switches (8) when performing a first control operation.

[0345] According to this aspect, the amount of shift in the high-level period of the second control signal can be further reduced, and current distortion can be further reduced.

[0346] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a twelfth aspect, in any one of the first to ninth aspects, the control system (50; 50A; 50B; 50C; 50D) shifts the high-level period of the second control signal to each of the two or more switches (8) when performing a second control operation.

[0347] REFERENCE SIGNS LIST 1 First switching element 2 Second switching element 3 Connection point 8 Switch 9 Resonant capacitor 10 Switching circuit 11 Power conversion circuit 15 Regenerative capacitor 153 Third terminal 154 Fourth terminal 31 First DC terminal 32 Second DC terminal 41 AC terminal 50, 50A, 50B, 50C, 50D Control system 51, 51B, 51C Control device 52, 52A, 52D Signal generating circuit 100, 100A, 100B, 100C, 100D, 100E, 100F Power conversion device iU, iV, iW Load current L1 Resonant inductor RA1 AC load SU1, SU2, SV1, SV2, SW1, SW2 First control signal SU6, SU7, SU8, SV6, SV7, SV8, SW6, SW7, SW8 Second control signal Td1 First dead time period Td2 Second dead time period Tp1 Variable time Tres Resonant half cycle Tov Overlap period V15 Electric potential

Claims

1. A power conversion circuit having a first DC terminal and a second DC terminal, the power conversion circuit having a plurality of first switching elements and a plurality of second switching elements, the plurality of first switching elements being connected in series in a one-to-one relationship, and a plurality of switching circuits being connected in parallel to each other, the plurality of first switching elements being connected to the first DC terminal, and the plurality of second switching elements being connected to the second DC terminal; a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to a connection point of the first switching elements and the second switching elements in the corresponding switching circuit; a plurality of switches corresponding one-to-one to the plurality of switching circuits, each having a first end connected to the connection point of the first switching elements and the second switching elements in the corresponding switching circuit and a second end connected to a common connection point; a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end and the second DC terminal of the corresponding switch; and a resonant inductor having a first end and a second end, the first end being connected to the common connection point. a regenerative capacitor having a third end and a fourth end, the third end being connected to the first DC terminal or the second DC terminal and the fourth end being connected to the second end of the resonant inductor; a control device that provides a first control signal, the potential of which changes between a high level and a low level, to each of the plurality of first switching elements and the plurality of second switching elements; and a signal generating circuit that provides a second control signal, the potential of which changes between a high level and a low level, to each of the plurality of switches, wherein the control device sets, for each of the plurality of switching circuits, a second dead time period that is obtained by adding a variable time to a preset first dead time period between a high level period of the first control signal to the first switching element and a high level period of the first control signal to the second switching element so that on periods of the first switching element and the second switching element do not overlap;the variable time is determined using at least a current value of a load current corresponding to each of the plurality of switching circuits among a plurality of load currents flowing through each of the plurality of AC terminals, an inductance of the resonant inductor, and a potential at the fourth end of the regenerative capacitor; the signal generating circuit generates, for each of the plurality of switches, the second control signal having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits; the control system is configured to, when determining that a resonant current passing through each of two or more switches among the plurality of switches simultaneously flows through the resonant inductor, perform one of a first control action and a second control action based on an overlap period during which the resonant currents passing through each of the two or more switches simultaneously flow; the first control action is an action of shifting a high-level period of the second control signal to at least one switch among the two or more switches so that the resonant currents passing through each of the two or more switches do not simultaneously flow through the resonant inductor; the second control operation is an operation of shifting a high-level period of the second control signal to at least one of the two or more switches so that the high-level period of the second control signal to each of the two or more switches overlaps by a predetermined period or more in the second dead time period corresponding to each of two or more switching circuits connected to the two or more switches among the plurality of switching circuits.

2. The power conversion device according to claim 1, wherein the control system is configured to, when it is determined that a resonant current passing through each of two or more of the plurality of switches simultaneously flows through the resonant inductor, perform one of the first control operation and the second control operation which reduces the amount of shift in the second control signal, and the control device makes the variable time different when the control system performs the first control operation and when it performs the second control operation.

3. When the control system determines that a resonant current passing through each of two or more of the multiple switches simultaneously flows through the resonant inductor, the control system, when performing the first control operation, determines the variable time using the current value of a load current corresponding to each of the multiple switching circuits among the multiple load currents flowing through each of the multiple AC terminals, the inductance of the resonant inductor, and the potential at the fourth end of the regenerative capacitor; and when performing the second control operation, determines the variable time to be the total time of the sum of two or more additional times corresponding one-to-one to the two or more switches and the difference between a first resonant half cycle when no resonant currents flow simultaneously and a second resonant half cycle when resonant currents flow simultaneously, each of the two or more additional times being determined using the current value of the load current flowing through a corresponding switch among the two or more switches, the inductance of the resonant inductor, and the potential at the fourth end of the regenerative capacitor; and 3. The power conversion device according to claim 2, wherein the second resonant half cycle has a length half the length of a resonant cycle of a second resonant circuit including the resonant inductor and two or more resonant capacitors among the plurality of resonant capacitors corresponding to the two or more switches, respectively.

4. The power conversion device according to claim 2, wherein, when setting the second dead time period for each of the plurality of switching circuits, the control device adds the variable time to the first dead time period by shortening a high-level period of the first control signal to the second switching element when the polarity of the load current is positive, and adds the variable time to the first dead time period by shortening a high-level period of the first control signal to the first switching element when the polarity of the load current is negative.

5. The power conversion device according to claim 2, wherein when setting the second dead time period for each of the plurality of switching circuits, the control device adds the variable time to the first dead time period by advancing the end point of a high level period of the first control signal to the second switching element and delaying the start point of the high level period of the first control signal to the first switching element when the polarity of the load current is positive, and adds the variable time to the first dead time period by advancing the end point of a high level period of the first control signal to the first switching element and delaying the start point of the high level period of the first control signal to the second switching element when the polarity of the load current is negative.

6. The power conversion device according to claim 2, wherein, when setting the second dead time period for each of the plurality of switching circuits, the control device adds the variable time to the first dead time period by shortening a high-level period of the first control signal to the first switching element when the polarity of the load current is positive, and adds the variable time to the first dead time period by shortening a high-level period of the first control signal to the second switching element when the polarity of the load current is negative.

7. A power conversion device according to any one of claims 1 to 6, wherein the signal generation circuit generates the second control signal for each of the plurality of switches using at least one of the first control signal to the first switching element of a corresponding one of the plurality of switching circuits and the first control signal to the second switching element.

8. The power conversion device according to claim 7, wherein the signal generating circuit includes a plurality of logic circuits and does not include a microcontroller.

9. The power conversion device according to any one of claims 1 to 8, wherein the first switching element or the second switching element that is a target of zero voltage soft switching in one of the two or more switching circuits is a first target switching element, and the first switching element or the second switching element that is a target of zero voltage soft switching in one of the two or more switching circuits other than the switching circuit that includes the first target switching element is a second target switching element, and when a time difference between a start point of a high level period of the first control signal to the first target switching element and a start point of a high level period of the first control signal to the second target switching element is ΔT, the control system performs the first control operation when the length of the overlapping period of the resonant current is less than ΔT, and performs the second control operation when the length of the overlapping period of the resonant current is equal to or greater than ΔT.

10. The power conversion device according to any one of claims 1 to 9, wherein, when one of the two or more switches is designated as a first switch and another switch different from the first switch is designated as a second switch, the control system, when performing the first control operation, shifts a high-level period of the second control signal to at least one of the first switch and the second switch so that the resonant current flows through the second switch from a point in time when the current value of the resonant current passing through the first switch reaches an extreme value and coincides with the current value of a load current flowing through the AC terminal of the two or more AC terminals corresponding to the first switch.

11. The power conversion device according to any one of claims 1 to 9, wherein the control system shifts a high level period of the second control signal to each of the two or more switches when performing the first control operation.

12. The power conversion device according to any one of claims 1 to 9, wherein the control system shifts a high-level period of the second control signal to each of the two or more switches when performing the second control action.

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