Analog-to-digital converter

Abstract

This analog-to-digital converter comprises a multiplexer including: a plurality of signal lines that transmit a source signal, the source signal being an electromagnetic continuous wave; a plurality of phase modulators that each modulate the respective phases of a plurality of source signals according to an input signal; an input unit for inputting a plurality of phase-modulated signals having phases modulated by the plurality of phase modulators; a multiplexing unit that spatially and continuously multiplexes the plurality of phase-modulated signals inputted to the input unit and that subjects the phase-modulated signals to signal conversion; and one or more output units that output the signals converted by the multiplexing unit. This analog-to-digital converter also comprising one or more binarizers that each binarize, using an arbitrary threshold value, the signals outputted from the multiplexer.

Description

Analog-to-Digital Converter

[0001] The present invention relates to analog-to-digital converters.

[0002] Practical analog-to-digital converters (ADCs) are basically realized using semiconductor integrated circuits that handle electrical (electronic) signals. Non-Patent Document 1 discloses a diagram showing the performance trends of various conventional electronic ADC methods. The key performance indicators of an ADC are resolution and conversion frequency. However, as can be seen from the diagram disclosed in Non-Patent Document 1, achieving both high resolution and high conversion frequency—that is, achieving a resolution that falls within the upper right region of the graph—is difficult. Various ADC methods have been proposed and improvements are being made, but the "resolution x conversion frequency" ratio generally determines the limit, and ADCs are used according to their intended application. Despite years of global research and development, given the current situation, circumstantial evidence suggests that this is a limitation of using electrical signals.

[0003] The fastest operating method for conventional electronic ADCs is the parallel (flash) type disclosed in Non-Patent Document 2. In a parallel ADC, when an analog signal voltage is input to the analog signal input terminal of the ADC, multiple comparators output "1" depending on the value of this voltage. The analog signal can be interpreted as the input signal. If the voltage value of the input signal is large, the number of comparators outputting "1" increases, and if the voltage value of the input signal is small, the number of comparators outputting "1" decreases. This output format is similar to that of a level meter (water level indicator). Such input signals are instantly converted into a binary code string through parallel processing, thereby increasing the conversion speed of the input signal. However, this binary code string is not binary-coded; rather, the input voltage value is simply divided by the number of comparators, and therefore the encoder then converts the level value into binary.

[0004] Japanese Patent Application Laid-Open No. 2022-80891

[0005] "IEICE Knowledge Base," IEICE, January 24, 2019, Group 10 (Integrated Circuits), Part 6 (Analog LSI), Chapter 4, A / D Converters," retrieved on December 14, 2023, on the Internet (URL: https: / / www.ieice-hbkb.org / files / 10 / 10gun_06hen_04.pdf). ROHM website, "ADC Basic Type 1 (Flash Type)," retrieved on December 14, 2023, on the Internet (URL: https: / / www.rohm.co.jp / electronics-basics / ad-converters / ad_what3).

[0006] The parallel ADC disclosed in Non-Patent Document 2 is one of the fastest ADCs among various ADCs, but as shown in Non-Patent Document 1, there are obstacles to achieving high resolution. When an input signal is divided into smaller parts to achieve high resolution, the voltage range handled by each comparator becomes correspondingly smaller, and extremely high performance (voltage variation, etc.) is required for each of the multiple comparators. For example, when an input signal with a maximum of 1 V is divided into 10 bits (1024 gradations), the voltage range handled by each comparator becomes approximately 100 uV, and the variation in offset voltage must be kept sufficiently lower than that.

[0007] Furthermore, the number of comparators increases as 2 to the power of N for the resolution N (N is a natural number equal to or greater than 1). For example, a 10-bit ADC requires 1023 comparators (2 to the power of N - 1). Therefore, the circuit size and power consumption roughly double for each additional bit. To achieve high resolution using a parallel configuration, a large number of high-precision comparators must be arranged, which increases the circuit size, power consumption, and cost, making such a configuration virtually impossible to realize (for example, the limit for such a configuration is thought to be about 10 bits). As such, conventional technology leaves room for improvement in terms of achieving higher speeds while suppressing increases in power consumption.

[0008] The present disclosure has been made in consideration of the above circumstances, and aims to provide an analog-to-digital converter that can achieve even higher speed operation while suppressing an increase in power consumption.

[0009] In order to achieve the above object, an analog-to-digital converter according to a first aspect includes a plurality of signal lines that transmit electromagnetic continuous waves as source signals, a plurality of phase modulators that each modulate the phase of each of the plurality of source signals in accordance with an input signal, an input section that inputs a plurality of phase-modulated signals whose phases have been modulated by the plurality of phase modulators, a multiplexer that spatially and continuously multiplexes the plurality of phase-modulated signals input to the input section, thereby generating signal conversion with different characteristics in the phase-modulated signals, and one or more output sections that output signals that have been signal-converted by the multiplexer, and one or more binarizers that each binarize the signals output from the multiplexer at an arbitrary threshold value.

[0010] In the analog-to-digital converter according to the second aspect, the relationship of the phase differences between the plurality of phase-modulated signals input to the multiplexing section is made different for a second input signal that is different from the first input signal.

[0011] The analog-to-digital converter according to a third aspect further comprises a code converter that converts the binary code string output from the binarizer into an arbitrary code.

[0012] In the analog-to-digital converter according to a fourth aspect, the multiplexing section includes an object, structure, or mechanism that affects the signal during the process of the signal propagating within the multiplexing section.

[0013] In the analog-to-digital converter according to the fifth aspect, the influence includes at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal within the multiplexer.

[0014] As described above, according to the present disclosure, it is possible to provide an analog-to-digital converter that can achieve even higher speed operation while suppressing an increase in power consumption.

[0015] FIG. 1 is a diagram illustrating a configuration of an analog-to-digital converter 100 according to an embodiment of the present disclosure. FIG. 2A is a diagram illustrating the state of the phase difference between each phase-modulated signal. FIG. 2B is a diagram illustrating the state of the phase difference between each phase-modulated signal. FIG. 3A is a diagram illustrating the relationship between input and output when the binary code string output from the binarizer 8 is converted into a decimal number. FIG. 3B is a diagram illustrating the relationship between input and output when the binary code string output from the binarizer 8 is converted into a decimal number. FIG. 4 is a diagram illustrating the configuration of an analog-to-digital converter 100A according to a first modified example. FIG. 5 is a diagram illustrating the configuration of an analog-to-digital converter 100B according to a second modified example. FIG. 6 is a diagram illustrating an example configuration of a multiplexer 5.

[0016] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the same or equivalent components and parts in each drawing are denoted by the same reference numerals. Furthermore, the dimensional proportions of the drawings are exaggerated for the sake of explanation and may differ from the actual proportions.

[0017] 1 is a diagram showing the configuration of an analog-to-digital converter 100 according to an embodiment of the present disclosure. The analog-to-digital converter 100 may be understood as a circuit that uses an electromagnetic continuous wave as a source signal, converts an analog input signal into a digital signal, and outputs the converted signal to a digital processing circuit or the like.

[0018] The electromagnetic continuous wave as the source signal may be interpreted as an interference wave, a coherent wave, a continuous wave (CW), etc. The electromagnetic continuous wave as the source signal may be interpreted as continuous light irradiated from a laser light source LD, for example, and the continuous light may be interpreted as CW light, interference light, coherent light, etc.

[0019] The analog-to-digital converter 100 may include a signal line 1, a distributor 2, a plurality of phase modulators 3, a plurality of signal lines 4, a multiplexer 5, a plurality of photodetectors 6, a current-to-voltage conversion circuit 7, one or more binarizers 8, a code converter 9, a voltage regulator 10, and a plurality of signal lines 11.

[0020] The signal line 1 may be interpreted as a waveguide that transmits the source signal. The splitter 2 may divide the source signal (light) transmitted through the signal line 1 into M parts (M is a natural number greater than or equal to 1) and output each of the divided source signals (light) to M signal lines 4. The multiple signal lines 4 may be interpreted as waveguides that transmit the source signal.

[0021] Each of the multiple phase modulators 3 may be interpreted as a phase shifter that modulates (shifts) the phase of the source signal transmitted to the signal line 4. The multiple phase modulators 3 may modulate the phase of each of the multiple source signals in accordance with the input signal. Specifically, the multiple phase modulators 3 may change the amount of phase modulation of each of the multiple source signals. The input signal may be interpreted as a signal input to the analog-to-digital converter 100, specifically, an output signal (analog signal) of a sensor.

[0022] The voltage regulator 10 may convert the input signal into a voltage signal (electrical signal, control signal) for controlling the plurality of phase modulators 3. The voltage regulator 10 may be configured with, for example, M voltage amplifiers.

[0023] The multiplexer 5 may include an input section 51 , a multiplexing section 52 , and an output section 53 .

[0024] The input section 51 may input a plurality of phase-modulated signals whose phases have been modulated by the phase modulator 3 .

[0025] The multiplexing unit 52 may spatially and continuously multiplex the multiple phase-modulated signals input to the input unit 51, thereby causing nonlinear signal conversion with different characteristics in the phase-modulated signals. Alternatively, the multiplexing unit 52 may spatially and continuously multiplex the multiple phase-modulated signals input to the input unit 51, thereby causing linear signal conversion in the phase-modulated signals. The multiplexing unit 52 may spatially and continuously multiplex the multiple phase-modulated signals input to the input unit 51, thereby causing at least one of linear and nonlinear signal conversion in the phase-modulated signals. The signal conversion by the multiplexing unit 52 is an unintentional conversion.

[0026] The relationship of the phase difference between the plurality of phase-modulated signals input to the multiplexer 52 may be made different for a second input signal that is different from the first input signal.

[0027] The output section 53 may output the signal converted by the multiplexing section 52 to the signal line 11. The signal line 11 may be interpreted as a waveguide that transmits the signal converted by the multiplexing section 52.

[0028] Each of the multiple photodetectors 6 may detect the amount of light of the signal (light) output to the signal line 11. The current-voltage conversion circuit 7 may convert the signal detected by the photodetector 6 into a voltage signal. Each of the one or more binarizers 8 may binarize the signal output from the multiplexer 52, i.e., the voltage signal converted by the current-voltage conversion circuit 7, using an arbitrary threshold value.

[0029] The code converter 9 may convert the binary code strings output from one or more binarizers 8 into any code using a sampling clock (electrical signal).

[0030] The operation of the analog-to-digital converter 100 is described below.

[0031] Continuous light (a source signal such as CW light, coherent light, or coherent light) emitted from a laser light source LD is carried by a waveguide (signal line 1), and the continuous light carried by the waveguide is split into M lines by a splitter 2, and each line is carried by M waveguides (signal lines 4). Normally, the amount of light is split equally among the M lines.

[0032] The divided continuous light is phase-modulated (shifted) by a phase modulator 3 (phase shifter) installed midway along each waveguide (signal line 4).

[0033] The phase modulation amount in the phase modulator 3 is typically controlled by an electrical signal (voltage, current, power). As described above, in the present disclosure, the output signal from the sensor is used as the input signal, and the phase modulation amount varies depending on the magnitude of the input signal. However, the signal level (e.g., several mV level) output from the sensor and the control signal level (e.g., several V level) of the phase modulator 3 are typically different. Therefore, the voltage regulator 10 may convert the input signal to an appropriate level for controlling the phase modulator 3, and the phase modulation amount may be controlled by the control signal output from the voltage regulator 10. Furthermore, since the output signal from the sensor or the like is typically single (1ch) or differential (2ch), the voltage regulator 10 may convert it into voltage signals for controlling multiple phase modulators 3. The voltage regulator 10 may be configured, for example, with M voltage amplifiers.

[0034] Each light (phase-modulated signal) in the signal line 4, phase-modulated according to the input signal, is input to the multiplexer 5 via the input section 51 of the multiplexer 5 and then input to the multiplexer 52. The multiplexer 52 then generates complex interference between M types of light with different phases. When coherent light interferes, the light is converted into an amplitude (light intensity) signal corresponding to the phase difference. For example, this phase difference and amplitude have a nonlinear relationship, and the phase-modulated signal is converted into nonlinear amplitude information. The generated interference light then interferes with another interference light in the multiplexer 52, resulting in continuous and repeated spatial interference. Furthermore, to generate a stronger nonlinear signal, an object that obstructs the propagation of light may be installed in the multiplexer 52. Specifically, the multiplexer 52 may include an object, structure, or mechanism (hereinafter, "structure") that affects the signal as it propagates within the multiplexer 52. The effect may include at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal within the multiplexer 52. Details of the structure will be described later. By converting the phase-modulated signal into nonlinear amplitude information within the multiplexing section 25, it is possible to generate a unique code that is free of artificiality, i.e., chaotic and random, and compared to linear signal conversion, it is possible to perform AD conversion that can achieve even faster operation while suppressing increases in power consumption.

[0035] The phase-modulated signal (phase-modulated light) input to the multiplexer 52 propagates through the multiplexer 52 while repeating a complex interference (nonlinear conversion) process, and reaches the output unit 53 located on the opposite side.

[0036] N waveguides (signal lines 11) are connected to the output unit 53, and light that reaches the output unit 53 is output from the waveguide (signal line 11) at that position. The photodetector 6 detects the amount of light that is output. A current corresponding to the amount of light flows in the photodetector 6, and is converted into a voltage signal by the current-voltage conversion circuit 7. Note that this processing is simply preprocessing for binarizing the output signal from the multiplexer 5, and the present disclosure is not limited to this processing method.

[0037] Each signal (phase-modulated signal) that has become a voltage signal is binarized by a binarizer 8 having an arbitrary threshold value, and is output in parallel as an N-bit digital (binary) code string. This threshold value may be different for each binarizer 8 depending on the level of the signal output from each photodetector 6, etc.

[0038] The digital code generated in this case is a unique code generated based on a signal generated by complex conversion in the multiplexer 52, and is therefore often difficult to use as is. Therefore, this N-bit digital code may be converted into an arbitrary code sequence that is easy to handle using a code converter 9 (such as a conversion table). However, if the downstream digital processing circuit is configured to accept a unique code sequence, the code converter 9 is not essential.

[0039] In the present disclosure, the signal is processed instantaneously in an analog manner without sampling from input to output of the unique code string. Therefore, sampling is performed in the final code converter 9 for input to the subsequent digital processing circuit.

[0040] In addition, the multiplexer 52, which is a necessary component for the ADC of the present disclosure to function, requires that if the input signal values ​​are different, the phase difference state between the phase-modulated signals output from the phase modulator 3 must be different (details will be described later). This is because if the same phase difference state occurs despite the different input signal values, the same code sequence will be output, making it impossible to distinguish between them and appropriate conversion.

[0041] (Structures, etc.) Here, the structures, etc. included in the multiplexing unit 52 will be described. The multiplexing unit 52 disclosed in Patent Document 1 can be exemplified as the structures, etc. Specifically, the structures, etc. may include materials of two or more different shapes, two or more different sizes, or two or more different materials with different refractive indices. The structures, etc., act on the propagation of the multiplexed light, for example, by hindering the propagation of the multiplexed light, changing the propagation direction, or changing the propagation speed. The structures, etc. may be composed of a material and shape capable of scattering light or changing the propagation direction, or a material and shape capable of changing the propagation speed of light. The structures, etc. may be formed of a material different from that of the multiplexing unit 52 and may have a shape such as a perfect circle, ellipse, triangle, or square. The structures, etc. may be regions in which two different materials are alternately arranged at a period shorter than the wavelength. Furthermore, the structures, etc. may be regions made of the same material as the multiplexing unit 52 but with a different doping concentration. An input optical signal can be output as a different optical signal due to the difference in refractive index during propagation, depending on the structure or the like.

[0042] (Signal Flow in Analog-Digital Converter 100) The following describes the signal flow in the analog-digital converter 100. In this disclosure, the phase modulator 3 is controlled by an input signal (such as a control signal via the voltage regulator 10). Changing this input signal changes the phase of the optical signal passing through each waveguide. For example, if the input signal (control signal) is a voltage, voltage-to-optical phase conversion occurs. Each optical signal passing through the phase modulator 3 basically has the same light intensity (amplitude), and only the phase changes. Light with different phases then travels through the multiplexer 5 in the multiplexer 5, interfering in a complex manner. When coherent light interferes with each other, the amplitude of the generated wave changes depending on the phase difference between the lights. In other words, phase-to-amplitude conversion occurs. This conversion is nonlinear. Such nonlinear conversion is continuously and repeatedly performed in the multiplexer 52, until the optical signal finally reaches the output unit 53. The light intensity (amplitude) at the time of arrival is observed by the photodetector 6, where light intensity-to-current conversion is performed. Further, current-to-voltage conversion is performed by a current-to-voltage conversion circuit 7, etc. This voltage is then binarized by a binarizer 8 to obtain a parallel binary code string (digital bit string). In other words, the moment an input signal (control signal) is given to the analog-to-digital converter 100, it is converted into a digital signal at nearly the speed of light.

[0043] (Conditions Necessary for Functioning as an Optical ADC) As described above, a necessary condition for the analog-to-digital converter 100 of the present disclosure to function as an optical ADC is that if the input signal values ​​are different, the phase difference state between the phase-modulated signals output from the phase modulator 3 must be different. This is because if the same phase difference state occurs despite the input signal values ​​being different, the same code sequence will be output, making it impossible to distinguish between them and making appropriate conversion impossible.

[0044] The state of the phase difference between each phase-modulated signal will be specifically described with reference to Figures 2A and 2B. Figures 2A and 2B are diagrams for explaining the state of the phase difference between each phase-modulated signal. The upper diagrams of Figures 2A and 2B show the phases of each phase-modulated signal and the phase differences between each phase-modulated signal when the input signal (control signal) is 1.0 V. The lower diagrams of Figures 2A and 2B show the phases of each phase-modulated signal and the phase differences between each phase-modulated signal when the input signal (control signal) is 1.1 V.

[0045] As shown in FIG. 2A, when the voltage of the input signal (control signal) is changed from 1.0 V to 1.1 V, a change occurs in the phase of each phase-modulated signal. However, the phase difference between each phase-modulated signal is the same at both 1.0 V and 1.1 V. This means that the same phase difference state occurs for different input signals. When such phase-modulated signals are input to the multiplexer 5 shown in FIG. 1, the signals output from the multiplexer 5 are the same, and the analog-to-digital converter 100 does not function as an optical ADC. In other words, the phases of the phase-modulated signals in the analog-to-digital converter 100 must not move in the same way in response to changes in the input signal (for example, they must all move by 5° simultaneously).

[0046] On the other hand, Figure 2B illustrates an example in which the phase difference between each phase-modulated signal is different, at 1.0 V and 1.1 V. As shown in Figure 2B, in order to vary the phase difference between each phase-modulated signal, it is necessary to generate different phase difference relationships (phase difference states) depending on the input signals. There are two main methods for generating different phase difference relationships, as shown below.

[0047] (1) Arrange multiple phase modulators 3 with different voltage-phase change amount characteristics (relationships). In reality, the characteristics of multiple phase modulators 3 are not exactly the same due to manufacturing errors, so one specific method is to utilize the manufacturing errors, but there are cases where the difference in characteristics is not that great. Therefore, other possible methods include intentionally making the design parameters of the multiple phase modulators 3 different to actively create differences in characteristics, or mixing and arranging multiple phase modulators 3 with different modulation principles.

[0048] (2) When it is not possible to actively change the characteristics of each of the multiple phase modulators 3 as in the method (1) above, and the characteristics of each phase modulator 3 are substantially the same, the voltage regulator 10 may apply different control voltages to each phase modulator 3 in response to the input signal. By applying different control voltages to each phase modulator 3 in response to changes in the input signal, it is possible to prevent the same phase difference state from occurring.

[0049] It should be noted that the method is not limited to the above two methods as long as different phase difference states can be generated for the input signal.

[0050] (Unique Code Sequence) The binary code sequence output from the binarizer 8 of the present disclosure is a code sequence generated as a result of complex nonlinear transformation in an interference field. Therefore, even if the input signal is gradually increased, the output binary code sequence will not conform to the input, and the binarizer 8 will output irregular, random values.

[0051] 3A and 3B are diagrams showing the relationship between input and output when the binary code string output from the binarizer 8 is converted into decimal numbers. 3A and 3B show random values ​​of the binary code string.

[0052] As shown in the right diagram of FIG. 3A, the output of the binarizer 8 does not change regularly with respect to the input, but is a unique code in which different inputs do not produce the same output.

[0053] This unique code may be converted into an easy-to-handle code with a correspondence between input and output by the code converter 9, as shown in the diagram on the right side of Fig. 3B. Since the quantization itself, which has a high processing load (power consumption, processing time, etc.), is completed in the multiplexer 52, the processing load in the code converter 9 is lighter than the processing load of the multiplexer 52, etc.

[0054] (First Modification) FIG. 4 is a diagram showing the configuration of an analog-to-digital converter 100A according to a first modification. The analog-to-digital converter 100 shown in FIG. 1 differs from the analog-to-digital converter 100A shown in FIG. 4 in that the analog-to-digital converter 100A does not include the distributor 2 shown in FIG. 1, and continuous light irradiated from multiple laser light sources LD is input to the phase modulator 3. The configuration of the analog-to-digital converter 100A is effective when the light intensity of the signal output from the combiner 5 is low and there is a possibility that the signal cannot be detected by the photodetector 6. Note that the analog-to-digital converter 100 shown in FIG. 1 can utilize continuous light irradiated from a single laser light source LD, and therefore, the need for an additional laser light source LD can be suppressed, thereby reducing the manufacturing cost of the analog-to-digital converter 100, suppressing an increase in power consumption in the laser light source LD, and enabling the size of the analog-to-digital converter 100 to be reduced.

[0055] (Second Modification) Figure 5 is a diagram showing the configuration of an analog-digital converter 100B according to a second modification. The analog-digital converter 100B shown in Figure 5 differs from the analog-digital converter 100 shown in Figure 1 in that the analog-digital converter 100B uses multiple output units 53, multiple signal lines 11, multiple photodetectors 6, and multiple current-voltage conversion circuits 7. Specifically, a signal line 11 is connected to each of the multiple output units 53, a photodetector 6 and a current-voltage conversion circuit 7 are connected to each signal line 11, and multiple binarizers 8 are connected to each current-voltage conversion circuit 7. The amount of information in the unique code string may be increased by using multiple binarizers 8 with different thresholds for the output of a single photodetector 6.

[0056] (Other) In this disclosure, the coherent signal source is mainly assumed to be light generated from a laser light source LD. However, it is possible that the ADC of this disclosure can also be implemented using radio waves emitted from an antenna.

[0057] Signal lines 1, 4, and 11 are not limited to waveguides, and may be any device capable of transporting light in a coherent state, such as optical fibers. Furthermore, devices capable of transporting light in a coherent state may also be silicon waveguides or silicon nitride waveguides implemented on an optical integrated circuit using silicon photonics. Note that when the signal medium is not light but an electrical high-frequency signal, signal lines 1, 4, and 11 may be waveguides.

[0058] The phase modulator 3 may be a modulator that changes the phase of light passing through it in response to a temperature change caused by a control signal (voltage, power, current). The phase modulator 3 may also be a modulator that changes the phase of light passing through it in response to a carrier density change caused by a control signal (voltage, power, current). The means for changing the phase is not limited to the phase modulator 3. Furthermore, the control signal does not need to be an electrical signal such as a voltage. The control signal is not particularly limited as long as it affects the phase of the light passing through it.

[0059] The multiplexing section 52 of the multiplexer 5 may have any configuration as long as the input light interferes within the space and the light resulting from the interference is output to the output side. It is desirable that the interference light does not leak from any waveguide other than the output side. It is also desirable that the light once entering the interference field does not return to the input side waveguide. The number of inputs and outputs does not have to be the same.

[0060] The current-voltage conversion circuit 7 may be realized by an amplifier circuit such as a transimpedance amplifier (TIA), or may be realized by a circuit composed of simple resistors. However, if high-speed AD conversion is expected, a TIA is preferable.

[0061] There are no limitations on the binarizer 8 as long as it outputs 0 or 1 according to a certain threshold. If adjustment of the threshold is not required, a logic element such as a digital buffer or digital inverter with a fixed threshold may be used.

[0062] The number of input bits and the number of output bits of the code converter 9 do not necessarily have to be the same.

[0063] (Effects, Functions) As described above, the analog-to-digital converters 100, 100A, and 100B of the present disclosure include a plurality of phase modulators 3, a combiner 5 that spatially and continuously combines a plurality of phase-modulated signals to produce signal conversions with different characteristics in the phase-modulated signals, and one or more binarizers 8 that binarize the signals output from the combiner 5 at an arbitrary threshold value.

[0064] With this configuration, input phase information is converted into nonlinear intensity information, for example, by a nonlinear conversion effect within the multiplexer 52 due to interference of coherent signals. As light propagates within the multiplexer 52, the primary processing (calculation) required to quantize the analog signal (input signal) is completed at the speed of light. Furthermore, as soon as the signal is input, processing proceeds in parallel, and a binary code string of any number of bits is output all at once. Furthermore, the power consumption during the processing (calculation) process in the multiplexer 52 is essentially zero. Therefore, it is possible to realize a low-power, high-speed, multi-bit ADC that exceeds the performance limits of ADCs realized with conventional electronic (electrical) circuits.

[0065] 6 is a diagram showing an example configuration of the multiplexer 5. The multiplexer 5 may include optical signal input lines 160A to 160E that constitute the input unit 51, a multiplexing unit 52, and optical signal output lines 180A to 180C that constitute the output unit 53. The optical signal input lines 160A to 160E each output an optical signal to the multiplexing unit 52. The multiplexing unit 52 multiplexes the optical signals input from the multiple optical signal input lines 160A to 160E. The optical signal output lines 180A to 180C output the optical signal multiplexed by the multiplexing unit 52. The multiplexer 5 may include five optical signal input lines 160A to 160E and three optical signal output lines 180A to 180C. However, the number of optical signal input lines and optical signal output lines is not limited to this example.

[0066] The refractive index of the optical signal input lines 160A to 160E is one of a plurality of refractive indices. However, the refractive index of the optical signal input lines 160A to 160E does not have to be the same. For example, the refractive index of the optical signal input lines 160A, 160B, and 160D is A, and the refractive index of the optical signal input lines 160C and 160E is B, which is different from A.

[0067] The optical signal input lines 160A to 160E have one of a plurality of lengths. However, the lengths of the optical signal input lines 160A to 160E do not all have to be the same. For example, the optical signal input lines 160A, 160B, and 160D have length A, and the optical signal input lines 160C and 160E have length B.

[0068] By making at least one or both of the refractive indexes or lengths of the optical signal input lines 160A to 160E irregular or non-uniform, the multiplexer 5 can convert the input optical signal into a signal having unique strengths and weaknesses due to differences in the refractive index of the input optical signal and output the signal. Note that, as described above, "irregular refractive index or length" means that the refractive index or length of the optical signal input lines 160A to 160E is one of a plurality of refractive indexes or lengths, and "non-uniform refractive index or length" means that the refractive indexes or lengths of the optical signal input lines 160A to 160E are all different.

[0069] The optical signal input line is not limited to one that varies in refractive index or length, as long as it can output a signal with unique strength from the input optical signal. Other examples of optical signal input lines will be described. Note that configuration examples and variations of the multiplexer 5 are publicly known, as shown in Figures 7 and 8 of Patent Document (JP 2022-80891 A), for example, and therefore detailed description thereof will be omitted.

[0070] Furthermore, the present disclosure is not limited to the above, and it goes without saying that various modifications can be made without departing from the spirit of the present disclosure.

[0071] The following additional notes are provided regarding the above-described embodiment.

[0072] (Supplementary Note 1) An analog-to-digital converter comprising: a plurality of signal lines that transmit electromagnetic continuous waves as source signals; a plurality of phase modulators that each modulate the phase of each of the plurality of source signals in accordance with an input signal; an input section that inputs a plurality of phase-modulated signals whose phases have been modulated by the plurality of phase modulators; a combiner having a combiner section that spatially and continuously combines the plurality of phase-modulated signals input to the input section and causes signal conversion in the phase-modulated signals; and one or more output sections that output signals that have been signal-converted by the combiner section; and one or more binarizers that each binarize the signals output from the combiner at an arbitrary threshold value.

[0073] (Supplementary Note 2) The analog-to-digital converter according to Supplementary Note 1, wherein a relationship of phase differences between the plurality of phase-modulated signals input to the multiplexing unit is made different for a second input signal that is different from a first input signal.

[0074] (Supplementary Note 3) The analog-to-digital converter according to Supplementary Note 1 or 2, further comprising a code converter that converts the binary code string output from the binarizer into an arbitrary code.

[0075] (Supplementary Note 4) The analog-to-digital converter according to any one of Supplementary Notes 1 to 3, wherein the multiplexing unit includes an object, structure, or mechanism that affects the signal during propagation of the signal within the multiplexing unit.

[0076] (Supplementary Note 5) The analog-to-digital converter according to Supplementary Note 4, wherein the effect includes at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal within the multiplexer.

[0077] (Supplementary Note 6) The analog-to-digital converter according to Supplementary Note 1, wherein the multiplexing unit spatially and continuously multiplexes the plurality of phase-modulated signals input to the input unit, and causes at least one of linear and nonlinear signal conversion on the phase-modulated signals.

[0078] (Supplementary Note 7) The analog-to-digital converter according to Supplementary Note 6, wherein the signal conversion is a non-artificial conversion.

[0079] This application is based on and claims the benefit of priority from patent application serial number 2024-007395, filed January 22, 2024, the entire contents of which are incorporated herein by reference.

[0080] REFERENCE SIGNS LIST 1 signal line 2 distributor 3 phase modulator 4 signal line 5 multiplexer 6 photodetector 7 current-to-voltage conversion circuit 8 binarizer 9 code converter 10 voltage regulator 11 signal line 51 input section 52 multiplexer 53 output section 100, 100A, 100B analog-to-digital converter 160A, 160B, 160C, 160D, 160E optical signal input line 180A, 180B, 180C optical signal output line LD laser light source

Claims

1. Using an electromagnetic continuous wave as a source signal, a plurality of signal lines for transmitting the source signal, a plurality of phase modulators each modulating the phase of each of the plurality of source signals according to an input signal, an input unit for inputting a plurality of phase-modulated signals whose phases are modulated by the plurality of phase modulators, a multiplexing unit for spatially and continuously multiplexing the plurality of phase-modulated signals input to the input unit to cause different signal conversions in the phase-modulated signals, and one or more output units for outputting the signals signal-converted by the multiplexing unit, and one or more binary converters each binarizing the signal output from the multiplexing unit at an arbitrary threshold value. An analog-to-digital converter comprising:

2. The analog-to-digital converter according to claim 1, wherein the relationship of the phase differences between the plurality of phase-modulated signals input to the multiplexing unit is made different for a second input signal different from the first input signal.

3. The analog-to-digital converter according to claim 1, further comprising a code converter for converting the binary code sequence output from the binary converter into an arbitrary code.

4. The analog-to-digital converter according to claim 1, wherein the multiplexing unit includes an object, a structure, or a mechanism that affects the signal during the process of signal propagation within the multiplexing unit.

5. The analog-to-digital converter according to claim 4, wherein the influence includes at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal within the multiplexing unit.

6. The analog-to-digital converter according to claim 1, wherein the multiplexing unit spatially and continuously multiplexes the plurality of phase-modulated signals input to the input unit to cause at least one of linear and non-linear signal conversions in the phase-modulated signals.

7. The analog-to-digital converter according to claim 6, wherein the signal conversion is a conversion without artificiality.

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