Radio-frequency power supply signal synchronization detection system

Abstract

The present application belongs to the technical field of radio-frequency power supply signal synchronization detection, and relates to a radio-frequency power supply signal synchronization detection system, which solves the problem of poor coherent accuracy caused by the delay of a signal transmitted through a line in an existing radio-frequency power supply signal synchronization process. The system comprises a splitter, N transmission lines with the same transmission capability and an equal length, and N radio-frequency power supply slaves, wherein an input end of the splitter is used for receiving a standard local oscillator clock signal; the splitter comprises N output ends, each output end is correspondingly connected to an input end of a radio-frequency power supply slave by means of a transmission line, and an output end of each radio-frequency power supply slave is connected to a corresponding vacuum cavity; and the standard local oscillator clock signal passes through the splitter and the transmission lines with an equal length to obtain reference local oscillator clock signals with the same time delay and phase, such that the reference local oscillator clock signals accessing the input end of each radio-frequency power supply slave are coherent.

Description

A radio frequency power signal synchronous detection system Technical Field

[0001] The present application relates to the technical field of radio frequency power supply signal synchronization detection, and in particular to a radio frequency power supply signal synchronization detection system. Background Art

[0002] RF power signal synchronization detection technology is practically applied in the RF power supply field to achieve output power coherence between multiple RF power supplies. Specifically, the frequency relationship between multiple RF power supplies is synchronized, resulting in a system architecture designed for complete coherence. In practice, vapor deposition (CVD) is a crucial step in semiconductor production. During large-scale CVD, plasma is often generated by multiple power supplies using the ICP effect, not just a single one. Therefore, in practical engineering design, it is impossible to achieve exact frequency alignment between multiple power supplies. Therefore, if multiple units are directly connected to a vacuum chamber, and the output frequencies of each power supply are very low, the alternating magnetic fields between each coil will couple and overlap due to the superposition effect, rendering the power control loop ineffective or even causing self-excitation. This creates a potentially lethal plasma environment. Currently, coherence is achieved by synchronizing these power supplies using the same clock frequency.

[0003] Current technology uses local oscillator coherence within each device. The principle is as follows: The master device has its own fixed clock source, and DDS technology is used to coherently synchronize its fixed clock source with a variable clock source. The slave devices' clocks are then interconnected based on the master's output clock to achieve coherence. Then, a phase calibration algorithm within the processor offsets the phase difference between each slave and the master.

[0004] A drawback of existing technology is that, based on the control loop of this AFC circuit, both the slave and master devices achieve the same phase lock as the master at the local oscillator (LO) small-signal level. However, in practice, signal transmission delays in the line result in poor phase coherence accuracy. Therefore, ensuring phase coherence accuracy is a pressing technical challenge in RF power signal synchronization.

[0005] Summary of the Invention

[0006] In view of the above analysis, the embodiments of the present application aim to provide a radio frequency power signal synchronization detection system to solve the problem of poor coherence accuracy caused by line transmission signal delay in the existing radio frequency power signal synchronization process.

[0007] The present application provides a radio frequency power signal synchronization detection system, the system comprising a splitter, N transmission lines with the same transmission capacity and length, and N radio frequency power slaves; wherein,

[0008] The input end of the splitter is used to receive a standard local oscillator clock signal; the splitter includes N output ends, each output end is connected to the input end of a corresponding RF power slave via a transmission line, and the output end of each RF power slave is connected to a corresponding vacuum cavity;

[0009] The standard local oscillator clock signal passes through a splitter and a transmission line of equal length to obtain a reference local oscillator clock signal with the same delay time and phase, so that the reference local oscillator clock signals connected to the input end of each of the RF power slaves are coherent.

[0010] Based on the above solution, this application also makes the following improvements:

[0011] Furthermore, each of the RF power slaves is provided with a phase synchronization module and a power output module having at least one of the same device specifications and operating capabilities; wherein,

[0012] The phase synchronization module is used to perform phase calibration on the slave local oscillator clock signal of the RF power slave using the reference local oscillator clock signal as a reference, and output a corresponding frequency drive control signal;

[0013] The power output module is used to output a corresponding radio frequency power signal under the drive of the frequency drive control signal, so as to achieve phase control of the vacuum cavity excitation.

[0014] Furthermore, the phase synchronization module includes a phase shift unit and a DDS unit; wherein,

[0015] The phase shift unit is used to perform phase calibration on the slave local oscillator clock signal with reference to the reference local oscillator clock signal, and output a phase-shifted frequency word corresponding to the clock frequency after phase calibration;

[0016] The DDS unit is used to output a frequency driving control signal corresponding to the phase-shift frequency word under the control of the phase-shift frequency word.

[0017] Furthermore, the phase shifting unit is implemented by a phase shifter.

[0018] Furthermore, the phase shifting unit is realized by connecting a first phase shifter and a second phase shifter; wherein,

[0019] The first input end of the first phase shifter is connected to the reference local oscillator clock signal, the second input end of the first phase shifter is connected to the slave local oscillator clock signal, and the output end of the first phase shifter is connected to the first input end of the second phase shifter; the second input end of the second phase shifter is connected to the frequency signal collected from the vacuum cavity, and the output end of the second phase shifter is connected to the frequency control word input end of the DDS module.

[0020] Furthermore, the first phase shifter is used to perform initial phase calibration on the slave local oscillator clock signal with reference to the reference local oscillator clock signal, and calibrate the slave clock frequency to the master clock frequency for output;

[0021] The second phase shifter is used to perform secondary phase calibration on the slave clock frequency after the initial phase calibration of the first phase shifter according to the frequency signal collected from the vacuum cavity, and output a phase-shifted frequency word corresponding to the clock frequency after the phase calibration.

[0022] Furthermore, the slave local oscillator clock signals of the N RF power slaves are all the same. In this case, the RF power signals provided to the vacuum chambers connected to the respective RF power slaves are also the same.

[0023] Furthermore, in the power output module, the phase control of the vacuum cavity excitation includes dynamic phase adjustment, phase solidification or phase difference locking.

[0024] Furthermore, the slave local oscillator clock signals of the N RF power slaves are preset with different phase shifts. At this time, the RF power signal provided to the vacuum cavity connected to each RF power slave also has a phase deviation matching the preset shift.

[0025] Furthermore, the system includes two RF power slave machines, and the output ends of the two RF power slave machines are respectively connected to the upper motor and the lower motor of the same vacuum chamber.

[0026] Furthermore, the N transmission lines have the same transmission capabilities, including: the specifications of the transmission lines are the same, the signal transmission capabilities of the transmission lines are the same, and the structures of the transmission lines are the same.

[0027] Furthermore, the system also includes one of a host computer and a radio frequency power supply host, which is used to output the standard local oscillator clock signal.

[0028] Compared with the prior art, this application can achieve at least one of the following beneficial effects:

[0029] The RF power signal synchronization detection system provided in this application provides the same delay time and phase input to each RF power slave by providing a splitter and ensuring that the transmission lines between the splitter and each RF power slave have the same transmission capacity and length. This ensures that each RF power slave B receives a reference local oscillator clock signal with the same delay time and phase, thereby making the reference local oscillator clock signals connected to the input terminals of each RF power slave coherent. This effectively solves the problem of poor coherence accuracy caused by line transmission signal delays in existing RF power signal synchronization processes. Furthermore, the widespread application of this system effectively reduces wafer scrapping due to uneven power distribution caused by the superposition effect and open-loop power amplifier phase response drift, effectively increasing the yield of semiconductor wafers.

[0030] In this application, the above-mentioned technical solutions can be combined with each other to achieve more preferred combination solutions. Other features and advantages of this application will be described in the subsequent description, and some advantages will become apparent from the description or be understood by practicing this application. The objectives and other advantages of this application can be achieved and obtained through the contents particularly pointed out in the description and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings are only used for the purpose of illustrating specific embodiments and are not to be considered as limiting the present application. Throughout the drawings, the same reference symbols denote the same components.

[0032] FIG1 is a schematic structural diagram of a radio frequency power signal synchronization detection system provided in an embodiment of the present application (with a matching device);

[0033] FIG2 is another structural diagram of the radio frequency power signal synchronization detection system provided in an embodiment of the present application (without a matching device);

[0034] FIG3 is a first internal structure of a RF power supply slave provided in an embodiment of the present application;

[0035] FIG4 is a second internal structure of a RF power supply slave provided in an embodiment of the present application;

[0036] FIG5 is a third internal structure of the RF power supply slave provided in an embodiment of the present application;

[0037] FIG6 is a diagram of a radio frequency power supply signal synchronization detection system (with a matching device) when two radio frequency power supply slaves are connected to the same CCP vacuum chamber, provided in an embodiment of the present application;

[0038] FIG7 is a diagram of a radio frequency power supply signal synchronization detection system (without a matching device) when two radio frequency power supply slaves are connected to the same CCP vacuum chamber, as provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] The preferred embodiments of the present application are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the present application and are used together with the embodiments of the present application to illustrate the principles of the present application, and are not used to limit the scope of the present application.

[0040] A specific embodiment of the present application discloses a radio frequency power supply signal synchronization detection system, the structural schematic diagram of which is shown in Figures 1 and 2. The system includes a splitter, N transmission lines with the same transmission capacity and equal length, and N radio frequency power supply slaves; wherein the input end of the splitter is used to receive a standard local oscillator clock signal; the splitter includes N output ends, each output end is connected to the input end of a corresponding radio frequency power supply slave via a transmission line, and the output end of each radio frequency power supply slave is connected to a corresponding vacuum cavity; the standard local oscillator clock signal passes through the splitter and the transmission lines of equal length to obtain a reference local oscillator clock signal with the same delay time and phase, so that the reference local oscillator clock signals connected to the input ends of each of the radio frequency power supply slaves are coherent.

[0041] During the specific implementation process, it is also necessary to determine whether to add a matcher between the RF power slave and the vacuum cavity according to the specific application scenario. By adding a matcher between the RF power slave and the vacuum cavity, the matching between the RF power slave and the vacuum cavity is achieved. At the same time, in this embodiment, the transmission capabilities of the N transmission lines are the same (the "same" here means exactly the same or almost the same), including: the specifications of the transmission lines are the same (that is, exactly the same or almost the same), the signal transmission capabilities of the transmission lines are the same (that is, exactly the same or almost the same), and the structures of the transmission lines are the same (that is, exactly the same or almost the same). More specifically, the transmission capabilities of the transmission lines are the same, which means that the differences in amplitude, phase, frequency, etc. of the same signal from one end to the other end of different transmission lines are very small, and can be self-adjusted by the internal algorithm of the RF power supply, and the synchronization of the devices of each RF power supply is achieved through signal synchronization with minimal differences.

[0042] Preferably, in this embodiment, the system further includes one of a host computer and a RF power supply host, configured to output a standard local oscillator clock signal. Furthermore, other devices capable of outputting a standard local oscillator clock signal may be used in place of the host computer and the RF power supply host. In a specific implementation, a transmission line CABLE1 is also present between the host computer / RF power supply host and the splitter. Therefore, after the standard local oscillator clock signal CLKA output by the host computer / RF power supply host is transmitted to the splitter via CABLE1, the splitter receives a signal CLKA-1 that has undergone a first delay. Signal CLKA-1 is then distributed to each RF power slave by a splitter. Because the transmission line CABLE2 between splitter D and each RF power slave has the same transmission capacity and length, the delay time and phase input to each RF power slave are the same. That is, each RF power slave B receives the reference local oscillator clock signal CLKA-2 with the same delay time and phase. This allows the reference local oscillator clock signals connected to the input of each RF power slave to be coherent. This effectively solves the problem of poor coherence accuracy caused by line transmission signal delay in the existing RF power signal synchronization process. At the same time, it reduces the waste caused by uneven power distribution due to the superposition effect and open-loop power amplifier phase response drift, which can effectively increase the yield of semiconductor wafer production.

[0043] Preferably, each of the RF power slaves is provided with a phase synchronization module and a power output module with at least one of the same device specifications and operating capabilities. The phase synchronization module and the power output module can be provided within the FPGA within the RF power slave. The phase synchronization module is used to perform phase calibration on the slave local oscillator clock signal (CLKB) of the RF power slave using the reference local oscillator clock signal as a reference and output a corresponding frequency drive control signal. The power output module is used to output a corresponding RF power signal under the drive of the frequency drive control signal to achieve phase control of the vacuum cavity excitation. In the power output module, the phase control of the vacuum cavity excitation includes dynamic phase adjustment, phase fixation, or phase difference locking. Exemplarily, the power output module has a built-in drive source and a power amplifier. Under the drive of the frequency drive control signal, the drive source is controlled to output a power waveform of a specified phase and frequency, and the power waveform is amplified by the power amplifier to output the RF power signal.

[0044] The phase synchronization module includes a phase shift unit and a DDS unit; wherein the phase shift unit is used to perform phase calibration on the slave local oscillator clock signal with the reference local oscillator clock signal as a reference, and output a phase-shifted frequency word corresponding to the clock frequency after phase calibration; the DDS unit is used to output a frequency drive control signal corresponding to the phase-shifted frequency word under the control of the phase-shifted frequency word.

[0045] Preferably, the phase shift unit is implemented by a phase shifter. In this case, the internal structure of the RF power slave is shown in FIG3 .

[0046] Preferably, the phase shifting unit is implemented by connecting a first phase shifter and a second phase shifter. In this case, the internal structure of the RF power slave is shown in Figure 4. The first input of the first phase shifter is connected to the reference local oscillator clock signal, the second input of the first phase shifter is connected to the slave local oscillator clock signal, and the output of the first phase shifter is connected to the first input of the second phase shifter; the second input of the second phase shifter is connected to the frequency signal collected from the vacuum cavity, and the output of the second phase shifter is connected to the frequency control word input of the DDS module. In this case, the first phase shifter is used to perform an initial phase calibration on the slave local oscillator clock signal with the reference local oscillator clock signal as a reference, and calibrate the slave clock frequency to the master clock frequency for output; the second phase shifter is used to perform a secondary phase calibration on the slave clock frequency after the initial phase calibration of the first phase shifter based on the frequency signal collected from the vacuum cavity, and output the phase-shifted frequency word corresponding to the clock frequency after the phase calibration.

[0047] In addition, a cavity signal feedback loop can also be set inside the RF power slave, which can be specifically set in the FPGA inside the RF power slave, for establishing a feedback channel from the vacuum cavity powered by the RF power slave to the second phase shifter, and feeding back the frequency signal collected from the vacuum cavity to the second phase shifter through the feedback channel. At this time, the internal structure of the RF power slave is shown in Figure 5. Preferably, in the cavity signal feedback loop, an analog signal including the frequency and phase information of the signal inside the vacuum cavity is obtained by induction or coupling of a single electric field signal inside the vacuum cavity. Specifically, the signal of the single electric field inside the vacuum cavity can be coupled (induced) by setting a cavity probe at a suitable position inside the vacuum cavity. Preferably, a cavity probe is placed inside the vacuum cavity near the position where the electric field is strongest at the excitation point inside the cavity; the single electric field signal is coupled by the cavity probe to collect an analog signal including the frequency and phase information of the signal inside the vacuum cavity. Specifically, the cavity signal feedback loop also includes an attenuator; the attenuator is used to attenuate the amplitude of the collected analog signal to obtain an attenuated analog signal. The attenuated analog signal is converted by the ADC and fed into the FPGA (MCU). The MCU calculates the frequency of the signal inside the vacuum cavity and feeds it back to the second phase shifter. By adding a cavity signal feedback loop, a closed-loop frequency control system is formed. All components in the signal chain have no open-loop components, ensuring controllable signal integrity and preventing phase fluctuations and fluctuations caused by exogenous sources.

[0048] It should be noted that, from the perspective of the architecture of this system, although the entire loop is not a closed loop, the architecture of the RF power slaves below each splitter is consistent. Combined with the same length of the transmission path from the splitter to the RF power slave, the working rhythm of each RF power slave is easy to achieve dynamic phase adjustment, phase solidification or phase difference locking, so it can be applied to many-to-one collaborative chambers and one-to-one independent chambers. Therefore, the system provided by this embodiment can be applied in the following scenarios:

[0049] (1) Multi-chamber same process control, same-phase clock signal control:

[0050] The same control mode and phase shift mode are used to control the slave local oscillator clock signals of the N RF power slaves to be the same. At this time, the RF power signals provided to the vacuum chamber connected to each RF power slave are also the same.

[0051] (2) One-to-one independent chamber, clock signal control with different phase shifts:

[0052] The slave local oscillator clock signals of the N RF power slaves are preset with different phase shifts, thereby realizing dynamic phase adjustment, phase solidification or phase difference locking of each RF power slave, and having higher technical applicability. At this time, the RF power signal provided to the vacuum cavity connected to each RF power slave also has a phase deviation that matches the preset shift. Exemplarily, the system includes two RF power slaves, and the output ends of the two RF power slaves are respectively connected to the upper motor and the lower motor of the same vacuum cavity. According to the bias control principle of the upper motor and the lower motor of the same vacuum cavity, the slave local oscillator clock signals with different phase shifts are preset for the two RF power slaves to realize the bias control of the upper motor and the lower motor of the same vacuum cavity. The RF power signal synchronization detection system when the two RF power slaves are connected to the same CCP vacuum cavity is shown in Figure 6 (matching device is set) and Figure 7 (matching device is not set). In Figures 6 and 7, one RF power slave provides RF and the other RF power slave provides bias.

[0053] In addition, to ensure the implementation effect of the system in this implementation, during the specific implementation process, the group delay of the output part of the RF power slave (power amplifier + matching device) is as low as possible; at the same time, the design of the probe inside the vacuum cavity needs to be reasonable, and the crosstalk between the electric field and the magnetic field should be small.

[0054] Those skilled in the art will appreciate that all or part of the process steps of the above-described method embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium, such as a magnetic disk, an optical disk, a read-only memory, or a random access memory.

[0055] The above is only a preferred specific implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any changes or replacements that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed in this application should be covered by the scope of protection of the present application.

Claims

1. A radio frequency power signal synchronization detection system, characterized in that: The system includes a splitter, N transmission lines with the same transmission capacity and length, and N RF power slaves; wherein, The input end of the splitter is used to receive a standard local oscillator clock signal; the splitter includes N output ends, each output end is connected to the input end of a corresponding RF power slave via a transmission line, and the output end of each RF power slave is connected to a corresponding vacuum cavity; The standard local oscillator clock signal passes through a splitter and a transmission line of equal length to obtain a reference local oscillator clock signal with the same delay time and phase, so that the reference local oscillator clock signals connected to the input end of each of the RF power slaves are coherent.

2. The radio frequency power signal synchronization detection system according to claim 1, characterized in that: Each of the RF power slaves is provided with a phase synchronization module and a power output module having at least one of the same device specifications and operating capabilities; wherein, The phase synchronization module is used to perform phase calibration on the slave local oscillator clock signal of the RF power slave using the reference local oscillator clock signal as a reference, and output a corresponding frequency drive control signal; The power output module is used to output a corresponding radio frequency power signal under the drive of the frequency drive control signal, so as to achieve phase control of the vacuum cavity excitation.

3. The radio frequency power signal synchronization detection system according to claim 2, characterized in that: The phase synchronization module includes a phase shift unit and a DDS unit; wherein, The phase shift unit is used to perform phase calibration on the slave local oscillator clock signal with reference to the reference local oscillator clock signal, and output a phase-shifted frequency word corresponding to the clock frequency after phase calibration; The DDS unit is used to output a frequency driving control signal corresponding to the phase-shift frequency word under the control of the phase-shift frequency word.

4. The radio frequency power supply signal synchronization detection system according to claim 3, characterized in that: The phase shifting unit is implemented by a phase shifter.

5. The radio frequency power signal synchronization detection system according to claim 3, characterized in that: The phase shift unit is realized by connecting a first phase shifter and a second phase shifter; wherein, The first input end of the first phase shifter is connected to the reference local oscillator clock signal, the second input end of the first phase shifter is connected to the slave local oscillator clock signal, and the output end of the first phase shifter is connected to the first input end of the second phase shifter; the second input end of the second phase shifter is connected to the frequency signal collected from the vacuum cavity, and the output end of the second phase shifter is connected to the frequency control word input end of the DDS module.

6. The radio frequency power signal synchronization detection system according to claim 5, characterized in that: The first phase shifter is used to perform initial phase calibration on the slave local oscillator clock signal with reference to the reference local oscillator clock signal, and calibrate the slave clock frequency to the master clock frequency for output; The second phase shifter is used to perform secondary phase calibration on the slave clock frequency after the initial phase calibration of the first phase shifter according to the frequency signal collected from the vacuum cavity, and output a phase-shifted frequency word corresponding to the clock frequency after the phase calibration.

7. The radio frequency power supply signal synchronization detection system according to any one of claims 2 to 6, characterized in that: The slave local oscillator clock signals of the N RF power slaves are all the same. At this time, the RF power signals provided to the vacuum chamber connected to each RF power slave are also the same.

8. The radio frequency power signal synchronization detection system according to any one of claims 2 to 6, characterized in that: In the power output module, the phase control for vacuum cavity excitation includes dynamic phase adjustment, phase solidification or phase difference locking.

9. The radio frequency power signal synchronization detection system according to claim 8, characterized in that: The slave local oscillator clock signals of the N RF power slaves are preset with different phase shifts. At this time, the RF power signal provided to the vacuum cavity connected to each RF power slave also has a phase deviation that matches the preset shift.

10. The radio frequency power supply signal synchronization detection system according to claim 8, characterized in that: The system includes two radio frequency power slave machines, and the output ends of the two radio frequency power slave machines are respectively connected to an upper motor and a lower motor of the same vacuum chamber.

11. The radio frequency power supply signal synchronization detection system according to any one of claims 1 to 6, characterized in that: The N transmission lines have the same transmission capabilities, including: the same specifications of the transmission lines, the same signal transmission capabilities of the transmission lines, and the same structures of the transmission lines.

12. The radio frequency power supply signal synchronization detection system according to any one of claims 1 to 6, characterized in that: The system further includes one of a host computer and a radio frequency power supply host, which is used to output the standard local oscillator clock signal.

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