Electronic device with electrically functional component providing electric functions and connecting component carriers

Abstract

An electronic device (100) which comprises a first component carrier (102) comprising at least one first electrically conductive layer structure (104) and at least one first electrically insulating layer structure (106), a second compo- nent carrier (112) comprising at least one second electrically conductive layer structure (114) and at least one second electrically insulating layer structure (116), and at least one electrically functional component (110) configured for providing at least two electric functions and connecting the first component carrier (102) with the second component carrier (112) so as to define a cen- tral space (108) in between.

Description

[0001] Electronic device with electrically functional component providing electric functions and connecting component carriers

[0002] Field of the Invention

[0003] The invention relates to an electronic device, to a computing apparatus, and to a method of manufacturing an electronic device.

[0004] Technological Background

[0005] In the context of growing product functionalities of component carriers equipped with one or more components and increasing miniaturization of such components as well as a rising number of components to be connected to the component carriers such as printed circuit boards or component carriers, increasingly more powerful array-like components or packages having several components are being employed, which have a plurality of contacts or connections, with smaller and smaller spacing between these contacts. In particular, component carriers shall be mechanically robust and electrically reliable so as to be operable even under harsh conditions.

[0006] Component carriers may also form the basis for more complex electronic devices. However, electrical and thermal reliability of such electronic devices may be an issue.

[0007] Summary of the Invention

[0008] There may be a need to form an electronic device with high degree of electronic functionality and with high electrical and thermal reliability.

[0009] According to an exemplary embodiment of the invention, an electronic device is provided which comprises a first component carrier comprising at least one first electrically conductive layer structure and at least one first electrically insulating layer structure, a second component carrier comprising at least one second electrically conductive layer structure and at least one second electrically insulating layer structure, and at least one electrically functional component configured for providing at least two electric functions and connecting the first component carrier with the second component carrier so as to define a central space in between. According to another exemplary embodiment of the invention, a computing apparatus is provided which comprises an electronic device having the above-mentioned features.

[0010] According to still another exemplary embodiment of the invention, a method of manufacturing an electronic device is provided, wherein the method comprises providing a first component carrier comprising at least one first electrically conductive layer structure and at least one first electrically insulating layer structure, providing a second component carrier comprising at least one second electrically conductive layer structure and at least one second electrically insulating layer structure, connecting the first component carrier with the second component carrier by at least one electrically functional component in between so as to define a central space between the first component carrier and the second component carrier, and configuring the at least one electrically functional component for providing at least two electric functions.

[0011] In the context of the present application, the term "electronic device" may particularly denote a device providing an electronic functionality and being composed of a plurality of electrically, mechanically and / or thermally interconnected electronic constituents, such as one or more component carriers, one or more electronic components, one or more interface structures, etc.

[0012] In the context of the present application, the term "component carrier" may particularly denote any support structure which is capable of accommodating one or more components thereon and / or therein for providing mechanical support and / or electrical connectivity. In other words, a component carrier may be configured as a mechanical and / or electronic carrier for components. In particular, a component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. For example, a component carrier may be a rigid-flex carrier, or a flexible substrate. A component carrier may also be a hybrid board combining different ones of the above-mentioned types of component carriers. In particular, a component carrier may comprise a stack comprising a plurality of electrically conductive layer structures and / or electrically insulating layer structures.

[0013] In the context of the present application, the term "stack" may particularly denote a flat or planar sheet-like body. For instance, the stack may be a layer stack, in particular a laminated layer stack or a laminate. Such a laminate may be formed by connecting a plurality of layer structures, which preferably may be arranged in a parallel manner, by the application of mechanical pressure and / or heat.

[0014] In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of non- consecutive islands within a common plane.

[0015] In the context of the present application, the term "electrically functional component configured for providing at least two electric functions" may particularly denote a structural body spacing the component carriers and providing at least two types of electric functionality. Said at least two types of electric functionality may comprise the provision of two or more different electric functions, which may be distinguished functionally. It may also be possible that the at least two electric functions provided by the electrically functional component are distinguishable spatially, in particular are provided in at least two different spatial regions of the electrically functional component.

[0016] In the context of the present application, the term "central space between first and second component carriers" may particularly denote a hollow accommodation volume defined by and delimited between the component carriers and the at least one electrically functional component. Such an accommodation volume may serve for accommodating at least one further constituent of the electronic device, in particular may accommodate one or more electronic components. Said one or more electronic components may be assembled to one or both of the component carriers in the central space.

[0017] In the context of the present application, the term "computing apparatus" may particularly denote any apparatus providing a computing functionality. In particular, a computing apparatus may comprise at least one processor for processing data or information and / or at least one memory for storing data or information. The computing apparatus may comprise the electronic device, and optionally at least one further constituent. For example, the computing apparatus may be a server or desktop computer, a laptop, a smartphone, a communications device, or a personal digital assistant.

[0018] In the context of the present application, the term "main surface" of a body may particularly denote one of two largest opposing surfaces of the body. The main surfaces may be connected by circumferential side walls. The thickness of a body, such as a stack, may be defined by the distance between the two opposing main surfaces.

[0019] According to an exemplary embodiment of the invention, an electronic device (such as a package or module) comprises a first component carrier (such as an integrated circuit substrate or a printed circuit board) which may comprise a (for instance laminated) layer stack of electrically conductive and electrically insulating layer structures and a second component carrier (such as an integrated circuit substrate or a printed circuit board) which may also comprise a (for instance laminated) layer stack of electrically conductive and electrically insulating layer structures. Advantageously, one or more electrically functional components configured for providing different electric functions may connect the first component carrier with the second component carrier for delimiting a central space in between. Thus, the one or more electrically functional components may fulfil a plurality of functions and may thus be multifunctional. Firstly, they may provide at least two different electric functions, such as an electric power supply function and an electric power return function (for instance by providing access to an electric reference potential), and may therefore contribute to the electronic functionality of the electronic device. Simultaneously, the at least one electrically functional component may function as a mechanical spacer maintaining a distance between the first and second component carriers so as to define a central space between them. The latter may accommodate at least one other constituent of an electronic device, in particular one or more electronic components (such as semiconductor chips) and / or an interposer. Such at least one other constituent may be mechanically protected in the central space and can be arranged with low space consumption. It is also possible that said at least one other constituent electrically cooperates with at least one of the component carriers. This may lead to a compact design of the electronic device as a whole. Furthermore, this may promote short signal paths and thus low losses and high signal quality.

[0020] Detailed Description of Exemplary Embodiments

[0021] In the following, further exemplary embodiments of the electronic device, the computing apparatus, and the method will be explained. In an embodiment, the at least two electric functions correspond to at least two different electric domains, at least two different voltage levels and / or at least two different current carrying capabilities. The two different electric domains may be different and separated spatial regions of the electronic device in which different electric conditions are present. For instance, one electric function may be the provision of a first voltage and another electric function may be the provision of a second voltage being different from the first voltage. Correspondingly, the at least two electric functions may also be a first current carrying capability and a second current carrying capability different from the first current carrying capability.

[0022] In an embodiment, the at least two different electric domains comprise a power domain and an electric reference potential domain, in particular an electric ground domain. In particular, one section of the electrically functional component may correspond to electric power supply (for instance to supply at least one electronic component in the central space with electric power), whereas another section of the electrically functional component may correspond to the provision of an electric reference potential, such as a ground potential, or a power return path (for example for connection with at least one electronic component).

[0023] In an embodiment, the at least one electrically functional component comprises a first connecting surface facing the first component carrier and having a first connection portion and a second connection portion, and comprises a second connecting surface having a third connection portion and a fourth connection portion and facing the second component carrier, wherein the first connection portion and the third connection portion are electrically connected with each other and are configured to provide one of the at least two electric functions between the first component carrier and the second component carrier, and wherein the second connection portion and the fourth connection portion are electrically connected with each other and are configured to provide another one of the at least two electric functions between the first component carrier and the second component carrier. To put it shortly, the described configuration may establish two separated electrically conductive paths between the component carriers via the electrically functional component. Consequently, the electrically functional component may support or enable two different electric functions which are spatially and electrically separated from each other while simultaneously functioning as a mechanically connecting spacer between the component carriers. For example, interconnections of and to the at least one electrically functional component may be arranged on a side wall of the at least one electrically functional component and / or a respective component carrier, in a central region of the at least one electrically functional component and / or a respective component carrier, coaxially with other interconnections, etc. (see the figures with respect to different locations and shapes).

[0024] In an embodiment, the at least one electrically functional component forms an integral part of the first component carrier and / or of the second component carrier. In particular, a respective electrically functional component may be pre-formed with or pre-assembled on the second component carrier (or the first component carrier). This may reduce the number of pieces to be handled during manufacture of the electronic device, since a connection of one body composed of the second component carrier and the electrically functional component(s) with another body in form of the first component carrier may be a simple task.

[0025] In an embodiment, a first connecting surface of the at least one electrically functional component is in contact with a main surface of the first component carrier and / or a second connecting surface of the at least one electrically functional component is in contact with a main surface of the second component carrier. Thus, a direct connection of the component carriers may be established through the at least one electrically functional component only. This may promote short electric parts between the component carriers and may thus lead to a low loss configuration, in particular in terms of electric power supply.

[0026] In an embodiment, the at least one electrically functional component comprises at least one third electrically conductive layer structure and at least one third electrically insulating layer structure, wherein the at least one third electrically conductive layer structure is coupled with the at least one first electrically conductive layer structure and / or with the at least one second electrically conductive layer structure, and / or wherein the at least one third elec- trically insulating layer structure is coupled with the at least one first electrically insulating layer structure and / or with the at least one second electrically insulating layer structure. More specifically, different third electrically conductive layer structures may be present at a respective electrically functional component, each of said third electrically conductive layer structures coupling a respective first electrically conductive layer structure of the first component carrier with a respective second electrically conductive layer structure of the second component carrier. It may also be possible that a third electrically insulating layer structure of a respective electrically functional component may couple a respective first electrically insulating layer structure of the first component carrier with a respective second electrically insulating layer structure of the second component carrier to provide a reliable electric decoupling function. In particular, separate electrically conductive paths and an electrically insulating path in between may be established between the component carriers via the respective electrically functional component. This may simplify the provision of at least two separated electric functions. Advantageously, two third electrically conductive layer structures may function as capacitor plates and the third electrically insulating layer structure in between may function as a capacitor dielectric for adding a capacitor function to the electronic device.

[0027] In an embodiment, the at least one electrically functional component comprises at least two electrically functional components, in particular a plurality of electrically functional components arranged along an annular path, each configured for providing the at least two electric functions and each connecting the first component carrier with the second component carrier so as to define the central space in between. For example, an annular path, an array, and / or distributed clusters or groups of electrically functional components may be distributed alongside the periphery on the component carriers. For instance, it may be possible to place capacitors along all four sides surrounding an electronic component such as a micro-processor. For instance, at least 10, preferably at least 50, of such electrically functional components may be present between the component carriers. Advantageously, the electrically functional components may be arranged as a ring between the component carriers to be connected. This may provide a reliably protected central space delimited by the component carriers and the ring of electrically functional components for protecting one or more further constituents in the central space, such as at least one electronic component accommodated in the central space. Moreover, the provision of a large plurality of electrically functional components may for instance provide a powerful capacitor system between the component carriers. In an embodiment, it may be possible that the functional component has a one-way functionality. By arranging the functional component in a first manner, current may be guided from top to bottom only, by flipping it upside down, it may be vice versa.

[0028] In an embodiment, the at least one electrically functional component comprises at least one passive component (for instance a capacitor, an inductor, an ohmic resistor, etc.). This may further refine the electric performance of the electronic device.

[0029] In an embodiment, the at least one electrically functional component comprises or consists of at least one capacitor. It may be preferred that each of the (or some) electrically functional components is embodied as a respective capacitor. Electronic devices with interconnected component carriers and one or more electronic components (in particular semiconductor chips) in between may need capacitors for certain functions, such as temporary energy storage, smoothing, filtering, etc. Apart from its tasks of spacing the component carriers and providing the at least two electric functions, the electrically functional components may thus also provide a capacitor function.

[0030] In an embodiment, the electronic device comprises at least one electronic component, in particular a plurality of electronic components, arranged in the central space. In the context of the present application, the term "electronic component" may particularly denote a member fulfilling an electronic task as part of an electronic circuit or electronic device. Such an electronic component may be an active electronic component or a passive electronic component. An active electronic component may be an electronic member that relies on an external power source to control or modify electrical signals. Active electronic components, such as transistors and Silicon-controlled rectifiers, may use electricity to control electricity. Further examples for active electronic components are diodes, thyristors, field effect transistors (FETs), MOSFETs, JFETs, optoelectronic members, and oscillators. Active components may be ca- pable to inject power into a circuit and may be capable of electrically controlling and / or amplifying the flow of electrical current. For instance, the active electronic component may be a semiconductor chip comprising a semiconductor material, in particular as a primary or basic material. The semiconductor material may for instance be a type IV semiconductor such as silicon or germanium, or may be a type III-V semiconductor material such as gallium arsenide and / or indium phosphide. In particular, the chip may be a bare die or a moulded die. At least one integrated circuit element may be monolithically integrated in such a chip. A passive electronic component may for instance be a capacitor, an inductor or an ohmic resistance.

[0031] In an embodiment, the at least one electronic component is electrically connected to the first component carrier and to the second component carrier. Such a configuration may form the basis for an electric power supply to the at least one electronic component from one side (in particular via the second component carrier) and for an electric signal transfer (which may be unidirectional or bidirectional) with the at least one electronic component from the other side (in particular via the first component carrier).

[0032] In an embodiment, the at least one electronic component is flexible at least in a stack thickness direction. This may bring the advantage of compensating thickness differences between the electronic component and the stack in the middle (where the one or more electronic components are located). If the electronic component thickness is a bit smaller than the thickness of the middle stack, during pressing or lamination the component carrier and / or the second component carrier may be bent towards the electronic component. After this process, the bent layers may relax to their initial flat position by stretching the electronic component a bit. This may ensure a reliable contact of the electronic component to the first and second component carrier.

[0033] In an embodiment, the at least one electronic component comprises a first main surface electrically coupled with the first component carrier, and comprises an opposing second main surface electrically coupled with the second component carrier and through the at least one electrically functional component with the first component carrier. For the coupling, the at least one electronic component may be equipped with pads, terminals and / or contacting elements (such as solder structures) on both opposing main surfaces thereof. In an embodiment, the first main surface of the at least one electronic component is configured for a transmission of electric signals between the at least one electronic component and the first component carrier. In particular, electric power supply may be from the first component carrier through the at least one electrically functional component and the second component carrier into the second main surface of the at least one electronic component. The electric signal transfer may be along another separate path between first component carrier and the at least one electronic component, i.e. through the first main surface and without involving second component carrier and the at least one electrically functional component in the electric signal transfer.

[0034] In an embodiment, the second main surface of the at least one electronic component is configured for receiving electric power from the first component carrier via the at least one electrically functional component and the second component carrier. Correspondingly, a power return path may extend from the at least one electronic component through the second component carrier and the at least one electrically functional component into the first component carrier.

[0035] In an embodiment, a ratio between a volume occupied by the at least one second electrically conductive layer structure and a volume occupied by the at least one second electrically insulating layer structure is higher than another ratio between a volume occupied by the at least one first electrically conductive layer structure and a volume occupied by the at least one first electrically insulating layer structure. For example, a difference between said ratio and said other ratio divided by said ratio is in a range from 0.3 to 0.7. To put it shortly, the metal content in the second component carrier may be larger than the metal content in the first component carrier. This may reflect the fact that the electric power transfer may be accomplished predominantly through the second component carrier. A locally increased metal content in the second component carrier may thus be advantageous to prevent overheating and to avoid excessive ohmic losses of the supplied electric power. Electric signal supply through the first component carrier may be less critical in terms of heat development and losses, so that a lower relative metal content in the first component carrier may be acceptable. In an embodiment, the first component carrier is configured for transmission of electric signals with the at least one electronic component and the second component carrier is configured for delivering electric power to the at least one electronic component. By separating the electric power supply path from the electric signal supply path, a competition between these two tasks may be prevented. This may suppress distortions and may simplify heat management, since heat dissipation can be predominantly focused on the portion of the electronic device relating to electric power supply.

[0036] In an embodiment, the electronic device comprises at least one embedded component, in particular a plurality of embedded components, being embedded in the first component carrier, in particular providing a voltage control function and / or a power management function. Various functions may be possible in this context, for example a power module integrated circuit (PMIC), a fully integrated voltage regulator (IVR), a step-down buck converter, and / or a booster converter increasing voltage may be implemented. The embedded components may be active components and / or passive components. For instance, one or more DC-DC converters, one or more inductors, and / or one or more capacitors may be embedded in the first component carrier. This may also lead to a compact design.

[0037] In an embodiment, the at least one second electrically conductive layer structure comprises a multi-layer structure comprising at least two stacked layer structures of different electrically conductive materials. In the context of the present application, the term "multi-layer structure" may particularly denote an electrically conductive structure comprising or consisting of at least two stacked layers of different electrically conductive materials (such as metals or alloys). In an example, the materials may be different, when at least one physical and / or chemical property, for example the redox potential or the melting point, is different from one to the respective other material. Even if the first material, for example copper, and the second material, for example molybdenum-copper, comprise the same material, they may be considered to be different. For example, the multi-layer structure may be a double layer or a triple layer. In particular, the multi-layer structure may comprise at least three or at least five stacked electrically conductive layer structures. For instance, the multi-layer structure may comprise at least one layer comprising copper. Additionally or alternatively, the multi-layer structure may comprise at least one layer comprising molybdenum. Other materials are possible, including Invar, molybdenum-copper, etc. Preferably, at least two, in particular at least three, of the stacked electrically conductive material layers of the multi-layer structure are in direct contact with each other. Alternatively, the multi-layer structure may comprise electrically insulating layers, separating the electrically conductive layers. The mentioned construction of the multi-layer structure may provide advantageous thermal expansion properties and may reduce a coefficient of thermal expansion (CTE) mismatch with a different material of other constituents of an electronic device comprising said component carrier, such as one or more semiconductor chips. As a result, undesired phenomena such as warpage and delamination may be efficiently suppressed by the described construction of the multi-layer structure. Furthermore, electric power may be transmitted by the multi-layer structure as a whole, so that the entire multi-layer structure may act as a single power conductor.

[0038] In an embodiment, the electronic device comprises a first interface structure, in particular a signal interposer, in an interface region between the first component carrier and the at least one electronic component, in particular configured as stress relief structure. Said first interposer structure may allow to match component carrier technology below with electronic component (in particular semiconductor chip) technology above the first interposer structure. Thus, the first interposer structure may function as a redistribution structure or fanout structure. Advantageously, the first interposer structure may also contribute to stress relief, for instance when arranging sponge-like nanowires or elastic or springy structures at an interface to the first component carrier and / or to the at least one electronic device.

[0039] In an embodiment, the electronic device comprises a second interface structure, in particular a power interposer, in an interface region between the second component carrier and the at least one electronic component. Said second interposer structure may allow to match component carrier technology above with electronic component (in particular semiconductor chip) technology below the second interposer structure. Thus, the second interposer structure may function as a redistribution structure or fanout structure. In an embodiment, an electrically conductive surface area of a main surface of the second interface structure facing the at least one electronic component is smaller than on an opposing other main surface of the second interface structure. Consequently, the metal content of the second interface structure may be larger in a portion facing the second component carrier than in another portion facing the at least one electronic component and thus may guide heat generated by the at least one electronic component in one direction.

[0040] In an embodiment, the electronic device comprises a power supply path from the first component carrier through the at least one electrically functional component via the second component carrier towards the at least one electronic component, and a power return path from the at least one electronic component via the second component carrier and the at least one electrically functional component to the first component carrier. Both the power supply path and the power return path may be configured as a loop encompassing first component carrier, electrically functional component(s) and second component carrier. Moreover, the power supply path and the power return path may relate to a current flow in opposite directions.

[0041] In an embodiment, an integration density of electrically conductive structures of the electronic device closer to the at least one electronic component is larger than another integration density of electrically conductive structures of the electronic device further remote from the at least one electronic component, in particular at a top side and / or at a bottom side of the at least one electronic component. Both power management and signal management of the at least one electronic component may require a larger number of electrically conductive structures closer to the electronic component(s) (which may be semiconductor chips) than closer to the component carriers (which may be IC substrates or PCBs).

[0042] In an embodiment, an integration density of electrically conductive structures of the electronic device at a bottom side of the at least one electronic component is larger than another integration density of electrically conductive structures of the electronic device at a top side of the at least one electronic component. This configuration may reflect the fact that signal management (which may be handled predominantly by the first component carrier below the at least one electronic component) may require a larger amount of electrically conductive structures as compared with power management (which may be handled predominantly by the second component carrier above the at least one electronic component).

[0043] In an embodiment, the electronic device comprises a self-centering meniscus-shaped electrically conductive connection medium between, on the one hand, the at least one electrically functional component and, on the other hand, the first component carrier and the second component carrier. For example, said electrically conductive connection medium may be a soldering alloy. After the electrically conductive connection medium has become flowable during the manufacturing process, it may re-solidify and may thereby experience automatic self-centering.

[0044] In an embodiment, the electronic device comprises a thermally decoupling structure on the second component carrier and a thermally decoupled structure, for example an optical system, on the thermally decoupling structure for thermally decoupling the thermally decoupled structure from the second component carrier. Such a thermally decoupling structure may form a thermal barrier inhibiting flow of heat between the second component carrier and the thermally decoupled structure formed thereon. For example, this may allow to at least partially thermally decouple a temperature-sensitive optical system to be mounted on the second component carrier from heat generated by electric power transmitted via the second component carrier. Consequently, the second component carrier may simultaneously contribute to power supply of at least one electronic component and may also function for providing a basis for an optical interface or any other optical system. Although the thermally decoupled structure (for instance an optical system) may be thermally decoupled from the second component carrier by the thermally decoupling structure, the thermally decoupled structure may be functionally coupled with the second component carrier (for example functionally coupled for electric and / or optical signal transfer).

[0045] In an embodiment, the optical system comprises an optical connector and / or an optoelectronic device. For instance, an optical connector may comprise an optical plug configured for transmitting an optical signal from the electronic device to an optical communication partner device and / or from an optical communication partner device to the electronic device. For example, such an optical connector may be surface mounted or may be laterally mounted on the second component carrier and may be optically coupled with an optical fiber for transmitting an optical signal. The mentioned optoelectronic device may for example comprise an optoelectronic converter configured for converting an electrical signal into an optical signal and / or for converting an optical signal into an electrical signal. Additionally or alternatively, the optoelectronic device may also be configured as optoelectronic transceiver configured for both receiving an optical and / or an electrical signal and transmitting an optical and / or an electrical signal. Hence, an electric signal processed by the first component carrier and / or the second component carrier and / or by at least one electronic component of the electronic device may be converted from or into the optical domain on the electronic device.

[0046] In an embodiment, the electronic device comprises an electrically functional block being surface mounted on the second component carrier or arranged in a cavity in the second component carrier, in particular in direct contact with second interface structure. This may further extend the electric functionality of the electronic device. For instance, the electrically functional block may be thermally decoupled from the second component carrier by a thermally decoupling structure arranged on the second component carrier. This may protect temperature-sensitive elements of the electrically functional block against overheating when high electric power is transmitted via the second component carrier.

[0047] In an embodiment, the electrically functional block comprises a power supply block (for example comprising DC / DC converter circuitry) and / or a memory block (for example a high bandwidth memory block and / or a stack of a plurality of memory components). In one embodiment, a source of electric power supplied to the second component carrier may be the electrically functional block being surface mounted on the second component carrier. This may lead to very short electric power supply paths. Additionally or alternatively, the surface mounted electrically functional block may provide the electronic device with a memory functionality. For instance, a plurality of stacked memory components may form a high-bandwidth memory (HBM) block providing a memory function to the electronic device. In an embodiment, the second interface structure comprises a first interface section, having a first interface section thickness, and being mounted on a first electronic component, having a first component thickness, of said at least one electronic component, wherein the second interface structure comprises a second interface section, having a second interface section thickness, and being mounted on a second electronic component, having a second component thickness, of said at least one electronic component, and wherein the first interface section thickness is larger than the second interface section thickness so as to at least partially compensate the first component thickness being smaller than the second component thickness. To put it shortly, the second interface structure may be divided into different sections having different thicknesses so as to partially or entirely compensate for different thicknesses of different electronic components on which the respective second interface section is mounted. For example, a sum of the first interface section thickness and the first electronic component thickness may differ from a sum of the second interface section thickness and the second electronic component thickness by less than 20%, preferably by less than 10%, in relation to the sum of the first interface section thickness and the first electronic component thickness. Preferably, the two sums may be the same or may be substantially the same. Thus, a plurality of electronic components having different thicknesses may be arranged side-by-side in the electronic device, and differently thick sections of the second interface structure may partially or entirely compensate said thickness difference of the electronic components.

[0048] In an embodiment, the first interface section and the second interface section are physically separate bodies or form parts of a common integral body. In the first alternative, each individual interface section may be formed as a separate body being surface mounted on the respective electronic component. In the second alternative, a stepped second interface structure may be provided, wherein the height of the step between its interface sections may be configured for a height adjustment.

[0049] In an embodiment, the respective component carrier is shaped as a plate. This contributes to the compact design, wherein the component carrier nevertheless provides a large basis for mounting components thereon. Furthermore, in particular a naked die as example for an embedded electronic component, can be conveniently embedded, thanks to its small thickness, into a thin plate such as a printed circuit board.

[0050] In an embodiment, the respective component carrier is configured as one of the group consisting of a printed circuit board, a substrate (in particular an IC substrate), and an interposer.

[0051] In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-shaped component carrier which is formed by laminating several electrically conductive layer structures with several electrically insulating layer structures, for instance by applying pressure and / or by the supply of thermal energy. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, whereas the electrically insulating layer structures may comprise resin and / or glass fibers, so-called prepreg or FR.4 material. The various electrically conductive layer structures may be connected to one another in a desired way by forming holes through the laminate, for instance by laser drilling or mechanical drilling, and by partially or fully filling them with electrically conductive material (in particular copper), thereby forming vias or any other through-hole connections. The filled hole either connects the whole stack, (through-hole connections extending through several layers or the entire stack), or the filled hole connects at least two electrically conductive layers, called via. Similarly, optical interconnections can be formed through individual layers of the stack in order to receive an electro-optical circuit board (EOCB). Apart from one or more components which may be embedded in a printed circuit board, a printed circuit board is usually configured for accommodating one or more components on one or both opposing surfaces of the plateshaped printed circuit board. They may be connected to the respective main surface by soldering. A dielectric part of a PCB may be composed of resin with reinforcing fibers (such as glass fibers).

[0052] In an embodiment, the respective component carrier is an integrated circuit substrate. In the context of the present application, the term "integrated circuit substrate" (IC substrate) may particularly denote a component carrier having a size and a pitch adjusted to the requirements of an integrated circuit component (in particular a semiconductor chip) mounted thereon. An IC substrate may be a, in relation to a PCB, comparably small component carrier onto which one or more integrated circuit components may be mounted and that may act as a connection body between one or more chip(s) and a PCB or being plugged in a socket mounted on a PCB. For instance, an IC substrate may have substantially the same size as an electronic component to be mounted thereon (for instance in case of a Chip Scale Package (CSP)). In another embodiment, the IC substrate may be larger than the assigned component (for instance in a flip chip ball grid array, FCBGA, configuration). More specifically, an IC substrate can be understood as a carrier for electrical connections or electrical networks as well as component carrier comparable to a printed circuit board (PCB), however with a considerably higher density of laterally and / or vertically arranged connections. Lateral connections are for example conductive paths, whereas vertical connections may be for example drill holes. These lateral and / or vertical connections are arranged within the IC substrate and can be used to provide electrical, thermal and / or mechanical connections of housed components or unhoused components (such as bare dies), particularly of IC chips, with a printed circuit board or interposer. A dielectric part of an IC substrate may be composed of resin with reinforcing particles (such as reinforcing spheres, in particular glass spheres). A pitch, i.e. a distance between corresponding edges of two adjacent metal structures, of an IC substrate may be not more than 150 pm, in particular not more than 100 pm. In contrast to this, a pitch of some kind of PCBs may be at least 200 pm, in particular at least 300 pm.

[0053] The substrate or interposer may comprise or consist of at least a layer of glass, silicon (Si) and / or a photoimageable or dry-etchable organic material like epoxy-based build-up material (such as epoxy-based build-up film) or polymer compounds (which may or may not include photo- and / or thermosensitive molecules) like polyimide or polybenzoxazole.

[0054] In an embodiment, the at least one electrically insulating layer structure comprises at least one of the group consisting of a resin or a polymer, such as epoxy resin, cyanate ester resin, benzocyclobutene resin, bismaleimide-tria- zine resin, polyphenylene derivate (for example based on polyphenylenether, PPE), polyimide (PI), polyamide (PA), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE) and / or a combination thereof. Reinforcing structures such as webs, fibers, spheres or other kinds of filler particles, for example made of glass (multi-layer glass) in order to form a composite, could be used as well. A semi-cured resin in combination with a reinforcing agent, for example fibers impregnated with the above-mentioned resins is called prepreg. These prepregs are often named after their properties for example FR4 or FR.5, which describe their flame retardant properties. Although prepreg particularly FR.4 are usually preferred for rigid PCBs, other materials, in particular epoxybased build-up materials (such as build-up films) or photoimageable dielectric materials, may be used as well. For high frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymer and / or cyanate ester resins, may be preferred. Besides these polymers, low temperature cofired ceramics (LTCC) or other low, very low or ultra-low DK materials may be applied in the component carrier as electrically insulating structures.

[0055] In an embodiment, the at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, tungsten and magnesium. Although copper is usually preferred, other materials or coated versions thereof are possible as well, in particular coated with supra-conductive material or conductive polymers, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT), respectively.

[0056] At least one component may be embedded in and / or surface mounted on the respective stack. The at least one further component can be selected from a group consisting of an electrically non-conductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (for example a heat pipe), a light guiding element (for example an optical waveguide or a light conductor connection), an electronic component, or combinations thereof. An inlay can be for instance a metal block, with or without an insulating material coating (IMS-inlay), which could be either embedded or surface mounted for the purpose of facilitating heat dissipation. Suitable materials are defined according to their thermal conductivity, which should be at least 2 W / mK. Such materials are often based, but not limited to metals, metal-oxides and / or ceramics as for instance copper, aluminium oxide (AI2O3) or aluminum nitride (AIN). In order to increase the heat exchange capacity, other geometries with increased surface area are frequently used as well. Furthermore, a component can be an active electronic component (having at least one p-n-junction implemented), a passive electronic component such as a resistor, an inductance, or capacitor, an electronic chip, a storage device (for instance a DRAM or another data memory), a filter, an integrated circuit (such as field-programmable gate array (FPGA), programmable array logic (PAL), generic array logic (GAL) and complex programmable logic devices (CPLDs)), a signal processing component, a power management component (such as a field-effect transistor (FET), metal-oxide-semiconductor field-effect transistor (MOSFET), complementary metal-oxide-semiconductor (CMOS), junction field-effect transistor (JFET), or insulated-gate field-effect transistor (IGFET), all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (GazOs), indium gallium arsenide (InGaAs), indium phosphide (InP), and / or any other suitable inorganic compound), an optoelectronic interface element, a light emitting diode, a photocoupler, a voltage converter (for example a DC / DC converter or an AC / DC converter), a cryptographic component, a transmitter and / or receiver, an electromechanical transducer, a sensor, an actuator, a microelectromechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may be embedded in the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, for instance a ferrite core) or may be a paramagnetic element. However, the further component may also be an IC substrate, an interposer or a further component carrier, for example in a board-in-board configuration. The further component may be surface mounted on the component carrier and / or may be embedded in an interior thereof.

[0057] In an embodiment, the respective component carrier is a laminate-type component carrier. In such an embodiment, the component carrier is a compound of multiple layer structures which are stacked and connected together by applying a pressing force and / or heat. After processing interior layer structures of the component carrier, it is possible to cover (in particular by lamination) one or both opposing main surfaces of the processed layer structures symmetrically or asymmetrically with one or more further electrically insulating layer structures and / or electrically conductive layer structures. In other words, a build-up may be continued until a desired number of layers is obtained.

[0058] After having completed formation of a stack of electrically insulating layer structures and electrically conductive layer structures, it is possible to proceed with a surface treatment of the obtained layers structures or component carrier.

[0059] In particular, an electrically insulating solder resist may be applied to one or both opposing main surfaces of the layer stack or component carrier in terms of surface treatment. For instance, it is possible to form such a solder resist on an entire main surface and to subsequently pattern the layer of solder resist so as to expose one or more electrically conductive surface portions which shall be used for electrically coupling the component carrier to an electronic periphery. The surface portions of the component carrier remaining covered with solder resist may be efficiently protected against oxidation or corrosion, in particular surface portions containing copper.

[0060] It is also possible to apply a surface finish selectively to exposed electrically conductive surface portions of the respective component carrier in terms of surface treatment. Such a surface finish may be an electrically conductive cover material on exposed electrically conductive layer structures (such as pads, conductive tracks, etc., in particular comprising or consisting of copper) on a surface of a component carrier. If such exposed electrically conductive layer structures are left unprotected, then the exposed electrically conductive component carrier material (in particular copper) might oxidize, making the component carrier less reliable. A surface finish may then be formed for instance as an interface between a surface mounted component and the component carrier. The surface finish has the function to protect the exposed electrically conductive layer structures (in particular copper circuitry) and enable a joining process with one or more components, for instance by soldering. Examples for appropriate materials for a surface finish are Organic Solderability Preservative (OSP), Electroless Nickel Immersion Gold (ENIG), Electroless Nickel Immersion Palladium Immersion Gold (ENIPIG), gold (in particular hard gold), chemical tin, nickel-gold, nickel-palladium, etc.

[0061] In an embodiment, the respective component carrier related body is a laminate-type component carrier. In such an embodiment, the component carrier is a compound of multiple layer structures which are stacked and connected together by applying a pressing force and / or heat.

[0062] The aspects defined above and further aspects of the invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.

[0063] Figure 1 illustrates a cross-sectional view of an electronic device according to an exemplary embodiment of the invention.

[0064] Figure 2 illustrates a cross-sectional view of a component carrier according to an exemplary embodiment of the invention and forming an upper portion of the electronic device according to Figure 1.

[0065] Figure 3 illustrates an exploded view of a portion of the electronic device according to Figure 1.

[0066] Figure 4 illustrates a cross-sectional view of an electronic device according to an exemplary embodiment of the invention and shows electric power, electric signal, and heat flow paths.

[0067] Figure 5 to Figure 13 show different cross-sectional views of structures obtained during manufacturing a second component carrier of an electronic device according to exemplary embodiment of the invention.

[0068] Figure 14 to Figure 18, in combination with Figure 10 to Figure 13, show different cross-sectional views of structures obtained during manufacturing a second component carrier of an electronic device according to another exemplary embodiment of the invention.

[0069] Figure 19 illustrates a cross-sectional view and a plan view of a second interface structure of a second component carrier of an electronic device according to an exemplary embodiment of the invention.

[0070] Figure 20 to Figure 23 show different cross-sectional views of structures obtained during manufacturing an electronic device according to an exemplary embodiment of the invention.

[0071] Figure 24 illustrates a cross-sectional view of a component carrier according to another exemplary embodiment of the invention.

[0072] Figure 25 illustrates a cross-sectional view of part of an electronic device according to an exemplary embodiment of the invention.

[0073] Figure 26 illustrates a cross-sectional view of part of an electronic device according to another exemplary embodiment of the invention.

[0074] Figure 27 illustrates a cross-sectional view of an electronic device according to another exemplary embodiment of the invention providing an optoelectronic functionality.

[0075] Figure 28 illustrates a cross-sectional view of an electronic device according to another exemplary embodiment of the invention providing an additional memory function.

[0076] Figure 29 illustrates a cross-sectional view of an electronic device according to another exemplary embodiment of the invention providing an additional electronic function contributing to electric power supply.

[0077] Figure 30 to Figure 33 illustrate different cross-sectional views of structures obtained during manufacturing an electronic device according to an exemplary embodiment, shown in Figure 33, having a height compensating feature for compensating different heights of electronic components sandwiched between two component carriers.

[0078] The illustrations in the drawings are schematic. In different drawings, similar or identical elements are provided with the same reference signs.

[0079] Before, referring to the drawings, exemplary embodiments will be described in further detail, some basic considerations will be summarized based on which exemplary embodiments of the invention have been developed.

[0080] According to an exemplary embodiment of a first aspect of the invention, an electronic device (for example a package) may be formed with a first component carrier (such as an IC substrate) having a (for instance laminated) layer stack and a second component carrier (such as a further IC substrate) also having a (for instance laminated) layer stack. By arranging one or more electrically functional components each providing different electric functions during operation of the electronic device between the first component carrier and the second component carrier for accomplishing a mechanical and electrical connection, a central space may be delimited in between the component carriers. Said one or more electrically functional components may be multifunctional. On the one hand, each of them may fulfil at least two different electric functions during operation of the electronic device, for example a contribution to electric power supply and electric power return (for instance by providing access to a reference potential such as a ground potential). At the same time, the one or more electrically functional components may act as mechanical spacer between the component carriers for delimiting a central space which may allow to accommodate therein at least one other constituent (such as at least one electronic component) in a protected fashion. Moreover, this may ensure a compact design of the electronic device promoting short signal paths, low ohmic heat and high signal integrity.

[0081] According to said first aspect, a connection of the front side substrate (for instance a lower substrate) and the back side power substrate (for instance an upper substrate) may be realized through one or more capacitor components which may connect electric power on one side and a reference potential (such as ground) on the other side.

[0082] According to an exemplary embodiment of a second aspect of the invention, a component carrier (such as an IC substrate, for instance being the above-mentioned second component carrier) may comprise a layer stack having a multi-layer structure. The multi-layer structure may comprise two or more stacked electrically conductive layer structures made of different electrically conductive materials (for example one made of copper and another one made of molybdenum and optionally one further other metallic material). Said multi-layer structure may be interconnected so as to be accessible at an exterior of the component carrier for being electrically and mechanically coupled with an electronic periphery, such as at least one electronic component (for instance a semiconductor chip). The described properties of the multi-layer structure may be beneficial in terms of thermal expansion and may have a positive, reducing impact on a coefficient of thermal expansion (CTE) mismatch in view of different materials of other constituents of an electronic device (for instance a semiconductor chip). Consequently, artefacts like warpage and delamination may be strongly reduced thanks to the multi-layer structure. Beyond this, electric power may be efficiently supplied by or fed via the multi- layer structure which may function as a common single integral power conductor. For example, the component carrier of an exemplary embodiment of the second aspect may also be used as a constituent for an electronic board, for instance as a core of such an electronic board (such as a printed circuit board). However, it is also possible that said component carrier forms part of an electronic device comprising for instance a further component carrier, etc.

[0083] According to said second aspect, a connection between a substrate and an electronic component may be provided, wherein the substrate may comprise a conductive area (that can in particular be separated depending on specific domains). An electronic component may comprise several pads with solder balls and may be connected through a power interface substrate having on one side a conductive surface connected to the substrate and on the other side a plurality of conducive pads connected to the electronic component.

[0084] According to an exemplary embodiment of a third aspect of the invention, an electronic device (for example a package) may be formed with a first organic-type component carrier (such as an IC substrate) having a (for instance laminated) layer stack and a second organic-type component carrier (such as a further IC substrate) also having a (for instance laminated) layer stack. In addition, one or more electronic components with contacting elements on both opposing main surfaces may be interconnected between the component carriers. Furthermore, one or more spacer-type connection structures may connect the component carriers with each other without the at least one electronic component in between. As a result of this architecture, one or more electronic components with contacting elements both on its front side and on its back side may be coupled with short signal and power supply paths with both component carriers. At the same time, the component carriers may be connected by the one or more connection structures which may further promote short signal and power supply paths. Consequently, the electronic device may be formed with low space consumption and may dissipate only a moderate amount of heat while simultaneously ensuring a beneficial electric power supply and electric signal transmission.

[0085] According to said third aspect, an electronic module may be provided with heterogeneous integration and a power feeding substrate with back side power distribution network. Any of the first aspect and / or the second aspect and / or the third aspect may be realized alone, or any two of said aspects or even all three aspects may be combined in different embodiments.

[0086] Exemplary embodiments may provide an architecture for a construction of electronic devices which may be embodied as data computational modules complying with high power demand. In a nutshell, an electronic device may be equipped with a dual-plate or dual-board construction interfacing one or more electronic components, which may be embodied as semiconductor chip(s). For instance, electronic devices of exemplary embodiments may be configured as computational modules with high workload and current demand (for instance supporting a current of at least up to 10 Ampere, preferably at least up to 100 Ampere, for instance involving a power of at least 1000 W). For example, a computing apparatus with an electronic device according to an exemplary embodiment of the invention may comprise a central processing unit (CPU), a graphical processing unit (GPU), a network node unit (NNU), a Neuronal Processing Unit (NPU), an artificial intelligence (Al) unit, a cloud systems, a server unit, a computing accelerators unit, and / or a telecommunications device.

[0087] For example, a first component carrier forming a front substrate may be connected with a second component carrier functioning as a back power substrate. Preferably, but not mandatory, a combination with at least one of the following features may be provided: at least one electronic component which may be embodied as a double-side component (in particular having power ports also on the rear side); a conductive surface of the respective component carrier on a side facing the at least one electronic component, preferably divided in subareas for different specific domains (for example a larger power surface and smaller spots as ground surfaces).

[0088] What concerns the above-mentioned first aspect, it may be possible to provide a package comprising a first component carrier comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, and a second component carrier comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said first component carrier and said second component carrier being connected one to each other defining a central space in between, said first component carrier and said second component carrier being connected one to each other through at least one component, connecting at least two electric functions between the first component carrier and second component carrier.

[0089] Preferably, the at least two electric functions may correspond to two domains and / or two voltage levels and / or two current carrying capabilities. For example, one domain is the power and / or the other domain is the ground. In an embodiment, the at least one electrically functional component comprises two opposed surfaces, a connecting surface facing the first component carrier and a further connecting surface facing the second component carrier, the connecting surface comprising a first and a second connection portion, and the further connecting surface comprising a third and a fourth connection portion, wherein the first and the third connection portions are electrically connected one to each other and are configured to connect one of the at least two electric functions between the first component carrier and the second component carrier, and the second and the fourth connection portions are electrically connected one to each other and are configured to connect another one of the at least two electric functions between the first component carrier and the second component carrier. For example, the component is part of the first component carrier and / or the second component carrier. For instance, one connecting surface of the component is in contact with one main surface of one of the first component carrier and / or the second component carrier. In an embodiment, the component comprises at least one electrically conductive layer structure and at least one electrically insulating layer structure at least one provided on the at least one electrically conductive layer structure or the at least one electrically insulating layer structure of the first component carrier and / or the second component carrier. Preferably, a plurality of components connect the at least two electric functions between the first component carrier and second component carrier. For instance, the component is a passive component. For example, the component is a capacitor. Alternatively, the component may be an active component. In an embodiment, at least one electronic component, in particular a plurality of electronic components, is or are provided in the central space. The at least one electronic component may be connected to both the first component carrier and the second component carrier. In an embodiment, the at least one electronic component is configured for back-side power delivery. For instance, the ratio between the volume occupied by the electrically conductive layer structures and the volume occupied by the electrically insulating layer structures of the one between the first component carrier and the second component carrier connected to the back side of the electronic component for the power delivery is higher than the further ratio between the volume occupied by the electrically conductive layer structures and the volume occupied by the electrically insulating layer structures of the other one between the first component carrier and second component carrier connected to the opposed side of the electronic component. In particular, the ratio may be between 30% to 70% higher than the further ratio.

[0090] Alternatively, the ratio may be between 10% and 90%. For instance, the ratio between the volume occupied by the electrically conductive layer structures and the volume occupied by the electrically insulating layer structures of the one between the first component carrier and the second component carrier connected to the back side of the electronic component for the power delivery is lower than the further ratio between the volume occupied by the electrically conductive layer structures and the volume occupied by the electrically insulating layer structures of the other one between the first component carrier and second component carrier connected to the opposed side of the electronic component.

[0091] Now referring to the above-mentioned second aspect, a component carrier may be provided which comprises a stack comprising at least one electrically insulating layer structure and at least one electrically conductive layer structure, said at least one electrically conductive layer structure comprising a multi-layer structure comprising at least two layers of different conductive materials stacked one to each other, wherein said multi-layer structure is at least partially in contact with at least one layer structure exposed to the external side of the stack.

[0092] For example, the at least one exposed layer structure (i.e. the at least one layer structure exposed to the external side of the stack, see for instance reference sign 114a in Figure 2) has a planar extension smaller than that of the multi-layer structure. In particular, the at least one exposed layer structure may be made of a material different from the materials of the multi-layer structure, in particular different from the material of the layer of the multilayer structure in contact with the exposed layer structure. For instance, the at least one exposed layer structure comprises a Ni layer and / or a Pd layer and / or Au layer. Alternatively, the at least one exposed layer structure may comprise a Cu layer and / or a Cr layer and / or Ag layer. Moreover, the at least one exposed layer structure may comprise a plurality of layers. In an embodiment, a solder resist or surface finishing layer may be provided on the external side of the stack and / or on the at least one exposed layer structure, wherein said solder resist or surface finishing layer may have at least one opening exposing at least partially said at least one exposed layer structure. For example, the multi-layer structure comprises at least three layers, wherein in particular the two external layers may be based on the same material. In an embodiment, a plurality of electrically conductive layer structures is provided, wherein the multi-layer structure may be insulated, in particular through the at least one electrically insulating layer structure, from the other electrically conductive layer structure. For example, the multi-layer structure and at least one of the plurality of electrically conductive layer structures flush at the surface where said multi-layer structure is at least partially in contact with the exposed layer structure, the flushing surface of the multi-layer structure being divided from the flushing surface of the electrically conductive layer structure through the at least one electrically insulating layer structure. Preferably, a plurality of flushing surfaces of the multi-layer structure and / or of the at least one of the plurality of electrically conductive layer structures are provided at the same surface of the component carrier. In an embodiment, at least one exposed layer structure is provided, at least partially in contact with the flushing surface of the at least one of the plurality of electrically conductive layer structures. For example, a solder resist or surface finishing layer is provided on the external side of the stack and / or on the at least one exposed layer structure, said solder resist or surface finishing layer comprising at least one opening exposing at least partially said at least one exposed layer structure. In an embodiment, said solder resist or surface finishing layer comprises at least one further opening exposing at least partially said at least one further exposed layer structure. For example, at least one connection area, in particu- lar a plurality of connection areas, is or are provided on one of the main surfaces of the component carrier, each configured to be connected to (for instance all) the flushing areas of the multi-layer structure or to (for instance all) the at least one of the plurality of electrically conductive layer structures. Preferably, one layer of the multi-layer structure comprises Mo material and / or one layer comprises MoCu material and / or one layer of the multi-layer structure comprises Cu material. In particular, the ratio of copper in the MoCu material may be in a range from 5 weight % to 50 weight %, preferably from 15 weight % to 40 weight %. For instance, the multi-layer structure comprises at least three layers, in particular the internal layer may be made of Mo or of MoCu and at least one and / or both external layers may be made of Cu. In an embodiment, the multi-layer structure comprises at least five layers, in particular an alternating sequence of one layer made of Cu and one layer made of Mo or MoCu. For instance, the thickness of the multi-layer structure may be in a range from 100 pm to 1800 pm, in particular from 180 pm to 720 pm. In an embodiment, the ratio between the thickness of a Mo or a MoCu layer with respect to the thickness of a Cu layer is in the range from 1 : 1 to 4: 1. For instance, the multi-layer structure may be heated-roll bonded. It may be possible that a MoCu structure is formed by infiltration or solid sintering. In an embodiment, the multi-layer structure is connected to other electrically conductive layer structure(s) through vertical connections, in particular though vias or through holes or nanowires. The multi-layer structure may comprise or may be linked to heating paths or layouts. In an embodiment, multiple multi-layer structures may be foreseen (for example divided one to each other).

[0093] Referring to the above-mentioned third aspect, an electronic device or a package may be provided which comprises an electronic component comprising a first main surface and second main surface, said second main surface being opposed with respect to the first main surface, wherein both the first main surface and the second main surface comprises contacting elements, said electronic device or package further comprising a pre- manufactured first stack electrically connected with the first main surface of the electronic component, said stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically insulating layer structure being at least partially made of organic material (optionally it may also comprise an inorganic material in addition), a pre-manufactured second stack electrically connected with the second main surface of the electronic component, said stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, and said at least one electrically insulating layer structure being at least partially made of organic material, wherein said first stack and said second stack are connected one to each other by a carrier structure.

[0094] For example, said carrier structure comprises a component, in particular a passive component. In an embodiment, said carrier structure is configured to transmit at least two electric functions, in particular two domains, between the first stack and the second stack, more particularly the power and the ground domains, preferably to connect said domains with one of the first or the second main surface of the electronic component through the one between the first stack and the second stack. For instance, the component is a capacitor. For example, an interface is provided between one of the first or the second main surface of the component and the facing one between the first stack and the second stack, said interface connecting the conductive surfaces provided on the respective main surface of the electronic component with the conductive surfaces provided on the respective stack. In an embodiment, the interface has a fan-out design connecting the conductive portions on one of the main surface of said interface with the conductive portions provided on the other of the main surface of said interface, said conductive portions provided on one of the first main surface of said interface having a different density than the conductive portions provided on the other one of the main surfaces of said interface. For example, the interface is configured to connect the conductive portions on one of the main surfaces of said interface with the conductive portions provided on the other of the main surfaces of said interface, said conductive portions provided on one of the first main surface of said interface having the same density of the conductive portions provided on the other one of the main surfaces of said interface. In an embodiment, the interface comprises conductive portions on the main surface facing the respective stack, said stack comprising at least one electrically conductive surface on the main surface facing the respective interface configured to be connected with a plu- rality of conductive portions of said interface. In a further embodiment, the interface^) is or are configured to compensate the vertical and planar tolerances (such as misalignments) between the first stack, the second stack and the central component in particular through connection elements (for example solder bumps, nanowires, etc.) connecting the conductive portions of the interface with the respective component conductive portions and / or the respective stack conductive portions. For instance, said first and / or second stacks comprise(s) a plurality of conductive portions on the main surface facing the other one of the first or second stacks, said plurality of conductive portions comprising a peripheral sub-group of conductive portions having a first function and a central sub-group of conductive portion having a second function. For instance, the peripheral sub-group has a power and ground function, in particular for the respective electrical connection with the electronic component. For example, the central sub-group has a signal function, in particular for the respective electrical connection with the electronic component.

[0095] An exemplary embodiment may provide an electronic device in component carrier technology with semiconductor power feeding or power delivery from the back side of the semiconductor die. This may be seen as a paradigm shift in comparison with conventional approaches in which signal routing and power delivery have occurred on the front side of a semiconductor chip-type electronic component, where electric power and electric signals may compete. Thus, exemplary embodiments of the invention may move from front side power delivery network structures to back side power delivery network structures. To put it shortly, electric signal supply may be accomplished from a front side of an electronic component, and electric power supply may be accomplished from a back side thereof according to an exemplary embodiment of the invention. This may allow to spatially separate signal management and power management which may have advantages in terms of signal quality, heat dissipation and compactness. Exemplary embodiments may optionally involve through silicon vias, which may extend through the respective electronic component for connecting its front and back side through silicon material of the electronic component. An embodiment involving back side power delivery may move the power interconnects from above the silicon to below it. Such a back side power delivery architecture may remove all power-delivering interconnects beneath the silicon. This may have the following two main effects: First, it may leave more room for the data interconnects above the silicon. And second, the power interconnects can be made larger and therefore less resistive. That combination may improve performance in several ways: First, with an easier path for power to flow, circuits on a CPU or the like may experience less voltage droop. In other words, there may be a smaller transient fall in voltage when demand for current increases from for instance a large block of logic switching on. With less droop, transistors can be run faster. Second, cores can be made more compact (note that power rails within silicon may be three times larger than signal traces). Moreover, decreasing the length of interconnects between logic cells may speed things up. When logic cells that make up a processor core are laid out on the chip, interconnect congestion may keep them from packing together perfectly, leaving loads of blank space between the cells. With less congestion among the data interconnects, the cells may fit together more tightly, with some portions up to 95 percent filled. Even more important, the lack of congestion may allow some of the smallest interconnects to spread out, which may reduce parasitic capacitance that hinders performance.

[0096] The provision of a power distribution network according to an exemplary embodiment may involve a translation or transition from high voltage / low current to low voltage / high current performed at PCB level or at substrate level. An exemplary embodiment may establish a reliable path to transit the power feeding to the back side of the electronic components (such as semiconductor chips), simultaneously providing a high thermal reliability and a reliable simplified mounting technology. A power delivery path may extend from a lower substrate to an upper substrate for power feeding to the back side of the respective electronic component (which may be mounted face down).

[0097] For improving the thermal management of the electronic device, in a single and multiple die configuration, a metal structure (preferably a multilayer structure) with higher thermal conductivity (for example 200 to 300 W / mK), than glass (for instance 0.9 to 1.2 W / mK), silicon (148 W / mK), and amorphous silicon (1.8 W / mK) may be used. The metal structure may be rendered CTE compatible with semiconductor thermal mechanical properties (for instance 5.6 to 8 ppm / K). A low resistance path for power delivery may be created, which may be accomplished by using copper as an electrical conductor. Exemplary embodiments may manufacture the second component carrier of the electronic device by embedding of one or more substrates into a panel. Furthermore, embodiments may be compatible for a single die configuration as well as a multi die configuration. While said metal structure may be capable to manage the high demanding current for the main power domain(s), it can be structured to provide more than a single power domain in the same areas. The electronic device may comprise one or more interposers or interface structures, which may for instance comprise silicon, glass, SiC, GaN, GaAs, or silicon material.

[0098] In an embodiment, it may be possible to build a multi-layer substrate to be mounted on top of the back side of one or more electronic components, but at the same time connected (in particular electrically and mechanically) to the substrate hosting the signal portion of connections belonging to the electronic component(s) mounted on the module.

[0099] Furthermore, exemplary embodiments may use CTE controlled materials and structures to compensate, reduce or even eliminate CTE mismatch of devices. A pitch of the power connections on the back side of the electronic device may be more relaxed than of the one which may be used on the signal side, which enables bigger connections at a more relaxed pitch compared to the one used on the I / O side of the electronic device.

[0100] For the construction of the second component carrier when embodied as a power substrate, it may be possible to use one (or more per final module unit) inlay(s) made for instance of Cu-Invar-Cu or Cu-Mo-Cu (or a variation of the same) with appropriate dimensions. More generally, an inlay may be provided which comprises the multi-layer structure. As an alternative to the mentioned embodiment with inlay, it is also possible that the multi-layer structure is formed by layer structures of the second component carrier. Such at least one inlay may be inserted into a production large panel in a substrate manufacturing process, and may be capable to withstand lamination (in particular on one side) of further layers creating a portion of the circuit to accommodate the distribution of the targeted power domains. The at least one insert may become a core for an asymmetrical construction of at least one layer with a thin thermally conductive prepreg laminated with a copper foil, which may be configured as a shielding ground.

[0101] An upper portion of the electronic device may be in contact with a heat dissipation unit or heat sink (for example a water-cooled chiller, etc.) when mounted into a system board. This may act as interface at the loading provided in the mounting of the thermal solution at system level with a high pressure force applied.

[0102] An exemplary embodiment for power substrate construction may start with the provision of an inlay, which may be customized with holes (for instance having different diameters based on a final domain). Such one or more inlays may be placed into one or more customized cavities created into a core substrate and may be held in place by an adhesive tape. Furthermore, a lamination of core plus inlay(s) with a (preferably thermally conductive) high resin content prepreg sheet and a copper foil may be accomplished. The latter may have different thicknesses based on its function. This can be a thin copper foil (for instance having a thickness of 12 pm, for instance for ground shielding) or a thicker copper foil (for example having a thickness of 35 pm for a power domain different from ground or 70 pm for providing main power delivery). This operation can be replicated for additional layers (for instance by executing at least one further drill and plating stage) once synchronized with a final outcome or target design. Parts in the inlay may be subjected to drill operation in existing holes (for instance isolated through holes from the core or through the layers according to desired electrical connections). The parts may then undergo masking (for instance using a solder mask or another masking material) to define required patterns on the surface interfacing the power interface substrate. In particular, the masking may help in defining the interface area for current transfer.

[0103] A use of copper blocks or capacitors as electrically functional components or connecting units across the stack of the substrate may fulfil mechanical and electrical functions. As already mentioned, the power blocks can be copper blocks or capacitors, wherein the latter may be provided in multiple thicknesses to adjust to the overall dimensional requirements. The use of capacitors may also enhance the performances of the electronic device from an electrical point of view by providing a vertical transfer connection but also a decoupling function between the power domain and logic ground, based on where the terminations of the capacitors are connected.

[0104] The one or more electrically functional components can be mounted on the power substrate prior of the mating of the same with the substrate carrying the one or more electronic components. Soldering pads of the one or more electrically functional components on the die substrate may contribute to a precision alignment between the two parts.

[0105] Alloys for the final mounting of the upper power substrate (also denoted as second component carrier) to the device substrate (also denoted as first component carrier) can be done at the end of line (EOL), and it can be done using a lower temperature melting alloy than of the one used in other stages of the assembly.

[0106] The self-centering properties driven by the melted soldering alloy, or any other appropriate electrically conductive connection medium, can be established by the quantity of concurrent connections (in particular number of capacitors) attending the attachment simultaneously, geometries of the pad can be used to govern the physical alignment.

[0107] Solder temperature hierarchy can be used in other stages of the process, for example in the attachment of the small interface or interposer on the back side of the die and the power substrate alignment phase.

[0108] The power interface substrate may be a carrier (for instance formed based on glass, crystalline silicon, or amorphous silicon) with through holes positioned at the same pitch of the power connections on the back side of the electronic device, in particular semiconductor die. These holes may be plated (or filled in another way) and connected to a patterned metal area on the side opposite to the die power connections. Thus, metal areas can be patterned according to specific design specifications (for instance design specifications for power domains). The through holes may be connected to the metal surface (for example for all connections belonging to the same power domain) or isolated through a via-in-via drilling and plating methodology with lands (preferably for the logic ground domain). The large multi-holes pad may then be used to facilitate the alignment of the power interface substrate with the power feeding substrate with higher positioning tolerances and large connections (which may lead to lower electrical resistivity), avoiding using methods requiring more complex alignment between the power interface substrate and the power feeding substrate.

[0109] In an embodiment, the power interface substrate may have an electrically insulating layer facing the power connection from the die, and a conductive layer on the opposite side, which is used to connect the same to the power feeding substrate. This conductive layer may be used to translate the pitch of the power connections from the die to a configuration of shapes and pads having a substantial larger pitch.

[0110] According to exemplary embodiments, the construction structure of the power feeding substrate provides the electrical connection to the semiconductor chip(s), provides a more compatible thermo-mechanical interface to the semiconductor chip(s) within the module stack, provides a thermal dissipation or spreading element within the thermal solution, can be integrated into an epoxy for a Transfer Molding Compound (TMC) or other molding techniques, can be integrated in an electromagnetic shielding, and may be mechanically stable and robust to the final mounting of the module into the application board dislocating the pressure away from the semiconductor chip(s) and into the substrate directly.

[0111] Molybdenum copper materials have a wide range of Mo and Cu ratios from Mo60Cu40 to Mo85Cul5, and even beyond. Each ratio defines a specific CTE ranging from 5.6 ppm / K to 11.5 ppm / K. This range covers the CTEs range, 3 ppm / K to 10 ppm / K, of semiconductor chip and ceramic packaging materials.

[0112] Usable semiconductor materials include silicon, GaN, and GaAs. Usable ceramic packaging materials include AI2O3, BeO, AIN, and SiC. The CTE of molybdenum copper composites can pair with the CTE of these materials. The well-matched CTE combination can achieve a reduction of thermal stresses. As a result, the reduction may improve the operation reliability and the lifespan of the electronic component(s).

[0113] Preferred embodiments may implement cladded sheets of Cu, Mo, and Cu, into a multi-layer structure. However, also other combinations like Cu- CuMo-Cu, etc., are possible. Furthermore, it may be possible to implement the same structures using other combinations of compositions with Cu and Mo obtained through different metallurgical processes.

[0114] Clads with different thicknesses may be used, wherein an appropriate range may go from 180 pm to 720 pm with a preferred thickness of 420 pm ±100 pm. However, the thickness may be up to 1.6 mm.

[0115] Copper Clad Molybdenum (CPC, CMC, and SCMC) are structures composed of alternating layers of Mo / MoCu and Cu materials. The molybdenum copper laminates include in particular Cu / Mo / Cu, Cu / MoCu / Cu, Cu / Mo / Cu / Mo / Cu, Copper Clad Molybdenum (MoCu Laminates), multiple layers of Mo and Cu, or MoCu and Cu, in various combinations, etc. Individual layer structures, for instance made of copper and made of molybdenum, may be symmetrically roll-bonded to exacting thickness ratios. Preferably, the bonded layers do not vary in thickness by more than 10% from specifications.

[0116] Preferably, all interfaces of molybdenum copper laminates can be clear and flat to eliminate deleterious cracking or flaking. The copper outer layer may have a high thermal conductivity and an efficient heat spreading quality. Preferably, a molybdenum layer inserted between copper layers may maintain the overall coefficient of thermal expansion of the laminate in an appropriate range for the intended application. The superior combined thermomechanical properties of molybdenum and copper may be particularly pronounced in high frequency and high power applications.

[0117] For example, CMC (Cu / Mo / Cu) is a three-layered molybdenum copper laminate consisting of two outer copper layers and one molybdenum core layer. This three-layer structure may be used for different embodiments in varying layer thickness ratios, including 1 : 1 : 1, 1 :2: 1, 1 :3: 1, and 1 :4: 1, or any ratio in a range from 1 : 1 : 1 to 1 :4: 1.

[0118] For instance, CPC (Cu / MoCu / Cu) is a copper-molybdenum copper-copper laminated structure. The molybdenum core layer material of CPC may be implemented in the range from high-purity molybdenum to molybdenum copper containing 15 weight % to 40 weight % copper. A preferred CPC embodiments may be CPC 141, which has a Mo70Cu30 core layer and a 1 :4: 1 thickness ratio.

[0119] For example, SCMC (Cu / Mo / Cu / Mo / Cu) comprises five layers of molybdenum and copper laminate, consisting of two molybdenum core layers and three copper layers. SCMC is another preferred embodiment for the multilayer structure.

[0120] Various methods can be executed for preparing a multi-laminated-layer of Molybdenum-Copper composite material. For example, what concerns stacking a plurality of molybdenum material sheets and a plurality of copper material sheets, which are intersected and placed in an overlapping mode, the copper may be kept on the outmost layer, and a molybdenum and copper multi-laminated-layer structure may be obtained. Then, the molybdenum and copper multi-laminated-layer structure may be placed in a diffusion welding furnace and rolled after being processed in a diffusion welding mode.

[0121] In embodiments, a manufacturing method may carry out a surface treatment, coating, hot rolling, annealing, cold rolling to make the composite material. Such methods can also be used to roll together CuMo alloy(s) foils sandwiched between copper foils. There are different types of molybdenum copper laminates, such as Cu / Mo / Cu, Cu / MoCu / Cu, and Cu / Mo / Cu / Mo / Cu. These types may differ in the composition and thickness ratio of the layers, which may affect the properties of the laminate. For example, Cu / Mo / Cu has a molybdenum core layer and two copper-clad layers, while Cu / MoCu / Cu has a molybdenum copper alloy core layer and two copper-clad layers. The molybdenum copper alloy can contain different percentages of copper, such as 15%, 30%, or 50%. The thickness ratio of the layers can also vary, such as 1 : 1 : 1, 1 :2: 1, 1 :3: 1, or 1 :4: 1. The different types of molybdenum copper laminates may have different coefficients of thermal expansion, thermal conductivity, electrical conductivity, density, and hardness.

[0122] For making CuMo alloys / composites, methods like metal infiltration and solid sintering molybdenum copper can be executed.

[0123] The mentioned composition of the multi-layer structure may have an outstanding thermal conductivity. In particular, molybdenum copper may have an excellent thermal spreading effect. This may be an advantageous property for heat sinks and heat spreaders in high-power and high-frequency electronics. As an example, MoCu composites containing 15% to 18% copper may be mentioned. Mo75Cu25 may exhibit outstanding thermal conduction as high as 160 W / mK. While copper tungsten composite materials with comparable cop- per fractions may exhibit relatively high thermal and high electrical conductivity, molybdenum copper has a lower specific density and superior machinability. Both are relevant criteria for weight-sensitive and integrated micro-electronics. Therefore, molybdenum copper is a particularly well-suited material for heat sinks and heat spreaders by virtue of its superb heat dissipation, electrical transmission, weight sensitivity, and machinability.

[0124] In addition to its superior qualities as detailed above, molybdenum copper possesses other properties being advantageous in terms of exemplary embodiments of the invention. Molybdenum copper composite material may yield an outgassing rate of less than 5.0 IO-9Pa m3 / s. It may allow MoCu heat sinks and heat spreaders to work well in vacuum environments. In addition, molybdenum copper alloys may lend themselves to easy removal of their impurities. Major impurities are Mo oxides and Cu oxides. Other main impurities include N2, H2, and C. Moreover, grain sizes of molybdenum copper may range from 6 pm to 15 pm. The average tolerances of internal pore size are controllable to be as small as 0.01 mm. This fine grain size range assures the low porosity of molybdenum copper. Molybdenum and copper are both non-ferromagnetic metals. Thus, it is also a notable electromagnetic interference (EMI) shielding material. Molybdenum copper is applicable to make components in vacuum electronic devices, requiring high EMI reduction level and adjustable CTE.

[0125] Molybdenum copper structures may be processed by infiltration or solid sintering. Infiltration sintering may involve the molding and sintering of fine molybdenum powders into a porous skeleton structure. Next, capillary forces may push the copper particles into the open area of the sintered molybdenum at temperatures exceeding 1100 °C. The infiltrated mixture may then become a further condensed MoCu composite by further sintering, with a Mo volume fraction between 40% and 85%. The infiltration sintering may improve the microstructure homogeneity and porosity of MoCu composites, thus achieving very high thermal physical performance.

[0126] Solid sintering is an advantageous method for producing MoCu composites. It may involve the mixing and compacting of fine powders of pure molybdenum and oxygen-free copper. The composites may then go to the isothermal sintering process. The sintering may be in an hh / Ar environment at temperatures rising to 1150 °C. This process may allow for an easy control of Mo and Cu weight fractions in the matrix composite. All processing stages may have exacting standards and quality control. That may ensure unsurpassed purity and precision in copper molybdenum materials.

[0127] Advantageously, Mo Cu alloy materials can meet demanding specifications concerning porosity and low outgassing rate. The particle size and purity of these powders, the high temperature of sintering and annealing, and the deforming rates applied at each reduction may also be properly controllable.

[0128] Figure 1 illustrates a cross-sectional view of an electronic device 100 according to an exemplary embodiment of the invention. Figure 2 illustrates a cross-sectional view of a component carrier 112 according to an exemplary embodiment of the invention and forming an upper portion of the electronic device 100 according to Figure 1. In order to illustrates features in an intuitive way, the structure shown in Figure 2 has been stretched in the vertical direction. Figure 3 illustrates an exploded view of a portion of the electronic device 100 according to Figure 1. For example, the electronic device 100 may form part of a computing apparatus. However, other applications are possible.

[0129] The illustrated electronic device 100 comprises a first component carrier 102 (preferably an IC substrate) having a plurality of first electrically conductive layer structures 104 and a plurality of first electrically insulating layer structures 106 (see detail 192 in Figure 1). Moreover, the electronic device 100 comprises a second component carrier 112 (preferably an IC substrate) having a plurality of second electrically conductive layer structures 114 and a plurality of second electrically insulating layer structures 116.

[0130] Any of component carriers 102, 112 may be an integrated circuit (IC) substrate or a printed circuit board (PCB). Each of the component carriers 102 / 112 may comprise a laminated layer stack 190 / 152 comprising electrically conductive layer structures 104 / 114 and electrically insulating layer structures 106 / 116. For example, the electrically conductive layer structures 104 / 114 may comprise patterned metal layers (such as patterned copper foils or patterned deposited copper layers) and vertical through connections, for example copper filled vias, which may be created by drilling and plating. The electrically insulating layer structures 106 / 116 may comprise a respective resin, preferably comprising reinforcing particles therein (for instance glass fibers or glass spheres). Some or all of the electrically insulating layer structures 106 / 116 may be made of an organic material, for instance may comprise epoxy resin. Epoxy is an organic compound made up of chains of carbon linked to other elements such as hydrogen, oxygen, or nitrogen. For example, the electrically insulating layer structures 106 / 116 may be made of prepreg or FR4. The electrically insulating layer structures 106 / 116 may also comprise resin layers being free of glass (in particular glass fibers).

[0131] Alternatively, the electrically insulating layer structures 106 / 116 may comprise inorganic material, for example glass, or ceramic material.

[0132] Although not shown entirely, the uppermost and / or the lowermost electrically insulating layer structure 106 / 116 of each component carrier 102 / 112 may be embodied as a patterned solder resist exposing selective portions of the uppermost and / or the lowermost electrically conductive layer structure 104 / 114. On exposed portions of the uppermost and / or the lowermost electrically conductive layer structure 104 / 114, contacting elements 174, which may be embodied as solder structures, may be formed. Said solder structures may allow to establish a solder connection of the respective component carrier 102 / 112 with an electronic environment, for instance with at least one electronic component 134 with an interface structure 142 / 144 and / or with a mounting board (see reference sign 191 in Figure 4). As an alternative to solder structures, the contacting elements 174 may also be embodied in another way, for instance as sinter structures or as electrically conductive glue.

[0133] As shown as well in Figure 1, electrically functional components 110 may be provided and may each be configured for providing two or more electric functions. Wherever electrically functional components 110 are mentioned in this figure description, it may also be considered as connection structures 176, and vice versa. For example, the plurality of electric functions may correspond to different electric domains (for instance a power domain and an electric ground domain), different voltage levels and / or different current carrying capabilities. Each of the electrically functional components 110 connects the first component carrier 102 with the second component carrier 112 electrically and mechanically. Thus, each of the electrically functional components 110 forms a connection structure 176 connecting the first component carrier 102 and the second component carrier 112 mechanically with each other and enabling an electric coupling in between. By the spacer-type electrically functional components 110 and / or connection structures 176, a central space 108 is formed and delimited in between the component carriers 102, 112. Although not shown, the plurality of electrically functional components 110 may be arranged along an annular path to thereby circumferentially enclose electronic components 134 accommodated in central space 108. For example, 1-200 electrically functional components 110 and / or connection structures 176 may be present in the electronic device 100, for instance 10-150. For example, 1- 20 electronic components 134 may be foreseen, preferably 2-12. The electronic components 134 may be semiconductor chips, for instance manufactured in silicon, silicon-germanium, or silicon carbide technology.

[0134] Each of the electrically functional components 110 comprises two third electrically conductive layer structures 130, which may be C-shaped in a cross-sectional view, and a third electrically insulating layer structure 132 (for instance made of a ceramic material) shaped as a block between the two C- shaped third electrically conductive layer structures 130. For each electrically functional component 110, said third electrically conductive layer structures 130 may be coupled with at least one of the first electrically conductive layer structures 104 and with at least one of the second electrically conductive layer structures 114. For each electrically functional component 110, said third electrically insulating layer structure 132 may be coupled with at least one of the first electrically insulating layer structures 106 and with at least one of the second electrically insulating layer structures 116. More specifically, each of the electrically functional components 110 may comprise, at its bottom side, a first connecting surface 118 facing the first component carrier 102 and having a first connection portion 120 and a second connection portion 122 decoupled from the first connection portion 120. Furthermore, each of the electrically functional components 110 may comprise, at its top side, a second connecting surface 124 having a third connection portion 126 and a fourth connection portion 128 decoupled from the third connection portion 126 and facing the second component carrier 112. The first connecting surface 118 of each of the electrically functional components 110 may be in physical contact with an upper main surface of the first component carrier 102. Correspondingly, the second connecting surface 124 of each of the electrically functional components 110 may be in physical contact with a lower main surface of the second component carrier 112. The first connection portion 120 may be electrically coupled with the third connection portion 126. Moreover, the second connection portion 122 may be electrically coupled with the fourth connection portion 128. The third electrically insulating layer structure 132, such as a dielectric block, may be arranged between, on the one hand, the first connection portion 120 and the third connection portion 126 and, on the other hand, the second connection portion 122 and the fourth connection portion 128.

[0135] Each of the electrically functional components 110 may be embodied as a passive component of a capacitor type. Hence, the electrically functional components 110 may also be denoted as power transfer block capacitors. In other embodiments, at least some of the electrically functional components 110 may be embodied as resistors or copper blocks. An electrically functional component 110 may also function as a diode passing current only in one direction, but not in the opposing other direction. The capacitors constituting the electrically functional components 110 in the illustrated embodiment may act as decoupling capacitors. Such capacitors may also provide an electric battery function. In addition, the capacitors fulfil mechanical a spacer function between component carriers 102, 112.

[0136] Since the first connection portion 120 and the third connection portion 126 are electrically connected with each other, they may provide one of the electric functions provided between the first component carrier 102 and the second component carrier 112. Correspondingly, since the second connection portion 122 and the fourth connection portion 128 are electrically connected with each other, they may provide another one of the electric functions between the first component carrier 102 and the second component carrier 112. Said two electric functions may be electrically and spatially separate from each other.

[0137] As best seen in Figure 3, any of the electrically functional components 110 may form an integral part of the second component carrier 112 already before final assembly. Alternatively, it is however also possible that any of the electrically functional components 110 forms an integral part of the first component carrier 102. Hence, any of the electrically functional components 110 may be pre-assembled with the first component carrier 102 or the second component carrier 112 before assembling the first component carrier 102 and the second component carrier 112 together with the one or more electrically functional components 110 in between. This may reduce the number of bodies to be handled separately during the manufacturing process and may therefore simplify manufacture.

[0138] Advantageously, an interface between the electrically functional components 110 and the component carriers 102, 112 may be provided with a selfcentering meniscus-shaped electrically conductive connection medium 150. The latter may be arranged between, on the one hand, each of the electrically functional components 110 and, on the other hand, the first component carrier 102 and the second component carrier 112. For example, said electrically conductive connection medium 150 may be a soldering alloy (which may be molten during the manufacturing process) or a glue with metallic particles. The electrically conductive connection medium 150 may be configured so as to form a meniscus upon connecting the component carriers 102, 112 via the electrically functional components 110. This may provide for an automatic centering of the electrically functional components 110 with respect to the component carriers 102, 112. When the electrically conductive connection medium 150 becomes flowable during the manufacturing process, it may re-solidify and may thereby experience automatic self-centering.

[0139] The illustrated plurality of electronic components 134 may be electrically connected to the first component carrier 102 and to the second component carrier 112 in the central space 108. The electronic components 134 may be arranged in the central space 108 and may be surrounded by the annularly arranged electrically functional components 110. For example, each of the electronic components 134 may be a semiconductor chip. Each of the electronic components 134 has electrically conductive contacting elements 174, which are here embodied as solder structures, on each of a first main surface and an opposing second main surface of the respective electronic component 134. For instance, a front side of the semiconductor chip-type electronic components 134 may be arranged at their bottom main surface so that chip pads on the bottom main surface may be electrically connected by the bottom-sided contacting elements 174. To put it shortly, the electronic components 134 may be arranged face-down. However, also top-sided contacting elements 174 may be present at the upper main surface of the electronic component(s) 134 corresponding to the chip back side. In an embodiment, it may be possible that one or more vertical through connections (such as one or more through silicon vias, not shown) extend vertically through the one or more electronic components 134 for establishing a front-back-connection. It is however also possible that the one or more electronic components 134 have chip pads at both opposing main surfaces thereof.

[0140] The first electrically conductive layer structures 104 of the first component carrier 102 may be electrically coupled with the contacting elements 174 on the first main surface of the electronic components 134. Correspondingly, the second electrically conductive layer structures 114 may be electrically coupled with the contacting elements 174 on the second main surface of the electronic components 134. Thus, each of the electronic components 134 may comprise a first main surface electrically coupled with the first component carrier 102. Furthermore, each of the electronic components 134 may comprise an opposing second main surface electrically coupled with the second component carrier 112 and through the electrically functional components 110 with the first component carrier 102.

[0141] Advantageously, the first main surface of each of the electronic components 134 may be configured, preferably exclusively, for a transmission of electric signals between the electronic components 134 and the first component carrier 102. In contrast to this, the second main surface of each of the electronic components 134 may be configured, preferably exclusively, for receiving electric power from the first component carrier 102 via the electrically functional components 110 and the second component carrier 112. Correspondingly, the first component carrier 102 may be configured for transmission of electric signals with the bottom side of the electronic components 134. In contrast to this, the second component carrier 112 is configured for delivering electric power to the top side of the electronic components 134.

[0142] Now specifically referring to Figure 3, the first component carrier 102 may comprise one or more embedded components 136 being embedded in an interior of the stack 190. For example, such one or more embedded components 136 may provide a voltage control function to the electronic device 100. For example, the embedded components 136 may comprise DC-DC converters, inductors, capacitors, etc.

[0143] Now referring in detail to the component carrier 112 as best seen in Figure 2, its stack 152 may be provided with said electrically conductive layer structures 114 which comprise a multi-layer structure 138 of a plurality of stacked metallic layer structures 140 of different electrically conductive materials. Alternatively, the materials of different metallic layer structures 140 of the multi-layer structure 138 may be the same. In the embodiment of Figure 1 to Figure 3, the multi-layer structure 138 is composed of three stacked layer structures 140, wherein a central one thereof comprises molybdenum or molybdenum-copper and the outer two are made of copper. Thus, the two opposing external layer structures 140 of said multi-layer structure 138 may be made of the same electrically conductive material, copper in the mentioned example. For example, the central one of said layer structures 140 of the multi-layer structure 138 may comprise molybdenum or molybdenum-copper (wherein the latter may have a weight percentage of copper in relation to an overall weight of said central layer structure 140 preferably in a range from 15% to 40%).

[0144] As shown, said multi-layer structure 138 may have a thickness D preferably in a range from 180 pm to 720 pm. More specifically, said multi-layer structure 138 comprises two exterior layer structures 140 of a first thickness dl made of copper and one central layer structure 140 of a second thickness d2 made of molybdenum or molybdenum-copper. Preferably, a ratio between the first thickness dl and the second thickness d2 may be in a range from 1 :4 to 1 : 1.

[0145] What concerns the composition of the second component carrier 112, organic materials, glass and / or silica are appropriate materials for the second electrically insulating layer structures 116. The material composition of the multi-layer structure 138 may for instance comprise a material sequence Cu- Invar-Cu, Cu-Mo-Cu, Cu-MoCu-Cu, etc. The mentioned materials selected for the central layer structure 140 may provide advantageous thermal expansion properties and may therefore reduce a coefficient of thermal expansion (CTE) mismatch with the material of the semiconductor chip-type electronic components 134. Thus, undesired phenomena such as warpage and delamination may be efficiently suppressed. Electric power may pass through the entire multi-layer structure 138, so that the entire multi-layer structure 138 may act as a single conductor.

[0146] Now referring specifically to Figure 2, said multi-layer structure 138 may be electrically coupled with specific electrically conductive layer structures 114a of said electrically conductive layer structures 114. As shown in Figure 2, said specific electrically conductive layer structures 114a may be exposed at an external surface 154 of the stack 152. An exposed surface area "a" of said exposed electrically conductive layer structures 114a may be smaller than a planar extension area "A" of said multi-layer structure 138. Any of the at least one exposed electrically conductive layer structure 114a and / or the multi-layer structure 138 may be structured. The exposed electrically conductive layer structures 114a may be partially made of a material which is different from the material of the multi-layer structure 138 in contact with said exposed electrically conductive layer structures 114a. Said exposed electrically conductive layer structures 114a may comprise a conductive surface finishing layer structure 158, which may be made for instance of nickel, palladium and / or gold. Other ones of said exposed electrically conductive layer structures 114a may comprise or consist of copper. Moreover, said exposed electrically conductive layer structures 114a can be formed of a plurality of stacked layer structures with different lateral extensions.

[0147] As can be taken from Figure 2 as well, the electrically insulating layer structures 116 of the second component carrier 112 may comprise an insulating surface finishing layer structure 162, for instance embodied as a solder resist structure, on the external surface 154 of the stack 152. Said insulating surface finishing layer structure 162 may cover part of said exposed electrically conductive layer structures 114a while exposing another part of said exposed electrically conductive layer structure 114a in a plurality of openings of the insulating surface finishing layer structure 162. These exposed parts of the electrically conductive layer structure 114a may then be connected to the contacting elements 174 on the upper main surface of the electronic components 134. Each of the shown multi-layer structure 138 being arranged side-by-side at the same vertical level may be electrically coupled with the exposed external surface 154 of the stack 152 by a plurality of vertical through connections 166 of said exposed electrically conductive layer structures 114a. For example, the vertical through connections 166 may be metal-filled through vias and / or metal-filled through holes.

[0148] Consequently, the electronic device 100 comprises a plurality of connecting areas 170 on the lower main surface of the component carrier 112 for connection, at a bottom side of the second component carrier 112, with the electronic components 134. Each of the connection areas 170 is electrically connected, in an upward direction, to at least one assigned one of the multilayer structures 138. In addition, each of the connection areas 170 may provide electrical access to other electrically conductive layer structures 114b of said electrically conductive layer structures 114. Said other electrically conductive layer structures 114b are also exposed at external surface 154. At the external surface 154, an alternating sequence of the exposed electrically conductive layer structures 114a and the other electrically conductive layer structures 114b may be formed.

[0149] Furthermore, said multi-layer structures 138 may be electrically decoupled from the other electrically conductive layer structures 114b by the electrically insulating layer structures 116. Said multi-layer structures 138 and said other electrically conductive layer structures 114b are in flush where said multi-layer structures 138 are electrically coupled with said electrically conductive layer structures 114a being exposed at the external surface 154 of the stack 152. A corresponding flushing surface 164 of said multi-layer structures 138 and a corresponding further flushing surface 168 of said other electrically conductive layer structures 114b are separated from each other by said electrically decoupling electrically insulating layer structures 116. As shown in Figure 2, a plurality of flushing surfaces 164 of said multi-layer structures 138 and a plurality of further flushing surfaces 168 of said other electrically conductive layer structures 114b are provided at the same surface of the component carrier 112.

[0150] In view of the different functionality of the first component carrier 102 (for example provision of electric signals) and the second component carrier 112 (for instance provision of electric power), a ratio between a volume occupied by the second electrically conductive layer structures 114 and a volume occupied by the second electrically insulating layer structures 116 may be higher than another ratio between a volume occupied by the first electrically conductive layer structures 104 and a volume occupied by the first electrically insulating layer structures 106. To put it shortly, the relative metal content of the first component carrier 102 may be smaller than the relative metal content of the second component carrier 112. This may allow the second component carrier 112 to provide a large amount of electric power to the electronic components 134 without excessive ohmic losses and without overheating. The first component carrier 102 managing electric signal transport may have lower requirements concerning metal content. For instance, a difference between said ratio and said other ratio divided by said ratio may be in a range from 0.3 to 0.7. Correspondingly, an integration density of electrically conductive layer structures 104 of the electronic device 100 at a bottom side of the electronic components 134 may be larger than another integration density of electrically conductive layer structures 114 of the electronic device 100 at a top side of the electronic components 134. The integration density may denote a number of electrically conductive structures per cross-sectional area or per volume in a respective region of the electronic device 100.

[0151] Referring to Figure 1 and Figure 3, the electronic device 100 may also comprise a first interface structure 142, preferably embodied as a signal interposer, in an interface region between the first component carrier 102 and the electronic components 134. For instance, the interposer-type first interface structure 142 may comprise a matrix comprising silicon, glass, an organic material, silicon carbide, etc. Metallic structures, for instance made of copper, may be formed inside said matrix so as to extend over the entire thickness of the first interface structure 142. Descriptively speaking, first interface structure 142 may function as a redistribution layer. The first interface structure 142 may be configured for transmitting electric signals between the first component carrier 102 and the electronic components 134. Advantageously, the first interface structure 142 may also be configured to function as stress relief structure (see Figure 26). Referring to Figure 1 to Figure 3, the electronic device 100 may furthermore comprise a second interface structure 144, preferably embodied as a power interposer, in an interface region between the second component carrier 112 and the electronic components 134. As shown in Figure 2, the second interface structure 144 may, in some embodiments, form part of the second component carrier 112. For instance, the second interface structure 144 may be denoted as floating interface carrier, for instance comprising glass. With reference to Figure 2, an electrically conductive surface area of a main surface of the second interface structure 144 facing the electronic components 134 may be smaller than on an opposing other main surface of the second interface structure 144 facing the multi-layer structure 138. In one embodiment, the second interface structure 144 may be embodied as a glass substrate with wiring structures going through it. Furthermore, the second interface structure 144 may be designed to function as a stress relief structure (see Figure 26).

[0152] Moreover, an integration density of electrically conductive structures of the electronic device 100 closer to the electronic components 134 may be larger than another integration density of electrically conductive structures of the electronic device 100 further remote from the electronic components 134. A locally increased integration density may be preferably present at a top side and at a bottom side of the electronic components 134. In contrast to this, a locally decreased integration density may be present in regions of the component carriers 102, 112 further remote from the electronic components 134. Consequently, the first component carrier 102 in combination with the first interface structure 142 may function as a bottom-sided redistribution structure for providing a transition between larger characteristic dimensions (in particular larger pitch) of component carrier (in particular PCB or IC substrate) technology and smaller characteristic dimensions (in particular smaller pitch) of semiconductor chip technology. Accordingly, the second component carrier 112 in combination with the or its second interface structure 144 may function as a top-sided redistribution structure for providing a transition between larger characteristic dimensions (in particular larger pitch) of component carrier (in particular PCB or IC substrate) technology and the smaller characteristic dimensions (in particular smaller pitch) of semiconductor chip technology.

[0153] The described architecture allows to couple electric signals along a short and substantially straight path from the first component carrier 102 through the first interface structure 142 into the electronic components 134. This may lead to low losses, low ohmic heat and high signal quality and integrity. In parallel, electric power may be supplied along a loop from first component carrier 102 through electrically functional components 110 into the second component carrier 112 and through second interface structure 144 into the electronic components 134. More precisely, the flow of supplied electric power may be along a direction corresponding to an arrow 196, whereas a return current of the electric power may propagate as indicated by an arrow 197. Both reference signs 196, 197 relate to a power supply path. A signal supply path may be arranged around first interface structure 142, i.e. below the electronic components 134. Thus, the signal supply path may be spatially separated from the power supply path.

[0154] In parallel, heat developed by the electronic components 134 during operation of the electronic device 100 may be removed efficiently through second component carrier 112 (and in particular through its multi-layer structure 138) towards an environment. This may be done along the power supply path, and not along the signal supply path so that no disturbance of electric signals may occur.

[0155] The second interface structure 144 may be constructed to render the second component carrier 112 and the electronic components 134 compatible. For example, the second interface structure 144 may provide a redistribution layer functionality converting a one-to-one port configuration on a top side to a one-to-many port configuration on a bottom side.

[0156] Figure 4 illustrates a cross-sectional view of an electronic device 100 according to an exemplary embodiment of the invention and shows an electric power path 146 / 148, an electric signal path 193 and a heat flow path 199.

[0157] The electronic device 100 of Figure 4 comprises, in addition to Figure 1 to Figure 3, a mounting board 191 which is provided at a bottom side of the electronic device 100 of Figure 4. For example, the mounting board 191 may be a printed circuit board (PCB), and each of the first component carrier 102 and the second component carrier 112 may be an integrated circuit (IC) substrate. The first component carrier 102 is mounted on the mounting board 191 and is electrically and mechanically connected to the mounting board 191 by contacting elements 174, such a solder structures. The contacting elements 174 on a bottom side of the first component carrier 102 may form a ball grid array (BGA). The contacting elements 174 on a top side of the first component carrier 102 may form interposer bumps. The contacting elements 174 on a top side of the electronic components 134 may form power bumps. Additionally or alternatively, any of the different level contacting elements 174 may comprise one of solder balls, bumps, pillars, or nanowires. On the top side of the electronic device 100 of Figure 4, a heat sink 172 is connected to the upper main surface of the second component carrier 112. The heat sink 172 may remove heat created during operation of the electronic device 100, in particular created by the electronic components 134. In the shown embodiment, heat sink 172 comprises an electrically conductive plate (for instance made of copper, or aluminum) from which a plurality of cooling fins extend upwardly. However, other types of heat sinks 172 are possible, for instance a water cooling device, an air cooling device and / or a heat pipe.

[0158] As shown, electronic device 100 comprises a power supply path 146 provided for power feeding and extending from the mounting board 191, through the first component carrier 102 through the electrically functional components 110 (functioning as connection structures 176) and via the second component carrier 112 and its second interface structure 144 towards the electronic components 134. More specifically, the supplied electric power is guided through the multi-layer structures 138. For example, very high electric currents, for example several 10 Ampere or even several 100 Ampere, may flow along the power supply path 146 of the electronic device 100 during operation. Moreover, a power return path 148 extends from the electronic components 134, via the second component carrier 112 and its second interface structure 144, via the electrically functional components 110 through the first component carrier 102 back into the mounting board 191. More specifically, the returned electric power is guided through electrically conductive layer structures 114 which are electrically decoupled from the multi-layer structures 138 by the electrically insulating layer structures 116. Optionally, the applied power pathway may use a different electrically functional component 110 compared to the described one implementing a removal power pathway. Also, the power may be removed through the bottom side (and may then not be guided though the second component carrier 112).

[0159] While electric power is supplied (and preferably returned) through the second component carrier 112 to the top side of the electronic components 134, signal transmission to and / or from the electronic components 134 occurs from their bottom side through the first component carrier 102 including first interface structure 142 only. A signal transition path is indicated with reference sign 193 in Figure 4. As shown, the signal transition path may have a substantially vertical orientation. Thus, electric power supply path 146 and electric signal supply path 193 are spatially separated in the architecture according to Figure 4. Electric signals may be delivered to and / or away from the electronic component(s) 134.

[0160] Advantageously, said multi-layer structures 138 are highly thermally conductive structures defining a heat removal path 199 which extends from the electronic components 134 (being the main heat sources during operation of electric device 100) through the second component carrier 112 up to the heat sink 172. In this context, the multi-layer structures 138 do not only significantly contribute to electric energy supply for the electronic components 134, but act simultaneously as heat dissipation promoting elements. To put it shortly, heat removal out of electronic device 100 occurs predominantly in a vertically upward direction according to Figure 4.

[0161] The first electrically conductive layer structures 104 and the second electrically conductive layer structures 114 are exposed on facing main surfaces of the first component carrier 102 and the second component carrier 112. Each of the first electrically conductive layer structures 104 and the second electrically conductive layer structures 114 comprise peripheral conductive portions in a peripheral region 194 having a first function. The first electrically conductive layer structures 104 (and optionally the second electrically conductive layer structures 114, not shown) may also have central conductive portions in a central region 195 having a second function. The first function of the peripheral conductive portions in peripheral region 194 may comprise a supply of the electronic components 134 with electric power and an electric reference potential. The second function of the central conductive portions in central region 195 comprises a supply of the electronic components 134 with electric signals.

[0162] Figure 5 to Figure 13 show different cross-sectional views of structures obtained during manufacturing a second component carrier 112 of an electronic device 100 according to exemplary embodiment of the invention.

[0163] Referring to Figure 5, an electrically conductive multi-layer structure 138 composed of a plurality of stacked layer structures 140 is shown. For example, the three-layer configuration of multi-layer structure 138 may be embodied as a copper-molybdenum-copper sequence, a copper-Mo70Cu30- copper configuration or a copper-invar-copper configuration.

[0164] Referring to Figure 6, the multi-layer structure 138 of Figure 5 has been patterned by drilling. Consequently, drill holes 107 may be formed in the multi-layer structure 138. Preferably, the drill holes 107 may be configured as through holes. Alternatively, the drill holes 107 may be configured as blind holes. The drill holes 107 may have a cylindrical and / or frustoconical shape.

[0165] Referring to Figure 7, the patterned multi-layer structure 138 of Figure 6 may be inserted in a cavity 198 of a panel. Said panel may comprise a central second electrically insulating layer structure 116 surrounded by second electrically conductive layer structures 114. For example, the panel may be embodied as a two-layer core with cavity 198. An adhesive tape 101 may be placed below panel with cavity 198.

[0166] Referring to Figure 8, a double layer 103 composed of a bottom-sided second electrically insulating layer structure 116 (for instance a prepreg sheet comprising resin for lamination) and of a top-sided second electrically conductive layer structure 114 (for instance a copper foil) may be connected with the structure of Figure 7 after assembling the adhesive tape 101 and the patterned multi-layer structure 138 with the panel. Said connection may be formed by lamination, i.e. the application of heat and special pressure. Thereby, at least one sidewall of the multi-layer structure 138 may be in contact with the second electrically insulating layer structure 116 over the entire sidewall thickness.

[0167] Referring to Figure 9, the obtained structure is shown after removal of tape 101. Referring to Figure 10, the structure of Figure 9 is subjected to drilling to thereby form through holes 105. For example, a drill and via in via drill process may be executed. The through holes 105 may have a cylindrical and / or frustoconical shape.

[0168] Referring to Figure 11, a plating process may be carried out to fill the through holes 105 with an electrically conductive material such as copper. For example, said plating process may comprise an electroless plating process and / or an electroplating process.

[0169] Referring to Figure 12, a surface mask may be formed. Thereby, a pattern of electrically insulating solder resist 160 may be formed on the bottom main surface of the structure of Figure 11.

[0170] Referring to Figure 13, electrically functional components 110 are connected to the bottom side of the structure shown in Figure 12 by electrically conductive connection medium 150. Advantageously, a selfcentering meniscus-shape of the electrically conductive connection medium 150 may be formed. The electrically functional components 110 may be embodied as described above referring to Figure 1 to Figure 3. During use of the readily manufactured electronic device 100, a power supply current may propagate along arrow 196, whereas a return current may propagate along a direction corresponding to arrow 197.

[0171] Figure 14 to Figure 18, in combination with Figure 10 to Figure 13, show different cross-sectional views of structures obtained during manufacturing a second component carrier 112 of an electronic device 100 according to another exemplary embodiment of the invention.

[0172] Referring to Figure 14, the process may start with individual electrically conductive layer structures 114, which may be interconnected to form an integral multi-layer structure 138 as shown in Figure 15.

[0173] Referring to Figure 15, a drilling process may be carried out optionally.

[0174] Referring to Figure 16, the multi-layer structure 138 of Figure 15 may be inserted in a cavity 198 of a panel. Said panel may comprise a central second electrically insulating layer structure 116 surrounded by second electrically conductive layer structures 114. An adhesive tape 101 may be placed below panel with cavity 198.

[0175] Referring to Figure 17, a double layer 103 (as described above referring to Figure 8) may be connected by lamination with the structure of Figure 16 after connecting the adhesive tape 101 and the multi-layer structure 138 with the panel.

[0176] Referring to Figure 18, tape 101 may be removed. A drilling process may be carried out for forming drill holes 109 extending vertically through the entire layer structure.

[0177] Thereafter, a resin fill of the drill holes 109 formed by said drill may be executed. Moreover, a further drill of via in via may be executed for forming additional through holes in the structure. As a result, a structure as shown in Figure 10 or similar to Figure 10 may be obtained.

[0178] Thereafter, the processes described above referring to Figure 11 to Figure 13 may be executed, and a second component carrier 112 as shown in Figure 13 or similar to Figure 13 may be obtained.

[0179] Figure 19 illustrates a cross-sectional view and a plan view of a second interface structure 144 of a second component carrier 112 of an electronic device 100 according to an exemplary embodiment of the invention.

[0180] More precisely, a top portion of Figure 19 shows a cross-section of second interface structure 144, as described in further detail above, see in particular Figure 2. A portion 111 of second interface structure 144 is shown as a detail 113 in Figure 19.

[0181] Furthermore, Figure 19 shows a plan view 115 on the top side of the second interface structure 144 and a plan view 117 on the bottom side of the second interface structure 144.

[0182] For example, an electric power supply may be accomplished by electrically conductive layer structures 114 shown with reference sign 119, whereas a return current (grounded) may be conducted along electrically conductive layer structure 114 denoted with reference sign 121. Reference sign 121 shows via in via pads.

[0183] Figure 20 to Figure 23 show different cross-sectional views of structures obtained during manufacturing an electronic device 100 according to an exemplary embodiment of the invention.

[0184] Referring to Figure 20, an exploded view of the main constituents 102, 142, 134, 144 of the electronic device 100 according to Figure 1 are shown. This constituents may be interconnected by soldering, sintering or electrically conductive glue making use of the various contacting elements 174.

[0185] Referring to Figure 21, a bottom portion shows the result of the interconnection process described above referring to Figure 20. A top portion shows the result of the manufacturing method of second component carrier 112 according to the embodiments of Figure 5 to Figure 18.

[0186] Referring to Figure 22, the result of the interconnection of the bottom portion and the top portion of Figure 21 by electrically conductive connection medium 150 is shown. The meniscus of the electrically conductive connection medium 150 serves to obtain a self-centering effect.

[0187] Referring to Figure 23, an electronic device 100 according to an exemplary embodiment of the invention is shown which is obtained based on the structure of Figure 22 by attaching contacting elements 174, in particular solder bumps, to the bottom main surface of the first component carrier 102.

[0188] Figure 24 illustrates a cross-sectional view of a component carrier 112 according to another exemplary embodiment of the invention.

[0189] The embodiment of the second component carrier 112 of Figure 24 differs from the embodiment of Figure 2 in particular in that, according to Figure 24, the multi-layer structure 138 comprises five (rather than three) stacked layer structures 140. More specifically, the second component carrier 112 of Figure 24 comprises an alternating sequence of five layer structures 140 made of copper and made of molybdenum or molybdenum-copper (for example Cu- Mo-Cu-Mo-Cu). To put it shortly, the embodiment of Figure 24 has a multilayer structure 138 with three copper layer structures 140 in form of the two outermost layer structures 140 and the most central layer structure 140. In between each adjacent pair of copper layer structures 140, a respective intermediate layer structure 140 comprising molybdenum (for example consisting of molybdenum or being a molybdenum-copper composition) or Invar is present. This material selection and five (or more) alternating material sequence arrangement of the multi-layer structure 138 may provide excellent thermal expansion properties and may therefore strongly reduce a coefficient of thermal expansion (CTE) mismatch with the material of the semiconductor chiptype electronic components 134 of the electronic device 100. As a result, artefacts such as warpage and delamination may be strongly suppressed. Descrip- tively speaking, the entire multi-layer structure 138 may act as a single conductor for electric power being transported through the multi-layer structure 138.

[0190] Figure 25 illustrates a cross-sectional view of part of an electronic device 100 according to an exemplary embodiment of the invention. More specifically, Figure 25 shows a detail of such an electronic device 100 in an interface region between the one or more electronic components 134 and the interface structures 142, 144.

[0191] As can be taken from the detail of Figure 25, the first interposer structure 142 may comprise a non-metallic matrix 123 (for instance made of glass, ceramic, an organic material and / or a semiconductor material) and electrically conductive portions 182 (for example made of copper, gold or aluminum) embedded therein and extending along the whole path between opposing main surfaces of the first interposer structure 142.

[0192] As shown in Figure 25, the first interface structure 142 may be formed with a fan-out design of the electrically conductive portions 182 between the at least one electronic component 134 and the first component carrier 102 so that the electrically conductive portions 182 may have a larger integration density on a side facing the at least one electronic component 134 than on an opposing side facing the first component carrier 102. For this purpose, the electrically conductive portions 182 may be bifurcated (see reference sign 125) and / or may comprise connected sections of horizontal and vertical portions (see reference sign 127). Correspondingly, a larger size and / or a smaller integration density of the electrically conductive contacting elements 174 covering pads 129 of the first electrically conductive layer structures 104 of the first component carrier 102 may be present compared with a size and / or an integration density of the electrically conductive contacting elements 174 at a main surface of the at least one electronic component 134 facing the first interface structure 142.

[0193] As shown as well in the detail of Figure 25 is a portion of second interface structure 144 in an interface region between the second component carrier 112 and the upper second main surface of the at least one electronic component 134. Said second interface structure 144 interconnects conductive surfaces of the second electrically conductive layer structures 114a, 114b with the contacting elements 174 on the second main surface. Accordingly, a larger size and / or a smaller integration density of the electrically conductive contacting elements 174 covering pads of the second electrically conductive layer structures 114a, 114b of the second component carrier 112 may be present compared with a size and / or an integration density of the electrically conductive contacting elements 174 at a main surface of the at least one electronic component 134 facing the first interface structure 142. As shown, the second interface structure 144 is formed with a fan-out design of electrically conductive portions 184 of the second interface structure 144 between the at least one electronic component 134 and the second component carrier 112 so that the electrically conductive portions 184 have a larger integration density on a side facing the at least one electronic component 134 than on an opposing side (see Figure 2). Accordingly, an electrically conductive surface area of a main surface of the second interface structure 144 facing the at least one electronic component 134 is smaller than on an opposing other main surface of the second interface structure 144.

[0194] Figure 26 illustrates a cross-sectional view of part of an electronic device 100 according to another exemplary embodiment of the invention.

[0195] The embodiment of Figure 26 differs from the embodiment of Figure 25 in particular in that, according to Figure 26, the first interface structure 142 is configured to reduce or compensate misalignment, such as vertical and / or horizontal tolerances and / or stress, on a side facing the at least one electronic component 134. Correspondingly, the second interface structure 144 of Figure 26 is configured to reduce or compensate misalignment, such as vertical and / or horizontal tolerances and / or stress, on a side facing the at least one electronic component 134.

[0196] What concerns the first interface structure 142, this may be achieved by equipping it with misalignment compensating connection elements 178 connected to the contacting elements 174 of the at least one electronic component 134 on a bottom main surface of the latter. As shown, said misalignment compensating connection elements 178 may comprise a bundle of (for instance sponge-like) nanowires (or alternatively elastic structures such as one or more springs, tiny elastic rods, etc.). What concerns the second interface structure 144, this may be achieved by equipping it with misalignment compensating connection elements 180 connected to the contacting elements 174 of the at least one electronic component 134 on a top main surface of the latter. As shown, said misalignment compensating connection elements 180 may comprise a bundle of nanowires (or alternatively elastic structures such as one or more springs, tiny elastic rods, etc.). Descriptively speaking, the misalignment compensating connection elements 178, 180 may compensate or balance stress (for instance mechanical and / or thermal stress) which may for instance occur due to the different CTE properties of the semiconductor material of the at least one electronic component 134 and the other material of the interface structures 142, 144. Consequently, the integrity of the electronic device 100 as a whole may be improved.

[0197] Figure 27 illustrates a cross-sectional view of an electronic device 100 according to another exemplary embodiment of the invention providing an optoelectronic functionality. Said cross-sectional view corresponds to a line A- A' of a plan view 149 of the electronic device 100.

[0198] The embodiment of Figure 27 differs from the above-described embodiments in particular in that, according to Figure 27, the electronic device 100 comprises a thermally decoupling structure 131 on the second component carrier 112 and a thermally decoupled structure 133 on the thermally decoupling structure 131. Alternatively, the thermal decoupling structures 131 and / or 133 may be constituent(s) of the second component carrier 112.

[0199] The thermally decoupling structure 131 is configured for thermally separating an optical system 151 on top of part of the second component carrier 112 for improving the robustness of the optical system 151 for withstanding heat related to high electric power supplied via the second component carrier 112 to the electronic components 134. For example, the thermally decoupling structure 131 may be a layer having a much lower thermal conductivity than the electrically conductive layer structures 114 below. The thermally decoupling structure 131 may be configured as a thermal dissipation pad. The thermally decoupling structure 131 may separate a section for optical communication and a section for electric power supply. For example, the thermally decoupling structure 131 may be a thin film aerogel, xerogel, cryogel, other aerogel- related materials like organic-based aerogels, or silica aerogels which may be impregnated (for example by polyimide or epoxy). More specifically, the thermally decoupling structure 131 may be embodied as a thermal insulating layer. For example, it may be made of a polyimide and / or an epoxy impregnated silica-aerogel or of an organic-based aerogels like polyimide (PI), polyamide, polyurethane (PU), or reinforced (PI) / polymer aerogels with nanofibers as an embedded layer or inlay. For example, the PI aerogel thermally decoupling structure 131 may have a thermal conductivity of 0.029 W / mK compared to 386 W / mK of copper at 20°C. More generally, the thermally decoupling structure 131 may have a thermal conductivity of below 0.2 W / mK or even below 0.1 W / mK.

[0200] In the shown embodiment, the thermally decoupled structure 133 arranged on top of the thermally decoupling structure 131 and being electrically coupled with the second component carrier 112 comprises an optical system 151. As shown, the optical system 151 comprises an optical connector 135 and an optoelectronic device 137. The thermally decoupling structure 131 may form a thermal barrier inhibiting flow of heat between the second component carrier 112 and the thermally decoupled structure 133 formed thereon. This may allow to thermally decouple the temperature-sensitive optical system 151 mounted on the second component carrier 112 from the ohmic heat generated by electric power transmitted via the second component carrier 112. Consequently, the second component carrier 112 may simultaneously contribute to power supply of the electronic components 134 and may also function for providing a basis for an optical interface.

[0201] The optical connector 135 comprises optical plug or optical connector 135 configured for transmitting an optical signal from the electronic device 100 to an optical communication partner device (not shown) and / or from the optical communication partner device to the electronic device 100. As shown, the optical connector 135 is surface mounted on the second component carrier 112 and is optically coupled with an optical fiber 143 for transmitting an optical signal, unidirectionally or bidirectionally. For instance, the optical connector 135 may be plugged sideways in a receptacle of an optoelectronic device 137.

[0202] The mentioned optoelectronic device 137 may comprise an optoelectronic converter (for instance comprising a photodiode) configured for convert- ing an electrical signal into an optical signal for transmission by the optical fiber 143 to an optical receiver (not shown). Additionally or alternatively, the optoelectronic device 137 may be configured for converting an optical signal received from an optical transmitter (not shown) which is coupled with the optical fiber 143 into an electrical signal. The optoelectronic device 137 may be configured to function as optoelectronic receiver, optoelectronic transmitter or optoelectronic transceiver. An electric signal to be converted in an optical signal for transmission via the optical fiber 143 may be received by the optoelectronic device 137 from any of the electronic components 134 via the second component carrier 112. Additionally or alternatively, an optical signal to be converted into an electric signal for transmission to any of the electronic components 134 via the second component carrier 112 may be received via the optical fiber 143.

[0203] The optical system 151 comprising the optical connector 135 and the optoelectronic device 137 may form part of an optical bench mounted in a cavity or a nest or on a surface of the second component carrier 112. The optical bench may comprise for example glass, silicon, amorphous silicon, etc. The optoelectronic device 137 of the optical bench may be equipped with thermal isolation and electrical connection to at least one of the electronic components 134, for instance to a processing unit thereof.

[0204] Reference sign 145 in Figure 27 denotes a high speed signal transfer path between the optical system 151 and an electronic component 134, for instance a processing unit.

[0205] Also in the embodiment of Figure 27, the second interface structure 144 may be embodied as a floating interface carrier (see reference sign 161, for instance comprising glass).

[0206] Referring to the top side of the electronic components 134 and reference sign 159, a power connection pitch may be of coarser density but with larger dimensioned connections into the floating carrier-type second interface structure 144 than on the bottom side of the electronic components 134.

[0207] As shown by reference sign 147, a power region of the electronic device 100 is a region thereof in which there are power transfer connections for high current (which may be designed for example in accordance with the requirements of a specific application).

[0208] Now referring to plan view 149 of the electronic device 100, the optical system 151, a heat dissipation area 153 and a power feeding area 155 are shown. The heat dissipation area 153 relates to a back side of the upper substrate in form of second component carrier 112 and is an available area for thermal dissipation. For instance, the heat dissipation area 153 may comprise one or more heat sinks 172. The power feeding area 155 may be an overlapping area for back-sided power feeding to the electronic components 134, for instance comprising a central processing unit (CPU).

[0209] Figure 28 illustrates a cross-sectional view of an electronic device 100 according to another exemplary embodiment of the invention providing an additional memory function. Said cross-sectional view corresponds to a line A- A' of a plan view 157 of the electronic device 100.

[0210] The embodiment of Figure 28 differs from the above-described embodiments in particular in that, according to Figure 28, the electronic device 100 comprises an electrically functional block 139 being surface mounted on the second component carrier 112. In the shown embodiment, the electrically functional block 139 comprises a memory block, for example a high bandwidth memory (HBM) block embodied as a stack of a plurality of memory components 141. As shown, the surface mounted electrically functional block 139 may provide the electronic device 100 with a memory functionality. In the shown embodiment, this is accomplished by a plurality of stacked memory components 141 which may form a high-bandwidth memory (HBM) block providing a memory function to the electronic device 100, and being in particular accessible by at least one of the electronic components 134.

[0211] Thus, the embodiment of Figure 28 relates to the addition of one or more surface mounted electrically functional blocks 139 which can be coupled through the second component carrier 112 with the one or more electronic components 134 (which may comprise a processor to be coupled with a memory). The shown design may lead to short connection paths in between. Optionally (although not shown), the one or more surface mounted electrically functional blocks 139 may be thermally decoupled from the second component carrier 112 by a thermally decoupling structure such as the one described re- ferring to Figure 27 with reference sign 131. Such a thermal decoupling is possible also between the one or more surface mounted electrically functional blocks 139 and the second interface structure 144 (for example can be made part of and / or laminated onto). The second interface structure 144 in between the at least one electronic component 134, sandwiched between component carriers 102, 112, and the at least one surface mounted electrically functional block 139 may function as an interposer for managing high density connections. Furthermore, there may be an optional but advantageous heat sink path between the at least one electronic component 134 and the surface mounted electrically functional block 139.

[0212] The HBM or another electrically functional block 139 may be mounted into a cavity 163 in the second component carrier 112 and onto floating carrier-type second interface structure 144 (which may comprise glass, silicon, etc.). Said floating interface carrier-type second interface structure 144 may match different pitches of the for example HBM-type electrically functional block 139 and the electronic components 134. The cavity 163 may be configured for mounting the electrically functional block 139 therein to reach the second interface structure 144. For example, the HBM pitch may be a very dense pitch corresponding to connections into the floating carrier.

[0213] Figure 29 illustrates a cross-sectional view of an electronic device 100 according to another exemplary embodiment of the invention providing an additional electronic function. Said cross-sectional view corresponds to a line B-B' of a plan view 165 of the electronic device 100.

[0214] The embodiment of Figure 29 differs from the above-described embodiments in particular in that, according to Figure 29, the electronic device 100 comprises another electrically functional block 139 being surface mounted on the second component carrier 112. In the shown embodiment, the electrically functional block 139 may be a power supply block. Thus, the electrically functional block 139 may also comprise a power supply unit for providing the second component carrier 112 with electric power. Said electrically functional block 139 may comprise electric circuitry contributing to the supply of electric power to the electronic components 134. More specifically, the electrically functional block of Figure 29 may comprise DC / DC converter circuitry configured for down-converting an input voltage provided by the first component carrier 102 via the connection structure 176 and the second component carrier 112 into an output voltage for injection into the second component carrier 112 and from there into the electronic components 134. For instance, the electrically functional block 139 of Figure 29 may comprise one or more buck converters 167.

[0215] Referring in further detail to reference sign 167, one or more of the components constructing the electrical functional block may be mounted into a cavity of second component carrier 112, this for instance to host taller components (for example the output inductors), which may also be in direct contact with the power feeding circuits or layer structures 114 of second component carrier 112. Such an implementation may provide a lower contribution to the overall power loop inductance of the inductor's interconnection to the power distribution plane or network.

[0216] In the shown embodiment, the connection structures 176, which may be embodied as electrically functional component 110, may comprise inbound voltage capacitors facing the main or bottom-sided first component carrier 102 and connecting a higher voltage to the upper substrate in form of the second component carrier 112. The connection structures 176 can be directly linked to the PCB main voltage with through vias in the main carrier.

[0217] Referring to reference sign 169, the electrically functional block 139 may comprise an on-board DC / DC converter to step-down from a higher voltage to a lower voltage for injecting the latter voltage into the substratetype second component carrier 112.

[0218] Referring to reference sign 171, the electrically functional block 139 may comprise one or more outbound voltage capacitors connected to the power distribution plane(s) of the second component carrier 112 embodied as upper substrate.

[0219] Referring to reference sign 173, the electrically functional block 139 may comprise a step-down voltage injection structure connected to the power distribution plane(s) of the upper substrate.

[0220] The power feeding area 155 of Figure 29 may be embodied as overlapping area for back side power feeding to the electronic components 134 (for instance comprising a processing unit) from the DC / DC converter. For example, the power feeding area 155 can also be partitioned in different voltage regimes.

[0221] Figure 30 to Figure 33 illustrate different cross-sectional views of structures obtained during manufacturing an electronic device 100 according to an exemplary embodiment, shown in Figure 33, having a height compensating feature for compensating different heights DA, DB of electronic components 134A, 134B sandwiched between the component carriers 102, 112.

[0222] Referring to Figure 30, constituents of a bottom part of the electronic device 100 are shown in an exploded view, i.e. being still separately from each other.

[0223] As shown in Figure 30, the electronic components 134A, 134B may have different thicknesses DA, DB. Second interface structure 144 may be configured to buffer the different thicknesses DA, DB of the electronic components 134A, 134B. Therefore, second interface structure 144 may vary concerning the amount of its layers in different regions, or may have the same amount of layers but being different in thickness. As shown, a second interface structure 144 comprises a first interface section 144A, having a first interface section thickness dA, and being configured to be mounted on a first electronic component 134A, having a first component thickness DA. Correspondingly, the second interface structure 144 comprises a second interface section 144B, having a second interface section thickness dB, and being configured to be mounted on a second electronic component 134B, having a second component thickness DB. Advantageously, the first interface section thickness dA is larger than the second interface section thickness dB so as to compensate a discrepancy between the first component thickness DA being smaller than the second component thickness DB. In the full compensation embodiment of Figure 30, DA+dA=DB+dB. However, the thickness compensation may be also partial, for instance an absolute value of [(DA+dA)-(DB+dB)] / (DA+dA) may be less than 20%, preferably less than 10%.

[0224] In the shown embodiment, the first interface section 144A and the second interface section 144B are physically separate bodies. In another embodiment, however, the first interface section 144A and the second interface section 144B may form parts of a common integral body which may be stepped or profiled for thickness compensation purposes. As shown, the second interface structure 144 is divided into different interface sections 144A, 144B having different thicknesses dA, dB so as compensate for different thicknesses DA, DB of different electronic components 134A, 134B on which the respective second interface section 144A, 144B is to be mounted. Thus, a plurality of electronic components 134A, 134B having different thicknesses DA, DB may be arranged side-by-side in the electronic device 100. Differently thick interface sections 144A, 144B of the second interface structure 144 may partially or entirely compensate said thickness difference of the electronic components 134A, 134B.

[0225] The second interface structure 144 in the configuration according to Figure 30 to Figure 33 functions as power interface substrate which simplifies the assembly of multiple semiconductors in form of electronic components 134A, 134B with different heights DB>DA.

[0226] Referring to Figure 31, an exploded view of partially pre-assembled constituents of the electronic device 100 to be formed is shown. According to Figure 31, the first component carrier 102 is connected to the first interface structure 142 with the electronic components 134A, 134B mounted thereon. Moreover, the first interface section 144A is mounted on top of the first electronic component 134A, and the second interface section 144B is mounted on top of the second electronic component 134B, to thereby obtain a lower preassembled part of the electronic device 100 with coplanar upper main surface portions. In the shown embodiment, the mentioned connections are created by soldering using various contacting elements 174.

[0227] Furthermore, connection structures 176 (here embodied as electrically functional components 110) may be connected, for instance by soldering, with a bottom side of the upper portion of the second component carrier 112, to thereby obtain an upper pre-assembled part of the electronic device 100. The electrically and / or thermally conductive surface finishing layer structure 158 is to be arranged between the two mentioned pre-assembled parts of the electronic device 100 to be manufactured.

[0228] Referring to Figure 32, the pre-assembled parts of Figure 31 with the conductive surface finishing layer structure 158 in between have been interconnected to form electronic device 100. Referring to Figure 33, contacting elements 174, such as solder bumps, have been formed on the bottom main surface of the first component carrier 102 for preparing the electronic device 100 for an assembly on a mounting board 191 (such as a PCB) or the like, as shown in Figure 4.

[0229] Advantageously, the embodiment of Figure 30 to Figure 33 can also compensate a mismatch of different heights DA, DB, ... of different electronic components 134A, 134B, ..., by configuring the second interface structure 144 as a floating device which can be made of sections 144A, 144B, ... individually for each of said electronic components 134A, 134B, ... . Thus, a multi-body second interface structure 144 having different individual thicknesses dA, dB, ..., or a single common integral second interface structure 144 with a stepped or profiled geometry for defining different integrally connected sections of different thicknesses (not shown) may be provided for manufacturing an electronic device 100 with electronic components 134A, 134B, ... mounted at the same vertical bottom level but having different heights DA, DB, ... . This increases the flexibility of a device designer of combining different electronic functions provided by different electronic components 134A, 134B, ... having different heights DA, DB, ....

[0230] It should be noted that the term "comprising" does not exclude other elements or steps and the "a" or "an" does not exclude a plurality. Also, elements described in association with different embodiments may be combined.

[0231] It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

[0232] Implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. Instead, a multiplicity of variants is possible which use the solutions shown and the principle according to the invention even in the case of fundamentally different embodiments.

Claims

Claims:

1. An electronic device (100) which comprises: a first component carrier (102) comprising at least one first electrically conductive layer structure (104) and at least one first electrically insulating layer structure (106); a second component carrier (112) comprising at least one second electrically conductive layer structure (114) and at least one second electrically insulating layer structure (116); and at least one electrically functional component (110) configured for providing at least two electric functions and connecting the first component carrier (102) with the second component carrier (112) so as to define a central space (108) in between.

2. The electronic device (100) according to claim 1, wherein the at least two electric functions correspond to at least two different electric domains, at least two different voltage levels and / or at least two different current carrying capabilities.

3. The electronic device (100) according to claim 2, wherein the at least two different electric domains comprise a power domain and an electric reference potential domain, in particular an electric ground domain.

4. The electronic device (100) according to any of claims 1 to 3, wherein the at least one electrically functional component (110) comprises a first connecting surface (118) facing the first component carrier (102) and having a first connection portion (120) and a second connection portion (122), and comprises a second connecting surface (124) having a third connection portion (126) and a fourth connection portion (128) and facing the second component carrier (112); wherein the first connection portion (120) and the third connection portion (126) are electrically connected with each other and are configured to provide one of the at least two electric functions between the first component carrier (102) and the second component carrier (112); andwherein the second connection portion (122) and the fourth connection portion (128) are electrically connected with each other and are configured to provide another one of the at least two electric functions between the first component carrier (102) and the second component carrier (112).

5. The electronic device (100) according to any of claims 1 to 4, wherein the at least one electrically functional component (110) forms an integral part of the first component carrier (102) and / or of the second component carrier (112).

6. The electronic device (100) according to any of claims 1 to 5, wherein a first connecting surface (118) of the at least one electrically functional component (110) is in contact with a main surface of the first component carrier (102) and / or wherein a second connecting surface (124) of the at least one electrically functional component (110) is in contact with a main surface of the second component carrier (112).

7. The electronic device (100) according to any of claims 1 to 6, wherein the at least one electrically functional component (110) comprises at least one third electrically conductive layer structure (130) and at least one third electrically insulating layer structure (132); and wherein the at least one third electrically conductive layer structure (130) is coupled with the at least one first electrically conductive layer structure (104) and / or with the at least one second electrically conductive layer structure (114), and / or wherein the at least one third electrically insulating layer structure (132) is coupled with the at least one first electrically insulating layer structure (106) and / or with the at least one second electrically insulating layer structure (116).

8. The electronic device (100) according to any of claims 1 to 7, wherein the at least one electrically functional component (110) comprises at least two electrically functional components (110), in particular a plurality of electrically functional components (110) arranged along an annular path, each configured for providing the at least two electric functions and each connecting the firstcomponent carrier (102) with the second component carrier (112) so as to define the central space (108) in between.

9. The electronic device (100) according to any of claims 1 to 8, wherein the at least one electrically functional component (110) comprises at least one passive component.

10. The electronic device (100) according to any of claims 1 to 9, wherein the at least one electrically functional component (110) comprises or consists of at least one capacitor.

11. The electronic device (100) according to any of claims 1 to 10, comprising at least one electronic component (134), in particular a plurality of electronic components (134), arranged in the central space (108).

12. The electronic device (100) according to claim 11, wherein the at least one electronic component (134) is electrically connected to the first component carrier (102) and to the second component carrier (112).

13. The electronic device (100) according to claim 12, wherein the at least one electronic component (134) comprises a first main surface electrically coupled with the first component carrier (102) and comprises an opposing second main surface electrically coupled with the second component carrier (112) and through the at least one electrically functional component (110) with the first component carrier (102).

14. The electronic device (100) according to claim 13, wherein the first main surface of the at least one electronic component (134) is configured for a transmission of electric signals between the at least one electronic component (134) and the first component carrier (102).

15. The electronic device (100) according to claim 13 or 14, wherein the second main surface of the at least one electronic component (134) is configured for receiving electric power from the first component carrier (102) via theat least one electrically functional component (110) and the second component carrier (112).

16. The electronic device (100) according to any of claims 1 to 15, wherein a ratio between a volume occupied by the at least one second electrically conductive layer structure (114) and a volume occupied by the at least one second electrically insulating layer structure (116) is higher than another ratio between a volume occupied by the at least one first electrically conductive layer structure (104) and a volume occupied by the at least one first electrically insulating layer structure (106).

17. The electronic device (100) according to claim 16, wherein a difference between said ratio and said other ratio divided by said ratio is in a range from 0.3 to 0.7.

18. The electronic device (100) according to any of claims 12 to 17, wherein the first component carrier (102) is configured for transmission of electric signals with the at least one electronic component (134) and the second component carrier (112) is configured for delivering electric power to the at least one electronic component (134).

19. The electronic device (100) according to any of claims 1 to 18, comprising at least one embedded component (136), in particular a plurality of embedded components (136), being embedded in the first component carrier (102), in particular providing a voltage control function.

20. The electronic device (100) according to any of claims 1 to 19, wherein the at least one second electrically conductive layer structure (114) comprises a multi-layer structure (138) comprising at least two stacked layer structures (140) of different electrically conductive materials.

21. The electronic device (100) according to any of claims 11 to 20, comprising a first interface structure (142), in particular a signal interposer, in an interface region between the first component carrier (102) and the at leastone electronic component (134), in particular configured as stress relief structure.

22. The electronic device (100) according to any of claims 11 to 21, comprising a second interface structure (144), in particular a power interposer, in an interface region between the second component carrier (112) and the at least one electronic component (134).

23. The electronic device (100) according to claim 22, wherein an electrically conductive surface area of a main surface of the second interface structure (144) facing the at least one electronic component (134) is smaller than on an opposing other main surface of the second interface structure (144).

24. The electronic device (100) according to any of claims 11 to 23, comprising a power supply path (146) from the first component carrier (102) through the at least one electrically functional component (110) via the second component carrier (112) towards the at least one electronic component (134), and a power return path (148) from the at least one electronic component (134) via the second component carrier (112) and the at least one electrically functional component (110) to the first component carrier (102).

25. The electronic device (100) according to any of claims 11 to 24, wherein an integration density of electrically conductive structures of the electronic device (100) closer to the at least one electronic component (134) is larger than another integration density of electrically conductive structures of the electronic device (100) further remote from the at least one electronic component (134), in particular at a top side and / or at a bottom side of the at least one electronic component (134).

26. The electronic device (100) according to any of claims 11 to 25, wherein an integration density of electrically conductive structures of the electronic device (100) at a bottom side of the at least one electronic component (134) is larger than another integration density of electrically conductive structures ofthe electronic device (100) at a top side of the at least one electronic component (134).

27. The electronic device (100) according to any of claims 1 to 26, comprising a self-centering meniscus-shaped electrically conductive connection medium (150) between, on the one hand, the at least one electrically functional component (110) and, on the other hand, the first component carrier (102) and the second component carrier (112).

28. The electronic device (100) according to any of claims 1 to 27, comprising a thermally decoupling structure (131) on the second component carrier (112) and a thermally decoupled structure (133), for example an optical system (151), on the thermally decoupling structure (131) for thermally decoupling the thermally decoupled structure (133) from the second component carrier (112).

29. The electronic device (100) according to claim 28, wherein the optical system (151) comprises an optical connector (135) and / or an optoelectronic device (137).

30. The electronic device (100) according to any of claims 1 to 29, comprising an electrically functional block (139) being surface mounted on the second component carrier (112) or arranged in a cavity in the second component carrier (112), in particular in direct contact with second interface structure (144).

31. The electronic device (100) according to claim 30, wherein the electrically functional block (139) comprises a power supply block, for example comprising DC / DC converter circuitry, and / or a memory block, for example a high bandwidth memory block and / or a stack of a plurality of memory components (141).

32. The electronic device (100) according to any of claims 22 to 31, wherein the second interface structure (144) comprises a first interface section (144A), having a first interface section thickness (dA), and beingmounted on a first electronic component (134A), having a first component thickness (DA), of said at least one electronic component (134); wherein the second interface structure (144) comprises a second interface section (144B), having a second interface section thickness (dB), and being mounted on a second electronic component (134B), having a second component thickness (DB), of said at least one electronic component (134); and wherein the first interface section thickness (dA) is larger than the second interface section thickness (dB) so as to at least partially compensate the first component thickness (DA) being smaller than the second component thickness (DB).

33. The electronic device (100) according to claim 32, wherein the first interface section (144A) and the second interface section (144B) are physically separate bodies or form parts of a common integral body.

34. A computing apparatus comprising an electronic device (100) according to any of claims 1 to 33.

35. A method of manufacturing an electronic device (100), wherein the method comprises: providing a first component carrier (102) comprising at least one first electrically conductive layer structure (104) and at least one first electrically insulating layer structure (106); providing a second component carrier (112) comprising at least one second electrically conductive layer structure (114) and at least one second electrically insulating layer structure (116); connecting the first component carrier (102) with the second component carrier (112) by at least one electrically functional component (110) in between so as to define a central space (108) between the first component carrier (102) and the second component carrier (112); and configuring the at least one electrically functional component (110) for providing at least two electric functions.

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