Light detection device

Abstract

A light detection device according to an embodiment of the present invention comprises: a semiconductor layer; a plurality of pixels provided in the semiconductor layer and including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element; and a pixel isolation region. The first pixel includes a first isolation region, a second isolation region, a third isolation region, a fourth isolation region, a floating diffusion provided between the third isolation region and the fourth isolation region, and a first region of a first conductivity type provided between the third isolation region and the floating diffusion.

Description

Photodetector

[0001] The present disclosure relates to a light detection device.

[0002] A device has been proposed that has an inter-pixel separator including a protrusion that protrudes toward the center of the pixel, and that performs photoelectric conversion of incident light (Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2018-201015

[0004] There is a demand for improved performance in light-detecting devices.

[0005] It is desirable to provide a photodetector device with good performance.

[0006] According to an embodiment of the present disclosure, a photodetector device includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixels. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, a floating diffusion provided between the third isolation region and the fourth isolation region, and a first region of a first conductivity type provided between the third isolation region and the floating diffusion. According to an embodiment of the present disclosure, the photodetector device includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixel. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, and a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction. The length of the third isolation region in the first direction is different from the length of the first isolation region or the length of the second isolation region in the second direction. An optical detection device according to one embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided around the pixels in the semiconductor layer.The first pixel includes a first isolation region provided between a first photoelectric conversion element and a second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between a third photoelectric conversion element and a fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a first gate and a second gate provided corresponding to the first photoelectric conversion element and capable of transferring electric charges, and an overflow path provided adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element. The first gate is provided adjacent to the overflow path and the third isolation region. The second gate is provided adjacent to the overflow path and the first isolation region. A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels each having a photoelectric conversion element provided in the semiconductor layer, a pixel isolation region provided to surround adjacent pixels, and a first isolation region provided between adjacent pixels. The first isolation region is provided away from the pixel isolation region. The photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixels. The first pixel has a first isolation region provided between a first photoelectric conversion element and a second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between a third photoelectric conversion element and a fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, a floating diffusion provided between the third isolation region and the fourth isolation region, and a first region of a first conductivity type provided between a plurality of adjacent pixels.

[0007] FIG. 1 is a block diagram showing an example of a schematic configuration of an imaging device, which is an example of a photodetector according to an embodiment of the present disclosure. FIG. 2 is a diagram showing an example of an arrangement of pixels of the imaging device according to the first embodiment of the present disclosure. FIG. 3 is a diagram for explaining an example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 4A is a diagram for explaining another example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 4B is a diagram for explaining another example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 5A is a diagram for explaining another example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 5B is a diagram for explaining another example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 6 is a diagram showing an example of a planar configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 7 is a diagram showing an example of a cross-sectional configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. FIG. 8 is a diagram for explaining an example layout of the imaging device according to the first embodiment of the present disclosure. FIG. 9 is a diagram showing an example of an arrangement of pixel transistors of the imaging device according to the first embodiment of the present disclosure. FIG. 10 is a diagram for explaining a configuration example of an imaging device according to Modification 1 of the present disclosure. FIG. 11 is a diagram for explaining a configuration example of an imaging device according to Modification 2 of the present disclosure. FIG. 12 is a diagram for explaining a configuration example of an imaging device according to Modification 3 of the present disclosure. FIG. 13 is a diagram for explaining a configuration example of an imaging device according to Modification 4 of the present disclosure. FIG. 14 is a diagram for explaining a configuration example of an imaging device according to Modification 4 of the present disclosure. FIG. 15 is a diagram for explaining another configuration example of an imaging device according to Modification 4 of the present disclosure. FIG. 16 is a diagram for explaining a configuration example of an imaging device according to Modification 5 of the present disclosure. FIG. 17 is a diagram for explaining another configuration example of an imaging device according to Modification 5 of the present disclosure. FIG. 18 is a diagram for explaining a configuration example of an imaging device according to Modification 6 of the present disclosure. FIG. 19 is a diagram for explaining another configuration example of an imaging device according to Modification 6 of the present disclosure. FIG. 20 is a diagram for explaining a configuration example of an imaging device according to Modification 7 of the present disclosure. FIG. 21 is a diagram for explaining a configuration example of an imaging device according to Modification 8 of the present disclosure. FIG. 22 is a diagram illustrating an example of the configuration of an imaging device according to Modification 8 of the present disclosure.FIG. 23 is a diagram for explaining a configuration example of an imaging device according to a ninth modification of the present disclosure. FIG. 24 is a diagram for explaining a configuration example of an imaging device according to the ninth modification of the present disclosure. FIG. 25 is a diagram for explaining a configuration example of an imaging device according to a tenth modification of the present disclosure. FIG. 26 is a diagram for explaining a configuration example of an imaging device according to the tenth modification of the present disclosure. FIG. 27 is a diagram for explaining a configuration example of an imaging device according to the tenth modification of the present disclosure. FIG. 28 is a diagram for explaining another configuration example of an imaging device according to the tenth modification of the present disclosure. FIG. 29 is a diagram for explaining another configuration example of an imaging device according to the tenth modification of the present disclosure. FIG. 30 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to a second embodiment of the present disclosure. FIG. 31 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the second embodiment of the present disclosure. FIG. 32 is a diagram for explaining an example of an operation of an imaging device according to the second embodiment of the present disclosure. FIG. 33 is a diagram for explaining an example of an operation of an imaging device according to the second embodiment of the present disclosure. FIG. 34 is a diagram for explaining an example of a configuration of an imaging device according to an eleventh modification of the present disclosure. FIG. 35 is a diagram illustrating an example configuration of an imaging device according to Modification 11 of the present disclosure. FIG. 36 is a diagram illustrating an example configuration of an imaging device according to Modification 12 of the present disclosure. FIG. 37 is a diagram illustrating an example configuration of an imaging device according to Modification 12 of the present disclosure. FIG. 38 is a diagram illustrating an example configuration of an imaging device according to Modification 12 of the present disclosure. FIG. 39 is a diagram illustrating an example configuration of an imaging device according to Modification 12 of the present disclosure. FIG. 40 is a diagram illustrating another example configuration of an imaging device according to Modification 12 of the present disclosure. FIG. 41 is a diagram illustrating another example configuration of an imaging device according to Modification 12 of the present disclosure. FIG. 42 is a diagram illustrating an example planar configuration of a pixel of an imaging device according to a third embodiment of the present disclosure. FIG. 43 is a diagram illustrating an example configuration of an imaging device according to Modification 13 of the present disclosure. FIG. 44 is a diagram illustrating an example configuration of an imaging device according to Modification 14 of the present disclosure. FIG. 45 is a diagram illustrating an example configuration of an imaging device according to Modification 15 of the present disclosure. FIG. 46 is a diagram illustrating an example configuration of an imaging device according to Modification 15 of the present disclosure. Fig. 47 is a diagram illustrating a configuration example of an imaging device according to Modification 15 of the present disclosure. Fig. 48 is a diagram illustrating another configuration example of an imaging device according to Modification 15 of the present disclosure.FIG. 49 is a diagram for explaining another example configuration of an imaging device according to Modification 15 of the present disclosure. FIG. 50 is a diagram for explaining another example configuration of an imaging device according to Modification 15 of the present disclosure. FIG. 51 is a diagram for explaining another example configuration of an imaging device according to Modification 15 of the present disclosure. FIG. 52 is a diagram for explaining another example configuration of an imaging device according to Modification 15 of the present disclosure. FIG. 53 is a block diagram showing an example configuration of an electronic device having an imaging device. FIG. 54 is a block diagram showing an example of a schematic configuration of a vehicle control system. FIG. 55 is an explanatory diagram showing an example of installation positions of an outside-vehicle information detection unit and an imaging unit. FIG. 56 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. FIG. 57 is a block diagram showing an example of the functional configuration of a camera head and a CCU.

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order: 1. First embodiment 2. Second embodiment 3. Third embodiment 4. Application example 5. Application example

[0009] 1. First Embodiment Fig. 1 is a block diagram showing an example of a schematic configuration of an imaging device that is an example of a photodetection device according to a first embodiment of the present disclosure. The photodetection device is a device that can detect incident light. The imaging device 1 that is a photodetection device has a plurality of pixels P each having a photoelectric conversion unit (photoelectric conversion element) and is configured to photoelectrically convert incident light to generate a signal. The imaging device 1 can receive light that has passed through an optical system (not shown) that includes an optical lens and generate a signal.

[0010] The imaging device 1 is configured, for example, using a semiconductor substrate (e.g., a silicon substrate) on which a plurality of pixels P are provided. The photoelectric conversion unit of each pixel P of the imaging device 1 is, for example, a photodiode (PD) and is configured to be able to photoelectrically convert light. The imaging device 1 has, as an imaging area, a region (pixel unit 100) in which a plurality of pixels P are two-dimensionally arranged in a matrix. The pixel unit 100 of the imaging device 1 can also be referred to as a pixel array in which a plurality of pixels P are arranged. The photoelectric conversion unit of each pixel P can also be referred to as a photoelectric conversion region.

[0011] The imaging device 1 captures incident light (image light) from a subject to be measured via an optical system including an optical lens. The imaging device 1 captures an image of the subject formed by the optical lens. The imaging device 1 can generate pixel signals by photoelectrically converting the received light (e.g., visible light, infrared light, etc.). The imaging device 1, which is a photodetector, is a device that can receive incident light and generate a signal, and can also be called a light-receiving device.

[0012] The imaging device 1 (photodetector) may be configured as an image sensor, for example. The imaging device 1 may be, for example, a complementary metal oxide semiconductor (CMOS) image sensor. The imaging device 1 may have a structure (a stacked structure) formed by stacking multiple semiconductor layers. The imaging device 1 may be used in various electronic devices, such as digital still cameras, video cameras, and mobile phones.

[0013] 1 , the imaging device 1 includes a pixel unit 100, a pixel driving unit 105, a signal processing unit 112, a control unit 113, and a processing unit 114. The imaging device 1 is also provided with, for example, a plurality of control lines Lread and a plurality of signal lines VSL.

[0014] The control lines Lread are signal lines capable of transmitting signals for controlling the pixels P, and are connected to the pixel driving unit 105 and the pixels P of the pixel unit 100. In the example shown in FIG. 1 , in the pixel unit 100, a plurality of control lines Lread are wired for each pixel row made up of a plurality of pixels P arranged in the horizontal direction (row direction). The control lines Lread are configured to transmit control signals for reading out signals from the pixels P.

[0015] The plurality of control lines Lread for each pixel row of the imaging device 1 include, for example, wiring for transmitting signals that control transfer transistors, wiring for transmitting signals that control selection transistors, wiring for transmitting signals that control reset transistors, etc. The control lines Lread can also be said to be drive lines (pixel drive lines) that transmit signals that drive the pixels P.

[0016] The signal line VSL is a signal line capable of transmitting a signal from the pixel P, and is connected to the pixel P of the pixel unit 100 and the signal processing unit 112. In the pixel unit 100, for example, a signal line VSL is wired for each pixel column made up of a plurality of pixels P aligned in the vertical direction (column direction). The signal line VSL is a vertical signal line and is configured to transmit a signal output from the pixel P.

[0017] The pixel driving unit 105 is configured to be able to drive each pixel P of the pixel unit 100. The pixel driving unit 105 is a driving circuit and is configured by a plurality of circuits including, for example, a buffer, a shift register, an address decoder, etc. The pixel driving unit 105 generates a signal for driving the pixel P and outputs the signal to each pixel P of the pixel unit 100 via a control line Lread. The pixel driving unit 105 is controlled by the control unit 113 and controls the pixels P of the pixel unit 100.

[0018] The pixel driving unit 105 generates signals for controlling the pixels P, such as signals for controlling the transfer transistors, selection transistors, and reset transistors of the pixels P, and supplies these signals to each pixel P via a control line Lread. The pixel driving unit 105 can control the reading of pixel signals from each pixel P. The pixel driving unit 105 can also be referred to as a pixel control unit configured to be able to control each pixel P. The pixel driving unit 105 and the control unit 113 can also be referred to collectively as a pixel control unit.

[0019] The signal processing unit 112 is configured to be able to perform signal processing of input pixel signals. The signal processing unit 112 is a signal processing circuit and includes, for example, a load circuit, an AD (Analog-Digital) conversion circuit, a horizontal selection switch, etc. The load circuit is, for example, configured by a current source capable of supplying current to the amplification transistor of the pixel P. The load circuit, together with the amplification transistor of the pixel P, forms, for example, a source follower circuit.

[0020] The signal processing unit 112 may have an amplifier circuit configured to be able to amplify signals read out from the pixels P via the signal lines VSL. A load circuit, an amplifier circuit, an AD conversion circuit, etc. are provided for each of the multiple signal lines VSL, for example. A load circuit, an amplifier circuit, an AD conversion circuit, etc. may be provided for each pixel column of the pixel unit 100.

[0021] The signals output from each pixel P selected and scanned by the pixel driving unit 105 are input to the signal processing unit 112 via signal lines VSL. The signal processing unit 112 can perform signal processing such as AD conversion of the signals from the pixel P and CDS (Correlated Double Sampling). The signals from each pixel P transmitted through each of the signal lines VSL are subjected to signal processing by the signal processing unit 112 and output to the processing unit 114.

[0022] The processing unit 114 is configured to be able to perform signal processing on the input signal. The processing unit 114 is a processing circuit, and is configured, for example, by a circuit that performs various types of signal processing on pixel signals. The processing unit 114 may include a processor and a memory. The processing unit 114 performs signal processing on pixel signals input from the signal processing unit 112 and outputs the processed pixel signals. The processing unit 114 can perform various types of signal processing, for example, noise reduction processing, gradation correction processing, etc.

[0023] The control unit 113 is configured to be able to control each unit of the imaging device 1. The control unit 113 receives an externally provided clock, data instructing an operation mode, etc., and can also output data such as internal information of the imaging device 1. The control unit 113 is a control circuit, and has, for example, a timing generator configured to be able to generate various timing signals.

[0024] The control unit 113 controls the driving of the pixel driving unit 105, the signal processing unit 112, etc. based on various timing signals (pulse signals, clock signals, etc.) generated by the timing generator. The control unit 113 and the processing unit 114 may be configured integrally.

[0025] The pixel driving unit 105, the signal processing unit 112, the control unit 113, the processing unit 114, etc. may be provided on a single semiconductor substrate or may be provided separately on multiple semiconductor substrates. Some or all of the signal processing unit 112, the control unit 113, and the processing unit 114 may be configured integrally.

[0026] 2 is a diagram showing an example of the arrangement of pixels in the imaging device according to the first embodiment. Each pixel P of the imaging device 1 includes a photoelectric conversion unit 12, a lens 31, and a filter 32. As shown in FIG. 2, the incident direction of light from the subject is defined as the Z-axis direction, the left-right direction on the paper perpendicular to the Z-axis direction is defined as the X-axis direction, and the up-down direction on the paper perpendicular to the Z-axis and X-axis directions is defined as the Y-axis direction. In the following figures, directions may be indicated based on the directions of the arrows in FIG. 2.

[0027] A pixel P of the imaging device 1 may have a plurality of photoelectric conversion units 12 (in the example shown in FIG. 2 , a first photoelectric conversion unit 12 a, a second photoelectric conversion unit 12 b, a third photoelectric conversion unit 12 c, and a fourth photoelectric conversion unit 12 d). In each pixel P of the imaging device 1, for example, a plurality of photoelectric conversion units 12 are arranged adjacent to each other.

[0028] 2, for example, the second photoelectric conversion unit 12b is provided next to the first photoelectric conversion unit 12a. Furthermore, the fourth photoelectric conversion unit 12d is provided next to the third photoelectric conversion unit 12c. It can be said that a pixel having the first photoelectric conversion unit 12a, a pixel having the second photoelectric conversion unit 12b, a pixel having the third photoelectric conversion unit 12c, and a pixel having the fourth photoelectric conversion unit 12d are provided.

[0029] In the imaging device 1, for example, a lens 31 and a filter 32 are provided on the side where light from an optical system such as an imaging lens is incident. The lens 31 (lens unit) is a lens that collects light and is an optical member also known as an on-chip lens. The lens 31 is provided above the first to fourth photoelectric conversion units 12a to 12d, for example, for each pixel P or for each set of pixels P.

[0030] Light from a subject to be measured is incident on the lens 31 via an optical system such as an imaging lens. The lens 31 guides the incident light to the photoelectric conversion unit 12 of the pixel P. The first to fourth photoelectric conversion units 12a to 12d of the pixel P each perform photoelectric conversion on the light incident via the lens 31 and the filter 32.

[0031] The filter 32 is configured to selectively transmit light in a specific wavelength range from the incident light. The filter 32 is an RGB color filter, a filter that transmits infrared light, etc. The filter 32 is provided above the first to fourth photoelectric conversion units 12 a to 12 d, for example, for each pixel P or for each set of pixels P.

[0032] The plurality of pixels P provided in the pixel section 100 of the imaging device 1 include, for example, pixels (R pixels) provided with filters 32 that transmit red (R) light, pixels (G pixels) provided with filters 32 that transmit green (G) light, and pixels (B pixels) provided with filters 32 that transmit blue (B) light. In the pixel section 100, a plurality of R pixels, a plurality of G pixels, and a plurality of B pixels are repeatedly arranged.

[0033] The R, G, and B pixels are arranged according to a Bayer array, for example. The R, G, and B pixels can generate R, G, and B component pixel signals, respectively. The imaging device 1 can obtain RGB pixel signals. Note that the arrangement of the pixels P is not limited to the above example and can be set arbitrarily.

[0034] As an example, the R pixels, G pixels, and B pixels may each be arranged in 2×2 pixel units. In the pixel unit 100, for example, four adjacent R pixels, four adjacent G pixels, and four adjacent B pixels may be arranged repeatedly. It can also be said that the R pixels, G pixels, and B pixels are each periodically arranged in 2 rows and 2 columns.

[0035] The filter 32 provided in the pixel P of the pixel unit 100 is not limited to a primary color (RGB) color filter, but may be a complementary color filter such as Cy (cyan), Mg (magenta), or Ye (yellow). A filter corresponding to W (white), i.e., a filter that transmits light of the entire wavelength range of incident light, may also be provided. The filter 32 may also be a filter that transmits infrared light.

[0036] It should be noted that the filter 32 may be omitted as needed in the imaging device 1. The filter 32 may not be provided in some or all of the pixels P of the imaging device 1. For example, the filter 32 may not be provided in pixels that receive white (W) light and perform photoelectric conversion.

[0037] In the imaging device 1, for example, one lens 31 may be provided for four photoelectric conversion units 12 (first to fourth photoelectric conversion units 12a to 12d). In the imaging device 1, the first to fourth photoelectric conversion units 12a to 12d receive light that has passed through different regions of an optical system such as an imaging lens, and perform pupil division.

[0038] The imaging device 1 can generate, for example, a signal (first pixel signal) based on charges converted by the first photoelectric conversion unit 12a, a signal (second pixel signal) based on charges converted by the second photoelectric conversion unit 12b, a signal (third pixel signal) based on charges converted by the third photoelectric conversion unit 12c, and a signal (fourth pixel signal) based on charges converted by the fourth photoelectric conversion unit 12d.

[0039] Phase difference data (phase difference information) can be obtained by using the first to fourth pixel signals. The phase difference data makes it possible to perform phase difference AF (autofocus). The pixels P (R pixels, G pixels, B pixels, etc.) of the imaging device 1 are pixels that can be used for phase difference detection and can also be called phase difference pixels (or phase difference detection pixels).

[0040] 3 is a diagram illustrating an example of the circuit configuration of a pixel of the image pickup device according to the first embodiment. The pixel P of the image pickup device 1 includes a plurality of photoelectric conversion units 12 (first to fourth photoelectric conversion units 12a to 12d in FIG. 3), a plurality of transistors TR (transistors TR1 to TR4 in FIG. 3), a floating diffusion FD, and a readout circuit 20.

[0041] The photoelectric conversion unit 12 is configured to receive light and generate a signal. The photoelectric conversion unit 12 is a light receiving unit (light receiving element) and is configured to be able to generate electric charges through photoelectric conversion. In the example shown in Fig. 3, the first photoelectric conversion unit 12a, the second photoelectric conversion unit 12b, the third photoelectric conversion unit 12c, and the fourth photoelectric conversion unit 12d are each a photodiode (PD).

[0042] The first photoelectric conversion unit 12 a, the second photoelectric conversion unit 12 b, the third photoelectric conversion unit 12 c, and the fourth photoelectric conversion unit 12 d each convert incident light into an electric charge. Each of the first photoelectric conversion unit 12 a to the fourth photoelectric conversion unit 12 d performs photoelectric conversion to generate an electric charge according to the amount of received light.

[0043] The transistors TR (transistors TR1, TR2, TR3, and TR4 in FIG. 3) are transfer transistors, and are configured to be able to transfer charges photoelectrically converted by the photoelectric conversion unit 12 to the floating diffusion FD. The transistors TR electrically connect or disconnect the photoelectric conversion unit 12 and the floating diffusion FD. In the example shown in FIG. 3, the transistors TR1 to TR4 are controlled by different signals.

[0044] The transistor TR1 is controlled by a signal STR1 to electrically connect or disconnect the first photoelectric conversion unit 12a and the floating diffusion FD. The transistor TR1 can transfer the charge that is photoelectrically converted and accumulated in the first photoelectric conversion unit 12a to the floating diffusion FD.

[0045] The transistor TR2 is controlled by a signal STR2 to electrically connect or disconnect the second photoelectric conversion unit 12b and the floating diffusion FD. The transistor TR2 can transfer the charge that is photoelectrically converted and accumulated in the second photoelectric conversion unit 12b to the floating diffusion FD.

[0046] The transistor TR3 is controlled by a signal STR3 to electrically connect or disconnect the third photoelectric conversion unit 12c and the floating diffusion FD. The transistor TR3 can transfer the charge that is photoelectrically converted and accumulated in the third photoelectric conversion unit 12c to the floating diffusion FD.

[0047] The transistor TR4 is controlled by a signal STR4 to electrically connect or disconnect the fourth photoelectric conversion unit 12d and the floating diffusion FD. The transistor TR4 can transfer the charge that is photoelectrically converted and accumulated in the fourth photoelectric conversion unit 12d to the floating diffusion FD.

[0048] The floating diffusion FD is an accumulation unit configured to be able to accumulate transferred charges. The floating diffusion FD can accumulate charges photoelectrically converted by the photoelectric conversion unit 12. The floating diffusion FD can also be considered a holding unit capable of holding the transferred charges. The floating diffusion FD accumulates the transferred charges and converts them into a voltage according to the capacitance of the floating diffusion FD.

[0049] The readout circuit 20 is configured to be able to output signals based on the photoelectrically converted charges, including a first pixel signal based on the charges generated by the first photoelectric conversion unit 12 a, a second pixel signal based on the charges generated by the second photoelectric conversion unit 12 b, a third pixel signal based on the charges generated by the third photoelectric conversion unit 12 c, and a fourth pixel signal based on the charges generated by the fourth photoelectric conversion unit 12 d.

[0050] The readout circuit 20 is also configured to be capable of outputting a pixel signal corresponding to the sum of the charges photoelectrically converted by the first to fourth photoelectric conversion units 12 a to 12 d. The readout circuit 20 can read out a pixel signal based on the sum of the charges from two or more photoelectric conversion units 12, for example.

[0051] 3, the readout circuit 20 includes, for example, a transistor AMP, a transistor SEL, and a transistor RST. The transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffusion FD. The transistor AMP is an amplifying transistor and can generate and output a signal based on the charge converted by the photoelectric conversion unit 12.

[0052] 3, the gate of the transistor AMP is electrically connected to the floating diffusion FD, and the voltage converted by the floating diffusion FD is input to the gate of the transistor AMP. The drain of the transistor AMP is connected to, for example, a power supply line to which a power supply voltage (power supply voltage VDD in the example shown in FIG. 3) is supplied.

[0053] The source of the transistor AMP is connected to a signal line VSL via a transistor SEL. The transistor AMP is configured to generate a signal based on the charge accumulated in the floating diffusion FD, i.e., a signal based on the voltage of the floating diffusion FD, and output the signal to the signal line VSL.

[0054] The transistor SEL is configured to be able to control the output of a pixel signal. The transistor SEL is electrically connected in series to the transistor AMP, for example, as in the example shown in Figure 3. The transistor SEL is controlled by a signal SSEL and is configured to be able to output a signal from the transistor AMP to a signal line VSL. The transistor SEL is a selection transistor and can control the output timing of the pixel signal.

[0055] The transistor SEL is configured to be able to output a signal based on the charge converted by the photoelectric conversion unit 12. The transistor SEL can output pixel signals (first pixel signal to fourth pixel signal, etc.) of the pixel P to the signal line VSL. The transistor SEL may be electrically connected between the transistor AMP and a power supply line to which the power supply voltage VDD is applied. The transistor SEL may also be omitted as necessary.

[0056] The transistor RST is configured to be able to reset the voltage of the floating diffusion FD. In the example shown in Fig. 3, the transistor RST is electrically connected to a power supply line to which a power supply voltage VDD is applied, and is configured to reset the charge of the pixel P. The transistor RST is a reset transistor.

[0057] The transistor RST is controlled by a signal SRST and can reset the charge accumulated in the floating diffusion FD and reset the potential of the floating diffusion FD. The transistor RST electrically connects the power supply line and the floating diffusion FD and can discharge the charge accumulated in the floating diffusion FD. The transistor RST can also discharge the charge accumulated in the photoelectric conversion unit 12 via the transistor TR.

[0058] 4A is a diagram illustrating another example of the circuit configuration of a pixel of the imaging device according to the first embodiment. The readout circuit 20 may include a transistor FDG, as shown in the example of FIG. 4A . As an example, the transistor FDG is configured to be able to electrically connect the floating diffusion FD and the transistor RST. For example, the transistor FDG is controlled by a signal SFDG to electrically connect or disconnect the floating diffusion FD and the transistor RST.

[0059] When the transistor FDG is turned on, the capacitance added to the floating diffusion FD of the pixel P increases, and the conversion efficiency (gain) when converting electric charge to voltage is switched. The transistor FDG is a switching transistor used to set the conversion efficiency. The transistor FDG can change the conversion efficiency by switching the capacitance connected to the gate of the transistor AMP.

[0060] The transistor FDG may be electrically connected in series with the transistor RST or electrically connected in parallel with the transistor RST. As shown in the example of FIG. 4B , the transistor FDG may be configured to be able to electrically connect the floating diffusion FD and the capacitance element C1. For example, the transistor FDG is controlled by a signal SFDG to electrically connect or disconnect the floating diffusion FD and the capacitance element C1. By switching the connection state of the capacitance element C1, it is possible to change the conversion efficiency.

[0061] The above-mentioned transistor TR (transfer transistor), transistor AMP (amplification transistor), transistor SEL (selection transistor), transistor RST (reset transistor), and transistor FDG (switching transistor) are each, for example, a MOS transistor (MOSFET) having gate, source, and drain terminals.

[0062] 3 and the like, the transistors TR1 to TR4, the transistor AMP, the transistor SEL, the transistor RST, and the transistor FDG are each configured as an NMOS transistor. The transistor of the pixel P may be configured as a PMOS transistor. The transistor of the pixel P may be configured as a 3D transistor, for example, a FinFET.

[0063] 5A or 5B, the transistor RST and the transistor AMP may be electrically connected to different power supply lines. For example, the drain of the transistor AMP may be electrically connected to a power supply line that supplies a power supply voltage VDD1, and the drain of the transistor RST may be electrically connected to a power supply line that supplies a power supply voltage VDD2. The drain potential of the transistor RST and the drain potential of the transistor AMP can be controlled separately (independently).

[0064] The pixel driving unit 105 (see FIG. 1) of the imaging device 1 supplies control signals to the gates of the transistors TR1 to TR4, the transistor SEL, the transistor RST, the transistor FDG, etc. of each pixel P via the control line Lread described above, thereby turning the transistors on (conducting state) or off (non-conducting state).

[0065] The multiple control lines Lread for each pixel row of the imaging device 1 include, for example, a wiring for transmitting a signal STR1 that controls transistor TR1, a wiring for transmitting a signal STR2 that controls transistor TR2, a wiring for transmitting a signal STR3 that controls transistor TR3, and a wiring for transmitting a signal STR4 that controls transistor TR4.

[0066] The control lines Lread include, for example, a wiring for transmitting a signal SSEL that controls the transistor SEL, a wiring for transmitting a signal SRST that controls the transistor RST, and a wiring for transmitting a signal SFDG that controls the transistor FDG.

[0067] The transistors TR1 to TR4, transistor SEL, transistor RST, transistor FDG, etc. are controlled to be turned on and off by a pixel driving unit 105. The pixel driving unit 105 controls the readout circuit 20 of each pixel P to output a pixel signal from each pixel P to a signal line VSL. The pixel driving unit 105 can control the reading out of the pixel signal of each pixel P to the signal line VSL.

[0068] The imaging device 1 may have a configuration in which a plurality of pixels P share one readout circuit 20. For example, in the imaging device 1, the readout circuit 20 may be provided for a plurality of pixels P. A readout circuit 20 is arranged for each of a plurality of pixels P, and the plurality of pixels P share one readout circuit 20. As an example, a 2×2 pixel array consisting of four adjacent pixels P may share one readout circuit 20.

[0069] Fig. 6 is a diagram showing an example of a planar configuration of a pixel of the imaging device according to the first embodiment. Fig. 7 is a diagram showing an example of a cross-sectional configuration of a pixel of the imaging device according to the first embodiment. Fig. 7 shows an example of the configuration of a pixel in the direction of line A-A' shown in Fig. 6.

[0070] Each pixel P of the imaging device 1 has, for example, the structure shown in Figure 6 and Figure 7. The pixel P has a first photoelectric conversion unit 12a to a fourth photoelectric conversion unit 12d, transistors TR1 to TR4, a floating diffusion FD, a semiconductor region 35a, and a semiconductor region 35b.

[0071] The imaging device 1 is configured using a substrate 201 including a semiconductor layer 101. The substrate 201 is configured, for example, by a semiconductor substrate such as a Si (silicon) substrate. Note that the substrate 201 (base material) may also be configured using an SOI (silicon on insulator) substrate, a SiGe (silicon germanium) substrate, other compound semiconductor materials, or the like. In the examples shown in FIGS. 6 and 7 , the substrate 201 is configured to include the semiconductor layer 101 and a wiring layer 111.

[0072] As shown in FIG. 7 , the semiconductor layer 101 has opposing surfaces 11S1 and 11S2. The surface 11S2 is the surface opposite to the surface 11S1. The surface 11S1 of the semiconductor layer 101 is, for example, an element formation surface on which elements such as transistors are formed. A gate electrode, a gate insulating film (e.g., a gate oxide film), etc. are provided on the surface 11S1 of the semiconductor layer 101. The surface 11S2 of the semiconductor layer 101 is, for example, a light-receiving surface (light incident surface).

[0073] In the semiconductor layer 101, a plurality of photoelectric conversion units 12 (photoelectric conversion elements) are provided along a surface 11S1 and a surface 11S2 of the semiconductor layer 101. The photoelectric conversion units 12 can also be referred to as a photoelectric conversion layer. For example, a plurality of first to fourth photoelectric conversion units 12a to 12d are embedded in the semiconductor layer 101. The first to fourth photoelectric conversion units 12a to 12d are provided between the surface 11S1 and the surface 11S2 of the semiconductor layer 101.

[0074] As shown in Fig. 7, the semiconductor layer 101 has a well 25. The well 25 is, for example, a p-type semiconductor region, or a p-type well (p-well). In the example shown in Figs. 6 and 7, the well 25, which is a p-type well region, is provided in the semiconductor layer 101. The first to fourth photoelectric conversion units 12a to 12d are each configured to include a semiconductor region, for example, an n-type semiconductor region provided in the well 25.

[0075] In the example shown in FIG. 6 etc., the first photoelectric conversion unit 12a and the second photoelectric conversion unit 12b are arranged side by side in the X-axis direction in the semiconductor layer 101. The first photoelectric conversion unit 12a and the third photoelectric conversion unit 12c are arranged side by side in the Y-axis direction in the semiconductor layer 101. The third photoelectric conversion unit 12c and the fourth photoelectric conversion unit 12d are arranged side by side in the X-axis direction in the semiconductor layer 101. The second photoelectric conversion unit 12b and the fourth photoelectric conversion unit 12d are arranged side by side in the Y-axis direction in the semiconductor layer 101.

[0076] Transistors TR1 to TR4, a floating diffusion FD, a pixel transistor 30, a semiconductor region 35a, a semiconductor region 35b, etc. are provided on the surface 11S1 side of the semiconductor layer 101. The floating diffusion FD is configured to include, for example, an n-type semiconductor region. The pixel transistor 30 is, for example, a transistor of the readout circuit 20 described above.

[0077] The pixel transistor 30 is used as a transistor AMP, a transistor SEL, a transistor FDG, a transistor RST, or the like. The pixel transistor 30 of some of the pixels P may be a dummy transistor. The readout circuit 20 may include a dummy transistor as the pixel transistor 30. The shape of the pixel transistor 30 is not limited to the example shown in FIG. 6 and can be changed as appropriate.

[0078] Transistors TR1 to TR4 each have a gate VG and a gate insulating film. Transistors TR1 to TR4 have, for example, a vertical gate structure. The gate VG of each of transistors TR1 to TR4 is a gate electrode and is made of, for example, polysilicon (Poly-Si). At least a portion of each of the gate VG and the gate insulating film is provided within the semiconductor layer 101.

[0079] At least a portion of each of the gate VG and the gate insulating film is provided by, for example, digging into the semiconductor layer 101. The transistors TR1 to TR4 can also be called vertical transistors. A portion of each of the gate VG and the gate insulating film can be disposed so as to be embedded in the semiconductor layer 101. The gate VG and the gate insulating film can also be called the gate together.

[0080] For example, the gate VG and gate insulating film of the transistor TR1 are formed to reach the first photoelectric conversion unit 12a in the semiconductor layer 101. The gate VG of the transistor TR1 extends, for example, from the surface 11S1 of the semiconductor layer 101 toward the inside of the semiconductor layer 101 and is provided up to the region of the first photoelectric conversion unit 12a.

[0081] For example, the gate VG and gate insulating film of the transistor TR2 are formed to reach the second photoelectric conversion unit 12b in the semiconductor layer 101. The gate VG of the transistor TR2 extends, for example, from the surface 11S1 of the semiconductor layer 101 toward the inside of the semiconductor layer 101 and is provided up to the region of the second photoelectric conversion unit 12b.

[0082] For example, the gate VG and gate insulating film of the transistor TR3 are formed to reach the third photoelectric conversion unit 12c in the semiconductor layer 101. The gate VG of the transistor TR3 extends, for example, from the surface 11S1 of the semiconductor layer 101 toward the inside of the semiconductor layer 101 and is provided up to the region of the third photoelectric conversion unit 12c.

[0083] Furthermore, for example, the gate VG and gate insulating film of the transistor TR4 are formed to reach the fourth photoelectric conversion unit 12d in the semiconductor layer 101. The gate VG of the transistor TR4 extends, for example, from the surface 11S1 of the semiconductor layer 101 toward the inside of the semiconductor layer 101 and is provided up to the region of the fourth photoelectric conversion unit 12d.

[0084] The gate VG of each of the transistors TR1 to TR4 is made of, for example, polysilicon. The gate VG may also be made of a metal material or a metal compound. The gate VG may also be made of, for example, tungsten (W), titanium nitride (TiN), tantalum nitride (TaN), or the like. Sidewalls may be provided on the sides of the gate electrode.

[0085] The gate insulating film is composed of, for example, a single layer film made of one of silicon oxide (SiO), silicon oxynitride (SiON), hafnium oxide (HfO), etc., or a laminated film made of two or more of these. The gate insulating film may be formed using a high-dielectric-constant material having a higher dielectric constant than that of silicon oxide, such as a hafnium-based insulating film.

[0086] Each of the transistors TR1 to TR4 may have a planar gate structure, and may be configured as, for example, a planar transistor.

[0087] The imaging device 1 has a pixel isolation region 91, which is an isolation region (isolation portion) provided around the pixel P. The pixel isolation region 91 is configured using, for example, a trench (groove portion). In the example shown in FIG. 7 , the pixel isolation region 91 is provided so as to penetrate the semiconductor layer 101.

[0088] The pixel isolation regions 91 are each provided between adjacent pixels P in the semiconductor layer 101, and separate the pixels P (or the photoelectric conversion units 12). At least a portion of the pixel isolation region 91 is provided on the boundary between adjacent pixels P. It can also be said that the pixels P have a structure partitioned by the pixel isolation regions 91.

[0089] The pixel isolation region 91 has, for example, a full trench isolation (FTI) structure and is formed so as to penetrate the semiconductor layer 101. In the example shown in Figures 6 and 7, the pixel isolation region 91 is provided so as to surround the first to fourth photoelectric conversion units 12a to 12d, the transistors TR1 to TR4, the floating diffusion FD, the semiconductor regions 35a and 35b, etc.

[0090] The pixel isolation region 91 is formed, for example, in a lattice shape in plan view so as to surround the first to fourth photoelectric conversion units 12 a to 12 d of each pixel P (see FIGS. 2 and 6, etc.). The pixel isolation region 91 can also be called an inter-pixel isolation portion or an inter-pixel isolation wall.

[0091] For example, an insulating film (insulator) such as an oxide film (e.g., a silicon oxide film) or a nitride film (e.g., a silicon nitride film) is provided in the trench of the pixel isolation region 91. Polysilicon, a metal material, other insulating materials, etc. may be embedded in the pixel isolation region 91. The pixel isolation region 91 may also have a void (cavity).

[0092] A predetermined potential (voltage) may be applied to the pixel isolation region 91. The pixel isolation region 91 is formed, for example, by a trench filled with a conductive material, and a negative bias voltage is applied to the pixel isolation region 91 via the wiring and vias of the wiring layer, etc. This makes it possible to suppress the generation of dark current.

[0093] A plurality of isolation regions 92 (isolation regions 92a, 92b, 92c, and 92d in the example shown in FIG. 6 and other figures) are provided in each pixel P of the imaging device 1. The isolation regions 92 are provided between a plurality of adjacent photoelectric conversion units 12, for example, as in the example shown in FIG. 6 .

[0094] The separation region 92a is provided between the adjacent first and second photoelectric conversion units 12a and 12b in the semiconductor layer 101. The separation region 92b is provided between the adjacent third and fourth photoelectric conversion units 12c and 12d in the semiconductor layer 101. The separation region 92b is provided so as to be aligned with the separation region 92a in the Y-axis direction, for example, as in the example shown in FIG.

[0095] The isolation region 92c is provided between the adjacent first and third photoelectric conversion units 12a and 12c in the semiconductor layer 101. The isolation region 92d is provided between the adjacent second and fourth photoelectric conversion units 12b and 12d in the semiconductor layer 101. The isolation region 92d is provided so as to be aligned with the isolation region 92c in the X-axis direction, for example, as in the example shown in FIG.

[0096] The isolation regions 92a, 92b, 92c, and 92d are configured using, for example, trenches (groove portions) and have an STI (Shallow Trench Isolation) structure. As an example, the isolation regions 92a to 92d are provided from the surface 11S1 side of the semiconductor layer 101 to between the surfaces 11S1 and 11S2 of the semiconductor layer 101. Note that the isolation regions 92a to 92d may be provided so as to penetrate the semiconductor layer 101.

[0097] The isolation regions 92a and 92b have a shape extending in the Y-axis direction in a plan view, for example. The isolation regions 92c and 92d have a shape extending in the X-axis direction in a plan view, for example. The isolation regions 92a to 92d and the pixel isolation region 91 can be formed continuously and integrally, as in the example shown in Figure 6. The isolation regions 92a to 92d can also be said to be structural parts that protrude from the pixel isolation region 91 toward the center of the pixel P.

[0098] An insulating film such as an oxide film (e.g., a silicon oxide film) or a nitride film (e.g., a silicon nitride film) is provided in each trench of the isolation regions 92a to 92d. The isolation regions 92a to 92d may be filled with polysilicon, a metal material, or other insulating materials. The isolation regions 92a to 92d may have voids (cavities).

[0099] Separation regions 92c and 92d may be configured to have different sizes (lengths, areas, etc.) from separation regions 92a and 92b. The imaging device 1 is configured, for example, so that the lengths of separation regions 92c and 92d extending in the horizontal direction (X-axis direction) are different from the lengths of separation regions 92a and 92b extending in the vertical direction (Y-axis direction).

[0100] 6, the length of separation region 92c in the X-axis direction is smaller than the length of separation region 92a (or separation region 92b) in the Y-axis direction. Also, the length of separation region 92d in the X-axis direction may be smaller than the length of separation region 92a (or separation region 92b) in the Y-axis direction.

[0101] The imaging device 1 is also provided with an isolation region 93. The isolation region 93 is formed, for example, using a trench and has an STI structure. An insulating film, such as a silicon oxide film or a silicon nitride film, is provided within the trench of the isolation region 93. The isolation region 93 is provided on the surface 11S1 side of the semiconductor layer 101 and separates elements from each other.

[0102] The isolation region 93 is formed between the pixel transistor 30 and the floating diffusion FD, between the pixel transistor 30 and the transistor TR, between the transistor TR and the semiconductor regions 35 a, 35 b, etc. Note that the isolation region 93 may be configured by a semiconductor region (a p-type semiconductor region or an n-type semiconductor region) formed by ion implantation.

[0103] The semiconductor region 35a and the semiconductor region 35b are each a semiconductor region of the same conductivity type as the well 25, and are provided on the surface 11S1 side of the semiconductor layer 101. The semiconductor regions 35a and 35b are provided relative to the well 25 and are electrically connected to the well 25. Each of the semiconductor regions 35a and 35b is, for example, a p-type semiconductor region provided in the semiconductor layer 101, and is a region formed using p-type impurities.

[0104] 6, the semiconductor region 35a is provided between the floating diffusion FD and the isolation region 92c. The semiconductor region 35b is provided between the floating diffusion FD and the isolation region 92d. The semiconductor region 35a and the semiconductor region 35b can be arranged to sandwich a part of the floating diffusion FD therebetween.

[0105] The semiconductor regions 35a and 35b each have an impurity concentration higher than that of the well 25, and are p+ type semiconductor regions. The p+ semiconductor regions 35a and 35b are p+ type diffusion regions and can also be considered p+ type conductive regions. The semiconductor region 35a is electrically connected to the contact 50a.

[0106] The semiconductor region 35b is electrically connected to the contact 50b. The contacts 50a and 50b are provided in the wiring layer 111 of the substrate 201. For example, the contact 50a is provided on the wiring layer 111 on the semiconductor region 35a, and the contact 50b is provided on the wiring layer 111 on the semiconductor region 35b.

[0107] The contacts 50a and 50b are each made of a conductive material such as tungsten (W). The contacts 50a and 50b are formed, for example, by embedding (filling) a conductive material into a contact hole. The contacts 50a and 50b may be made of a metal material such as aluminum (Al) or copper (Cu), or may be made of other materials.

[0108] A predetermined potential (voltage) is supplied to the region of the well 25 electrically connected to the semiconductor regions 35a and 35b via the wiring of the wiring layer 111 and the contacts 50a and 50b. The contacts 50a and 50b are well contacts, and the semiconductor regions 35a and 35b can be said to be well contact regions. The semiconductor region 35a (or semiconductor region 35b) and the contact 50a (or contact 50b) can also be collectively called a well contact region.

[0109] The contacts 50a, 50b and the semiconductor regions 35a, 35b are arranged, for example, for each pixel P. In the example shown in Fig. 6 etc., the semiconductor region 35a and the contact 50a are provided corresponding to the regions of the first photoelectric conversion unit 12a and the third photoelectric conversion unit 12c. The semiconductor region 35b and the contact 50b are provided corresponding to the regions of the second photoelectric conversion unit 12b and the fourth photoelectric conversion unit 12d.

[0110] The semiconductor regions 35a and 35b are electrically connected to a reference potential line in the wiring layer 111 via, for example, contacts 50a and 50b, and a reference potential is applied to the semiconductor regions 35a and 35b and the well 25. As an example, a GND potential (ground potential) is applied to the semiconductor regions 35a and 35b and the well 25 via the contacts 50a and 50b.

[0111] The imaging device 1 may have an overflow path 70, as shown in FIG. 6 and other figures. The overflow path 70 is provided, for example, between adjacent photoelectric conversion units 12. The overflow path 70 is a region formed using impurities, for example, a p-type (or n-type) semiconductor region. As in the example shown in FIG. 6 and other figures, the overflow path 70 is formed between a plurality of isolation regions 92 so as to be adjacent to a plurality of photoelectric conversion units 12.

[0112] The overflow path 70 can be formed between the first to fourth photoelectric conversion units 12a to 12d in the semiconductor layer 101. The overflow path 70 is provided, for example, below the floating diffusion FD of the semiconductor layer 101 so as to be in contact with the first to fourth photoelectric conversion units 12a to 12d. The isolation regions 92a to 92d are arranged in the semiconductor layer 101 so as to sandwich the overflow path 70 therebetween.

[0113] In the imaging device 1, the overflow path 70 is provided, so that overflowing charges can be transferred (moved) between the first to fourth photoelectric conversion units 12a to 12d. For example, even if charges exceed the amount of charge (saturation charge amount) that can be stored in one photoelectric conversion unit 12, the overflowing charges can be stored in another photoelectric conversion unit 12. Signals corresponding to the charges photoelectrically converted by the multiple photoelectric conversion units 12 can be obtained.

[0114] In the imaging device 1 according to the present embodiment, the separation region 92c and the separation region 92a (or the separation region 92b) are configured to have different sizes. Also, the separation region 92d and the separation region 92a (or the separation region 92b) are configured to have different sizes. For example, among the separation regions 92a to 92d, the lengths of the separation regions 92c and 92d are relatively small.

[0115] 6, in the imaging device 1, the length of the separation region 92c extending in the X-axis direction is shorter than the length of the separation region 92a (or separation region 92b) extending in the Y-axis direction. Also, the length of the separation region 92d extending in the X-axis direction is shorter than the length of the separation region 92a (or separation region 92b) extending in the Y-axis direction.

[0116] By configuring the imaging device 1 in this manner, it is possible to increase the area of ​​the region in which the contact region, transistor, etc. are arranged in the pixel P. In the example shown in Fig. 6, the semiconductor region 35a is provided between the isolation region 92c and the floating diffusion FD. Furthermore, the semiconductor region 35b is provided between the isolation region 92d and the floating diffusion FD.

[0117] In the imaging device 1, by disposing contact regions (semiconductor regions 35a, 35b) between the floating diffusion FD and the isolation region 92 (e.g., isolation regions 92c, 92d) that protrudes relatively short, it is possible to increase the size of the transistors to be disposed in the pixel P. It is also possible to prevent a decrease in the number of transistors that can be disposed in the pixel P. For example, as in the example shown in FIG. 6 , it is possible to increase the area of ​​the pixel transistor 30.

[0118] The size of the transistors in the readout circuit 20, such as the transistor AMP, can be increased, making it possible to suppress noise from being mixed into pixel signals. Increasing the gate area of ​​the transistor AMP or the transistor SEL can improve the settling characteristics of the signal line VSL, through which pixel signals are output. The imaging device 1 can achieve a suitable layout and have a structure that is advantageous for miniaturization.

[0119] As described above, in the imaging device 1, the lengths of the isolation regions 92c and 92d are made relatively small among the isolation regions 92a to 92d located around the overflow path 70. This makes it easier for charges to move via the overflow path 70 between vertically adjacent photoelectric conversion units 12 than between horizontally adjacent photoelectric conversion units 12.

[0120] For example, the charge from the first photoelectric conversion unit 12 a can be moved (overflowed) toward the third photoelectric conversion unit 12 c, which is adjacent to the first photoelectric conversion unit 12 a in the vertical direction, rather than toward the second photoelectric conversion unit 12 b, which is adjacent to the first photoelectric conversion unit 12 a in the horizontal direction. Also, the charge that has overflowed from the second photoelectric conversion unit 12 b can be moved toward the fourth photoelectric conversion unit 12 d rather than toward the first photoelectric conversion unit 12 a.

[0121] In the imaging device 1, the signal charge amounts in the first photoelectric conversion unit 12 a and the third photoelectric conversion unit 12 c and the signal charge amounts in the second photoelectric conversion unit 12 b and the fourth photoelectric conversion unit 12 d can be secured. Pixel signals corresponding to the amount of incident light can be obtained, thereby expanding the dynamic range. For example, it is possible to perform accurate phase difference detection using the first pixel signal (or the third pixel signal) and the second pixel signal (or the fourth pixel signal).

[0122] Furthermore, for example, a signal corresponding to the sum of the charges photoelectrically converted by the first photoelectric conversion unit 12 a and the charges photoelectrically converted by the third photoelectric conversion unit 12 c, and a signal corresponding to the sum of the charges photoelectrically converted by the second photoelectric conversion unit 12 b and the charges photoelectrically converted by the fourth photoelectric conversion unit 12 d can be acquired to perform phase difference detection. In this embodiment, it is possible to suppress a decrease in the accuracy of phase difference detection and suppress a decrease in AF performance.

[0123] 8 is a diagram illustrating an example layout of the imaging device according to the first embodiment. The transistors TR1 to TR4 (transfer transistors) are, for example, electrically connected to different wirings in the wiring layer 111 and are controlled to be turned on and off by different signals.

[0124] 8, the wiring for transmitting signal STR1 is electrically connected to the gate VG of transistor TR1, the wiring for transmitting signal STR2 is electrically connected to the gate VG of transistor TR2, the wiring for transmitting signal STR3 is electrically connected to the gate VG of transistor TR3, and the wiring for transmitting signal STR4 is electrically connected to the gate VG of transistor TR4.

[0125] 9 is a diagram showing an example of the arrangement of pixel transistors in the image pickup device according to the first embodiment. In FIG. 9, four pixels P are designated as pixels Pa to Pd, and a 2×2 pixel arrangement is shown. The other pixels P in the image pickup device 1 may also have a configuration similar to that shown in FIG.

[0126] Each transistor of the readout circuit 20, such as the transistor AMP, the transistor SEL, the transistor FDG, and the transistor RST, is provided separately as pixel transistors 30 in, for example, pixels Pa to Pd, and is shared by a plurality of pixels P. In the example shown in FIG. 9 , two pixels, pixel Pa and pixel Pc, and two pixels, pixel Pb and pixel Pd, each share the readout circuit 20.

[0127] In the imaging device 1, for example, a wiring L1 is provided as in the example shown in Fig. 9. The floating diffusion FD of each of the multiple pixels P that share the readout circuit 20 is electrically connected to the transistor of the readout circuit 20 via the wiring L1. In the example shown in Fig. 9, the floating diffusion FD is electrically connected to the gate electrode of the transistor AMP and the like via the wiring L1.

[0128] [Actions and Effects] The photodetector according to this embodiment includes a semiconductor layer (semiconductor layer 101), a plurality of pixels (pixels P) including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region (pixel isolation region 91) provided around the pixel in the semiconductor layer. The first pixel includes a first isolation region (isolation region 92a) provided between the first photoelectric conversion element and the second photoelectric conversion element (e.g., the first photoelectric conversion unit 12a and the second photoelectric conversion unit 12b) adjacent to each other in a first direction (e.g., the X-axis direction), a second isolation region (isolation region 92b) provided between the third photoelectric conversion element and the fourth photoelectric conversion element (e.g., the third photoelectric conversion unit 12c and the fourth photoelectric conversion unit 12d) adjacent to each other in the first direction, and a second isolation region (isolation region 92b) provided between the first photoelectric conversion element and the second photoelectric conversion element (e.g., the third photoelectric conversion unit 12c and the fourth photoelectric conversion unit 12d) adjacent to each other in a second direction (e.g., the Y-axis direction) intersecting the first direction. The semiconductor device has a third isolation region (isolation region 92c) provided between the conversion element and the third photoelectric conversion element, a fourth isolation region (isolation region 92d) provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent in the second direction, a floating diffusion (floating diffusion FD) provided between the third isolation region and the fourth isolation region, and a first region (semiconductor region 35a) of the first conductivity type provided between the third isolation region and the floating diffusion.

[0129] In the photodetector (image capture device 1) according to this embodiment, the semiconductor region 35a serving as a contact region is provided between the isolation region 92c and the floating diffusion FD. Therefore, the image capture device 1 can have a structure advantageous for miniaturizing pixels. For example, the size of the pixel transistor can be increased, thereby improving the characteristics of the pixel transistor. A photodetector with excellent performance can be realized.

[0130] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0131] (1-1. Modification 1) Figure 10 is intended to illustrate an exemplary configuration of an imaging device according to Modification 1 of the present disclosure. The length of a separation region extending in the vertical direction (e.g., separation regions 92a and 92b) may be approximately equal to the length of a separation region extending in the horizontal direction (e.g., separation regions 92c and 92d). The imaging device 1 may be configured, for example, so that the length of each of separation regions 92a and 92b is approximately equal to the length of each of separation regions 92c and 92d.

[0132] The length of the separation region 92a (or separation region 92b) in the Y-axis direction may be approximately equal to the length of the separation region 92c (or separation region 92d) in the X-axis direction, as in the example shown in Fig. 10. By configuring the imaging device 1 in this manner, it is expected that the saturation charge amount (Qs) per photoelectric conversion unit 12 can be increased.

[0133] 11 is a diagram illustrating an example of the configuration of an imaging device according to Modification 2. Of the isolation regions 92a to 92d, the lengths of the isolation regions 92a and 92b may be smaller than the lengths of the isolation regions 92c and 92d. This makes it easier for charges to move via the overflow path 70 between horizontally adjacent photoelectric conversion units 12 than between vertically adjacent photoelectric conversion units 12.

[0134] 11 , the length of the separation region 92a extending in the Y-axis direction may be shorter than the length of the separation region 92c (or separation region 92d) extending in the X-axis direction, and the length of the separation region 92b extending in the Y-axis direction may be shorter than the length of the separation region 92c (or separation region 92d) extending in the X-axis direction.

[0135] In the imaging device 1, the charge from the first photoelectric conversion unit 12a can be moved more toward the second photoelectric conversion unit 12b than the third photoelectric conversion unit 12c, and the charge from the third photoelectric conversion unit 12c can be moved more toward the fourth photoelectric conversion unit 12d than the first photoelectric conversion unit 12a.

[0136] The signal charge amounts in the first photoelectric conversion unit 12 a and the second photoelectric conversion unit 12 b and the signal charge amounts in the third photoelectric conversion unit 12 c and the fourth photoelectric conversion unit 12 d can be secured. Pixel signals corresponding to the amount of incident light can be obtained, thereby expanding the dynamic range. For example, phase difference detection can be performed with high accuracy using the first pixel signal (or the second pixel signal) and the third pixel signal (or the fourth pixel signal).

[0137] (1-3. Modification 3) FIG. 12 is a diagram illustrating an example of the configuration of an imaging device according to Modification 3. In the imaging device 1, multiple gates VG (transfer gates) may be provided for each photoelectric conversion unit 12. For example, as shown in the example of FIG. 12, two gates VG may be arranged for one photoelectric conversion unit 12. The transistors TR1, TR2, TR3, and TR4 can also be said to have a twin gate structure. It can also be said that two transfer transistors, each having a gate VG, are provided for one photoelectric conversion unit 12. This modification makes it possible to improve the charge transfer characteristics.

[0138] 13 and 14 are diagrams illustrating a configuration example of an imaging device according to Modification 4. The imaging device 1 may have isolation regions 94. As in the example shown in FIGS. 13 and 14, the isolation regions 94 are provided around the semiconductor regions 35a and 35b on the surface 11S1 side of the semiconductor layer 101. The isolation regions 94 may be formed of semiconductor regions formed by ion implantation, for example.

[0139] 15 is a diagram illustrating another example of the configuration of an image pickup device according to Modification 4. As shown in the example of Fig. 15, the isolation region 94 may be provided in the semiconductor layer 101 so as to be aligned with the semiconductor regions 35a and 35b and the floating diffusion FD. In the image pickup device 1, the provision of the isolation region 94 makes it possible to reduce dark current.

[0140] (1-5. Modification 5) Fig. 16 is an explanatory diagram illustrating a configuration example of an imaging device according to Modification 5. The shape and arrangement of the pixel transistor 30 of the pixel P can be modified as appropriate. For example, as shown in Fig. 16, the gate of the pixel transistor 30 may have a ring shape (e.g., a quarter-ring shape, a half-ring shape, etc.).

[0141] The gate width of the pixel transistor 30 (for example, the transistor AMP, the transistor SEL, etc.) can be increased, and the gm (mutual conductance) of the pixel transistor 30 can be improved. The settling characteristics (such as the settling time of the pixel signal) can be improved.

[0142] FIG. 17 is an explanatory diagram illustrating another example of the configuration of an imaging device according to Modification 5. A plurality of pixel transistors 30 (pixel transistor 30a and pixel transistor 30b in the example shown in FIG. 17) may be provided for each photoelectric conversion unit 12. For example, when transistors AMP and SEL are arranged as pixel transistors 30a and 30b, the source electrodes (or drain electrodes) of the transistors AMP and SEL may be integrally formed. This allows for a reduction in the amount of wiring connecting the transistors AMP and SEL, thereby improving the gm of the transistors.

[0143] (1-6. Modification 6) FIG. 18 is a diagram illustrating an example of the configuration of an imaging device according to Modification 6. As in the example shown in FIG. 18, each transistor of the readout circuit 20, such as the transistor AMP, the transistor SEL, and the transistor RST, and the wiring L1 may be provided for each pixel P. The wiring L1 is connected to the floating diffusion FD and can be considered as FD wiring. In the example shown in FIG. 18, the wiring L1, which serves as the FD wiring, can be shortened, thereby improving the conversion efficiency when converting electric charge into voltage.

[0144] 19 is a diagram illustrating another example of the configuration of an imaging device according to Modification 6. The imaging device 1 may have a configuration in which 2×2 pixels (pixels Pa to Pd in ​​FIG. 19) share the readout circuit 20. The imaging device 1 can generate a pixel signal corresponding to the sum of charges photoelectrically converted by each of the multiple pixels P. This can improve the S / N ratio and obtain a pixel signal with less noise.

[0145] (1-7. Modification 7) Fig. 20 is a diagram illustrating an example of the configuration of an imaging device according to Modification 7. As shown in the example of Fig. 20, transistors TR1 and TR2 may be electrically connected to a common wiring and controlled by the same control signal. Also, transistors TR3 and TR4 may be electrically connected to a common wiring and controlled by the same control signal.

[0146] 20, the wiring that transmits the signal STRa is electrically connected to the gates VG of the transistors TR1 and TR2, and the wiring that transmits the signal STRb is electrically connected to the gates VG of the transistors TR3 and TR4. In the imaging device 1, capacitance is added to the periphery (sidewall) of the transistor TR and the isolation region 92a (or isolation region 92b), making it possible to increase the amount of saturated charge.

[0147] (1-8. Modification 8) FIGS. 21 and 22 are provided to explain a configuration example of an imaging device according to Modification 8. The semiconductor region 35 that serves as a contact region may be disposed between adjacent pixels P, as in the example shown in FIG. 21 or 22. At least a portion of the semiconductor region 35 may be provided at the boundary between adjacent pixels P. The semiconductor region 35 may be shared by multiple pixels P. As an example, one semiconductor region 35 and contact 50 may be provided for four photoelectric conversion units 12.

[0148] 22 , for example, an isolation region 95 is provided around the semiconductor region 35. The isolation region 95 can be formed between the semiconductor region 35 and the pixel isolation region 91. As an example, the isolation region 95 is configured using a trench and has an STI structure. An insulating film such as a silicon oxide film is provided in the trench of the isolation region 95. Note that the isolation region 95 may be configured by a semiconductor region formed by ion implantation.

[0149] The photodetector according to this modification includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region. The first pixel includes the first isolation region, a second isolation region, a third isolation region, a fourth isolation region, a floating diffusion provided between the third isolation region and the fourth isolation region, and a first region of a first conductivity type provided between adjacent pixels.

[0150] In the imaging device 1 according to this modification, the semiconductor region 35 is provided between adjacent pixels P. This allows the semiconductor region 35 as a well contact region to be shared by multiple pixels P, making it possible to increase the area of ​​the region in which transistors and the like are arranged in each pixel P. For example, the size of the pixel transistor 30 can be increased. Furthermore, the charge transfer path in each pixel P can be expanded, making it possible to improve the charge transfer efficiency.

[0151] (1-9. Modification 9) FIGS. 23 and 24 are diagrams illustrating an example of the configuration of an imaging device according to Modification 9. In the imaging device 1, semiconductor regions 35 may be provided as contact regions between the isolation regions 92a to 92d. For example, one semiconductor region 35 may be disposed for four photoelectric conversion units 12. In this case, it is possible to increase the area of ​​the region in which the pixel transistors 30 are disposed. The size of the pixel transistors can be increased, thereby improving the characteristics of the pixel transistors.

[0152] In the imaging device 1, the floating diffusion FD or the transistor TR may be provided adjacent to the isolation region 92c (or isolation region 92d) having a relatively short length. In the example shown in Fig. 23, the floating diffusion FD is provided between the isolation region 92c and the semiconductor region 35, and between the isolation region 92d and the semiconductor region 35.

[0153] For example, of the two floating diffusions FD, the left floating diffusion FD is provided corresponding to the first photoelectric conversion unit 12 a and the third photoelectric conversion unit 12 c, and the right floating diffusion FD is provided corresponding to the second photoelectric conversion unit 12 b and the fourth photoelectric conversion unit 12 d.

[0154] 24, a transistor TR may be provided between the isolation region 92c (or the isolation region 92d) and the semiconductor region 35. In the example shown in FIG. 24, a portion of the gate VG of each of the transistors TR1 and TR3 is arranged between the isolation region 92c and the semiconductor region 35. In addition, a portion of the gate VG of each of the transistors TR2 and TR4 is arranged between the isolation region 92d and the semiconductor region 35.

[0155] The imaging device 1 according to this modification can also achieve a suitable layout and have a structure that is advantageous for miniaturization. By configuring the imaging device 1 as described above, it is possible to expand the charge transfer path in the pixel P, thereby improving the charge transfer efficiency.

[0156] (1-10. Modification 10) FIGS. 25 to 27 are diagrams illustrating an example configuration of an imaging device according to Modification 10. The transistor TR (transfer transistor) may be provided adjacent to the isolation region 92c (or the isolation region 92d). In the example shown in FIGS. 25 and 26, the transistor TRa is provided adjacent to the isolation region 92c. The transistor TRa is located between the isolation region 92c and the floating diffusion FD.

[0157] The transistor TRa is a transfer transistor having a gate VGa, and is provided for the first photoelectric conversion unit 12 a and the third photoelectric conversion unit 12 c. The transistor TRa is configured to be able to transfer charges photoelectrically converted by the first photoelectric conversion unit 12 a and the third photoelectric conversion unit 12 c to the floating diffusion FD.

[0158] The transistor TRb is provided adjacent to the isolation region 92d. The transistor TRb is located between the isolation region 92d and the floating diffusion FD. The transistor TRb is a transfer transistor having a gate VGb, and is provided for the second photoelectric conversion unit 12b and the fourth photoelectric conversion unit 12d. The transistor TRb is configured to be able to transfer charges photoelectrically converted in the second photoelectric conversion unit 12b and the fourth photoelectric conversion unit 12d to the floating diffusion FD.

[0159] 26, a portion of the gate VGa of the transistor TRa is provided so as to contact the isolation region 92c. Furthermore, a portion of the gate VGb of the transistor TRb is provided so as to contact the isolation region 92d. The gate VGa of the transistor TRa and the gate VGb of the transistor TRb do not need to contact the isolation region 92c and the isolation region 92d. The semiconductor region 35 and the contact 50 serving as contact regions may be provided on the light incident surface (light receiving surface) side, i.e., on the surface 11S2 side of the semiconductor layer 101, as in the example shown in FIG.

[0160] 28 and 29 are provided to explain another example configuration of the imaging device according to Modification 10. The shapes and arrangements of the transistors TRa and TRb are not limited to the above-described examples and can be modified as appropriate. For example, as shown in FIG. 28, the gate VGa of the transistor TRa and the gate VGb of the transistor TRb may each have a triangular shape in a plan view. Furthermore, the shape and arrangement of the pixel transistor 30 are not limited to the above-described examples. For example, as shown in FIG. 29, the gate of the pixel transistor 30 may have a rectangular shape, a ring shape, or the like.

[0161] 2. Second Embodiment Next, a second embodiment of the present disclosure will be described. In the following, components similar to those in the above-described embodiment will be denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.

[0162] 30 and 31 are diagrams showing an example of a planar configuration of a pixel of an imaging device according to a second embodiment of the present disclosure. In the imaging device 1, multiple gates, for example, two gates VG, may be provided for each photoelectric conversion unit 12. The transistors TR1 to TR4 each include, for example, two gates, and can also be said to have a twin-gate structure. It can also be said that two transfer transistors, each having a gate VG, are provided for one photoelectric conversion unit 12.

[0163] In each pixel P of the imaging device 1, for example, gates VG1a, VG1b, VG2a, VG2b, VG3a, VG3b, VG4a, and VG4b are arranged around the overflow path 70.

[0164] Gate VG1a and gate VG1b are provided corresponding to the first photoelectric conversion unit 12a and are configured to be able to transfer charges. Gate VG1a is provided adjacent to the overflow path 70 and isolation region 92c. Gate VG1b is provided adjacent to the overflow path 70 and isolation region 92b. Gate VG1a and gate VG1b are controlled by different signals.

[0165] Gate VG2a and gate VG2b are provided corresponding to the second photoelectric conversion unit 12b and are configured to be able to transfer charges. Gate VG2a is provided adjacent to the overflow path 70 and isolation region 92d. Gate VG2b is provided adjacent to the overflow path 70 and isolation region 92a. Gate VG2a and gate VG2b are controlled by different signals.

[0166] Gate VG3a and gate VG3b are provided corresponding to the third photoelectric conversion unit 12c and are configured to be able to transfer charges. Gate VG3a is provided adjacent to the overflow path 70 and isolation region 92c. Gate VG3b is provided adjacent to the overflow path 70 and isolation region 92b. Gate VG3a and gate VG3b are controlled by different signals.

[0167] Furthermore, gates VG4a and VG4b are provided corresponding to the fourth photoelectric conversion unit 12d and are configured to be able to transfer charges. Gate VG4a is provided adjacent to the overflow path 70 and isolation region 92d. Gate VG4b is provided adjacent to the overflow path 70 and isolation region 92b. Gate VG4a and gate VG4b are controlled by different signals.

[0168] 31, for example, gate VG1a is electrically connected to a wiring that transmits signal STG1a and is controlled by signal STG1a. Gate VG1b is electrically connected to a wiring that transmits signal STG1b and is controlled by signal STG1b. Gate VG2a is electrically connected to a wiring that transmits signal STG2a and is controlled by signal STG2a. Gate VG2b is electrically connected to a wiring that transmits signal STG2b and is controlled by signal STG2b.

[0169] Gate VG3a is electrically connected to a line transmitting signal STG3a and is controlled by signal STG3a. Gate VG3b is electrically connected to a line transmitting signal STG3b and is controlled by signal STG3b. Gate VG4a is electrically connected to a line transmitting signal STG4a and is controlled by signal STG4a. Gate VG4b is electrically connected to a line transmitting signal STG4b and is controlled by signal STG4b.

[0170] The gates VG1a to VG4b are controlled, for example, by a pixel driving unit 105. The pixel driving unit 105 generates, for example, signals STG1a, STG1b, STG2a, STG2b, STG3a, STG3b, STG4a, and STG4b and supplies them to each pixel P via the above-mentioned control line Lread. The gates VG1a to VG4b can be controlled to be turned on or off by a signal voltage input by the pixel driving unit 105.

[0171] The pixel driving unit 105 can set the electric potential in the overflow path 70 by controlling the gates VG1a to VG4b provided around the overflow path 70. For example, by controlling the voltage supplied to each of the gates VG1a to VG4b, it is possible to adjust the electric potential of the overflow path 70.

[0172] 32 and 33 are diagrams illustrating an example of the operation of the imaging device according to the second embodiment. For example, as shown in Fig. 32, the pixel driving unit 105 supplies a voltage V1 to gates VG1a to VG4a, and supplies a voltage V2 lower than voltage V1 to gates VG1b to VG4b using signals STG1b to STG4b. The voltages V1 and V2 are, for example, negative voltages.

[0173] A voltage V1 is applied to gates VG1a to VG4a by signals STG1a to STG4a. A voltage V2 lower than voltage V1 is applied to gates VG1b to VG4b by signals STG1b to STG4b. In this case, gates VG1a to VG4a are relatively close to an ON state, and gates VG1b to VG4b are relatively close to an OFF state.

[0174] 32, it is possible to make it easier for charges to move via the overflow path 70 between vertically adjacent photoelectric conversion units 12 than between horizontally adjacent photoelectric conversion units 12. For example, it is possible to make it easier for charges photoelectrically converted in the first photoelectric conversion unit 12a to move (overflow) toward the third photoelectric conversion unit 12c than toward the second photoelectric conversion unit 12b.

[0175] Furthermore, the charge photoelectrically converted by the second photoelectric conversion unit 12 b can be more easily moved toward the fourth photoelectric conversion unit 12 d than toward the first photoelectric conversion unit 12 a. The pixel driving unit 105 can change the potential distribution in the overflow path 70 by adjusting the output voltage to the gates VG1 a to VG4 b, thereby controlling the charge transfer path.

[0176] 33, the pixel driving unit 105 can supply a voltage V3 to each of the gates VG1a to VG4b. The voltage V3 is, for example, a positive voltage. In this case, when the gates VG1a to VG4b are turned on, the charges photoelectrically converted by the first to fourth photoelectric conversion units 12a to 12d are added together, and a pixel signal based on the added charges can be read out.

[0177]

[0013] The photodetector according to the present embodiment includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixels. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a first gate and a second gate (e.g., gate VG1a and gate VG1b) provided corresponding to the first photoelectric conversion element and capable of transferring electric charges, and an overflow path provided adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element. The first gate is provided adjacent to the overflow path and the third isolation region, and the second gate is provided adjacent to the overflow path and the first isolation region.

[0178] The photodetector (image capture device 1) according to this embodiment has a gate VG1a provided adjacent to the overflow path 70 and the isolation region 92c, and a gate VG1b provided adjacent to the overflow path 70 and the isolation region 92a. This allows the image capture device 1 to control the potential of the overflow path. This makes it possible to realize a photodetector with good performance.

[0179] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0180] (2-1. Modification 11) FIGS. 34 and 35 are diagrams illustrating an example configuration of an imaging device according to Modification 11 of the present disclosure. FIG. 35 illustrates an example configuration of a pixel in the direction of line A-A' shown in FIG. 34. The imaging device 1 may have a gate OFG (overflow gate) provided in correspondence with the overflow path 70. The gate OFG is a gate electrode and is made of, for example, polysilicon (Poly-Si). The gate OFG and the gate insulating film may collectively be referred to as a gate.

[0181] The gate OFG is provided, for example, between the isolation region 92c and the floating diffusion FD, and between the isolation region 92d and the floating diffusion FD. The gate OFG is provided, for example, by digging into the semiconductor layer 101. The gate OFG can be provided up to the vicinity of the overflow path 70 in the semiconductor layer 101, as in the example shown in FIG.

[0182] The pixel driving unit 105 of the imaging device 1 can set the electric potential in the overflow path 70 by controlling the gate OFG provided for the overflow path 70. For example, by controlling the voltage supplied to the gate OFG, the electric potential of the overflow path 70 can be adjusted, and the charge transfer path can be controlled.

[0183] (2-2. Modification 12) Figures 36 to 39 are intended to explain a configuration example of an imaging device according to Modification 12. As in the examples shown in Figures 36 and 37, the gate OFG may be provided on the light incident surface (light receiving surface) side, that is, on the surface 11S2 side of the semiconductor layer 101. Furthermore, for example, the gate OFG may be disposed between the isolation regions 92a to 92d on the surface 11S2 side of the semiconductor layer 101, as in the examples shown in Figures 38 and 39.

[0184] 40 and 41 are diagrams illustrating another example configuration of an imaging device according to Modification 12. The imaging device 1 may have an overflow path 70a provided adjacent to the first photoelectric conversion unit 12a and the third photoelectric conversion unit 12c, and an overflow path 70b provided adjacent to the second photoelectric conversion unit 12b and the fourth photoelectric conversion unit 12d.

[0185] The gate OFG is formed so as to be stacked above the overflow paths 70a and 70b, as in the example shown in Fig. 41. The pixel driving unit 105 controls the voltage supplied to the gate OFG, and can form a path for charges between the overflow paths 70a and 70b.

[0186] 3. Third Embodiment Next, a third embodiment of the present disclosure will be described. In the following, components similar to those in the above-described embodiment will be denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.

[0187] 42 is a diagram illustrating an example of a planar configuration of pixels in an imaging device according to a third embodiment of the present disclosure. In the imaging device 1, the isolation regions 92 may be provided apart from the pixel isolation regions 91. For example, some of the isolation regions 92 may be provided apart from the pixel isolation regions 91.

[0188] 42 , the isolation region 92a and the isolation region 92b are each provided apart from the pixel isolation region 91. The isolation region 92c and the isolation region 92d are provided in contact with the pixel isolation region 91. The isolation region 92a, the isolation region 92b, the isolation region 92c, and the isolation region 92d can be formed continuously and provided integrally, for example, as in the example shown in FIG.

[0189] The readout circuit 20 of each pixel P may have, for example, two amplification transistors (transistor AMP1, transistor AMP2), two reset transistors (transistor RST1, transistor RST2), and two selection transistors (transistor SEL1, transistor SEL2).

[0190] Each transistor of the readout circuit 20 is provided, for example, on the surface 11S1 side of the semiconductor layer 101. The multiple transistors of the readout circuit 20 can be provided, for example, divided into multiple active regions 80 (active region 80a and active region 80b in the example shown in FIG. 42 ).

[0191] In pixel P of the imaging device 1, for example, transistor AMP1, transistor SEL1, and transistor RST1 are provided in the active region 80b. Also, transistor AMP2, transistor SEL2, and transistor RST2 are provided in the active region 80a. Note that the semiconductor region 35 and contact 50 described above as contact regions are provided, for example, on the light incident surface (light receiving surface) side, i.e., the surface 11S2 side of the semiconductor layer 101.

[0192] The active region 80a and the active region 80b each have a concave shape, for example, as shown in the example of Fig. 42. A portion of the active region 80a is provided between the isolation region 92a and the pixel isolation region 91, and a portion of the active region 80b is provided between the isolation region 92b and the pixel isolation region 91.

[0193] The transistor AMP1 is provided, for example, between the isolation region 92b and the pixel isolation region 91. The transistor AMP2 is provided between the isolation region 92a and the pixel isolation region 91. The transistors RST1 and RST2 are provided to sandwich the isolation region 92c therebetween, and the transistors SEL1 and SEL2 are provided to sandwich the isolation region 92d therebetween.

[0194] In the imaging device 1 according to the present embodiment, at least some of the isolation regions 92 among the plurality of isolation regions 92 are provided away from the pixel isolation region 91. This makes it possible to increase the area of ​​the region (active region 80 a, active region 80 b) in which transistors and the like are formed in the pixel P.

[0195] 42, for example, active regions 80a and 80b each having a concave shape are formed, and the size of the transistor arranged in pixel P can be increased. For example, as in the example shown in FIG. 42, the areas of transistors AMP1 and AMP2 can be increased.

[0196] The size of the transistors in the readout circuit 20, for example, the transistors AMP1 and AMP2, can be increased, making it possible to suppress noise from being mixed into pixel signals. Increasing the gate area of ​​the transistors AMP1 and AMP2 makes it possible to suppress noise from being mixed into pixel signals. The imaging device 1 can achieve a suitable layout and have a structure that is advantageous for miniaturization.

[0197] 42 , the drain region (or source region) of the pixel transistor to which the power supply voltage VDD is supplied is provided along part of the side wall (side surface) of the pixel isolation region 91 and the side wall of the isolation region 93 that separates the elements. This makes it possible to reduce dark current on the side wall of the pixel isolation region 91 and the side wall of the isolation region 93.

[0198] [Functions and Effects] The photodetector according to this embodiment includes a semiconductor layer (semiconductor layer 101), a plurality of pixels (pixels P) each having a photoelectric conversion element (photoelectric conversion unit 12) provided in the semiconductor layer, a pixel isolation region (pixel isolation region 91) provided so as to surround the plurality of adjacent pixels, and a first isolation region (e.g., isolation region 92a) provided between the plurality of adjacent pixels. The first isolation region is provided apart from the pixel isolation region.

[0199] In the photodetector (image capture device 1) according to this embodiment, the isolation region 92a is provided away from the pixel isolation region 91. This allows the image capture device 1 to have a structure that is advantageous for miniaturizing pixels. For example, the size of the pixel transistors can be increased, thereby improving the characteristics of the pixel transistors. This makes it possible to realize a photodetector with good performance.

[0200] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0201] (3-1. Modification 13) FIG. 43 is a diagram illustrating a configuration example of an imaging device according to Modification 13. As in the example shown in FIG. 43, isolation regions 92a to 92d may be provided away from the pixel isolation region 91. An active region 80 in which transistors and the like are formed is provided so as to surround the isolation regions 92a to 92d, for example, as in the example shown in FIG. 43. The active region 80 may have a rectangular shape.

[0202] (3-2. Modification 14) FIG. 44 is an explanatory diagram illustrating an example of the configuration of an imaging device according to Modification 14. The number and arrangement of the active areas 80 are not limited to the above-described example and can be changed as appropriate. For example, a pixel P of the imaging device 1 may be provided with three or more active areas 80 (e.g., six active areas 80). The transistors AMP, SEL, and RST may be arranged in different active areas 80.

[0203] (3-3. Modification 15) Figures 45 to 47 are diagrams illustrating an example of the configuration of an imaging device according to Modification 15. As in the examples shown in Figures 45 to 47, the pixel transistors may have a ring shape (for example, a quarter-ring shape, a half-ring shape, etc.). By making the transistor of the readout circuit 20, for example, the transistor AMP, ring-shaped, it is possible to increase the gate area of ​​the transistor AMP and suppress the inclusion of noise in the pixel signal.

[0204] 48 to 52 are diagrams illustrating other exemplary configurations of an imaging device according to Modification 15. As in the example shown in FIG. 48, the transistor AMP may be provided along the pixel isolation region 91. The transistor AMP is provided, for example, from one end to the other end (from the left end to the right end) of the active region 80. The transistor AMP may have a shape that extends to the sidewall of the pixel isolation region 91. This allows the area of ​​the transistor AMP to be increased, thereby improving the signal quality of the pixel signal.

[0205] 48 to 50, each transistor of the readout circuit 20 may have a square shape with rounded corners in a plan view. Also, as shown in the examples of Fig. 51 or 52, the isolation regions 92a to 92d may be provided in contact with the pixel isolation region 91. The semiconductor region 35 serving as a contact region may be provided, for example, between the isolation region 92c (or the isolation region 92d) and the floating diffusion FD.

[0206] 4. Application Examples The imaging device 1 and the like can be applied to any type of electronic device equipped with an imaging function, for example, a camera system such as a digital still camera or video camera, a mobile phone with an imaging function, etc. Fig. 53 shows a schematic configuration of an electronic device 1000.

[0207] The electronic device 1000 includes, for example, a lens group 1001, an imaging device 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a recording unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.

[0208] The lens group 1001 captures incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies the signal as a pixel signal to the DSP circuit 1002.

[0209] The DSP circuit 1002 is a signal processing circuit that processes signals supplied from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing the signals from the imaging device 1. The frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 on a frame-by-frame basis.

[0210] The display unit 1004 is composed of a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and records image data of moving images or still images captured by the imaging device 1 on a recording medium such as a semiconductor memory or a hard disk.

[0211] The operation unit 1006, in response to a user's operation, outputs operation signals for various functions of the electronic device 1000. The power supply unit 1007 supplies various types of power to the DSP circuit 1002, frame memory 1003, display unit 1004, recording unit 1005, and operation unit 1006 as needed.

[0212] 5. Application Examples (Application Examples to Mobile Bodies) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0213] FIG. 54 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology of the present disclosure can be applied.

[0214] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 54, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0215] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0216] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0217] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0218] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0219] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0220] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0221] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0222] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0223] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 54, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0224] FIG. 55 is a diagram showing an example of the installation position of the imaging unit 12031.

[0225] In FIG. 55, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0226] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0227] 55 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0228] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0229] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0230] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0231] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0232] An example of a mobile object control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 of the above-described configuration. Specifically, for example, the image capturing device 1 or the like can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031, it becomes possible to obtain high-resolution captured images. It becomes possible to perform high-precision control using captured images in the mobile object control system.

[0233] (Application Example to Endoscopic Surgery System) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0234] FIG. 56 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0235] Figure 56 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0236] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0237] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0238] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected by the optical system onto the image sensor. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0239] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0240] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0241] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing the surgical site, etc.

[0242] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0243] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0244] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0245] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0246] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light in a narrower band than the light irradiated during normal observation (i.e., white light) to capture high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, in what is known as narrow band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or may involve locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissues with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0247] FIG. 57 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0248] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0249] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0250] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be a single (so-called single-chip type) or multiple (so-called multi-chip type). When the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0251] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0252] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0253] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0254] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0255] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0256] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0257] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0258] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0259] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0260] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0261] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0262] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0263] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0264] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. Of the above-described configurations, the technology according to the present disclosure can be suitably applied to, for example, the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to provide a high-definition endoscope 11100.

[0265] Although the present disclosure has been described above by way of embodiments, modifications, application examples, and applied examples, the present technology is not limited to the above-described embodiments, etc., and various modifications are possible. For example, although the modifications described above have been described as modifications of the above-described embodiments, the configurations of the modifications can be combined as appropriate.

[0266] In the above embodiments, an imaging device has been described as an example. However, the photodetector of the present disclosure may be, for example, a device that receives incident light and converts the light into an electric charge. The output signal may be a signal of image information or a signal of ranging information. The photodetector (imaging device) may be applied to an image sensor, a ranging sensor, etc. Note that the present disclosure is not limited to a back-illuminated image sensor, but may also be applied to a front-illuminated image sensor.

[0267] The photodetector according to the present disclosure may also be applied as a distance measuring sensor capable of measuring distances using a time-of-flight (TOF) method. The photodetector (image capture device) may also be applied as a sensor capable of detecting events, such as an event-driven sensor (also known as an event vision sensor (EVS), an event-driven sensor (EDS), or a dynamic vision sensor (DVS)).

[0268] According to an embodiment of the present disclosure, a photodetector device includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixel. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, a floating diffusion provided between the third isolation region and the fourth isolation region, and a first region of a first conductivity type provided between the third isolation region and the floating diffusion. This allows the imaging device to have a structure advantageous for miniaturizing pixels. It is possible to realize a photodetector with good performance.

[0269] According to one embodiment of the present disclosure, a photodetector device includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixel. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, and a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction. The length of the third isolation region in the first direction is different from the length of the first isolation region or the length of the second isolation region in the second direction. This makes it possible to realize a photodetector device with excellent performance.

[0270] According to an embodiment of the present disclosure, a photodetector device includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixels. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a first gate and a second gate corresponding to the first photoelectric conversion element and capable of transferring electric charges, and an overflow path provided adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element. The first gate is provided adjacent to the overflow path and the third isolation region. The second gate is provided adjacent to the overflow path and the first isolation region, which allows the imaging device to control the potential of the overflow path, thereby realizing a photodetector with good performance.

[0271] A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels each having a photoelectric conversion element provided in the semiconductor layer, a pixel isolation region provided to surround adjacent pixels, and a first isolation region provided between adjacent pixels. The first isolation region is provided away from the pixel isolation region. This allows the imaging device to have a structure advantageous for miniaturizing pixels. This makes it possible to realize a photodetector with good performance.

[0272] According to an embodiment of the present disclosure, a photodetector device includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer, and a pixel isolation region provided in the semiconductor layer around the pixels. The first pixel includes a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction, a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction, a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction, a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, a floating diffusion provided between the third isolation region and the fourth isolation region, and a first region of a first conductivity type provided between adjacent pixels. This allows the imaging device to have a structure advantageous for miniaturization of pixels. It is possible to realize a photodetector with good performance.

[0273] The effects described in this specification are merely examples and are not limited to those described, and other effects may also be achieved. Furthermore, the present disclosure may also be configured as follows. (1) A photodetector comprising: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction; a floating diffusion provided between the third isolation region and the fourth isolation region; and a first region of a first conductivity type provided between the third isolation region and the floating diffusion. (2) The photodetector according to (1), wherein the first pixel has a first contact electrically connected to the first region. (3) The photodetector according to (2), further comprising a well of the first conductivity type provided in the semiconductor layer, wherein the first region is provided in the well, and the first contact is electrically connected to the well via the first region. (4) The photodetector according to any one of (1) to (3), wherein a length of the third isolation region in the first direction is shorter than a length of the first isolation region or a length of the second isolation region in the second direction. (5) The photodetector according to any one of (1) to (4), wherein the first pixel has an overflow path provided in the semiconductor layer so as to be adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element.(6) The photodetector according to any one of (1) to (5), wherein the length of the third isolation region in the first direction is approximately equal to the length of the first isolation region or the length of the second isolation region in the second direction. (7) The photodetector according to any one of (1) to (6), wherein the first pixel has: a second region of the first conductivity type provided between the fourth isolation region and the floating diffusion; and a second contact electrically connected to the second region. (8) The photodetector according to any one of (1) to (7), wherein the length of the fourth isolation region in the first direction is shorter than the length of the first isolation region or the length of the second isolation region in the second direction. (9) A photodetector comprising: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; and a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, wherein a length of the third isolation region in the first direction is different from a length of the first isolation region or a length of the second isolation region in the second direction. (10) The photodetector according to (9), wherein the first pixel has: a floating diffusion provided between the third isolation region and the fourth isolation region; and a transistor including a gate provided between the third isolation region and the floating diffusion and capable of transferring charges photoelectrically converted by the first photoelectric conversion element.(11) The photodetector according to (9) or (10), wherein the first pixel has: a first region of a first conductivity type provided between the third isolation region and the fourth isolation region, a first contact electrically connected to the first region, and a floating diffusion provided between the third isolation region and the first region. (12) The photodetector according to any one of (9) to (11), wherein the first pixel has: a first region of a first conductivity type provided between the third isolation region and the fourth isolation region, a first contact electrically connected to the first region, and a transistor including a gate provided between the third isolation region and the first region and capable of transferring charge photoelectrically converted by the first photoelectric conversion element. (13) A semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a first gate and a second gate provided corresponding to the first photoelectric conversion element and capable of transferring charges; and an overflow path provided adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element, The photodetector according to (13), wherein the first gate is provided adjacent to the overflow path and the third isolation region, and the second gate is provided adjacent to the overflow path and the first isolation region. (14) The photodetector according to (13), wherein the first gate and the second gate are electrically connected to different wirings.(15) The photodetector according to (13) or (14), wherein the first gate is electrically connected to a first wiring capable of transmitting a first voltage, and the second gate is electrically connected to a second wiring capable of transmitting a second voltage lower than the first voltage. (16) The photodetector according to any one of (13) to (15), wherein the first pixel has a third gate and a fourth gate provided corresponding to the third photoelectric conversion element and capable of transferring electric charges, the third gate being provided adjacent to the overflow path and the third isolation region, and the fourth gate being provided adjacent to the overflow path and the second isolation region. (17) A photodetector comprising: a semiconductor layer; a plurality of pixels each having a photoelectric conversion element provided in the semiconductor layer; a pixel isolation region provided so as to surround the plurality of adjacent pixels; and a first isolation region provided between the plurality of adjacent pixels, wherein the first isolation region is provided away from the pixel isolation region. (18) The photodetector according to (17), further comprising a transistor provided between the first isolation region and the pixel isolation region. (19) The photodetector according to (18), wherein the transistor is a transistor capable of outputting a signal based on charges photoelectrically converted by the photoelectric conversion element. (20) The photodetector according to any one of (17) to (19), further comprising: a first region of a first conductivity type provided between the first isolation region and the pixel isolation region; and a first contact electrically connected to the first region.(21) A photodetector comprising: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction; a floating diffusion provided between the third isolation region and the fourth isolation region; and a first region of a first conductivity type provided between the adjacent pixels. (22) The photodetector according to (21), further comprising a first contact electrically connected to the first region. (23) A light detection device comprising: an optical system; and a light detection device that receives light transmitted through the optical system, wherein the light detection device comprises: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel comprises: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction; and a floating diffusion provided between the third isolation region and the fourth isolation region. a first region of a first conductivity type provided between the third isolation region and the floating diffusion.(24) A light detection device comprising: an optical system; and a light detection device that receives light transmitted through the optical system, wherein the light detection device comprises: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel comprises: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; and a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, The electronic device, wherein a length of the third separation region in the first direction is different from a length of the first separation region or a length of the second separation region in the second direction.(25) A light detection device includes an optical system and a light detection device that receives light transmitted through the optical system, wherein the light detection device includes: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel includes: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element that are adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element that are adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element that are adjacent to each other in a second direction intersecting the first direction; and a first gate and a second gate that are provided corresponding to the first photoelectric conversion element and are capable of transferring charges. an overflow path provided adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element, wherein the first gate is provided adjacent to the overflow path and the third isolation region, and the second gate is provided adjacent to the overflow path and the first isolation region. (26) An electronic device comprising: an optical system; and a photodetector that receives light that has passed through the optical system, wherein the photodetector has: a semiconductor layer, a plurality of pixels each having a photoelectric conversion element provided in the semiconductor layer, a pixel isolation region provided so as to surround the plurality of adjacent pixels, and a first isolation region provided between the plurality of adjacent pixels, wherein the first isolation region is provided away from the pixel isolation region.(27) A light detection device comprising: an optical system; and a light detection device that receives light transmitted through the optical system, wherein the light detection device comprises: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel comprises: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction; and a floating diffusion provided between the third isolation region and the fourth isolation region. a first region of a first conductivity type provided between the plurality of adjacent pixels.

[0274] This application claims priority based on Japanese Patent Application No. 2024-018492, filed on February 9, 2024, in the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0275] Those skilled in the art will recognize that various modifications, combinations, subcombinations, and variations may occur depending on design requirements and other factors, and are intended to be within the scope of the appended claims and their equivalents.

Claims

1. A photodetector comprising: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element that are adjacent in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element that are adjacent in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element that are adjacent in a second direction intersecting the first direction; a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element that are adjacent in the second direction; a floating diffusion provided between the third isolation region and the fourth isolation region; and a first region of a first conductivity type provided between the third isolation region and the floating diffusion.

2. The photodetector device according to claim 1, wherein the first pixel has a first contact electrically connected to the first region.

3. The photodetector according to claim 2, further comprising a well of the first conductivity type provided in the semiconductor layer, the first region being provided within the well, and the first contact being electrically connected to the well via the first region.

4. The photodetector device according to claim 1, wherein the length of the third separation region in the first direction is shorter than the length of the first separation region or the length of the second separation region in the second direction.

5. The photodetector device according to claim 1, wherein the first pixel has an overflow path arranged in the semiconductor layer adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element.

6. The photodetector according to claim 1, wherein the length of the third separation region in the first direction is approximately equal to the length of the first separation region or the length of the second separation region in the second direction.

7. The photodetector device according to claim 1, wherein the first pixel has: a second region of the first conductivity type provided between the fourth isolation region and the floating diffusion; and a second contact electrically connected to the second region.

8. The photodetector according to claim 1, wherein the length of the fourth separation region in the first direction is shorter than the length of the first separation region or the length of the second separation region in the second direction.

9. A photodetector comprising: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; and a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction, wherein the length of the third isolation region in the first direction is different from the length of the first isolation region or the length of the second isolation region in the second direction.

10. The photodetector device according to claim 9, wherein the first pixel comprises: a floating diffusion provided between the third isolation region and the fourth isolation region; and a transistor including a gate provided between the third isolation region and the floating diffusion, capable of transferring charges photoelectrically converted by the first photoelectric conversion element.

11. The photodetector device according to claim 9, wherein the first pixel comprises: a first region of a first conductivity type provided between the third isolation region and the fourth isolation region; a first contact electrically connected to the first region; and a floating diffusion provided between the third isolation region and the first region.

12. The photodetector device of claim 9, wherein the first pixel comprises: a first region of a first conductivity type provided between the third isolation region and the fourth isolation region; a first contact electrically connected to the first region; and a transistor including a gate provided between the third isolation region and the first region, capable of transferring charges photoelectrically converted by the first photoelectric conversion element.

13. A semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a first gate and a second gate provided corresponding to the first photoelectric conversion element and capable of transferring charges; and an overflow path provided adjacent to the first photoelectric conversion element, the second photoelectric conversion element, the third photoelectric conversion element, and the fourth photoelectric conversion element, the first gate is provided adjacent to the overflow path and the third isolation region, and the second gate is provided adjacent to the overflow path and the first isolation region.

14. The photodetector according to claim 13, wherein the first gate and the second gate are electrically connected to different wirings.

15. The photodetector device according to claim 13, wherein the first gate is electrically connected to a first wiring capable of transmitting a first voltage, and the second gate is electrically connected to a second wiring capable of transmitting a second voltage lower than the first voltage.

16. The photodetector device according to claim 13, wherein the first pixel has a third gate and a fourth gate that are provided corresponding to the third photoelectric conversion element and are capable of transferring electric charges, the third gate is provided adjacent to the overflow path and the third isolation region, and the fourth gate is provided adjacent to the overflow path and the second isolation region.

17. A photodetector comprising: a semiconductor layer; a plurality of pixels each having a photoelectric conversion element provided in the semiconductor layer; a pixel isolation region provided so as to surround the plurality of adjacent pixels; and a first isolation region provided between the plurality of adjacent pixels, wherein the first isolation region is provided away from the pixel isolation region.

18. The photodetector device according to claim 17, further comprising a transistor provided between the first isolation region and the pixel isolation region.

19. The photodetector according to claim 18, wherein the transistor is capable of outputting a signal based on the charge photoelectrically converted by the photoelectric conversion element.

20. The photodetector device according to claim 17, further comprising: a first region of a first conductivity type provided between the first isolation region and the pixel isolation region; and a first contact electrically connected to the first region.

21. A photodetector comprising: a semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element, a second photoelectric conversion element, a third photoelectric conversion element, and a fourth photoelectric conversion element provided in the semiconductor layer; and a pixel isolation region provided in the semiconductor layer around the pixel, wherein the first pixel has: a first isolation region provided between the first photoelectric conversion element and the second photoelectric conversion element adjacent to each other in a first direction; a second isolation region provided between the third photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the first direction; a third isolation region provided between the first photoelectric conversion element and the third photoelectric conversion element adjacent to each other in a second direction intersecting the first direction; a fourth isolation region provided between the second photoelectric conversion element and the fourth photoelectric conversion element adjacent to each other in the second direction; a floating diffusion provided between the third isolation region and the fourth isolation region; and a first region of a first conductivity type provided between adjacent pixels.

22. The photodetector device of claim 21, further comprising a first contact electrically connected to the first region.

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