Cascode load switch
The integration of a cascode driver control circuit with a low-side driver in load switches addresses reliability issues by ensuring redundant protection and simplified control, enhancing safety and reducing costs.
Patent Information
- Application Number
- PCT/US2024/015202
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-09
- Publication Date
- 2025-08-14
AI Technical Summary
Conventional load switches, such as relay drivers, face reliability issues due to single-point-of-failure incidents from inadvertently activating electrical loads, as they rely on two drivers that can fail independently, necessitating complex and costly high-side driver control schemes.
A cascode driver control circuit is integrated with a low-side driver to ensure redundancy and reliability, using a series connection with a primary and secondary MOSFET configuration, where the secondary MOSFET is protected by a diode and resistor combination to prevent negative overvoltage and back-driving currents, ensuring activation only when the primary driver is active.
This configuration enhances reliability by preventing inadvertent load activation, simplifies the control scheme, reduces costs, and eliminates the need for duplicate free-wheel elements, while maintaining overcurrent protection and safe deactivation.
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Figure US2024015202_14082025_PF_FP_ABST
Abstract
Description
Cascode Load SwitchBackground
[0001] Enhanced reliability load switches, such as relay drivers, commonly use two drivers acting on the same load simultaneously to avoid single-point-of-failure incidents from inadvertently activating an electrical load. Conventionally, a positive pole of the electrical load is controlled by a high-side driver and the negative pole is controlled by a low-side driver. If either the high-side driver or the low-side driver fails in a way that would inadvertently activate the electrical load, for example in the failure mode of short-circuit, then the remaining driver may still be able to control the load.Summary
[0002] In one or more embodiments of the present disclosure, a relay-driver circuit including a driving domain configured to prevent inadvertent activation of an electrical load is provided. The circuit may include a driver control circuit and a cascode driver control circuit connected in series. The driver control circuit may also include a primary negative pole operatively connected to ground (GND), and a primary positive pole configured to feed an output from the driver control circuit into the cascode driver control circuit. The cascode driver control circuit may include a secondary negative pole configured to receive the output from the driver control circuit, and a secondary positive pole operatively connected to the electrical load.
[0003] One or more of the following features may be included. In some embodiments, the driver control circuit may include a first metal-oxide-semiconductor field-effect transistor (MOSFET) configured to provide overcurrent protection and to act as the primary negative pole that is operatively connected to ground (GND), and a first gate driver operatively connected to the first MOSFET. The cascode driver control circuit may include a second gate driver operatively connected to a second MOSFET configured to act as the secondary negative pole that receives an output from the first MOSFET. The cascode driver control circuit may include a diode connected in seriesbetween the second gate driver and the second MOSFET, and a resistor connected in parallel to the diode and the second MOSFET, where the combination of the diode and the resistor may be configured to decouple the second gate driver from the second MOSFET at any floating gate voltage thereby protecting second MOSFET 516 from negative overvoltage, and protecting the second gate driver from a back-driving current. The first gate driver may be a GND-referenced amplifier. Both the first MOSFET and the second MOSFET may be N-channel MOSFETs. The output of the driver control circuit may be a drain of the first N-channel MOSFET that may be configured to be a source for the secondary negative pole of the cascode driver control circuit, and the secondary positive pole of the cascode driver control circuit may be a drain of the second N-channel MOSFET that may be operatively connected to the electrical load. Activation of the driver control circuit may cause the source of the secondary negative pole of the cascode driver control circuit to be drained and generate approximately zero voltage. The cascode driver control circuit may be referenced to the same GND as the driver control circuit, such that the cascode driver control circuit may only be activated when the driver control circuit is also activated. Overcurrent protection of the driver control circuit may be configured to also deactivate the cascode driver control circuit in the event of an external overload.
[0004] In one or more embodiments of the present disclosure, a relay-driver method is provided. The method may include providing a driver control circuit and a cascode driver control circuit connected in series, where the driver control circuit may include a first N-channel MOSFET configured to be a source for the cascode driver control circuit, and the cascode driver control circuit may include a second MOSFET configured to be a source for an operatively connected electrical load. The method may further include transmitting an output from the driver control circuit to the cascode driver control circuit, where the output of the driver control circuit may be a drain of the first N-channel MOSFET that may be configured to be a source for the cascode driver control circuit, and transmitting an output from the cascode driver control circuitto the operatively connected electrical load, where the output of the cascode driver control circuit may be a drain of the second N-channel MOSFET that may be configured to be a source for the operatively connected electrical load.
[0005] One or more of the following features may be included. In some embodiments, a driving domain operatively connected to the electrical load is configured to prevent inadvertent activation of the electrical load. The driving domain may include the driver control circuit and the cascode driver control circuit connected in series. The driver control circuit may include a primary negative pole operatively connected to ground (GND), and a primary positive pole configured to feed an output from the driver control circuit into the cascode driver control circuit. The cascode driver control circuit may include a secondary negative pole configured to receive the output from the driver control circuit, and a secondary positive pole operatively connected to the electrical load. The first MOSFET may be configured to act as the primary negative pole that may be operatively connected to ground (GND), and the second MOSFET may be configured to act as the secondary negative pole that receives an output from the first MOSFET. The driver control circuit may include a first gate driver operatively connected to the first MOSFET, and the cascode driver control circuit may include a second gate driver operatively connected to the second MOSFET. The first gate driver may be a GND-referenced amplifier. The cascode driver control circuit may include a diode connected in series between the second gate driver and the second MOSFET, and a resistor connected in parallel to the diode and the second MOSFET, where the combination of the diode and the resistor may be configured to decouple the second gate driver from the second MOSFET at any floating gate voltage thereby protecting second MOSFET 516 from negative overvoltage, and protecting the second gate driver from a back-driving current. Activation of the driver control circuit may cause the source of the secondary negative pole of the cascode driver control circuit to be drained and generate approximately zero voltage. The cascode driver control circuit may be referenced to the same GND as the driver control circuit, such that the cascode drivercontrol circuit may only be activated when the driver control circuit is also activated. The driver control circuit may be configured to also deactivate the cascode driver control circuit in the event of an external overload.
[0006] Additional features and advantages of embodiments of the present disclosure will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of embodiments of the present disclosure. The objectives and other advantages of the embodiments of the present disclosure may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
[0007] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of embodiments of the invention as claimed.Brief Description of the Drawings
[0008] The accompanying drawings, which are included to provide a further understanding of embodiments of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and together with the description serve to explain the principles of embodiments of the present disclosure.
[0009] FIG. 1 is an example block diagram of a load switch having a high-side driver / low-side driver architecture consistent with current conventions;
[0010] FIG. 2 is an example block diagram of an internal structure of a high-side driver consistent with current conventions;
[0011] FIG. 3 is an example block diagram of a high-side driver and a low-side driver in a load switch system consistent with current conventions;
[0012] FIG. 4 is an example block diagram of a load switch having a low-side driver / low-side cascode driver architecture consistent with embodiments of the present disclosure;
[0013] FIG. 5 is an example block diagram of a low-side driver and a low-side cascodedriver in a load switch system consistent with embodiments of the present disclosure; and
[0014] FIG. 6 shows a flowchart depicting operations consistent with embodiments of the present disclosure.Detailed Description
[0015] Embodiments of the present disclosure are directed toward enhanced reliability load switches, such as relay drivers, and commonly use two drivers simultaneously acting on the same electrical load to avoid single point of failure incidents from inadvertently activating the load. The positive pole of the load may be controlled by a high-side driver and the negative pole may be controlled by a low-side driver. The invention disclosed herein proposes replacing the safety function of the high-side driver with a cascode stage in the low-side driver. The low-side driver stage and the low-side cascode driver stage may be connected serially, in a manner similar to how the high-side driver and low-side driver components may effectively be connected in series in conventional configurations. As will be discussed in more detail below, the control scheme of the proposed low-side cascode driver should provide a simpler and more cost-effective alternative to controlling a high-side driver.
[0016] Enhanced reliability load switches, such as relay drivers, commonly use two drivers effectively connected in series. The positive pole of the electric load, such as the coil of a contactor, may be controlled by a high-side driver and the negative pole of the same load may be controlled by a low-side driver. If either the high-side driver or the low-side driver were to fail, then the other driver may still be able to control the electric load. The protection forms of metal-oxide-semiconductor field-effect transistors (MOSFETs) in low-side drivers may be similar to the protection forms used in high-side drivers, namely overcurrent limitation and overheating shutdown. Further, the solution proposed herein may
[0017] Referring now to FIG. 1, an example block diagram of a load switch circuit 100 having a high-side driver / low-side driver architecture consistent with currentconventions is provided. Load switch circuitry 100 may include low-side driver control circuit 102, which may be configured to control the negative pole of operatively connected electrical load 104, and high-side driver control circuit 106, which may be configured to control the positive pole of operatively connected electrical load 104. If either low-side driver control circuit 102 or high-side driver control circuit 106 were to fail, then the remaining driver may be configured to continue controlling electric load 104 thereby providing a form of redundancy for electrical load 104 and offering improved functional safety in the case that the inactive state of load switch circuit 100 is a “safe state” where at least one driver of load switch circuit 100 is open.
[0018] Referring now to FIG. 2, a diagram depicting an internal structure of a high- side driver control circuit 200 consistent with current conventions is provided. High- side driver control circuit 200, may include an operational amplifier (op-amp) 202 configured to act as a voltage translator. Op-amp 202 may also be configured to take a control signal and an input reference of the voltage translator as inputs and to output an output reference of the voltage translator. High- side driver control circuit 200, may also include a charge-pump-based gate driver 204 operatively connected to both opamp 202 and the positive supply node 206. Additionally, transistor 208 may be an N- channel MOSFET operatively connected to both op-amp 202 and the positive supply node 206.
[0019] In some embodiments, the internal control scheme of a high-side driver may usually be more complex than that of low-side driver control circuitry. High-side drivers may usually be based on N-channel MOSFETs, which tend to be much cheaper than P-channel counterparts with similar voltage and current ratings. An N-channel MOSFET may need to have a positive gate voltage with respect to its source for activation and a gate voltage of approximately zero for deactivation. However, the source may be connected to the output of the high-side driver, which in turn may make the source voltage of the MOSFET swing during the operation. Turning the load-switch circuitry fully on may require more positive gate voltage than the positive supplyvoltage of the high-side driver is able to provide. Turning the load-switch circuitry fully off may require a gate-source control voltage of approximately zero. In other words, the swing of the gate-control voltage may cause the gate-source control voltage swing to be superimposed over the swing of the output voltage. In contrast, the gate control schema of a low- side driver may only need to cope with the swing of the output reference.
[0020] Accordingly, the control schema of an N-channel MOSFET high-side driver may need to cope with three issues: (i) the swinging source-voltage’s amplification of the gate control voltage, (ii) the reference of the output (gate) voltage swings with respect to the reference of the input control voltage, and (iii) the highest required output voltage being even more positive than the positive supply voltage. Regarding (iii), the generation of higher output voltages, it may be worth mentioning that load switches may be considered (direct current) DC devices, where frequent switching may not be reliable. In contrast, N-channel MOSFET devices based DC / DC converters may commonly rely on frequent switching, which in turn may allow projecting a ground (GND) -referenced supply voltage to the floating gate driver of the MOSFET by a bootstrap capacitor, where a bootstrap capacitor is a component that may provide an isolation supply for a high switch. Such low-cost bootstrap-based projection may not be used in load switches. Instead, a charge-pump-based voltage generator may be used to provide the extra positive potential, where the charge-pump may include an oscillator and power stage at the primary side of the capacitor. Accordingly, the control schema of an N-channel MOSFET high-side driver may consist of an amplifier and a charge- pump-based voltage generator.
[0021] Referring now to FIG. 3, a diagram depicting a high-side driver and a low-side driver in a load switch system 300 consistent with current conventions. Load switch system 300 may include low-side driver control circuit 302, which may be configured to control the negative pole of operatively connected electrical load 304, and high-side driver control circuit306, which may be configured to control the positive pole of operatively connected electrical load 304. Low-side driver control circuit 302 may include protected MOSFET 308 operatively connected to ground (GND), and first low-side type gate driver 310 operatively connected to protected MOSFET 308. Protected MOSFET 308 may be an N-channel MOSFET configured to provide overcurrent limitations and overheating shutdown protections for low-side driver control circuit 302. In some embodiments, low-side type gate driver 310 may be a GND-referenced amplifier configured to convert from a logic level to a MOSFET gate level. The logic control level may be derived from control circuitry, such as a microcontroller, often hovering around 3.3V. This voltage may usually be insufficient to control a MOSFET. The role of first low-side type gate driver 310 may be to convert this 0V / 3.3V control level into a 0V turn-off and a 5V-12V turn-on respectively. High-side driver control circuit 306 may include an operational amplifier (op-amp) 312 configured to act as a voltage translator. Op-amp 312 may also be configured to take a control signal and an input reference of the voltage translator as inputs and to output an output reference of the voltage translator. High-side driver control circuit 306, may also include a charge- pump-based gate driver 314 operatively connected to both op-amp 312 and the positive supply node 316. Additionally, second MOSFET 318 may be operatively connected to both op-amp 312 and the positive supply node 316. Due to the differing complexity of high-side driver’s and low-side drivers’ control schemes, the cost and availability of high-side drivers are less desirable than the cost and availability of the low-side drivers.
[0022] Another aspect that may be considered is the fact that load switches often drive high voltage high current contactors. High-current contactors may require a relatively high inductive free-wheel voltage during deactivation. Low free-wheel voltages, such as that provided by a simple free-wheel diode, cause slow de-energization of the electrical load coil. The coil current may decay slowly at deactivation and slow deenergization may cause the moving contact of the high voltage high current contactor to move slowly away from the fixed contact, which in turn would cause prolongedarcing between the moving contact and the fixed contact. Prolonged arcing may in turn potentially weld the moving contact to the fixed contact, where welding would be an undesirable outcome. In some embodiments, ensuring a relatively high inductive freewheel voltage may require extra resources in the drivers, and having both high- side and low-side drivers may also involve duplicating free-wheel resources.
[0023] Moreover, the internal protection of the low- side driver may also turn off the low-side cascode driver, since the source voltage of an N-channel MOSFET within the low-side cascode driver will become positive with respect to the GND reference, which may cause the gate-source control voltage of the low-side cascode driver to fall below the opening threshold.
[0024] Referring now to FIGS. 4 & 5, diagrams depicting load switch systems 400, 500 each having a low-side driver I low-side cascode driver architecture. Load switch systems 400, 500 both employ a two-stage driver serial configuration in the low-side driving domain instead of the conventional approach of using one driver in the low-side domain and another driver in the high-side domain. Load switch systems 400, 500 may include low-side drivers 402, 502 operatively connected to GND and serially connected to low-side cascode drivers 404, 504, which in turn are operatively connected to electrical loads 406, 506. Compared to load switch systems 100, 300 discussed earlier, load switch systems 400, 500 may have left low-side drivers 402, 502 unchanged, but the high-side drivers may have been replaced with low-side cascode drivers 404, 504.
[0025] Referring again to FIG. 5, load switch system 500 may focus on low-side driving domain 508 which may include low-side driver control circuit 502 connected in series to low-side cascode driver control circuit 504. The low-side driver control circuit 502 may include a primary negative pole operatively connected to ground (GND), and a primary positive pole configured to feed an output from low-side driver control circuit 502 into low-side cascode driver control circuit 504.
[0026] More specifically, low-side driver control circuit 502 may include protected metal-oxide-semiconductor field-effect transistor (MOSFET) 510 configured toprovide overcurrent protection and to act as the primary negative pole that is operatively connected to ground (GND), and first low-side type gate driver 512 operatively connected to protected MOSFET 510, where first low-side type gate driver 512 may be a GND-referenced amplifier. In some embodiments, low-side driver control circuit 502 may also include a simple interface circuitry configured to allow using another low- side type gate driver in low-side cascode driver control circuit 504.
[0027] Additionally, low-side cascode driver control circuit 504 may include a secondary negative pole configured to receive the output from low- side driver control circuit 502, and a secondary positive pole operatively connected to electrical load 506. Low-side cascode driver control circuit 504 may also include a second low-side type gate driver 514 operatively connected to second MOSFET 516 configured to act as the secondary negative pole that receives an output from protected MOSFET 510. Low- side cascode driver control circuit 504 may further include diode 518 connected in series between second low-side type gate driver 514 and second MOSFET 516, and resistor 520 connected in parallel to diode 518 and second MOSFET 516. In some embodiments, when protected MOSFET 510 is open, the source voltage of second MOSFET 516 is left in a floating state. Resistor 520 may be configured to turn off second MOSFET 516 at whatever floating voltage value it may have. Diode 518 may be configured to allow opening second MOSFET 516 if the source of second MOSFET 516 is pulled to GND. Additionally, diode 518 may also be configured to decouple second low-side type gate driver 514 from the gate MOSFET 516 at any floating gate voltage. If a floating source voltage happens to be over 20V, then this decoupling may protect second MOSFET 516 from negative overvoltage, and also protects second low- side type gate driver 514 from a back-driving current.
[0028] In some embodiments, both protected MOSFET 510 and second MOSFET 516 are N-channel MOSFETs, which may mean that the output of low-side cascode driver control circuit 504, may be a drain of protected N-channel MOSFET 510 within low- side driver control circuit 502, which may feed the negative pole of low-side cascodedriver control circuit 504 rather than being connected directly to electrical load 506. Instead, it is the positive pole of low-side cascode driver control circuit 504 that is connected to electrical load 506. Further, the negative pole of low-side cascode driver control circuit 504 may be the source of second N-channel MOSFET 516 within low- side cascode driver control circuit 504, while the positive pole of low-side cascode driver control circuit 504 may be the drain of second N-channel MOSFET 516 within low-side cascode driver control circuit 504.
[0029] In contrast to the complexity of the control scheme of a high-side driver, the control scheme of a low-side cascode driver may be nearly as simple as the control scheme of a low-side driver. The opening voltage of the N-channel MOSFET within the low-side cascode driver may be referenced to the same GND potential as the reference of the low-side driver, because the low-side cascode driver may only be activated if the low-side driver is also activated. When the low-side driver is activated, the output of the low-side driver, which is both the negative pole of the low-side cascode driver and the source of the N-channel MOSFET within the low-side cascode driver, may be approximately zero voltage. Accordingly, an opening gate voltage for the low- side cascode driver’s MOSFET may be in the same range as for the low-side driver’s MOSFET, and as such may be unrelated to the positive supply of the electrical load. Further, the gate driver scheme of the low-side cascode driver’s MOSFET may be derived from a common gate driver scheme of the low-side driver’s MOSFET.
[0030] In some embodiments, if free-wheel elements external to the low-side driver or low-side cascode driver are invoked in the application, then duplicating these freewheel elements may not be required. Only the combined driver output, which is the positive pole of the low-side cascode driver, may be protected by any extra free-wheel elements. The output of the low-side driver, which may be considered an internal node, and may represent the negative pole of the low-side cascode driver, may not need any external free-wheel element to provide protection.
[0031] In some embodiments, if the low-side driver has integrated overcurrentprotection, then this protection may deactivate the low-side cascode driver as well in case of external overload. The low-side cascode driver may also be de-activated because the source voltage of the N-channel MOSFET within the low-side cascode driver may become positive with respect to the GND reference, which means that the gate-source control voltage of the low-side cascode driver may fall below the opening threshold. Consequently, employing a robust common MOSFET in the low-side cascode driver may complement a protected MOSFET in the low-side driver without compromising the protection.
[0032] Referring now to FIG. 6 a flowchart 600 depicting operations consistent with embodiments of the present disclosure is provided. According to flowchart 600, a relay driver method may begin by providing 602 a low- side driver control circuit and a low- side cascode driver control circuit connected in series, where the low-side driver control circuit may include a protected N-channel MOSFET configured to be a source for the low-side cascode driver control circuit, and the low-side cascode driver control circuit may include a second MOSFET configured to be a source for an operatively connected electrical load. The relay method may continue by transmitting 604 an output from the low-side driver control circuit to the low-side cascode driver control circuit, where the output of the low-side driver control circuit may be a drain of the protected N-channel MOSFET configured to be a source for the low-side cascode driver control circuit. The relay method may further continue by transmitting 606 an output from the low-side cascode driver control circuit to the operatively connected electrical load, where the output of the low-side cascode driver control circuit may be a drain of the second N- channel MOSFET configured to be a source for the operatively connected electrical load.
[0033] It will be apparent to those skilled in the art that various modifications and variations can be made in the embodiments of the present disclosure without departing from the spirit or scope of the invention. Thus, it is intended that embodiments of thepresent disclosure cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Claims
What Is Claimed Is:
1. A relay-driver circuit including a driving domain configured to prevent inadvertent activation of an electrical load, the circuit comprising: a driver control circuit and a cascode driver control circuit connected in series; the driver control circuit having a primary negative pole operatively connected to ground (GND), and a primary positive pole configured to feed an output from the driver control circuit into the cascode driver control circuit; the cascode driver control circuit having a secondary negative pole configured to receive the output from the driver control circuit, and a secondary positive pole operatively connected to the electrical load.
2. The relay-driver circuit of claim 1, wherein the driver control circuit includes a first metal-oxide-semiconductor field-effect transistor (MOSFET) configured to provide overcurrent protection and to act as the primary negative pole that is operatively connected to ground (GND), and a first gate driver operatively connected to the first MOSFET.
3. The relay-driver circuit of claim 1, wherein the cascode driver control circuit includes a second gate driver operatively connected to a second MOSFET configured to act as the secondary negative pole that receives an output from the first MOSFET.
4. The relay-driver circuit of claim 3, wherein the cascode driver control circuit includes a diode connected in series between the second gate driver and the second MOSFET, and a resistor connected in parallel to the diode and the second MOSFET, wherein the combination of the diode and the resistor is configured to decouple the second gate driver from the second MOSFET at any floating gate voltage thereby protecting second MOSFET 516 from negative overvoltage, and protecting the second gate driver from a back-driving current.
5. The relay-driver circuit of claim 2, wherein the first gate driver is a GND-referenced amplifier.
6. The relay-driver circuit of claim 2, wherein both the first MOSFET and the second MOSFET are N-channel MOSFETs.
7. The relay-driver circuit of claim 6, wherein the output of the driver control circuit is a drain of the first N-channel MOSFET that is configured to be a source for the secondary negative pole of the cascode driver control circuit, and the secondary positive pole of the cascode driver control circuit is a drain of the second N-channel MOSFET that is operatively connected to the electrical load.
8. The relay-driver circuit of claim 7, wherein activation of the driver control circuit causes the source of the secondary negative pole of the cascode driver control circuit to be drained and generate approximately zero voltage.
9. The relay-driver circuit of claim 7, wherein the cascode driver control circuit is referenced to the same GND as the driver control circuit, such that the cascode driver control circuit can only be activated when the driver control circuit is also activated.
10. The relay-driver circuit of claim 7, wherein the driver control circuit is configured to also deactivate the cascode driver control circuit in the event of an external overload.
11. A relay-driver method comprising : providing a driver control circuit and a cascode driver control circuit connected in series, wherein the driver control circuit includes a first N-channel MOSFET configured to be a source for the cascode driver control circuit, and the cascode driver control circuit includes a second MOSFET configured to be a source for an operatively connected electrical load; transmitting an output from the driver control circuit to the cascode driver control circuit, wherein the output of the driver control circuit is a drain of the first N-channel MOSFET that is configured to be a source for the cascode driver control circuit; and transmitting an output from the cascode driver control circuit to the operatively connected electrical load, wherein the output of the cascode driver control circuit is a drain of the second N-channel MOSFET that is configured to be a source for the operatively connected electrical load.
12. The relay-driver method of claim 11, wherein a driving domain operatively connected to the electrical load is configured to prevent inadvertent activation of the electrical load.
13. The relay-driver method of claim 12, wherein the driving domain includes the driver control circuit and the cascode driver control circuit connected in series, wherein the driver control circuit includes a primary negative pole operatively connected to ground (GND), and a primary positive pole configured to feed an output from the driver control circuit into the cascode driver control circuit, wherein the cascode driver control circuit includes a secondary negative pole configured to receive the output from the driver control circuit, and a secondary positive pole operatively connected to the electrical load.
14. The relay-driver method of claim 13, wherein the first MOSFET is configured to act as the primary negative pole that is operatively connected to ground (GND), and the second MOSFET is configured to act as the secondary negative pole that receives an output from the MOSFET.
15. The relay-driver method of claim 14, wherein the driver control circuit includes a first gate driver operatively connected to the first MOSFET, and the cascode driver control circuit includes a second gate driver operatively connected to the second MOSFET.
16. The relay-driver method of claim 15, wherein the first gate driver is a GND- referenced amplifier.
17. The relay-driver method of claim 11, wherein the cascode driver control circuit includes a diode connected in series between the second gate driver and the second MOSFET, and a resistor connected in parallel to the diode and the second MOSFET, wherein the combination of the diode and the resistor is configured to decouple the second gate driver from the second MOSFET at any floating gate voltage thereby protecting second MOSFET 516 from negative overvoltage, and protecting the second gate driver from a back-driving current.
18. The relay-driver method of claim 17, wherein activation of the driver control circuit causes the source of the secondary negative pole of the cascode driver control circuit to be drained and generate approximately zero voltage.
19. The relay-driver method of claim 17, wherein the cascode driver control circuit is referenced to the same GND as the driver control circuit, such that the cascode driver control circuit can only be activated when the driver control circuit is also activated.
20. The relay-driver method of claim 17, wherein the driver control circuit is configured to also deactivate the cascode driver control circuit in the event of an external overload.
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