Battery pack and control method therefor

Abstract

This battery pack comprises: a secondary battery; a first positive terminal for load connection; a first negative terminal for load connection; at least one signal terminal for signal input; and a non-volatile memory. When a first signal is received from the signal terminal, a first storage operation is performed to store first data corresponding to the first signal in the non-volatile memory, and after receiving the first signal, a power consumption reduction state is continued until a second signal is received from the signal terminal.

Description

Battery pack and control method thereof

[0001] The present disclosure relates to a battery pack and a control method thereof.

[0002] A battery device has been known in the past that includes a charge / discharge control circuit that controls the charging and discharging of a secondary battery, and that, when a signal is input to an external terminal, puts the charge / discharge control circuit into a power-down state to reduce power consumption. In this battery device, the power-down state is released when a charger is connected to the battery device (see, for example, Patent Document 1).

[0003] Patent No. 5715502

[0004] In conventional battery devices, a reduced power consumption state such as the power-down state described above can be canceled simply by a user connecting a charger to the battery device. Therefore, there is a risk that the reduced power consumption state can be easily canceled by an inappropriate user operation, such as connecting an unauthorized charger to the battery device.

[0005] The present disclosure provides a battery pack and a control method thereof that can maintain a reduced power consumption state until a predetermined condition is met.

[0006] A first aspect of the battery pack comprises a secondary battery, a first positive terminal for connecting a load, a first negative terminal for connecting a load, at least one signal terminal for signal input, and a non-volatile memory, and when a first signal is received from the signal terminal, a first storage operation is performed to store first data corresponding to the first signal in the non-volatile memory, and after receiving the first signal, the battery pack continues to be in a reduced power consumption state until a second signal is received from the signal terminal.

[0007] A second aspect of the battery pack control method is a method for controlling a battery pack including a secondary battery, a first positive terminal for connecting a load, a first negative terminal for connecting a load, at least one signal terminal for signal input, and a non-volatile memory, wherein a first storage operation is performed to store first data corresponding to the first signal in the non-volatile memory by inputting a first signal from the signal terminal, and a reduced power consumption state is maintained after the input of the first signal until a second signal is input from the signal terminal.

[0008] According to the present disclosure, the reduced power consumption state can be maintained until a predetermined condition is met.

[0009] FIG. 1 is a circuit block diagram showing an example of a system including a battery pack according to a first embodiment. FIG. 2 is a flowchart showing a first example of a control method when locking a battery pack according to the first embodiment. FIG. 3 is a flowchart showing a first example of a control method when unlocking a battery pack according to the first embodiment. FIG. 4 is a flowchart showing a second example of a control method when locking a battery pack according to the first embodiment. FIG. 5 is a flowchart showing a second example of a control method when unlocking a battery pack according to the first embodiment. FIG. 6 is a circuit block diagram showing an example of a system including a battery pack according to a first modified example of the first embodiment. FIG. 7 is a circuit block diagram showing an example of a system including a battery pack according to a second embodiment. FIG. 8 is a circuit block diagram showing an example of a system including a battery pack according to a first modified example of the second embodiment.

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0011] 1 is a circuit block diagram showing an example of a system including a battery pack according to the first embodiment. A system 501 shown in FIG.

[0012] The electronic device 300 is a device connected to a battery pack 401. The electronic device 300 may be a charger 302 that charges the battery pack 401, or a load 301 that operates on power supplied from the battery pack 401. Specific examples of the load 301 include a mobile phone, a smartphone, a tablet device, and earphones. However, the electronic device 300 is not limited to these devices.

[0013] The battery pack 401 may be externally attached to the load 301 or may be built into the load 301. The battery pack 401 is, for example, a battery device that is detachably attached to the load 301, and is capable of supplying power to the load 301 when connected to the load 301. The battery pack 401 and the electronic device 300 are connected to each other via a plurality of terminals (a positive power supply terminal (terminal P+), a negative power supply terminal (terminal P-), a signal terminal (terminal SDA), and a signal terminal (terminal SCL)) shown in FIG.

[0014] The battery pack 401 includes a secondary battery 210 and a battery protection device 601 .

[0015] The secondary battery 210 is an example of a chargeable and dischargeable battery. The secondary battery 210 supplies power to a load 301 connected to terminals P+ and P-. The secondary battery 210 can be charged by a charger 302 connected to terminals P+ and P-. Specific examples of the secondary battery 210 include a lithium ion battery and a lithium polymer battery. The secondary battery 210 has a positive electrode 211 and a negative electrode 212.

[0016] The battery protection device 601 is an example of a secondary battery protection device that operates using the secondary battery 210 as a power source. The battery protection device 601 protects the secondary battery 210 from overcharging and the like by controlling the charging of the secondary battery 210, and protects the secondary battery 210 from overdischarging and the like by controlling the discharging of the secondary battery 210. The battery protection device 601 includes, for example, a terminal P+, a terminal P-, a terminal SDA, a terminal SDL, a terminal B+, a terminal B-, resistive elements R21 and R23, a capacitor C21, a power supply line 201, a ground line 202, a switch circuit 203, and a protection IC 101. IC is an abbreviation for Integrated Circuit.

[0017] The battery protection device 601 is, for example, a component that includes a substrate on which at least the protection IC 101 is mounted.

[0018] Terminal P+ is an example of a first positive terminal for connecting a load, and is connected to the power supply line of the electronic device 300. Terminal P- is an example of a first negative terminal for connecting a load, and is connected to the ground line of the electronic device 300. Terminal B+ is an example of a second positive terminal for connecting a secondary battery, and is connected to the positive electrode 211 of the secondary battery 210. Terminal B- is an example of a second negative terminal for connecting a secondary battery, and is connected to the negative electrode 212 of the secondary battery 210.

[0019] Terminal B+ and terminal P+ are connected by a power supply line 201, which is a positive current path. The power supply line 201 is an example of a first current path connecting terminal B+ and terminal P+. The power supply line 201 is a power supply path that functions as a charging path through which a charging current of the secondary battery 210 flows and a discharging path through which a discharging current of the secondary battery 210 flows.

[0020] Terminal B- and terminal P- are connected by a ground line 202, which is a negative current path. The ground line 202 is an example of a second current path that connects terminal B- and terminal P-. The ground line 202 is a power supply path that functions as a charge path through which a charging current for the secondary battery 210 flows and a discharge path through which a discharging current for the secondary battery 210 flows.

[0021] The switch circuit 203 is provided on the power supply line 201 between the terminal B+ and the terminal P+. The switch circuit 203 is, for example, a series circuit including a charge control transistor TR1 and a discharge control transistor TR2 connected in series. The charge control transistor TR1 is a semiconductor switching element that cuts off the charge path of the secondary battery 210. The discharge control transistor TR2 is a semiconductor switching element that cuts off the discharge path of the secondary battery 210.

[0022] 1 , the charge control transistor TR1 cuts off the power supply line 201 through which the charging current of the secondary battery 210 flows, and the discharge control transistor TR2 cuts off the power supply line 201 through which the discharging current of the secondary battery 210 flows. The charge control transistor TR1 and the discharge control transistor TR2 are switching elements that switch the power supply line 201 between conducting and cutting off, and are inserted in series in the power supply line 201. The charge control transistor TR1 and the discharge control transistor TR2 are, for example, N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0023] The charge control transistor TR1 has a parasitic diode D1 between its drain and source, whose forward direction is opposite to the direction of the charging current of the secondary battery 210. The charge control transistor TR1 is a switching element inserted in series with the power supply line 201 so that the forward direction of the parasitic diode D1 coincides with the direction of the discharging current of the secondary battery 210.

[0024] The discharge control transistor TR2 has a parasitic diode D2 between its drain and source, whose forward direction is opposite to the direction of the discharge current of the secondary battery 210. The discharge control transistor TR2 is a switching element inserted in series with the power supply line 201 so that the forward direction of the parasitic diode D2 coincides with the direction of the charge current of the secondary battery 210.

[0025] The protection IC 101 is an example of a secondary battery protection integrated circuit used to protect a secondary battery. The protection IC 101 has a control circuit 220 that operates using the secondary battery 210 as a power source. The control circuit 220 controls the charging or discharging of the secondary battery 210. The control circuit 220 includes a protection circuit 221 that includes, for example, a circuit that protects the secondary battery 210 from overcharging or the like by controlling the charging of the secondary battery 210, and a circuit that protects the secondary battery 210 from overdischarging or the like by controlling the discharging of the secondary battery 210.

[0026] The protection IC 101 has a function of protecting the secondary battery 210 from over-discharge and the like by controlling the switch circuit 203. For example, when the protection circuit 221 detects abnormal charging (e.g., overcharging, overcurrent in the charging direction (charging overcurrent)), the protection IC 101 protects the secondary battery 210 from abnormal charging by turning off the charge control transistor TR1. On the other hand, when the protection circuit 221 detects abnormal discharging (e.g., over-discharging, overcurrent in the discharging direction (discharging overcurrent)), the protection IC 101 protects the secondary battery 210 from abnormal discharging by turning off the discharge control transistor TR2.

[0027] The protection IC 101 includes, for example, a charge control terminal (terminal COUT), a discharge control terminal (terminal DOUT), a power supply terminal (terminal VDD), a ground terminal (terminal VSS), a detection terminal (terminal VP), a signal terminal (terminal SD), and a signal terminal (terminal SC). These terminals are, for example, external connection terminals for connecting the internal circuit of the protection IC 101 to the outside of the protection IC 101.

[0028] The terminal COUT is connected to the gate (control electrode) of the charge control transistor TR1 and outputs a signal to turn the charge control transistor TR1 on or off. The terminal DOUT is connected to the gate (control electrode) of the discharge control transistor TR2 and outputs a signal to turn the discharge control transistor TR2 on or off.

[0029] The terminal VDD is a power supply terminal of the protection IC 101, and is connected to the positive electrode 211 of the secondary battery 210 and the power supply line 201 via a resistor element R21. The terminal VSS is a ground terminal of the protection IC 101, and is connected to the negative electrode 212 of the secondary battery 210 and the ground line 202. The capacitor C21 is connected between the terminal VDD and the terminal VSS. The terminal VDD is connected to the power supply line 201 between the switch circuit 203 and the positive electrode 211. In this example, the terminal VDD is connected to the power supply line 201 between the charge control transistor TR1 and the positive electrode 211. The control circuit 220 operates on the power supply voltage Vdd between the terminals VDD and VSS.

[0030] The terminal VP is an example of a monitoring terminal used to monitor the potential of the terminal P+. The terminal VP is used, for example, by the protection circuit 221 in the protection IC 101 to monitor whether the electronic device 300 (load 301 or charger 302) is connected. The terminal VP is connected to the power supply line 201 between the switch circuit 203 and the terminal P+ via a resistive element R23. The terminal VP is electrically connected to the power supply line 201 on the opposite side of the switch circuit 203 from the secondary battery 210.

[0031] The terminal VP may be used to detect an overcharge current or an overdischarge current flowing through the secondary battery 210 .

[0032] The terminals SD and SC are examples of signal terminals for signal input. The terminal SD is a terminal to which a signal Sa transmitted from an external device such as the electronic device 300 is input via the terminal SDA and is electrically connected to the terminal SDA. The terminal SC is a terminal to which a signal Sc transmitted from an external device such as the electronic device 300 is input via the terminal SCL and is electrically connected to the terminal SCL. The terminals SD and SC are, for example, terminals for synchronous serial communication between the electronic device 300 and the protection IC 101.

[0033] FIG. 1 shows an example of a synchronous serial communication terminal, in which terminals SD, SDA and terminals SC, SCL are used. ２ In this case, the terminals SD and SDA are data input / output terminals through which a signal Sa representing communication data is input / output, and the terminals SC and SCL are input with a signal Sc representing a clock for synchronizing the signal Sa.

[0034] The method for transmitting and receiving the signal Sa between the electronic device 300 and the protection IC 101 is not limited to synchronous serial communication, and other communication methods such as asynchronous serial communication may also be used. FIG. 1 shows a communication method using a synchronization signal Sc for transmitting and receiving the signal Sa. However, the signal Sa may be transmitted and received without using the signal Sc. In this case, the number of signal terminals through which the signal Sa passes may be one. The signal Sa may also be a binary signal representing either a first signal Sa1 or a second signal Sa2, which will be described later.

[0035] The control circuit 220 in the protection IC 101 includes a protection circuit 221 , AND circuits 21 and 22 , an inverting circuit 23 , a OR circuit 13 , and a switch 12 .

[0036] The protection circuit 221 controls the charging or discharging of the secondary battery 210 by the switch circuit 203 .

[0037] The protection circuit 221 monitors the power supply voltage Vdd between the terminals VDD and VSS to detect overcharging of the secondary battery 210. The protection circuit 221 includes an overcharge detection circuit that compares the power supply voltage Vdd with an overcharge detection voltage Vdet1, and generates an overcharge detection signal indicating that overcharging of the secondary battery 210 has been detected when the power supply voltage Vdd is higher than the overcharge detection voltage Vdet1.

[0038] If overcharging of the secondary battery 210 is detected continuously for a predetermined detection delay time tVdet1, the protection circuit 221 outputs a charge control signal Q1 (e.g., a low-level signal) that switches the charge control transistor TR1 from on to off. The logical product circuit 21 outputs the logical product of the charge control signal Q1 and the forced-off signal Stc from the terminal COUT. In this case, the charge control transistor TR1 is turned on when the level of the terminal COUT is high, and turned off when the level of the terminal COUT is low.

[0039] The forced-off signal Stc is a logic signal for forcibly turning off the charge control transistor TR1 and the discharge control transistor TR2, and in this example, it goes low when both transistors are forcibly turned off (details will be described later).

[0040] The protection circuit 221 turns off the charge control transistor TR1, thereby prohibiting current flowing in the direction of charging the secondary battery 210 from flowing through the power line 201. This stops charging of the secondary battery 210, allowing the protection IC 101 to protect the secondary battery 210 from overcharging.

[0041] The protection circuit 221 detects recovery from overcharge of the secondary battery 210 by monitoring the power supply voltage Vdd between terminals VDD and VSS. The protection circuit 221 compares the power supply voltage Vdd with a predetermined overcharge recovery voltage Vrel1, and when the power supply voltage Vdd is lower than the overcharge recovery voltage Vrel1, generates an overcharge recovery signal indicating that recovery from overcharge of the secondary battery 210 has been detected. The overcharge recovery voltage Vrel1 is lower than or equal to the overcharge detection voltage Vdet1.

[0042] The protection circuit 221 compares the potential of the terminal VP with a state detection threshold that is lower, higher, or the same as the potential of the terminal VDD, and when the potential of the terminal VP is lower than the state detection threshold, generates a load connection signal that indicates a state in which the load 301 is connected to the terminal P+. This is because when the load 301 is connected to the terminal P+ and the terminal P-, the potential difference between the terminal VDD and the terminal VP increases due to a drop in the potential of the terminal VP.

[0043] When the charge control transistor TR1 is turned off due to the detection of overcharge, the protection IC 101 transitions to a state (overcharge protection state) in which the secondary battery 210 is protected from overcharge by turning off the charge control transistor TR1. If the protection circuit 221 detects recovery from overcharge of the secondary battery 210 continuously for a predetermined recovery delay time tVrel1 in the overcharge protection state, the protection circuit 221 outputs a charge control signal Q1 (a high-level signal in this example) that switches the charge control transistor TR1 from off to on. Alternatively, if the protection circuit 221 detects recovery from overcharge of the secondary battery 210 and detects electrical connection with the load 301 between the terminals P+ and P- continuously for a predetermined recovery delay time tVrel1 in the overcharge protection state, the protection circuit 221 outputs a charge control signal Q1 (a high-level signal in this example) that switches the charge control transistor TR1 from off to on. In either of these cases, if the forced off signal Stc is inactive (high level in this example), the overcharge protection operation by the protection IC 101 is released, and the protection IC 101 returns from the overcharge protection state.

[0044] The protection circuit 221 monitors the power supply voltage Vdd between the terminals VDD and VSS to detect over-discharge of the secondary battery 210. The protection circuit 221 includes an over-discharge detection circuit that compares the power supply voltage Vdd with an over-discharge detection voltage Vdet2, and generates an over-discharge detection signal indicating that over-discharge of the secondary battery 210 has been detected when the power supply voltage Vdd is lower than the over-discharge detection voltage Vdet2.

[0045] When over-discharge of the secondary battery 210 is detected continuously for a predetermined detection delay time tVdet2, the protection circuit 221 outputs a discharge control signal Q2 (e.g., a low-level signal) that switches the discharge control transistor TR2 from on to off. The logical product circuit 22 outputs the logical product of the discharge control signal Q2 and the forced-off signal Stc from the terminal DOUT. In this case, the discharge control transistor TR2 is turned on when the level of the terminal DOUT is high, and turned off when the level of the terminal DOUT is low.

[0046] By turning off the discharge control transistor TR2, the protection circuit 221 prohibits current flowing in a direction that discharges the secondary battery 210 from flowing through the power line 201. This stops the discharge of the secondary battery 210, allowing the protection IC 101 to protect the secondary battery 210 from over-discharge.

[0047] The protection circuit 221 detects recovery from over-discharge of the secondary battery 210 by monitoring the power supply voltage Vdd between terminals VDD and VSS. The protection circuit 221 compares the power supply voltage Vdd with a predetermined over-discharge recovery voltage Vrel2, and when the power supply voltage Vdd is higher than the over-discharge recovery voltage Vrel2, generates an over-discharge recovery signal indicating that recovery from over-discharge of the secondary battery 210 has been detected. The over-discharge recovery voltage Vrel2 is higher than or equal to the over-discharge detection voltage Vdet2.

[0048] The protection circuit 221 compares the potential of the terminal VP with a state detection threshold that is lower, higher, or the same as the potential of the terminal VDD, and when the potential of the terminal VP is higher than the state detection threshold, generates a charger connection signal that indicates a state in which the charger 302 is electrically connected to the terminal P+. This is because when the charger 302 is electrically connected to the terminals P+ and P-, the potential difference between the terminals VDD and VP becomes smaller due to the increase in the potential of the terminal VP.

[0049] When the discharge control transistor TR2 is turned off due to the detection of over-discharge, the protection IC 101 transitions to a state (over-discharge protection state) in which the secondary battery 210 is protected from over-discharge by turning off the discharge control transistor TR2. In the over-discharge protection state, if the protection circuit 221 detects recovery from over-discharge of the secondary battery 210 continuously for a predetermined recovery delay time tVrel2, the protection circuit 221 outputs a discharge control signal Q2 (a high-level signal in this example) that switches the discharge control transistor TR2 from off to on. Alternatively, in the over-discharge protection state, if the protection circuit 221 detects recovery from over-discharge of the secondary battery 210 and detects electrical connection with the charger 302 between the terminals P+ and P- continuously for a predetermined recovery delay time tVrel2, the protection circuit 221 outputs a discharge control signal Q2 (a high-level signal in this example) that switches the discharge control transistor TR2 from off to on. In either of these cases, if the forced off signal Stc is inactive (high level in this example), the over-discharge protection operation by the protection IC 101 is released, and the protection IC 101 returns from the over-discharge protection state.

[0050] The switch 12 switches whether to cut off the power supply to a specific circuit 221A (a circuit to be cut off from the power supply) in the protection circuit 221, in response to the cutoff signal St generated by the OR circuit 13. The switch 12 may be arranged so as to be able to cut off the power supply path between the circuit to be cut off from the power supply and the terminal VSS, or may be arranged so as to be able to cut off the power supply path between the circuit to be cut off from the power supply and the terminal VDD.

[0051] The OR circuit 13 outputs a shutdown signal St, which is the logical sum of the standby signal Stb generated by the protection circuit 221 and the instruction signal Sta generated by the identification circuit 230. The switch 12 is turned on when the shutdown signal St is inactive (low level in this example), and is turned off when the shutdown signal St is active (high level in this example).

[0052] A specific circuit 221A in the protection circuit 221 is supplied with power supply voltage when the switch 12 is turned on, and therefore becomes operable. On the other hand, a specific circuit 221A in the protection circuit 221 is inoperable when the switch 12 is turned off, and therefore the supply of power supply voltage is cut off.

[0053] For example, when the potential of the terminal VP falls below the standby threshold Vstb in the over-discharge protection state, the protection circuit 221 activates the standby signal Stb (high level in this example). The standby threshold Vstb is a threshold higher than the potential of the terminal VSS. When the standby signal Stb becomes active, the switch 12 is turned off, and the protection IC 101 transitions from the over-discharge protection state to the standby state.

[0054] The standby state is a state in which the secondary battery 210 is protected from over-discharge by turning off the discharge control transistor TR2, and the power consumption of the protection IC 101 is reduced by turning off the switch 12. The standby state is an example of a reduced power consumption state.

[0055] In this way, in the over-discharge protection state, the protection circuit 221 may cut off the power supply to some specific circuits 221A within the protection circuit 221 by turning off the switch 12 using the standby signal Stb. Examples of the some specific circuits 221A include an over-charge detection circuit that detects over-charge, a charging over-current detection circuit that detects over-current, an over-discharge detection circuit that detects over-discharge, and a discharging over-current detection circuit that detects over-current. The protection circuit 221 cuts off the power supply to internal circuits that do not need to operate in the over-discharge protection state, thereby reducing the power consumption of the protection IC 101 itself.

[0056] The protection IC 101 includes an identification circuit 230 that identifies the signal Sa. The identification circuit 230 operates on a power supply voltage applied between a terminal VP and a terminal VSS. The identification circuit 230 includes, for example, a communication circuit 31, an authentication circuit 34, a nonvolatile memory 32, and a conversion circuit 33.

[0057] The communication circuit 31 transmits and receives a signal Sa between the electronic device 300 and the protection IC 101 via the terminals SD and SDA. ２ It is a communication circuit for C.

[0058] When electronic device 300 is electrically connected to battery pack 401, authentication circuit 34 executes authentication processing to determine whether electronic device 300 is an authorized electronic device based on information received via terminal SDA. Authentication circuit 34 determines, for example, whether an authentication key stored in itself matches an authentication key included in signal Sa received from electronic device 300 via terminal SDA. The authentication key included in signal Sa received via terminal SDA is an example of information received via terminal SDA.

[0059] If the authentication keys match, the authentication circuit 34 determines that the authentication is successful and that the electronic device 300 is a genuine product. On the other hand, if the authentication keys do not match, the authentication circuit 34 determines that the authentication is unsuccessful and that the electronic device 300 is a non-genuine product.

[0060] If authentication is successful based on the information received via the terminal SDA, the authentication circuit 34 permits writing of data to the nonvolatile memory 32. An example of the nonvolatile memory 32 is an EEPROM (Electrically Erasable Programmable Read Only Memory).

[0061] If authentication is successful and the signal Sa received via the terminal SDA includes a predetermined first signal Sa1, the authentication circuit 34 performs a first storage operation to store first data D1 corresponding to the first signal Sa1 in the nonvolatile memory 32. For example, the first signal Sa1 is a lock signal for locking the use of the battery pack 401, and the first data D1 is lock data for locking the use of the battery pack 401. The first data D1 may be a specific code corresponding to the first signal Sa1 or specific bit information corresponding to the first signal Sa1. The first data D1 is stored in a specific area of ​​the nonvolatile memory 32.

[0062] The conversion circuit 33 converts the first data D1 stored in the nonvolatile memory 32 into an instruction signal Sta that reduces power consumption. For example, the conversion circuit 33 activates the instruction signal Sta (high level in this example) when the first data D1 is stored in the nonvolatile memory 32. The instruction signal Sta is an example of a first instruction that reduces power consumption. Here, the circuit may be designed based on negative logic that is active when the instruction signal Sta is low level.

[0063] The control circuit 220 has an inversion circuit 23 to which an instruction signal Sta is input. The inversion circuit 23 generates a forced-off signal Stc by inverting the logic of the instruction signal Sta. When the active instruction signal Sta is input to the inversion circuit 23, the logical product circuits 21 and 22 forcibly set the levels of the terminals COUT and DOUT to inactive (low level in this example). As a result, the charge control transistor TR1 and the discharge control transistor TR2 are forcibly turned off, and charging and discharging of the secondary battery 210 are forcibly prohibited (charge and discharge prohibited state).

[0064] The control circuit 220 may forcibly turn off only one of the charge control transistor TR1 and the discharge control transistor TR2 by inputting an active instruction signal Sta, thereby forcibly prohibiting charging or discharging of the secondary battery 210.

[0065] The control circuit 220 has a logical sum circuit 13 to which the instruction signal Sta is input. When the logical sum circuit 13 receives the active instruction signal Sta, it activates the shutdown signal St (high level in this example) regardless of the logic of the standby signal Stb. This turns off the switch 12, causing the protection IC 101 to transition to a standby state in which power consumption is reduced.

[0066] To return the protection IC 101 from the charge / discharge inhibited state and the standby state, a signal Sa including a predetermined second signal Sa2 is input from the terminal SDA.

[0067] If authentication is successful and the signal Sa received via the terminal SDA includes a predetermined second signal Sa2, the authentication circuit 34 performs a second storage operation to store second data D2 corresponding to the second signal Sa2 in the nonvolatile memory 32. For example, the second signal Sa2 is an unlock signal for unlocking the use of the battery pack 401, and the second data D2 is unlock data for unlocking the use of the battery pack 401. The second data D2 may be a specific code corresponding to the second signal Sa2 or specific bit information corresponding to the second signal Sa2. The second data D2 is stored in a specific area of ​​the nonvolatile memory 32.

[0068] The conversion circuit 33 converts the second data D2 stored in the nonvolatile memory 32 into a signal that cancels the instruction signal Sta that reduces power consumption. For example, when the second data D2 is stored in the nonvolatile memory 32, the conversion circuit 33 makes the instruction signal Sta inactive (to a low level in this example).

[0069] The OR circuit 13 deactivates the shutdown signal St (low level in this example) in response to the input of the inactive standby signal Stb and the instruction signal Sta, turning on the switch 12, enabling the protection circuit 221 to operate normally, and canceling the low power consumption state of the protection IC 101.

[0070] Meanwhile, when the inactive instruction signal Sta is input to the inversion circuit 23, the logical product circuits 21 and 22 make the forced off signal Stc inactive (high level in this example), thereby canceling the forced charge / discharge inhibition state. In this case, the charge control transistor TR1 is controlled in accordance with the charge control signal Q1 generated by the protection circuit 221, and the discharge control transistor TR2 is controlled in accordance with the discharge control signal Q2 generated by the protection circuit 221. This puts the secondary battery 210 into a state in which it can be charged and discharged.

[0071] In this way, when the battery pack 401 according to the first embodiment receives the first signal Sa1 from the terminal SDA, it performs a first storage operation of storing the first data D1 corresponding to the first signal Sa1 in the nonvolatile memory 32. After receiving the first signal Sa1, the battery pack 401 maintains the reduced power consumption state by storing the first data D1 until it receives the second signal Sa2 from the terminal SDA. As a result, even if the user performs an inappropriate operation, such as connecting an unauthorized charger to the battery device, as long as the first data D1 is stored in the nonvolatile memory 32, the reduced power consumption state is maintained until the condition for receiving the second signal Sa2 is met.

[0072] When the battery pack 401 according to the first embodiment receives the second signal Sa2 from the terminal SDA, it performs a second storage operation to store the second data D2 corresponding to the second signal Sa2 in the nonvolatile memory 32, and cancels the reduced power consumption state by storing the second data D2. As a result, even if the user performs an inappropriate operation such as connecting an unauthorized charger to the battery device, the reduced power consumption state is not canceled unless the second data D2 is stored in the nonvolatile memory 32.

[0073] The battery pack 401 according to the first embodiment also includes a control circuit 220 that has a function of limiting the current flowing through the secondary battery 210 when the secondary battery 210 is overcharged or overdischarged. The control circuit 220 includes AND circuits 21 and 22 and an inversion circuit 23, and therefore follows the instruction signal Sta regardless of the state of the secondary battery 210 controlled by the protection circuit 221. This allows the instruction signal Sta to take priority over the charge control signal Q1 and discharge control signal Q2 generated by the protection circuit 221.

[0074] Furthermore, in the battery pack 401 according to the first embodiment, when the control circuit 220 receives an active instruction signal Sta, it forcibly turns off the charge control transistor TR1 or the discharge control transistor TR2. Forcing the discharge control transistor TR2 off limits the discharge of the secondary battery 210 even when the battery pack 401 is removed from the electronic device 300, thereby extending the shelf life of the battery pack 401. On the other hand, forcing the charge control transistor TR1 off limits the charging of the secondary battery 210 even if a user attempts to forcibly charge the battery pack 401 with an unauthorized charger, thereby ensuring safety.

[0075] The authentication circuit 34 may perform a third storage operation of storing information about the remaining capacity of the secondary battery 210 (remaining capacity information) in the non-volatile memory 32. In a configuration in which the remaining capacity calculation function for the secondary battery 210 is provided in the electronic device 300 rather than in the battery pack 401, it is conceivable that when the battery pack 401 becomes removable from the electronic device 300, it will be necessary to record the remaining capacity information for the secondary battery 210 in the battery pack 401. When the battery pack 401 is removed from the electronic device 300, the remaining capacity of the secondary battery 210 remains almost unchanged by setting the battery pack 401 to the charging / discharging prohibited state as described above. Therefore, when the battery pack 401 is subsequently attached to the electronic device 300, the remaining capacity calculation function provided in the electronic device 300 has the advantage of being able to continue to use the remaining capacity information stored in the non-volatile memory 32 of the battery pack 401.

[0076] Fig. 2 is a flowchart showing a first example of a control method when the battery pack according to the first embodiment is locked. Fig. 3 is a flowchart showing a first example of a control method when the battery pack according to the first embodiment is unlocked. Next, the control methods shown in Figs. 2 and 3 will be described.

[0077] The control method shown in FIG. 2 is used, for example, when locking the battery pack 401 before shipping. The process starts with the battery pack 401 in a normal state where it can be charged and discharged (step S11). The state in step S11 is, for example, the state after a test to determine whether the battery pack 401 can be properly charged and discharged before shipping. The authentication circuit 34 performs authentication based on information received via the terminal SDA (step S13). If authentication is not successful, the authentication circuit 34 transmits a predetermined error signal E17 from the terminal SDA to the electronic device 300 (steps S15 and S17). Upon receiving the error signal E17, the electronic device 300 recognizes that authentication has not been successful. When the electronic device 300 receives the error signal E17, it may retransmit authentication information, such as an authentication key, to the battery pack 401 via the terminal SDA.

[0078] If authentication is successful, the authentication circuit 34 permits writing of data to the nonvolatile memory 32 (steps S15 and S19). The authentication circuit 34 performs a first storage operation to store first data D1 corresponding to the first signal Sa1 input from the electronic device 300 via the terminal SDA in the nonvolatile memory 32 (step S21).

[0079] The conversion circuit 33 determines whether the first data D1 stored in the non-volatile memory 32 matches the predetermined unique data (step S23). If the first data D1 does not match the predetermined unique data, the conversion circuit 33 cannot generate the instruction signal Sta from the first data D1, and therefore transmits a predetermined error signal E25 from the terminal SDA to the electronic device 300 (step S25). Upon receiving the error signal E25, the electronic device 300 recognizes that the writing of the first data D1 has failed. Upon receiving the error signal E25, the electronic device 300 may retransmit the first signal Sa1 to the battery pack 401 via the terminal SDA.

[0080] If the first data D1 matches the predetermined unique data, the conversion circuit 33 converts the first data D1 into an instruction signal Sta and performs the operation of step S27. By activating the instruction signal Sta, the conversion circuit 33 performs at least one of the following operations: transitioning the secondary battery 210 to a charge / discharge prohibited state or transitioning the protection IC 101 to a reduced power consumption state (step S27). When the instruction signal Sta becomes active, the forced off signal Stc becomes active, and the control circuit 220 transitions the secondary battery 210 to a charge / discharge prohibited state. When the instruction signal Sta becomes active, the shutoff signal St becomes active, and the control circuit 220 transitions the protection IC to a reduced power consumption state.

[0081] On the other hand, the control method shown in FIG. 3 is used, for example, when unlocking a locked battery pack 401 when it is connected to the electronic device 300. As a result of the generation of the instruction signal Sta, the battery pack 401 starts from at least one of a charging / discharging inhibited state of the secondary battery 210 and a standby state of the protection IC 101 (step S31). The authentication circuit 34 performs authentication based on information received via the terminal SDA (step S33). If authentication is not successful, the authentication circuit 34 transmits a predetermined error signal E37 from the terminal SDA to the electronic device 300 (steps S35 and S37). Upon receiving the error signal E37, the electronic device 300 recognizes that authentication has not been successful. When the electronic device 300 receives the error signal E37, it may retransmit authentication information, such as an authentication key, to the battery pack 401 via the terminal SDA.

[0082] If authentication is successful, the authentication circuit 34 permits writing of data to the nonvolatile memory 32 (steps S35 and S39). The authentication circuit 34 performs a second storage operation to store second data D2 corresponding to the second signal Sa2 input from the electronic device 300 via the terminal SDA in the nonvolatile memory 32 (step S41).

[0083] The conversion circuit 33 determines whether the second data D2 stored in the non-volatile memory 32 matches the predetermined unique data (step S43). If the second data D2 does not match the predetermined unique data, the conversion circuit 33 cannot cancel the instruction signal Sta and therefore transmits a predetermined error signal E45 from the terminal SDA to the electronic device 300 (step S45). Upon receiving the error signal E45, the electronic device 300 recognizes that the writing of the second data D2 was not successful. Upon receiving the error signal E45, the electronic device 300 may retransmit the second signal Sa2 to the battery pack 401 via the terminal SDA. If the second data D2 does not match the predetermined unique data, the instruction signal Sta is not canceled and the charging / discharging inhibited state is maintained.

[0084] If the second data D2 matches the predetermined unique data, the conversion circuit 33 converts the second data D2 into an instruction signal Sta and performs the operation of step S47. By deactivating the instruction signal Sta, the conversion circuit 33 performs at least one of the following operations: transitioning the secondary battery 210 to a chargeable / dischargeable state or releasing the protection IC 101 from the reduced power consumption state (step S47). When the instruction signal Sta becomes inactive, the forced-off signal Stc becomes inactive, and the control circuit 220 transitions the secondary battery 210 to a chargeable / dischargeable state. When the instruction signal Sta becomes inactive, the shut-off signal St becomes inactive, and the control circuit 220 releases the protection IC from the reduced power consumption state.

[0085] FIG. 4 is a flowchart showing a second example of a control method for locking a battery pack according to the first embodiment. FIG. 5 is a flowchart showing a second example of a control method for unlocking a battery pack according to the first embodiment. The control methods shown in FIGS. 4 and 5 differ from the control methods shown in FIGS. 2 and 3 in that they do not use the authentication function of the authentication circuit 34. In the control methods shown in FIGS. 2 and 4, the conversion circuit 33 determines whether the first data D1 stored in the nonvolatile memory 32 matches predetermined unique data (step S23), thereby ensuring the authentication function. Similarly, in the control methods shown in FIGS. 3 and 5, the conversion circuit 33 determines whether the second data D2 stored in the nonvolatile memory 32 matches predetermined unique data (step S43), thereby ensuring the authentication function. In other words, if the dual authentication function provided by the authentication circuit 34 and the conversion circuit 33 is not required, the battery pack 401 can be made smaller by not including the authentication circuit 34.

[0086] Figure 4 differs from Figure 2 in that it does not include steps S13, S15, S17, and S19 of Figure 2. Figure 5 differs from Figure 3 in that it does not include steps S33, S35, S37, and S39 of Figure 3. Therefore, the explanation of the control methods shown in Figures 4 and 5 will be omitted by referencing the above explanation of Figures 2 and 3.

[0087] FIG. 6 is a circuit block diagram showing an example of a system including a battery pack according to a first modification of the first embodiment. As shown in FIG. 6, the identification circuit may be configured as an IC separate from the protection IC. The battery pack 401A shown in FIG. 6 includes a protection IC 101A and an identification IC 231. Here, the instruction signal Sta is transmitted from a terminal SF of the identification IC 231 to a terminal SE of the protection IC 101A. The protection IC 101A has the same function as the control circuit 220 described above. The identification IC 231 has the same function as the identification circuit 230 described above.

[0088] 7 is a circuit block diagram showing an example of a system including a battery pack according to the second embodiment. In the second embodiment, the same configuration, operation, and effects as those of the first embodiment will not be described by citing the above description. The second embodiment differs from the first embodiment in that a switch circuit 203 is provided on the low-side ground line 202.

[0089] The system 502 shown in FIG. 7 includes a battery pack 402 and an electronic device 300. The battery pack 402 includes a secondary battery 210 and a battery protection device 602. The battery protection device 602 is, for example, a component including a substrate on which at least a protection IC 102 is mounted. The protection IC 102 is an example of a secondary battery protection integrated circuit used to protect a secondary battery. The protection IC 102 includes, for example, a charge control terminal (terminal COUT), a discharge control terminal (terminal DOUT), a power supply terminal (terminal VDD), a ground terminal (terminal VSS), a monitoring terminal (terminal VM), a signal terminal (terminal SD), and a signal terminal (terminal SC). The terminal VM has the same function as the terminal VP in the first embodiment. The protection IC 102 includes a control circuit 220 and an identification circuit 230.

[0090] The protection circuit 221 compares the potential of the terminal VM with a state detection threshold that is higher, lower, or the same as the potential of the terminal VSS, and when the potential of the terminal VM is higher than the state detection threshold, generates a load connection signal that indicates a state in which a load such as the electronic device 300 is connected to the terminal P−. This is because when a load such as the electronic device 300 is connected to the terminals P+ and P−, the potential of the terminal VM rises, increasing the potential difference between the terminals VSS and VM.

[0091] The protection circuit 221 compares the potential of the terminal VM with a state detection threshold that is higher, lower, or the same as the potential of the terminal VSS, and when the potential of the terminal VM is lower than the state detection threshold, generates a charger connection signal that indicates a state in which the charger 302 is electrically connected to the terminal P-. This is because when the charger 302 is electrically connected to the terminals P+ and P-, the potential of the terminal VM drops, reducing the potential difference between the terminals VSS and VM, or the potential of the terminal VM becomes lower than the potential of the terminal VSS.

[0092] The battery pack 402 according to the second embodiment has the same functions as the battery pack 401 according to the first embodiment, and therefore has the same effects as the first embodiment, such as maintaining the reduced power consumption state until the condition for receiving the second signal Sa2 is met.

[0093] FIG. 8 is a circuit block diagram showing an example of a system including a battery pack according to a first modification of the second embodiment. As shown in FIG. 8, the identification circuit may be configured as an IC separate from the protection IC. The battery pack 402A shown in FIG. 8 includes a protection IC 102A and an identification IC 231. Here, the instruction signal Sta is transmitted from a terminal SF of the identification IC 231 to a terminal SE of the protection IC 102A. The protection IC 102A has the same function as the control circuit 220 described above. The identification IC 231 has the same function as the identification circuit 230 described above.

[0094] Although the embodiments have been described above, they are presented as examples and the present invention is not limited to the above embodiments. The above embodiments can be implemented in various other forms, and various combinations, omissions, substitutions, modifications, etc. can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as set forth in the claims.

[0095] For example, the positions of the charge control transistor TR1 and the discharge control transistor TR2 may be interchanged with each other relative to the positions shown in the figure. The switch circuit 203 may be built into a protection IC. The secondary battery 210 is not limited to a single battery, but may be composed of multiple batteries connected in series.

[0096] This international application claims priority based on Japanese Patent Application No. 2024-024844, filed on February 21, 2024, the entire contents of which are incorporated herein by reference.

[0097] 12 Switch 13 Logical OR circuit 21, 22 Logical AND circuit 23 Inverting circuit 31 Communication circuit 32 Nonvolatile memory 33 Conversion circuit 34 Authentication circuit 101, 101A, 102, 102A Protection IC 201 Power supply line 202 Ground line 203 Switch circuit 210 Secondary battery 211 Positive electrode 212 Negative electrode 220 Control circuit 221 Protection circuit 230 Identification circuit 231 Identification IC 300 Electronic device 301 Load 302 Charger 401, 402 Battery pack 501, 502 System 601, 602 Battery protection device TR1 Charging control transistor TR2 Discharging control transistor

Claims

1. A battery pack comprising: a secondary battery; a first positive terminal for connecting a load; a first negative terminal for connecting a load; at least one signal terminal for inputting a signal; and a non-volatile memory, wherein, upon receiving a first signal from the signal terminal, a first storage operation is performed to store first data corresponding to the first signal in the non-volatile memory, and after receiving the first signal, the battery pack continues in a reduced power consumption state until a second signal is received from the signal terminal.

2. The battery pack according to claim 1, wherein, when the second signal is received from the signal terminal, a second storage operation is performed to store second data corresponding to the second signal in the non-volatile memory, and the reduced power consumption state is cancelled.

3. The battery pack according to claim 1, further comprising a conversion circuit, wherein said conversion circuit converts said first data stored in said nonvolatile memory into a first instruction for reducing power consumption.

4. The battery pack according to claim 3, wherein the conversion circuit cancels the first instruction when it receives the second signal from the signal terminal.

5. The battery pack according to claim 4, wherein the conversion circuit, upon receiving the second signal from the signal terminal, cancels the first instruction and places the secondary battery in a state in which it can be charged or discharged.

6. The battery pack according to claim 4, wherein the conversion circuit transmits a first error signal from the signal terminal if the first instruction cannot be generated, and transmits a second error signal from the signal terminal and inhibits charging and discharging of the secondary battery if the first instruction cannot be canceled.

7. A battery pack as described in claim 1, further comprising an authentication circuit, which performs authentication based on information received via said signal terminal, and if said authentication is successful, performs said first storage operation, and if said authentication is not successful, transmits a third error signal from said signal terminal.

8. The battery pack according to claim 2, further comprising an authentication circuit, which performs authentication based on information received via the signal terminal, and if the authentication is successful, performs the second storage operation, and if the authentication is not successful, transmits a fourth error signal from the signal terminal and prohibits charging and discharging of the secondary battery.

9. A battery pack according to claim 3, which has a function to limit the current flowing through the secondary battery when the secondary battery is overcharged or overdischarged, and which follows the first instruction regardless of the state of the secondary battery.

10. The battery pack according to claim 3, further comprising: a control circuit that controls charging or discharging of the secondary battery; and a switch that cuts off the current path between the positive electrode of the secondary battery and the first positive terminal or the current path between the negative electrode of the secondary battery and the first negative terminal, wherein the control circuit turns off the switch when the first instruction is input.

11. The battery pack according to claim 1, further comprising a third storing operation for storing remaining capacity information of the secondary battery in the nonvolatile memory.

12. A battery pack as described in any one of claims 1 to 11, comprising an identification IC and a secondary battery protection IC, wherein the identification IC, upon receiving the first signal from the signal terminal, performs the first storage operation of storing the first data in the non-volatile memory, and the secondary battery protection IC continues the reduced power consumption state after receiving the first signal until it receives the second signal from the signal terminal.

13. The battery pack according to claim 12, wherein the secondary battery protection IC includes a control circuit that controls charging or discharging of the secondary battery, and after receiving the first signal, cuts off the power supply to the control circuit until receiving the second signal from the signal terminal.

14. A method for controlling a battery pack comprising a secondary battery, a first positive terminal for connecting a load, a first negative terminal for connecting a load, at least one signal terminal for signal input, and a non-volatile memory, wherein a first storage operation is performed to store first data corresponding to the first signal in the non-volatile memory by inputting a first signal from the signal terminal, and the reduced power consumption state is maintained after the input of the first signal until a second signal is input from the signal terminal.

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