Code generation device, code generation system, and code generation method

Abstract

A code generation device (1) comprises: a model analysis unit (121) for receiving an input of a control model (20) in which control logic for an object is defined and analyzing the control blocks of the control model (20); a code generation unit (123) for generating at least two different pieces of code for operating the control blocks analyzed by the model analysis unit (121) in the object; and a code output unit (129) for outputting the generated code. A model extraction unit (122) of the code generation device (1) extracts, from the group of control blocks that are analyzed by the model analysis unit (121), a group of control blocks that are linked together at or above a given degree of linkage, and a code generation unit (123) generates code for operating only the group of control blocks that is extracted by the model extraction unit (122).

Description

Code generation device, code generation system, and code generation method

[0001] The present invention relates to a code generation device, a code generation system, and a code generation method.

[0002] Program developers write source code in accordance with the grammar of a programming language such as C. Because of the cost involved in learning a programming language, systems that assist with writing source code have been proposed. For example, Patent Document 1 discloses a table recognition system that "analyzes a document data file describing a table to be recognized, the table being composed of a table body describing various information and a title description table describing title information that defines the description content and format for searching the table body, and for each piece of title information, semantic generation rules that identify semantic information corresponding to the matrix structure of the table body are stored, the table being composed of one title description table and at least one table body describing various information corresponding to the title information in the title description table, recognizes the matrix structure, distinguishes between the title description table and the table body, invokes the semantic generation rules based on the title information in the title description table, extracts semantic information from the table body of the table to be recognized based on the semantic generation rules, and recognizes the meaning of the table body."

[0003] Japanese Patent Application Laid-Open No. 2001-195243

[0004] However, while Patent Document 1 supports source code written in C or other languages ​​that can be embedded in general-purpose applications, it does not address custom code for specific hardware. To maximize the use of microcontroller-specific functions, such as shortening software processing time during implementation, developers must manually write custom code in assembly language or other languages. This increases development costs.

[0005] In view of the above-mentioned problems, the present invention aims to support the creation of code that can be expected to improve control performance for specific hardware while reducing development costs.

[0006] In order to solve the above problems, the code generation device of the present invention has the following features. The present invention is characterized by having a model analysis unit that receives an input of a control model that defines the control logic of an object and analyzes each control block that constitutes the control model, a code generation unit that generates at least two different codes for operating the control blocks analyzed by the model analysis unit on the object, and an output unit that outputs the at least two different codes generated by the code generation unit. Other means will be described later.

[0007] According to the present invention, it is possible to support the creation of code that can be expected to improve control performance for specific hardware while reducing development costs.

[0008] 1 is a configuration diagram showing an overview of a code generation device according to a first embodiment. FIG. 1 is a hardware configuration diagram of a code generation device according to a first embodiment. FIG. 2 is a configuration diagram showing a processing unit configured by a program executed by a CPU according to the first embodiment. FIG. 3 is a detailed configuration diagram of a custom code generation unit according to the first embodiment. FIG. 4 is an overall view of a control model according to the first embodiment. FIG. 5 is an enlarged view showing a part of the control model of FIG. 5 according to the first embodiment. FIG. 5 is an explanatory diagram showing model type information resulting from an analysis of the control models of FIGS. 5 and 6 by a model analysis unit according to the first embodiment. FIG. 6 is an explanatory diagram showing control block path information resulting from an analysis of the control models of FIGS. 5 and 6 by a model analysis unit according to the first embodiment. FIG. 7 is an explanatory diagram showing connection state information resulting from an analysis of the control models of FIGS. 5 and 6 by a model analysis unit according to the first embodiment. FIG. 8 is an explanatory diagram showing extracted connection state information extracted from connection state information by a high frequency model extraction unit according to the first embodiment. FIG. 9 is a configuration diagram showing a modified example of the custom code generation unit of FIG. 4 according to the first embodiment. FIG. 11 is a configuration diagram showing a modified example of the custom code generation unit 12 of FIG. 11 according to a second embodiment. FIG. 12 is a diagram showing a modified example of the code generation device 1 of FIG. 1 according to a third embodiment. FIG. 13 is a diagram showing a modified example of the code generation device 1 of FIG. 13 according to a fourth embodiment. FIG. 1 is a configuration diagram of a code generation system 100 according to an embodiment of the present invention.

[0009] An embodiment of the present invention will be described below.

[0010] FIG. 1 is a block diagram showing an overview of a code generation device 1. The code generation device 1 executes the following steps (code generation method): (Step 1) A control model 20 including one or more control blocks is received as input. The control block is a data model that implements control logic such as a control algorithm. (Step 2) A custom code generation unit 12 analyzes the control model 20 and extracts each control block included in the control model 20. (Step 3) The custom code generation unit 12 generates custom code 22 corresponding to the control block extracted from the control model 20. By running the custom code 22 on a target 29 (specific hardware) such as a specified microcontroller, the control performance of the target 29 can be expected to be improved. (Step 4) A C language code generation unit 11 generates C language code 21 including all of the control blocks of the control model 20. This C language code 21 is code that runs all of the control blocks analyzed from the control model 20 on the target 29.

[0011] For this reason, the code generation device 1 includes a C language code generation unit 11 and a custom code generation unit 12 as code generation units that generate at least two different codes. The code generation device 1 receives a control model 20 as input and outputs a C language code 21 and a custom code 22. The custom code 22 may be, for example, an assembly language code or a hardware description language code.

[0012] 2 is a hardware configuration diagram of the code generation device 1. The code generation device 1 is composed of an output device 91, a CPU 92, an input device 93, a storage device 94, a RAM 95, and a ROM 96. The code generation device 1 may also include a display 97. The output device 91 outputs output information from the CPU 92 to the display 97. The display 97 displays the output information as an image to a user such as a developer. When the code generation device 1 is powered on and started up, the CPU 92 reads and executes a predetermined boot program from the ROM 96, and reads and executes an operating system (hereinafter referred to as OS) and other programs defined in the boot program from the storage device 94, thereby performing startup processing.

[0013] After the startup process, until the power is cut off, the CPU 92 executes various programs recorded in the storage device 94 as processes on the OS based on signals from the input device 93, schedules determined by the OS, etc. Furthermore, in the processes of the startup process, the CPU 92 accepts signal input from the input device 93 as necessary, outputs output information to the output device 91, and controls the reading and writing of data from and to the RAM 95 and storage device 94.

[0014] The input device 93 is composed of a keyboard, mouse, voice input, etc., and outputs signals corresponding to user operations to the CPU 92. The storage device 94 is a readable / writable non-volatile memory that stores the various programs, as well as models and a control software development environment (described later). The RAM 95 is a readable / writable volatile memory, and the ROM 96 is a read-only non-volatile memory. The RAM 95 is used as a storage area for temporarily storing programs and calculation results when the CPU 92 executes programs stored in the ROM 96 and storage device 94, and as a storage area for temporarily storing working data. The ROM 96 pre-stores programs and the like that are read and executed by the CPU 92.

[0015] 3 is a configuration diagram showing processing units configured by programs executed by the CPU 92. By executing the program 92B, the CPU 92 forms processing units such as the model creation unit 13 and model operation unit 14 in addition to the C language code generation unit 11 and custom code generation unit 12 shown in FIG. 1. These processing units execute processing by referencing the library model 92A. Note that hereinafter, the operation of the CPU 92 as a result of executing a program will be described as the operation of the executed program itself.

[0016] The model creation unit 13 reads out programs stored in the storage device 94, allowing the user to create models. The control model 20 is composed of control blocks that represent the output of signals based on predetermined rules, and connections that represent the connections between the input and output signals between these control blocks. The control model 20 is created from control blocks that are pre-installed in the model creation unit 13 and models stored in a library model 92A, which will be described later. These control models 20 are then stored in the storage device 94. The model creation unit 13 may, for example, be a program called Simulink or TargetLink (registered trademark) that runs on MATLAB.

[0017] The model operation unit 14 is a program that operates the created control model 20. The model operation unit 14 may be, for example, a program called Simulink or TargetLink that runs on MATLAB. The library model 92A is a collection of models that are configured in advance to correspond to the model operation unit 14. The control model 20 is created by combining control blocks and the library model 92A.

[0018] The C language code generator 11 reads the program stored in the storage device 94 and generates C language code 21 that realizes the operation of all control blocks included in the control model 20 created by the user. The custom code generator 12 reads the program stored in the storage device 94 and generates custom code 22 that realizes the operation of at least some of the control blocks included in the control model 20 created by the user.

[0019] 4 is a detailed configuration diagram of the custom code generation unit 12. The custom code generation unit 12 includes a model analysis unit 121, a model extraction unit 122, a code generation unit 123, custom code information 124, and a code output unit 129. The model analysis unit 121 receives a control model 20 that defines the control logic of an object 29, and analyzes each control block that constitutes the control model 20. The model extraction unit 122 extracts control blocks to be included in code generated by the code generation unit 123 from the group of control blocks analyzed by the model analysis unit 121. As an example of the model extraction unit 122, a high-frequency model extraction unit 122A extracts frequently used control blocks based on the analysis results of the model analysis unit 121.

[0020] Furthermore, the model extraction unit 122 may extract at least one of the following control block groups, for example: - Extract control block groups that are connected at a given connectivity level or higher from the control block groups analyzed by the model analysis unit 121. - Extract control block groups that represent predetermined repetitive processes from the control block groups analyzed by the model analysis unit 121. - Extract control block groups that include calculation content from the control block groups analyzed by the model analysis unit 121.

[0021] The code generation unit 123 then compares the control blocks extracted by the high-frequency model extraction unit 122A with the custom code information 124 to generate custom code 22 that can be used in the object 29. That is, the code generation unit 123 generates custom code 22 that operates only the control blocks extracted by the model extraction unit 122 for one of at least two different codes. The code output unit 129 then outputs the code generated by the code generation unit 123. Here, the custom code information 124 is information including operations (such as addition and multiplication) and branching in the object 29, and is information that defines the custom code 22 in an assembly language or a hardware description language. The code generation unit 123 references the custom code information 124 to obtain custom code 22 that implements operations and branching corresponding to the extracted connection state information 65 ( FIG. 10 ).

[0022] The processing details of the custom code generation unit 12 will be described below with reference to the specific examples in Figures 5 to 10. Note that the specific examples in Figures 5 to 10 are also diagrams for explanation, but may also be output information for the display screen that the output device 91 displays on the display 97. Figure 5 is an overall view of a control model 50, which is an example of the control model 20. The control model 50 includes a "Subsystem" 51, a "Subsystem1" 52, and a "Subsystem2" 53 as control blocks. Note that the numbers "1" and "2" in "Subsystem" 51 are terminal numbers, with the left side of the drawing indicating an input terminal and the right side indicating an output terminal.

[0023] 6 is an enlarged view showing a portion of the control model 50 in FIG. 5. "Subsystem" 51 includes a control block for "Filter" 51A. "Subsystem1" 52 has the same content as "Subsystem" 51. "Filter" 51A includes control blocks such as "Product" and "Unit Delay." "Subsystem2" 53 includes control blocks such as "Product" and "Product1."

[0024] FIG. 7 is an explanatory diagram showing model type information 61, which is the result of the model analysis unit 121 analyzing the control model 20 of FIGS. 5 and 6. The model type information 61 is the result of extracting the number of blocks used for each type of control block used in the control model 20. In addition, some control blocks ("Filter" and "SubSystem" in FIG. 7) are associated with control block description information ("M" and "B" in the illustration). - Description information "M" indicates that the control block, such as "Filter," is a block that summarizes calculations rather than the calculation content itself. - Description information "B" indicates that the control block, such as "SubSystem" at the first level (top level), is a block that does not involve calculation content.

[0025] 8 is an explanatory diagram showing control block path information 62, which is the result of the model analysis unit 121 analyzing the control model 20 of FIGS. 5 and 6. The control block path information 62 is composed of a list of control block paths indicating the hierarchy of the control blocks arranged in the control model 20. For example, "SampleModel / In1" on the first line and "SampleModel / Subsystem / In1" on the 14th line are extracted by utilizing the find_system function currently available to users in the MATLAB / Simulink environment.

[0026] 9 is an explanatory diagram showing connection state information 63, which is the result of the model analysis unit 121 analyzing the control model 20 of FIGS. 5 and 6. The connection state information 63 is an analysis result that schematically represents the connection state (relationships between connection destinations) of each control block, library model, etc. As shown in the connection state information 63, the model analysis unit 121 detects control blocks connected to the output side of Inport control blocks, which are the inputs of signals at each layer, and then sequentially detects control blocks connected to the output side of the detected control blocks.

[0027] The high-frequency model extraction unit 122A then grasps the operation content from the relationship between the operation role and the connection destination of the control block detected as the connection state information 63. The high-frequency model extraction unit 122A also extracts frequently used control blocks by extracting control blocks with the same pattern of operation content from the connection state information 63. In other words, the high-frequency model extraction unit 122A extracts which control blocks are frequently used from the model type information 61 analyzed by the model analysis unit 121, where they are used including the hierarchical levels from the control block path information 62, and what the frequently used operation content is from the connection state information 63.

[0028] For example, the high-frequency model extraction unit 122A starts from the information "'SampleModel / In1'" on the first line of the control block path information 62 and executes several functions to determine what block is connected to the output of "In1." As a result, the high-frequency model extraction unit 122A extracts "Inport, Subsystem, Subsystem2, Outport1" on the first line of the first hierarchical level of the connection state information 63. The high-frequency model extraction unit 122A also determines the number of hierarchical levels (first to third hierarchical levels) of the connection state information 63 from the number of " / "s in the control block path information 62.

[0029] It is possible to determine that there is a block further inside "Filter," which is the third layer of the connection state information 63, because the description information "M" is specified in the model type information 61. Furthermore, because each layer of the connection state information 63 always has an Inport or Outport block, the model analysis unit 121 can also determine the starting point of the connection relationship.

[0030] 10 is an explanatory diagram showing extracted connection state information 64 extracted by the high-frequency model extraction unit 122A from the connection state information 63. The high-frequency model extraction unit 122A extracts overlapping content from the connection state information 63 (two overlaps for a combination of "Inport, Filter, Outport1" with the same connection destination relationship), and associates the number of overlaps with a usage frequency (for example, "usage frequency 2"). Furthermore, the high-frequency model extraction unit 122A obtains extracted connection state information 65 by excluding some entries (blocks of explanatory information "M" and explanatory information "S") that do not indicate calculation content from the extracted connection state information 64.

[0031] The code generation unit 123 references the custom code information 124 and generates custom code 22 in accordance with the operation content of the control block extracted as the extracted connection state information 65. The custom code 22 at this time is assembly language code. Note that the custom code 22 at this time may also be hardware description language code. Furthermore, the target 29 on which the custom code 22 operates may be any microcomputer defined as open source, and a typical example of such a microcomputer is RISC-V.

[0032] FIG. 11 is a configuration diagram showing a modified example of the custom code generation unit 12 of FIG. 4. The custom code generation unit 12 of FIG. 11 includes control block information 125A in addition to the components of the custom code generation unit 12 of FIG. 4. The control block information 125A is information indicating frequently used control blocks, such as the extracted connection state information 64 previously extracted by the high-frequency model extraction unit 122A. Furthermore, the control block information 125A includes the contents of operations and branching processes defined for each type of control block. The control block information 125A is prepared in advance by an administrator or the like so that it can be used by the custom code generation unit 12.

[0033] By referencing the control block information 125A, the code generation unit 123 can efficiently generate custom code 22 from the information for each type of control block obtained from the model-type information 61 and the custom code information 124, without using the extracted connection state information 65. Note that the code generation unit 123 may also generate custom code 22 by referencing the control block information 125A and the custom code information 124 for entries excluded when creating the extracted connection state information 65 from the extracted connection state information 64 (the extraction result of only the "Filter" control block indicated by the description information "M").

[0034] 7 , definitions such as "Filter" corresponding to the control block description information "M" and "SubSystem" corresponding to the description information "B" may be stored in advance as control block information 125A by the custom code generation unit 12. This allows the code generation unit 123 to extract a specific control block (e.g., "Filter" with description information "M") as a frequently used operation from the model-type information 61 corresponding to the control block information 125A. The code generation unit 123 can then generate custom code 22 tailored to the operation from the extracted control block and custom code information 124. This generation method is effective not only for the "Filter" control block, but also for all control blocks that compile frequently used operation contents and control blocks of library models.

[0035] As described above, the custom code 22 created by the code generation unit 123 is expected to be effective in the following respects. Regarding interrupt processing, which allows high-priority processing to be executed during a calculation, the interrupt processing is not performed while the custom code 22 is being executed, and the interrupt processing is executed after the custom code 22 finishes. Therefore, the identity of intermediate values ​​of calculations, such as state quantities, and the final calculation results can be guaranteed. Furthermore, the occurrence of malfunctions when not only calculation results but also state quantities or intermediate values ​​of calculations are used for control can be suppressed, and improved control performance can be expected. By executing the control logic of a control system widely known as a PID controller (Proportional-Integral-Differential Controller) as the custom code 22, the identity of updates to state quantities and integral terms and the calculation results associated with the updates can be guaranteed. Furthermore, the occurrence of malfunctions can be suppressed, and improved control performance can be expected.

[0036] FIG. 12 is a configuration diagram illustrating a modified example of the custom code generation unit 12 of FIG. 11 . In the first embodiment of FIG. 11 , a high-frequency model extraction unit 122A is used as the model extraction unit 122. In the second embodiment of FIG. 12 , a repetition model extraction unit 122B is used as the model extraction unit 122. The repetition model extraction unit 122B extracts a control block of a repetition process based on the analysis results of the model analysis unit 121. Examples of this repetition process include "CORDIC," which is known to be used as an approximation method when obtaining the results of trigonometric function calculations, and a Kalman filter, which is known to estimate states from observed points and use the estimated values ​​for control. The control blocks representing these calculations can identify the corresponding repetition processes and extract the number of them used from the information in the model type information 61 shown in FIG. 7 .

[0037] The code generation unit 123 generates custom code 22 from the control block of the repetitive process extracted by the repetitive model extraction unit 122B in accordance with the custom code information 124. The custom code 22 at this time is assembly language code. Note that the custom code 22 at this time may also be hardware description language code. Furthermore, the target 29 on which the custom code 22 operates may be any microcomputer defined as open source, and a typical example of such a microcomputer is RISC-V.

[0038] Furthermore, the control block information 125B is information indicating the control blocks of the repetitive process previously extracted by the repetitive model extraction unit 122B. By having the control block information 125B in advance, the code generation unit 123 can generate custom code 22 tailored to the calculation content from the control block information 125B and the custom code information 124. This method is effective not only for trigonometric functions using "CORDIC" or Kalman filters, but also for all control blocks that summarize the calculation content of repetitive processes and control blocks of library models. Furthermore, with regard to interrupt processing, which allows high-priority processing to be executed during calculation, the interrupt processing is not performed while the custom code 22 is being executed, and the interrupt processing is executed only after the custom code 22 is completed. This ensures that values ​​during calculation, such as state quantities, and the final calculation result are identical. This reduces the occurrence of malfunctions when not only calculation results but also state quantities or values ​​during calculation are used for control, and is expected to improve control performance.

[0039] Fig. 13 shows a modified example of the code generation device 1 of Fig. 1. In the first embodiment of Fig. 1, a form in which the C language code 21 and the custom code 22 are output separately is described. In the third embodiment of Fig. 13, a form in which the C language code 21 and the custom code 22 are output in association with each other is described. In addition to the functions described in the first embodiment, the custom code generation unit 12 of Fig. 13 has a function to pass information about the portion of the control logic for which the custom code 22 was generated (the overlapping portion of both codes) to the C language code generation unit 11 (indicated by the arrow in the figure).

[0040] The C language code generation unit 11 outputs C language code 21 that reflects the overlapping parts of both codes notified by the custom code generation unit 12. The process of reflecting the overlapping parts of both codes is, for example, the following (first process) or (second process). (First process) Replace the overlapping parts between the C language code 21 and the custom code 22 with a call instruction to the overlapping logic in the custom code 22. In other words, when generating at least two different codes, the C language code generation unit 11 replaces, with respect to a predetermined control block that is included in common in the at least two different codes, the predetermined control block included in the first code with a process that calls the predetermined control block included in the second code.

[0041] (Second process) The developer is notified of the duplicated portion by outputting the duplicated logic as a comment in the C language code 21. In other words, when generating at least two different codes, the C language code generation unit 11 outputs a predetermined control block that is commonly included in the at least two different codes into at least two different codes so that the control block can be distinguished from the other control blocks. Therefore, for example, the C language code generation unit 11 may comment out the duplicated logic itself, or may not comment out the duplicated logic itself but add a comment notifying the developer of the existence of the duplicated logic immediately before the duplicated logic. This allows the developer to identify the portion of the C language code 21 that corresponds to the duplicated logic, allowing them to correct the generated C language code 21.

[0042] Figure 14 shows a modified example of the code generation device 1 of Figure 13. In Example 3 of Figure 13, a function of unidirectional transfer from the custom code generation unit 12 to the C language code generation unit 11 has been described as a form in which the C language code 21 and the custom code 22 are output in association with each other. In Example 4 of Figure 14, a function of bidirectional information exchange between the custom code generation unit 12 and the C language code generation unit 11 has been described as a form in which the C language code 21 and the custom code 22 are output in association with each other. The process in which the C language code generation unit 11 reflects the information transferred from the custom code generation unit 12 in the C language code 21 is the same in both Examples 3 and 4.

[0043] When the custom code generation unit 12 in FIG. 14 receives information about the control logic portion for which the C language code 21 was generated (the overlapping portions of both codes) from the C language code generation unit 11, the custom code generation unit 12 reflects the information in the custom code 22. This allows the developer to determine from the custom code 22 that the content generated by the C language code 21 is also included in the output custom code 22. This allows information to be added to facilitate the implementation of the C language code 21 and the custom code 22 into the target object 29. The custom code 22 in this case is assembly language code. Note that the custom code 22 in this case can also be valid as hardware description language code. Furthermore, the target object 29 on which the custom code 22 runs can be any microcomputer defined as open source, such as RISC-V.

[0044] FIG. 15 is a configuration diagram of a code generation system 100. The code generation system 100 is a development system for control system software including a code generation device 1 according to any one of the first to fourth embodiments and a simulation device 30. The simulation device 30 simulates execution of at least two different codes created by the code generation device 1. That is, the simulation device 30 performs a simulation in which, in addition to the C language code 21 generated by the code generation device 1 from the control model 20, custom code 22 specific to the object 29 written in assembly language code or hardware description language code is simulated, and outputs the results. This allows a developer to detect and correct bugs in the automatically generated C language code 21 and custom code 22 before executing them directly on the object 29.

[0045] This code generation system 100 can be applied to, for example, Simulink or TargetLink running on MATLAB as a model-based control system software development system. By adding an automatic generation function for custom code 22 to the automatic generation function for C language code 21 that conventional control system software development systems have, the execution time when implementing control logic as embedded software in an object 29 can be shortened. This not only improves the functionality of the control system software development system, but also increases its value as a control software development system. Furthermore, the system can appeal to users with its functionality and value, further expanding business opportunities.

[0046] On the other hand, a conventional model-based control system software development system (comparison example) is limited to the function of automatically generating C language code 21, and while it can be incorporated in a general-purpose manner, it is unable to make full use of functions specific to the target object 29 corresponding to the custom code 22, making it difficult to shorten the software processing time during implementation. The reason why the comparison example is limited to the function of automatically generating C language code 21 is that C language is a high-level and general-purpose language and therefore has a wide range of applications. On the other hand, custom code 22, such as assembly language, differs for each developing vendor or target object 29, so developing a system that generates assembly language for each target object 29 would require too much time and cost.

[0047] In the comparative example, a developer compiles C code using a C compiler, converts it into assembly language, and then assembles the assembly language, thereby enabling the C code to be processed by the object 29. However, processing specific to the object 29 cannot be fully expressed in the general-purpose C language, and it is difficult for a C compiler to compile and execute code that can demonstrate functions specific to the object 29. Furthermore, functions specific to the object 29 are generally provided in a dedicated assembly language.

[0048] Furthermore, even with the same control logic, implementing it as custom code 22 is expected to improve the control performance of the object 29 rather than as C language code 21. In other words, in the comparative example, if functions specific to the object 29 are not utilized, calculations will be performed using a combination of general-purpose processes, and functions provided as processes specific to the object 29 will not be utilized. Therefore, the processing performance of the object 29 will not be fully utilized, making it difficult to shorten the processing time during implementation. For example, if a 32-bit x 32-bit calculation is performed and the middle 32 bits of the calculation result are extracted, if the object 29 is a specific microcontroller, it will have a dedicated instruction. However, if the dedicated instruction is not used, a 32-bit shift operation will be required. In fact, such processing cannot be written directly in C language; when written in C language, it will be written by multiplication followed by a 32-bit shift operation. On the other hand, the code generation device 1 of this embodiment implements instructions specific to the object 29 as custom code 22, thereby improving the control performance of the object 29.

[0049] Furthermore, the present invention is not limited to the above-described embodiments, and various other applications and modifications are possible without departing from the spirit of the present invention as defined in the claims. For example, the above-described embodiments provide a detailed and specific description of the configuration of the code generation device 1 in order to clearly explain the present invention, and the code generation device is not necessarily limited to having all of the components described. Furthermore, it is possible to replace part of the configuration of one embodiment with a component of another embodiment. It is also possible to add a component of another embodiment to the configuration of one embodiment. It is also possible to add, replace, or delete other components from part of the configuration of each embodiment.

[0050] Furthermore, some or all of the above-described configurations, functions, processing units, etc. may be implemented in hardware, for example, by designing them as integrated circuits. Broadly defined processor devices such as FPGAs (Field Programmable Gate Arrays) and ASICs (Application Specific Integrated Circuits) may also be used as hardware. Furthermore, the components of the code generation device 1 according to the above-described embodiment may be implemented in any hardware as long as the respective hardware can transmit and receive information to and from each other via a network. Furthermore, the processing performed by a certain processing unit may be implemented by a single piece of hardware, or may be implemented by distributed processing using multiple pieces of hardware.

[0051] REFERENCE SIGNS LIST 1 Code generation device 11 C language code generation unit 12 Custom code generation unit 13 Model creation unit 14 Model operation unit 20 Control model 21 C language code 22 Custom code 29 Object 30 Simulation device 61 Model type information 62 Control block path information 63 Connection state information 64, 65 Extracted connection state information 100 Code generation system 121 Model analysis unit 122 Model extraction unit 123 Code generation unit 122A High frequency model extraction unit 122B Repetitive model extraction unit 124 Custom code information 125A, 125B Control block information 129 Code output unit

Claims

1. A code generation device comprising: a model analysis unit that receives an input of a control model that defines the control logic of an object and analyzes each control block that constitutes said control model; a code generation unit that generates at least two different codes for operating the control blocks analyzed by said model analysis unit on said object; and an output unit that outputs said at least two different codes generated by said code generation unit.

2. The code generation device according to claim 1, further comprising a model extraction unit, which extracts control block groups that are connected at a given degree of connectivity or more from the control block groups analyzed by the model analysis unit, and the code generation unit generates code for one of the at least two different codes that operates only the control block group extracted by the model extraction unit.

3. The code generation device according to claim 1, further comprising a model extraction unit which extracts a group of control blocks representing a predetermined repetitive process from the group of control blocks analyzed by the model analysis unit, and the code generation unit generates code for one of the at least two different codes that operates only the group of control blocks extracted by the model extraction unit.

4. The code generation device according to claim 1, further comprising a model extraction unit, which extracts a control block group including operation contents from the control block group analyzed by the model analysis unit, and the code generation unit generates code for one of the at least two different codes that operates only the control block group extracted by the model extraction unit.

5. The code generating device according to claim 1, wherein the code generating unit generates code in at least two different languages ​​as the at least two different codes, a first code of the at least two different languages ​​is code in C language, and a second code of the at least two different languages ​​is code in assembly language or code in a hardware description language.

6. The code generating device according to claim 5, wherein the code generating unit generates, as the first code, code that operates all of the control block groups analyzed by the model analyzing unit.

7. The code generation device according to claim 1, wherein when generating the at least two different codes, the code generation unit outputs a predetermined control block that is commonly included in the at least two different codes to the at least two different codes so that the predetermined control block can be distinguished from other control blocks.

8. The code generation device according to claim 1, wherein when generating the at least two different codes, the code generation unit replaces a predetermined control block included in a first code with a process that calls a predetermined control block included in a second code, for a predetermined control block that is included in common in the at least two different codes.

9. A code generation system comprising the code generation device according to any one of claims 1 to 8 and a simulation device, wherein the simulation device simulates the execution of at least two different codes created by the code generation device.

10. A code generation method comprising: a code generation device having a model analysis unit, a code generation unit, and an output unit; wherein the model analysis unit receives input of a control model that defines the control logic of an object and analyzes each control block that constitutes the control model; the code generation unit generates at least two different codes for operating the control blocks analyzed by the model analysis unit on the object; and the output unit outputs the at least two different codes generated by the code generation unit.

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