Switching-bus-based regulated hybrid switched-capacitor converters

Abstract

A switching-bus-based architecture for regulated hybrid SC converters composed of multiple pure SC units and regulated hybrid SC units is described. Each stage can have one or multiple switched-capacitor (SC) units. The last stage comprises multiple regulated hybrid SC units. The intermediate bus voltages always switch between two different levels.

Description

SWITCHING-BUS-BASED REGULATED HYBRID SWITCHED-CAPACITOR CONVERTERS CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to, and the benefit of, U.S. provisional patent application serial number 63 / 558,447 filed on February 27, 2024, incorporated herein by reference in its entirety. STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

[0002] Not Applicable NOTICE OF MATERIAL SUBJECT TO COPYRIGHT PROTECTION

[0003] A portion of the material in this patent document may be subject to copyright protection under the copyright laws of the United States and of other countries. The owner of the copyright rights has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the United States Patent and Trademark Office publicly available file or records, but otherwise reserves all copyright rights whatsoever. The copyright owner does not hereby waive any of its rights to have this patent document maintained in secrecy, including without limitation its rights pursuant to 37 C.F.R. § 1.14. BACKGROUND

[0004] 1. Technical Field

[0005] The technology of this disclosure pertains generally to power supplies, and more particularly to switched capacitor converters in power supplies.

[0006] 2. Background Discussion

[0007] In recent years, as microprocessors (e.g., CPUs, GPUs, ASICs, and other high-power consumption electronic devices) become more computationally powerful, their electric power demands have grown dramatically. The power consumption of next-generation digital loads is BK-2024-094-2-PCT -1-expected to reach 1000 W, with core logic voltages below 1.0 V and peak current demand beyond 1000 A. Meanwhile, as modern data centers shift towards the 48-V bus architecture from the legacy 12-V bus architecture, the design of the Voltage Regulation Modules (VRMs) responsible for the 48-V to Point-of-Load (PoL) power conversion is becoming increasingly challenging due to the quadrupled voltage conversion burden. In particular, the continued increase in power levels with the same, or even reduced, space for power conversion leads to an ever-increasing demand for higher power density. Moreover, higher power conversion efficiency is required for easier thermal management and reduced electricity consumption of data centers.

[0008] The main challenges of 48-V-to-PoL power conversion include: (i) high conversion ratio, (ii) high output current, (iii) high efficiency, (iv) high power density, and (v) fast transient response. Various solutions have been proposed to address these challenges, and they can be classified into two categories: (1) transformer-based solutions, and (2) hybrid Switched- Capacitor (SC) solutions. As an emerging family of topologies, hybrid SC converters have received increased attention, since they can leverage both the greatly superior energy density of capacitors compared to magnetics as well as the improved Figure-Of-Merit (FOM) of low-voltage switching devices compared to high-voltage devices.

[0009] Accordingly, a need exists for high power hybrid SC converters having increased efficiency and power density. The present disclosure fulfills that need and provides additional benefits over existing systems BRIEF SUMMARY

[0010] This disclosure describes a switching-bus-based architecture for regulated hybrid SC converters composed of multiple pure SC units and regulated hybrid SC units. In particular, each stage of the converter can have one or multiple switched-capacitor (SC) units. The last stage comprises multiple regulated hybrid SC units. The intermediate bus voltages always switch between two different levels; whereby this type of intermediate bus is referred to as a switching bus. The main advantages of the Switching-Bus- Based Architecture (SBBA) include the following. (1) SBBA does not require BK-2024-094-2-PCT -2-a large and bulky decoupling capacitor to maintain a stiff (consistent) DC bus voltage. (2) One redundant switch can be removed on each switching bus while two stages are merged together. (3) SBBA can ensure complete soft- charging operation for all flying capacitors.

[0011] Further aspects of the technology described herein will be brought out in the following portions of the specification, wherein the detailed description is for the purpose of fully disclosing preferred embodiments of the technology without placing limitations thereon. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The technology described herein will be more fully understood by reference to the following drawings which are for illustrative purposes only:

[0013] FIG.1A through FIG.1C is a block diagram of a switching-bus-based architecture for regulated hybrid switched-capacitor (SC) converters, according to at least one embodiment of the present disclosure.

[0014] FIG.2 is a block diagram of a two-stage switching-bus-based topology architecture, according to at least one embodiment of the present disclosure.

[0015] FIG.3A and FIG.3B is a schematic of an SC stage 16-to-1 switching bus converter, according to at least one embodiment of the present disclosure.

[0016] FIG.4 are key waveforms and control signals, for the schematic of FIG. 3A and FIG.3B, according to at least one embodiment of the present disclosure.

[0017] FIG.5A through FIG.5E is a schematic of the 20-to-1 switching bus converter (SC stage conversion ratio: 20-to-1), according to at least one embodiment of the present disclosure.

[0018] FIG.6 are key waveforms and control signals of the 20-to-1 switching bus converter of FIG.5A through FIG.5E, according to at least one embodiment of the present disclosure.

[0019] FIG.7A and FIG.7B is a schematic of a hybrid SC converter with N=3, K=3, and M=3, according to at least one embodiment of the present disclosure. BK-2024-094-2-PCT -3-

[0020] FIG.8 depicts waveforms for the hybrid SC converter of FIG.7A and FIG.7B, according to at least one embodiment of the present disclosure.

[0021] FIG.9A and FIG.9B is a schematic of a hybrid SC converter with N=4, K=4, and M=2, according to at least one embodiment of the present disclosure.

[0022] FIG.10A and FIG.10B is a schematic of a hybrid SC converter with N=3, K=3, and M=3 as the Series-Parallel-Dickson (SPD) converter, according to at least one embodiment of the present disclosure.

[0023] FIG.11 is a schematic of a hybrid SC converter with N=2, K=1, and M=3: the Cascaded Series-Parallel (CaSP) converter, according to at least one embodiment of the present disclosure.

[0024] FIG.12 is a schematic of a hybrid SC converter with N=4, K=1, and M=2: the Multi-Level-Binary (MLB) converter, according to at least one embodiment of the present disclosure.

[0025] FIG.13A and FIG.13B is a schematic of a two-stage Switched- Capacitor Binary Tree (SCBT) converter, according to at least one embodiment of the present disclosure.

[0026] FIG.14A and FIG.14B is a schematic of a three-stage Switched- Capacitor Binary Tree (SCBT) converter, according to at least one embodiment of the present disclosure.

[0027] FIG.15A through FIG.15C is a schematic of a four-stage Switched- Capacitor Binary Tree (SCBT) converter, according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] 1. Introduction

[0029] This disclosure presents a switching-bus-based architecture for regulated hybrid SC converters composed of multiple pure SC units and regulated hybrid SC units.

[0030] FIG.1A through FIG.1C illustrate an example embodiment 10 of a Switching-Bus-Based Architecture (SBBA) for regulated hybrid Switched- Capacitor (SC) converters. As illustrated in the figure each stage can have one or multiple Switched-Capacitor (SC) units. The figure depicts an input BK-2024-094-2-PCT -4-voltage Vin 12 to first stage 14 having multiple intermediate switching buses, to a K-1st stage 16a through 16n, each having multiple intermediate switching buses, to a Kth stage with groups 18a through 18n of regulated switching units, having units 20a through 20k in a first group, with all switching units outputting to a load 22 characterized with Cout 24 and Rout 26.

[0031] The conversion ratio of Unit j in Stage i is denoted as Ni,j:1. The last stage comprises multiple regulated hybrid SC units. As shown in FIG.1, the intermediate bus voltages always switch between two different levels. Therefore, this type of intermediate bus is referred to as a switching bus. Power electronic converters constructed with switching buses are referred to as switching-bus-based converters.

[0032] Unlike conventional DC-bus-based cascaded converters with intermediate DC buses, the proposed switching-bus-based architecture merges multiple stages with intermediate switching buses. The main advantages of the switching-bus-based architecture include: (1) It does not require a large and bulky decoupling capacitor to maintain a stiff DC bus voltage; (2) One redundant switch can be removed on each switching bus where the two stages are merged together; and (3) It can ensure complete soft-charging operation for all flying capacitors.

[0033] 2. Preferred Embodiments

[0034] The generalized switching-bus-based architecture illustrated in FIG.1A through FIG.1C can be implemented as multiple concrete converter topologies, including two-stage and multi-stage topologies. The two-stage converter examples that will be described in this section include the switching bus converters (including two different combinations), the Dickson-Squared (Dickson2) converters (including two different combinations), the Series- Parallel-Dickson (SPD) converter, the cascaded series-parallel (CaSP) converter, the Multi-Level-Binary (MLB) converter, and the switching bus converters. The multi-stage converter example that will be described in this section is the Switched-Capacitor Binary Tree (SCBT) converter.

[0035] 2.1 Two-Stage Switching-Bus-Based Topologies

[0036] FIG.2 illustrates an example embodiment 110 of a two-stage switching-bus-based topology architecture. The block diagram depicts a Vin BK-2024-094-2-PCT -5-power 112 into a switched-capacitor first stage 114 (N:1) having multiple outputs Out1, Out2 through to OutK onto switching buses Vmid1116a, Vmid2 116b, and VmidK116n, showing the staggered pulses over the buses.

[0037] The pulses over the switching bused are received at second stage modules (M:1) depicted here as regulated module 1118a, regulated module 2 118b, on through to regulated module K 118n, whose outputs are connected together to drive load 120 at voltage Vout126 with current IIoad. By way of example the load is shown with parallel load resistance Rload 124 and loading capacitance Cout 122.

[0038] 2.1.1. Switching Bus Converters

[0039] FIG.3A and FIG.3B illustrates an example embodiment 210 of a 16- to-1 switching bus converter (SC stage conversion ratio: 16-to-1). In the disclosed topology, a 2-to-1 SC converter (i.e., Stage 1) is merged with two 8- to-1 series-capacitor-buck modules (i.e., Modules A and B in Stage 2) through two switching buses (i.e., Switching buses A and B). The SC stage conversion ratio is (2: 1) × (8: 1) = 16: 1.

[0040] FIG.4 illustrates an example 250 of key waveforms and control signals for the converter of FIG.3A and FIG.3B, showing signals for both Module A 252 and Module B 254.

[0041] The schematic of FIG.3A is shown receiving power Vin 225 into stage 1212, which outputs a switching bus A 230a, and switching bus B 230b, which each switch back and forth between voltage levels during operation.

[0042] Connected to the switching buses is a second stage having submodules 1A 216a, 1B 216b, 2A 218a, 2B 218a, 3A 220a, 3B 220b, and 4A 222a, 4B 222b. Each pair of submodules (e.g., submodule 1A and 1B) has inputs connected to the respective side of the switching bus (A or B) and outputs which are common to all the submodules of the stage to the load 223 depicted with parallel load resistance Rloadand output capacitance Coutwith output voltage Vout 246.

[0043] More particularly, Stage 1 is a 2-to-1 SC converter with a first set of series switches with switch S4224a connected between a negative (ground) of source and a first end of capacitor (C1) 226, and then through switch S3 224b providing voltage VswA 230a at current iswA to a first input on second BK-2024-094-2-PCT -6-stage module 216b. A second set of series switches is similarly connected with switch S1228a connected between a positive side of source VIN 225 and a second end of capacitor (C1) 226, and then through switch S2228b providing a voltage VswB 230b at current iswB to a second input on second stage module 216b.

[0044] In the example shown each submodule of the second stage would typically have the same structure, with the exception that submodule 1A, 1B share the output transistors with the first stage.

[0045] In submodule 1A 216a switching bus A is seen connecting through switch 224a (of stage 1) to capacitor C1A234 which is connected to inductor L1A 236a, and to switch S1LA 238 to ground. Bus A continues through switch S2HA 240 to another capacitor C2A 242 which is connected to inductor L2A 236b, and to switch S2LA244 to ground. It should be noted that inductors L1A236a and L2A 236b, are mutually negatively coupled as noted by the polarity dots being on opposite sides of the respective inductor symbols.

[0046] As can be seen in these figures, both SCB modules (A and B sides) operate in a two-phase fashion, with a 180° phase shift between ^^^^1, ^^^^3and ^^^^2, ^^^^4as seen in FIG.4. The control signals in the two modules are staggered to achieve inter-module four-phase interleaved inductor currents. Each SCB module is divided into eight submodules, within which each pair of inductors are negatively coupled.

[0047] As FIG.4 shows, the intermediate bus voltages ^^^^^^^^^^^^^^^^and ^^^^^^^^^^^^^^^^switch between two voltage levels, rather than remaining a constant DC voltage. Therefore, this type of intermediate bus is given the name ‘switching bus’. Compared to the conventional DC bus architecture, the proposed switching bus architecture has two advantages that promise higher efficiency and higher power density. (1) Using a switching bus facilitates the elimination of bulky bus capacitor which would be required in maintain a constant DC bus voltage. (2) Using a switching bus results in the ability to remove one redundant switch on each switching bus, while the two stages are merged together. (3) Using a switching bus allows achieving complete soft-charging operation for all flying capacitors with simple control. BK-2024-094-2-PCT -7-

[0048] In the schematic shown in FIG.3A and FIG.3B, when Stages 1 and 2 are merged, the original highest high-side switch in Module A ^^^^2^^^^^^^^is connected in series with ^^^^3in Stage 1, and similarly, ^^^^2^^^^^^^^is connected in series with ^^^^2. Since no bidirectional switch is required on the intermediate buses, only one switch is needed on each bus, and the other redundant one can be removed. Therefore, what would have been the original highest high- side switches ^^^^1^^^^^^^^and ^^^^1^^^^^^^^are omitted in the circuit.

[0049] It is worth noting that the SC stage conversion ratio of the switching bus converter can be extended as 4-to-1, 8-to-1, 12-to-1, 16-to-1, 20-to-1, and so on, by changing the number of submodules in the SCB modules.

[0050] FIG.5A through FIG.5E illustrate an example embodiment 310 of a 20-to-1 switching bus converter (SC stage conversion ratio: 20-to-1). It comprises two stages: (1) two 2-to-1 SC front-ends as Stage 1 seen in FIG. 5B, and (2) four 10-branch series-capacitor-buck (SCB) modules (i.e., Modules A-D) as Stage 2 in FIG.5A and 5C. The bus voltages from Stage 1, VswAthrough VswDeach switch between two different levels. Therefore, these types of intermediate buses are referred to as switching buses. The SC stage conversion ratio of this converter is (2: 1) × (10: 1) = 20: 1.

[0051] In FIG.5B we see Stage 1312 with modules 318a, 318b, from which extend switching buses A-D 340a through 340d (VswA, VswB, VswC, VswD). A first portion 314 of Stage 2, on switching buses B and D 340b, 340d, is shown with modules 320a and 320b, with additional modules 322a, 322b, 324a, 324b seen in FIG.5A. A second portion 316 of Stage 2, on switching buses A and C 340a, 340c, is shown with modules 326a, 326b, 328a, 328b, 330a, 330b in FIG.5C.

[0052] It will be noted that FIG.5B depicts the input voltage and Voutat the load (Rloadand Cout) being connected in Stage 1, although it could be connected anywhere along that bus 323.

[0053] FIG.5D illustrates an expanded view of Module B 324a shown in FIG. 5A. In submodule 5B 324a switching bus B 340b is seen connecting through switch Ø1B 348b, having protection diode S9HB, to capacitor C9B 346 which is connected to inductor L9B of coupled inductor pair 342, and to switch Ø’1B 344b. Bus B continues from switch Ø1B348b to switch Ø2B348a, which BK-2024-094-2-PCT -8-connects to switch Ø’2B 344a to ground, and to inductor L10B of coupled inductor pair 342. It will be seen that coupled inductor 342 is shown being mutually negatively coupled to both inductors L9Band L10B, and also to L9Dand L10D, of module D 324b.

[0054] It should be noted that this module is generally representative of the other Stage 2 modules. However, in this module B 324a, as well as the other terminating modules of Bus B, which are 324a, 324b, 330a, 330b, do not contain a charge storage capacitor between switch Ø2B and switch Ø’2B.

[0055] FIG.5E illustrates an expanded view of module 318a as a first side of Stage 1. This stage is configured to receive a voltage input Vin332 as coupled between switch S1334a and S4334b, the opposing sides of which are connected to capacitor C1336. A first side of capacitor C1336 connects through switch Ø1A338b to Switching Bus A as VswA340a through which current iswA passes. Similarly, the other side of capacitor C1336 connects through switch Ø1B 338a to Switching Bus B as VswB 340b through which current iswBpasses. The companion module 318b is similarly configured to receive the same Vinand using the same structure to provide outputs to both Switching Bus C as VswC 340c through which current iswC passes, and to Switching Bus D as VswD 340d through which current iswD passes.

[0056] FIG.6 illustrates an example 350 of key waveforms and control signals for the schematic of FIG.5A through FIG.5E. Phase control signals Ø1x, Ø2x, are seen for each stage (A-D), along with resultant voltage and current waveforms for Module A 352, Module B 354, Module C 356, and Module D 358.

[0057] As can be seen in FIG.5 and FIG.6, each SCB module comprises five submodules and operates in a two-phase fashion with a 180° phase shift between neighboring branches. The control signals of Modules C and D are 90° phase shifted with respect to those of Modules A and B so that the four inductors grouped in the gray rectangles are four-phase interleaved with a 90° phase shift and can be implemented as four-phase coupled inductors with higher energy density and faster dynamic response than discrete inductors.

[0058] The output voltage of the proposed switching bus converter can be regulated through duty cycle control as BK-2024-094-2-PCT -9-^^^^ where ^^^^^^^^^^^^and ^^^^^^^^^^^^^^^^are the input and output voltages, respectively, and ^^^^ is the duty ratio with respect to the switching period ^^^^ as is illustrated in FIG.6.

[0059] 2.1.2. Dickson-Squared (Dickson2) Converters

[0060] FIG.7A and FIG.7B illustrate an example embodiment 410, 430a of a hybrid SC Dickson converter with N=3, K=3, and M=3 in FIG.7A, and the structure of a regulated Module i from Stage 2 of FIG.7A, as seen in FIG.7B. The components labeled with the subscript (mi) are in Regulated Module i. The values of the label indexes (i, j, and k) for circuit components and control signals (ϕi, ϕj, and ϕk) in each module are listed in Table 1.

[0061] As illustrated in FIG.7A, the proposed topology comprises two stages. The first stage 414 is a 3-to-1 Dickson SC topology which is configured to receive an input Vin412, and has three separate output terminals Vmid1429a, Vmid2429b, and Vmid3429c. Voltage is received at switch 422a to C1424a the other side of which is connected through switch Q5426a to ground and through switch Q4428a to Vmid1429a. Current passing through switch Q1 422a is received at switch Q2422b to C2424b the other side of which is connected through switch Q3426b to ground and through switch Q6428b to Vmid2429b. Current passing through switch Q2422b is received at switch Q3 422c directly to Vmid3429c.

[0062] The second stage 416 is composed of three modules 430a, 430b, 430c, each one receiving one of the three outputs from the first stage, and generating a common output 417 to drive load 418, exemplified as Cout432 in parallel with Rload434, at voltage Vout. Each of these three second stage modules has the same circuit structure and cyclic control signals.

[0063] In FIG.7B is depicted an example of regulated module 430a. Inside each module is a three-phase series-capacitor buck converter, which can also be viewed as a 3-to-1 Dickson converter with the top switch moving to the bottom and the three output branches replaced by three inductors. The two stages are merged through three switching buses vmid1through vmid3. Since this SC topology can be viewed as two Dickson converters merged together with redundant components removed, it is given the name Dickson-squared BK-2024-094-2-PCT -10-(Dickson2). The total SC stage conversion ratio in this example is (3: 1) × (3: 1) = 9: 1.

[0064] The circuit is shown with input directed along a first circuit leg through capacitor C1(mi)452a to inductor L1(mi)456a to output 458. A switch Q3(mi)454a is coupled between C1and L1and ground. From the input there is also seen switch Q1(mi) 450a to a second circuit leg to capacitor C2452b to inductor L2456b to output 458. A switch Q4(mi)454b is coupled between C2and L2, and ground. From the second leg input there is also seen switch Q2(mi)450b to a third circuit leg directly (no capacitor in this leg) to inductor L3456c to output 458. A switch Q5(mi) 454c is coupled between Q2 and L3, and ground.

[0065] FIG.8 illustrates an example 470 of key waveforms and control signals used in the Dickson-PoL of FIG.7A and FIG.7B. Control signals Ø1, Ø2, Ø3, Ø’1, Ø’2, Ø’3, are seen at the bottom of the figure with the associated timing relationships. The figure shows both voltage Vmid1, Vmid2, Vmid3, and current imid1, imid2, imid3, outputs from the first stage, as well as the overlapping of inductor currents iL to the output. The output voltage of the proposed converter can be derived by multiplying the conversion ratios of the fixed-ratio SC stage and the regulated buck stage as ^^^^^^^^^^^^^^ ^^^^ ^^^^^^^^^^^^^^=^^^^× = ^^^^ 9 3 27^^^^^^^^where D is the duty ratio with respect toas illustrated in FIG.8. Thus, ^^^^^^^^^^^^^^^^can be regulated by adjusting duty ratio D.

[0066] It is worth noting that the Dickson2architecture allows multiple choices for the two stages. For example, instead of using a 3-to-1 Dickson topology for both conversion stages, one can design new Dickson2converters with 2- to-1, 4-to-1, 5-to-1, or higher-ratio Dickson topologies in both conversion stages according to the teachings of the present disclosure.

[0067] FIG.9A and FIG.9B illustrates an example embodiment 510, 528a of a hybrid SC converter with N=4, K=4, and M=2, the Dickson converter in FIG. 9A and the structure 528a of regulated Module i in Stage 2 as seen in FIG. 9B. The components labeled with the subscript (mi) are in Regulated Module i. The values of the label indexes (i and j) for circuit components and control signals (ϕiand ϕj) in each module are listed in the Table 2. BK-2024-094-2-PCT -11-

[0068] In this example, a 4-to-1 Dickson converter can be merged with four 2- to-1 series-capacitor buck modules that can also be viewed as 2-to-1 Dickson converters, which yields the converter topology illustrated in FIG.9A. The two stages are merged through four switching buses vmid1 through vmid4. The total SC stage conversion ratio is (4: 1) × (2: 1) = 8: 1.

[0069] This converter has the same first stage structure as in FIG.7A, yet has one more output Vmid4from the first stage. The converter is configured to receive input voltage Vin512 at first stage 514, with series transistors 520a through 520d leading to 3 circuit legs having a capacitor 522a, 522b, 522c to a grounding transistor 524a, 524b, 524c, then to series transistor 526a, 526b, 526c to the mid level outputs Vmid1, Vmid2, and Vmid3, 527a, 527b and 527c. The final leg connects directly through Q4520d to Vmid4527d.

[0070] In the second stage 516 are seen four 2:1 converters 528a through 528d, with a common output 517 to drive load 518, exemplified as Cout530 in parallel with Rload532, at voltage Vout. Each of these three second stage modules has the same circuit structure and cyclic control signals.

[0071] In FIG.9B is seen the details of one of these second stage 2:1 circuits 528a. Switching bus Vmid1is received at capacitor C1556 which connects to inductor L1(mi) 560a to output 552. Switch Q2(mi) 558a, is connected between C1 and L1 to ground. Switch Q1(mi) 554 connects a second circuit leg, which omits the capacitor, and connects directly to grounding switch Q3(mi)558b and inductor L2(mi)560b to output 552.

[0072] 2.1.3. Series-Parallel-Dickson (SPD) Converter

[0073] FIG.10A and FIG.10B illustrates an example embodiment 610, 638a, of a hybrid SC converter with N=3, K=3, and M=3, as a series-parallel- Dickson (SPD) converter in FIG.10A, and the structure of Regulated Module i in Stage 2 as seen in FIG.10B. The components labeled with the subscript (mi) are in Regulated Module i. The values of the label indexes (i, j, and k) for circuit components and control signals (ϕi, ϕj, and ϕk) in each module are listed in Table 3.

[0074] The disclosed topology comprises a first stage 614 as a 3-to-1 series- parallel topology with three separate output terminals, and a second stage 616 composed of three modules having the same circuit structure and cyclic BK-2024-094-2-PCT -12-control signals.

[0075] Stage 1 is shown configured for receiving an input Voltage source Vin 612, and outputting three switching buses 637a, 637b, and 637c. Input is received through a first switch Q1622 to capacitor C1624 and to Q4636 which is directed to vmid1637a.

[0076] The opposite side of C1connects to both a grounding switch Q5626 and a series switch Q2628 which connects to capacitor C2629, and through switch Q6634 to vmid2637b.

[0077] The opposite side of C2 connects to both a grounding switch Q7630 and a series switch Q3632 to vmid2637c.

[0078] Intermediate outputs 637a through 637c are directed to second stage 616 regulated modules 638a through 638c, which have a common output connection 617 to a load 618, exemplified having capacitance Cout640 and resistance Rload 650.

[0079] Inside each module is a three-phase series-capacitor buck converter, which can also be viewed as a 3-to-1 Dickson converter with the top switch moving to the bottom and the three output branches replaced by three inductors. The two stages are merged through three switching buses vmid1- vmid3. The total SC stage conversion ratio is (3: 1) × (3: 1) = 9: 1.

[0080] In FIG.10B is shown regulated module 1638a with input directed along a first circuit leg through capacitor C1(mi)658a to inductor L1(mi)662a to output 654. A switch Q3(mi)660a is coupled between C1and L1and ground. From the input there is also seen switch Q1(mi) 656a to a second circuit leg to capacitor C2658b to inductor L2662b to output 654. A switch Q4(mi)660b is coupled between C2and L2, and ground. From the second leg input there is also seen switch Q2(mi) 656b to a third circuit leg connected directly (no capacitor in this leg) to inductor L3662c to output 654. A switch Q5(mi)660c is coupled between Q2and L3, and ground.

[0081] 2.1.4. Cascaded Series-Parallel (CaSP) Converter

[0082] FIG.11 illustrates an example embodiment 710 of a cascaded series- parallel (CaSP) converter having a first stage exemplified as a 2-to-1 SC front- end, and a second stage exemplified as a 3-to-1 series-parallel converter. The two stages are merged through one switching bus vmid1. The total SC BK-2024-094-2-PCT -13-stage conversion ratio is (2: 1) × (3: 1) = 6: 1.

[0083] Stage 1714 is shown configured for receiving an input Voltage source Vin 712, and outputting a single switching bus 731. Input is received through a first switch Q1722 to capacitor C1726 and to Q2728 which is directed to vmid1731. The opposite side of C1connects to both a grounding switch Q4724 and a series switch Q3730 to vmid1731.

[0084] Stage 2716 is shown receiving vmid1731, and outputting to a load 718, exemplified with Cout752 and Rload754 at voltage Vout. Input is received at capacitor C2732, and also directed to switch Q5736 which outputs to inductor L1750a to load 718. The opposite side of capacitor C2732, is directed to both a grounding switch Q7734 and a series switch Q8740 which connects to capacitor C3742, as well as to switch Q6744 which outputs to a grounding switch Q10746 and to inductor L2750b to load 718. The opposite side of C3 742 connects to both a grounding switch Q11748 and inductor L3750c to load 718.

[0085] 2.1.5. Multi-Level-Binary (MLB) Converter

[0086] FIG.12 illustrates an example embodiment 810 of a Multi-Level-Binary (MLB) converter; consisting of a first stage 814 as a 4-to-1 series-parallel converter, then to a second stage 816 as a 2-to-1 series-capacitor buck converter. The two stages are merged through one switching bus vmid1. The total SC stage conversion ratio is (4: 1) × (2: 1) = 8: 1.

[0087] Stage 1814 is shown configured for receiving an input Voltage source Vin812, and outputting a single switching bus vmid829. Input is received through a first switch Q1822 to capacitor C1824 and to Q2826, which is directed both to capacitor C2834, and to series switch Q5828 to vmid829. The opposite side of C1connects to both a grounding switch Q4830 and a series switch Q3832 to capacitor C2834. The opposite side of C2834 is connected through switch Q6838 to vmid1829.

[0088] Stage 2 is shown receiving vmid1829 at capacitor C3840 and Q8842 whose output it directed to both a grounding switch Q9844 and to inductor L1 848a to load 818. The opposite side of C3 connects to both a grounding switch Q10846 and inductor L2848b to load 818 shown as capacitance Cout850 in parallel with resistance Rload852. BK-2024-094-2-PCT -14-

[0089] 2.2. Multi-Stage Switching-Bus-Based Topologies

[0090] An example of multi-stage switching-bus-based topologies is the Switched-Capacitor Binary Tree (SCBT) converter. Multiple different combinations of the SCBT converter can be implemented to achieve the same SC stage conversion ratio. For example, a 16-to-1 total SC stage conversion ratio can be factorized as:

[0091] (a) Case 1: 16: 1 = (2: 1) × (8: 1);

[0092] (b) Case 2: 16: 1 = (2: 1) × (2: 1) × (4: 1); or

[0093] (c) Case 3: 16: 1 = (2: 1) × (2: 1) × (2: 1) × (2: 1).

[0094] Based on the switching bus concept, there are three different implementations of the SCBT converter to achieve a total SC stage conversion ratio of 16-to-1.

[0095] (a) Case 1: FIG.13A and FIG.13B illustrates an example embodiment 910, 928 of a two-stage switched-capacitor binary tree (SCBT) converter. Stage 1914 is a 2-to-1 SC converter. Stage 2916 comprises two 8-to-1 series-capacitor buck (SCB) converters, whose schematic is shown in FIG. 13B. Stage 1 and Stage 2 are connected through two switching buses.

[0096] In particular, the 2-to-1 SC converter has Vin 912 applied to switches 922, 924 on a first and second leg of the stage, across which is flying capacitor Cfly1926, with outputs directed to stage 2, in this case having two 8- to-1 SCB converters 928, 930 which output to load 918 exemplified with Cout932 and Rload 934 at voltage Vout.

[0097] Stage 2 is shown in FIG.13B having a first leg with capacitor Cfly1 932a, connecting to a grounding switch S1L934a and inductor L1936a to a common output 940. A ladder of switches 930a through 930g leads to the remaining 7 legs of the converter. All but the final leg having the same circuitry as the first leg, with capacitors 932b through 932g, grounding switches 934b through 934n, and inductors 936b through 936h, to output 940. The last leg does not require a capacitor.

[0098] (b) Case 2: FIG.14A and FIG.14B illustrates an example embodiment 1010, 1018a of a three-stage Switched-Capacitor Binary Tree (SCBT) converter. Stage 1 and Stage 2 comprise 2-to-1 SC converters. Stage 3 comprises four 4-to-1 Series-Capacitor Buck (SCB) converters, as shown in BK-2024-094-2-PCT -15-FIG.14B. Stage 1 and Stage 2 are connected through two switching buses. Stage 2 and Stage 3 are connected through four switching buses.

[0099] Stage 11014 is seen with Vin1012 configured for being received across switches 1022a, 1022b, and outputting across a capacitor Cfly11023 to the two second stages 1016a, 1016b. Both Stage 2 modules have the same circuitry with pass switches 1024a, 1028a, and capacitors 1026, 1030, respectively, directed to four outputs, one to each of the 4-to-1 SCB modules 1018a through 1018d, whose common output 1019, drives load 1020 modeled as Cout in parallel with Rload.

[0100] In FIG.14B is shown one of the four 4-to-1 SCB modules of stage 3. Input voltage directed to a first leg with capacitor Cfly11056a, connecting to a grounding switch S1L 1058a and inductor L11060a to a common output 1052. A ladder of switches 1054a through 1054c leads to the remaining 3 legs of the converter. All but the final leg having the same circuitry as the first leg, with capacitors 1056b through 1056c, grounding switches 1058b through 1058d, and inductors 1060b through 1060d, to output 1052. The last leg omits the capacitor.

[0101] (c) Case 3: FIG.15A through FIG.15C illustrates an example embodiment 1110, 1120a of a four-stage Switched-Capacitor Binary Tree (SCBT) converter. Stage 11114, Stage 21116a, 1116b, and Stage 31118a through 1118d comprises 2-to-1 SC converters. Stage 4 comprises eight 2- to-1 series-capacitor buck (SCB) converters 1120a through 1120h, one of which is shown in FIG.15C. Stage 1 and Stage 2 are connected through two switching buses. Stage 2 and Stage 3 are connected through four switching buses. Stage 3 and Stage 4 are connected through eight switching buses.

[0102] First Stage 1114 is configured for receiving a voltage source Vin1112 across switches 1126, 1128 leading to capacitor Cfly11130 and output to the second stage. Second stage having same structure with two sections 1116a, 1116b, switches 1132a, 1132b, 1136a, 1136b, and capacitors 1134, 1138, respectively. Third stage of these converters is shown with modules 1118a through 1118d, having the same configuration of switches and capacitors, leading to stage 4 having eight 2-to-1 SCB modules 1120a through 1120h, whose outputs 1121 are coupled to a common load 1122, modeled as a BK-2024-094-2-PCT -16-parallel capacitor Cout and resistor Rload, at voltage Vout.

[0103] In FIG.15C is described one of these eight 2-to-1 series-capacitor buck (SCB) converters 1120a. Input 1150 is received from the third stage to a first leg with flying capacitor Cfly11156 whose output is directed to a grounding switch 1158 and to inductor L11162a connected to output 1152. The input 1150 is also connected through switch 1154 to a grounding switch 1160 and through inductor L21162b connected to output 1152.

[0104] 3. General Scope of Embodiments

[0105] From the description herein, it will be appreciated that the present disclosure encompasses multiple implementations of the technology which include, but are not limited to, the following:

[0106] A switching-bus-based architecture for regulated hybrid switched- capacitor (SC) converters, wherein the last stage comprises multiple regulated hybrid SC units comprising switches, flying capacitors, and inductors; and wherein other stages comprise multiple SC units comprising switches and flying capacitors; wherein one redundant switch can be removed per switching bus when two hybrid SC stages are merged based on the switching-bus-based architecture.

[0107] A switching bus-based regulated switched-capacitor (SC) converter apparatus, comprising: (a) one or more SC conversion stages, each of said SC conversion stages comprising SC conversion units for converting an input voltage to multiple switching bus outputs, each of said multiple switching having a different output timing, and each of the bus outputs are coupled to conversion units in a succeeding stage; (b) wherein each said SC conversion unit accomplishes energy transfer and voltage conversion by switching current to and from one or more charge pump (flying) capacitors; (c) wherein each said switching bus output switches between two voltage levels, rather than being direct current (DC); (d) a final conversion stage comprising multiple regulated hybrid SC units, which each receive a separate output of said multiple switching bus outputs, and each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; (e) wherein each of said multiple switching bus outputs is directed to BK-2024-094-2-PCT -17-a different SC conversion unit or regulated unit; and (f) a control circuit configured for generating control signals to each of the conversion stages to control when switches turn on and off in the conversion units and regulated units.

[0108] A switching bus-based regulated switched-capacitor (SC) converter apparatus, comprising: (a) one or more SC conversion stages, each of said SC conversion stages comprising SC conversion units for converting an input voltage to multiple switching bus outputs, each of said multiple switching having a different output timing, and each of the bus outputs are coupled to conversion units in a succeeding stage; (b) wherein each said SC conversion unit accomplishes energy transfer and voltage conversion by switching current to and from one or more charge pump (flying) capacitors; (c) wherein each said switching bus output switches between two voltage levels, rather than being direct current (DC); (d) a final conversion stage comprising multiple regulated hybrid SC units, which each receive a separate output of said multiple switching bus outputs, and each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; (e) wherein each of said multiple switching bus outputs is directed to a different SC conversion unit or regulated unit; and (f) wherein said apparatus is configured for receiving control signals to each of the conversion stages to control when switches turn on and off in the conversion units and regulated units.

[0109] A switching bus-based regulated switched-capacitor (SC) converter apparatus, comprising: (a) one or more SC conversion stages, each of said SC conversion stages comprising SC conversion units for converting an input voltage to multiple switching bus outputs, each of said multiple switching having a different output timing, and each of the bus outputs are coupled to a conversion units in a succeeding stage; (b) wherein each said SC conversion unit accomplishes energy transfer and voltage conversion by switching current to and from one or more charge pump (flying) capacitors; (c) wherein each said switching bus output switches between two voltage levels, rather than being DC; (d) a final conversion stage comprising multiple regulated BK-2024-094-2-PCT -18-hybrid SC units, which each receive a separate output of said multiple switching bus outputs, and each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; (e) wherein each of said multiple switching bus outputs is directed to a different SC conversion unit or regulated unit; and (f) a control circuit configured for generating control signals to each of the conversion stages to control when FET switches turn on and off in the conversion units and regulated units.

[0110] A method of performing switching bus-based regulated switched- capacitor (SC) power conversion, comprising: (a) converting an input voltage to multiple switching bus outputs through one or more SC conversion stages having SC conversion units, wherein each of said multiple switching bus outputs has a different output timing, for input to conversion units in a succeeding stage; (b) performing energy transfer and voltage conversion in each said SC conversion unit by switching current to and from one or more charge pump (flying) capacitors; (c) switching between two voltage levels of each said switching bus output, rather than outputting direct current (DC) to the succeeding stage; (d) receiving a separate output of said multiple switching bus outputs at a final conversion stage comprising multiple regulated hybrid SC units, in which each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; and (e) controlling the switching of the switched-capacitor stages in response to receiving control signals to each of the conversion stages to control when switches turn on and off in the conversion units and regulated units.

[0111] A method of performing switching bus-based regulated switched- capacitor (SC) power conversion, comprising: (a) converting an input voltage to multiple switching bus outputs through one or more SC conversion stages having SC conversion units, wherein each of said multiple switching bus outputs has a different output timing, for input to conversion units in a succeeding stage; (b) performing energy transfer and voltage conversion in BK-2024-094-2-PCT -19-each said SC conversion unit by switching current to and from one or more charge pump (flying) capacitors; (c) switching between two voltage levels of each said switching bus output, rather than outputting direct current (DC) to the succeeding stage; (d) receiving a separate output of said multiple switching bus outputs at a final conversion stage comprising multiple regulated hybrid SC units, in which each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; and (e) controlling the switching of the switched-capacitor stages in response to receiving control signals to each of the conversion stages to control when switches turn on and off in the conversion units and regulated units.

[0112] The apparatus or method of any preceding implementation, wherein said control circuit comprises a switching power supply control circuit having multiple clock outputs whose relative phases can be controlled.

[0113] The apparatus or method of any preceding implementation, wherein said control circuit can comprise a multiphase digital clock circuit, digital sequential logic circuitry, or a microcontroller having programming for outputting multiphase digital clock outputs.

[0114] The apparatus or method of any preceding implementation, wherein control signals to each of the conversion stages are generated in different phases, whereby control signals directed to the conversion units are staggered to achieve inter-module interleaved inductor currents.

[0115] The apparatus or method of any preceding implementation, wherein said merging of multiple conversion stages with intermediate switching buses has the advantage of not requiring a decoupling capacitor to maintain a constant DC bus voltage.

[0116] The apparatus or method of any preceding implementation, wherein said merging of multiple conversion stages with intermediate switching buses has the advantage of allowing a redundant switch to be removed on each switching bus while two stages are merged together.

[0117] The apparatus or method of any preceding implementation, wherein said merging of multiple conversion stages with intermediate switching buses BK-2024-094-2-PCT -20-has the advantage that it ensures complete soft-charging operations for all flying capacitors.

[0118] The apparatus or method of any preceding implementation, wherein said apparatus comprises a two stage converter.

[0119] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as Dickson- Squared (Dickson2) converter.

[0120] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as a series- parallel-Dickson (SPD) converter.

[0121] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as a cascaded series-parallel (CaSP) converter.

[0122] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as a multi-level- binary (MLB) converter.

[0123] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as switching bus converters.

[0124] The apparatus or method of any preceding implementation, wherein said apparatus comprises a multiple-stage converter.

[0125] The apparatus or method of any preceding implementation, wherein said multiple stage converter comprises a switched-capacitor binary tree (SCBT) converter, in which each SC unit directs outputs to two other (binary) conversion units, which are either part of a subsequent SC stage, or the final stage conversion units.

[0126] The apparatus or method of any preceding implementation, wherein said final stage conversion units comprise series-capacitor buck (SCB) modules.

[0127] The apparatus or method of any preceding implementation, wherein said multiple stage converter comprises a 16:1 converter comprises a two- stage switched-capacitor binary tree (SCBT) converter, in which the first stage comprises a 2-to-1 SC converter, and the second stage comprises two 8-to-1 BK-2024-094-2-PCT -21-series-capacitor buck (SCB) converters, and wherein said first stage and said second stage are connected through two switching buses.

[0128] The apparatus or method of any preceding implementation, wherein said multiple stage converter comprises a 16:1 converter, which comprises a three-stage switched-capacitor binary tree (SCBT) converter, in which the first and second stage comprise 2-to-1 SC converters, and the third stage comprises four 4-to-1 series-capacitor buck (SCB) converters, with first and second stages connected through two switching buses, and the second and third stages being connected through four switching buses.

[0129] The apparatus or method of any preceding implementation, wherein said multiple stage converter comprises a 16:1 converter, which comprises a four-stage switched-capacitor binary tree (SCBT) converter, in which the first, second the third stages comprise 2-to-1 SC converters, and the fourth stage comprises eight 2-to-1 series-capacitor buck (SCB) converters, and in which the first and second stages are connected through two switching buses, while the second and third stages are connected through four switching buses, and then the third and fourth stages are connected through eight switching buses.

[0130] The apparatus or method of any preceding implementation, wherein said switches in said switched-capacitor (SC) converter apparatus comprise electronic switches.

[0131] The apparatus or method of any preceding implementation, wherein said electronic switches comprise transistors.

[0132] The apparatus or method of any preceding implementation, wherein the switching-bus-based architecture and its operating principles can allow the intermediate bus voltage to change between two voltage levels, meaning that no large DC bus capacitor is needed to maintain a stiff DC bus voltage.

[0133] The apparatus or method of any preceding implementation, wherein the switching-bus-based architecture can achieve complete soft-charging for all flying capacitors in the converter.

[0134] The apparatus or method of any preceding implementation, wherein said control circuit comprises a switching power supply control circuit having multiple clock outputs whose relative phases can be controlled.

[0135] The apparatus or method of any preceding implementation, wherein BK-2024-094-2-PCT -22-said control circuit can comprise a multiphase digital clock circuit, digital sequential logic circuitry, or a microcontroller having programming for outputting multiphase digital clock outputs.

[0136] The apparatus or method of any preceding implementation, wherein control signals to each of the conversion stages are generated in different phases, whereby control signals directed to the conversion units are staggered to achieve inter-module interleaved inductor currents.

[0137] The apparatus or method of any preceding implementation, wherein said apparatus merges multiple conversion stages with intermediate switching buses, which is distinct from conventional DC-bus-based cascaded converters relying on intermediate DC buses.

[0138] The apparatus or method of any preceding implementation, wherein said merging of multiple conversion stages with intermediate switching buses has the advantage of not requiring a decoupling capacitor to maintain a constant DC bus voltage.

[0139] The apparatus or method of any preceding implementation, wherein said merging of multiple conversion stages with intermediate switching buses has the advantage of allowing a redundant switch to be removed on each switching bus while two stages are merged together.

[0140] The apparatus or method of any preceding implementation, wherein said merging of multiple conversion stages with intermediate switching buses has the advantage that it ensures complete soft-charging operations for all flying capacitors.

[0141] The apparatus or method of any preceding implementation, wherein said apparatus comprises a two stage converter.

[0142] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as Dickson- Squared (Dickson2) converter.

[0143] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as a series- parallel-Dickson (SPD) converter.

[0144] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as a cascaded BK-2024-094-2-PCT -23-series-parallel (CaSP) converter.

[0145] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as a multi-level- binary (MLB) converter.

[0146] The apparatus or method of any preceding implementation, wherein said two stage converter comprises a switching bus converter as switching bus converters.

[0147] The apparatus or method of any preceding implementation, wherein said apparatus comprises a multiple-stage converter.

[0148] The apparatus or method of any preceding implementation, wherein said multiple stage converter comprises a switched-capacitor binary tree (SCBT) converter, in which each SC unit directs outputs to two other (binary) conversion units, which are either part of a subsequent SC stage, or the final stage conversion units.

[0149] The apparatus or method of any preceding implementation, wherein said final stage conversion units comprise series-capacitor buck (SCB) modules.

[0150] The apparatus or method of any preceding implementation, wherein said multiple stage converter comprises a 16:1 converter.

[0151] The apparatus or method of any preceding implementation, wherein said 16:1 converter comprises a two-stage switched-capacitor binary tree (SCBT) converter, in which the first stage comprises a 2-to-1 SC converter, and the second stage comprises two 8-to-1 series-capacitor buck (SCB) converters, and wherein said first stage and said second stage are connected through two switching buses.

[0152] The apparatus or method of any preceding implementation, wherein said 16:1 converter comprises a three-stage switched-capacitor binary tree (SCBT) converter, in which the first and second stage comprise 2-to-1 SC converters, and the third stage comprises four 4-to-1 series-capacitor buck (SCB) converters, with first and second stages connected through two switching buses, and the second and third stages being connected through four switching buses.

[0153] The apparatus or method of any preceding implementation, wherein BK-2024-094-2-PCT -24-said 16:1 converter comprises a four-stage switched-capacitor binary tree (SCBT) converter, in which the first, second the third stages comprise 2-to-1 SC converters, and the fourth stage comprises eight 2-to-1 series-capacitor buck (SCB) converters, and in which the first and second stages are connected through two switching buses, while the second and third stages are connected through four switching buses, and then the third and fourth stages are connected through eight switching buses.

[0154] As used herein, the term "implementation" is intended to include, without limitation, embodiments, examples, or other forms of practicing the technology described herein.

[0155] As used herein, the singular terms "a," "an," and "the" may include plural referents unless the context clearly dictates otherwise. Reference to an object in the singular is not intended to mean "one and only one" unless explicitly so stated, but rather "one or more."

[0156] Phrasing constructs, such as “A, B and / or C”, within the present disclosure describe where either A, B, or C can be present, or any combination of items A, B and C. Phrasing constructs indicating, such as “at least one of” followed by listing a group of elements, indicates that at least one of these groups of elements is present, which includes any possible combination of the listed elements as applicable.

[0157] References in this disclosure referring to “an embodiment”, “at least one embodiment” or similar embodiment wording indicates that a particular feature, structure, or characteristic described in connection with a described embodiment is included in at least one embodiment of the present disclosure. Thus, these various embodiment phrases are not necessarily all referring to the same embodiment, or to a specific embodiment which differs from all the other embodiments being described. The embodiment phrasing should be construed to mean that the particular features, structures, or characteristics of a given embodiment may be combined in any suitable manner in one or more embodiments of the disclosed apparatus, system, or method.

[0158] As used herein, the term "set" refers to a collection of one or more objects. Thus, for example, a set of objects can include a single object or multiple objects. BK-2024-094-2-PCT -25-

[0159] Relational terms such as first and second, top and bottom, upper and lower, left and right, and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

[0160] The terms "comprises," "comprising," "has", "having," "includes", "including," "contains", "containing" or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, apparatus, or system, that comprises, has, includes, or contains a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, apparatus, or system. An element proceeded by "comprises ... a", "has ... a", "includes ... a", "contains ... a" does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, apparatus, or system, that comprises, has, includes, contains the element.

[0161] As used herein, the terms "approximately", "approximate", "substantially", "substantial", "essentially", and "about", or any other version thereof, are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. When used in conjunction with a numerical value, the terms can refer to a range of variation of less than or equal to ± 10% of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1 %, less than or equal to ±0.5%, less than or equal to ±0.1 %, or less than or equal to ±0.05%. For example, "substantially" aligned can refer to a range of angular variation of less than or equal to ±10°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

[0162] Additionally, amounts, ratios, and other numerical values may sometimes be presented herein in a range format. It is to be understood that BK-2024-094-2-PCT -26-such range format is used for convenience and brevity and should be understood flexibly to include numerical values explicitly specified as limits of a range, but also to include all individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly specified. For example, a ratio in the range of about 1 to about 200 should be understood to include the explicitly recited limits of about 1 and about 200, but also to include individual ratios such as about 2, about 3, and about 4, and sub-ranges such as about 10 to about 50, about 20 to about 100, and so forth.

[0163] The term "coupled" as used herein is defined as connected, although not necessarily directly and not necessarily mechanically. A device or structure that is "configured" in a certain way is configured in at least that way, but may also be configured in ways that are not listed.

[0164] Benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of the technology described herein or any or all the claims.

[0165] In addition, in the foregoing disclosure various features may be grouped together in various embodiments for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Inventive subject matter can lie in less than all features of a single disclosed embodiment.

[0166] The abstract of the disclosure is provided to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

[0167] It will be appreciated that the practice of some jurisdictions may require deletion of one or more portions of the disclosure after the application is filed. Accordingly, the reader should consult the application as filed for the original content of the disclosure. Any deletion of content of the disclosure should not be construed as a disclaimer, forfeiture, or dedication to the public of any subject matter of the application as originally filed. BK-2024-094-2-PCT -27-

[0168] All text in a drawing figure is hereby incorporated into the disclosure and is to be treated as part of the written description of the drawing figure.

[0169] The following claims are hereby incorporated into the disclosure, with each claim standing on its own as a separately claimed subject matter.

[0170] Although the description herein contains many details, these should not be construed as limiting the scope of the disclosure, but as merely providing illustrations of some of the presently preferred embodiments. Therefore, it will be appreciated that the scope of the disclosure fully encompasses other embodiments which may become obvious to those skilled in the art.

[0171] All structural and functional equivalents to the elements of the disclosed embodiments that are known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the present claims. Furthermore, no element, component, or method step in the present disclosure is intended to be dedicated to the public regardless of whether the element, component, or method step is explicitly recited in the claims. No claim element herein is to be construed as a "means plus function" element unless the element is expressly recited using the phrase "means for". No claim element herein is to be construed as a "step plus function" element unless the element is expressly recited using the phrase "step for". BK-2024-094-2-PCT -28-Table 1 FIG.7A Index tableBK-2024-094-2-PCT -29-Table 2 FIG.9A Index table for ϕi,jBK-2024-094-2-PCT -30-Table 3 FIG.10A Index tableBK-2024-094-2-PCT -31-

Claims

CLAIMS What is claimed is:

1. A switching bus-based regulated switched-capacitor (SC) converter apparatus, comprising: (a) one or more switched-capacitor (SC) conversion stages, each of said SC conversion stages comprising one or more SC conversion units that convert an input voltage to multiple switching bus outputs, each of said multiple switching bus outputs having a different output timing, each of said multiple switching bus outputs coupled to a SC conversion unit in a succeeding SC conversion stage; (b) wherein each said SC conversion unit accomplishes energy transfer and voltage conversion by switching current to and from one or more charge pump (flying) capacitors; (c) wherein each said switching bus output switches between two voltage levels, rather than being direct current (DC); (d) a said one of said succeeding SC conversion stages comprising a final conversion stage, said final SC conversion stage comprising multiple regulated hybrid SC units which each receive a separate output of said multiple switching bus outputs, and each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; (e) wherein each of said multiple switching bus outputs is coupled to a different said SC conversion unit or to a said regulated hybrid SC unit; and (f) a control circuit configured for generating control signals to each of the SC conversion stages to control when switches turn on and off in the SC conversion units and regulated hybrid SC units.

2. The apparatus of claim 1, wherein said control circuit comprises a switching power supply control circuit having multiple clock outputs with controllable relative phases. BK-2024-094-2-PCT -32-3. The apparatus of claim 2, wherein said control circuit can comprise a multiphase digital clock circuit, a digital sequential logic circuitry, or a microcontroller having programming to output multiphase digital clock outputs.

4. The apparatus of claim 1, wherein control signals to each of the SC conversion stages are generated in different phases, whereby control signals directed to the SC conversion units are staggered to achieve inter-module interleaved inductor currents.

5. The apparatus of claim 1, wherein said apparatus merges multiple SC conversion stages with intermediate switching buses, and does not rely on intermediate DC buses.

6. The apparatus of claim 5, wherein due to merging of multiple SC conversion stages with intermediate switching buses the apparatus does not require a decoupling capacitor to maintain a constant DC bus voltage.

7. The apparatus of claim 5, wherein due to merging of multiple conversion stages with intermediate switching buses the apparatus allows for a redundant switch to be removed on each switching bus while two stages are merged together.

8. The apparatus of claim 5, wherein due to merging of multiple conversion stages with intermediate switching buses the apparatus ensures complete soft-charging operations for all flying capacitors.

9. The apparatus of claim 1, wherein said apparatus comprises a two stage SC converter apparatus.

10. The apparatus of claim 9, wherein said two stage converter comprises a switching bus converter configured as a Dickson-Squared (Dickson2) converter. BK-2024-094-2-PCT -33-11. The apparatus of claim 9, wherein said two stage converter comprises a switching bus converter configured as a series-parallel-Dickson (SPD) converter.

12. The apparatus of claim 9, wherein said two stage converter comprises a switching bus converter configured as a cascaded series-parallel (CaSP) converter.

13. The apparatus of claim 9, wherein said two stage converter comprises a switching bus converter configured as a multi-level-binary (MLB) converter.

14. The apparatus of claim 9, wherein said two stage converter comprises a switching bus converter configured as different stages of switching bus converters.

15. The apparatus of claim 1, wherein said apparatus comprises a multiple-stage SC converter.

16. The apparatus of claim 15, wherein said multiple stage SC converter comprises a switched-capacitor binary tree (SCBT) converter, in which each SC unit directs outputs to two other (binary) SC conversion units, which are either part of a subsequent SC stage, or the final stage SC conversion units.

17. The apparatus of claim 16, wherein said final stage conversion units comprise series-capacitor buck (SCB) modules.

18. The apparatus of claim 15, wherein said multiple stage SC converter comprises a 16:1 converter.

19. The apparatus of claim 18, wherein said 16:1 converter comprises a two-stage switched-capacitor binary tree (SCBT) converter, wherein a first stage comprises a 2-to-1 SC converter, and wherein a second stage comprises two 8-to-1 series-capacitor buck (SCB) converters, and wherein said first stage and said second stage are connected through two switching buses. BK-2024-094-2-PCT -34-20. The apparatus of claim 18, wherein said 16:1 converter comprises a three-stage switched-capacitor binary tree (SCBT) converter, wherein a first and second stage comprise 2-to-1 SC converters, and wherein a third stage comprises four 4-to-1 series-capacitor buck (SCB) converters, wherein the first and second stages are connected through two switching buses, and wherein the second and third stages are connected through four switching buses.

21. The apparatus of claim 18, wherein said 16:1 converter comprises a four-stage switched-capacitor binary tree (SCBT) converter, wherein first, second, and third stages comprise 2-to-1 SC converters, and wherein a fourth stage comprises eight 2-to-1 series-capacitor buck (SCB) converters, wherein the first and second stages are connected through two switching buses, wherein the second and third stages are connected through four switching buses, and wherein the third and fourth stages are connected through eight switching buses.

22. The apparatus of claim 1, wherein said switches in said switched- capacitor (SC) converter apparatus comprise electronic switches.

23. The apparatus of claim 22, wherein said electronic switches comprise transistors.

24. A switching bus-based regulated switched-capacitor (SC) converter apparatus, comprising: (a) one or more switched-capacitor (SC) conversion stages, each of said SC conversion stages comprising one or more SC conversion units that convert an input voltage to multiple switching bus outputs, each of said multiple switching bus outputs having a different output timing, each of said multiple switching bus outputs coupled to a SC conversion unit in a succeeding SC conversion stage; (b) wherein each said SC conversion unit accomplishes energy transfer and voltage conversion by switching current to and from one or more charge pump (flying) capacitors; (c) wherein each said switching bus output switches between two voltage levels rather than a single direct current (DC) voltage; BK-2024-094-2-PCT -35-(d) a said one of said succeeding SC conversion stages comprising a final SC conversion stage, said final conversion stage comprising multiple regulated hybrid SC units which each receive a separate output of said multiple switching bus outputs, and each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; (e) wherein each of said multiple switching bus outputs is coupled to a different said SC conversion unit or to a said regulated hybrid SC unit; and (f) wherein said apparatus is configured for receiving control signals to each of the SC conversion stages to control when switches turn on and off in the SC conversion units and regulated hybrid SC units.

25. A method of performing switching bus-based regulated switched- capacitor (SC) power conversion, comprising: (a) converting an input voltage to multiple switching bus outputs through one or more SC conversion stages having SC conversion units, wherein each of said multiple switching bus outputs has a different output timing, for input to conversion units in a succeeding SC conversion stage; (b) performing energy transfer and voltage conversion in each said SC conversion unit by switching current to and from one or more charge pump (flying) capacitors; (c) switching between two voltage levels of each said switching bus output rather than outputting a single direct current (DC) voltage to a succeeding SC conversion stage; (d) receiving a separate output of said multiple switching bus outputs at a final SC conversion stage comprising multiple regulated hybrid SC units, wherein each of said multiple regulated hybrid SC units contains switching devices for switching current to and from at least one charge pump (flying) capacitor, and outputting current through at least one inductor; and (e) controlling the switching of the SC conversion stages in response to receiving control signals to each of the SC conversion stages to control when switches turn on and off in the SC conversion units and regulated hybrid SC units. BK-2024-094-2-PCT -36-

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