Packaged chip, radio frequency communication module, and communication device

Abstract

Embodiments of the present application provide a packaged chip, a radio frequency communication module, and a communication device, applied in the technical field of semiconductor packaging. The packaged chip comprises a wafer. The packaged chip further comprises at least one first attenuation element and at least one first tuning element, the first attenuation element is an equivalent capacitor or an equivalent resistor, and the first tuning element is an equivalent capacitor, an equivalent inductor or an equivalent resistor. A filtering structure is arranged on the wafer, and the filtering structure comprises a first filtering resonance structure. At least one first attenuation element is connected to a first end and a second end of the first filtering resonance structure so as to form a parallel structure with the first filtering resonance structure. A first end of each first tuning element is connected to a transmission path formed by the first end and the second end of the first filtering resonance structure and at least one first attenuation element, and a second end of each first tuning element is grounded. The embodiments of the present application significantly improve the suppression degree and / or isolation degree of the filtering device without increasing signal insertion loss.

Description

A packaged chip, radio frequency communication module and communication equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on March 8, 2024, with application number "202410269371.3" and application name "A packaged chip, radio frequency communication module and communication equipment", all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of semiconductor packaging technology, and in particular to a packaged chip, a radio frequency communication module, and a communication device. Background Art

[0003] In communication systems based on communication signals (e.g., wireless communication systems or power carrier communication systems), it is often necessary to design related devices to perform signal processing, such as filtering, on the communication signals. Numerous different packaging methods exist in the prior art for manufacturing semiconductor filter devices. Current designs of semiconductor acoustic wave filter devices suffer from spatial leakage, and regardless of the packaging method used, this spatial leakage issue cannot be avoided due to the structure of the semiconductor device.

[0004] In a related prior art, spatial leakage can be reduced by adding packaging steps, or the suppression and / or isolation of filter devices can be increased by using semiconductor design structures such as null-point cavities. However, these methods have limited performance improvements and all increase the signal insertion loss of the filter device. Summary of the Invention

[0005] The embodiments of the present application provide a packaged chip, a radio frequency communication module, and a communication device, which greatly increase the suppression and / or isolation of the filter device without increasing the signal insertion loss.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, a packaged chip is provided, which includes a wafer. The packaged chip also includes at least one first attenuation element and at least one first tuning element, the first attenuation element is an equivalent capacitor or an equivalent resistor, and the first tuning element is an equivalent capacitor, an equivalent inductor or an equivalent resistor. Wherein: a filtering structure is processed on the wafer, and the filtering structure includes a first filtering resonant structure. At least one first attenuation element is connected to the first end and the second end of the first filtering resonant structure to form a parallel structure with the first filtering resonant structure. The first end of each first tuning element is connected to the transmission path formed by the first end and the second end of the first filtering resonant structure and the at least one first attenuation element, and the second end of each first tuning element is grounded.

[0008] In an embodiment of the present application, an attenuated transmission path is formed by connecting at least one first attenuation element in parallel at both ends of the first filter resonant structure. At the same time, at least one first tuning element is short-circuited on the transmission path. The first attenuation element and the first tuning element can form a tuning structure with the first filter resonant structure. Moreover. Based on the first attenuation element and the short-circuited first tuning element, a coupling path will be formed in the packaged chip, and the coupling path can form a tuning structure with the spatial leakage at the location. For radio frequency signals within the stopband frequency range, the resonant circuit structure equivalent to the coupling path appears to be an open circuit, which can generate a transmission zero point. Through this implementation, a transmission zero point with a larger depth can be obtained to obtain a very large suppression effect and isolation effect. The attenuation element and tuning element used in this solution are compatible with existing mature packaging manufacturing processes and will not increase the manufacturing process. In addition, the application of this implementation scheme will not increase the signal insertion loss of the filter device.

[0009] In one possible embodiment, when the at least one first attenuation element includes multiple first attenuation elements, the multiple first attenuation elements are connected in series and / or in parallel. In the embodiment of the present application, multiple first attenuation elements can be designed in series and / or in parallel, depending on the different signal frequencies in the application scenario, the different selection of the packaged chip based on the application, and the different design of the packaging structure. The embodiment of the present application can achieve high suppression and high isolation while having design flexibility.

[0010] In one possible implementation, the filter structure further includes a second filter resonant structure. The first end of the second filter resonant structure is connected to the second end of the first filter resonant structure. In an embodiment of the present application, the first filter resonant structure may be a partial filter resonant structure in the filter structure. The partial filter resonant structure (i.e., the first filter resonant structure) may be tuned based on the coupling path formed by the first attenuation element and the first tuning element. Furthermore, spatial leakage at the location may be tuned.

[0011] In some examples, the packaged chip further includes at least one second attenuation element and at least one second tuning element, the second attenuation element is an equivalent capacitor or an equivalent resistor, and the second tuning element is an equivalent capacitor, an equivalent inductor, or an equivalent resistor. At least one second attenuation element is connected to the first end and the second end of the second filter resonant structure to form a parallel structure with the second filter resonant structure. The first end of each second tuning element is connected to the transmission path formed by the first end and the second end of the second filter resonant structure and the at least one second attenuation element, and the second end of each second tuning element is grounded. In an embodiment of the present application, the plurality of filter resonant structure portions in the filter structure can be respectively designed with coupling paths based on attenuation elements and tuning elements. Different coupling paths can be set at different structural positions. At the same time, different filter resonant structures can also be designed with coupling paths of different parameters to achieve better performance improvement effects.

[0012] In a possible implementation, according to different semiconductor technology-based packaged chip structures and different packaging technologies of the packaged chips, tuning elements and / or attenuation elements may be designed at different locations of the packaged chips:

[0013] In some examples, at least one first attenuation element and / or at least one first tuning element are processed on a wafer, and each first attenuation element and the filtering structure are located on the same side or different sides of the wafer, and each first tuning element and the filtering structure are located on the same side or different sides of the wafer. In an embodiment of the present application, tuning elements and attenuation elements can be designed on the wafer. In addition to tuning the filtering structure, the coupling path formed by the tuning element and the attenuation element can also tune the spatial leakage at the location of the wafer in the packaged chip.

[0014] For example, using die-sized SAW packaging (DSSP) technology to package a filter structure, a cavity structure is formed within the wafer, and the filter structure is disposed within the cavity structure. In this case, the packaged chip does not require a packaging substrate. Tuning elements and attenuation elements can be disposed within the cavity structure of the wafer, and the spatial leakage caused by these cavity structures is tuned based on the coupling path formed by the tuning elements and the attenuation elements.

[0015] In some examples, the packaged chip further includes a packaging substrate. At least one first attenuation element and / or at least one first tuning element are fabricated on the packaging substrate. The packaged chip further includes a metal connection structure. The metal connection structure is respectively connected to the first end of the first filter resonant structure, the at least one first attenuation element, and the second end of the first filter resonant structure to form a transmission path between the first end of the first filter resonant structure, the at least one first attenuation element, and the second end of the first filter resonant structure. The metal connection structure is also connected to the first end of the at least one first tuning element, such that the first end of each first tuning element is connected to the transmission path formed by the first and second ends of the first filter resonant structure and the at least one first attenuation element. In embodiments of the present application, packaged chips manufactured using some packaging technologies include a wafer and a packaging substrate. In this case, some or all components can be disposed on the packaging substrate. On the one hand, this can save wafer area overhead and avoid significantly increasing the wafer area, which in turn increases the area of ​​the packaged chip. On the other hand, when these components (such as the tuning element and / or attenuation element) are disposed on the packaging substrate, they can also be tuned with some spatial leakage at the location of the packaging substrate.

[0016] In different packaging technologies, different metal connection structures can be designed to achieve electrical connection between the filter structure on the wafer and the components on the package substrate:

[0017] For example, taking the packaging of a filter structure based on chip scale package (CSSP) technology as an example, when at least one first tuning element is processed on a packaging substrate, the metal connection structure includes a first planting ball, a second planting ball, a first solder joint, a second solder joint, and a first metal wire. The first planting ball and the second planting ball are arranged on a wafer. The first solder joint and the second solder joint are arranged on a first surface of the packaging substrate. The first planting ball is connected to the first end of the first filter resonant structure, and the second planting ball is connected to the second end of the first filter resonant structure. The first planting ball and the first solder joint are connected, and the second planting ball and the second solder joint are connected. The first solder joint and the second solder joint are connected by a first metal wire, forming a transmission path between the first end of the first filter resonant structure, the first planting ball, the second planting ball, the second end of the first filter resonant structure, and the at least one first attenuation element. The first end of each first tuning element is electrically connected to the first metal wire, and the second end of the first tuning element is grounded. In the embodiment of the present application, in the packaging technology based on CSSP, the packaging connection between the wafer and the packaging substrate is often achieved based on planting balls and solder joints. Therefore, it is also possible to use bumps and solder joints as metal connection structures to achieve electrical connections between on-wafer filter structures and components on the package substrate. Furthermore, the transmission paths formed by these metal connection structures can be tuned to the spatial leakage at the corresponding locations, thereby reducing spatial leakage and improving suppression and isolation.

[0018] For example, using surface mount device (SMD) or wafer level packaging (WLP) technology to implement the packaging of a filter structure, when at least one first tuning element is fabricated on a packaging substrate, the metal connection structure includes a first metal jumper or a metal column. When using SMD technology, the first end of the at least one first tuning element is connected to the first end of a first metal jumper, and the second end of the first metal jumper is connected to a transmission path formed by the first and second ends of the first filter resonant structure and the at least one first attenuation element. Alternatively, when using WLP technology, the first end of the at least one first tuning element is connected to the first end of a metal column, and the second end of the metal column is connected to a transmission path formed by the first and second ends of the first filter resonant structure and the at least one first attenuation element. In an embodiment of the present application, SMD technology uses jumpers to achieve electrical connection between the packaging substrate and the filter structure on the wafer. Because SMD technology creates a large cavity structure between the packaging substrate and the wafer, spatial leakage caused by this cavity structure can be tuned based on the coupling path formed by the tuning element and the attenuation element. Similarly, when using WLP technology, a cavity structure is formed between the package substrate and the wafer, and the filter structure is placed within the cavity structure. In this case, the spatial leakage caused by these cavity structures can also be tuned based on the coupling path formed by the tuning element and the attenuation element.

[0019] When the packaged chip includes a packaging substrate, in some examples, the filter structure can be disposed on the surface of the wafer. In some examples, a cavity structure is formed on the wafer, and the filter structure can be disposed within the cavity structure. At least one first tuning element is processed on the packaging substrate. In the embodiments of the present application, the structure of the wafer is not limited.

[0020] In a possible implementation, the equivalent inductance as a damping element can be obtained based on different structures:

[0021] In one example, any equivalent inductor is a winding coil or a short-circuited transmission line, and the target electrical length of the short-circuited transmission line is less than 90°. The target electrical length is the electrical length of the short-circuited transmission line at the lowest cutoff frequency in the corresponding filter bandpass range. The equivalent inductor is arranged at any of the following positions of the packaging substrate: the first surface of the packaging substrate, the inner layer of the packaging substrate, or the second surface of the packaging substrate. In an embodiment of the present application, the equivalent inductor can be designed based on the inductance of the winding coil or the short-circuited transmission line. In order to ensure the normal operation of the filtering operation, it is necessary to ensure that the target electrical length of the short-circuited transmission line is less than 90°. The winding coil and the short-circuited transmission line are conventional manufacturing structures in the semiconductor packaging process, and the equivalent inductor can be processed and manufactured based on the existing semiconductor filter device process.

[0022] In one example, any equivalent inductor is a via structure. The first end of the via structure extends from the inner layer of the package substrate to the first surface of the package substrate. The first end of the via structure is connected to the first metal transmission line, and the second end of the via structure is grounded. In the embodiment of the present application, the via structure is a metal hole-like structure, and the equivalent inductor can be designed based on its inductance characteristics. The via is a conventional manufacturing structure in the semiconductor packaging process, and the equivalent inductor can be processed and manufactured based on existing semiconductor filter device processes.

[0023] In one possible implementation, at least one first attenuation element is disposed at any of the following locations on the package substrate: the first surface of the package substrate, an inner layer of the package substrate, or the second surface of the package substrate. In embodiments of the present application, the first attenuation element can be disposed at various locations on the package substrate. Connections between the filter structure and the attenuation element, tuning element, etc. are achieved based on metal connection structures designed in the corresponding packaging technology.

[0024] In one possible embodiment, the filtering structure includes multiple external terminals. A plurality of external metal connection structures are also provided on the second side of the wafer. The multiple external terminals are connected one-to-one with the first ends of the multiple external metal connection structures. The second ends of the multiple external via transmission structures extend to the outside of the packaging substrate and are coupled one-to-one with the multiple chip external terminals. The multiple chip external terminals are external interactive ports of the packaged chip. In an embodiment of the present application, different external metal connection structures can be designed based on different packaging technologies. Based on the external metal connection structure, the filtering structure on the wafer inside the packaged chip is electrically connected to the outside of the packaged chip.

[0025] In one possible implementation, the packaged chip is a filter chip, a frequency splitter chip, a multiplexer chip, an integrated radio frequency switch, or an amplifier. In the embodiments of the present application, semiconductor filter devices may be applied to various devices in the communication system.

[0026] In a second aspect, an embodiment of the present application provides a radio frequency communication module, which includes a printed circuit board, a packaged chip and a metal connection structure. The packaged chip also includes at least one first attenuation element. The printed circuit board is provided with a first tuning element. The first attenuation element is an equivalent capacitor or an equivalent resistor, and the first tuning element is an equivalent capacitor, an equivalent inductor or an equivalent resistor. The packaged chip includes a wafer and a package substrate. A filtering structure is processed on the wafer, and the filtering structure includes a first filtering resonant structure. The package substrate is provided with at least one external via transmission structure. Among them: at least one first attenuation element is connected to the first end and the second end of the first filtering resonant structure to form a parallel structure with the first filtering resonant structure. The first end of the at least one external via transmission structure is connected to the transmission path formed by the first end and the second end of the first filtering resonant structure and the at least one first attenuation element, the second end of the at least one external via transmission structure is connected to the first end of the at least one first tuning element, and the second end of the at least one first tuning element is grounded.

[0027] In the embodiments of the present application, different tuning element values ​​can result in different transmission zero locations. Placing the tuning element on a printed circuit board frees it from the size constraints of the packaged chip. For example, a lumped inductor can be used as a tuning element. Furthermore, tuning elements can be replaced or their parameters can be modified to adapt to different application scenarios or adjust performance.

[0028] In a possible implementation, when the at least one first attenuation element includes a plurality of first attenuation elements, the plurality of first attenuation elements are connected in series and / or in parallel.

[0029] In one possible implementation, the first attenuation element is disposed at any of the following locations on the RF communication module: on a wafer, on a package substrate, and on a printed circuit board. In an embodiment of the present application, when the tuning element is disposed on a printed circuit board, the attenuation element can be designed at different locations according to design requirements.

[0030] In a possible implementation, the packaged chip is at least one of the following: a filter chip, a different-frequency power splitter chip, a multiplexer chip, an integrated radio frequency switch, or an amplifier.

[0031] In a third aspect, an embodiment of the present application further provides a radio frequency communication module, which includes a printed circuit board and a packaged chip as described in the first aspect above.

[0032] In a fourth aspect, an embodiment of the present application further provides a communication device, which includes a device housing and a radio frequency communication module, wherein the radio frequency communication module is partially or completely disposed in the device housing, and the radio frequency communication module is the radio frequency communication module described in the second aspect above, or the radio frequency communication module described in the third aspect above.

[0033] Regarding the technical principles and beneficial effects of the second, third and fourth aspects mentioned above, please refer to the relevant description of the first aspect mentioned above, and no further details will be given here. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] FIG1 is a schematic diagram of the structure of a communication system provided in an embodiment of the present application;

[0035] FIG2 is a schematic diagram of several semiconductor structures of a resonator provided in an embodiment of the present application;

[0036] FIG3 is a schematic diagram of a circuit principle of several semiconductor devices based on resonators provided in an embodiment of the present application;

[0037] FIG4 is a schematic structural diagram of a radio frequency communication module provided in an embodiment of the present application;

[0038] FIG5 is a schematic diagram of a structure of a resonator-based filtering structure processed on a wafer according to an embodiment of the present application;

[0039] FIG6 is a schematic structural diagram of several packaging structures for processing and packaging chips based on semiconductor packaging technology according to an embodiment of the present application;

[0040] FIG7 is a schematic diagram of two implementation structures of a filter structure based on adding a transmission zero point to achieve performance improvement according to an embodiment of the present application;

[0041] FIG8 is a schematic diagram of the suppression improvement effect before and after applying the structure shown in FIG7 (a) according to an embodiment of the present application;

[0042] FIG9 is a schematic diagram of forming a coupling path based on a first attenuation element and a first tuning element according to an embodiment of the present application;

[0043] FIG10 is a schematic diagram of an equivalent resonance principle for a signal in a stopband frequency range based on the coupling path shown in FIG9 , provided by an embodiment of the present application;

[0044] FIG11 is a schematic diagram of a filtering effect based on the structure shown in FIG9 according to an embodiment of the present application;

[0045] FIG12 is a schematic diagram of different designs of a first attenuation element and a first tuning element provided in an embodiment of the present application;

[0046] FIG13 is a schematic structural diagram of a filtering structure provided in an embodiment of the present application including a first filtering resonant structure and a second filtering resonant structure;

[0047] FIG14 is a schematic structural diagram of a filter structure provided in an embodiment of the present application including different filter resonant structures;

[0048] FIG15 is a schematic diagram of the structure of a filter structure provided in an embodiment of the present application based on different selection designs;

[0049] FIG16 is a schematic diagram of the structure of a tuning element and an attenuation element designed and arranged on a wafer according to an embodiment of the present application;

[0050] FIG17 is a schematic structural diagram of a tuning element or a tuning element and an attenuation element designed and arranged on a packaging substrate provided by an embodiment of the present application;

[0051] FIG18 is a schematic diagram of different selection structures of an equivalent inductor provided in an embodiment of the present application;

[0052] FIG19 is a schematic diagram of a signal suppression effect of the structure shown in FIG17 provided in an embodiment of the present application;

[0053] FIG20 is a schematic diagram of a transmit-receive isolation effect of the structure shown in FIG17 provided in an embodiment of the present application;

[0054] FIG21 is a schematic diagram of a signal insertion loss effect of the structure shown in FIG17 provided in an embodiment of the present application;

[0055] FIG22 is a schematic diagram of a structure in which a tuning element is provided on a printed circuit board according to an embodiment of the present application;

[0056] FIG23 is a schematic structural diagram of a packaged chip and a tuning element for providing a dual-channel filter on a printed circuit board according to an embodiment of the present application. DETAILED DESCRIPTION

[0057] It should be noted that the terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0058] The terms "exemplary" or "for example" in the embodiments of this application are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0059] The terms "coupling" and "connection" involved in the embodiments of this application should be understood in a broad sense. For example, they may refer to a physical direct connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors, microstrip lines, strip lines, couplers, bumps, vias, pads, solder joints, metal wires or other electronic devices.

[0060] An embodiment of the present application exemplarily provides a communication system in FIG1 . As shown in FIG1 , the communication system A1000 includes a baseband subsystem A100, a radio frequency subsystem A200, and an antenna subsystem A300. The antenna subsystem A300 includes a multiplexer A310 and an antenna ANT. The radio frequency subsystem A200 includes a radio frequency receiving channel A210 and a radio frequency transmitting channel A220. The baseband subsystem A100 includes a modulator A110 and a demodulator A120. The radio frequency receiving channel A210 is coupled to the modulator A110 and the multiplexer A310, respectively. The radio frequency transmitting channel A220 is coupled to the demodulator A120 and the multiplexer A310, respectively. Specifically:

[0061] The modulator A110 can modulate the input baseband signal to obtain a modulated intermediate frequency signal and send the intermediate frequency signal to the RF transmission channel A220. The RF transmission channel A220 includes an up-conversion mixer A221, a power amplifier A222, and a first filter A223. The up-conversion mixer A221 is used to up-convert the intermediate frequency signal to obtain a transmission RF signal. After the power amplifier A222 performs power amplification processing on the transmission RF signal and the first filter A223 performs bandpass filtering processing on the transmission RF signal, the RF transmission channel A220 outputs the processed transmission RF signal to the antenna subsystem A300. The multiplexer A310 in the antenna subsystem A300 can receive the transmission RF signal from the RF transmission channel A220 and transmit it through the radiator of the antenna ANT.

[0062] The multiplexer A310 in the antenna subsystem A300 can also receive RF signals transmitted by other wireless communication devices via the radiator of the antenna ANT and send these signals to the RF receive channel A210. The RF receive channel A210 includes a down-conversion mixer A211, a low-noise amplifier A212, and a second filter A213. The second filter A213 performs bandpass filtering on the RF signals transmitted by the multiplexer A310 in the antenna subsystem A300 to remove clutter. The low-noise amplifier A212 amplifies the filtered RF signals. The down-conversion mixer A211 down-converts the amplified RF signals to produce an intermediate frequency (IF) signal. The demodulator A120 in the baseband subsystem A100 demodulates the IF signal received from the down-conversion mixer A211 to produce a demodulated baseband signal.

[0063] For example, oscillators can be provided for modulator A110 and demodulator A120 to provide local oscillator signals required for modulation and demodulation, respectively. For example, oscillators can be provided for up-conversion mixer A221 and down-conversion mixer A211 to provide local oscillator signals required for up-conversion and down-conversion, respectively.

[0064] In the application scenario architecture shown in FIG1 , filtering may be involved in many devices. The present application embodiment provides examples of several common filtering scenarios below:

[0065] Scenario 1: In the architecture of Figure 1, the first filter A223 and the second filter A213 need to perform bandpass filtering on the input RF signal. Therefore, corresponding filtering circuit structures need to be designed in the bandpass filter devices such as the first filter A223 and the second filter A213.

[0066] Scenario 2: In the architecture of Figure 1, multiplexer A310 needs to receive a transmit RF signal from transmit RF channel A220 and transmit it via antenna ANT. It also needs to receive a receive RF signal from antenna ANT and transmit it to receive RF channel A210. Therefore, multiplexer A310 requires a corresponding filter circuit structure to filter both receive and transmit RF signals, as well as isolate the receive and transmit paths.

[0067] Scenario three, in the architecture of Figure 1, when some power amplifiers A222 are designed to be able to power amplify the transmitted RF signals of multiple frequency bands, for example, they are designed as multi-frequency shared power amplifiers based on the Doherty architecture. At this time, the transmitted RF signals of multiple frequency bands can share part or all of the power amplification circuit structure in the power amplifier A222 for power amplification. In this multi-frequency shared power amplifier, a different-frequency power divider with a filtering design structure may also be applied. In addition, in other application scenarios of the communication system A1000, a different-frequency power divider with a filtering design structure may also be applied to achieve corresponding frequency division processing.

[0068] The above examples of the embodiments of the present application are only illustrative. In actual applications, there are other scenarios where it is necessary to perform corresponding filtering processing on the RF signal based on the filtering circuit structure (such as integrated RF switches, low-noise amplifiers, etc.). Alternatively, in the application scenario of power line communication (PLC), duplexers and filters are also required to perform transmission and reception isolation and filtering processing on the communication signals. The embodiments of the present application are not described here one by one.

[0069] The filter circuit structure based on semiconductor technology can be processed and designed on the packaged chip, which can generally be divided into surface acoustic wave (SAW) filters, bulk acoustic wave (BAM) filters and film bulk acoustic resonator (FBAR) filters. These filters based on semiconductor technology are all composed of resonators. Although the structure and material of the resonator based on different types of filters may be different, these filters all form a filter resonant structure with multiple resonators in the form of a ladder topology, thereby obtaining the filter structure of the semiconductor filter. Figure 2 exemplifies the structural schematic diagram of different resonators.

[0070] The structure of the SAW resonator is shown in Figure 2 (a). A SAW resonator includes a piezoelectric material (piezoelectric) P, an interdigital structure SAW1, and a metal reflector (reflector) SAW2. Among them, the interdigital structure SAW1 and the two metal reflectors SAW2 are arranged on the surface of the piezoelectric material P. The interdigital structure SAW1 is made of metal material and can be used as an interdigital transducer (IDT). The two ends of the IDT are designed to be parallel to the two metal reflectors SAW2. Two electrodes can be drawn out on both sides of the interdigital structure SAW1 as the first end and the second end of the SAW resonator for the transmission of electrical signals.

[0071] The structure of a BAW resonator is shown in Figure 2(b). A BAW resonator includes a top electrode (TE), a piezoelectric material P, a bottom electrode (BE), an acoustic mirror (AM), and a substrate (BAM1). The acoustic mirror (AM) is disposed on the substrate (BMA1). The top and bottom ends of the piezoelectric material P are connected to the top electrode (TE) and the bottom electrode (BE), respectively. The bottom electrode (BE) is disposed on the acoustic mirror (AM), and the top electrode (TE) is connected to the acoustic mirror (AM). The bottom electrode (BE) and the top electrode (TE) serve as the first and second ends of the BAW resonator for transmitting electrical signals.

[0072] The structure of an FBAR resonator is shown in Figure 2(c). An FBAR resonator includes a top electrode (TE), a piezoelectric material (P), a bottom electrode (BE), a dielectric layer (DL), and a substrate (BAM2). An acoustic reflector (AM2) is mounted on the substrate (BAM2), and an air cavity is machined between the acoustic reflector (AM2) and the substrate (BAM2). The bottom electrode (BE) is positioned on the acoustic reflector (AM2) and spans the air cavity. The top and bottom portions of the piezoelectric material (P) are connected to the top electrode (TE) and the bottom electrode (BE), respectively. The top electrode (TE) is connected to the acoustic reflector (AM2). The bottom electrode (BE) and the top electrode (TE) serve as the first and second ends of the FBAR resonator for transmitting electrical signals.

[0073] Through the description of Figures (a), (b) and (c) of Figure 2 above, it can be seen that each resonator includes a first end and a second end for realizing the transmission of an electrical signal. It is explained above that various types of filters are based on forming a filter resonant structure with multiple resonators in the form of a ladder topology. As shown in Figure 3, the above different types of resonators are summarized by a pattern of piezoelectric material and two parallel electrodes. Multiple resonators X can form a filter resonant structure based on the ladder structure topology, or some SAW resonators can form a filter resonant structure based on a double-mode SAW (double-mode SAW, DMS) structure. Generally, the number of resonators X alternately arranged in series and parallel in the filter resonant structure formed by the ladder structure topology represents the order of the filter resonant structure. For example, as shown in Figure (a) of Figure 3, it is a 5th-order filter resonant structure formed by alternating series and parallel connections of 3 series resonators X and 2 parallel resonators X. This resonant structure can be used as a filter, or a filter structure required for other devices in the above application scenarios. As shown in FIG3(b), a dual-pass filter resonant structure is formed by two 5th-order filter resonant structures. When the two 5th-order filter resonant structures respectively filter radio frequency signals of different frequency ranges, the dual-pass filter resonant structure can be used as a dual-passband filter or a filter structure of other devices. As shown in FIG3(c), a filter structure is formed by connecting two 5th-order filter resonant structures. The first end of one 5th-order filter resonant structure and the second end of the other 5th-order filter resonant structure serve as the first external connection end and the second external connection end of the filter structure respectively. The third external connection end of the filter structure can be set at the connection between the two 5th-order filter resonant structures. According to the different designs of the signal transmission direction and transmission frequency at the three external connection ends in the actual design, the filter structure shown in FIG3(c) can be used as different devices. For example, when the first external terminal is used to transmit RF signals in a first frequency band, the second external terminal is used to transmit RF signals in a second frequency band, and the third external terminal is used to transmit RF signals in both the first and second frequency bands, FIG. 3(c) can be designed as a duplexer. For example, the first external terminal serves as the duplexer's input terminal Tx to input RF signals in the first frequency band, and the third external terminal serves as the duplexer's antenna connection terminal, connected to antenna ANT, to transmit the RF signals in the first frequency band to antenna ANT. The second external terminal serves as the duplexer's output terminal Rx to transmit RF signals in the second frequency band received from antenna ANT via the third external terminal to the second external terminal, thereby transmitting them to RF receiving channel A210 shown in FIG. Alternatively, the filtering structure shown in FIG. 3(c) can also be designed as an inter-frequency power splitter (or inter-frequency power combiner), etc. Although not shown in FIG. 3 , in actual applications, capacitors can replace some of the resonators X in the ladder topology (e.g., replacing some of the resonators X connected in series).

[0074] An embodiment of the present application provides a communication device, comprising a device housing and a radio frequency communication module. The radio frequency communication module is partially or entirely disposed within the device housing. The radio frequency communication module is used to transmit and receive radio frequency signals and perform signal processing.

[0075] In some examples, the RF communication module may include one or more components in the RF subsystem A200 shown in Figure 1. In some examples, the RF communication module may also include one or more components in the antenna subsystem A300 shown in Figure 1.

[0076] As shown in Figure 4, RF communication module 1000 includes a packaged chip 100 and a printed circuit board 200. Packaged chip 100 is disposed on printed circuit board 200. Packaged chip 100 includes a filter structure based on semiconductor technology, which can filter and process RF signals or other types of communication signals.

[0077] Exemplarily, the packaged chip 100 may be a filter chip, a different-frequency power splitter chip, a multiplexer chip, an integrated RF switch, a low-noise amplifier, a power amplifier, etc., as exemplified in the application scenarios of FIG. 1 , FIG. 2 , and FIG. 3 .

[0078] As shown in Figure 5 (a), the packaged chip 100 includes a wafer 110. A filter structure F is processed on the wafer 110. The external end of the filter structure F is electrically connected to the chip external terminal OUT outside the packaged chip 100 to realize the transmission and interaction of electrical signals between the filter structure in the packaged chip 100 and the outside of the packaged chip 100. Taking the filter structure as the 5th-order filter resonant structure shown in Figure 3 (a) as an example, the resonators X1, resonator X2, resonator X3, resonator X4 and resonator X5 in the filter resonant structure can be respectively arranged on the wafer 110 (depending on the packaging technology, they can be arranged on the surface of the wafer 110 or in the cavity inside the wafer 110). As shown in Figure 5 (b), a plurality of resonators X can be electrically connected by a metal busbar. Then, the filter structure F is packaged by a packaging technology, and an external metal connection structure is formed, and an electrical connection is formed between the external end of the filter structure F and the chip external terminal OUT of the packaged chip 100 through the external metal connection structure. Depending on the packaging manufacturing technology, the external metal connection structure formed may also be different.

[0079] In the relevant semiconductor packaging technology, there are many packaging manufacturing technologies that can realize the manufacture of the filter structure, such as chip scale package (CSSP) technology, wafer level packaging (WLP), surface mount devices (SMD) packaging technology, die-sized SAW packaging (DSSP) technology, etc. In some wafer-level and die-level packaging methods, the wafer 110 can be directly packaged to obtain the packaged chip 100. In other packaging methods, it is necessary to design a packaging substrate in the packaged chip 100, and the packaging of the wafer 110 is assisted by the packaging substrate to obtain the packaged chip 100. The following examples illustrate the design of the external metal connection structure using several related packaging technologies:

[0080] As an example of a packaging method, the packaging of the filter structure can be achieved based on wafer level packaging (WLP). As shown in FIG6 (a), a wafer 110 and a packaging substrate 120 are designed in the packaged chip 100. The packaging substrate 120 (or a supporting film) is connected to the first surface of the wafer 110. A cavity structure is formed on the interface between the packaging substrate 120 and the wafer 110, and the filter structure F is arranged on the first surface of the wafer 110 and located within the cavity structure. In this case, the external metal connection structure may include a metal column MP and a solder ball (also known as a bump) BP. The metal column MP is arranged in the packaging substrate 120 and is located at the connection between the packaging substrate 120 and the wafer 110. The solder ball BP is arranged on the outer surface of the packaging substrate 120. The metal column MP is electrically connected to the external end of the filter structure F and the solder ball BP respectively to achieve electrical connection between the external end of the filter structure F and the solder ball BP. This allows the external end of the filter structure F to transmit signals to the outside of the packaged chip 100.

[0081] As a second example of packaging method, the packaging of the filter structure can be achieved based on the surface mount device (SMD) packaging technology. As shown in Figure 6 (b), the packaging substrate 120 and the wafer 110 are packaged and arranged in a packaging shell. A cavity structure is processed and arranged on the packaging substrate 120, and the wafer 110 is arranged on the packaging substrate 120 and is located in the cavity structure. The filter structure F is arranged on the upper surface of the wafer 110. At this time, the external metal connection structure may include an external via transmission structure V1 and a metal jumper (wire bonding) WB. The external via transmission structure V1 is a through hole that passes through the packaging substrate 120. The external end of the filter structure F located on the first side of the packaging substrate 120 is electrically connected to the first end of the external via transmission structure V1 through the metal jumper WB. The second end of the external via transmission structure V1 forms an electrical connection between the second side of the packaging substrate 120 and the chip external terminal OUT located outside the packaging shell.

[0082] As a third example of packaging, the filter structure can be packaged based on die-sized SAW packaging (DSSP) technology. As shown in FIG6 (c), the wafer 110 in the packaged chip 100 includes an upper wafer (cap wafer), a lower wafer (functional wafer, also known as bottom functional) and a support frame (frame) FRA. The upper wafer and the lower wafer are docked based on the support frame to form a cavity structure in the docking surface. The filter structure F can be arranged in the vacant structure. At this time, the external metal connection structure can include an interconnect line (interconnect line) ICL and a planting ball BP. The external end of the filter structure F is electrically connected to the outside through the support frame FRA, the interconnect line ICL and the planting ball BM. FIG6 (c) illustrates that the filter structure F is arranged in the cavity structure and is located on the lower wafer. Although not shown in the figure, the filter structure can also be arranged at a position on the upper wafer in the cavity structure. In addition, although not shown in the figure, an external via transmission structure (such as a through hole) can also be designed in the upper wafer, and the filtering structure in the cavity structure (which can be set on the upper wafer and / or the lower wafer) is connected to the implant ball BP through the external via transmission structure.

[0083] Example 4 of packaging method: The packaging of the filter structure can be achieved based on chip scale package (CSSP) technology. As shown in Figure 6 (d), a filter structure F is provided on the wafer 110. The external metal connection structure may include a planting ball BP, a solder joint PAD and an external via transmission structure V1. The planting ball BP is provided on the wafer 110 (it can be located on the same surface as the filter structure F or at a different position). The external end of the filter structure F is electrically connected to the planting ball BP. A solder joint is provided on the packaging substrate 120, and the wafer 110 is docked with the solder joint PAD through the planting ball BP to achieve docking with the packaging substrate 120. The solder joint PAD is electrically connected to the first end of the external via transmission structure V1 in the packaging substrate 120. The second end of the external via transmission structure V1 is electrically connected to the chip external terminal OUT of the packaging chip 100, so as to realize external signal transmission of the external end of the filter structure F through the chip external terminal OUT.

[0084] The above packaging methods are only exemplary. In actual applications, there may be more packaging methods to realize the design of the external metal connection structure, and the embodiments of the present application will not be described in detail here.

[0085] In the design of the filter structure, the design performance of the filter structure can be measured and evaluated based on electrical performance parameters such as the insertion loss (IL) of signal transmission and the filtering suppression of out-of-band signals. In addition, for multiplexer devices such as duplexers, signal isolation can be added as an evaluation indicator, such as the isolation between the transmitter and receiver. Among them, insertion loss refers to the energy lost from the input port to the output port within the passband frequency range of the filter structure. Suppression refers to the signal energy leaked from the input port to the output port within the stopband frequency range of the filter structure. As shown in Figure 3 (c), isolation is the signal energy leaked between the receiving path and the transmitting path. Usually, insertion loss, suppression and isolation can all be expressed in dB.

[0086] In the current design of semiconductor acoustic wave filter devices, no matter what packaging method is used (such as the several packaging methods provided in Figure 6), the space leakage problem caused by semiconductor devices cannot be avoided. Space leakage refers to the phenomenon that when a signal propagates in a semiconductor acoustic wave filter, due to the limitations of material properties and structure, a part of the signal energy will be scattered, absorbed or leaked into the surrounding environment, resulting in a decrease in filtering ability. There are many reasons for the possibility of space leakage in the filter device, such as space leakage in the wafer 110, space leakage in the cavity structure on the semiconductor device, or packaging leakage caused by the package structure. Because the size of the semiconductor acoustic wave filter device is very small, it is technically impossible to completely avoid the space leakage problem on the finished product. These space leakage problems will lead to the deterioration of the isolation and suppression of the filter device, thereby affecting the performance of the filter device. In addition, in some scenarios with high isolation requirements, if the leakage amplitude of these space leakages is greater than the isolation requirement, it may even cause the filter device to fail to meet the needs of actual applications.

[0087] In order to improve the performance of filtering devices (such as improving suppression and isolation, etc.), relevant technologies are mainly optimized from two aspects: one is to minimize the deterioration of suppression and isolation caused by spatial leakage; the other is to increase suppression and isolation.

[0088] To mitigate the degradation of suppression and isolation caused by spatial leakage, key approaches include designing the metal package surface to reduce spatial leakage and dividing the filter structure F across multiple dies to reduce spatial leakage on a single die. However, these approaches increase chip processing steps, significantly increasing manufacturing costs. Furthermore, these approaches cannot completely eliminate all spatial leakage, and their effectiveness is limited.

[0089] In terms of increasing suppression and isolation, there are mainly the following ways:

[0090] Method 1: Increase the order of the filter resonant structure, that is, increase the number of resonators X in the filter resonant structure shown in Figure 3. However, this application method is limited by the area overhead of a single packaged chip 100 and other limitations, and there is a clear upper limit on the number of resonators X. At the same time, although this method can improve the suppression of the filter device, it will cause an increase in insertion loss. In addition, due to the constant presence of spatial leakage, the effect of improving the suppression is relatively limited.

[0091] Method 2: Cascading multiple filter chips. However, this method does not improve the chip itself; it only benefits from increasing the number of chips. This method increases costs and increases insertion loss.

[0092] Method three: increase the transmission zero point of the filter device. For example, a zero-point cavity is designed in the packaged chip 100, and the transmission zero point is increased through the zero-point cavity. The depth of the transmission zero point increased by the zero-point cavity is generally shallow, and the effect of improving the suppression and isolation is very limited. In addition, the method of increasing the zero-point cavity will also increase the insertion loss of the filter device. For another example, as shown in Figure 7 (a), a series capacitor Ca, an equipotential body U and a capacitor Cb can be designed. The capacitor Ca, the equipotential body U and the capacitor Cb are connected in parallel with the filter structure F to form a special resonant structure to improve the out-of-band suppression of the filter device. Taking the transmission structure of a certain duplexer using the structure shown in Figure 7 (a) as an example, its frequency-suppression response relationship is shown in Figure 8. The dotted curve in Figure 8 is the curve change of the frequency-suppression response relationship when the transmission structure of the duplexer adopts the structure shown in Figure 7 (a). The solid line in Figure 8 is the curve change of the frequency-suppression response relationship when the transmission structure of the duplexer does not adopt Figure 7 (a). The frequency range within the two dotted vertical lines is the passband frequency range of the transmission structure. For the transmission structure, it is necessary to achieve the filtering function within the channel frequency range and the function of suppressing the signal filtering within the stopband frequency range. Depending on the actual application and design, the filtering device (such as the duplexer) can operate in different frequency bands. Taking the duplexer operating in the B3 frequency band (receiving frequency range 1710MHz-1785MHz, transmitting frequency range 1805MHz-1880MHz) as an example, it can be seen from Figure 8 that for the transmitting structure, it is necessary to implement the filtering function within the transmitting frequency range of 1805MHz-1880MHz, and the receiving frequency range of 1710MHz-1785MHz needs to be suppressed within its stopband frequency range. It can be seen that this method can only improve the suppression degree within a very small frequency range (for example, a small range around 1.749GHz), and its effect is very limited, just like the effect of using a zero-point cavity. In addition, this implementation method also leads to a deterioration of the suppression degree at some frequency positions where the suppression degree needs to be improved. For example, the suppression degree at the frequency positions of 1.71GHz and 1.785GHz is reduced. For another example, as shown in Figure 7(b), multiple capacitors C can be connected in series on the serial path of the filter structure F, and an inductor L can be connected in parallel to the filter structure F. Based on the resonance formed by the inductor L and the multiple capacitors C connected in series, additional transmission zeros are generated to improve the suppression and isolation. However, the solution in Figure 7(b) is difficult to implement in actual applications. On the one hand, if this solution wants to have a good effect, it usually requires an inductor device of the uH order. The size of the inductor device of this order is usually very large and difficult to integrate inside the chip. Even if some very complex processing design methods are used for integration, the area overhead of the final chip product will be very large, making it difficult to achieve miniaturized applications.On the other hand, if the solution is implemented in the form of discrete components (such as lumped inductors), the actual improvement effect will have a large effect loss and gap compared to the ideal effect of circuit simulation.

[0093] In order to reduce the spatial leakage problem of the filter device and improve the performance of the filter device, the embodiment of the present application is based on the improvement idea of ​​increasing the transmission zero point, and proposes to construct a coupling path between the input and output ends of the filter resonant structure that needs to be optimized in the filter structure, and realize the performance improvement of the corresponding filter resonant structure through the coupling path. Taking the optimization of the filtering performance of the first filter resonant structure in the filter structure as an example, the coupling path includes at least one first attenuation element and at least one first tuning element. As shown in Figure 9, the first filter resonant structure XZ1 forms a parallel structure with each first attenuation element S1 in the at least one first attenuation element S1, and the first end of each first tuning element T1 in the at least one first tuning element T1 is connected to the transmission path formed by the first and second ends of the first filter resonant structure XZ1 and the at least one first attenuation element S1, and the second end of each first tuning element T1 is grounded. The first attenuation element S1 can be an equivalent capacitor or an equivalent resistor. The first tuning element T1 can be an equivalent inductor, an equivalent capacitor or an equivalent resistor. When the at least one first attenuation element S1 includes multiple first attenuation elements S1, the multiple first attenuation elements S1 can be connected in different ways (e.g., in parallel, in series, or in a combination of series and parallel). Similarly, when the at least one first tuning element T1 includes multiple first tuning elements T1, each first tuning element T1 can be positioned at any location on the transmission path. For the example of the connection relationship when multiple first attenuation elements S1 or first tuning elements T1 are provided as shown in FIG9 , please refer to the relevant description of the embodiment of FIG12 below.

[0094] In the embodiment of the present application, taking the coupling path structure shown in FIG9 as an example in the filter structure F, when the filter structure F is working, for radio frequency signals outside the passband frequency range (i.e., within the stopband frequency range), the coupling path and the first filter resonant structure XZ1 and the spatial leakage at the location (i.e., the spatial leakage at the semiconductor structure where it is located) will be equivalent to a resonant circuit connected in parallel at the first filter resonant structure XZ1. The specific equivalent principle diagram is shown in FIG10. For radio frequency signals within the stopband frequency range, the resonant circuit structure equivalent to the coupling path is open circuit, which can generate a transmission zero. In this process, at least one first attenuation element S1 can attenuate the out-of-band signal, and the parameter value of the transmission zero can be adjusted by adjusting the design of at least one first tuning element T1. As shown in FIG11, it is a schematic diagram of the filtering effect of the filter structure F based on the structure shown in FIG9. The horizontal axis in FIG11 is the frequency range, the vertical axis represents the filtered signal energy size (in dB), the solid line is the frequency-signal energy change curve when the coupling path is not used, and the dotted line is the frequency-signal energy change curve of the filtered signal after the coupling path is used. The area between the two vertical dashed lines represents the passband frequency range of the filter structure F, while the remaining area represents the stopband frequency range. It can be seen that the design of the coupling path creates a resonant transmission zero within the stopband frequency range indicated by the circle, significantly improving the suppression and isolation of out-of-band signals. Furthermore, the coupling path constructed using the first attenuation element S1 and the first tuning element T1 in this solution does not increase the signal insertion loss of the original filter structure.

[0095] In summary, the coupling path constructed by the first attenuation element S1 and the first tuning element T1 has the following advantages: Advantage 1. Compared with the transmission zero points added by using a zero-point cavity and an equipotential body, the added transmission zero points have a greater depth and higher suppression and isolation. Advantage 2. This solution will not significantly increase the signal insertion loss, while the above-mentioned solution will also cause a deterioration in the signal insertion loss when the improvement in suppression and isolation is limited. Advantage 3. Although an equivalent inductor is used in the coupling path, the coupling path has a low requirement for the inductance value of the inductor, which makes it easy to realize the integrated miniaturization design of the device. In addition, the first tuning element T1 and / or the first attenuation element S1 in the coupling path can be manufactured based on the mature preparation process of the semiconductor filter structure, and the first tuning element T1 and / or the first attenuation element S1 can be integrated into the semiconductor device without adding new processes.

[0096] In some possible embodiments, when at least one first attenuation element S1 includes multiple first attenuation elements S1, the multiple first attenuation elements S1 are connected in series and / or in parallel. For example, taking the first attenuation element S1 as an equivalent capacitor and the first tuning element T1 as an equivalent inductor as an example, in one example, as shown in FIG12(a), two first attenuation elements S1 may be connected in parallel between the first end and the second end of the first filtering resonant structure XZ1, and the two first attenuation elements S1 may be connected in series. In one example, as shown in FIG12(b), two first attenuation elements S1 as equivalent capacitors may be connected in parallel and then connected in series with one first attenuation element S1 as an equivalent capacitor.

[0097] For example, taking the case where the plurality of first attenuation elements S1 include a first attenuation element S1 that is an equivalent capacitor and a first attenuation element S1 that is an equivalent resistor, and the first tuning element T1 is an equivalent inductor, in one example, as shown in FIG12(c), a first attenuation element S1 that is an equivalent capacitor and a first attenuation element S1 that is an equivalent resistor are connected in parallel and then in series with a first attenuation element S1 that is an equivalent capacitor C. In one example, as shown in FIG12(d), a first attenuation element S1 that is an equivalent resistor and two first attenuation elements S1 that are equivalent capacitors are connected in series. In FIG12(a), FIG12(b), FIG12(c), and FIG12(d), the first attenuation element S1 forms a parallel structure with the first filtering resonant structure XZ1.

[0098] For example, a first tuning element T1 is short-circuited across the transmission path formed by multiple first attenuation elements S1. The above is merely an example. In actual designs, there is no limit to the number of first tuning elements T1 and first attenuation elements S1. A greater number of first tuning elements T1 can be short-circuited across the transmission path formed by multiple first attenuation elements S1. For example, in FIG12(e), only one first attenuation element S1 can be designed, while two first tuning elements T1 can be designed. In FIG12(f), multiple first attenuation elements S1 and multiple first tuning elements T1 can be designed.

[0099] For example, the above-described exemplary figures illustrate the first tuning element T1 as an equivalent inductor. Alternatively, the first tuning element T1 may have other structures. In one example, as shown in FIG12(g), a short-circuited transmission line (e.g., a short-circuited transmission line with an electrical length of 0°) may be equivalent to an inductor, thereby serving as the first tuning element T1. In another example, as shown in FIG12(h), an equivalent resistor and an equivalent capacitor may be used as the first tuning element T1.

[0100] In some possible implementations and application scenarios, as shown in FIG12(i), some resonators X in the ladder structure are designed to be connected to an inductor before being grounded. In this case, these resonators X that require an inductor connection can be designed to be connected to a first tuning element T1 that serves as an equivalent inductor.

[0101] In some possible implementations, as shown in FIG13(a), the filter structure F may further include a second filter resonant structure XZ2, wherein the first end of the second filter resonant structure XZ2 is connected to the second end of the first filter resonant structure XZ1. In the above-mentioned embodiment of the present application, when the filter structure F only includes the first filter resonant structure XZ1, the design of the transmission zero point is achieved by designing the parallel coupling path of the entire filter structure F. In the embodiment shown in FIG13(a) of the present application, the filter structure F may include multiple filter resonant structures, and the coupling path may also be connected in parallel to only some of the filter resonant structures in the filter structure F.

[0102] In some possible embodiments, as shown in FIG13(b), the packaged chip 100 further includes at least one second attenuation element S2 and at least one second tuning element T2. The second attenuation element S2 is an equivalent capacitor or an equivalent resistor. The second tuning element T2 is an equivalent capacitor, an equivalent inductor, or an equivalent resistor. The at least one second attenuation element S2 is connected to the first and second ends of the second filter resonant structure XZ2 to form a parallel structure with the second filter resonant structure XZ2. The first end of each second tuning element T2 is connected to the transmission path formed by the first and second ends of the second filter resonant structure XZ2 and the at least one second attenuation element S2, and the second end of each second tuning element T2 is grounded. In the embodiment shown in FIG13(b) of the present application, the filter structure F includes multiple filter resonant structures, and corresponding coupling paths can be designed for different filter resonant structure parts. For the specific technical principles and beneficial effects of the coupling path formed by the second attenuation element S2 and the second tuning element T2, reference can be made to the above-mentioned description of the first attenuation element S1 and the first tuning element T1, which will not be repeated here.

[0103] In some possible implementations, the filtering structure may be based on a ladder structure, a ladder combined with a DMS structure, or a DMA structure. For example, the ladder structure may be based on an acoustic wave resonator, a combination of an acoustic wave resonator and a capacitor (replacing part of the resonator), or a combination of an acoustic wave resonator and an electromagnetic resonator.

[0104] Exemplarily, the filter structure can be based on a ladder structure, and the ladder structure is based on an acoustic wave resonator. In one example, as shown in Figure 14 (a), the filter structure F includes a first filter resonant structure XZ1 that is a 5th-order filter resonant structure, and the coupling path formed by the first tuning element T1 and the first attenuation element S1 is connected in parallel at both ends of the filter structure F. In one example, as shown in Figure 14 (b), the filter structure F includes a first filter resonant structure XZ1, and the first filter resonant structure XZ1 is a dual-passband filter structure including two 5th-order filter resonant structures. The coupling path formed by the first tuning element T1 and the first attenuation element S1 is connected in parallel at both ends of the filter structure F. In one example, as shown in Figures 14 (c) and (d), the filter structure F is a duplexer, and the first filter resonant structure XZ1 can be the filter resonant structure corresponding to the receiving end Tx of the duplexer. Similarly, the second filter resonant structure XZ2 can be the filter resonant structure corresponding to the transmitting end Rx of the duplexer. In FIG14(c), a corresponding coupling path may not be designed at the second filter resonant structure XZ2. In FIG14(d), a coupling path based on the second tuning element T2 and the second attenuation element S2 may also be designed at the second filter resonant structure XZ2. In one example, as shown in FIG14(e) and FIG14(f), the filter structure F is a duplexer, and the first filter resonant structure XZ1 and the second filter resonant structure XZ2 may be part of the corresponding filter resonant structure at the receiving end Tx of the duplexer, respectively. In FIG14(e), a corresponding coupling path may not be designed at the second filter resonant structure XZ2. In FIG14(f), a coupling path based on the second tuning element T2 and the second attenuation element S2 may also be designed at the second filter resonant structure XZ2.

[0105] Exemplarily, as shown in FIG15(a), the first filter resonant structure XZ1 of the filter structure F can be based on a ladder structure and a DMS structure. Exemplarily, as shown in FIG15(b), the first filter resonant structure XZ1 of the filter structure F can be based on a ladder structure, and the first filter resonant structure XZ1 is a filter resonant structure based on the combination of an acoustic wave resonator and a capacitor. Exemplarily, as shown in FIG15(c), the filter structure can be based on a ladder structure, and the first filter resonant structure XZ1 in the ladder structure is a filter resonant structure based on the combination of an acoustic wave resonator and an electromagnetic resonator. Exemplarily, as shown in FIG15(d), the filter structure can be based on a ladder structure, and the ladder structure of the filter structure F is a filter resonant structure based on the combination of an acoustic wave resonator and an electromagnetic resonator. The first filter resonant structure XZ1 in FIG15(d) can be a filter resonant structure portion based on an acoustic wave resonator.

[0106] The embodiments in FIG. 14 and FIG. 15 are merely several examples of the design of the filtering structure F. In actual applications, adaptive transformation design can be performed based on the ideas in the above examples and other design ideas that are not exhaustive.

[0107] In some possible implementations, the equivalent capacitors and / or equivalent resistors used as attenuation elements and / or tuning elements can be designed in various ways. For example, interdigital capacitors, plate capacitors, parallel wire equivalent capacitors, or lumped capacitors can be used as equivalent capacitors. Similarly, structures with a certain resistance value can also be designed as equivalent resistors.

[0108] In some possible implementations, the equivalent inductor used as the tuning element may be designed in different ways, for example, using a winding coil, a short-circuited transmission line, a via, or a lumped inductor as the equivalent inductor.

[0109] In some possible implementations, depending on the packaging technology and design requirements, the coupling path can be designed at different locations on the RF communication module 1000 or the packaged chip 100. According to the above principle description, the coupling path can be tuned with the filter resonant structure connected in parallel with the filter structure F and the spatial leakage structure at the location of the coupling path to improve the suppression degree. Therefore, according to the selection of product design parameters, different application scenarios, different packaging structures, etc., adaptive selection and design can be carried out. The following are examples of several common packaging structure types:

[0110] In Example 1, at least one first attenuation element S1 and / or at least one first tuning element T1 are fabricated on wafer 110. In this case, each first attenuation element S1 and the filter structure F are located on the same surface or different surfaces of wafer 110, and each first tuning element T1 and the filter structure F are located on the same surface or different surfaces of wafer 110. In an embodiment of the present application, the filter structure F can be designed on wafer 110. Depending on the design, the filter structure F can be located on the same structural surface as the elements in the coupling path, or on different structural surfaces. For example, taking the wafer-level package shown in FIG6(a) as an example, the filter structure F is disposed within the cavity structure of wafer 110, and some or all elements in the coupling path (e.g., attenuation elements and / or tuning elements) can be designed within wafer 110, and different elements can be disposed on the same surface or different surfaces as the filter structure F. The first attenuation element S1 and the first tuning element T1 can be electrically connected to the filter structure F using a metal connection structure. The metal connection structure can be a via, a metal transmission line, a bump, a pad, or other structures.

[0111] For example, as shown in FIG16 , FIG16 (a) is a circuit schematic diagram of a duplexer with a coupling path. The duplexer includes a 7th-order resonant filter structure (i.e., a first filter resonant structure XZ1) on the transmitter side and a 7th-order resonant filter structure (i.e., a second filter resonant structure XZ2) on the receiver side. FIG16 (b) is a wafer design structure diagram obtained by designing the schematic diagram of FIG16 (a). In the figure, the resonators X1, X2, X3, and X4 in the first filter resonant structure XZ1 and the resonators X5, X6, and X7 are connected based on metal wires, and the first end of the resonator X1 serves as the external connection end of the filter structure with respect to the transmitter Tx. The resonators X8, X9, X10, and X11 in the second filter resonant structure XZ2 and the resonators X12, X13, and X14 are also connected based on metal wires. The connection between the second end of resonator X4 and the first end of resonator X8 leads to an external terminal that serves as the external terminal for connecting the duplexer to antenna ANT. The first end of resonator X1 serves as the external terminal for connecting the duplexer to the transmitter Tx of RF transmit channel A220. The second end of resonator X11 serves as the external terminal for connecting the duplexer to the receiver Rx of RF receive channel A210. Two first attenuation elements S1 (e.g., interdigital capacitors with equivalent capacitance) are connected in parallel between the first and second ends of the first filter resonant structure XZ1 (i.e., between the external terminal with respect to Tx and the external terminal with respect to ANT). A metal coil is designed on wafer 110 to form an equivalent inductor, which serves as the first tuning element T1. Similarly, two second attenuation elements S2 (e.g., interdigital capacitors with equivalent capacitance) can also be connected in parallel between the first and second ends of the second filter resonant structure XZ2 (i.e., between the external terminal with respect to Rx and the external terminal with respect to ANT). A metal coil is designed on the wafer 110 to form an equivalent inductor to serve as the second tuning element T2.

[0112] In one example, in the application scenario shown in FIG16(b), an external metal connection structure can be designed on the packaged chip 100 to achieve electrical connection between the filter structure F and the outside of the packaged chip 100. Taking the packaging of the filter structure F based on the chip scale package (CSSP) technology shown in FIG6(d) as an example, as shown in FIG16(b), the external metal connection structure can include a ball BPRx, a ball BPTx, a ball BPANT, and a ball BPGND. Among them, the ball BPRx corresponds to the external metal connection structure of the external terminal of the receiving terminal Rx on the wafer 110. The ball BPTx corresponds to the external metal connection structure of the external terminal of the transmitting terminal Tx on the wafer 110. The ball BPANT corresponds to the external metal connection structure of the external terminal of the antenna ANT on the wafer 110. The ball BPGND corresponds to the external metal connection structure of the connection terminal for grounding in the filter structure F. Regarding the specific principles and structures for electrically connecting the bumps BPRx, BPTx, BPANT, and BPGND on the wafer 110 to the package substrate 120, reference can be made to the description of the external metal connection structure in FIG6(d), which will not be repeated here. Furthermore, although not shown in FIG16(b), the design of the external metal connection structure can also be implemented based on other packaging technologies. Regarding the design of other external metal connection structures, reference can be made to the description of the embodiment in FIG6, which will not be repeated here.

[0113] In a second example, for a packaged chip 100 including a package substrate 120, the attenuation elements and / or tuning elements in the coupling path can be partially or completely designed on the package substrate 120. In this case, for the attenuation elements and / or tuning elements designed on the package substrate 120, a metal connection structure needs to be designed to electrically connect the attenuation elements and / or tuning elements on the package substrate 120 with the filter structure F on the wafer 110 to form a transmission path for the coupling path. For example, at least one first attenuation element S1 and / or at least one first tuning element T1 in the first filter resonant structure XZ1 can be processed on the package substrate 120. In this case, the metal connection structure is respectively connected to the first end of the first filter resonant structure XZ1, the at least one first attenuation element S1, and the second end of the first filter resonant structure XZ1 to form a transmission path between the first end of the first filter resonant structure XZ1, the at least one first attenuation element S1, and the second end of the first filter resonant structure XZ1. The metal connection structure is also connected to the first end of at least one first tuning element T1, so that the first end of each first tuning element T1 is connected to the transmission path formed by the first end and the second end of the first filtering resonant structure XZ1 and the at least one first attenuation element S1. In the embodiment of the present application, the role of the metal connection structure is to achieve electrical connection between the elements on the packaging substrate 120 and the filtering structure on the wafer 110, so that the various elements located at different positions can form a coupling path normally. Different packaging technologies can design different metal connection structures. The embodiment of the present application does not limit the design of the metal connection structure. The following is an exemplary example of designing the tuning element on the packaging substrate:

[0114] For example, at least one first tuning element T1 can be fabricated on a packaging substrate 120 based on the chip scale package (CSSP) technology shown in FIG. 6( d ). In this case, the metal connection structure includes a first planting ball, a second planting ball, a first solder joint, a second solder joint, and a first metal wire. The first planting ball and the second planting ball are disposed on the wafer 110. The first solder joint and the second solder joint are disposed on the first surface of the packaging substrate 120. The first planting ball is connected to the first end of the first filter resonant structure XZ1, and the second planting ball is connected to the second end of the first filter resonant structure XZ1. The first planting ball is connected to the first solder joint, and the second planting ball is connected to the second solder joint. The first solder joint and the second solder joint are connected by a first metal wire, forming a transmission path between the first end of the first filter resonant structure XZ1, the first planting ball, the second planting ball, the second end of the first filter resonant structure XZ1, and the at least one first attenuation element S1. The first end of each first tuning element T1 is electrically connected to the first metal wire, and the second end of the first tuning element T1 is grounded. In one example, the first tuning element T1 can be designed to be located on the same surface of the package substrate 120 as the first and second solder joints, that is, the first tuning element T1 is located on the surface of the package substrate 120 that interfaces with the wafer 110. In this case, assuming that the filter structure F is the filter structure of the duplexer shown in FIG16(a), the first filter resonant structure XZ1 on the wafer 110 is the filter resonant structure for Tx to ANT, and the second filter resonant structure XZ2 is the filter resonant structure for ANT to Rx, the first bump BP1 is connected to the first end of the first filter resonant structure XZ1 (that is, the external connection end of the filter structure F corresponding to Tx), and the second bump BP2 is connected to the second end of the first filter resonant structure XZ1 (that is, the external connection end of the filter structure F corresponding to ANT). As shown in FIG17, a first attenuation element S1 is disposed between the first bump BP1 and the first end of the first filter resonant structure XZ1, and another first attenuation element S1 is disposed between the second bump BP2 and the second end of the first filter resonant structure XZ1. The wafer 110 and the package substrate 120 are docked via the first planting ball BP1 docking with the first solder joint PAD1, and the second planting ball BP2 docking with the second solder joint PAD2. On the docking surface of the package substrate 120, the first metal wire Line1 connects the first solder joint PAD1 and the second solder joint PAD2 to form a transmission path between the first end of the first filter resonant structure XZ1, the first planting ball BP1, the first solder joint PAD1, the first metal wire Line1, the second solder joint PAD2, the second planting ball BP2, the two first attenuation elements S1, and the second end of the first filter resonant structure XZ1. This transmission path and the first filter resonant structure XZ1 form a parallel resonant structure. At the same time, this transmission path also forms a resonant tuning with the spatial leakage structure at its location.At this point, a first tuning element T1 can be designed on the package substrate 120, with the first end of the first tuning element T1 connected to the first metal line Line1, and the second end of the first tuning element T1 grounded. Depending on the type of the first tuning element T1, different design methods can be used. For example, the first tuning element T1 is an equivalent inductor, which is a winding coil or a short-circuited transmission line. As shown in FIG17(a), the first tuning element T1 as an equivalent inductor can be designed on the mating surface of the package substrate 120, directly connected to the first metal line Line1, and grounded through a grounded via structure via on the package substrate 120. As shown in FIG17(b), the first tuning element T1 as an equivalent inductor can be designed on the non-mating surface of the package substrate 120, connected to the first metal line Line1 through a via structure via, and grounded. Although not shown in the figure, the first tuning element T1 can also be designed on the inner side of the package substrate 120. FIG17(c) is an example of a structure on a wafer 110 based on the packaging method shown in FIG17(a) and FIG17(b).

[0115] In Figures (a), (b), and (c) of Figure 17 , a first attenuation element S1 is processed on wafer 110 for illustration. In this case, any first attenuation element S1 is connected in series between the first bump and the first end of the first filter resonant structure XZ1, or between the second bump and the second end of the first filter resonant structure XZ1. In another example, as shown in Figure 17 (d), when the first tuning element T1 and the two first attenuation elements S1 are both provided on the package substrate 120, the bump BPTx associated with Tx in the packaged chip 100 can be reused as the first bump BP1, the bump BPANT in the packaged chip 100 can be reused as the second bump BP2 and the third bump BP3, and the bump BPRx in the packaged chip 100 can be reused as the fourth bump BP4. Furthermore, the first attenuation element S1 can be provided in the transmission path between the first solder pad PAD1 corresponding to the first bump BP1 and the second solder pad PAD2 corresponding to the second bump BP2.

[0116] For example, when the tuning element is an equivalent inductor, it can be a winding coil as shown in FIG18(a). Alternatively, it can be a short-circuited transmission line as shown in FIG18(b), where the target electrical length of the short-circuited transmission line is less than 90°. The target electrical length is the electrical length of the short-circuited transmission line at the lowest cutoff frequency in the corresponding filter bandpass range. It can be a lumped inductor as shown in FIG18(c). It can also be an equivalent inductor obtained by a via transmission structure as shown in FIG18(d).

[0117] In the above embodiment of Example 2, based on the packaging technology of Figure 6 (d), the metal connection structure is implemented by ball planting and solder joints. Similarly, the packaging technology of Figure 6 (b) or Figure 6 (a) can also be used to design the metal connection structure. When at least one first tuning element T1 is processed on the packaging substrate 120, the metal connection structure can include a first metal jumper or a metal column. Wherein: the first end of the at least one first tuning element T1 is connected to the first end of the first metal jumper, and the second end of the first metal jumper is connected to the transmission path formed by the first end and the second end of the first filter resonant structure XZ1 and the at least one first attenuation element S1. Alternatively, the first end of the at least one first tuning element T1 is connected to the first end of the metal column, and the second end of the metal column is connected to the transmission path formed by the first end and the second end of the first filter resonant structure XZ1 and the at least one first attenuation element S1.

[0118] In addition, in some packaging technologies (such as those shown in FIG. 6 ), the wafer 110 itself may have a cavity structure, or may form a cavity structure with other structures. The filter structure F may be designed within the cavity structure. When at least one first tuning element T1 is fabricated on the packaging substrate 120, the various packaging technologies described in the above embodiments may also be used to implement the design of metal connection structures (such as bumps, solder joints, vias, jumpers, and metal pillars).

[0119] For the specific technical principles and beneficial effects of the first attenuation element S1, the second attenuation element S2, and the second tuning element T2 disposed on the package substrate 120, please refer to the description of the external metal connection structure and the related embodiments regarding the metal connection structure design of the first tuning element T1, and will not be repeated here. FIG19 shows a schematic diagram of the signal suppression effect after designing a coupling path for the first filter resonant structure XZ1 or the second filter resonant structure XZ2 (i.e., the filter resonant structure between ANT and Rx or the filter resonant structure between Tx and ANT in the duplexer shown in FIG17 ). The dashed line in FIG19 shows the frequency-passed signal strength curve without the coupling path, and the solid line in FIG19 shows the frequency-passed signal strength curve after the coupling path is designed. It can be seen that the pass-through signal strength of the out-of-band signal is significantly reduced. In a duplexer, a transceiver isolation design is required between the transmitter and receiver. For example, a coupling path is designed for the filter structure between the transmitter Tx and the antenna ANT. FIG20 shows the frequency-passed signal strength curve. The dashed line in Figure 20 shows the frequency-passband signal strength curve without the coupling path, while the solid line in Figure 20 shows the frequency-passband signal strength curve with the coupling path. This shows that signal isolation with respect to the transmitted signal in the out-of-band frequency range is significantly improved. Figure 21 shows the frequency variation of insertion loss within the passband frequency range before and after the coupling path is implemented. The insertion loss changes are similar in both cases, and the frequency-passband insertion loss curves are consistent. This shows that the coupling path does not increase signal insertion loss.

[0120] For example, when a short-circuited transmission line is used in the packaged chip 100 to obtain an equivalent inductance as a tuning element, the target electrical length of the short-circuited transmission line is less than 90°. The target electrical length is the electrical length of the short-circuited transmission line at the lowest cutoff frequency in the corresponding filter bandpass range. Regarding the relevant designs of the second attenuation element S2, the second tuning element T2, the third planting ball BP3, the fourth planting ball BP4, the third solder joint PAD3, the fourth solder joint PAD4 and the second metal line Line2 in the packaging method of Example 2, reference can be made to the relevant descriptions of the first attenuation element S1, the first tuning element T1, the first planting ball BP1, the second planting ball BP2, the first solder joint PAD1, the second solder joint PAD2 and the first metal line Line1 in the embodiments shown in Figures 17 and 18 above, and no further details will be given here.

[0121] In Example 3, some or all of the components in the coupling path can also be designed external to the packaged chip 100. Since the RF communication module 1000 includes the packaged chip 100 and the printed circuit board 200, these external components can be fabricated on the printed circuit board 200. In this case, a metal connection structure can be designed within the packaged chip 100 to electrically connect the coupling path to the first and second ends of the filter resonant structure XZ1 to be tuned, as well as to electrically connect the coupling path to the external components on the printed circuit board 200.

[0122] For example, taking the case where a first tuning element T1 is disposed on a printed circuit board 200, as shown in FIG22, at least one first tuning element T1 is disposed on the printed circuit board 200. The packaged chip 100 includes a wafer 110 and a package substrate 120. A filter structure F is fabricated on the wafer 110, and the filter structure F includes a first filter resonant structure. The metal transmission structure includes at least one external via transmission structure V1 disposed on the package substrate 120. Specifically, at least one first attenuation element S1 disposed within the packaged chip 100 is connected to the first and second ends of the first filter resonant structure XZ1 to form a parallel structure with the first filter resonant structure XZ1. The first end of the at least one external via transmission structure V1 is connected to the transmission path formed by the first and second ends of the first filter resonant structure XZ1 and the at least one first attenuation element S1. The second end of the at least one external via transmission structure V1 is connected to the first end of the at least one first tuning element T1 on the printed circuit board 200. The second end of the at least one first tuning element T1 is grounded. As shown in FIG23(a), taking the first filter resonant structure XZ1 as a dual-passband filter resonant structure as an example, a coupling path including two first attenuation elements S1 and one first tuning element T1 can be designed. As shown in FIG23(b), each resonator X and the first attenuation element S1 in the first filter resonant structure can be designed on the wafer 110. FIG23(b) omits the schematic diagram of the package substrate 120. The metal connection structure in the packaged chip 100 may include an external via transmission structure V1. The first attenuation element S1 in the packaged chip 100 is connected to the first tuning element T1 on the printed circuit board 200 based on the external via transmission structure V1. For example, because the impedance matching design of the radio frequency signal during transmission needs to be considered in semiconductor design, a transmission line Z can be designed between the packaged chip 100 and the first tuning element T1 on the printed circuit board 200, and the transmission impedance matching design and signal transmission design can be performed based on the transmission line Z. At this time, as shown in FIG23(a), the first tuning element T1 is connected to the first attenuation element S1 via the transmission line Z. As shown in FIG23(b), the external via bump BPW in the packaged chip 100 can be connected to the first tuning element T1 via the transmission line Z designed on the printed circuit board 200 through the external via transmission structure V1 (disposed on the package substrate 120, not shown in the figure).

[0123] For example, as shown in FIG. 23( b ), the filter structure F includes multiple external terminals (e.g., the input terminal FIN and output terminal FOUT of a dual-passband filter, or the ground terminal within the packaged chip 100 connected to the ground of the printed circuit board 200). These external terminals can also be coupled to the multiple chip external terminals OUT via external metal connection structures (e.g., external bumps BPIN and BPOUT). Related transmission lines Z can also be designed on the printed circuit board 200 to achieve impedance matching and signal transmission between these external terminals and external devices.

[0124] For example, the tuning element designed on the printed circuit board 200 may be a lumped inductor, a winding coil, and the like.

[0125] For the technical principle and technical effect diagram of designing the first attenuation element S1, the second attenuation element S2, and the second tuning element T2 on the printed circuit board 200, reference may be made to the relevant description in the embodiment of designing the first tuning element T1 on the printed circuit board 200, and no further details will be given here.

[0126] In the embodiment of Example 3 of this application, by disposing the attenuation element and / or the tuning element on the printed circuit board 200, more design variations can be achieved. Furthermore, the parameter values ​​of the tuning element can change the transmission zero point of the coupling path. When the tuning element is disposed on the printed circuit board 200, the tuning element can be configured as an adjustable parameter structure or a replaceable structure to adjust the transmission zero point, thereby achieving performance adjustment or adapting to different application scenarios.

[0127] The embodiment of the present application is based on the above-mentioned coupling path including the tuning element and the attenuation element, which can achieve tuning with the parallel filter resonant structure and tuning with the spatial leakage at the location of the coupling path. This real-time method has the following advantages: Advantage 1. The coupling path can generate additional transmission zeros based on the tuning effect. Compared with the transmission zeros generated in other related technologies, the depth of the transmission zeros is greater, and the suppression and isolation of out-of-band signals are higher. Advantage 2. The tuning elements and / or attenuation elements in the coupling path can be processed with mature packaging technology and can be generated synchronously in the existing processing steps without the need for additional processing steps. The implementation of this solution will not increase the processing cost, etc. Advantage 3. The coupling path is not entirely based on the parameters of the transmission zero point achieved by inductance. When the inductance is used as the tuning element, the requirements for the size of the inductance value are relatively low, and the equivalent inductance can be integrated and designed inside the package chip based on the semiconductor process. This method optimizes the device integration and is conducive to the integrated and miniaturized design of the filter device. Advantage 4: When some components in the coupling path are designed on a printed circuit board, parameter adjustments can be implemented on the printed circuit board to change the transmission zero point of the packaged chip, thereby achieving performance adjustment or adaptation adjustment of the application scenario.

[0128] The communication device in the embodiments of the present application may be a device for implementing wireless communication functions, such as a terminal or a chip that can be used in a terminal. The terminal may be a UE, an access terminal, a terminal unit, a terminal station, a mobile station, a mobile station, a remote station, a remote terminal, a mobile device, a wireless communication device, a terminal agent, or a terminal device in a 6G network or a future evolved public land mobile network (PLMN). The access terminal may be a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication capabilities, a computing device or other processing device connected to a wireless modem, an in-vehicle device or a wearable device, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical care, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, etc. Optionally, the communication device may be mobile or fixed.

[0129] In one possible implementation, the communication device in the embodiment of the present application may be a network device that communicates with the terminal device. The network device may include a transmission and reception point (TRP), a base station, a remote radio unit (RRU) of a split base station, an active antenna unit (AAU), a satellite, a drone, a broadband network gateway (BNG), an aggregation switch, a non-3GPP access device, a relay station or an access point, etc.

[0130] In addition, the base station can be a base transceiver station (BTS) in a global system for mobile communication (GSM) or code division multiple access (CDMA) network, an NB (Node B) in wideband code division multiple access (WCDMA), an eNB or eNodeB (evolutionary NodeB) in LTE, a wireless controller in a cloud radio access network (CRAN) scenario, or a base station in a 5G communication system (such as a next-generation node B (gNodeB, gNB)), or a base station in a future evolution network, etc., and is not specifically limited here.

[0131] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0132] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0133] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0134] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located on a single device or distributed across multiple devices. Some or all of the modules may be selected to achieve the purpose of the present embodiment as needed.

[0135] In addition, the functional modules in the various embodiments of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0136] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A packaged chip, characterized in that: The packaged chip further comprises at least one first attenuation element and at least one first tuning element, wherein the first attenuation element is an equivalent capacitor or an equivalent resistor, and the first tuning element is an equivalent capacitor, an equivalent inductor, or an equivalent resistor; wherein: A filter structure is processed on the wafer, and the filter structure includes a first filter resonant structure; The at least one first attenuation element is connected to the first end and the second end of the first filtering resonant structure to form a parallel structure with the first filtering resonant structure; The first end of each first tuning element is connected to a transmission path formed by the first and second ends of the first filtering resonant structure and the at least one first attenuation element, and the second end of each first tuning element is grounded.

2. The packaged chip according to claim 1, wherein: When the at least one first attenuation element includes a plurality of first attenuation elements, the plurality of first attenuation elements are connected in series and / or in parallel.

3. The packaged chip according to claim 1 or 2, characterized in that: The filtering structure further includes a second filtering resonant structure; a first end of the second filtering resonant structure is connected to a second end of the first filtering resonant structure.

4. The packaged chip according to claim 3, wherein: The packaged chip further includes at least one second attenuation element and at least one second tuning element, wherein the second attenuation element is an equivalent capacitor or an equivalent resistor, and the second tuning element is an equivalent capacitor, an equivalent inductor, or an equivalent resistor; the at least one second attenuation element is connected to the first end and the second end of the second filter resonant structure to form a parallel structure with the second filter resonant structure; The first end of each second tuning element is connected to a transmission path formed by the first and second ends of the second filtering resonant structure and the at least one second attenuation element, and the second end of each second tuning element is grounded.

5. The packaged chip according to any one of claims 1 to 4, characterized in that: The at least one first attenuation element and / or the at least one first tuning element are processed on the wafer, each of the first attenuation element and the filtering structure are located on the same surface or different surfaces of the wafer, and each of the first tuning element and the filtering structure are located on the same surface or different surfaces of the wafer.

6. The packaged chip according to any one of claims 1 to 4, characterized in that: The packaged chip further includes a package substrate; the at least one first attenuation element and / or the at least one first tuning element are processed on the package substrate; the packaged chip further includes a metal connection structure; the metal connection structure is respectively connected to the first end of the first filter resonant structure, the at least one first attenuation element, and the second end of the first filter resonant structure to form a transmission path between the first end of the first filter resonant structure, the at least one first attenuation element, and the second end of the first filter resonant structure; The metal connection structure is also connected to the first end of the at least one first tuning element, so that the first end of each first tuning element is connected to the transmission path formed by the first end and the second end of the first filtering resonant structure and the at least one first attenuation element.

7. The packaged chip according to claim 6, wherein: The at least one first tuning element is processed on the packaging substrate; the metal connection structure includes a first planting ball, a second planting ball, a first solder joint, a second solder joint and a first metal wire; the first planting ball and the second planting ball are arranged on the wafer; the first solder joint and the second solder joint are arranged on the first surface of the packaging substrate; wherein: The first planting ball is connected to the first end of the first filtering resonant structure, and the second planting ball is connected to the second end of the first filtering resonant structure; The first planting ball is connected to the first solder point, and the second planting ball is connected to the second solder point; the first solder point and the second solder point are connected by the first metal wire, forming a transmission path between the first end of the first filtering resonant structure, the first planting ball, the second planting ball, the second end of the first filtering resonant structure and the at least one first attenuation element; the first end of each first tuning element is electrically connected to the first metal wire, and the second end of the first tuning element is grounded.

8. The packaged chip according to claim 6, wherein: The at least one first tuning element is processed on the packaging substrate, and the metal connection structure includes a first metal jumper or a metal column; wherein: The first end of the at least one first tuning element is connected to the first end of the first metal jumper, and the second end of the first metal jumper is connected to a transmission path formed by the first and second ends of the first filtering resonant structure and the at least one first attenuation element; or The first end of the at least one first tuning element is connected to the first end of the metal column, and the second end of the metal column is connected to the transmission path formed by the first and second ends of the first filtering resonant structure and the at least one first attenuation element.

9. The packaged chip according to claim 6, wherein: A cavity structure is formed on the wafer, and the filter structure is arranged in the cavity structure; and the at least one first tuning element is processed on the packaging substrate.

10. The packaged chip according to any one of claims 6 to 9, characterized in that: Any of the equivalent inductors is a winding coil or a short-circuited transmission line, and the target electrical length of the short-circuited transmission line is less than 90°; the target electrical length is the electrical length of the short-circuited transmission line at the lowest cutoff frequency in the corresponding filter bandpass range; the equivalent inductor is arranged at any of the following positions of the packaging substrate: the first surface of the packaging substrate, the inner layer of the packaging substrate, or the second surface of the packaging substrate.

11. The packaged chip according to any one of claims 6 to 9, characterized in that: Any of the equivalent inductors is a via structure; the first end of the via structure extends from the inner layer of the packaging substrate to the first surface of the packaging substrate, the first end of the via structure is connected to the first metal transmission line, and the second end of the via structure is grounded.

12. The packaged chip according to any one of claims 6 to 11, characterized in that: The at least one first attenuation element is disposed at any one of the following positions of the packaging substrate: the first surface of the packaging substrate, an inner layer of the packaging substrate, or the second surface of the packaging substrate.

13. The packaged chip according to any one of claims 1 to 12, characterized in that: The filtering structure includes multiple external terminals; the second surface of the wafer is also provided with multiple external metal connection structures; the multiple external terminals are connected one-to-one with the first ends of the multiple external metal connection structures; the second ends of the multiple external via transmission structures extend to the outside of the packaging substrate and are coupled one-to-one with multiple chip external terminals; the multiple chip external terminals are external interaction ports of the packaged chip.

14. The packaged chip according to any one of claims 1 to 13, characterized in that: The packaged chip is a filter chip, a different-frequency power splitter chip, a multiplexer chip, an integrated radio frequency switch or an amplifier.

15. A radio frequency communication module, characterized in that: The invention comprises a printed circuit board, a packaged chip and a metal connection structure; the packaged chip further comprises at least one first attenuation element; the printed circuit board is provided with a first tuning element; the first attenuation element is an equivalent capacitor or an equivalent resistor, and the first tuning element is an equivalent capacitor, an equivalent inductor or an equivalent resistor; the packaged chip comprises a wafer and a package substrate; a filtering structure is processed on the wafer, and the filtering structure comprises a first filtering resonant structure; the package substrate is provided with at least one external via transmission structure; wherein: The at least one first attenuation element is connected to the first end and the second end of the first filtering resonant structure to form a parallel structure with the first filtering resonant structure; The first end of the at least one external via transmission structure is connected to the transmission path formed by the first and second ends of the first filtering resonant structure and the at least one first attenuation element, the second end of the at least one external via transmission structure is connected to the first end of the at least one first tuning element, and the second end of the at least one first tuning element is grounded.

16. The radio frequency communication module according to claim 15, characterized in that: When the at least one first attenuation element includes a plurality of first attenuation elements, the plurality of first attenuation elements are connected in series and / or in parallel.

17. The radio frequency communication module according to claim 15 or 16, characterized in that: The first attenuation element is arranged at any one of the following positions of the radio frequency communication module: on the wafer, on the packaging substrate, and on the printed circuit board.

18. The radio frequency communication module according to any one of claims 15 to 17, wherein: The packaged chip is at least one of the following: a filter chip, a different-frequency power splitter chip, a multiplexer chip, an integrated radio frequency switch or an amplifier.

19. A radio frequency communication module, characterized in that: The invention comprises a printed circuit board and a packaged chip according to any one of claims 1 to 14.

20. A communication device, characterized in that: It includes a device housing and a radio frequency communication module, wherein the radio frequency communication module is partially or completely arranged in the device housing, and the radio frequency communication module is the radio frequency communication module as described in any one of claims 15 to 18, or the radio frequency communication module as described in claim 19.

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