Amplification circuit

Abstract

Provided is an amplification circuit capable of maintaining high efficiency even when a second harmonic load deviates from an optimum value in a J-class operation.　The present technology provides an amplification circuit comprising: an amplifier that amplifies to output a signal; a superimposing unit that is connected to at least one of an input terminal or an output terminal of the amplifier and superimposes a fundamental wave signal of the signal and a second harmonic signal that is a signal having a frequency twice that of the fundamental wave signal; and a matching circuit that is connected to the output terminal and generates a waveform signal of a J-class operation by applying loads corresponding to the respective signals to the fundamental wave signal and the second harmonic signal.

Description

Amplification circuit

[0001] The technology according to the present disclosure (hereinafter also referred to as "the technology") relates to an amplifier circuit.

[0002] For example, technologies relating to an amplifier circuit using a second harmonic signal are disclosed in Patent Documents 1 and 2. By using a second harmonic signal, it is possible to achieve class J operation, which is capable of operating over a wide band, while achieving efficiency equivalent to class B operation.

[0003] International Publication No. WO 2020 / 242886 International Publication No. WO 2019 / 008751

[0004] At the maximum power where the gain is not compressed, the efficiency of class J operation is equivalent to that of class B operation, but if gain compression is allowed, class J operation can achieve higher efficiency than class B operation. However, the trade-off is that the selectable second harmonic load range becomes narrower, making it difficult to provide an appropriate load over a wide band.

[0005] Therefore, a main object of the present technology is to provide an amplifier circuit that can maintain high efficiency in class J operation even if the second harmonic load deviates from the optimum value.

[0006] The present technology provides an amplifier circuit including: an amplifier that amplifies and outputs a signal; a superimposing unit connected to at least one of an input terminal and an output terminal of the amplifier and that superimposes a fundamental signal of the signal and a second harmonic signal, the second harmonic signal having a frequency twice that of the fundamental signal; and a matching circuit connected to the output terminal and that applies loads to the fundamental signal and the second harmonic signal according to the respective signals to generate a waveform signal of class J operation. The superimposing unit may be connected to the input terminal of the amplifier and include a first filter unit that passes the fundamental signal and a second filter unit that passes the second harmonic signal. The amplifier circuit may further include a generating unit that is connected to the input terminal of the second filter unit and generates the second harmonic signal. The amplifier circuit may further include a separating unit connected to the input terminal of the superimposing unit, and the separating unit may separate the input signal of the separating unit into the fundamental signal and the second harmonic signal. The superimposing unit may be connected to the input terminal of the amplifier and include a first filter unit that passes the fundamental signal and a second filter unit that passes the second harmonic signal; the separating unit may include a third filter unit that passes the fundamental signal and a fourth filter unit that passes the second harmonic signal; the first filter unit and the third filter unit may be connected; and the second filter unit and the fourth filter unit may be connected. The separating unit and the superimposing unit may share the filter unit that passes the fundamental signal. The separating unit and the superimposing unit may share the filter unit that passes the second harmonic signal. The amplifier circuit may further include a driver stage amplifier connected to the input terminal of the separating unit; and the driver stage amplifier may superimpose the fundamental signal and the second harmonic signal and output them. A phase shifter may be further provided between the separating unit and the superimposing unit to impart a phase to the second harmonic signal. The phase provided by the phase shifter may be variable depending on the phase of the second harmonic signal. The phase shifter may have an inductor. When the amplifier is a first amplifier, the amplifier circuit may further include a second amplifier between the separating unit and the superimposing unit that amplifies and outputs the second harmonic signal.The amplification degree of the second amplifier may be variable depending on the second harmonic signal. When the matching circuit is a first matching circuit, the amplifier circuit may further include a second matching circuit connected to the input terminal of the amplifier and applying loads to the fundamental signal and the second harmonic signal depending on each signal. The superimposing unit may include a current source that outputs the second harmonic signal. The current source may be connected to the output terminal of the amplifier. The superimposing unit may include at least one of a branching filter, a directional coupler, and a distributor. The amplifier may include at least one of a HEMT (High Electron Mobility Transistor), an HBT (Heterojunction Bipolar Transistor), and an FET (Field Effect Transistor). The separating unit may include at least one of a branching filter, a directional coupler, and a distributor.

[0007] According to the present technology, it is possible to provide an amplifier circuit capable of maintaining high efficiency in class J operation even when the second harmonic load deviates from the optimum value. Note that the effects described herein are not necessarily limited to those described herein, and may be any of the effects described in the present disclosure.

[0008] 1 is a graph showing an example of an output voltage waveform of an amplifier operating in class J mode. FIG. 2 is a Smith chart showing an example of a load applied to a signal. FIG. 3 is a circuit diagram showing an example of a configuration of an amplifier circuit. FIG. 4 is a graph showing an example of amplifier efficiency. FIG. 5 is a graph showing an example of amplifier efficiency. FIG. 6 is a circuit diagram showing an example of a configuration of an amplifier circuit according to an embodiment of the present technology. FIG. 7 is a graph showing an example of an output current of an amplifier according to an embodiment of the present technology. FIG. 8 is a graph showing an example of an output current of a current source according to an embodiment of the present technology. FIG. 9 is a graph showing an example of an output voltage of an amplifier according to an embodiment of the present technology. FIG. 10 is a circuit diagram showing an example of a configuration of an amplifier circuit according to an embodiment of the present technology. FIG. 11 is a circuit diagram showing an example of a configuration of an amplifier circuit according to an embodiment of the present technology. FIG. 12 is a graph showing an example of a configuration of an amplifier circuit according to an embodiment of the present technology. FIG. 13 is a graph showing an example of a voltage and current fluctuation of an amplifier. FIG. 14 is a graph showing an example of an amplifier efficiency and the like. FIG. 15 is a graph showing an example of a voltage and current fluctuation of an amplifier. FIG. 1 is a circuit diagram showing a configuration example of an amplifier circuit according to an embodiment of the present technology. FIG. 2 is a circuit diagram showing a configuration example of an amplifier circuit according to an embodiment of the present technology. FIG. 3 is a graph showing the efficiency of an amplifier 1 and the like. FIG. 4 is a graph showing an example of fluctuations in voltage and current of an amplifier 1. FIG. 5 is a graph showing the efficiency of an amplifier 1 and the like. FIG. 6 is a graph showing an example of fluctuations in voltage and current of an amplifier 1. FIG. 7 is a circuit diagram showing a configuration example of an amplifier circuit according to an embodiment of the present technology. FIG. 8 is a circuit diagram showing a configuration example of an amplifier circuit according to an embodiment of the present technology. FIG. 9 is a circuit diagram showing a configuration example of an amplifier circuit according to an embodiment of the present technology.

[0009] Hereinafter, preferred embodiments for implementing the present technology will be described with reference to the drawings. Note that the embodiment described below shows an example of a typical embodiment of the present technology, and does not limit the scope of the present technology. In addition, the present technology can be combined with any of the following examples and their modifications.

[0010] In the following description of the embodiments, configurations may be described using terms including "approximately," such as "approximately parallel" and "approximately perpendicular." For example, "approximately parallel" does not only mean completely parallel, but also means substantially parallel, i.e., including a state where the orientation is deviated from the completely parallel state by, for example, a few percent. The same applies to other terms including "approximately." Furthermore, each figure is a schematic diagram and is not necessarily an accurate depiction. The scale of the drawings is exaggerated to make the features of the technology easier to understand. Therefore, it should be noted that the scale of the drawings and the scale of the actual device are not necessarily the same.

[0011] Unless otherwise specified, in the drawings, "top" means the top or upper side in the drawing, "bottom" means the bottom or lower side in the drawing, "left" means the left or left side in the drawing, and "right" means the right or right side in the drawing. Furthermore, in the drawings, the same or equivalent elements or members are given the same reference numerals, and redundant explanations will be omitted.

[0012] The description will be given in the following order: 1. First embodiment of the present technology (amplifier circuit example 1) (1) J-class operation (2) Configuration of this embodiment 2. Second embodiment of the present technology (amplifier circuit example 2) 3. Third embodiment of the present technology (amplifier circuit example 3) 4. Fourth embodiment of the present technology (amplifier circuit example 4) 5. Fifth embodiment of the present technology (amplifier circuit example 5) 6. Sixth embodiment of the present technology (amplifier circuit example 6)

[0013] [1. First Embodiment of the Present Technology (Example 1 of Amplifier Circuit)] [(1) Class J Operation] Conventionally, there is an operation mode of an amplifier called class J operation, which is considered to have the same efficiency as class B operation. In class B bias operation of an ideal amplifier, an output voltage waveform is generated by an output current having only the upper half of a sine wave and a load connected to the output. Under class B bias operation, an output voltage waveform expressed by the following equation (1) is generated, thereby achieving an efficiency of 78.5%, which is the same as class B operation. This is called class J operation.

[0014]

[0015] This equation (1) shows the output voltage waveform of an amplifier operating in class J. v is the output voltage of the amplifier. x is a variable representing time or phase. α is a parameter that can take a value between -1 and 1.

[0016] Figure 1 is a graph showing an example of the output voltage waveform of an amplifier operating in class J. The horizontal axis of Figure 1 is x in equation (1), and the vertical axis is v in equation (1). As shown in this graph, the output voltage waveform changes depending on the value of α. When α = 0, the operation is the same as class B.

[0017] In class J operation, a wide load range can be selected by adjusting the load applied to the second harmonic signal in conjunction with the load applied to the fundamental signal. Specifically, by applying a load expressed by the following equations (2) and (3) to an amplifier under class B bias operation, an output voltage waveform expressed by equation (1) is generated, and the amplifier performs class J operation.

[0018]

[0019]

[0020] Here, Z1 is the load applied to the fundamental signal. Z2 is the load applied to the second harmonic signal, which is a signal with twice the frequency of the fundamental signal. R L is the resistance value determined by the power supply voltage and output current. The third-order or higher load impedance is short-circuited. The values ​​of Z1 and Z2 are determined according to the arbitrary value of α.

[0021] Figure 2 is a Smith chart showing an example of the loads on signals. The points inside the Smith chart represent the load Z1 on the fundamental signal. The points outside the Smith chart represent the load Z2 on the second harmonic signal.

[0022] In other words, as long as the relationships of equations (2) and (3) are satisfied, the amplifier can achieve efficiency equivalent to that of class B operation over a wide load range.

[0023] The following explains why, when the value of α is −0.5 and the loads expressed by equations (2) and (3) are applied, the output voltage waveform expressed by equation (1) is obtained and an efficiency of 78.5% is obtained.

[0024] 3 is a circuit diagram showing an example of the configuration of an amplifier circuit, in which a resistor R, a generator Vs, an amplifier 1, and a matching circuit 3 are connected in this order.

[0025] The generator Vs generates a signal. The amplifier 1 amplifies the signal output by the generator Vs and outputs the amplified signal. The matching circuit 3 applies a load to the signal output by the amplifier 1.

[0026] The output current of the class B biased amplifier 1 is expressed by the following equation (4) when the maximum current is normalized and the fourth and subsequent components are omitted.

[0027]

[0028] When expressed in phasor notation for each order, the output current I1 generated by the fundamental signal is 1 / 2, and the output current I2 generated by the second harmonic signal is 2 / 3π.

[0029] The DC component (zeroth order or DC component) is removed by the power supply from the DC current and the filter that removes the AC component, and the voltage is adjusted to the value of the power supply. Also, the third order and subsequent components are omitted because the load is short-circuited.

[0030] Consider an example of generating an output voltage waveform when the value of α is -0.5. If the power supply voltage is 1, then R L The value of α is 2. L When the value of is substituted into equation (2), the load Z1 that the matching circuit 3 applies to the fundamental signal is expressed by the following equation (5).

[0031]

[0032] In addition, the value of α and R L By substituting the values ​​of (1) and (2) into equation (3), the load Z2 that the matching circuit 3 imposes on the second harmonic signal is expressed by the following equation (6).

[0033]

[0034] The phasor notation of the voltage obtained based on equations (4), (5), and (6) is expressed by the following equations (7) and (8).

[0035]

[0036]

[0037] When this is converted back into a time function, it can be expressed by the following equations (9), (10), and (11).

[0038]

[0039]

[0040]

[0041] In this way, the output voltage waveform when the value of α is −0.5 is obtained. loss is expressed by the following equation (12).

[0042]

[0043] At this time, the output voltage P of the amplifier 1 out is found from the product of the first-order terms of i(x) and v(x) with their directions reversed, and is expressed by the following equation (13).

[0044]

[0045] From the above, the efficiency η of the amplifier 1 is 78.5%, as shown in the following equation (14).

[0046]

[0047] In this way, it was confirmed that when an ideal amplifier is operated in class J, in the region where the gain is not compressed, the efficiency (Deff) at maximum power is 78.5%, independent of the value of α.

[0048] However, when gain compression is allowed, higher efficiency can be obtained by selecting the value of α, and this tendency was confirmed by plotting the input power vs. gain characteristics and the input power vs. efficiency characteristics, especially for the cases of α = 0 and α = -0.5.

[0049] 4A and 4B are graphs showing examples of amplifier efficiency. Fig. 4A shows an example where α=0. The horizontal axis of the graph is the input power P in, the left vertical axis indicates gain, and the right vertical axis indicates efficiency. As shown in this graph, the input power P in Above 18 dBm, the gain begins to compress. When the gain begins to compress, the efficiency begins to decrease.

[0050] 4B shows an example in which α=−0.5. Unlike the case in which α=0, the input power P in Even when the gain reaches 18 dBm or more and compression begins, the efficiency does not decrease.

[0051] This trend is summarized in Figure 5. Figure 5 is a graph showing an example of amplifier efficiency. The horizontal axis of the graph represents α, and the vertical axis represents efficiency. The graph plots the change in efficiency at signal strengths where the gain compression amount is 1 dB, 2 dB, 3 dB, 4 dB, and 5 dB. For example, P1 dB is the signal strength (output power) where the gain compression amount is 1 dB.

[0052] For example, when the signal strength is such that the gain compression is 1 dB, changing the value of α results in almost no change in efficiency (Deff#at#P1dB).On the other hand, when the signal strength is such that the gain compression is 5 dB, the efficiency (Deff#at#P5dB) changes significantly depending on the value of α.

[0053] From the above, if gain compression is allowed, class J operation can achieve higher efficiency than class B operation. In order to obtain high efficiency when gain is compressed, the value of α needs to be controlled.

[0054] It is also essential to adjust the load impedance of the amplifier to a specific value. However, if the load applied to the second harmonic signal is a typical reactance consisting of an inductor and a capacitor, it becomes difficult to apply an appropriate load over a wide frequency band.

[0055] [(2) Configuration of this embodiment] The second harmonic load may be determined by the resonance between the inductance of the matching circuit and the parasitic capacitance of the amplifier. In this case, even if the ratio of the upper limit frequency to the lower limit frequency of the band used is less than 2, the value of the load α applied to the signal may vary from -0.5 to -0.25.

[0056] Therefore, the present technology proposes an amplifier circuit including: an amplifier that amplifies and outputs a signal; a superposition unit that is connected to at least one of the input terminal and output terminal of the amplifier and that superposes a fundamental signal of the signal and a second harmonic signal that is a signal with twice the frequency of the fundamental signal; and a matching circuit that is connected to the output terminal and that applies loads to the fundamental signal and the second harmonic signal according to each signal, thereby generating a waveform signal that operates in a J-class.

[0057] A configuration example of this amplifier circuit will be described with reference to Fig. 6. Fig. 6 is a circuit diagram showing a configuration example of an amplifier circuit according to an embodiment of the present technology.

[0058] As shown in FIG. 6 , an amplifier circuit according to an embodiment of the present technology includes an amplifier 1, a superimposing unit 2, and a matching circuit 3.

[0059] The amplifier 1 amplifies and outputs a signal and includes, for example, at least one of a high electron mobility transistor (HEMT), a heterojunction bipolar transistor (HBT), and a field effect transistor (FET).

[0060] A HEMT is a field-effect transistor that uses a "heterojunction" made by joining two types of semiconductor materials with different bandgaps. This junction creates a two-dimensional electron gas (2DEG) with high electron mobility. Because the 2DEG allows current to flow easily, it can achieve high-speed, low-noise operation.

[0061] An HBT is a bipolar transistor that uses semiconductor materials with different bandgaps in the emitter, base, and collector layers. This structure allows it to achieve high current gain and high-speed operation.

[0062] An FET is a field effect transistor that controls the current between the source and drain by the gate voltage. The relationship between the gate voltage and the drain current is nonlinear, and an amplification effect can be used.

[0063] The superimposing unit 2 is connected to the output terminal of the amplifier 1 and superimposes the fundamental signal of the signal with a second harmonic signal, which is a signal having twice the frequency of the fundamental signal.

[0064] The superimposing unit 2 includes, for example, at least one of a branching filter, a directional coupler, and a distributor.

[0065] A duplexer is a device that splits an input signal into multiple output signals. A duplexer with multiple output ports can output signals of different frequency bands to each port.

[0066] A directional coupler is a device that couples a portion of an input signal to another output port, allowing for control of the directionality of the input signal and the coupled signal.

[0067] A divider is a device that distributes an input signal equally among multiple output ports, all of which output the same signal.

[0068] In this embodiment, the superimposing unit 2 has a current source 4 that outputs a second harmonic signal. The current source 4 is connected to the output terminal of the amplifier 1. This allows a desired second harmonic signal to be superimposed on the signal output by the amplifier 1. Note that the current source 4 may also be connected to the input terminal of the amplifier 1.

[0069] The matching circuit 3 is connected to the output terminal of the amplifier 1 and applies loads to the fundamental signal and the second harmonic signal according to the respective signals, thereby generating a waveform signal for class J operation.

[0070] Conventionally, the value of α was determined by adjusting the load, but with this technology, instead of adjusting the load, current is added, and when the value of α of the second harmonic deviates from the target value, the shortage of current is supplied from the current source 4. This makes it possible to generate a voltage waveform equivalent to the target α = 0.5, and a wide-band and highly efficient output voltage waveform can be obtained.

[0071] This will be explained with reference to FIGS.

[0072] 7 is a graph showing an example of an output current of the amplifier 1 according to an embodiment of the present technology. In FIG. 7, the horizontal axis represents an independent variable x such as time or phase, and the vertical axis represents the output current I.

[0073] 8 is a graph showing an example of an output current of a current source 4 according to an embodiment of the present technology. In Fig. 8, the horizontal axis represents an independent variable x such as time or phase, and the vertical axis represents the output current I.

[0074] For example, when the α value of the fundamental signal is −0.5 and the α value of the second harmonic signal is −0.25, the output voltage waveform of the amplifier 1 is as shown in Fig. 9. Fig. 9 is a graph showing an example of the output voltage of the amplifier 1 according to an embodiment of the present technology. In Fig. 9, the horizontal axis represents an independent variable x such as time or phase, and the vertical axis represents the output voltage V.

[0075] Furthermore, when the current source 4 superimposes a second harmonic signal on the output signal of the amplifier 1, the output voltage waveform becomes as shown in Fig. 10. Fig. 10 is a graph showing an example of the output voltage of an amplifier circuit according to an embodiment of the present technology. In Fig. 10, the horizontal axis represents an independent variable x such as time or phase, and the vertical axis represents the output voltage V. This output voltage waveform achieves the efficiency in the state where α = -0.5 in the graph shown in Fig. 1.

[0076] In this way, by having a current source 4 that outputs a second harmonic signal, even if the value of α of the second harmonic signal is, for example, −0.25, an output voltage waveform with an α value of −0.5 can be obtained.

[0077] The above description of the amplifier circuit according to the first embodiment of the present technology can be applied to other embodiments of the present technology unless there is a particular technical contradiction.

[0078] [2. Second Embodiment of the Present Technology (Example 2 of Amplification Circuit)] In order to realize the amplification circuit according to the first embodiment, power is required to drive the current source 4, and therefore a separate amplifier is required. The power consumption of this amplifier needs to be taken into consideration, and in order to achieve high efficiency by adjusting α, this power consumption needs to be minimized.

[0079] Therefore, an amplifier circuit according to a second embodiment of the present technology is proposed. This amplifier circuit will be described with reference to Figs. 11 to 13. Figs. 11 to 13 are circuit diagrams showing configuration examples of an amplifier circuit according to an embodiment of the present technology. In this configuration example, a second harmonic component is superimposed on the input signal of the amplifier 1, thereby improving efficiency.

[0080] As shown in FIG. 11, in this embodiment, the superposition unit 2 is connected to the input terminal of the amplifier 1 and has a first filter unit 21 that passes the fundamental wave signal and a second filter unit 22 that passes the second harmonic signal.

[0081] 12, the superimposing unit 2 may further include a second generating unit 24. The second generating unit 24 is connected to the input terminal of the second filter unit 22 and generates a second harmonic signal.

[0082] 13, the superimposing unit may further include a first generating unit 23. The first generating unit 23 is connected to the input terminal of the first filter unit 21, and generates a fundamental wave signal.

[0083] In this embodiment, a second harmonic signal is superimposed on the input signal of the amplifier 1, and a matching circuit applies a load to this signal. This makes it possible to maintain high efficiency in class J operation even when gain compression occurs.

[0084] For example, a case where the value of α in the load applied to the second harmonic signal changes from −0.5 to −0.25 will be described with reference to Fig. 14. Fig. 14 is a graph showing an example of fluctuations in the voltage and current of amplifier 1. In Fig. 14, the horizontal axis represents time, and the vertical axis on the left represents the input voltage V of amplifier 1. in and the output voltage V cs The vertical axis on the right represents the output current I of the amplifier 1. csIn this case, since the second harmonic component is not superimposed, the efficiency at 5 dB compression drops from 92.8% to 76.1%.

[0085] On the other hand, Fig. 15 shows a case where the second harmonic component is superimposed on the input signal of the amplifier 1 by applying the present technology. Fig. 15 is a graph showing an example of fluctuations in the voltage and current of the amplifier 1. Compared to Fig. 14, the output current I cs The peak amplitude became steeper, and the second harmonic component increased from 42.3% to 72.3%. The output voltage waveform became equivalent to the above-mentioned α = -0.5. Furthermore, the efficiency at 5 dB compression recovered from 76.1% to 89.3%.

[0086] Up to this point, the explanation has been given using an ideal device model that does not take into account parasitic capacitance, etc. In the ideal device model, if the drain voltage is 0 or higher, a drain current flows.

[0087] On the other hand, from here on, we will show the simulation results for an actual device model that takes into account knee voltage, parasitic capacitance, etc. In the actual device model, the load on the second harmonic signal varies from the ideal state due to the influence of knee voltage, parasitic capacitance, etc.

[0088] A case where the second harmonic component is not superimposed will be described with reference to Fig. 16 and Fig. 17. Fig. 16 is a graph showing an example of the efficiency of the amplifier 1. In Fig. 16, the horizontal axis of the graph is the input power P in , the left vertical axis indicates gain, and the right vertical axis indicates efficiency.

[0089] 17 is a graph showing an example of fluctuations in the voltage and current of the amplifier 1. In FIG. 17, the horizontal axis represents time, and the vertical axis on the left represents the input voltage V in and the output voltage V cs The vertical axis on the right represents the output current I of the amplifier 1. cs FIG. 17 is a graph at waveform extraction point P in FIG.

[0090] Load-pull simulations confirmed that α = -1.5 was optimal, so in this graph, the α value for the load applied to the second harmonic signal was varied from -1.5 to -0.4, resulting in a decrease in efficiency at 5 dB compression from 82.8% to 65.9%.

[0091] On the other hand, with the present technology, a second harmonic component signal having a voltage amplitude half that of the fundamental signal is superimposed at a phase of -80 degrees on the input signal of the amplifier 1. This case will be described with reference to FIGS. 18 and 19. FIG. 18 is a graph showing an example of the efficiency of the amplifier 1. FIG. 19 is a graph showing an example of fluctuations in the voltage and current of the amplifier 1. FIG. 19 is a graph at waveform extraction point P in FIG. 18.

[0092] 19, the second harmonic component signal of the output current of the amplifier 1 increased from 13% to 29%, and the efficiency at 5 dB compression recovered to 77.0%.

[0093] The above description of the amplifier circuit according to the second embodiment of the present technology can be applied to other embodiments of the present technology unless there is a particular technical contradiction.

[0094] 3. Third Embodiment of the Present Technology (Example 3 of Amplification Circuit) There is a case where the input signal of the amplifier 1 is a signal in which a fundamental signal and a second harmonic signal are superimposed. An embodiment in this case will be described with reference to Fig. 20. Fig. 20 is a circuit diagram showing an example configuration of an amplifier circuit according to an embodiment of the present technology.

[0095] 20, the amplifier circuit according to this embodiment further includes a separator 5 connected to the input terminal of the superimposing unit 2. The separator 5 separates the input signal to the separator 5 into a fundamental signal and a second harmonic signal.

[0096] The separator 5 may include, for example, at least one of a branching filter, a directional coupler, and a distributor. The branching filter, the directional coupler, and the distributor have been described above, and therefore will not be described again.

[0097] The separator 5 has a third filter 51 that passes the fundamental signal and a fourth filter 52 that passes the second harmonic signal. The first filter 21 and the third filter 51 are connected, and the second filter 22 and the fourth filter 52 are connected.

[0098] The above description of the amplifier circuit according to the third embodiment of the present technology can be applied to other embodiments of the present technology unless there is a particular technical contradiction.

[0099] 4. Fourth Embodiment of the Present Technology (Fourth Amplification Circuit Example) In designing an amplifier circuit, a driver stage amplifier can be arranged before an amplifier 1 serving as an output stage in order to improve the overall gain. When the driver stage amplifier is operated with a class B bias, its output signal contains a second harmonic component. Therefore, the amplifier circuit according to this embodiment makes effective use of this output signal.

[0100] This embodiment will be described with reference to Fig. 21 and Fig. 22. Fig. 21 and Fig. 22 are circuit diagrams showing configuration examples of an amplifier circuit according to an embodiment of the present technology.

[0101] 21, the amplifier circuit according to this embodiment further includes a driver stage amplifier 13 connected to the input terminal of the separator 5. This driver stage amplifier 13 superimposes the fundamental signal and the second harmonic signal and outputs the superimposed signal.

[0102] A phase shifter 7 that imparts a phase to the second harmonic signal may be further provided between the separator 5 and the superimposer 2. With this configuration, for example, an appropriate phase can be imparted to the second harmonic signal separated by the separator 5.

[0103] The phase shifter 7 may include an inductor. By including an inductor in the phase shifter 7, high signal quality and stability can be achieved. The inductor controls the phase of the electrical signal and plays a role in suppressing unnecessary noise and interference. This improves the reliability of the entire amplifier circuit.

[0104] The phase provided by the phase shifter 7 may be variable depending on the phase of the second harmonic signal, thereby enabling optimal adjustment of the phase at a specific frequency component, thereby improving signal quality and minimizing the influence of noise.

[0105] 22 , when the amplifier 1 serving as the output stage is the first amplifier 1, a second amplifier 12 that amplifies and outputs the second harmonic signal may be further provided between the separator 5 and the superimposer 2. This allows the second amplifier 12 to amplify the second harmonic component even when the second harmonic component output by the driver stage amplifier 13 is small. In this case, it is preferable that the degree of amplification of the second amplifier 12 is variable depending on the second harmonic signal. This allows the second amplifier 12 to appropriately amplify the second harmonic signal depending on the second harmonic signal output by the driver stage amplifier 13.

[0106] According to this embodiment, it is possible to utilize the second harmonic component output by the driver stage amplifier 13. Therefore, it is possible to improve the gain without the need to prepare a current source or the like that outputs the second harmonic.

[0107] 23 , a generation unit Vs may be connected to the input terminal of the driver stage amplifier 13. The generation unit Vs generates a signal. The driver stage amplifier 13 amplifies the signal output by the generation unit Vs and outputs the amplified signal.

[0108] Simulation results of this embodiment using an actual device model will be described with reference to Figs. 24 to 27. Figs. 24 and 26 are graphs showing the efficiency of amplifier 1, etc. Figs. 25 and 27 are graphs showing examples of fluctuations in voltage and current of amplifier 1. Fig. 25 is a graph at waveform extraction point P in Fig. 24. Fig. 27 is a graph at waveform extraction point P in Fig. 26. Figs. 24 to 27 are simulation results when the value α of the load applied to the second harmonic signal is -0.4.

[0109] 24 and 25 show the simulation results when this embodiment is not applied. The efficiency (Deff) of the amplifier 1 in the output stage was 66.4%, and the efficiency (PAE) of the entire amplifier circuit was 50.8%.

[0110] 26 and 27 show simulation results when this embodiment is applied. The efficiency (Deff) of the output stage amplifier 1 improved to 76.4%, and the efficiency (PAE) of the entire amplifier circuit improved to 53.1%. This shows that the improvement in the efficiency of the output stage amplifier 1 is more effective than the increase in power consumption caused by adding the second amplifier 12 that amplifies the second harmonic signal.

[0111] The above description of the amplifier circuit according to the fourth embodiment of the present technology can be applied to other embodiments of the present technology unless there is a particular technical contradiction.

[0112] 5. Fifth Embodiment of the Present Technology (Fifth Example of Amplification Circuit)] Another embodiment of the present technology will be described with reference to Fig. 28 and Fig. 29. Fig. 28 and Fig. 29 are circuit diagrams showing configuration examples of an amplifier circuit according to an embodiment of the present technology.

[0113] 28, the separation unit 5 and the superposition unit 2 may share a first shared filter unit 61 that passes the fundamental signal. Also, as shown in Fig. 29, the separation unit 5 and the superposition unit 2 may share a second shared filter unit 62 that passes the second harmonic signal.

[0114] A filter section typically serves to selectively pass the frequency components of a signal, extracting a specific frequency band. However, some of the signal is lost when passing through the filter section. By sharing a filter section, as in this embodiment, this loss can be reduced.

[0115] Furthermore, by sharing the filter sections, the number of filter sections is reduced, which simplifies the circuit design and improves the efficiency of manufacturing and maintenance.

[0116] The above description of the amplifier circuit according to the fifth embodiment of the present technology can be applied to other embodiments of the present technology unless there is a particular technical contradiction.

[0117] 6. Sixth Embodiment of the Present Technology (Sixth Example of Amplification Circuit) When the matching circuit 3 connected to the output terminal of the amplifier 1 is the first matching circuit 3, the amplifier 1 may further include a second matching circuit connected to the input terminal side of the amplifier 1 and applying loads to the fundamental signal and the second harmonic signal according to the respective signals.

[0118] This will be described with reference to Fig. 30 and Fig. 31. Fig. 30 and Fig. 31 are circuit diagrams showing configuration examples of amplifier circuits according to an embodiment of the present technology.

[0119] 30, the second matching circuit 31 is connected to the input terminal side of the amplifier 1. More specifically, the second matching circuit 31 is connected between the second amplifier 12 and the phase shifter 7. The second matching circuit 31 applies a load to the second harmonic signal separated by the separation unit 5 according to the second harmonic signal.

[0120] As shown in FIG. 31, the second matching circuit can be placed at any position before the amplifier 1 .

[0121] In this configuration example, the second matching circuit 34 is connected between the first filter section 21 and the third filter section 51. The second matching circuit 34 applies a load corresponding to the fundamental signal separated by the separation section 5. Furthermore, the second matching circuit 34 can have the function of the first filter section 21, and can therefore function as a substitute for the first filter section 21.

[0122] The second matching circuit 32 is connected between the amplifier 1 and the superimposing unit 2. The second matching circuit 34 applies loads to the fundamental signal and the second harmonic signal according to the respective signals.

[0123] The second matching circuit 33 is connected between the phase shifter 7 and the second filter unit 22. The second matching circuit 33 applies a load to the second harmonic signal separated by the separation unit 5 according to the second harmonic signal.

[0124] The second matching circuit 35 is connected between the fourth filter unit 52 and the second amplifier 12. The second matching circuit 35 applies a load to the second harmonic signal separated by the separation unit 5 according to the second harmonic signal.

[0125] The second matching circuit 35 is connected between the driver stage amplifier 13 and the separation unit 5. The second matching circuit 35 applies loads to the fundamental signal and second harmonic signal output by the driver stage amplifier 13 according to the respective signals.

[0126] The above description of the amplifier circuit according to the sixth embodiment of the present technology can be applied to other embodiments of the present technology unless there is a particular technical contradiction.

[0127] It should be noted that the embodiments of the present technology are not limited to the above-described embodiments, and various modifications are possible within the scope of the present technology. The specific numerical values, shapes, materials (including compositions), etc. described in each embodiment are merely examples, and the present technology is not limited to these.

[0128] The present technology may also be configured as follows. [1] An amplifier circuit comprising: an amplifier that amplifies and outputs a signal; a superimposing unit connected to at least one of an input terminal and an output terminal of the amplifier and that superimposes a fundamental signal of the signal and a second harmonic signal that is a signal with twice the frequency of the fundamental signal; and a matching circuit connected to the output terminal and that generates a waveform signal of class J operation by applying loads to the fundamental signal and the second harmonic signal according to each signal. [2] The amplifier circuit according to [1], in which the superimposing unit is connected to the input terminal of the amplifier and has a first filter unit that passes the fundamental signal and a second filter unit that passes the second harmonic signal. [3] The amplifier circuit according to [2], further comprising a generating unit connected to the input terminal of the second filter unit that generates the second harmonic signal. [4] The amplifier circuit according to any one of [1] to [3], further comprising a separator connected to an input terminal of the superimposing unit, wherein the separator separates an input signal of the separator into the fundamental signal and the second harmonic signal. [5] The amplifier circuit according to [4], wherein the superimposing unit is connected to the input terminal of the amplifier and has a first filter unit that passes the fundamental signal and a second filter unit that passes the second harmonic signal, wherein the separator has a third filter unit that passes the fundamental signal and a fourth filter unit that passes the second harmonic signal, wherein the first filter unit and the third filter unit are connected, and the second filter unit and the fourth filter unit are connected. [6] The amplifier circuit according to [4] or [5], wherein the separator and the superimposing unit share a filter unit that passes the fundamental signal. [7] The amplifier circuit according to any one of [4] to [6], wherein the separating unit and the superimposing unit share a filter unit that passes the second harmonic signal. [8] The amplifier circuit according to any one of [4] to [7], further comprising a driver stage amplifier connected to an input terminal of the separating unit, wherein the driver stage amplifier superimposes the fundamental signal and the second harmonic signal and outputs the superimposed signal.[9] The amplifier circuit according to any one of [4] to [8], further comprising a phase shifter between the separating unit and the superimposing unit that imparts a phase to the second harmonic signal.

[10] The amplifier circuit according to [9], wherein the phase imparted by the phase shifter is variable according to the phase of the second harmonic signal.

[11] The amplifier circuit according to [9] or

[10] , wherein the phase shifter has an inductor.

[12] The amplifier circuit according to any one of [4] to

[11] , wherein when the amplifier is a first amplifier, further comprises a second amplifier between the separating unit and the superimposing unit that amplifies and outputs the second harmonic signal.

[13] The amplifier circuit according to

[12] , wherein the degree of amplification of the second amplifier is variable according to the second harmonic signal.

[14] The amplifier circuit according to any one of [1] to

[13] , further comprising a second matching circuit connected to the input terminal side of the amplifier when the matching circuit is a first matching circuit, and applying loads to the fundamental signal and the second harmonic signal according to each signal.

[15] The amplifier circuit according to any one of [1] to

[14] , wherein the superimposing unit has a current source that outputs the second harmonic signal.

[16] The amplifier circuit according to

[15] , wherein the current source is connected to the output terminal of the amplifier.

[17] The amplifier circuit according to any one of [1] to

[16] , wherein the superimposing unit has at least one of a branching filter, a directional coupler, and a distributor.

[18] The amplifier circuit according to any one of [1] to

[17] , wherein the amplifier has at least one of a HEMT (High Electron Mobility Transistor), an HBT (Heterojunction Bipolar Transistor), and an FET (Field Effect Transistor).

[19] The amplifier circuit according to any one of [4] to

[18] , wherein the separation unit has at least one of a branching filter, a directional coupler, and a distributor.

[20] The amplifier circuit according to any one of

[14] to

[19] , wherein the second matching circuit is connected between the second amplifier and the phase shifter.

[21] The amplifier circuit according to any one of

[14] to

[20] , wherein the second matching circuit is connected between the first filter section and the third filter section.

[22] The amplifier circuit according to any one of

[14] to

[21] , wherein the second matching circuit is connected between the amplifier and the superimposing section.

[23] The amplifier circuit according to any one of

[14] to

[22] , wherein the second matching circuit is connected between the phase shifter and the second filter section.

[24] The amplifier circuit according to any one of

[14] to

[23] , wherein the second matching circuit is connected between the fourth filter section and the second amplifier.

[25] The amplifier circuit according to any one of

[14] to

[24] , wherein the second matching circuit is connected between the driver stage amplifier and the separating section.

[0129] REFERENCE SIGNS LIST 1 Amplifier 12 Second amplifier 13 Driver stage amplifier 2 Superimposing section 21 First filter section 22 Second filter section 23 First generating section 24 Second generating section 3 Matching circuit 31 Second matching circuit 4 Current source 5 Separating section 51 Third filter section 52 Fourth filter section 61 Shared filter section 62 Shared filter section 7 Phase shifter

Claims

1. An amplifier circuit comprising: an amplifier that amplifies and outputs a signal; a superimposing unit that is connected to at least one of the input and output terminals of the amplifier and that superimposes a fundamental signal of the signal and a second harmonic signal that is a signal with twice the frequency of the fundamental signal; and a matching circuit that is connected to the output terminal and that applies loads to the fundamental signal and the second harmonic signal according to each signal, thereby generating a waveform signal that operates in class J.

2. The amplifier circuit according to claim 1, wherein the superimposing section is connected to the input terminal of the amplifier and has a first filter section that passes the fundamental wave signal and a second filter section that passes the second harmonic signal.

3. The amplifier circuit according to claim 2, further comprising a generating section connected to an input terminal of said second filter section, for generating said second harmonic signal.

4. The amplifier circuit according to claim 1, further comprising a separator connected to an input terminal of the superimposing unit, the separator separating an input signal to the separator into the fundamental signal and the second harmonic signal.

5. The amplifier circuit according to claim 4, wherein the superimposing unit is connected to the input terminal of the amplifier and has a first filter unit that passes the fundamental wave signal and a second filter unit that passes the second harmonic signal, the separating unit has a third filter unit that passes the fundamental wave signal and a fourth filter unit that passes the second harmonic signal, the first filter unit and the third filter unit are connected, and the second filter unit and the fourth filter unit are connected.

6. The amplifier circuit according to claim 4, wherein the separating section and the superimposing section share a filter section that passes the fundamental wave signal.

7. The amplifier circuit according to claim 4, wherein the separating section and the superimposing section share a filter section that passes the second harmonic signal.

8. The amplifier circuit according to claim 4, further comprising a driver stage amplifier connected to the input terminal of said separator, said driver stage amplifier superimposing said fundamental signal and said second harmonic signal and outputting the superimposed signal.

9. The amplifier circuit according to claim 4, further comprising a phase shifter between the separating section and the superimposing section for imparting a phase to the second harmonic signal.

10. The amplifier circuit according to claim 9, wherein the phase provided by said phase shifter is variable depending on the phase of said second harmonic signal.

11. The amplifier circuit of claim 9, wherein the phase shifter comprises an inductor.

12. The amplifier circuit according to claim 4, further comprising, when the amplifier is a first amplifier, a second amplifier between the separating section and the superimposing section, which amplifies and outputs the second harmonic signal.

13. The amplifier circuit according to claim 12, wherein the amplification degree of said second amplifier is variable according to said second harmonic signal.

14. The amplifier circuit according to claim 1, further comprising: a second matching circuit connected to the input terminal side of the amplifier when the matching circuit is a first matching circuit, the second matching circuit applying loads to the fundamental signal and the second harmonic signal according to the respective signals.

15. The amplifier circuit according to claim 1, wherein the superimposing section has a current source that outputs the second harmonic signal.

16. The amplifier circuit of claim 15, wherein the current source is connected to an output terminal of the amplifier.

17. The amplifier circuit according to claim 1, wherein the superimposing section has at least one of a branching filter, a directional coupler, and a distributor.

18. The amplifier circuit of claim 1, wherein the amplifier comprises at least one of a high electron mobility transistor (HEMT), a heterojunction bipolar transistor (HBT), and a field effect transistor (FET).

19. The amplifier circuit according to claim 4, wherein the separation section has at least one of a branching filter, a directional coupler, and a distributor.

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