Laminated film, semiconductor chip with adhesive layer, method for manufacturing laminated film, method for manufacturing semiconductor chip with adhesive layer, and method for manufacturing semiconductor device

Abstract

A laminated film 21 comprises a long base film 22 and a label section 23 provided at prescribed intervals on one surface of the base film 22, wherein the label section 23 has an adhesive layer 24 overlaid on the base film 22 and a tacky layer 25 overlaid on the adhesive layer 24, and the facing surface 24a of the adhesive layer 24 that faces the tacky layer 25 is provided with reduced-thickness portions 41 where the volume of the adhesive layer 24 is reduced.

Description

Laminated film, semiconductor chip with adhesive layer, method for manufacturing laminated film, method for manufacturing semiconductor chip with adhesive layer, and method for manufacturing semiconductor device

[0001] The present disclosure relates to a laminated film, a semiconductor chip with an adhesive layer, a method for manufacturing a laminated film, a method for manufacturing a semiconductor chip with an adhesive layer, and a method for manufacturing a semiconductor device.

[0002] In recent years, stacked MCPs (Multi Chip Packages), which have high capacity due to semiconductor chips stacked in multiple stages, have become widespread. An example of a stacked MCP is a chip-embedded semiconductor package. A semiconductor package structure in which a semiconductor chip is embedded in an adhesive film is called a film-over-die (FOD). One example of a semiconductor package employing FOD is one in which a controller chip disposed on one surface of a substrate is embedded between the substrate and a memory chip by an embedding portion using an adhesive film (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2014-175459

[0004] In the manufacture of semiconductor packages having an FOD structure, it is necessary for the semiconductor chip to be sufficiently embedded in an embedding portion using an adhesive film (embedding ability). Regarding embedding ability, it is important to simultaneously suppress both bleeding and voids. Bleeding is a phenomenon in which the embedding portion protrudes from between the substrate and the memory chip, and voids are a phenomenon in which a gap is formed in the embedding portion between the substrate and the memory chip. The suppression of bleeding and the suppression of voids are in a trade-off relationship due to factors such as the volume of the embedding portion, and a technology that can effectively suppress both bleeding and voids is desired.

[0005] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a laminated film, a semiconductor chip with an adhesive layer, a method for manufacturing a laminated film, a method for manufacturing a semiconductor chip with an adhesive layer, and a method for manufacturing a semiconductor device that can effectively achieve both suppression of bleeding and suppression of voids in the manufacture of semiconductor packages.

[0006] The gist of the present disclosure is as follows.

[0007] [1] A laminated film comprising a long base film and label portions provided on one surface of the base film at predetermined intervals in the extending direction of the base film, wherein the label portions have an adhesive layer overlaying the base film, a pressure-sensitive adhesive layer overlaying the adhesive layer, and a base layer overlaying the pressure-sensitive adhesive layer, and a reduced-weight portion that reduces the volume of the adhesive layer is provided on the surface of the adhesive layer facing the pressure-sensitive adhesive layer.

[0008] In this laminated film, a reduced-thickness portion is provided on the surface of the adhesive layer facing the pressure-sensitive adhesive layer, thereby reducing the volume of the adhesive layer. By reducing a portion of the volume of the adhesive layer by the reduced-thickness portion, when the adhesive layer is used as an embedding portion for a semiconductor chip in the manufacture of a semiconductor package, it is possible to effectively suppress both bleeding and voids.

[0009] [2] The laminated film according to [1], wherein the thickness-reduced portion reduces the volume of the adhesive layer in accordance with the volume of the semiconductor chip to be embedded in the adhesive layer. In this case, the thickness-reduced portion reduces a portion of the volume of the adhesive layer in an appropriate amount, thereby more effectively suppressing both bleeding and voids.

[0010] [3] The laminated film according to [1], wherein the thinned portion is a recess extending in one direction in the in-plane direction of the opposing surface. With this configuration, the amount of reduction in the volume of the adhesive layer due to the thinned portion can be easily controlled by designing the shape and dimensions of the recess and the L / S ratio. Furthermore, the thinned portion can be easily formed.

[0011] [4] The laminated film according to [1], wherein the thinned portions are formed by recesses arranged in a grid pattern in the in-plane direction of the opposing surfaces. This configuration allows for easy control of the amount of reduction in the volume of the adhesive layer due to the thinned portions by designing the shape and dimensions of the recesses and the L / S ratio. Furthermore, the thinned portions can be easily formed.

[0012] [5] The laminated film according to [1], wherein the thinned portions are formed by recesses arranged in a checkerboard pattern in the in-plane direction of the opposing surface. This configuration allows for easy control of the amount of volume reduction of the adhesive layer due to the thinned portions by designing the shape and dimensions of the recesses. Furthermore, the thinned portions can be easily formed.

[0013] [6] The laminate film according to any one of [1] to [5], wherein in the label portion, the adhesive layer and the base layer have protruding portions that extend outward beyond the edge of the adhesive layer, and the protruding portions overlap one surface of the base film. This configuration facilitates attachment of the adhesive layer and the base layer to an object such as a semiconductor wafer. Furthermore, because the adhesive layer is covered by the adhesive layer and the base layer, thinned portions are protected.

[0014] [7] A semiconductor chip with an adhesive layer, comprising a semiconductor chip and an adhesive layer provided on one side of the semiconductor chip, wherein a reduced-material portion that reduces the volume of the adhesive layer is provided on the surface of the adhesive layer facing the semiconductor chip.

[0015] In this semiconductor chip with adhesive layer, a reduced-thickness portion is provided on the surface of the adhesive layer facing the pressure-sensitive adhesive layer, thereby reducing the volume of the adhesive layer. By reducing a portion of the volume of the adhesive layer by the reduced-thickness portion, it is possible to effectively achieve both suppression of bleeding and suppression of voids in the manufacture of semiconductor packages.

[0016] [8] The semiconductor chip with an adhesive layer according to [7], wherein the reduced-thickness portion reduces the volume of the adhesive layer in accordance with the volume of another semiconductor chip into which the adhesive layer is to be embedded. In this case, the reduced-thickness portion reduces a portion of the volume of the adhesive layer just enough, thereby more effectively suppressing both bleeding and voids.

[0017] [9] The semiconductor chip with an adhesive layer according to [7], wherein the thinned portion is configured as a recess extending in one direction in the in-plane direction of the opposing surface. With this configuration, the amount of reduction in the volume of the adhesive layer due to the thinned portion can be easily controlled by designing the shape and dimensions of the recess and the L / S ratio, etc. Also, the thinned portion can be easily formed.

[0018]

[10] The semiconductor chip with an adhesive layer according to [7], wherein the thinned portion is constituted by recesses arranged in a grid pattern in the in-plane direction of the opposing surface. With this configuration, the amount of reduction in the volume of the adhesive layer due to the thinned portion can be easily controlled by designing the shape and dimensions of the recesses and the L / S ratio. Furthermore, the thinned portion can be easily formed.

[0019]

[11] The semiconductor chip with an adhesive layer according to [7], wherein the thinned portions are formed by recesses arranged in a checkerboard pattern in the in-plane direction of the opposing surface. This configuration allows for easy control of the amount of reduction in the volume of the adhesive layer due to the thinned portions by designing the shape and dimensions of the recesses. Furthermore, the thinned portions can be easily formed.

[0020]

[12] A method for manufacturing a laminated film, comprising: a preparation step of preparing a long substrate film on which an adhesive layer is overlapped; a formation step of forming a thinned portion on one side of the adhesive layer to reduce the volume of the adhesive layer; and a lamination step of laminating the adhesive layer and the substrate layer on the adhesive layer so that one side of the adhesive layer is an opposing surface of the adhesive layer.

[0021] In this method for manufacturing a laminated film, the volume of the adhesive layer is reduced by providing a reduced-thickness portion on the surface of the adhesive layer facing the pressure-sensitive adhesive layer. By reducing a portion of the volume of the adhesive layer by the reduced-thickness portion, when the adhesive layer is used as an embedding portion for a semiconductor chip in the manufacture of a semiconductor package, it is possible to effectively suppress both bleeding and voids.

[0022]

[13] The method for manufacturing a laminated film according to

[12] , wherein in the forming step, the volume of the adhesive layer is reduced in accordance with the volume of the semiconductor chip to be embedded in the adhesive layer. In this case, by reducing a part of the volume of the adhesive layer by the reduced-thickness portion in an appropriate amount, it is possible to more effectively achieve both suppression of bleeding and suppression of voids.

[0023]

[14] The method for producing a laminated film according to

[12] , wherein the forming step involves pressing a bar coater against the surface while heating the adhesive layer to form a recess extending in one in-plane direction on the surface as the thinned portion. This method allows for easy control of the amount of volume reduction of the adhesive layer due to the thinned portion. It also facilitates the formation of the thinned portion.

[0024]

[15] The method for manufacturing a laminated film according to

[12] , wherein the forming step involves partially cutting the adhesive layer by irradiating it with laser light to form a recess extending in one in-plane direction on the one surface as the thinned portion. This method allows for easy control of the amount of volume reduction of the adhesive layer due to the thinned portion. It also makes it easy to form the thinned portion.

[0025]

[16] The method for manufacturing a laminated film according to any one of

[12] to

[15] , wherein the lamination step includes precutting the adhesive layer and the base layer to form an overhanging portion that extends beyond the edge of the adhesive layer, and then overlaying the overhanging portion on one surface of the base film. This configuration facilitates the attachment of the adhesive layer and base layer to an object such as a semiconductor wafer in the manufactured laminated film. Furthermore, because the adhesive layer is covered by the adhesive layer and base layer, thinned portions are protected.

[0026]

[17] A method for manufacturing a semiconductor chip with an adhesive layer, comprising: a preparation step of preparing a semiconductor chip with an adhesive layer, the semiconductor chip comprising a semiconductor chip and an adhesive layer provided on one side of the semiconductor chip; and a formation step of forming a reduced-material portion on the opposite side of the adhesive layer opposite the semiconductor chip to reduce the volume of the adhesive layer.

[0027] In this method for manufacturing a semiconductor chip with an adhesive layer, the volume of the adhesive layer is reduced by providing a reduced-thickness portion on the surface of the adhesive layer facing the pressure-sensitive adhesive layer. By reducing a portion of the volume of the adhesive layer by the reduced-thickness portion, when the adhesive layer is used as an embedding portion for a semiconductor chip in the manufacture of a semiconductor package, it is possible to effectively suppress both bleeding and voids.

[0028]

[18] The method for manufacturing a semiconductor chip with an adhesive layer according to

[17] , wherein in the forming step, the volume of the adhesive layer is reduced in accordance with the volume of the semiconductor chip to be embedded in the adhesive layer. In this case, by reducing a part of the volume of the adhesive layer by the reduced-thickness portion in an appropriate amount, it is possible to more effectively achieve both suppression of bleeding and suppression of voids.

[0029]

[19] The method for manufacturing a semiconductor chip with an adhesive layer according to

[17] , wherein the forming step involves cutting the opposite surface by irradiating it with laser light to form a recess extending in one in-plane direction of the opposite surface as the thinned portion. This method allows for easy control of the amount of reduction in the volume of the adhesive layer due to the thinned portion. It also makes it easy to form the thinned portion.

[0030]

[20] A method for manufacturing a semiconductor device, comprising: preparing a semiconductor chip with an adhesive layer according to any one of [7] to

[11] and a substrate on which the semiconductor chip is mounted; thermocompressing the semiconductor chip with the adhesive layer to the substrate with the adhesive layer facing the substrate; and forming an embedded portion between the semiconductor chip of the semiconductor chip with the adhesive layer and the substrate.

[0031] In this semiconductor device manufacturing method, the volume of the adhesive layer is reduced by using the semiconductor chip with the adhesive layer. By reducing part of the volume of the adhesive layer by the thinned portion, when the adhesive layer is used as an embedding portion of the semiconductor chip in the manufacturing of a semiconductor package, it is possible to effectively suppress both bleeding and voids.

[0032] According to the present disclosure, it is possible to effectively achieve both suppression of bleeding and suppression of voids.

[0033] 8A is a schematic cross-sectional view showing an example of a semiconductor package; FIG. 8B is a schematic plan view showing an example of a laminated film; and FIG. 8C is a cross-sectional view taken along line III-III in FIG. 2. (a) is a schematic cross-sectional view showing an attachment process, (b) is a schematic cross-sectional view showing a dicing process, and (c) is a schematic cross-sectional view showing an irradiation process. (a) is a schematic cross-sectional view showing a pickup process, and (b) is a schematic cross-sectional view showing a die-attach process. (a) is a schematic cross-sectional view showing a bleed, and (b) is a schematic cross-sectional view showing a void. 8B is a schematic plan view showing a main portion of a laminated film having a thinned portion. (a) and (b) are schematic cross-sectional views showing a recess that constitutes the thinned portion. (a) is a schematic diagram showing an example of a wireless bar used to form the recess shown in FIG. 8A, and (b) is a schematic diagram showing parameters of the groove. 8(a) is a schematic diagram showing an example of a wire bar used to form the recess shown in FIG. 8(b), and (b) is a schematic diagram showing the parameters of the wire. A schematic cross-sectional view showing how the recess is formed. A flowchart showing an example of a method for manufacturing a laminated film having a reduced-metal portion. A schematic cross-sectional view showing a semiconductor chip with an adhesive layer having a recess that is an example of a reduced-metal portion, and (b) is a schematic cross-sectional view showing how the recess is formed. A flowchart showing an example of a method for manufacturing a semiconductor chip with an adhesive layer having a reduced-metal portion. A schematic plan view showing a modified example of the reduced-metal portion. A schematic plan view showing another modified example of the reduced-metal portion.

[0034] Hereinafter, with reference to the drawings, preferred embodiments of a laminated film, a semiconductor chip with an adhesive layer, a method for manufacturing a laminated film, a method for manufacturing a semiconductor chip with an adhesive layer, and a method for manufacturing a semiconductor device according to one aspect of the present disclosure will be described in detail.

[0035] In the following description, the components (including steps, etc.) are not essential unless otherwise specified. The sizes of the components in each drawing are conceptual, and the relative relationships of the sizes between the components are not limited to those shown in each drawing. The exemplified numerical values ​​and their ranges do not limit the present disclosure.

[0036] In the following description, a numerical range indicated using "to" indicates a range that includes the numerical values ​​before and after "to" as the minimum and maximum values, respectively. Furthermore, in a numerical range that is stated in stages, the upper or lower limit value stated in one numerical range may be replaced with the upper or lower limit value of another numerical range that is stated in stages. The upper or lower limit value of a numerical range may be replaced with a value shown in an example.

[0037] FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor package. Here, a semiconductor device such as a NAND flash memory is shown as an example of the semiconductor package (semiconductor device) 1. As shown in FIG. 1, the semiconductor package 1 includes a substrate 2, a first semiconductor chip 3, a second semiconductor chip 4, an embedded portion 5, and a sealing portion 6. The substrate 2 is, for example, an organic substrate. It may also be a metal substrate such as a lead frame. Predetermined circuit patterns 7 and 8 are formed on one surface of the substrate 2.

[0038] The first semiconductor chip 3 is, for example, a controller chip. The first semiconductor chip 3 is electrically connected to a circuit pattern 7 via an adhesive layer 9. The first semiconductor chip 3 is electrically connected to a circuit pattern 8 via a first wire 10. The second semiconductor chip 4 is, for example, a memory chip. The second semiconductor chip 4 is disposed on one surface of the substrate 2 at a fixed distance from the first semiconductor chip 3. The second semiconductor chip 4 is electrically connected to the circuit pattern 8 via a second wire 11.

[0039] Between the second semiconductor chip 4 and the substrate 2, there is provided an embedded portion 5 formed by an adhesive layer 24 of a laminate film 21 described below. The first semiconductor chip 3, the circuit pattern 7, and the first wire 10 are each embedded by the embedded portion 5 between the second semiconductor chip 4 and the substrate 2. The first semiconductor chip 3, the second semiconductor chip 4, the first wire 10, and the second wire 11 are sealed on one surface of the substrate 2 by a sealing portion 6 that is outer than the embedded portion 5.

[0040] Fig. 2 is a schematic plan view showing an example of a laminate film. Fig. 3 is a cross-sectional view taken along line III-III in Fig. 2. The laminate film 21 shown in Figs. 2 and 3 is a long film used in the manufacturing process of the semiconductor package 1 described above, for example, to fix a semiconductor wafer in a dicing process and to form the embedded portion 5 in a die-attach process. The laminate film 21 is generally stored in a rolled state, and is unwound from the roll in the amount required for use.

[0041] 2 and 3, the laminate film 21 has a long base film 22 and label portions 23 provided on one surface of the base film 22 at predetermined intervals in the extending direction of the base film 22. The label portions 23 are composed of an adhesive layer 24 that overlaps the base film 22, a pressure-sensitive adhesive layer 25 that overlaps the adhesive layer 24, and a base layer 27 that overlaps the pressure-sensitive adhesive layer 25. The label portions 23 have, for example, a circular shape in a plan view.

[0042] The base film 22 is, for example, a resin film. Examples of resin materials that form the base film 22 include polytetrafluoroethylene, polyethylene, polypropylene, polymethylpentene, polyethylene terephthalate, and polyimide. The thickness of the base film 22 may be, for example, 60 to 200 μm, or 70 to 170 μm. The surface of the base film 22 may be subjected to a release treatment using silicone or the like.

[0043] The adhesive layer 24 is a film-like portion known as a die attach film, for example. Examples of materials constituting the adhesive layer 24 include electrically insulating thermosetting resins. Examples of thermosetting resins include epoxy resins, bismaleimide resins, triazine resins, polyimide resins, polyamide resins, cyanoacrylate resins, phenolic resins, unsaturated polyester resins, melamine resins, urea resins, polyurethane resins, polyisocyanate resins, furan resins, resorcinol resins, xylene resins, benzoguanamine resins, diallyl phthalate resins, silicone resins, polyvinyl butyral resins, siloxane-modified epoxy resins, siloxane-modified polyamideimide resins, and acrylate resins. These resins can be used alone or in combination. The adhesive layer 24 may also contain acrylic rubber.

[0044] The adhesive layer 25 and the base layer 27 are, for example, film-like portions known as dicing tape. The adhesive layer 25 may be a single layer or multiple layers. The adhesive layer 25 preferably has adhesive strength at room temperature and the necessary adhesive strength to the adherend. The adhesive layer 25 preferably has the property of being cured (i.e., its adhesive strength is reduced) by high-energy rays such as radiation or heat. More preferably, the adhesive layer 25 is easily peelable from the base film 22 and the adhesive layer 24 without the application of high-energy rays such as radiation or heat. The adhesive layer 25 may be a pressure-sensitive adhesive layer. The adhesive layer 25 may be formed using, for example, acrylic resin, various synthetic rubbers, natural rubber, or polyimide resin. The base layer 27 is formed from, for example, a resin such as polyolefin, polypropylene, or ionomer. The thickness of the adhesive layer 25, including the base layer 27, may be, for example, 10 μm to 200 μm or 20 μm to 150 μm.

[0045] 2 and 3 , in the label portion 23, the adhesive layer 25 and the base material layer 27 have an annular protruding portion P that protrudes outward beyond the edge of the adhesive layer 24. The protruding portion P overlaps one surface of the base material film 22. As a result, the adhesive layer 24 on one surface of the base material film 22 is covered by the adhesive layers 25 and 27.

[0046] In this embodiment, protective portions 26, 26 are provided to surround the periphery of the label portion 23. The protective portions 26 protect the label portion 23 from pressure when the laminate film 21 is wound into a roll. The protective portions 26 are arranged symmetrically in the width direction at both edge portions in the width direction of one surface of the base film 22, and extend in the extension direction of the base film 22. In this embodiment, the protective portions 26 are composed of an adhesive layer 25 and a base layer 27. The label portion 23 and the protective portion 26 are formed by laminating the adhesive layer 25 and the base layer 27 so as to cover the adhesive layer 24 on one surface of the base film 22, pre-cutting the adhesive layer 25 and the base layer 27 in a predetermined pattern, and peeling off the unnecessary portions from one surface of the base film 22.

[0047] Next, a method for manufacturing the semiconductor package 1 using the laminated film 21 described above will be described.

[0048] The method for manufacturing the semiconductor package 1 of this embodiment includes a bonding step, a dicing step, an irradiation step, a pick-up step, and a die-attach step. The bonding step is a step of bonding the adhesive layer 24, the pressure-sensitive adhesive layer 25, and the base material layer 27 to the semiconductor wafer W. In the bonding step, as shown in FIG. 4( a), the label portion 23 is attached to one surface of the semiconductor wafer W so that the adhesive layer 24 faces the semiconductor wafer W, and then the base material film 22 is peeled off from the label portion 23. In the bonding step, the peripheral edge of the pressure-sensitive adhesive layer 25 is fixed to a ring frame (not shown), and the semiconductor wafer W is supported inside the ring frame.

[0049] The dicing process is a process of dicing the semiconductor wafer W to form semiconductor chips 31 with adhesive layers. In the dicing process, a cutting means such as a blade or laser light is used to cut the semiconductor wafer W together with the adhesive layer 24 in a predetermined pattern (e.g., a grid pattern), as shown in FIG. 4( b). As a result, a plurality of semiconductor chips 31 with adhesive layers are formed on the adhesive layer 25. The chip portion 32 of the semiconductor chip 31 with adhesive layers will become the above-mentioned second semiconductor chip 4 in the semiconductor package 1 to be manufactured. When cutting the semiconductor wafer W and the adhesive layer 24, cutting lines are drawn so as to reach the adhesive layer 25, thereby more reliably separating adjacent semiconductor chips 31 with adhesive layers.

[0050] The irradiation step is a step of irradiating the adhesive layer 25 with light to harden it. In the irradiation step, as shown in FIG. 4( c), ultraviolet light V is irradiated onto the adhesive layer 25 to reduce the adhesive strength of the adhesive layer 25. The pick-up step is a step of picking up the semiconductor chip 31 with the adhesive layer from the adhesive layer 25. In the pick-up step, a pick-up means such as a collet C is used to pick up the semiconductor chip 31 with the adhesive layer from the adhesive layer 25 whose adhesive strength has been reduced, as shown in FIG. 5( a). Note that in the method for manufacturing the semiconductor package 1, the semiconductor chip 31 with the adhesive layer may be prepared in advance and the subsequent steps may be carried out.

[0051] The die-attach process is a process of placing the semiconductor chip 31 with an adhesive layer on the substrate 2. In the example of Fig. 5(b), the first semiconductor chip 3 is electrically connected to the circuit pattern 7 of the substrate 2 via the adhesive layer 9, and the first semiconductor chip 3 is electrically connected to the circuit pattern 8 via the first wire 10. In this state, the semiconductor chip 31 with an adhesive layer is thermocompression-bonded with the adhesive layer 24 facing the substrate 2. As a result, embedded portions 5 are formed between the second semiconductor chip 4 and the substrate 2, in which the first semiconductor chip 3, the circuit pattern 7, and the first wire 10 are embedded.

[0052] Increasing the heating temperature during thermocompression bonding tends to soften the adhesive layer 24 and further improve embeddability. The thermocompression bonding time may be, for example, 0.5 to 20 seconds, or 1 to 5 seconds. The pressure during thermocompression bonding may be 0.01 to 5 MPa, or 0.02 to 2 MPa.

[0053] After the pressure bonding, the structure including the adhesive layer 24 may be further heated to promote the curing of the adhesive layer 24. The temperature in this case is appropriately set based on the curing temperature of the adhesive layer 24, etc. The temperature may be changed in stages. The heating temperature may be 40°C to 300°C, or 60°C to 200°C. The heating time may be 30 minutes to 300 minutes.

[0054] Thereafter, the second semiconductor chip 4 is electrically connected to the circuit pattern 8 by the second wires 11, and the first semiconductor chip 3, the second semiconductor chip 4, the first wires 10, and the second wires 11 are sealed with the sealing portion 6, thereby obtaining the semiconductor package 1 shown in FIG. 1 . The sealing portion 6 can be formed, for example, by injection molding using a mold. After the sealing portion 6 is formed, the sealing portion 6 may be further heated to promote curing of the sealing portion 6. In this case, the heating temperature may be 165°C to 185°C. The heating time may be 0.5 hours to 8 hours.

[0055] In manufacturing the semiconductor package 1 described above, it is required that the first semiconductor chip 3 be sufficiently embedded (embedding property) by the embedding portion 5 using the adhesive layer 24. With regard to embedding property, it is important to simultaneously suppress bleeding and voids. Bleeding is a phenomenon in which the embedding portion 5 protrudes from between the substrate 2 and the second semiconductor chip 4, as shown in FIG. 6A, for example. Bleeding can cause problems such as interference with other elements on the substrate 2 and reduced workability when connecting wires (e.g., the second wire 11).

[0056] 6B, a void is a phenomenon in which a gap G occurs in the embedded portion 5 between the substrate 2 and the second semiconductor chip 4. The occurrence of a void may not only lead to a decrease in reliability due to poor embedding of the first semiconductor chip 3, but may also cause a phenomenon in which the embedded portion 5 bulges out in a convex shape together with the second semiconductor chip 4 (bowing) depending on the volume of the gap G.

[0057] There is a trade-off between suppressing bleeding and suppressing voids due to factors such as the volume of the embedded portion 5. For example, if the volume of the embedded portion 5 is excessive, the embedded portion 5 is likely to protrude from between the substrate 2 and the second semiconductor chip 4, and if the volume of the embedded portion 5 is insufficient, a gap G is likely to occur in the embedded portion 5 between the substrate 2 and the second semiconductor chip 4.

[0058] In response to this problem, in the laminated film 21, as shown in Fig. 7 and other figures, a reduced-material portion 41 is provided on a surface 24a of the adhesive layer 24 facing the pressure-sensitive adhesive layer 25, which reduces the volume of the adhesive layer 24 in accordance with the volume of the semiconductor chip (here, the first semiconductor chip 3) to be embedded in the adhesive layer 24. The opposed surface 24a of the adhesive layer 24 becomes an opposite surface 24b (see Fig. 16(a) and other figures) facing the opposite side from the surface attached to the semiconductor wafer W in the semiconductor chip 31 with the adhesive layer produced in the manufacturing process of the semiconductor package 1 described above. The opposed surface 24a becomes the surface that is pressed against the substrate 2 and the first semiconductor chip 3 on the substrate when the semiconductor chip 31 with the adhesive layer is thermocompression-bonded to the substrate 2 (see Fig. 5(b)).

[0059] In the present embodiment, the reduced-material portion 41 is formed by a recess 42 extending in one in-plane direction of the opposing surface 24a. In the example of FIG. 7 , a plurality of recesses 42 are arranged in the in-plane direction of the opposing surface 24a in the width direction of the base film 22. Each of the recesses 42 is formed in a continuous linear shape in the direction along the extension direction of the base film 22. In each semiconductor chip 31 with an adhesive layer fabricated using the laminate film 21, the sum of the amount of reduced material (volume reduction) of the adhesive layer 24 due to each recess 42 may be equal to the volume of the first semiconductor chip 3 to be embedded in the adhesive layer 24, or may be less than the volume of the first semiconductor chip 3. In each semiconductor chip 31 with an adhesive layer fabricated using the laminate film 21, the sum of the amount of reduced material (volume reduction) of the adhesive layer 24 due to each recess 42 may be 1% to 100%, assuming that the volume of the first semiconductor chip 3 to be embedded in the adhesive layer 24 is 100%.

[0060] The L / S (line and space) of the recess 42 is set, for example, according to the planar shape of the first semiconductor chip 3 to be embedded by the embedding portion 5. The L / S of the recess 42 is set, for example, so that one or more recesses 42 overlap the first semiconductor chip 3 when the semiconductor chip 31 with the adhesive layer is thermocompression bonded to the substrate 2. As an example, when the planar dimensions of the first semiconductor chip 3 are 5 mm x 10 mm, the L / S of the recess 42 may be 2500 μm / 5 μm to 5 μm / 2500 μm. The depth of the recess 42 is designed, for example, based on the volume of the first semiconductor chip 3 and the L / S of the recess 42. The depth of the recess 42 may be, for example, 5 μm to 1200 μm.

[0061] The recess 42 can be configured in various ways. In the example of FIG. 8( a), the cross-sectional shape of the recess 42A is wavy or arc-shaped. In the example of FIG. 8( b), the cross-sectional shape of the recess 42B is rectangular. The recess 42A having a wavy or arc-shaped cross-section as shown in FIG. 8( a) can be formed, for example, by a bar coater 43. As the bar coater 43, for example, a wireless bar 44 as shown in FIG. 9( a) can be used. The wireless bar 44 is a stainless steel shaft with grooves 44 a formed on the circumferential surface.

[0062] When forming the recesses 42A using the wireless bar 44, the adhesive layer 24 is heated to a predetermined temperature, and the wireless bar 44 is moved linearly in the in-plane direction of one surface of the adhesive layer 24 while pressing the grooves 44a on the circumferential surface of the wireless bar 44 against one surface (the surface that will become the opposing surface 24a) of the adhesive layer 24. As a result, recesses 42A having a wavy or arc-shaped cross-sectional shape corresponding to the shape of the grooves 44a are formed on one surface of the adhesive layer 24. By adjusting the pitch P and depth H of the grooves 44a of the wireless bar 44, and the pocket area A between the grooves 44a, 44a (see FIG. 9B), etc., recesses 42A having a desired shape and L / S can be formed on the opposing surface 24a of the adhesive layer 24.

[0063] Alternatively, a wire bar 45 as shown in FIG. 10( a) can be used as the bar coater 43. The wire bar 45 has a stainless steel shaft with a wire 45a wound around its periphery. When forming the recesses 42A using the wire bar 45, similar to when using the wireless bar 44, the adhesive layer 24 is heated to a predetermined temperature, and the wire 45a on the periphery of the wire bar 45 is pressed against one surface of the adhesive layer 24 (the surface that will become the opposing surface 24a) while the wire bar 45 is moved linearly in the in-plane direction of the one surface of the adhesive layer 24. This forms recesses 42A having a wavy or arc-shaped cross-sectional shape corresponding to the shape of the wire 45a on one surface of the adhesive layer 24. By adjusting the diameter D of the wire 45a of the wire bar 45, the pocket area A between the wires 45a (see FIG. 10( b)), and the like, recesses 42A having a desired shape and L / S can be formed on the opposing surface 24a of the adhesive layer 24.

[0064] The recess 42B having a rectangular cross section as shown in Fig. 8B can be formed by partially cutting the adhesive layer 24 by irradiating it with a laser beam L, as shown in Fig. 11. The laser beam L used to process the recess 42B may be, for example, a green laser, a CO ２ A green laser is a laser that converts a fundamental wave of 1064 nm from a YAG laser or a semiconductor laser into a second harmonic of 532 nm using a nonlinear optical crystal or the like. ２ The laser is CO ２It is an infrared laser with a wavelength of around 10 μm that amplifies light using a medium.

[0065] By moving the laser beam L linearly in the in-plane direction of one surface of the adhesive layer 24, a portion of the adhesive layer 24 is cut, and a recess 42B having a rectangular cross-sectional shape is formed on one surface of the adhesive layer 24. By adjusting the irradiation conditions of the laser beam L, a recess 42B having a desired cross-sectional shape and L / S can be formed on one surface of the adhesive layer 24. The cross-sectional shape of the recess 42B is not limited to a rectangular shape, and various shapes such as a triangular shape, a semicircular shape, a U-shape, or a step shape can also be used. For example, when a femtosecond green laser is used to process the recess 42B, the output can be 0.1 W to 0.3 W, the scanning speed can be 500 mm / sec, and the repetition frequency can be 100 kHz.

[0066] Next, a method for manufacturing the laminated film 21 will be described.

[0067] Fig. 12 is a flowchart showing an example of a method for manufacturing a laminated film having a reduced-wall portion 41. As shown in Fig. 15, the method for manufacturing the laminated film 21 includes a preparation step (step S01), a formation step (step S02), and a lamination step (step S03). These steps are performed, for example, by a roll-to-roll method.

[0068] The preparation step S01 is a step of preparing a long base film 22 on which an adhesive layer 24 is overlapped. In the preparation step S01, a raw web of the long base film 22 having the adhesive layer 24 provided on one side thereof is unwound from a unwinding roller. The formation step S02 is a step of forming a reduced-wall portion 41 on one side of the adhesive layer 24, which reduces the volume of the adhesive layer 24 in accordance with the volume of the semiconductor chip (first semiconductor chip 3) into which the adhesive layer 24 is to be embedded. In the formation step S02, the raw web of the long adhesive layer 24 is unwound from a unwinding roller. Next, one side of the adhesive layer 24 is processed to form the reduced-wall portion 41 on that surface.

[0069] When forming the recesses 42 using the bar coater 43, the bar coater 43 is pressed against one surface of the adhesive layer 24 while heating the adhesive layer 24, thereby forming the recesses 42 extending in one in-plane direction on the one surface of the adhesive layer 24 (see FIGS. 9( a) and 10( a)). When partially cutting the adhesive layer 24, the laser light L is moved linearly in the in-plane direction on the one surface of the adhesive layer 24, thereby cutting a part of the adhesive layer 24 and forming the recesses 42 extending in the in-plane direction on the one surface of the adhesive layer 24 (see FIG. 11).

[0070] The lamination step S03 is a step of laminating an adhesive layer 25 and a base layer 27 on the adhesive layer 24 so that one surface of the adhesive layer 24 forms the surface 24a facing the adhesive layer 25. Here, a film in which the adhesive layer 25 is laminated on the base layer 27 is prepared, and the adhesive layer 25 and the base layer 27 are laminated on one surface of the base film 22 so that the adhesive layer 25 faces the adhesive layer 24. After lamination, the adhesive layer 25 and the base layer 27 are precut into a circular shape. This forms a label portion 23 on one surface of the base film 22, thereby obtaining the laminated film 21 shown in Figures 2 and 3. In precutting the adhesive layer 25 and the base layer 27, an overhanging portion P is formed that overhangs the edge of the adhesive layer 24, and the overhanging portion P is overlapped on one surface of the base film 22. This results in the adhesive layer 24 on one surface of the base film 22 being covered by the adhesive layer 25 and the base layer 27.

[0071] As described above, in laminated film 21, thinned portion 41 is provided on surface 24a of adhesive layer 24 facing pressure-sensitive adhesive layer 25, and the volume of adhesive layer 24 is reduced in accordance with the volume of the semiconductor chip (first semiconductor chip 3) to be embedded in adhesive layer 24. By reducing a portion of the volume of adhesive layer 24 by thinned portion 41 without excess or deficiency, when adhesive layer 24 is used as embedding portion 5 of first semiconductor chip 3 in manufacturing semiconductor package 1, it is possible to effectively achieve both suppression of bleeding and suppression of voids.

[0072] In this embodiment, the thinned portion 41 is formed by a recess 42 extending in one in-plane direction of the opposing surface 24 a. With this configuration, the amount of reduction in the volume of the adhesive layer 24 due to the thinned portion 41 can be easily controlled by designing the shape and dimensions of the recess 42 and the L / S ratio, etc. Also, the thinned portion 41 can be easily formed.

[0073] In the present embodiment, the adhesive layer 25 and the base material layer 27 in the label portion 23 have an overhanging portion P that overhangs the edge of the adhesive layer 24, and the overhanging portion P overlaps one surface of the base material film 22. This configuration makes it easy to attach the adhesive layer 25 and the base material layer 27 to an object such as a semiconductor wafer W. Furthermore, because the adhesive layer 24 is covered by the adhesive layer 25 and the base material layer 27, the thinned portion 41 is protected.

[0074] In the above embodiment, the thinned portion 41 is formed on the opposing surface 24a of the adhesive layer 24 of the laminated film 21, but as shown in Fig. 13(a), the thinned portion 41 may be formed on the adhesive layer 24 of the semiconductor chip 31 with the adhesive layer. In the semiconductor chip 31 with the adhesive layer of Fig. 13(a), the thinned portion 41 is provided on the opposite surface 24b of the adhesive layer 24 opposite to the chip portion (semiconductor chip) 32.

[0075] In the example of Figure 13(a), the thinned portion 41 is configured by a recess 52 extending in one in-plane direction on the opposite surface 24b of the adhesive layer 24. The recess 52 can be formed, for example, as shown in Figure 13(b), by partially cutting the adhesive layer 24 by irradiating it with laser light L. In this case, for example, while the chip portion 32 side of the semiconductor chip 31 with the adhesive layer is held by a collet C, the laser light L is moved linearly in the in-plane direction on the opposite surface 24b of the adhesive layer 24. As a result, a portion of the adhesive layer 24 is cut away, and the recess 52 is formed on the opposite surface 24b of the adhesive layer 24.

[0076] Fig. 14 is a flowchart showing an example of a method for manufacturing a semiconductor chip with an adhesive layer having a reduced-material portion 41. As shown in Fig. 14, the method for manufacturing a semiconductor chip with an adhesive layer 31 includes a preparation step (step S11) and a formation step (step S12).

[0077] The preparation step S11 is a step of preparing a semiconductor chip 31 with an adhesive layer, which includes a chip portion (semiconductor chip) 32 and an adhesive layer 24 provided on one surface of the chip portion 32. In the preparation step S11, for example, the attachment step, dicing step, irradiation step, and pick-up step in the manufacturing method of the semiconductor package 1 described above are each performed, and a state is formed in which the chip portion 32 side of the semiconductor chip 31 with an adhesive layer is held by a collet C.

[0078] The forming step S12 is a step of forming a reduced-material portion 41 on the opposite surface 24b of the adhesive layer 24 opposite the chip portion 32, the reduced-material portion 41 reducing the volume of the adhesive layer 24 in accordance with the volume of the semiconductor chip (first semiconductor chip 3) to be embedded in the adhesive layer 24. In the forming step S12, the laser light L is moved linearly in the in-plane direction of the opposite surface 24b of the adhesive layer 24, thereby cutting a part of the adhesive layer 24 and forming a recess 52 extending in the in-plane direction of the opposite surface 24b of the adhesive layer 24 (see FIG. 13(b)).

[0079] In such a semiconductor chip 31 with an adhesive layer, a reduced-material portion 41 is also provided on the surface 24a of the adhesive layer 24 facing the pressure-sensitive adhesive layer 25, and the volume of the adhesive layer 24 is reduced in accordance with the volume of the semiconductor chip (first semiconductor chip 3) that is to be embedded in the adhesive layer 24. By reducing a portion of the volume of the adhesive layer 24 by the reduced-material portion 41 without excess or deficiency, it is possible to effectively achieve both suppression of bleeding and suppression of voids in the manufacture of the semiconductor package 1.

[0080] In this embodiment, the thinned portion 41 is formed by a recess 52 extending in one in-plane direction on the opposite surface 24b. With this configuration, the amount of reduction in the volume of the adhesive layer 24 due to the thinned portion 41 can be easily controlled by designing the shape and dimensions of the recess 52 and the L / S ratio, etc. Also, the thinned portion 41 can be easily formed.

[0081] The present disclosure is not limited to the above embodiment. For example, in the above embodiment, linear thinned portions 41 are formed in the in-plane direction of the opposing surface 24 a of the laminate film 21 in the direction along the extension direction of the base film 22. However, the extension direction of the thinned portions 41 is not limited to this, and may be along a direction that obliquely intersects the extension direction of the base film 22 or along a direction perpendicular to the extension direction of the base film 22.

[0082] Although the above embodiment illustrates the thinned portion 41 having a continuous, linear shape, the shape of the thinned portion 41 is not limited thereto. For example, the thinned portion 41 may be formed by dotted or dashed recesses 62A as shown in FIG. 15( a), or by wavy recesses 62B as shown in FIG. 15( b). The thinned portion 41 may be formed by recesses 62C arranged in a grid pattern in the in-plane direction of the opposing surface 24a as shown in FIG. 16( a), or by recesses 62D arranged in a checkerboard pattern in the in-plane direction of the opposing surface 24a as shown in FIG. 16( b). In the checkerboard pattern, rectangular recesses 62D in a plan view are arranged alternately in a grid pattern.

[0083] In these configurations, the amount of reduction in the volume of the adhesive layer 24 due to the reduced thickness portion 41 can be easily controlled by designing the shape and dimensions of the recess and the L / S ratio, etc. Furthermore, it is also easy to form the reduced thickness portion 41. When forming multiple reduced thickness portions 41, the recesses constituting the reduced thickness portion 41 may differ from one another in terms of width, cross-sectional shape, arrangement interval, etc.

[0084] 1...semiconductor package (semiconductor device), 2...substrate, 3...first semiconductor chip (semiconductor chip), 4...second semiconductor chip (semiconductor chip), 5...embedded portion, 21...laminated film, 22...base film, 23...label portion, 24...adhesive layer, 24a...facing surface, 24b...opposite surface, 25...adhesive layer, 27...base layer, 31...semiconductor chip with adhesive layer, 32...chip portion (semiconductor chip), 41...thinned portion, 42 (42A, 42B, 62A to 62D)...recess, 43...bar coater, 52...recess, L...laser light, P...protruding portion.

Claims

1. A laminated film comprising: a long substrate film; and label portions provided on one surface of the substrate film at predetermined intervals in the extending direction of the substrate film, wherein the label portions have an adhesive layer overlaying the substrate film, a pressure-sensitive adhesive layer overlaying the adhesive layer, and a substrate layer overlaying the pressure-sensitive adhesive layer, and a reduced-weight portion that reduces the volume of the adhesive layer is provided on the surface of the adhesive layer facing the pressure-sensitive adhesive layer.

2. The laminated film according to claim 1, wherein the thinned portion reduces the volume of the adhesive layer in accordance with the volume of the semiconductor chip to be embedded in the adhesive layer.

3. The laminated film according to claim 1, wherein the thinned portion is constituted by a recess extending in one direction within the plane of the opposing surface.

4. The laminated film according to claim 1, wherein the thinned portion is constituted by recesses arranged in a grid pattern in the in-plane direction of the opposing surface.

5. The laminated film according to claim 1, wherein the thinned portions are formed by recesses arranged in a checkerboard pattern in the in-plane direction of the opposing surfaces.

6. A laminated film according to any one of claims 1 to 5, wherein in the label portion, the adhesive layer and the base layer have protruding portions that protrude outward beyond the edge of the adhesive layer, and the protruding portions overlap one surface of the base film.

7. A semiconductor chip with an adhesive layer, comprising: a semiconductor chip; and an adhesive layer provided on one side of the semiconductor chip, wherein a reduced-weight portion that reduces the volume of the adhesive layer is provided on the surface of the adhesive layer facing the semiconductor chip.

8. The semiconductor chip with adhesive layer according to claim 7, wherein the thinned portion reduces the volume of the adhesive layer in accordance with the volume of another semiconductor chip into which the adhesive layer is to be embedded.

9. The semiconductor chip with adhesive layer according to claim 7, wherein the thinned portion is formed by a recess extending in one direction within the plane of the opposing surface.

10. The semiconductor chip with adhesive layer according to claim 7, wherein the thinned portion is constituted by recesses arranged in a grid pattern in the in-plane direction of the opposing surface.

11. The semiconductor chip with an adhesive layer according to claim 7, wherein the thinned portion is constituted by recesses provided in a checkerboard pattern in the in-plane direction of the opposing surface.

12. A method for manufacturing a laminated film, comprising: a preparation step of preparing a long substrate film on which an adhesive layer is overlapped; a formation step of forming a thinned portion on one surface of the adhesive layer to reduce the volume of the adhesive layer; and a lamination step of laminating the adhesive layer and the substrate layer on the adhesive layer so that one surface of the adhesive layer faces the adhesive layer.

13. The method for manufacturing a laminated film according to claim 12, wherein in the forming step, the volume of the adhesive layer is reduced in accordance with the volume of the semiconductor chip into which the adhesive layer is to be embedded.

14. A method for manufacturing a laminated film as described in claim 12, wherein in the forming process, a bar coater is pressed against the one surface while heating the adhesive layer, thereby forming a recess extending in one in-plane direction of the one surface as the thinned portion.

15. A method for manufacturing a laminated film as described in claim 12, wherein in the forming process, the adhesive layer is partially cut by irradiating it with laser light to form a recess extending in one in-plane direction on the one surface as the thinned portion.

16. A method for manufacturing a laminated film according to any one of claims 12 to 15, wherein in the lamination step, the adhesive layer and the base layer are precut so as to form an overhanging portion that extends outward beyond the edge of the adhesive layer, and the overhanging portion is superimposed on one side of the base film.

17. A method for manufacturing a semiconductor chip with an adhesive layer, comprising: a preparation step of preparing a semiconductor chip with an adhesive layer, the semiconductor chip having a semiconductor chip and an adhesive layer provided on one side of the semiconductor chip; and a formation step of forming a reduced-weight portion on the surface of the adhesive layer opposite the semiconductor chip to reduce the volume of the adhesive layer.

18. The method for manufacturing a semiconductor chip with an adhesive layer according to claim 17, wherein in the forming step, the volume of the adhesive layer is reduced in accordance with the volume of the semiconductor chip into which the adhesive layer is to be embedded.

19. A method for manufacturing a semiconductor chip with an adhesive layer as described in claim 17, wherein in the forming process, the opposite surface is cut by irradiating it with laser light to form a recess extending in one in-plane direction of the opposite surface as the thinned portion.

20. A method for manufacturing a semiconductor device, comprising: preparing a semiconductor chip with an adhesive layer according to any one of claims 7 to 11 and a substrate on which the semiconductor chip is mounted; thermocompression bonding the semiconductor chip with an adhesive layer to the substrate with the adhesive layer facing the substrate; and forming an embedded portion between the semiconductor chip of the semiconductor chip with an adhesive layer and the substrate.

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