Circuit board and display apparatus

Abstract

A circuit board and a display apparatus. The circuit board is provided with a main body area, a bending area and a bonding area, which are connected in sequence. The circuit board comprises a plurality of stacked electrically conductive layers. The circuit board further comprises a first signal line, wherein the first signal line comprises a plurality of first traces and a plurality of second traces; the first traces are arranged in the main body area and extend in a first direction; the second traces are arranged in the bending area, with one end of each second trace extending to the main body area to be connected to one first trace, and the other end of each second trace extending to the bonding area; the first direction points from the main body area to the bending area; the plurality of first traces are arranged on different electrically conductive layers; the orthographic projections of at least two first traces on a reference plane overlap, with two ends of an overlapping part being connected; and the reference plane is parallel to a surface of each electrically conductive layer.

Description

Circuit board and display device

[0001] This application claims priority to Chinese patent application No. 202410323723.9, filed on March 20, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to the field of display technology, and in particular to a circuit board and a display device. Background Art

[0003] With the development of display technology, display devices (such as mobile phones, laptops, and tablets) are increasingly used in people's lives. Among them, organic light-emitting diode (OLED) displays have attracted widespread attention due to their advantages such as active illumination, wide viewing angle, high contrast, fast response, low power consumption, and ultra-thinness. Summary of the Invention

[0004] In one aspect, a circuit board is provided. The circuit board has a main body area, a bending area, and a binding area connected in sequence. The circuit board includes multiple conductive layers stacked together. The circuit board also includes a first signal line, the first signal line including a plurality of first traces and a second trace; the first trace is arranged in the main body area and extends along a first direction; the second trace is arranged in the bending area, with one end extending to the main body area and connected to the first trace, and the other end extending to the binding area; the first direction is from the main body area to the bending area; the plurality of first traces are arranged in different conductive layers, the orthographic projections of at least two of the first traces on a reference plane overlap, and the two ends of the overlapping portion are connected; the reference plane is parallel to the surface of the conductive layer.

[0005] In some embodiments, the multilayer conductive layer includes a first conductive layer and / or a second conductive layer. The first conductive layer includes a second signal line; the signal transmitted by the second signal line is different from the signal transmitted by the first signal line, and the line width of the second signal line is smaller than the sum of the line widths of the plurality of first routing lines; the plurality of first routing lines include a first sub-line, and the first sub-line is arranged in the first conductive layer. The second conductive layer is arranged on one side of the first conductive layer along a third direction, and the second conductive layer includes a third signal line, and the line width of the third signal line is smaller than the sum of the line widths of the plurality of first routing lines; the signal transmitted by the third signal line is different from the signal transmitted by the first signal line; the plurality of first routing lines also include a second sub-line, and the second sub-line is arranged in the second conductive layer, and the third direction is perpendicular to the first conductive layer.

[0006] In some embodiments, the orthographic projection of the second sub-line on the reference plane overlaps with the orthographic projection of the first sub-line on the reference plane;

[0007] In some embodiments, the circuit board further includes at least one insulating layer disposed between the first conductive layer and the second conductive layer; the at least one insulating layer includes a connection hole; the first sub-line includes a set segment, and the set segment of the first sub-line extends into the connection hole to connect with the second sub-line.

[0008] In some embodiments, the first sub-line includes a set line segment, and a length of the set line segment is equal to a length of the shorter one of the first sub-line and the second sub-line.

[0009] In some embodiments, the first sub-line includes a plurality of set line segments, the length of the set line segments is smaller than the length of the first sub-line and smaller than the length of the second sub-line, and the plurality of set line segments are spaced apart along the first direction.

[0010] In some embodiments, the plurality of first traces have the same width.

[0011] In some embodiments, the second routing line is disposed on the same layer as one of the first routing lines.

[0012] In some embodiments, the resistivities of the plurality of first traces are equal, and the width of the second trace is greater than or equal to the sum of the widths of the plurality of first traces.

[0013] In some embodiments, at least two first traces have different resistivities, the second trace is connected to one of the first traces with a smaller resistivity, and the width of the second trace is smaller than the sum of the widths of the first traces.

[0014] In some embodiments, the multi-layer conductive layer further includes a third conductive layer, the third conductive layer being a different conductive layer from the conductive layer where the first trace is located, and the second trace is disposed in the third conductive layer.

[0015] In some embodiments, the outermost conductive layers in the multi-layer conductive layers where the multiple first traces are located are the fourth conductive layer and the fifth conductive layer; the third conductive layer is arranged on a side of one of the fourth conductive layer and the fifth conductive layer away from the other.

[0016] In some embodiments, the sum of the line widths of the plurality of first traces is greater than or equal to 0.8 mm.

[0017] In some embodiments, the width of the first trace is less than 0.8 mm.

[0018] In some embodiments, the width of the circuit board located in the main body area along the second direction is 11 mm to 13 mm; and the second direction intersects the first direction.

[0019] In another aspect, a display device is provided. The display device includes a display panel and a circuit board according to any of the above embodiments. The display panel has a display side and a non-display side disposed opposite each other. The circuit board is disposed on the non-display side of the display panel and is connected to the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0021] FIG1 is a structural diagram of a display device according to some embodiments;

[0022] FIG2 is another structural diagram of a display device according to some embodiments;

[0023] FIG3 is another structural diagram of a display device according to some embodiments;

[0024] FIG4 is a structural diagram of a display panel including a main body portion, a bending portion, and a binding portion according to some embodiments;

[0025] FIG5 is a structural diagram of an unbent circuit board in a display device according to some embodiments;

[0026] FIG6 shows a structure in which a circuit board in a display device is bent according to some embodiments;

[0027] FIG7 is a structural diagram of a circuit board according to some embodiments;

[0028] FIG8 is a cross-sectional view along section line AA in FIG7;

[0029] FIG9 is a structural diagram of a circuit board including a first conductive layer according to some embodiments;

[0030] FIG10 is a structural diagram of a circuit board including a second conductive layer according to some embodiments;

[0031] FIG11 is a structural diagram of a second routing line including a set line segment according to some embodiments;

[0032] FIG12 is a structural diagram showing a second routing line including a plurality of set line segments according to some embodiments;

[0033] FIG13 is a cross-sectional view along the section line BB in FIG7 . DETAILED DESCRIPTION

[0034] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0035] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0036] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0037] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0038] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0039] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0040] As used herein, the term "if" is optionally interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined that" or "if [stated condition or event] is detected" are optionally interpreted to mean "upon determining" or "in response to determining" or "upon detecting [stated condition or event]" or "in response to detecting [stated condition or event]," depending on the context.

[0041] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0042] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0043] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0044] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within an acceptable deviation range, wherein the acceptable deviation range is as determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, that the difference between the two equals is less than or equal to 5% of either one.

[0045] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0046] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0047] As shown in FIG. 1 , some embodiments of the present disclosure provide a display device 1000 , which may be any device that displays anything, whether in motion (eg, video) or stationary (eg, still image), and whether text or images.

[0048] Exemplarily, the display device 1000 can be any product or component with a display function, such as a television, a laptop computer, a tablet computer, a mobile phone, a personal digital assistant (PDA), a navigator, a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a vehicle display, or an aircraft display.

[0049] In some examples, as shown in FIG1 , the display device 1000 may be a portable display product. For example, the display device 1000 may be the mobile phone shown in FIG1 .

[0050] In some other examples, as shown in FIG2 , the display device 1000 may be a wearable device. For example, the display device 1000 may be a watch as shown in FIG2 .

[0051] The following uses a mobile phone as an example to schematically illustrate some embodiments of the present disclosure. However, the embodiments of the present disclosure are not limited thereto, and a watch as the display device may also be considered, as long as the same technical concept is applied.

[0052] In some embodiments, as shown in FIG. 3 , a display device 1000 includes a display panel 100 , a housing 200 , and a cover plate 300 .

[0053] Among them, the display panel 100 has a relative display side 100A and a non-display side 100B, the display side 100A refers to the side of the display panel 100 that can emit light (the upper side of the display panel 100 in Figure 3), and the non-display side 100B refers to the other side opposite to the display side 100A (the lower side of the display panel 100 in Figure 3).

[0054] The display panel 100 may be of various types and may be selected according to actual needs.

[0055] Exemplarily, the display panel 100 may be an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, an active matrix organic light-emitting diode (AMOLED) display panel, a liquid crystal display (LCD) display panel, or a mini / micro light-emitting display (MLED) display panel, etc. The embodiments of the present disclosure are not specifically limited herein.

[0056] As shown in FIG. 3 , the housing 200 may be a box-shaped structure with an opening. The display panel 100 may be disposed in the housing 200 . The cover plate 300 is disposed on the display side of the display panel 100 and located at the opening of the housing 200 .

[0057] As shown in FIG. 3 , the longitudinal section of the housing 200 may be, for example, U-shaped. The display panel 100 is disposed in the housing 200 , and the cover plate 300 is disposed at the opening of the housing 200 .

[0058] In some embodiments, as shown in Figure 4, the display panel 100 is a flexible display panel, and the display panel 100 includes a main body 110, a bending portion 120 and a binding portion 130 connected in sequence. Along the second direction Y, the bending portion 120 is located on one side of the main body 110, and the binding portion 130 is located on the side of the bending portion 120 away from the main body 110, that is, the bending portion 120 is located between the main body 110 and the binding portion 130.

[0059] The main body 110 may be the portion of the display panel 100 used to display images. As shown in FIG4 , the main body 110 has a display side 100A and a non-display side 100B disposed opposite each other. It should be noted that the display side 100A refers to the side of the main body 110 that displays images (the upper side of the main body 110 in FIG4 ), and the non-display side 100B refers to the side opposite the display side 100A (the lower side of the main body 110 in FIG4 ).

[0060] Through the bending process, as shown in Figures 5 and 6 , the bending portion 120 can be bent along a bending axis extending in the first direction X toward the non-display side 100B of the main body 110 of the display panel 100, causing the binding portion 130 to bend toward the non-display side 100B of the main body 110, thereby reducing the bezel of the display device 1000 (as shown in Figures 1 and 2 ). The bending axis is not an actual structure in the display panel 100; it is merely a concept proposed to illustrate the bending process of the display panel 100.

[0061] On this basis, as shown in Figures 4, 5, and 6, the display device 1000 further includes a driver chip 400, which can be disposed on the binding portion 130. As shown in Figures 5 and 6, when the display panel 100 is bent, the driver chip 400 is disposed on a side of the binding portion 130 away from the main body. The driver chip 400 is configured to provide the data signals required for displaying the image to the main body 110 via the binding portion 130 and the bent portion 120, thereby controlling the display panel 100 to display images.

[0062] The driver chip 400 includes at least one of microchips such as a source driver chip, a touch control chip, a timing controller, and a gamma circuit, and the embodiments of the present disclosure are not specifically limited thereto.

[0063] In some embodiments, as shown in Figures 4, 5, and 6, the display device 1000 further includes a circuit board 600. Along the third direction Z, the circuit board 600 is disposed on a side of the driver chip 400 that is close to the binding portion 130, i.e., the circuit board 600 and the driver chip 400 are disposed on the same side of the binding portion 130. Along the second direction Y, the circuit board 600 is disposed on a side of the driver chip 400 that is away from the bending portion 120, and the circuit board 600 is disposed on the binding portion 130. The circuit board 600 is connected to the driver chip 400 and the binding portion 130. In this way, the driver chip 400 can provide the display panel 100 with the data signals required for displaying images through the circuit board 600.

[0064] In some examples, as shown in FIG. 5 , the circuit board 600 has a main body region 610 , a bending region 620 , and a binding region 630 that are sequentially connected.

[0065] In the flattened state, the main body region 610, the bending region 620, and the binding region 630 are arranged along a first direction X. Along the first direction X, the length of the circuit board 600 is greater than the width of the display panel 100. As shown in FIG6 , in the bent state, the circuit board 600 in the bending region 620 bends toward the side of the circuit board 600 in the main body region 610 that is closer to the binding portion 130, thereby bending the circuit board 600 in the binding region 630 to the side of the circuit board 600 in the main body region 610 that is closer to the binding portion 130. Thus, along the first direction X, the length of the circuit board 600 is less than the width of the display panel 100, and the circuit board 600 does not interfere with the installation of the display panel 100 and the housing 200.

[0066] As shown in Figure 6, the circuit board 600 located in the main area 610 is connected to the driver chip 400, and the circuit board 600 located in the binding area 630 is connected to the binding part 130. In this way, the driver chip 400 provides the data signal required for displaying the picture to the main body 110 through the binding part 130 and the bending part 120 to control the display panel 100 to display the image.

[0067] 5 , along the second direction Y, the width of the main region 610 is greater than the width of the binding region 630 and greater than the width of the bending region 620 along the second direction Y. The second direction Y intersects the first direction X, for example, the second direction Y is perpendicular to the first direction X.

[0068] In some embodiments, as shown in FIG. 7 , a circuit board 600 includes a plurality of conductive layers 601 stacked together.

[0069] Exemplarily, the circuit board 600 includes two conductive layers 601 , three conductive layers 601 , four conductive layers 601 , five conductive layers 601 or eight conductive layers 601 that are stacked, which is not specifically limited in the embodiments of the present disclosure.

[0070] For example, the conductive layer 601 may be made of metal, such as copper or silver. In this case, the circuit board 600 has better conductivity and lower resistance.

[0071] The circuit board 600 further includes a plurality of signal lines 1, which are disposed on the multi-layer conductive layer 601. For example, the plurality of signal lines 1 include at least one of a signal line for transmitting a first power signal, a signal line for transmitting a second power signal, a signal line for transmitting a touch signal, a signal line for transmitting a communication protocol, a signal line for transmitting a data signal, a signal line for transmitting a reset signal, and a signal line for transmitting a logic signal.

[0072] As shown in FIG7 , the plurality of signal lines 1 include first-type signal lines 11 and second-type signal lines 12. The first-type signal lines 11 need to carry a relatively large current. For example, the first-type signal lines 11 include at least one of signal lines that transmit a first power signal, signal lines that transmit a second power signal, and signal lines that transmit a logic signal.

[0073] The second type signal lines 12 need to carry a smaller current. For example, the second type signal lines 12 include at least one of signal lines transmitting touch signals, signal lines transmitting communication protocols, signal lines transmitting data signals, and signal lines transmitting reset signals.

[0074] In the related art, the first type of signal line includes a first signal line, and the first signal line includes a first trace and a second trace. The first trace is arranged in the main body area, and the second trace is arranged in the bending area, one end extends to the main body area and is connected to the first trace, and the other end extends to the binding area. Among them, the first trace is arranged in a conductive layer, and the first trace needs to carry a larger current. Therefore, the line width of the first trace is wider (for example, greater than or equal to 0.8mm, for example 1mm). The wider first trace causes the width of the circuit board located in the main body area to be wider along the second direction, thereby causing the circuit board to occupy a larger space in the display device.

[0075] To solve the above technical problems, some embodiments of the present disclosure provide a circuit board 600. As shown in FIG7 , a first signal line 61 includes a plurality of first traces 611 and second traces 612. Exemplarily, the first signal line 61 includes two, three, four, five, or six first traces 611.

[0076] The following takes the example of the first signal line 61 including two first routing lines 611 to schematically illustrate some embodiments of the present disclosure, but the implementation of the present disclosure is not limited to this, and it can also be considered that the first signal line 61 includes four or six first routing lines 611, as long as the same technical concept is applied.

[0077] As shown in Figure 7 , a first trace 611 is disposed in the main body region 610 and extends along a first direction X. A second trace 612 is disposed in the bending region 620 , with one end extending to the main body region 610 and connected to the first trace 611 , and the other end extending to the binding region 630 . As shown in Figure 8 , multiple first traces 611 are disposed in different conductive layers 601 , and the orthographic projections of at least two first traces 611 on the reference plane overlap, and the overlapping portions are connected at both ends. It will be understood that the first traces 611 whose orthographic projections do not overlap among the multiple first traces 611 are connected at one end away from the second trace 612 .

[0078] In other words, the first trace in the related art is split into multiple first traces 611, and the multiple first traces 611 are arranged in parallel. The total current required to be carried by the multiple parallel-arranged first traces 611 is equal to the sum of the currents required to be carried by the first traces in the related art. That is, the current required to be carried by the first traces 611 provided in some embodiments of the present disclosure is less than the current required to be carried in the related art. Therefore, the line width of the first traces 611 provided in some embodiments of the present disclosure is less than the line width of the first trace in the related art, and the sum of the line widths of the multiple first traces 611 provided in some embodiments of the present disclosure is equal to the line width of the first trace in the related art. Along the second direction Y, the overlapping orthographic projections of the first traces 611 share a portion of space, which can reduce the width of the multiple first traces 611 along the second direction Y, reducing the width of the circuit board 600 located in the main body area 610 along the second direction Y, thereby reducing the space occupied by the circuit board 600, and increasing the space for other components in the display device (e.g., the battery and antenna, which are arranged opposite the circuit board 600 located in the main body area 610).

[0079] Experiments have shown that, compared to circuit boards in related art, in some embodiments of the present disclosure, the width of the circuit board 600 located in the main area 610 along the second direction Y is reduced by greater than or equal to 1.5 mm, for example, 1.5 mm, 1.7 mm, or 2 mm.

[0080] In some examples, the width of the circuit board 600 in the main area 610 along the second direction Y is reduced from 14 mm to 16 mm to 11 mm to 13 mm.

[0081] For example, the width of the circuit board 600 along the second direction Y is 11 mm, 12 mm, or 13 mm.

[0082] For example, by increasing the space occupied by the battery, the battery can be made larger, thereby increasing the battery power, which is beneficial to increasing the standby time of the display device 1000. Alternatively, for example, by increasing the space occupied by the antenna, the antenna can be made larger, which can increase the effective area of ​​the antenna and help increase the antenna's transmission power or reception power.

[0083] As shown in Figure 8, the second trace 612 is arranged in a conductive layer 601. In this way, the thickness of the circuit board 600 located in the bending area 620 is thinner, so that the circuit board 600 located in the bending area 620 has better flexibility. When the circuit board 600 is bent, the better flexibility of the circuit board 600 located in the bending area 620 can reduce the bending stress of the circuit board 600.

[0084] In some embodiments, the orthographic projections of any two first traces 611 on the reference plane overlap, and the two ends of the overlapping portion are connected. In this way, the width of the multiple first traces 611 along the second direction Y can be further reduced, and the width of the circuit board 600 located in the main area 610 along the second direction Y can be reduced.

[0085] In some embodiments, as shown in Figures 7 and 8, the first signal line 61 includes two first traces 611 and one second trace 612. Along the first direction X, the two first traces 611 are flush at both ends and connected at both ends. The orthographic projections of the two first traces 611 on the reference plane overlap.

[0086] In some embodiments, as shown in FIG. 7 , the circuit board 600 further includes a plurality of binding pins 602 , which are disposed in a binding region 630 , and at least one binding pin 602 is connected to a second trace 612 extending to the binding region 630 .

[0087] In some embodiments, as shown in FIG. 7 and FIG. 8 , the multi-layer conductive layer 601 includes a first conductive layer 6011 and / or a second conductive layer 6012 .

[0088] As shown in Figures 7, 8, and 9, when the multi-layer conductive layer 601 includes a first conductive layer 6011, the first conductive layer 6011 includes a second signal line 62. The signal transmitted by the second signal line 62 is different from the signal transmitted by the first signal line 61. For example, the second signal line 62 is used to transmit a touch signal or a communication protocol. The line width of the second signal line 62 is less than the sum of the line widths of the multiple first traces 611, that is, the line width of the second signal line 62 is narrower. The narrower signal line does not cause the width of the circuit board 600 to be wider along the second direction Y. Therefore, the second signal line 62 does not need to be split, that is, the second signal line 62 is only provided in the first conductive layer 6011. In other words, the first conductive layer 6011 is the conductive layer 601 that is originally provided, and is not a new conductive layer 601 provided for the purpose of providing the split first trace 611.

[0089] As shown in Figures 7, 8 and 9, the multiple first traces 611 include a first sub-line 6111, and the first sub-line 6111 is arranged in the first conductive layer 6011, that is, the first sub-line 6111 and the second signal line 62 are made of the same material and are arranged on the same layer. In this way, the thickness of the circuit board 600 can be reduced, which is conducive to reducing the thickness of the display device 1000.

[0090] As shown in Figures 7, 8 and 10, when the multi-layer conductive layer 601 further includes a second conductive layer 6012, the second conductive layer 6012 is arranged on one side of the first conductive layer 6011 along the third direction Z, and the third direction Z is perpendicular to the first conductive layer 6011.

[0091] The second conductive layer 6012 includes a third signal line 63. The signal transmitted by the third signal line 63 is different from the signal transmitted by the first signal line 61. For example, the third signal line 63 is used for grounding. The line width of the third signal line 63 is smaller than the sum of the line widths of the multiple first traces 611. That is, the line width of the third signal line 63 is narrower. The narrower signal line does not increase the width of the circuit board 600 along the second direction Y. Therefore, the third signal line 63 does not need to be split. That is, the third signal line 63 is only provided in the second conductive layer 6012. In other words, the second conductive layer 6012 is the existing conductive layer 601, not a new conductive layer 601 provided to accommodate the split first traces 611.

[0092] As shown in Figures 7, 8 and 10, the multiple first traces 611 include a second sub-line 6112, and the second sub-line 6112 is arranged in the second conductive layer 6012, that is, the second sub-line 6112 and the third signal line 63 are made of the same material and are arranged on the same layer. In this way, the thickness of the circuit board 600 can be further reduced, which is conducive to reducing the thickness of the display device 1000.

[0093] In some examples, as shown in FIG8 , the multilayer conductive layer 601 includes a first conductive layer 6011 and a second conductive layer 6012. The circuit board 600 includes two first traces 611, i.e., the plurality of first traces 611 only include a first sub-line 6111 and a second sub-line 6112. The first sub-line 6111 is provided in the first conductive layer 6011, and the second sub-line 6112 is provided in the second conductive layer 6012. In this manner, there is no need to add a new conductive layer 601, and the thickness of the circuit board 600 can be kept constant.

[0094] In some embodiments, as shown in Figures 11 and 12 , the orthographic projection of the second sub-line 6112 on the reference plane overlaps with the orthographic projection of the first sub-line 6111 on the reference plane. The circuit board 600 further includes at least one insulating layer 603. The at least one insulating layer 603 is disposed between the first conductive layer 6011 and the second conductive layer 6012. The at least one insulating layer 603 has a connection hole 6021. The second sub-line 6112 includes a set segment 6101. The set segment 6101 of the second sub-line 6112 extends into the connection hole 6021 and connects to the second sub-line 6112. This, on the one hand, strengthens the electrical connection between the first sub-line 6111 and the second sub-line 6112. On the other hand, it reduces the total resistance of the first sub-line 6111 and the second sub-line 6112, thereby reducing the total resistance of the plurality of first traces 611.

[0095] Illustratively, the first conductive layer 6011 and the second conductive layer 6012 are adjacent conductive layers 601, and the circuit board 600 includes a single insulating layer 603. Alternatively, illustratively, at least one conductive layer 601 is disposed between the first conductive layer 6011 and the second conductive layer 6012, and the circuit board 600 includes multiple insulating layers 603.

[0096] In some examples, as shown in FIG. 11 , the first sub-line 6111 includes a set line segment 6101 , and the length of the set line segment 6101 is equal to the length of the shorter one of the first sub-line 6111 and the second sub-line 6112 .

[0097] In other examples, as shown in Figure 12, the first sub-line 6111 includes multiple set line segments 6101, the length of the set line segment 6101 is smaller than the length of the first sub-line 6111 and smaller than the length of the second sub-line 6112, and the multiple set line segments 6101 are arranged at intervals along the first direction X.

[0098] In some embodiments, the line widths of the plurality of first traces 611 are equal, so that the difference in resistance between the plurality of first traces 611 can be reduced, thereby reducing the difference in timing of signals transmitted by the plurality of first traces 611 .

[0099] On this basis, along the second direction Y, the boundaries of the orthographic projections of at least two first traces 611 on the reference plane coincide. In this way, the space shared by the first traces 611 whose orthographic projections overlap is increased, which can further reduce the width of the multiple first traces 611 along the second direction Y and reduce the width of the circuit board 600 located in the main area 610 along the second direction Y.

[0100] In other embodiments, the line widths of at least two first traces 611 are unequal. For example, the line widths of any two first traces 611 are unequal. The width of the first traces 611 included in each conductive layer 601 can be set according to actual conditions.

[0101] In some embodiments, as shown in FIG13 , the second trace 612 is disposed on the same layer as a first trace 611 , that is, the second trace 612 is made of the same material as a first trace 611 and is disposed on the same layer. This can reduce the thickness of the circuit board 600 , which is beneficial to reducing the thickness of the display device 1000 .

[0102] It is understandable that the current carried by the second trace 612 is equal to the sum of the currents carried by the plurality of first traces 611 . Therefore, the line width of the second trace 612 is greater than the line width of the first trace 611 arranged on the same layer.

[0103] In some examples, the resistivity of the multiple first traces 611 is equal, that is, the material of the multiple first traces 611 is the same, and the line width of the second trace 612 is greater than or equal to the sum of the line widths of the multiple first traces 611. In this way, the identity of the materials in the circuit board 600 can be improved and the preparation cost of the circuit board 600 can be reduced.

[0104] In other examples, the resistivity of at least two first traces 611 is different, that is, the materials of at least two first traces 611 are different, the second trace 612 is connected to one of the multiple first traces 611 with a smaller resistivity, and the line width of the second trace 612 is smaller than the sum of the line widths of the multiple first traces 611. In this way, the line width of the second trace 612 can be reduced, and the width of the circuit board 600 along the second direction Y in the bending area 620 and the binding area 630 can be reduced, thereby reducing the space occupied by the circuit board 600.

[0105] In other embodiments, as shown in Figures 11 and 12, the multi-layer conductive layer 601 further includes a third conductive layer 6013, the third conductive layer 6013 and the conductive layer 601 where the first trace 611 is located are different conductive layers 601, and the second trace 612 is arranged in the third conductive layer 6013.

[0106] The third conductive layer 6013 may be disposed between two adjacent conductive layers 601 in the multilayer conductive layer 601 where the first trace 611 is located, or may be disposed on one side of the multilayer conductive layer 601 where the first trace 611 is located along the third direction Z. The third direction Z is perpendicular to the conductive layer 601 .

[0107] 8 , the outermost conductive layers 601 in the multilayer conductive layers 601 where the plurality of first traces 611 are located are the fourth conductive layer 6014 and the fifth conductive layer 6015. The third conductive layer 6013 is disposed on a side of the fourth conductive layer 6014 or the fifth conductive layer 6015 away from the other.

[0108] Illustratively, the third conductive layer 6013 is disposed on a side of the fourth conductive layer 6014 away from the fifth conductive layer 6015. Alternatively, illustratively, the third conductive layer 6013 is disposed on a side of the fifth conductive layer 6015 away from the fourth conductive layer 6014.

[0109] On this basis, the third conductive layer 6013 is arranged on the side of the fourth conductive layer 6014 and the fifth conductive layer 6015 close to the binding part 130. In this way, the bending radius of the circuit board 600 can be reduced, which is beneficial to increase the distance between the shell 200 and the circuit board 600 located in the bending area 620, and reduce the impact of the circuit board 600 on the shell 200.

[0110] As shown in FIG8 , when the circuit board 600 includes two first traces 611 , the fourth conductive layer 6014 may be one of the first conductive layer 6011 and the second conductive layer 6012 , and the fifth conductive layer 6015 may be the other of the first conductive layer 6011 and the second conductive layer 6012 .

[0111] In some embodiments, the sum of the widths of the plurality of first traces 611 is greater than or equal to 0.8 mm. For example, the sum of the widths of the plurality of first traces 611 is 0.8 mm, 1 mm, or 1.5 mm. That is, when the width of the signal line is greater than or equal to 0.8 mm, the signal line will cause the width of the circuit board 600 located in the main body area 610 along the second direction Y to be wider, thereby causing the circuit board to occupy a larger space in the display device. Therefore, it is necessary to perform the above-described configuration on the signal line, that is, to split the signal line into the plurality of first traces 611 to reduce the width of the circuit board 600 located in the main body area 610 along the second direction Y.

[0112] In some embodiments, the line width of the first trace 611 is less than 0.8 mm. For example, the line width of the first trace 611 is 0.05 mm, 0.1 mm, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, or 0.75 mm.

[0113] That is, splitting the wider signal lines into signal lines with a line width less than 0.8 mm can reduce the width of the circuit board 600 in the main area 610 along the second direction Y.

[0114] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0115] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A circuit board comprising a main body area, a bending area, and a binding area connected in sequence; the circuit board comprises a plurality of conductive layers stacked together; The circuit board further includes a first signal line, the first signal line including a plurality of first and second traces; the first trace is disposed in the main body area and extends along a first direction; the second trace is disposed in the bending area, with one end extending to the main body area and connected to the first trace, and the other end extending to the binding area; the first direction is from the main body area to the bending area; The plurality of first traces are arranged in different conductive layers, and the orthographic projections of at least two of the first traces on the reference plane overlap, and two ends of the overlapping portion are connected; the reference plane is parallel to the surface of the conductive layer.

2. The circuit board according to claim 1, wherein The multi-layer conductive layer comprises: a first conductive layer including a second signal line; the second signal line transmits a signal different from the signal transmitted by the first signal line, and the line width of the second signal line is smaller than the sum of the line widths of the plurality of first routing lines; the plurality of first routing lines include a first sub-line, and the first sub-line is provided in the first conductive layer; and / or, A second conductive layer is arranged on one side of the first conductive layer along a third direction, the second conductive layer includes a third signal line, the line width of the third signal line is smaller than the sum of the line widths of the plurality of first routing lines; the signal transmitted by the third signal line is different from the signal transmitted by the first signal line; the plurality of first routing lines further include a second sub-line, the second sub-line is arranged in the second conductive layer; the third direction is perpendicular to the first conductive layer.

3. The circuit board according to claim 2, wherein: The orthographic projection of the second sub-line on the reference plane overlaps with the orthographic projection of the first sub-line on the reference plane; The circuit board also includes: At least one insulating layer is provided between the first conductive layer and the second conductive layer; the at least one insulating layer has a connection hole; the first sub-line includes a setting line segment, and the setting line segment of the first sub-line extends into the connection hole and is connected to the second sub-line.

4. The circuit board according to claim 3, wherein: The first sub-line includes a set line segment, and the length of the set line segment is equal to the length of the shorter one of the first sub-line and the second sub-line.

5. The circuit board according to claim 3, wherein The first sub-line includes a plurality of set line segments, the length of the set line segments is smaller than the length of the first sub-line and smaller than the length of the second sub-line, and the plurality of set line segments are spaced apart along the first direction.

6. The circuit board according to any one of claims 1 to 5, wherein: The line widths of the plurality of first routing lines are equal.

7. The circuit board according to any one of claims 1 to 5, wherein: The second routing line is provided on the same layer as one of the first routing lines.

8. The circuit board according to claim 7, wherein: The resistivities of the plurality of first routing lines are equal, and the line width of the second routing line is greater than or equal to the sum of the line widths of the plurality of first routing lines.

9. The circuit board according to claim 7, wherein: At least two first routing lines have different resistivities, the second routing line is connected to one of the first routing lines with a smaller resistivity, and the width of the second routing line is smaller than the sum of the widths of the first routing lines.

10. The circuit board according to any one of claims 1 to 5, wherein: The multi-layer conductive layer further comprises: The third conductive layer is different from the conductive layer where the first wiring is located; the second wiring is arranged in the third conductive layer.

11. The circuit board according to claim 10, wherein The outermost conductive layers among the multiple conductive layers where the multiple first traces are located are the fourth conductive layer and the fifth conductive layer; the third conductive layer is arranged on a side of one of the fourth conductive layer and the fifth conductive layer away from the other.

12. The circuit board according to any one of claims 1 to 5, wherein: The sum of the line widths of the plurality of first traces is greater than or equal to 0.8 mm.

13. The circuit board according to any one of claims 1 to 5, wherein: The line width of the first trace is less than 0.8 mm.

14. The circuit board according to any one of claims 1 to 5, wherein: The width of the circuit board located in the main body area along the second direction is 11 mm to 13 mm; the second direction intersects the first direction.

15. A display device comprising: Display panel; having a display side and a non-display side arranged oppositely; The circuit board according to any one of claims 1 to 14, arranged on a non-display side of the display panel and connected to the display panel.

Images